From cf9610f9116d55c5a66ef9f1faecacabd93a9322 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 24 Aug 2026 08:46:03 -0700 Subject: Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ... --- include/net/gre.h | 145 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 include/net/gre.h (limited to 'include/net/gre.h') diff --git a/include/net/gre.h b/include/net/gre.h new file mode 100644 index 000000000..b55f67ecd --- /dev/null +++ b/include/net/gre.h @@ -0,0 +1,145 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_GRE_H +#define __LINUX_GRE_H + +#include +#include + +struct gre_base_hdr { + __be16 flags; + __be16 protocol; +} __packed; + +struct gre_full_hdr { + struct gre_base_hdr fixed_header; + __be16 csum; + __be16 reserved1; + __be32 key; + __be32 seq; +} __packed; +#define GRE_HEADER_SECTION 4 + +#define GREPROTO_CISCO 0 +#define GREPROTO_PPTP 1 +#define GREPROTO_MAX 2 +#define GRE_IP_PROTO_MAX 2 + +struct gre_protocol { + int (*handler)(struct sk_buff *skb); + void (*err_handler)(struct sk_buff *skb, u32 info); +}; + +int gre_add_protocol(const struct gre_protocol *proto, u8 version); +int gre_del_protocol(const struct gre_protocol *proto, u8 version); + +int gre_parse_header(struct sk_buff *skb, struct tnl_ptk_info *tpi, + bool *csum_err, __be16 proto, int nhs); + +static inline bool netif_is_gretap(const struct net_device *dev) +{ + return dev->rtnl_link_ops && + !strcmp(dev->rtnl_link_ops->kind, "gretap"); +} + +static inline bool netif_is_ip6gretap(const struct net_device *dev) +{ + return dev->rtnl_link_ops && + !strcmp(dev->rtnl_link_ops->kind, "ip6gretap"); +} + +static inline int gre_calc_hlen(const unsigned long *o_flags) +{ + int addend = 4; + + if (test_bit(IP_TUNNEL_CSUM_BIT, o_flags)) + addend += 4; + if (test_bit(IP_TUNNEL_KEY_BIT, o_flags)) + addend += 4; + if (test_bit(IP_TUNNEL_SEQ_BIT, o_flags)) + addend += 4; + return addend; +} + +static inline void gre_flags_to_tnl_flags(unsigned long *dst, __be16 flags) +{ + IP_TUNNEL_DECLARE_FLAGS(res) = { }; + + __assign_bit(IP_TUNNEL_CSUM_BIT, res, flags & GRE_CSUM); + __assign_bit(IP_TUNNEL_ROUTING_BIT, res, flags & GRE_ROUTING); + __assign_bit(IP_TUNNEL_KEY_BIT, res, flags & GRE_KEY); + __assign_bit(IP_TUNNEL_SEQ_BIT, res, flags & GRE_SEQ); + __assign_bit(IP_TUNNEL_STRICT_BIT, res, flags & GRE_STRICT); + __assign_bit(IP_TUNNEL_REC_BIT, res, flags & GRE_REC); + __assign_bit(IP_TUNNEL_VERSION_BIT, res, flags & GRE_VERSION); + + ip_tunnel_flags_copy(dst, res); +} + +static inline __be16 gre_tnl_flags_to_gre_flags(const unsigned long *tflags) +{ + __be16 flags = 0; + + if (test_bit(IP_TUNNEL_CSUM_BIT, tflags)) + flags |= GRE_CSUM; + if (test_bit(IP_TUNNEL_ROUTING_BIT, tflags)) + flags |= GRE_ROUTING; + if (test_bit(IP_TUNNEL_KEY_BIT, tflags)) + flags |= GRE_KEY; + if (test_bit(IP_TUNNEL_SEQ_BIT, tflags)) + flags |= GRE_SEQ; + if (test_bit(IP_TUNNEL_STRICT_BIT, tflags)) + flags |= GRE_STRICT; + if (test_bit(IP_TUNNEL_REC_BIT, tflags)) + flags |= GRE_REC; + if (test_bit(IP_TUNNEL_VERSION_BIT, tflags)) + flags |= GRE_VERSION; + + return flags; +} + +static inline void gre_build_header(struct sk_buff *skb, int hdr_len, + const unsigned long *flags, __be16 proto, + __be32 key, __be32 seq) +{ + IP_TUNNEL_DECLARE_FLAGS(cond) = { }; + struct gre_base_hdr *greh; + + skb_push(skb, hdr_len); + + skb_set_inner_protocol(skb, proto); + skb_reset_transport_header(skb); + greh = (struct gre_base_hdr *)skb->data; + greh->flags = gre_tnl_flags_to_gre_flags(flags); + greh->protocol = proto; + + __set_bit(IP_TUNNEL_KEY_BIT, cond); + __set_bit(IP_TUNNEL_CSUM_BIT, cond); + __set_bit(IP_TUNNEL_SEQ_BIT, cond); + + if (ip_tunnel_flags_intersect(flags, cond)) { + __be32 *ptr = (__be32 *)(((u8 *)greh) + hdr_len - 4); + + if (test_bit(IP_TUNNEL_SEQ_BIT, flags)) { + *ptr = seq; + ptr--; + } + if (test_bit(IP_TUNNEL_KEY_BIT, flags)) { + *ptr = key; + ptr--; + } + if (test_bit(IP_TUNNEL_CSUM_BIT, flags) && + !(skb_shinfo(skb)->gso_type & + (SKB_GSO_GRE | SKB_GSO_GRE_CSUM))) { + *ptr = 0; + if (skb->ip_summed == CHECKSUM_PARTIAL) { + *(__sum16 *)ptr = csum_fold(lco_csum(skb)); + } else { + skb->ip_summed = CHECKSUM_PARTIAL; + skb->csum_start = skb_transport_header(skb) - skb->head; + skb->csum_offset = sizeof(*greh); + } + } + } +} + +#endif -- cgit v1.3.1