From 27600805e62f800bacf990354632eae4e487d34c Mon Sep 17 00:00:00 2001 From: Yazen Ghannam Date: Thu, 3 Sep 2026 10:43:25 -0500 Subject: x86/amd_node: Fix PCI device reference counting in amd_smn_init() The local "root" pointer is a temporary variable used during the device search. Therefore, refcount related to the search iterators should be cleaned up after the search is complete. Use the __free() cleanup macro to ensure the refcount is decremented when the temporary pointer goes out of scope. Additionally, increment the refcount when caching a root pointer. This ensures the in-use refcount is separate from the temporary search refcounting. Finally, drop the redundant "root = NULL" before the second search loop. The pci_get_class() iterator always decrements the refcount of its "from" argument, so the first loop can only fall through with "root" already NULL. Fixes: 0a4b61d9c2e4 ("x86/amd_node: Fix AMD root device caching") Closes: https://sashiko.dev/#/patchset/20260806160159.230453-1-jason.andryuk%40amd.com Reported-by: Sashiko Assisted-by: LLM Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Mario Limonciello (AMD) Cc: Link: https://patch.msgid.link/20260903154325.74343-1-yazen.ghannam@amd.com --- include/dt-bindings/clock/r8a7779-clock.h | 60 +++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 include/dt-bindings/clock/r8a7779-clock.h (limited to 'include/dt-bindings/clock/r8a7779-clock.h') diff --git a/include/dt-bindings/clock/r8a7779-clock.h b/include/dt-bindings/clock/r8a7779-clock.h new file mode 100644 index 000000000..e39acdc64 --- /dev/null +++ b/include/dt-bindings/clock/r8a7779-clock.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2013 Horms Solutions Ltd. + * + * Contact: Simon Horman + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__ +#define __DT_BINDINGS_CLOCK_R8A7779_H__ + +/* CPG */ +#define R8A7779_CLK_PLLA 0 +#define R8A7779_CLK_Z 1 +#define R8A7779_CLK_ZS 2 +#define R8A7779_CLK_S 3 +#define R8A7779_CLK_S1 4 +#define R8A7779_CLK_P 5 +#define R8A7779_CLK_B 6 +#define R8A7779_CLK_OUT 7 + +/* MSTP 0 */ +#define R8A7779_CLK_PWM 5 +#define R8A7779_CLK_HSPI 7 +#define R8A7779_CLK_TMU2 14 +#define R8A7779_CLK_TMU1 15 +#define R8A7779_CLK_TMU0 16 +#define R8A7779_CLK_HSCIF1 18 +#define R8A7779_CLK_HSCIF0 19 +#define R8A7779_CLK_SCIF5 21 +#define R8A7779_CLK_SCIF4 22 +#define R8A7779_CLK_SCIF3 23 +#define R8A7779_CLK_SCIF2 24 +#define R8A7779_CLK_SCIF1 25 +#define R8A7779_CLK_SCIF0 26 +#define R8A7779_CLK_I2C3 27 +#define R8A7779_CLK_I2C2 28 +#define R8A7779_CLK_I2C1 29 +#define R8A7779_CLK_I2C0 30 + +/* MSTP 1 */ +#define R8A7779_CLK_USB01 0 +#define R8A7779_CLK_USB2 1 +#define R8A7779_CLK_DU 3 +#define R8A7779_CLK_VIN2 8 +#define R8A7779_CLK_VIN1 9 +#define R8A7779_CLK_VIN0 10 +#define R8A7779_CLK_ETHER 14 +#define R8A7779_CLK_SATA 15 +#define R8A7779_CLK_PCIE 16 +#define R8A7779_CLK_VIN3 20 + +/* MSTP 3 */ +#define R8A7779_CLK_SDHI3 20 +#define R8A7779_CLK_SDHI2 21 +#define R8A7779_CLK_SDHI1 22 +#define R8A7779_CLK_SDHI0 23 +#define R8A7779_CLK_MMC1 30 +#define R8A7779_CLK_MMC0 31 + +#endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */ -- cgit v1.3.1