From 55fc280e951ab2b39f3dcb640edc1b1eebc6d173 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 31 Aug 2026 14:43:51 -0500 Subject: Input: tsc2007 - read "ti,poll-period" as u32 The "ti,poll-period" property is documented as a normal uint32 cell. The driver used a u64 helper, which makes the helper type disagree with the schema even though the stored value is still small. Read "ti,poll-period" with the u32 helper matching the documented DT cell size. Assisted-by: Codex:gpt-5-5 Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260831194352.1185860-1-robh@kernel.org Signed-off-by: Dmitry Torokhov --- include/asm-generic/bitops/lock.h | 82 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 include/asm-generic/bitops/lock.h (limited to 'include/asm-generic/bitops/lock.h') diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h new file mode 100644 index 000000000..ffb73b612 --- /dev/null +++ b/include/asm-generic/bitops/lock.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_GENERIC_BITOPS_LOCK_H_ +#define _ASM_GENERIC_BITOPS_LOCK_H_ + +#include +#include +#include + +/** + * arch_test_and_set_bit_lock - Set a bit and return its old value, for lock + * @nr: Bit to set + * @addr: Address to count from + * + * This operation is atomic and provides acquire barrier semantics if + * the returned value is 0. + * It can be used to implement bit locks. + */ +static __always_inline int +arch_test_and_set_bit_lock(unsigned int nr, volatile unsigned long *addr) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + addr += BIT_WORD(nr); + if (READ_ONCE(*addr) & mask) + return 1; + + old = raw_atomic_long_fetch_or_acquire(mask, (atomic_long_t *)addr); + return !!(old & mask); +} + + +/** + * arch_clear_bit_unlock - Clear a bit in memory, for unlock + * @nr: the bit to set + * @addr: the address to start counting from + * + * This operation is atomic and provides release barrier semantics. + */ +static __always_inline void +arch_clear_bit_unlock(unsigned int nr, volatile unsigned long *addr) +{ + addr += BIT_WORD(nr); + raw_atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)addr); +} + +/** + * arch___clear_bit_unlock - Clear a bit in memory, for unlock + * @nr: the bit to set + * @addr: the address to start counting from + * + * A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all + * the bits in the word are protected by this lock some archs can use weaker + * ops to safely unlock. + * + * See for example x86's implementation. + */ +static inline void +arch___clear_bit_unlock(unsigned int nr, volatile unsigned long *addr) +{ + unsigned long old; + + addr += BIT_WORD(nr); + old = READ_ONCE(*addr); + old &= ~BIT_MASK(nr); + raw_atomic_long_set_release((atomic_long_t *)addr, old); +} + +#ifndef arch_xor_unlock_is_negative_byte +static inline bool arch_xor_unlock_is_negative_byte(unsigned long mask, + volatile unsigned long *p) +{ + long old; + + old = raw_atomic_long_fetch_xor_release(mask, (atomic_long_t *)p); + return !!(old & BIT(7)); +} +#endif + +#include + +#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */ -- cgit v1.3.1