From cf9610f9116d55c5a66ef9f1faecacabd93a9322 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 24 Aug 2026 08:46:03 -0700 Subject: Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ... --- fs/coda/cache.c | 121 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 fs/coda/cache.c (limited to 'fs/coda/cache.c') diff --git a/fs/coda/cache.c b/fs/coda/cache.c new file mode 100644 index 000000000..245131296 --- /dev/null +++ b/fs/coda/cache.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cache operations for Coda. + * For Linux 2.1: (C) 1997 Carnegie Mellon University + * For Linux 2.3: (C) 2000 Carnegie Mellon University + * + * Carnegie Mellon encourages users of this code to contribute improvements + * to the Coda project http://www.coda.cs.cmu.edu/ . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include "coda_psdev.h" +#include "coda_linux.h" +#include "coda_cache.h" + +static atomic_t permission_epoch = ATOMIC_INIT(0); + +/* replace or extend an acl cache hit */ +void coda_cache_enter(struct inode *inode, int mask) +{ + struct coda_inode_info *cii = ITOC(inode); + + spin_lock(&cii->c_lock); + cii->c_cached_epoch = atomic_read(&permission_epoch); + if (!uid_eq(cii->c_uid, current_fsuid())) { + cii->c_uid = current_fsuid(); + cii->c_cached_perm = mask; + } else + cii->c_cached_perm |= mask; + spin_unlock(&cii->c_lock); +} + +/* remove cached acl from an inode */ +void coda_cache_clear_inode(struct inode *inode) +{ + struct coda_inode_info *cii = ITOC(inode); + spin_lock(&cii->c_lock); + cii->c_cached_epoch = atomic_read(&permission_epoch) - 1; + spin_unlock(&cii->c_lock); +} + +/* remove all acl caches */ +void coda_cache_clear_all(struct super_block *sb) +{ + atomic_inc(&permission_epoch); +} + + +/* check if the mask has been matched against the acl already */ +int coda_cache_check(struct inode *inode, int mask) +{ + struct coda_inode_info *cii = ITOC(inode); + int hit; + + spin_lock(&cii->c_lock); + hit = (mask & cii->c_cached_perm) == mask && + uid_eq(cii->c_uid, current_fsuid()) && + cii->c_cached_epoch == atomic_read(&permission_epoch); + spin_unlock(&cii->c_lock); + + return hit; +} + + +/* Purging dentries and children */ +/* The following routines drop dentries which are not + in use and flag dentries which are in use to be + zapped later. + + The flags are detected by: + - coda_dentry_revalidate (for lookups) if the flag is C_PURGE + - coda_dentry_delete: to remove dentry from the cache when d_count + falls to zero + - an inode method coda_revalidate (for attributes) if the + flag is C_VATTR +*/ + +/* this won't do any harm: just flag all children */ +static void coda_flag_children(struct dentry *parent, int flag) +{ + struct dentry *de; + + spin_lock(&parent->d_lock); + rcu_read_lock(); + hlist_for_each_entry(de, &parent->d_children, d_sib) { + struct inode *inode = d_inode_rcu(de); + /* don't know what to do with negative dentries */ + if (inode) + coda_flag_inode(inode, flag); + } + rcu_read_unlock(); + spin_unlock(&parent->d_lock); +} + +void coda_flag_inode_children(struct inode *inode, int flag) +{ + struct dentry *alias_de; + + if ( !inode || !S_ISDIR(inode->i_mode)) + return; + + alias_de = d_find_alias(inode); + if (!alias_de) + return; + coda_flag_children(alias_de, flag); + shrink_dcache_parent(alias_de); + dput(alias_de); +} + -- cgit v1.3.1