From a5f7a5bb3b7f28ba7e4fa246775b29a0e5537255 Mon Sep 17 00:00:00 2001 From: Jinke Han Date: Tue, 8 Sep 2026 15:37:42 +0800 Subject: x86/kprobes: Fix crash when probing CS CALL instructions When using eBPF to probe CS CALL instructions within a function, a crash can be triggered. The eBPF tool probes offset 257 of the __hrtimer_run_queues() function: <__hrtimer_run_queues+249>: nopl 0x0(%rax,%rax,1) <__hrtimer_run_queues+254>: mov %r14,%rdi <__hrtimer_run_queues+257>: cs call <__x86_indirect_thunk_r12> <__hrtimer_run_queues+263>: mov %eax,%r12d <__hrtimer_run_queues+266>: xchg %ax,%ax <__hrtimer_run_queues+268>: mov %r13,%rdi Which triggers this crash: BUG: unable to handle page fault for address: 00000000000f41c9 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 0 P4D 0 Oops: 0002 [#1] SMP NOPTI CPU: 1 PID: 0 Comm: swapper/1 Kdump: loaded Tainted: P RIP: 0010:__hrtimer_run_queues+0x106/0x230 Note that __hrtimer_run_queues+0x106 is __hrtimer_run_queues+262, which is at the 6th byte of the above CS CALL instruction. Since the CS CALL instruction occupies 6 bytes, the exception occurred in the middle of that call instruction. The root cause is that when using eBPF tools to probe in the middle of a function, a kprobe with INT3 is used as the underlying implementation. During single-step emulation of the original CALL instruction, int3_emulate_call() assumes that the probed CALL instruction is 5 bytes long. However, the actual CS-prefixed CALL instruction occupies 6 bytes, so it constructs an incorrect exception return address. When the CPU returns from the kprobe handler, the next instruction to be executed is at the address of the last byte of that CS CALL instruction. Coincidentally, starting from that address, the CPU fetches and decodes a completely different instruction, which ultimately triggers a kernel crash. Fix the issue by using the actual instruction length obtained from the instruction decoder when constructing the exception return address, rather than relying on the hardcoded CALL_INSN_SIZE macro. [ mingo: Refined the changelog ] Fixes: 6256e668b7af ("x86/kprobes: Use int3 instead of debug trap for single-step") Suggested-by: Masami Hiramatsu (Google) Signed-off-by: Jinke Han Signed-off-by: Ingo Molnar Reviewed-by: Masami Hiramatsu (Google) Acked-by: Yafang Shao Acked-by: Borislav Petkov Cc: Peter Zijlstra Link: https://patch.msgid.link/20260908073742.GA10517@didi-ThinkCentre-M920t-N000 --- drivers/rtc/rtc-ds2404.c | 225 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 225 insertions(+) create mode 100644 drivers/rtc/rtc-ds2404.c (limited to 'drivers/rtc/rtc-ds2404.c') diff --git a/drivers/rtc/rtc-ds2404.c b/drivers/rtc/rtc-ds2404.c new file mode 100644 index 000000000..217694eca --- /dev/null +++ b/drivers/rtc/rtc-ds2404.c @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2012 Sven Schnelle + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DS2404_STATUS_REG 0x200 +#define DS2404_CONTROL_REG 0x201 +#define DS2404_RTC_REG 0x202 + +#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f +#define DS2404_READ_SCRATCHPAD_CMD 0xaa +#define DS2404_COPY_SCRATCHPAD_CMD 0x55 +#define DS2404_READ_MEMORY_CMD 0xf0 + +#define DS2404_RST 0 +#define DS2404_CLK 1 +#define DS2404_DQ 2 + +struct ds2404 { + struct device *dev; + struct gpio_desc *rst_gpiod; + struct gpio_desc *clk_gpiod; + struct gpio_desc *dq_gpiod; +}; + +static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + /* This will de-assert RESET, declare this GPIO as GPIOD_ACTIVE_LOW */ + chip->rst_gpiod = devm_gpiod_get(dev, "rst", GPIOD_OUT_LOW); + if (IS_ERR(chip->rst_gpiod)) + return PTR_ERR(chip->rst_gpiod); + + chip->clk_gpiod = devm_gpiod_get(dev, "clk", GPIOD_OUT_HIGH); + if (IS_ERR(chip->clk_gpiod)) + return PTR_ERR(chip->clk_gpiod); + + chip->dq_gpiod = devm_gpiod_get(dev, "dq", GPIOD_ASIS); + if (IS_ERR(chip->dq_gpiod)) + return PTR_ERR(chip->dq_gpiod); + + return 0; +} + +static void ds2404_reset(struct ds2404 *chip) +{ + gpiod_set_value(chip->rst_gpiod, 1); + udelay(1000); + gpiod_set_value(chip->rst_gpiod, 0); + gpiod_set_value(chip->clk_gpiod, 0); + gpiod_direction_output(chip->dq_gpiod, 0); + udelay(10); +} + +static void ds2404_write_byte(struct ds2404 *chip, u8 byte) +{ + int i; + + gpiod_direction_output(chip->dq_gpiod, 1); + for (i = 0; i < 8; i++) { + gpiod_set_value(chip->dq_gpiod, byte & (1 << i)); + udelay(10); + gpiod_set_value(chip->clk_gpiod, 1); + udelay(10); + gpiod_set_value(chip->clk_gpiod, 0); + udelay(10); + } +} + +static u8 ds2404_read_byte(struct ds2404 *chip) +{ + int i; + u8 ret = 0; + + gpiod_direction_input(chip->dq_gpiod); + + for (i = 0; i < 8; i++) { + gpiod_set_value(chip->clk_gpiod, 0); + udelay(10); + if (gpiod_get_value(chip->dq_gpiod)) + ret |= 1 << i; + gpiod_set_value(chip->clk_gpiod, 1); + udelay(10); + } + return ret; +} + +static void ds2404_read_memory(struct ds2404 *chip, u16 offset, + int length, u8 *out) +{ + ds2404_reset(chip); + ds2404_write_byte(chip, DS2404_READ_MEMORY_CMD); + ds2404_write_byte(chip, offset & 0xff); + ds2404_write_byte(chip, (offset >> 8) & 0xff); + while (length--) + *out++ = ds2404_read_byte(chip); +} + +static void ds2404_write_memory(struct ds2404 *chip, u16 offset, + int length, u8 *out) +{ + int i; + u8 ta01, ta02, es; + + ds2404_reset(chip); + ds2404_write_byte(chip, DS2404_WRITE_SCRATCHPAD_CMD); + ds2404_write_byte(chip, offset & 0xff); + ds2404_write_byte(chip, (offset >> 8) & 0xff); + + for (i = 0; i < length; i++) + ds2404_write_byte(chip, out[i]); + + ds2404_reset(chip); + ds2404_write_byte(chip, DS2404_READ_SCRATCHPAD_CMD); + + ta01 = ds2404_read_byte(chip); + ta02 = ds2404_read_byte(chip); + es = ds2404_read_byte(chip); + + for (i = 0; i < length; i++) { + if (out[i] != ds2404_read_byte(chip)) { + dev_err(chip->dev, "read invalid data\n"); + return; + } + } + + ds2404_reset(chip); + ds2404_write_byte(chip, DS2404_COPY_SCRATCHPAD_CMD); + ds2404_write_byte(chip, ta01); + ds2404_write_byte(chip, ta02); + ds2404_write_byte(chip, es); + + while (gpiod_get_value(chip->dq_gpiod)) + ; +} + +static void ds2404_enable_osc(struct ds2404 *chip) +{ + u8 in[1] = { 0x10 }; /* enable oscillator */ + + ds2404_write_memory(chip, 0x201, 1, in); +} + +static int ds2404_read_time(struct device *dev, struct rtc_time *dt) +{ + struct ds2404 *chip = dev_get_drvdata(dev); + unsigned long time = 0; + __le32 hw_time = 0; + + ds2404_read_memory(chip, 0x203, 4, (u8 *)&hw_time); + time = le32_to_cpu(hw_time); + + rtc_time64_to_tm(time, dt); + return 0; +} + +static int ds2404_set_time(struct device *dev, struct rtc_time *dt) +{ + struct ds2404 *chip = dev_get_drvdata(dev); + u32 time = cpu_to_le32(rtc_tm_to_time64(dt)); + ds2404_write_memory(chip, 0x203, 4, (u8 *)&time); + return 0; +} + +static const struct rtc_class_ops ds2404_rtc_ops = { + .read_time = ds2404_read_time, + .set_time = ds2404_set_time, +}; + +static int rtc_probe(struct platform_device *pdev) +{ + struct ds2404 *chip; + struct rtc_device *rtc; + int retval = -EBUSY; + + chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &pdev->dev; + + rtc = devm_rtc_allocate_device(&pdev->dev); + if (IS_ERR(rtc)) + return PTR_ERR(rtc); + + retval = ds2404_gpio_map(chip, pdev); + if (retval) + return retval; + + platform_set_drvdata(pdev, chip); + + rtc->ops = &ds2404_rtc_ops; + rtc->range_max = U32_MAX; + + retval = devm_rtc_register_device(rtc); + if (retval) + return retval; + + ds2404_enable_osc(chip); + return 0; +} + +static struct platform_driver rtc_device_driver = { + .probe = rtc_probe, + .driver = { + .name = "ds2404", + }, +}; +module_platform_driver(rtc_device_driver); + +MODULE_DESCRIPTION("DS2404 RTC"); +MODULE_AUTHOR("Sven Schnelle"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ds2404"); -- cgit v1.3.1