From 106b4a2a78b2a2f14885604891957b84bba502db Mon Sep 17 00:00:00 2001 From: Adrian Betschart Date: Fri, 11 Sep 2026 17:13:14 +0200 Subject: drm/amd/display: Try RGB before YCbCr 4:4:4 in stream validation amdgpu_dm_create_validate_stream_for_sink() walks encoding_order[] and uses the first encoding that validates. YCbCr 4:4:4 is listed before RGB, so an HDMI sink that advertises 4:4:4 gets YCbCr 4:4:4 whenever the "color format" property is left at AUTO, even though RGB fits the same link. That contradicts the documented AUTO behaviour for HDMI in enum drm_connector_color_format (RGB, falling back to YCbCr 4:2:0 only when the bandwidth is not available or the mode is 4:2:0-only), which the amdgpu implementation of the property also describes. It also leaves the "Broadcast RGB" property without effect on such sinks, since the quantization range it selects only applies to RGB output. Try RGB first. The mask still holds every encoding the sink supports, so a mode that cannot carry RGB falls back exactly as before. For reference, v7.2 picked RGB here unless YCbCr 4:4:4 was forced through debugfs, while earlier kernels picked YCbCr 4:4:4 for any HDMI sink that advertised it. Fixes: 0b0ff65d3ca1 ("drm/amd/display: Refactor stream validation") Suggested-by: Adolfo Rodrigues Assisted-by: Claude Code:claude-fable-5-1 Signed-off-by: Adrian Betschart Reviewed-by: Fangzhi Zuo Tested-by: Adolfo Rodrigues Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher (cherry picked from commit 7de432bc753133764dc40d37f9388da56de251e7) --- drivers/regulator/88pg86x.c | 115 + drivers/regulator/88pm800-regulator.c | 287 + drivers/regulator/88pm8607.c | 405 ++ drivers/regulator/88pm886-regulator.c | 392 ++ drivers/regulator/Kconfig | 1899 +++++++ drivers/regulator/Makefile | 222 + drivers/regulator/aat2870-regulator.c | 201 + drivers/regulator/ab8500-ext.c | 474 ++ drivers/regulator/ab8500.c | 1766 ++++++ drivers/regulator/act8865-regulator.c | 800 +++ drivers/regulator/act8945a-regulator.c | 362 ++ drivers/regulator/ad5398.c | 285 + drivers/regulator/adp5055-regulator.c | 423 ++ drivers/regulator/anatop-regulator.c | 353 ++ drivers/regulator/arizona-ldo1.c | 418 ++ drivers/regulator/arizona-micsupp.c | 400 ++ drivers/regulator/as3711-regulator.c | 266 + drivers/regulator/as3722-regulator.c | 845 +++ drivers/regulator/atc260x-regulator.c | 543 ++ drivers/regulator/aw37503-regulator.c | 240 + drivers/regulator/axp20x-regulator.c | 1759 ++++++ drivers/regulator/bcm590xx-regulator.c | 1177 ++++ drivers/regulator/bd71815-regulator.c | 628 +++ drivers/regulator/bd71828-regulator.c | 1712 ++++++ drivers/regulator/bd718x7-regulator.c | 1839 +++++++ drivers/regulator/bd9571mwv-regulator.c | 367 ++ drivers/regulator/bd9576-regulator.c | 1140 ++++ drivers/regulator/bd96801-regulator.c | 1352 +++++ drivers/regulator/bq257xx-regulator.c | 185 + drivers/regulator/core.c | 6909 ++++++++++++++++++++++++ drivers/regulator/cpcap-regulator.c | 671 +++ drivers/regulator/cros-ec-regulator.c | 228 + drivers/regulator/da903x-regulator.c | 495 ++ drivers/regulator/da9052-regulator.c | 460 ++ drivers/regulator/da9055-regulator.c | 598 ++ drivers/regulator/da9062-regulator.c | 1056 ++++ drivers/regulator/da9063-regulator.c | 1085 ++++ drivers/regulator/da9121-regulator.c | 1225 +++++ drivers/regulator/da9121-regulator.h | 321 ++ drivers/regulator/da9210-regulator.c | 225 + drivers/regulator/da9210-regulator.h | 273 + drivers/regulator/da9211-regulator.c | 566 ++ drivers/regulator/da9211-regulator.h | 266 + drivers/regulator/db8500-prcmu.c | 501 ++ drivers/regulator/dbx500-prcmu.c | 155 + drivers/regulator/dbx500-prcmu.h | 55 + drivers/regulator/devres.c | 806 +++ drivers/regulator/dummy.c | 72 + drivers/regulator/dummy.h | 23 + drivers/regulator/event.c | 91 + drivers/regulator/fan53555.c | 828 +++ drivers/regulator/fan53880.c | 185 + drivers/regulator/fixed-helper.c | 63 + drivers/regulator/fixed.c | 402 ++ drivers/regulator/fp9931.c | 526 ++ drivers/regulator/gpio-regulator.c | 389 ++ drivers/regulator/helpers.c | 1003 ++++ drivers/regulator/hi6421-regulator.c | 590 ++ drivers/regulator/hi6421v530-regulator.c | 206 + drivers/regulator/hi6421v600-regulator.c | 295 + drivers/regulator/hi655x-regulator.c | 217 + drivers/regulator/internal.h | 138 + drivers/regulator/irq_helpers.c | 444 ++ drivers/regulator/isl6271a-regulator.c | 171 + drivers/regulator/isl9305.c | 209 + drivers/regulator/lm363x-regulator.c | 367 ++ drivers/regulator/lochnagar-regulator.c | 282 + drivers/regulator/lp3971.c | 460 ++ drivers/regulator/lp3972.c | 568 ++ drivers/regulator/lp872x.c | 958 ++++ drivers/regulator/lp873x-regulator.c | 201 + drivers/regulator/lp8755.c | 465 ++ drivers/regulator/lp87565-regulator.c | 250 + drivers/regulator/lp8788-buck.c | 541 ++ drivers/regulator/lp8788-ldo.c | 640 +++ drivers/regulator/ltc3589.c | 476 ++ drivers/regulator/ltc3676.c | 384 ++ drivers/regulator/max14577-regulator.c | 370 ++ drivers/regulator/max1586.c | 309 ++ drivers/regulator/max20086-regulator.c | 335 ++ drivers/regulator/max20411-regulator.c | 165 + drivers/regulator/max5970-regulator.c | 642 +++ drivers/regulator/max77503-regulator.c | 129 + drivers/regulator/max77541-regulator.c | 152 + drivers/regulator/max77620-regulator.c | 927 ++++ drivers/regulator/max77650-regulator.c | 405 ++ drivers/regulator/max77675-regulator.c | 1055 ++++ drivers/regulator/max77686-regulator.c | 538 ++ drivers/regulator/max77693-regulator.c | 305 ++ drivers/regulator/max77802-regulator.c | 567 ++ drivers/regulator/max77826-regulator.c | 299 + drivers/regulator/max77838-regulator.c | 221 + drivers/regulator/max77857-regulator.c | 461 ++ drivers/regulator/max8649.c | 272 + drivers/regulator/max8660.c | 529 ++ drivers/regulator/max8893.c | 184 + drivers/regulator/max8907-regulator.c | 397 ++ drivers/regulator/max8925-regulator.c | 286 + drivers/regulator/max8952.c | 339 ++ drivers/regulator/max8973-regulator.c | 813 +++ drivers/regulator/max8997-regulator.c | 1183 ++++ drivers/regulator/max8998.c | 783 +++ drivers/regulator/mc13783-regulator.c | 478 ++ drivers/regulator/mc13892-regulator.c | 652 +++ drivers/regulator/mc13xxx-regulator-core.c | 220 + drivers/regulator/mc13xxx.h | 108 + drivers/regulator/mcp16502.c | 596 ++ drivers/regulator/mp5416.c | 250 + drivers/regulator/mp8859.c | 408 ++ drivers/regulator/mp886x.c | 370 ++ drivers/regulator/mpq7920.c | 330 ++ drivers/regulator/mpq7920.h | 69 + drivers/regulator/mt6311-regulator.c | 164 + drivers/regulator/mt6311-regulator.h | 57 + drivers/regulator/mt6315-regulator.c | 302 ++ drivers/regulator/mt6316-regulator.c | 346 ++ drivers/regulator/mt6323-regulator.c | 422 ++ drivers/regulator/mt6331-regulator.c | 508 ++ drivers/regulator/mt6332-regulator.c | 423 ++ drivers/regulator/mt6357-regulator.c | 454 ++ drivers/regulator/mt6358-regulator.c | 745 +++ drivers/regulator/mt6359-regulator.c | 1152 ++++ drivers/regulator/mt6360-regulator.c | 466 ++ drivers/regulator/mt6363-regulator.c | 944 ++++ drivers/regulator/mt6370-regulator.c | 390 ++ drivers/regulator/mt6380-regulator.c | 342 ++ drivers/regulator/mt6397-regulator.c | 420 ++ drivers/regulator/mtk-dvfsrc-regulator.c | 234 + drivers/regulator/of_regulator.c | 987 ++++ drivers/regulator/palmas-regulator.c | 1687 ++++++ drivers/regulator/pbias-regulator.c | 243 + drivers/regulator/pca9450-regulator.c | 1472 +++++ drivers/regulator/pf0900-regulator.c | 975 ++++ drivers/regulator/pf1550-regulator.c | 426 ++ drivers/regulator/pf530x-regulator.c | 375 ++ drivers/regulator/pf8x00-regulator.c | 620 +++ drivers/regulator/pf9453-regulator.c | 873 +++ drivers/regulator/pfuze100-regulator.c | 876 +++ drivers/regulator/pv88060-regulator.c | 390 ++ drivers/regulator/pv88060-regulator.h | 60 + drivers/regulator/pv88080-regulator.c | 546 ++ drivers/regulator/pv88080-regulator.h | 109 + drivers/regulator/pv88090-regulator.c | 411 ++ drivers/regulator/pv88090-regulator.h | 89 + drivers/regulator/pwm-regulator.c | 444 ++ drivers/regulator/qcom-labibb-regulator.c | 906 ++++ drivers/regulator/qcom-pm8008-regulator.c | 198 + drivers/regulator/qcom-refgen-regulator.c | 255 + drivers/regulator/qcom-rpmh-regulator.c | 2143 ++++++++ drivers/regulator/qcom_rpm-regulator.c | 1010 ++++ drivers/regulator/qcom_smd-regulator.c | 1548 ++++++ drivers/regulator/qcom_spmi-regulator.c | 2618 +++++++++ drivers/regulator/qcom_usb_vbus-regulator.c | 184 + drivers/regulator/raa215300.c | 192 + drivers/regulator/rc5t583-regulator.c | 171 + drivers/regulator/regnl.h | 13 + drivers/regulator/renesas-usb-vbus-regulator.c | 69 + drivers/regulator/rk808-regulator.c | 2205 ++++++++ drivers/regulator/rn5t618-regulator.c | 155 + drivers/regulator/rohm-regulator.c | 137 + drivers/regulator/rpi-panel-attiny-regulator.c | 384 ++ drivers/regulator/rpi-panel-v2-regulator.c | 125 + drivers/regulator/rt4801-regulator.c | 251 + drivers/regulator/rt4803.c | 215 + drivers/regulator/rt4831-regulator.c | 206 + drivers/regulator/rt5033-regulator.c | 136 + drivers/regulator/rt5120-regulator.c | 421 ++ drivers/regulator/rt5133-regulator.c | 642 +++ drivers/regulator/rt5190a-regulator.c | 517 ++ drivers/regulator/rt5739.c | 321 ++ drivers/regulator/rt5759-regulator.c | 371 ++ drivers/regulator/rt6160-regulator.c | 335 ++ drivers/regulator/rt6190-regulator.c | 495 ++ drivers/regulator/rt6245-regulator.c | 258 + drivers/regulator/rt8092.c | 312 ++ drivers/regulator/rtmv20-regulator.c | 438 ++ drivers/regulator/rtq2134-regulator.c | 375 ++ drivers/regulator/rtq2208-regulator.c | 672 +++ drivers/regulator/rtq6752-regulator.c | 290 + drivers/regulator/s2dos05-regulator.c | 165 + drivers/regulator/s2mpa01.c | 390 ++ drivers/regulator/s2mps11.c | 2295 ++++++++ drivers/regulator/s5m8767.c | 937 ++++ drivers/regulator/sc2730-regulator.c | 375 ++ drivers/regulator/sc2731-regulator.c | 257 + drivers/regulator/scmi-regulator.c | 421 ++ drivers/regulator/sgm3804-regulator.c | 314 ++ drivers/regulator/sky81452-regulator.c | 91 + drivers/regulator/slg51000-regulator.c | 519 ++ drivers/regulator/slg51000-regulator.h | 505 ++ drivers/regulator/spacemit-p1.c | 160 + drivers/regulator/stm32-booster.c | 128 + drivers/regulator/stm32-pwr.c | 185 + drivers/regulator/stm32-vrefbuf.c | 290 + drivers/regulator/stpmic1_regulator.c | 651 +++ drivers/regulator/stw481x-vmmc.c | 104 + drivers/regulator/sun20i-regulator.c | 157 + drivers/regulator/sy7636a-regulator.c | 167 + drivers/regulator/sy8106a-regulator.c | 153 + drivers/regulator/sy8824x.c | 237 + drivers/regulator/sy8827n.c | 201 + drivers/regulator/ti-abb-regulator.c | 884 +++ drivers/regulator/tps51632-regulator.c | 364 ++ drivers/regulator/tps6105x-regulator.c | 116 + drivers/regulator/tps62360-regulator.c | 513 ++ drivers/regulator/tps6286x-regulator.c | 169 + drivers/regulator/tps6287x-regulator.c | 253 + drivers/regulator/tps65023-regulator.c | 358 ++ drivers/regulator/tps6507x-regulator.c | 461 ++ drivers/regulator/tps65086-regulator.c | 419 ++ drivers/regulator/tps65090-regulator.c | 534 ++ drivers/regulator/tps65132-regulator.c | 291 + drivers/regulator/tps65185.c | 466 ++ drivers/regulator/tps65217-regulator.c | 281 + drivers/regulator/tps65218-regulator.c | 362 ++ drivers/regulator/tps65219-regulator.c | 564 ++ drivers/regulator/tps6524x-regulator.c | 639 +++ drivers/regulator/tps6586x-regulator.c | 543 ++ drivers/regulator/tps65910-regulator.c | 1278 +++++ drivers/regulator/tps65912-regulator.c | 161 + drivers/regulator/tps6594-regulator.c | 856 +++ drivers/regulator/tps68470-regulator.c | 202 + drivers/regulator/twl-regulator.c | 676 +++ drivers/regulator/twl6030-regulator.c | 785 +++ drivers/regulator/uniphier-regulator.c | 221 + drivers/regulator/userspace-consumer.c | 225 + drivers/regulator/vctrl-regulator.c | 555 ++ drivers/regulator/vexpress-regulator.c | 101 + drivers/regulator/virtual.c | 373 ++ drivers/regulator/vqmmc-ipq4019-regulator.c | 101 + drivers/regulator/wm831x-dcdc.c | 858 +++ drivers/regulator/wm831x-isink.c | 213 + drivers/regulator/wm831x-ldo.c | 678 +++ drivers/regulator/wm8350-regulator.c | 1330 +++++ drivers/regulator/wm8400-regulator.c | 276 + drivers/regulator/wm8994-regulator.c | 240 + 236 files changed, 124909 insertions(+) create mode 100644 drivers/regulator/88pg86x.c create mode 100644 drivers/regulator/88pm800-regulator.c create mode 100644 drivers/regulator/88pm8607.c create mode 100644 drivers/regulator/88pm886-regulator.c create mode 100644 drivers/regulator/Kconfig create mode 100644 drivers/regulator/Makefile create mode 100644 drivers/regulator/aat2870-regulator.c create mode 100644 drivers/regulator/ab8500-ext.c create mode 100644 drivers/regulator/ab8500.c create mode 100644 drivers/regulator/act8865-regulator.c create mode 100644 drivers/regulator/act8945a-regulator.c create mode 100644 drivers/regulator/ad5398.c create mode 100644 drivers/regulator/adp5055-regulator.c create mode 100644 drivers/regulator/anatop-regulator.c create mode 100644 drivers/regulator/arizona-ldo1.c create mode 100644 drivers/regulator/arizona-micsupp.c create mode 100644 drivers/regulator/as3711-regulator.c create mode 100644 drivers/regulator/as3722-regulator.c create mode 100644 drivers/regulator/atc260x-regulator.c create mode 100644 drivers/regulator/aw37503-regulator.c create mode 100644 drivers/regulator/axp20x-regulator.c create mode 100644 drivers/regulator/bcm590xx-regulator.c create mode 100644 drivers/regulator/bd71815-regulator.c create mode 100644 drivers/regulator/bd71828-regulator.c create mode 100644 drivers/regulator/bd718x7-regulator.c create mode 100644 drivers/regulator/bd9571mwv-regulator.c create mode 100644 drivers/regulator/bd9576-regulator.c create mode 100644 drivers/regulator/bd96801-regulator.c create mode 100644 drivers/regulator/bq257xx-regulator.c create mode 100644 drivers/regulator/core.c create mode 100644 drivers/regulator/cpcap-regulator.c create mode 100644 drivers/regulator/cros-ec-regulator.c create mode 100644 drivers/regulator/da903x-regulator.c create mode 100644 drivers/regulator/da9052-regulator.c create mode 100644 drivers/regulator/da9055-regulator.c create mode 100644 drivers/regulator/da9062-regulator.c create mode 100644 drivers/regulator/da9063-regulator.c create mode 100644 drivers/regulator/da9121-regulator.c create mode 100644 drivers/regulator/da9121-regulator.h create mode 100644 drivers/regulator/da9210-regulator.c create mode 100644 drivers/regulator/da9210-regulator.h create mode 100644 drivers/regulator/da9211-regulator.c create mode 100644 drivers/regulator/da9211-regulator.h create mode 100644 drivers/regulator/db8500-prcmu.c create mode 100644 drivers/regulator/dbx500-prcmu.c create mode 100644 drivers/regulator/dbx500-prcmu.h create mode 100644 drivers/regulator/devres.c create mode 100644 drivers/regulator/dummy.c create mode 100644 drivers/regulator/dummy.h create mode 100644 drivers/regulator/event.c create mode 100644 drivers/regulator/fan53555.c create mode 100644 drivers/regulator/fan53880.c create mode 100644 drivers/regulator/fixed-helper.c create mode 100644 drivers/regulator/fixed.c create mode 100644 drivers/regulator/fp9931.c create mode 100644 drivers/regulator/gpio-regulator.c create mode 100644 drivers/regulator/helpers.c create mode 100644 drivers/regulator/hi6421-regulator.c create mode 100644 drivers/regulator/hi6421v530-regulator.c create mode 100644 drivers/regulator/hi6421v600-regulator.c create mode 100644 drivers/regulator/hi655x-regulator.c create mode 100644 drivers/regulator/internal.h create mode 100644 drivers/regulator/irq_helpers.c create mode 100644 drivers/regulator/isl6271a-regulator.c create mode 100644 drivers/regulator/isl9305.c create mode 100644 drivers/regulator/lm363x-regulator.c create mode 100644 drivers/regulator/lochnagar-regulator.c create mode 100644 drivers/regulator/lp3971.c create mode 100644 drivers/regulator/lp3972.c create mode 100644 drivers/regulator/lp872x.c create mode 100644 drivers/regulator/lp873x-regulator.c create mode 100644 drivers/regulator/lp8755.c create mode 100644 drivers/regulator/lp87565-regulator.c create mode 100644 drivers/regulator/lp8788-buck.c create mode 100644 drivers/regulator/lp8788-ldo.c create mode 100644 drivers/regulator/ltc3589.c create mode 100644 drivers/regulator/ltc3676.c create mode 100644 drivers/regulator/max14577-regulator.c create mode 100644 drivers/regulator/max1586.c create mode 100644 drivers/regulator/max20086-regulator.c create mode 100644 drivers/regulator/max20411-regulator.c create mode 100644 drivers/regulator/max5970-regulator.c create mode 100644 drivers/regulator/max77503-regulator.c create mode 100644 drivers/regulator/max77541-regulator.c create mode 100644 drivers/regulator/max77620-regulator.c create mode 100644 drivers/regulator/max77650-regulator.c create mode 100644 drivers/regulator/max77675-regulator.c create mode 100644 drivers/regulator/max77686-regulator.c create mode 100644 drivers/regulator/max77693-regulator.c create mode 100644 drivers/regulator/max77802-regulator.c create mode 100644 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drivers/regulator/mp886x.c create mode 100644 drivers/regulator/mpq7920.c create mode 100644 drivers/regulator/mpq7920.h create mode 100644 drivers/regulator/mt6311-regulator.c create mode 100644 drivers/regulator/mt6311-regulator.h create mode 100644 drivers/regulator/mt6315-regulator.c create mode 100644 drivers/regulator/mt6316-regulator.c create mode 100644 drivers/regulator/mt6323-regulator.c create mode 100644 drivers/regulator/mt6331-regulator.c create mode 100644 drivers/regulator/mt6332-regulator.c create mode 100644 drivers/regulator/mt6357-regulator.c create mode 100644 drivers/regulator/mt6358-regulator.c create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 drivers/regulator/mt6360-regulator.c create mode 100644 drivers/regulator/mt6363-regulator.c create mode 100644 drivers/regulator/mt6370-regulator.c create mode 100644 drivers/regulator/mt6380-regulator.c create mode 100644 drivers/regulator/mt6397-regulator.c create mode 100644 drivers/regulator/mtk-dvfsrc-regulator.c create mode 100644 drivers/regulator/of_regulator.c create mode 100644 drivers/regulator/palmas-regulator.c create mode 100644 drivers/regulator/pbias-regulator.c create mode 100644 drivers/regulator/pca9450-regulator.c create mode 100644 drivers/regulator/pf0900-regulator.c create mode 100644 drivers/regulator/pf1550-regulator.c create mode 100644 drivers/regulator/pf530x-regulator.c create mode 100644 drivers/regulator/pf8x00-regulator.c create mode 100644 drivers/regulator/pf9453-regulator.c create mode 100644 drivers/regulator/pfuze100-regulator.c create mode 100644 drivers/regulator/pv88060-regulator.c create mode 100644 drivers/regulator/pv88060-regulator.h create mode 100644 drivers/regulator/pv88080-regulator.c create mode 100644 drivers/regulator/pv88080-regulator.h create mode 100644 drivers/regulator/pv88090-regulator.c create mode 100644 drivers/regulator/pv88090-regulator.h create mode 100644 drivers/regulator/pwm-regulator.c create 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drivers/regulator/s2mpa01.c create mode 100644 drivers/regulator/s2mps11.c create mode 100644 drivers/regulator/s5m8767.c create mode 100644 drivers/regulator/sc2730-regulator.c create mode 100644 drivers/regulator/sc2731-regulator.c create mode 100644 drivers/regulator/scmi-regulator.c create mode 100644 drivers/regulator/sgm3804-regulator.c create mode 100644 drivers/regulator/sky81452-regulator.c create mode 100644 drivers/regulator/slg51000-regulator.c create mode 100644 drivers/regulator/slg51000-regulator.h create mode 100644 drivers/regulator/spacemit-p1.c create mode 100644 drivers/regulator/stm32-booster.c create mode 100644 drivers/regulator/stm32-pwr.c create mode 100644 drivers/regulator/stm32-vrefbuf.c create mode 100644 drivers/regulator/stpmic1_regulator.c create mode 100644 drivers/regulator/stw481x-vmmc.c create mode 100644 drivers/regulator/sun20i-regulator.c create mode 100644 drivers/regulator/sy7636a-regulator.c create mode 100644 drivers/regulator/sy8106a-regulator.c create mode 100644 drivers/regulator/sy8824x.c create mode 100644 drivers/regulator/sy8827n.c create mode 100644 drivers/regulator/ti-abb-regulator.c create mode 100644 drivers/regulator/tps51632-regulator.c create mode 100644 drivers/regulator/tps6105x-regulator.c create mode 100644 drivers/regulator/tps62360-regulator.c create mode 100644 drivers/regulator/tps6286x-regulator.c create mode 100644 drivers/regulator/tps6287x-regulator.c create mode 100644 drivers/regulator/tps65023-regulator.c create mode 100644 drivers/regulator/tps6507x-regulator.c create mode 100644 drivers/regulator/tps65086-regulator.c create mode 100644 drivers/regulator/tps65090-regulator.c create mode 100644 drivers/regulator/tps65132-regulator.c create mode 100644 drivers/regulator/tps65185.c create mode 100644 drivers/regulator/tps65217-regulator.c create mode 100644 drivers/regulator/tps65218-regulator.c create mode 100644 drivers/regulator/tps65219-regulator.c create mode 100644 drivers/regulator/tps6524x-regulator.c create mode 100644 drivers/regulator/tps6586x-regulator.c create mode 100644 drivers/regulator/tps65910-regulator.c create mode 100644 drivers/regulator/tps65912-regulator.c create mode 100644 drivers/regulator/tps6594-regulator.c create mode 100644 drivers/regulator/tps68470-regulator.c create mode 100644 drivers/regulator/twl-regulator.c create mode 100644 drivers/regulator/twl6030-regulator.c create mode 100644 drivers/regulator/uniphier-regulator.c create mode 100644 drivers/regulator/userspace-consumer.c create mode 100644 drivers/regulator/vctrl-regulator.c create mode 100644 drivers/regulator/vexpress-regulator.c create mode 100644 drivers/regulator/virtual.c create mode 100644 drivers/regulator/vqmmc-ipq4019-regulator.c create mode 100644 drivers/regulator/wm831x-dcdc.c create mode 100644 drivers/regulator/wm831x-isink.c create mode 100644 drivers/regulator/wm831x-ldo.c create mode 100644 drivers/regulator/wm8350-regulator.c create mode 100644 drivers/regulator/wm8400-regulator.c create mode 100644 drivers/regulator/wm8994-regulator.c (limited to 'drivers/regulator') diff --git a/drivers/regulator/88pg86x.c b/drivers/regulator/88pg86x.c new file mode 100644 index 000000000..8c25a1db4 --- /dev/null +++ b/drivers/regulator/88pg86x.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include + +static const struct regulator_ops pg86x_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, +}; + +static const struct linear_range pg86x_buck1_ranges[] = { + REGULATOR_LINEAR_RANGE( 0, 0, 10, 0), + REGULATOR_LINEAR_RANGE(1000000, 11, 34, 25000), + REGULATOR_LINEAR_RANGE(1600000, 35, 47, 50000), +}; + +static const struct linear_range pg86x_buck2_ranges[] = { + REGULATOR_LINEAR_RANGE( 0, 0, 15, 0), + REGULATOR_LINEAR_RANGE(1000000, 16, 39, 25000), + REGULATOR_LINEAR_RANGE(1600000, 40, 52, 50000), +}; + +static const struct regulator_desc pg86x_regulators[] = { + { + .id = 0, + .type = REGULATOR_VOLTAGE, + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .n_voltages = 11 + 24 + 13, + .linear_ranges = pg86x_buck1_ranges, + .n_linear_ranges = 3, + .vsel_reg = 0x24, + .vsel_mask = 0xff, + .ops = &pg86x_ops, + .owner = THIS_MODULE + }, + { + .id = 1, + .type = REGULATOR_VOLTAGE, + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .n_voltages = 16 + 24 + 13, + .linear_ranges = pg86x_buck2_ranges, + .n_linear_ranges = 3, + .vsel_reg = 0x13, + .vsel_mask = 0xff, + .ops = &pg86x_ops, + .owner = THIS_MODULE + }, +}; + +static const struct regmap_config pg86x_regmap = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int pg86x_i2c_probe(struct i2c_client *i2c) +{ + int id, ret; + struct regulator_config config = {.dev = &i2c->dev}; + struct regmap *regmap = devm_regmap_init_i2c(i2c, &pg86x_regmap); + + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); + return ret; + } + + for (id = 0; id < ARRAY_SIZE(pg86x_regulators); id++) { + struct regulator_dev *rdev; + rdev = devm_regulator_register(&i2c->dev, + &pg86x_regulators[id], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&i2c->dev, "failed to register %s: %d\n", + pg86x_regulators[id].name, ret); + return ret; + } + } + return 0; +} + +static const struct of_device_id __maybe_unused pg86x_dt_ids[] = { + { .compatible = "marvell,88pg867" }, + { .compatible = "marvell,88pg868" }, + { } +}; +MODULE_DEVICE_TABLE(of, pg86x_dt_ids); + +static const struct i2c_device_id pg86x_i2c_id[] = { + { .name = "88pg867" }, + { .name = "88pg868" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pg86x_i2c_id); + +static struct i2c_driver pg86x_regulator_driver = { + .driver = { + .name = "88pg86x", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(pg86x_dt_ids), + }, + .probe = pg86x_i2c_probe, + .id_table = pg86x_i2c_id, +}; + +module_i2c_driver(pg86x_regulator_driver); + +MODULE_DESCRIPTION("Marvell 88PG86X voltage regulator"); +MODULE_AUTHOR("Alexander Monakov "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/88pm800-regulator.c b/drivers/regulator/88pm800-regulator.c new file mode 100644 index 000000000..83e886030 --- /dev/null +++ b/drivers/regulator/88pm800-regulator.c @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulators driver for Marvell 88PM800 + * + * Copyright (C) 2012 Marvell International Ltd. + * Joseph(Yossi) Hanin + * Yi Zhang + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* LDO1 with DVC[0..3] */ +#define PM800_LDO1_VOUT (0x08) /* VOUT1 */ +#define PM800_LDO1_VOUT_2 (0x09) +#define PM800_LDO1_VOUT_3 (0x0A) +#define PM800_LDO2_VOUT (0x0B) +#define PM800_LDO3_VOUT (0x0C) +#define PM800_LDO4_VOUT (0x0D) +#define PM800_LDO5_VOUT (0x0E) +#define PM800_LDO6_VOUT (0x0F) +#define PM800_LDO7_VOUT (0x10) +#define PM800_LDO8_VOUT (0x11) +#define PM800_LDO9_VOUT (0x12) +#define PM800_LDO10_VOUT (0x13) +#define PM800_LDO11_VOUT (0x14) +#define PM800_LDO12_VOUT (0x15) +#define PM800_LDO13_VOUT (0x16) +#define PM800_LDO14_VOUT (0x17) +#define PM800_LDO15_VOUT (0x18) +#define PM800_LDO16_VOUT (0x19) +#define PM800_LDO17_VOUT (0x1A) +#define PM800_LDO18_VOUT (0x1B) +#define PM800_LDO19_VOUT (0x1C) + +/* BUCK1 with DVC[0..3] */ +#define PM800_BUCK1 (0x3C) +#define PM800_BUCK1_1 (0x3D) +#define PM800_BUCK1_2 (0x3E) +#define PM800_BUCK1_3 (0x3F) +#define PM800_BUCK2 (0x40) +#define PM800_BUCK3 (0x41) +#define PM800_BUCK4 (0x42) +#define PM800_BUCK4_1 (0x43) +#define PM800_BUCK4_2 (0x44) +#define PM800_BUCK4_3 (0x45) +#define PM800_BUCK5 (0x46) + +#define PM800_BUCK_ENA (0x50) +#define PM800_LDO_ENA1_1 (0x51) +#define PM800_LDO_ENA1_2 (0x52) +#define PM800_LDO_ENA1_3 (0x53) + +#define PM800_LDO_ENA2_1 (0x56) +#define PM800_LDO_ENA2_2 (0x57) +#define PM800_LDO_ENA2_3 (0x58) + +#define PM800_BUCK1_MISC1 (0x78) +#define PM800_BUCK3_MISC1 (0x7E) +#define PM800_BUCK4_MISC1 (0x81) +#define PM800_BUCK5_MISC1 (0x84) + +struct pm800_regulator_info { + struct regulator_desc desc; + int max_ua; +}; + +/* + * vreg - the buck regs string. + * ereg - the string for the enable register. + * ebit - the bit number in the enable register. + * amax - the current + * Buck has 2 kinds of voltage steps. It is easy to find voltage by ranges, + * not the constant voltage table. + * n_volt - Number of available selectors + */ +#define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \ +{ \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(#match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pm800_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PM800_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = n_volt, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = PM800_##vreg, \ + .vsel_mask = 0x7f, \ + .enable_reg = PM800_##ereg, \ + .enable_mask = 1 << (ebit), \ + }, \ + .max_ua = (amax), \ +} + +/* + * vreg - the LDO regs string + * ereg - the string for the enable register. + * ebit - the bit number in the enable register. + * amax - the current + * volt_table - the LDO voltage table + * For all the LDOes, there are too many ranges. Using volt_table will be + * simpler and faster. + */ +#define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \ +{ \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(#match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pm800_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PM800_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .vsel_reg = PM800_##vreg##_VOUT, \ + .vsel_mask = 0xf, \ + .enable_reg = PM800_##ereg, \ + .enable_mask = 1 << (ebit), \ + .volt_table = ldo_volt_table, \ + }, \ + .max_ua = (amax), \ +} + +/* Ranges are sorted in ascending order. */ +static const struct linear_range buck1_volt_range[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500), + REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x54, 50000), +}; + +/* BUCK 2~5 have same ranges. */ +static const struct linear_range buck2_5_volt_range[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500), + REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x72, 50000), +}; + +static const unsigned int ldo1_volt_table[] = { + 600000, 650000, 700000, 750000, 800000, 850000, 900000, 950000, + 1000000, 1050000, 1100000, 1150000, 1200000, 1300000, 1400000, 1500000, +}; + +static const unsigned int ldo2_volt_table[] = { + 1700000, 1800000, 1900000, 2000000, 2100000, 2500000, 2700000, 2800000, +}; + +/* LDO 3~17 have same voltage table. */ +static const unsigned int ldo3_17_volt_table[] = { + 1200000, 1250000, 1700000, 1800000, 1850000, 1900000, 2500000, 2600000, + 2700000, 2750000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000, +}; + +/* LDO 18~19 have same voltage table. */ +static const unsigned int ldo18_19_volt_table[] = { + 1700000, 1800000, 1900000, 2500000, 2800000, 2900000, 3100000, 3300000, +}; + +static int pm800_get_current_limit(struct regulator_dev *rdev) +{ + struct pm800_regulator_info *info = rdev_get_drvdata(rdev); + + return info->max_ua; +} + +static const struct regulator_ops pm800_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_current_limit = pm800_get_current_limit, +}; + +static const struct regulator_ops pm800_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_current_limit = pm800_get_current_limit, +}; + +/* The array is indexed by id(PM800_ID_XXX) */ +static struct pm800_regulator_info pm800_regulator_info[] = { + PM800_BUCK(buck1, BUCK1, BUCK_ENA, 0, 3000000, buck1_volt_range, 0x55), + PM800_BUCK(buck2, BUCK2, BUCK_ENA, 1, 1200000, buck2_5_volt_range, 0x73), + PM800_BUCK(buck3, BUCK3, BUCK_ENA, 2, 1200000, buck2_5_volt_range, 0x73), + PM800_BUCK(buck4, BUCK4, BUCK_ENA, 3, 1200000, buck2_5_volt_range, 0x73), + PM800_BUCK(buck5, BUCK5, BUCK_ENA, 4, 1200000, buck2_5_volt_range, 0x73), + + PM800_LDO(ldo1, LDO1, LDO_ENA1_1, 0, 200000, ldo1_volt_table), + PM800_LDO(ldo2, LDO2, LDO_ENA1_1, 1, 10000, ldo2_volt_table), + PM800_LDO(ldo3, LDO3, LDO_ENA1_1, 2, 300000, ldo3_17_volt_table), + PM800_LDO(ldo4, LDO4, LDO_ENA1_1, 3, 300000, ldo3_17_volt_table), + PM800_LDO(ldo5, LDO5, LDO_ENA1_1, 4, 300000, ldo3_17_volt_table), + PM800_LDO(ldo6, LDO6, LDO_ENA1_1, 5, 300000, ldo3_17_volt_table), + PM800_LDO(ldo7, LDO7, LDO_ENA1_1, 6, 300000, ldo3_17_volt_table), + PM800_LDO(ldo8, LDO8, LDO_ENA1_1, 7, 300000, ldo3_17_volt_table), + PM800_LDO(ldo9, LDO9, LDO_ENA1_2, 0, 300000, ldo3_17_volt_table), + PM800_LDO(ldo10, LDO10, LDO_ENA1_2, 1, 300000, ldo3_17_volt_table), + PM800_LDO(ldo11, LDO11, LDO_ENA1_2, 2, 300000, ldo3_17_volt_table), + PM800_LDO(ldo12, LDO12, LDO_ENA1_2, 3, 300000, ldo3_17_volt_table), + PM800_LDO(ldo13, LDO13, LDO_ENA1_2, 4, 300000, ldo3_17_volt_table), + PM800_LDO(ldo14, LDO14, LDO_ENA1_2, 5, 300000, ldo3_17_volt_table), + PM800_LDO(ldo15, LDO15, LDO_ENA1_2, 6, 300000, ldo3_17_volt_table), + PM800_LDO(ldo16, LDO16, LDO_ENA1_2, 7, 300000, ldo3_17_volt_table), + PM800_LDO(ldo17, LDO17, LDO_ENA1_3, 0, 300000, ldo3_17_volt_table), + PM800_LDO(ldo18, LDO18, LDO_ENA1_3, 1, 200000, ldo18_19_volt_table), + PM800_LDO(ldo19, LDO19, LDO_ENA1_3, 2, 200000, ldo18_19_volt_table), +}; + +static int pm800_regulator_probe(struct platform_device *pdev) +{ + struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct pm80x_platform_data *pdata = dev_get_platdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_init_data *init_data; + int i, ret; + + if (pdata && pdata->num_regulators) { + unsigned int count = 0; + + /* Check whether num_regulator is valid. */ + for (i = 0; i < ARRAY_SIZE(pdata->regulators); i++) { + if (pdata->regulators[i]) + count++; + } + if (count != pdata->num_regulators) + return -EINVAL; + } + + config.dev = chip->dev; + config.regmap = chip->subchip->regmap_power; + for (i = 0; i < PM800_ID_RG_MAX; i++) { + struct regulator_dev *regulator; + + if (pdata && pdata->num_regulators) { + init_data = pdata->regulators[i]; + if (!init_data) + continue; + + config.init_data = init_data; + } + + config.driver_data = &pm800_regulator_info[i]; + + regulator = devm_regulator_register(&pdev->dev, + &pm800_regulator_info[i].desc, &config); + if (IS_ERR(regulator)) { + ret = PTR_ERR(regulator); + dev_err(&pdev->dev, "Failed to register %s\n", + pm800_regulator_info[i].desc.name); + return ret; + } + } + + return 0; +} + +static struct platform_driver pm800_regulator_driver = { + .driver = { + .name = "88pm80x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = pm800_regulator_probe, +}; + +module_platform_driver(pm800_regulator_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Joseph(Yossi) Hanin "); +MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM800 PMIC"); +MODULE_ALIAS("platform:88pm800-regulator"); diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c new file mode 100644 index 000000000..969554725 --- /dev/null +++ b/drivers/regulator/88pm8607.c @@ -0,0 +1,405 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulators driver for Marvell 88PM8607 + * + * Copyright (C) 2009 Marvell International Ltd. + * Haojian Zhuang + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct pm8607_regulator_info { + struct regulator_desc desc; + + unsigned int *vol_suspend; + + int slope_double; +}; + +static const unsigned int BUCK1_table[] = { + 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000, + 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, + 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, + 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, + 0, 25000, 50000, 75000, 100000, 125000, 150000, 175000, + 200000, 225000, 250000, 275000, 300000, 325000, 350000, 375000, + 400000, 425000, 450000, 475000, 500000, 525000, 550000, 575000, + 600000, 625000, 650000, 675000, 700000, 725000, 750000, 775000, +}; + +static const unsigned int BUCK1_suspend_table[] = { + 0, 25000, 50000, 75000, 100000, 125000, 150000, 175000, + 200000, 225000, 250000, 275000, 300000, 325000, 350000, 375000, + 400000, 425000, 450000, 475000, 500000, 525000, 550000, 575000, + 600000, 625000, 650000, 675000, 700000, 725000, 750000, 775000, + 800000, 825000, 850000, 875000, 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000, +}; + +static const unsigned int BUCK2_table[] = { + 0, 50000, 100000, 150000, 200000, 250000, 300000, 350000, + 400000, 450000, 500000, 550000, 600000, 650000, 700000, 750000, + 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000, + 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000, + 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 1950000, + 2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000, 2350000, + 2400000, 2450000, 2500000, 2550000, 2600000, 2650000, 2700000, 2750000, + 2800000, 2850000, 2900000, 2950000, 3000000, 3000000, 3000000, 3000000, +}; + +static const unsigned int BUCK2_suspend_table[] = { + 0, 50000, 100000, 150000, 200000, 250000, 300000, 350000, + 400000, 450000, 500000, 550000, 600000, 650000, 700000, 750000, + 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000, + 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000, + 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 1950000, + 2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000, 2350000, + 2400000, 2450000, 2500000, 2550000, 2600000, 2650000, 2700000, 2750000, + 2800000, 2850000, 2900000, 2950000, 3000000, 3000000, 3000000, 3000000, +}; + +static const unsigned int BUCK3_table[] = { + 0, 25000, 50000, 75000, 100000, 125000, 150000, 175000, + 200000, 225000, 250000, 275000, 300000, 325000, 350000, 375000, + 400000, 425000, 450000, 475000, 500000, 525000, 550000, 575000, + 600000, 625000, 650000, 675000, 700000, 725000, 750000, 775000, + 800000, 825000, 850000, 875000, 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000, +}; + +static const unsigned int BUCK3_suspend_table[] = { + 0, 25000, 50000, 75000, 100000, 125000, 150000, 175000, + 200000, 225000, 250000, 275000, 300000, 325000, 350000, 375000, + 400000, 425000, 450000, 475000, 500000, 525000, 550000, 575000, + 600000, 625000, 650000, 675000, 700000, 725000, 750000, 775000, + 800000, 825000, 850000, 875000, 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, 1500000, 1500000, 1500000, 1500000, +}; + +static const unsigned int LDO1_table[] = { + 1800000, 1200000, 2800000, 0, +}; + +static const unsigned int LDO1_suspend_table[] = { + 1800000, 1200000, 0, 0, +}; + +static const unsigned int LDO2_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000, +}; + +static const unsigned int LDO2_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO3_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000, +}; + +static const unsigned int LDO3_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO4_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2900000, 3300000, +}; + +static const unsigned int LDO4_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2900000, 2900000, +}; + +static const unsigned int LDO5_table[] = { + 2900000, 3000000, 3100000, 3300000, +}; + +static const unsigned int LDO5_suspend_table[] = { + 2900000, 0, 0, 0, +}; + +static const unsigned int LDO6_table[] = { + 1800000, 1850000, 2600000, 2650000, 2700000, 2750000, 2800000, 3300000, +}; + +static const unsigned int LDO6_suspend_table[] = { + 1800000, 1850000, 2600000, 2650000, 2700000, 2750000, 2800000, 2900000, +}; + +static const unsigned int LDO7_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO7_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO8_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO8_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO9_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000, +}; + +static const unsigned int LDO9_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, +}; + +static const unsigned int LDO10_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 3300000, + 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, +}; + +static const unsigned int LDO10_suspend_table[] = { + 1800000, 1850000, 1900000, 2700000, 2750000, 2800000, 2850000, 2900000, + 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, +}; + +static const unsigned int LDO12_table[] = { + 1800000, 1900000, 2700000, 2800000, 2900000, 3000000, 3100000, 3300000, + 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, +}; + +static const unsigned int LDO12_suspend_table[] = { + 1800000, 1900000, 2700000, 2800000, 2900000, 2900000, 2900000, 2900000, + 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, 1200000, +}; + +static const unsigned int LDO13_table[] = { + 1200000, 1300000, 1800000, 2000000, 2500000, 2800000, 3000000, 0, +}; + +static const unsigned int LDO13_suspend_table[] = { + 0, +}; + +static const unsigned int LDO14_table[] = { + 1800000, 1850000, 2700000, 2750000, 2800000, 2850000, 2900000, 3300000, +}; + +static const unsigned int LDO14_suspend_table[] = { + 1800000, 1850000, 2700000, 2750000, 2800000, 2850000, 2900000, 2900000, +}; + +static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index) +{ + struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_list_voltage_table(rdev, index); + if (ret < 0) + return ret; + + if (info->slope_double) + ret <<= 1; + + return ret; +} + +static const struct regulator_ops pm8607_regulator_ops = { + .list_voltage = pm8607_list_voltage, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops pm8606_preg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define PM8606_PREG(ereg, ebit) \ +{ \ + .desc = { \ + .name = "PREG", \ + .of_match = of_match_ptr("PREG"), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pm8606_preg_ops, \ + .type = REGULATOR_CURRENT, \ + .id = PM8606_ID_PREG, \ + .owner = THIS_MODULE, \ + .enable_reg = PM8606_##ereg, \ + .enable_mask = (ebit), \ + .enable_is_inverted = true, \ + }, \ +} + +#define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ +{ \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(#vreg), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pm8607_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PM8607_ID_##vreg, \ + .owner = THIS_MODULE, \ + .volt_table = vreg##_table, \ + .n_voltages = ARRAY_SIZE(vreg##_table), \ + .vsel_reg = PM8607_##vreg, \ + .vsel_mask = ARRAY_SIZE(vreg##_table) - 1, \ + .apply_reg = PM8607_##ureg, \ + .apply_bit = (ubit), \ + .enable_reg = PM8607_##ereg, \ + .enable_mask = 1 << (ebit), \ + }, \ + .slope_double = (0), \ + .vol_suspend = (unsigned int *)&vreg##_suspend_table, \ +} + +#define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ +{ \ + .desc = { \ + .name = "LDO" #_id, \ + .of_match = of_match_ptr("LDO" #_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pm8607_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PM8607_ID_LDO##_id, \ + .owner = THIS_MODULE, \ + .volt_table = LDO##_id##_table, \ + .n_voltages = ARRAY_SIZE(LDO##_id##_table), \ + .vsel_reg = PM8607_##vreg, \ + .vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \ + .enable_reg = PM8607_##ereg, \ + .enable_mask = 1 << (ebit), \ + }, \ + .slope_double = (0), \ + .vol_suspend = (unsigned int *)&LDO##_id##_suspend_table, \ +} + +static struct pm8607_regulator_info pm8607_regulator_info[] = { + PM8607_DVC(BUCK1, GO, BIT(0), SUPPLIES_EN11, 0), + PM8607_DVC(BUCK2, GO, BIT(1), SUPPLIES_EN11, 1), + PM8607_DVC(BUCK3, GO, BIT(2), SUPPLIES_EN11, 2), + + PM8607_LDO(1, LDO1, 0, SUPPLIES_EN11, 3), + PM8607_LDO(2, LDO2, 0, SUPPLIES_EN11, 4), + PM8607_LDO(3, LDO3, 0, SUPPLIES_EN11, 5), + PM8607_LDO(4, LDO4, 0, SUPPLIES_EN11, 6), + PM8607_LDO(5, LDO5, 0, SUPPLIES_EN11, 7), + PM8607_LDO(6, LDO6, 0, SUPPLIES_EN12, 0), + PM8607_LDO(7, LDO7, 0, SUPPLIES_EN12, 1), + PM8607_LDO(8, LDO8, 0, SUPPLIES_EN12, 2), + PM8607_LDO(9, LDO9, 0, SUPPLIES_EN12, 3), + PM8607_LDO(10, LDO10, 0, SUPPLIES_EN12, 4), + PM8607_LDO(12, LDO12, 0, SUPPLIES_EN12, 5), + PM8607_LDO(13, VIBRATOR_SET, 1, VIBRATOR_SET, 0), + PM8607_LDO(14, LDO14, 0, SUPPLIES_EN12, 6), +}; + +static struct pm8607_regulator_info pm8606_regulator_info[] = { + PM8606_PREG(PREREGULATORB, 5), +}; + +static int pm8607_regulator_probe(struct platform_device *pdev) +{ + struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct pm8607_regulator_info *info = NULL; + struct regulator_init_data *pdata = dev_get_platdata(&pdev->dev); + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct resource *res; + int i; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res) { + /* There're resources in 88PM8607 regulator driver */ + for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) { + info = &pm8607_regulator_info[i]; + if (info->desc.vsel_reg == res->start) + break; + } + if (i == ARRAY_SIZE(pm8607_regulator_info)) { + dev_err(&pdev->dev, "Failed to find regulator %llu\n", + (unsigned long long)res->start); + return -EINVAL; + } + } else { + /* There's no resource in 88PM8606 PREG regulator driver */ + info = &pm8606_regulator_info[0]; + /* i is used to check regulator ID */ + i = -1; + } + + /* check DVC ramp slope double */ + if ((i == PM8607_ID_BUCK3) && chip->buck3_double) + info->slope_double = 1; + + config.dev = chip->dev; + config.driver_data = info; + + if (pdata) + config.init_data = pdata; + + if (chip->id == CHIP_PM8607) + config.regmap = chip->regmap; + else + config.regmap = chip->regmap_companion; + + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + + platform_set_drvdata(pdev, info); + return 0; +} + +static const struct platform_device_id pm8607_regulator_driver_ids[] = { + { + .name = "88pm860x-regulator", + }, { + .name = "88pm860x-preg", + }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm8607_regulator_driver_ids); + +static struct platform_driver pm8607_regulator_driver = { + .driver = { + .name = "88pm860x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = pm8607_regulator_probe, + .id_table = pm8607_regulator_driver_ids, +}; + +static int __init pm8607_regulator_init(void) +{ + return platform_driver_register(&pm8607_regulator_driver); +} +subsys_initcall(pm8607_regulator_init); + +static void __exit pm8607_regulator_exit(void) +{ + platform_driver_unregister(&pm8607_regulator_driver); +} +module_exit(pm8607_regulator_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Haojian Zhuang "); +MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC"); +MODULE_ALIAS("platform:88pm8607-regulator"); diff --git a/drivers/regulator/88pm886-regulator.c b/drivers/regulator/88pm886-regulator.c new file mode 100644 index 000000000..7328cd1cf --- /dev/null +++ b/drivers/regulator/88pm886-regulator.c @@ -0,0 +1,392 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include + +#include + +static const struct regmap_config pm886_regulator_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PM886_REG_BUCK5_VOUT, +}; + +static const struct regulator_ops pm886_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops pm886_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const unsigned int pm886_ldo_volt_table1[] = { + 1700000, 1800000, 1900000, 2500000, 2800000, 2900000, 3100000, 3300000, +}; + +static const unsigned int pm886_ldo_volt_table2[] = { + 1200000, 1250000, 1700000, 1800000, 1850000, 1900000, 2500000, 2600000, + 2700000, 2750000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000, +}; + +static const unsigned int pm886_ldo_volt_table3[] = { + 1700000, 1800000, 1900000, 2000000, 2100000, 2500000, 2700000, 2800000, +}; + +static const struct linear_range pm886_buck_volt_ranges1[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 79, 12500), + REGULATOR_LINEAR_RANGE(1600000, 80, 84, 50000), +}; + +static const struct linear_range pm886_buck_volt_ranges2[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 79, 12500), + REGULATOR_LINEAR_RANGE(1600000, 80, 114, 50000), +}; + +static struct regulator_desc pm886_regulators[] = { + { + .name = "LDO1", + .regulators_node = "regulators", + .of_match = "ldo1", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(0), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO1_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO2", + .regulators_node = "regulators", + .of_match = "ldo2", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(1), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO2_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO3", + .regulators_node = "regulators", + .of_match = "ldo3", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(2), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO3_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO4", + .regulators_node = "regulators", + .of_match = "ldo4", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(3), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO4_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO5", + .regulators_node = "regulators", + .of_match = "ldo5", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(4), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO5_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO6", + .regulators_node = "regulators", + .of_match = "ldo6", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(5), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO6_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO7", + .regulators_node = "regulators", + .of_match = "ldo7", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(6), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO7_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO8", + .regulators_node = "regulators", + .of_match = "ldo8", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(7), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO8_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO9", + .regulators_node = "regulators", + .of_match = "ldo9", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(0), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO9_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO10", + .regulators_node = "regulators", + .of_match = "ldo10", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(1), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO10_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO11", + .regulators_node = "regulators", + .of_match = "ldo11", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(2), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO11_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO12", + .regulators_node = "regulators", + .of_match = "ldo12", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(3), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO12_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO13", + .regulators_node = "regulators", + .of_match = "ldo13", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(4), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO13_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO14", + .regulators_node = "regulators", + .of_match = "ldo14", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(5), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO14_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO15", + .regulators_node = "regulators", + .of_match = "ldo15", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(6), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO15_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO16", + .regulators_node = "regulators", + .of_match = "ldo16", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(7), + .volt_table = pm886_ldo_volt_table3, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table3), + .vsel_reg = PM886_REG_LDO16_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "buck1", + .regulators_node = "regulators", + .of_match = "buck1", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 85, + .linear_ranges = pm886_buck_volt_ranges1, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges1), + .vsel_reg = PM886_REG_BUCK1_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(0), + }, + { + .name = "buck2", + .regulators_node = "regulators", + .of_match = "buck2", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK2_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(1), + }, + { + .name = "buck3", + .regulators_node = "regulators", + .of_match = "buck3", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK3_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(2), + }, + { + .name = "buck4", + .regulators_node = "regulators", + .of_match = "buck4", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK4_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(3), + }, + { + .name = "buck5", + .regulators_node = "regulators", + .of_match = "buck5", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK5_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(4), + }, +}; + +static int pm886_regulator_probe(struct platform_device *pdev) +{ + struct pm886_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct regulator_config rcfg = { }; + struct device *dev = &pdev->dev; + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + struct i2c_client *page; + struct regmap *regmap; + + page = devm_i2c_new_dummy_device(dev, chip->client->adapter, + chip->client->addr + PM886_PAGE_OFFSET_REGULATORS); + if (IS_ERR(page)) + return dev_err_probe(dev, PTR_ERR(page), + "Failed to initialize regulators client\n"); + + regmap = devm_regmap_init_i2c(page, &pm886_regulator_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to initialize regulators regmap\n"); + rcfg.regmap = regmap; + + rcfg.dev = dev->parent; + + for (int i = 0; i < ARRAY_SIZE(pm886_regulators); i++) { + rdesc = &pm886_regulators[i]; + rdev = devm_regulator_register(dev, rdesc, &rcfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register %s\n", rdesc->name); + } + + return 0; +} + +static const struct platform_device_id pm886_regulator_id_table[] = { + { .name = "88pm886-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm886_regulator_id_table); + +static struct platform_driver pm886_regulator_driver = { + .driver = { + .name = "88pm886-regulator", + }, + .probe = pm886_regulator_probe, + .id_table = pm886_regulator_id_table, +}; +module_platform_driver(pm886_regulator_driver); + +MODULE_DESCRIPTION("Marvell 88PM886 PMIC regulator driver"); +MODULE_AUTHOR("Karel Balej "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig new file mode 100644 index 000000000..89789ac7a --- /dev/null +++ b/drivers/regulator/Kconfig @@ -0,0 +1,1899 @@ +# SPDX-License-Identifier: GPL-2.0-only +menuconfig REGULATOR + bool "Voltage and Current Regulator Support" + select LINEAR_RANGES + help + Generic Voltage and Current Regulator support. + + This framework is designed to provide a generic interface to voltage + and current regulators within the Linux kernel. It's intended to + provide voltage and current control to client or consumer drivers and + also provide status information to user space applications through a + sysfs interface. + + The intention is to allow systems to dynamically control regulator + output in order to save power and prolong battery life. This applies + to both voltage regulators (where voltage output is controllable) and + current sinks (where current output is controllable). + + This framework safely compiles out if not selected so that client + drivers can still be used in systems with no software controllable + regulators. + + If unsure, say no. + + +if REGULATOR + +config REGULATOR_DEBUG + bool "Regulator debug support" + help + Say yes here to enable debugging support. + +config REGULATOR_FIXED_VOLTAGE + tristate "Fixed voltage regulator support" + help + This driver provides support for fixed voltage regulators, + useful for systems which use a combination of software + managed regulators and simple non-configurable regulators. + +config REGULATOR_VIRTUAL_CONSUMER + tristate "Virtual regulator consumer support" + help + This driver provides a virtual consumer for the voltage and + current regulator API which provides sysfs controls for + configuring the supplies requested. This is mainly useful + for test purposes. + + If unsure, say no. + +config REGULATOR_USERSPACE_CONSUMER + tristate "Userspace regulator consumer support" + help + There are some classes of devices that are controlled entirely + from user space. Userspace consumer driver provides ability to + control power supplies for such devices. + + If unsure, say no. + +config REGULATOR_NETLINK_EVENTS + bool "Enable support for receiving regulator events via netlink" + depends on NET + help + Enabling this option allows the kernel to broadcast regulator events using + the netlink mechanism. User-space applications can subscribe to these events + for real-time updates on various regulator events. + + If unsure, say no. + +config REGULATOR_88PG86X + tristate "Marvell 88PG86X voltage regulators" + depends on I2C + select REGMAP_I2C + help + This driver supports Marvell 88PG867 and 88PG868 voltage regulators. + They provide two I2C-controlled DC/DC step-down converters with + sleep mode and separate enable pins. + +config REGULATOR_88PM800 + tristate "Marvell 88PM800 Power regulators" + depends on MFD_88PM800 + help + This driver supports Marvell 88PM800 voltage regulator chips. + It delivers digitally programmable output, + the voltage is programmed via I2C interface. + It's suitable to support PXA988 chips to control VCC_MAIN and + various voltages. + +config REGULATOR_88PM8607 + tristate "Marvell 88PM8607 Power regulators" + depends on MFD_88PM860X=y + help + This driver supports 88PM8607 voltage regulator chips. + +config REGULATOR_88PM886 + tristate "Marvell 88PM886 voltage regulators" + depends on MFD_88PM886_PMIC + help + This driver implements support for Marvell 88PM886 voltage regulators. + +config REGULATOR_ACT8865 + tristate "Active-semi act8865 voltage regulator" + depends on I2C + depends on POWER_SUPPLY + select REGMAP_I2C + help + This driver controls a active-semi act8865 voltage output + regulator via I2C bus. + +config REGULATOR_ACT8945A + tristate "Active-semi ACT8945A voltage regulator" + depends on MFD_ACT8945A + help + This driver controls a active-semi ACT8945A voltage regulator + via I2C bus. The ACT8945A features three step-down DC/DC converters + and four low-dropout linear regulators, along with a ActivePath + battery charger. + +config REGULATOR_AD5398 + tristate "Analog Devices AD5398/AD5821 regulators" + depends on I2C + help + This driver supports AD5398 and AD5821 current regulator chips. + If building into module, its name is ad5398.ko. + +config REGULATOR_ADP5055 + tristate "Analog Devices ADP5055 Triple Buck Regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls an Analog Devices ADP5055 with triple buck + regulators using an I2C interface. + + Say M here if you want to include support for the regulator as a + module. + +config REGULATOR_ANATOP + tristate "Freescale i.MX on-chip ANATOP LDO regulators" + depends on ARCH_MXC || COMPILE_TEST + depends on MFD_SYSCON + help + Say y here to support Freescale i.MX on-chip ANATOP LDOs + regulators. It is recommended that this option be + enabled on i.MX6 platform. + +config REGULATOR_AAT2870 + tristate "AnalogicTech AAT2870 Regulators" + depends on MFD_AAT2870_CORE + help + If you have a AnalogicTech AAT2870 say Y to enable the + regulator driver. + +config REGULATOR_AB8500 + bool "ST-Ericsson AB8500 Power Regulators" + depends on AB8500_CORE + help + This driver supports the regulators found on the ST-Ericsson mixed + signal AB8500 PMIC + +config REGULATOR_ARIZONA_LDO1 + tristate "Cirrus Madera and Wolfson Arizona class devices LDO1" + depends on MFD_ARIZONA || MFD_MADERA + depends on SND_SOC + help + Support for the LDO1 regulators found on Cirrus Logic Madera codecs + and Wolfson Microelectronic Arizona codecs. + +config REGULATOR_ARIZONA_MICSUPP + tristate "Cirrus Madera and Wolfson Arizona class devices MICSUPP" + depends on MFD_ARIZONA || MFD_MADERA + depends on SND_SOC + help + Support for the MICSUPP regulators found on Cirrus Logic Madera codecs + and Wolfson Microelectronic Arizona codecs + devices. + +config REGULATOR_ARM_SCMI + tristate "SCMI based regulator driver" + depends on ARM_SCMI_PROTOCOL && OF + help + This adds the regulator driver support for ARM platforms using SCMI + protocol for device voltage management. + This driver uses SCMI Message Protocol driver to interact with the + firmware providing the device Voltage functionality. + +config REGULATOR_AS3711 + tristate "AS3711 PMIC" + depends on MFD_AS3711 + help + This driver provides support for the voltage regulators on the + AS3711 PMIC + +config REGULATOR_AS3722 + tristate "AMS AS3722 PMIC Regulators" + depends on MFD_AS3722 + help + This driver provides support for the voltage regulators on the + AS3722 PMIC. This will enable support for all the software + controllable DCDC/LDO regulators. + +config REGULATOR_ATC260X + tristate "Actions Semi ATC260x PMIC Regulators" + depends on MFD_ATC260X + help + This driver provides support for the voltage regulators on the + ATC260x PMICs. This will enable support for all the software + controllable DCDC/LDO regulators. + +config REGULATOR_AW37503 + tristate "Awinic AW37503 Dual Output Power regulators" + depends on I2C && GPIOLIB + select REGMAP_I2C + help + This driver supports AW37503 single inductor - dual output + power supply specifically designed for display panels. + +config REGULATOR_AXP20X + tristate "X-POWERS AXP20X PMIC Regulators" + depends on MFD_AXP20X + help + This driver provides support for the voltage regulators on the + AXP20X PMIC. + +config REGULATOR_BCM590XX + tristate "Broadcom BCM590xx PMU Regulators" + depends on MFD_BCM590XX + help + This driver provides support for the voltage regulators on the + BCM590xx PMUs. This will enable support for the software + controllable LDO/Switching regulators. + +config REGULATOR_BD71815 + tristate "ROHM BD71815 Power Regulator" + depends on MFD_ROHM_BD71828 + select REGULATOR_ROHM + help + This driver supports voltage regulators on ROHM BD71815 PMIC. + This will enable support for the software controllable buck + and LDO regulators and a current regulator for LEDs. + + This driver can also be built as a module. If so, the module + will be called bd71815-regulator. + +config REGULATOR_BD71828 + tristate "ROHM BD71828, BD72720 and BD73900 Power Regulators" + depends on MFD_ROHM_BD71828 + select REGULATOR_ROHM + help + This driver supports voltage regulators on ROHM BD71828, + BD71879, BD72720 and BD73900 PMICs. This will enable + support for the software controllable buck and LDO regulators. + + This driver can also be built as a module. If so, the module + will be called bd71828-regulator. + +config REGULATOR_BD718XX + tristate "ROHM BD71837 Power Regulator" + depends on MFD_ROHM_BD718XX + select REGULATOR_ROHM + help + This driver supports voltage regulators on ROHM BD71837 PMIC. + This will enable support for the software controllable buck + and LDO regulators. + + This driver can also be built as a module. If so, the module + will be called bd718x7-regulator. + +config REGULATOR_BD9571MWV + tristate "ROHM BD9571MWV Regulators" + depends on MFD_BD9571MWV + help + This driver provides support for the voltage regulators on the + ROHM BD9571MWV PMIC. This will enable support for the software + controllable regulator and voltage sampling units. + + This driver can also be built as a module. If so, the module + will be called bd9571mwv-regulator. + +config REGULATOR_BD957XMUF + tristate "ROHM BD9576MUF and BD9573MUF Regulators" + depends on MFD_ROHM_BD957XMUF + help + This driver supports voltage regulators on ROHM BD9576MUF and + BD9573MUF PMICs. + + This driver can also be built as a module. If so, the module + will be called bd9576-regulator. + +config REGULATOR_BD96801 + tristate "ROHM BD96801 Power Regulator" + depends on MFD_ROHM_BD96801 + select REGULATOR_ROHM + help + This driver supports voltage regulators on ROHM BD96801 PMIC. + This will enable support for the software controllable buck + and LDO regulators. + + This driver can also be built as a module. If so, the module + will be called bd96801-regulator. + +config REGULATOR_BQ257XX + tristate "TI BQ257XX regulator family" + depends on MFD_BQ257XX + depends on GPIOLIB || COMPILE_TEST + help + Say Y to enable support for the boost regulator function of + the BQ257XX family of charger circuits. + +config REGULATOR_CPCAP + tristate "Motorola CPCAP regulator" + depends on MFD_CPCAP + help + Say y here for CPCAP regulator found on some Motorola phones + and tablets such as Droid 4. + +config REGULATOR_CROS_EC + tristate "ChromeOS EC regulators" + depends on CROS_EC && OF + help + This driver supports voltage regulators that is connected to ChromeOS + EC and controlled through EC host commands. + + This driver can also be built as a module. If so, the module + will be called cros-ec-regulator. + +config REGULATOR_DA903X + tristate "Dialog Semiconductor DA9030/DA9034 regulators" + depends on PMIC_DA903X + depends on !CC_IS_CLANG # https://llvm.org/pr38789 + help + Say y here to support the BUCKs and LDOs regulators found on + Dialog Semiconductor DA9030/DA9034 PMIC. + +config REGULATOR_DA9052 + tristate "Dialog Semiconductor DA9052/DA9053 regulators" + depends on PMIC_DA9052 + help + This driver supports the voltage regulators of DA9052-BC and + DA9053-AA/Bx PMIC. + +config REGULATOR_DA9055 + tristate "Dialog Semiconductor DA9055 regulators" + depends on MFD_DA9055 + help + Say y here to support the BUCKs and LDOs regulators found on + Dialog Semiconductor DA9055 PMIC. + + This driver can also be built as a module. If so, the module + will be called da9055-regulator. + +config REGULATOR_DA9062 + tristate "Dialog Semiconductor DA9061/62 regulators" + depends on MFD_DA9062 + help + Say y here to support the BUCKs and LDOs regulators found on + DA9061 and DA9062 PMICs. + + This driver can also be built as a module. If so, the module + will be called da9062-regulator. + +config REGULATOR_DA9063 + tristate "Dialog Semiconductor DA9063 regulators" + depends on MFD_DA9063 && OF + help + Say y here to support the BUCKs and LDOs regulators found on + DA9063 PMICs. + + This driver can also be built as a module. If so, the module + will be called da9063-regulator. + +config REGULATOR_DA9121 + tristate "Dialog Semiconductor DA9121/DA9122/DA9220/DA9217/DA9130/DA9131/DA9132 regulator" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support for the Dialog Semiconductor DA9121. The + DA9121 is a single channel dual-phase buck converter controlled + through an I2C interface. + + DA9121 Single-channel dual-phase 10A buck converter + DA9130 Single-channel dual-phase 10A buck converter (Automotive) + DA9217 Single-channel dual-phase 6A buck converter + DA9122 Dual-channel single-phase 5A buck converter + DA9131 Dual-channel single-phase 5A buck converter (Automotive) + DA9220 Dual-channel single-phase 3A buck converter + DA9132 Dual-channel single-phase 3A buck converter (Automotive) + + This driver can also be built as a module. If so, the module + will be called da9121-regulator. + +config REGULATOR_DA9210 + tristate "Dialog Semiconductor DA9210 regulator" + depends on I2C + select REGMAP_I2C + help + Say y here to support for the Dialog Semiconductor DA9210. + The DA9210 is a multi-phase synchronous step down + converter 12A DC-DC Buck controlled through an I2C + interface. + +config REGULATOR_DA9211 + tristate "Dialog Semiconductor DA9211/DA9212/DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 regulator" + depends on I2C + select REGMAP_I2C + help + Say y here to support for the Dialog Semiconductor DA9211/DA9212 + /DA9213/DA9214/DA9215. + The DA9211/DA9212/DA9213/DA9214/DA9215 is a multi-phase synchronous + step down converter 12A or 16A DC-DC Buck controlled through an I2C + interface. + +config REGULATOR_DBX500_PRCMU + bool + +config REGULATOR_DB8500_PRCMU + bool "ST-Ericsson DB8500 Voltage Domain Regulators" + depends on MFD_DB8500_PRCMU + select REGULATOR_DBX500_PRCMU + help + This driver supports the voltage domain regulators controlled by the + DB8500 PRCMU + +config REGULATOR_FAN53555 + tristate "Fairchild FAN53555 Regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports Fairchild FAN53555 Digitally Programmable + TinyBuck Regulator. The FAN53555 is a step-down switching voltage + regulator that delivers a digitally programmable output from an + input voltage supply of 2.5V to 5.5V. The output voltage is + programmed through an I2C interface. + +config REGULATOR_FAN53880 + tristate "Fairchild FAN53880 Regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports Fairchild (ON Semiconductor) FAN53880 + regulator. The regulator is a programmable power management IC + (PMIC), it is controlled by I2C and provides one BUCK, one BOOST + and four LDO outputs. + +config REGULATOR_GPIO + tristate "GPIO regulator support" + depends on GPIOLIB || COMPILE_TEST + help + This driver provides support for regulators that can be + controlled via gpios. + It is capable of supporting current and voltage regulators + and the platform has to provide a mapping of GPIO-states + to target volts/amps. + +config REGULATOR_HI6421 + tristate "HiSilicon Hi6421 PMIC voltage regulator support" + depends on MFD_HI6421_PMIC && OF + help + This driver provides support for the voltage regulators on the + HiSilicon Hi6421 PMU / Codec IC. + Hi6421 is a multi-function device which, on regulator part, provides + 21 general purpose LDOs, 3 dedicated LDOs, and 5 BUCKs. All + of them come with support to either ECO (idle) or sleep mode. + +config REGULATOR_HI6421V530 + tristate "HiSilicon Hi6421v530 PMIC voltage regulator support" + depends on MFD_HI6421_PMIC && OF + help + This driver provides support for the voltage regulators on + HiSilicon Hi6421v530 PMU / Codec IC. + Hi6421v530 is a multi-function device which, on regulator part, + provides 5 general purpose LDOs, and all of them come with support + to either ECO (idle) or sleep mode. + +config REGULATOR_HI655X + tristate "Hisilicon HI655X PMIC regulators support" + depends on ARCH_HISI || COMPILE_TEST + depends on MFD_HI655X_PMIC && OF + help + This driver provides support for the voltage regulators of the + Hisilicon Hi655x PMIC device. + +config REGULATOR_HI6421V600 + tristate "HiSilicon Hi6421v600 PMIC voltage regulator support" + depends on MFD_HI6421_SPMI && OF + select REGMAP + help + This driver provides support for the voltage regulators on + HiSilicon Hi6421v600 PMU / Codec IC. + This is used on Kirin 3670 boards, like HiKey 970. + +config REGULATOR_ISL9305 + tristate "Intersil ISL9305 regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports ISL9305 voltage regulator chip. + +config REGULATOR_ISL6271A + tristate "Intersil ISL6271A Power regulator" + depends on I2C + help + This driver supports ISL6271A voltage regulator chip. + +config REGULATOR_FP9931 + tristate "FitiPower FP9931/JD9930 EPD regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports the FP9931/JD9930 voltage regulator chip + which is used to provide power to Electronic Paper Displays + so it is found in E-Book readers. + If HWMON is enabled, it also provides temperature measurement. + +config REGULATOR_LM363X + tristate "TI LM363X voltage regulators" + depends on MFD_TI_LMU + help + This driver supports LM3631, LM3632 and LM36274 voltage regulators for + the LCD bias. + One boost output voltage is configurable and always on. + Other LDOs are used for the display module. + +config REGULATOR_LOCHNAGAR + tristate "Cirrus Logic Lochnagar regulator driver" + depends on MFD_LOCHNAGAR + help + This enables regulator support on the Cirrus Logic Lochnagar audio + development board. + +config REGULATOR_LP3971 + tristate "National Semiconductors LP3971 PMIC regulator driver" + depends on I2C + help + Say Y here to support the voltage regulators and convertors + on National Semiconductors LP3971 PMIC + +config REGULATOR_LP3972 + tristate "National Semiconductors LP3972 PMIC regulator driver" + depends on I2C + help + Say Y here to support the voltage regulators and convertors + on National Semiconductors LP3972 PMIC + +config REGULATOR_LP872X + tristate "TI/National Semiconductor LP8720/LP8725 voltage regulators" + depends on I2C + select REGMAP_I2C + help + This driver supports LP8720/LP8725 PMIC + +config REGULATOR_LP873X + tristate "TI LP873X Power regulators" + depends on MFD_TI_LP873X && OF + help + This driver supports LP873X voltage regulator chips. LP873X + provides two step-down converters and two general-purpose LDO + voltage regulators. It supports software based voltage control + for different voltage domains + +config REGULATOR_LP8755 + tristate "TI LP8755 High Performance PMU driver" + depends on I2C + select REGMAP_I2C + help + This driver supports LP8755 High Performance PMU driver. This + chip contains six step-down DC/DC converters which can support + 9 mode multiphase configuration. + +config REGULATOR_LP87565 + tristate "TI LP87565 Power regulators" + depends on MFD_TI_LP87565 && OF + help + This driver supports LP87565 voltage regulator chips. LP87565 + provides four step-down converters. It supports software based + voltage control for different voltage domains + +config REGULATOR_LP8788 + tristate "TI LP8788 Power Regulators" + depends on MFD_LP8788 + help + This driver supports LP8788 voltage regulator chip. + +config REGULATOR_LTC3589 + tristate "LTC3589 8-output voltage regulator" + depends on I2C + select REGMAP_I2C + help + This enables support for the LTC3589, LTC3589-1, and LTC3589-2 + 8-output regulators controlled via I2C. + +config REGULATOR_LTC3676 + tristate "LTC3676 8-output voltage regulator" + depends on I2C + select REGMAP_I2C + help + This enables support for the LTC3676 + 8-output regulators controlled via I2C. + +config REGULATOR_MAX14577 + tristate "Maxim 14577/77836 regulator" + depends on MFD_MAX14577 + help + This driver controls a Maxim MAX14577/77836 regulator via I2C bus. + The MAX14577 regulators include safeout LDO and charger current + regulator. The MAX77836 has two additional LDOs. + +config REGULATOR_MAX1586 + tristate "Maxim 1586/1587 voltage regulator" + depends on I2C + help + This driver controls a Maxim 1586 or 1587 voltage output + regulator via I2C bus. The provided regulator is suitable + for PXA27x chips to control VCC_CORE and VCC_USIM voltages. + +config REGULATOR_MAX5970 + tristate "Maxim 5970/5978 power switch and monitor" + depends on I2C + depends on OF + depends on MFD_MAX5970 + help + This driver controls a Maxim 5970/5978 switch via I2C bus. + The MAX5970/5978 is a smart switch with no output regulation, but + fault protection and voltage and current monitoring capabilities. + +config REGULATOR_MAX77503 + tristate "Analog Devices MAX77503 Regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls a Analog Devices MAX77503 14V input, 1.5A + high-efficiency buck converter via I2C bus. + Say M here if you want to include support for the regulator as a + module. + +config REGULATOR_MAX77541 + tristate "Analog Devices MAX77541/77540 Regulator" + depends on MFD_MAX77541 + help + This driver controls a Analog Devices MAX77541/77540 regulators + via I2C bus. Both MAX77540 and MAX77541 are dual-phase + high-efficiency buck converter. Say Y here to + enable the regulator driver. + Say M here if you want to include support for the regulator as a + module. + +config REGULATOR_MAX77620 + tristate "Maxim 77620/MAX20024 voltage regulator" + depends on MFD_MAX77620 || COMPILE_TEST + help + This driver controls Maxim MAX77620 voltage output regulator + via I2C bus. The provided regulator is suitable for Tegra + chip to control Step-Down DC-DC and LDOs. Say Y here to + enable the regulator driver. + +config REGULATOR_MAX77650 + tristate "Maxim MAX77650/77651 regulator support" + depends on MFD_MAX77650 || COMPILE_TEST + help + Regulator driver for MAX77650/77651 PMIC from Maxim + Semiconductor. This device has a SIMO with three independent + power rails and an LDO. + +config REGULATOR_MAX77675 + tristate "Maxim MAX77675 regulator driver" + depends on I2C && OF + select REGMAP_I2C + help + This driver controls the Maxim MAX77675 power regulator via I2C. + It supports four programmable buck-boost outputs. + Say Y here to enable the regulator driver + +config REGULATOR_MAX77857 + tristate "ADI MAX77857/MAX77831 regulator support" + depends on I2C + select REGMAP_I2C + help + This driver controls a ADI MAX77857 and MAX77831 regulators. + via I2C bus. MAX77857 and MAX77831 are high efficiency buck-boost + converters with input voltage range (2.5V to 16V). Say Y here to + enable the regulator driver + +config REGULATOR_MAX8649 + tristate "Maxim 8649 voltage regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls a Maxim 8649 voltage output regulator via + I2C bus. + +config REGULATOR_MAX8660 + tristate "Maxim 8660/8661 voltage regulator" + depends on I2C + help + This driver controls a Maxim 8660/8661 voltage output + regulator via I2C bus. + +config REGULATOR_MAX8893 + tristate "Maxim 8893 voltage regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls a Maxim 8893 voltage output + regulator via I2C bus. + +config REGULATOR_MAX8907 + tristate "Maxim 8907 voltage regulator" + depends on MFD_MAX8907 || COMPILE_TEST + help + This driver controls a Maxim 8907 voltage output regulator + via I2C bus. The provided regulator is suitable for Tegra + chip to control Step-Down DC-DC and LDOs. + +config REGULATOR_MAX8925 + tristate "Maxim MAX8925 Power Management IC" + depends on MFD_MAX8925 + help + Say y here to support the voltage regulator of Maxim MAX8925 PMIC. + +config REGULATOR_MAX8952 + tristate "Maxim MAX8952 Power Management IC" + depends on I2C + help + This driver controls a Maxim 8952 voltage output regulator + via I2C bus. Maxim 8952 has one voltage output and supports 4 DVS + modes ranging from 0.77V to 1.40V by 0.01V steps. + +config REGULATOR_MAX8973 + tristate "Maxim MAX8973A voltage regulator" + depends on I2C + depends on THERMAL && THERMAL_OF + select REGMAP_I2C + help + The MAXIM MAX8973A high-efficiency. three phase, DC-DC step-down + switching regulator delivers up to 9A of output current. Each + phase operates at a 2MHz fixed frequency with a 120 deg shift + from the adjacent phase, allowing the use of small magnetic component. + +config REGULATOR_MAX8997 + tristate "Maxim 8997/8966 regulator" + depends on MFD_MAX8997 + help + This driver controls a Maxim 8997/8966 regulator + via I2C bus. The provided regulator is suitable for S5PC110, + S5PV210, and Exynos-4 chips to control VCC_CORE and + VCC_USIM voltages. + +config REGULATOR_MAX8998 + tristate "Maxim 8998 voltage regulator" + depends on MFD_MAX8998 + help + This driver controls a Maxim 8998 voltage output regulator + via I2C bus. The provided regulator is suitable for S3C6410 + and S5PC1XX chips to control VCC_CORE and VCC_USIM voltages. + +config REGULATOR_MAX20086 + tristate "Maxim MAX20086-MAX20089 Camera Power Protectors" + depends on I2C + select REGMAP_I2C + help + This driver controls a Maxim MAX20086-MAX20089 camera power + protector via I2C bus. The regulator has 2 or 4 outputs depending on + the device model. This driver is only capable to turn on/off them. + +config REGULATOR_MAX20411 + tristate "Maxim MAX20411 High-Efficiency Single Step-Down Converter" + depends on I2C + select REGMAP_I2C + help + This driver controls the Maxim MAX20411 family of high-efficiency, + syncrhonous step-down converters. + +config REGULATOR_MAX77686 + tristate "Maxim 77686 regulator" + depends on MFD_MAX77686 || COMPILE_TEST + help + This driver controls a Maxim 77686 regulator + via I2C bus. The provided regulator is suitable for + Exynos-4 chips to control VARM and VINT voltages. + +config REGULATOR_MAX77693 + tristate "Maxim 77693/77843 regulator" + depends on MFD_MAX77693 || MFD_MAX77843 || COMPILE_TEST + help + This driver controls a Maxim 77693/77843 regulators via I2C bus. + The regulators include two LDOs, 'SAFEOUT1', 'SAFEOUT2' + and one current regulator 'CHARGER'. This is suitable for + Exynos-4x12 (MAX77693) or Exynos5433 (MAX77843) SoC chips. + +config REGULATOR_MAX77802 + tristate "Maxim 77802 regulator" + depends on MFD_MAX77686 || COMPILE_TEST + help + This driver controls a Maxim 77802 regulator + via I2C bus. The provided regulator is suitable for + Exynos5420/Exynos5800 SoCs to control various voltages. + It includes support for control of voltage and ramp speed. + +config REGULATOR_MAX77826 + tristate "Maxim 77826 regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls a Maxim 77826 regulator via I2C bus. + The regulator include 15 LDOs, BUCK and BUCK BOOST regulator. + It includes support for control of output voltage. This + regulator is found on the Samsung Galaxy S5 (klte) smartphone. + +config REGULATOR_MAX77838 + tristate "Maxim 77838 regulator" + depends on I2C + select REGMAP_I2C + help + This driver controls a Maxim 77838 regulator via I2C bus. + The regulator include 4 LDOs and a BUCK regulator. It's + present on the Samsung Galaxy S7 lineup of smartphones. + +config REGULATOR_MC13XXX_CORE + tristate + +config REGULATOR_MC13783 + tristate "Freescale MC13783 regulator driver" + depends on MFD_MC13XXX + select REGULATOR_MC13XXX_CORE + help + Say y here to support the regulators found on the Freescale MC13783 + PMIC. + +config REGULATOR_MC13892 + tristate "Freescale MC13892 regulator driver" + depends on MFD_MC13XXX + select REGULATOR_MC13XXX_CORE + help + Say y here to support the regulators found on the Freescale MC13892 + PMIC. + +config REGULATOR_MCP16502 + tristate "Microchip MCP16502 PMIC" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the MCP16502 PMIC. This driver supports + basic operations (get/set voltage, get/set operating mode) + through the regulator interface. In addition it enables + suspend-to-ram/standby transition. + +config REGULATOR_MP5416 + tristate "Monolithic MP5416 PMIC" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the MP5416 PMIC. This will enable supports + the software controllable 4 buck and 4 LDO regulators. + Say M here if you want to include support for the regulator as a + module. + +config REGULATOR_MP8859 + tristate "MPS MP8859 regulator driver" + depends on I2C + select REGMAP_I2C + help + Say y here to support the MP8859 voltage regulator. This driver + supports basic operations (get/set voltage) through the regulator + interface. + Say M here if you want to include support for the regulator as a + module. The module will be named "mp8859". + +config REGULATOR_MP886X + tristate "MPS MP8869 regulator driver" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports the MP8869 voltage regulator. + +config REGULATOR_MPQ7920 + tristate "Monolithic MPQ7920 PMIC" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the MPQ7920 PMIC. This will enable supports + the software controllable 4 buck and 5 LDO regulators. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6311 + tristate "MediaTek MT6311 PMIC" + depends on I2C + select REGMAP_I2C + help + Say y here to select this option to enable the power regulator of + MediaTek MT6311 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6315 + tristate "MediaTek MT6315 PMIC" + depends on SPMI + select REGMAP_SPMI + help + Say y here to select this option to enable the power regulator of + MediaTek MT6315 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6316 + tristate "MT6316 SPMI PMIC regulator driver" + depends on SPMI + select REGMAP_SPMI + help + Say Y here to enable support for 2+2, 3+1 and 4 phase regulators + found in the MediaTek MT6316 BP, CP, DP, HP, VP and TP SPMI PMICs. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6323 + tristate "MediaTek MT6323 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6323 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6331 + tristate "MediaTek MT6331 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6331 PMIC. + This driver supports the control of different power rails of device + through regulator interface + +config REGULATOR_MT6332 + tristate "MediaTek MT6332 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6332 PMIC. + This driver supports the control of different power rails of device + through regulator interface + +config REGULATOR_MT6357 + tristate "MediaTek MT6357 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6357 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6358 + tristate "MediaTek MT6358 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6358 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6359 + tristate "MediaTek MT6359 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6359 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6360 + tristate "MT6360 SubPMIC Regulator" + depends on MFD_MT6360 + help + Say Y here to enable MT6360 regulator support. + This is support MT6360 PMIC/LDO part include + 2-channel buck with Thermal Shutdown and Overload Protection + 6-channel High PSRR and Low Dropout LDO. + +config REGULATOR_MT6363 + tristate "MT6363 SPMI PMIC regulator driver" + depends on SPMI + select REGMAP_SPMI + select IRQ_DOMAIN + help + Say Y here to enable support for regulators found in the MediaTek + MT6363 SPMI PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6370 + tristate "MT6370 SubPMIC Regulator" + depends on MFD_MT6370 + help + Say Y here to enable MT6370 regulator support. + This driver supports the control for DisplayBias voltages and one + general purpose LDO which is commonly used to drive the vibrator. + +config REGULATOR_MT6380 + tristate "MediaTek MT6380 PMIC" + depends on MTK_PMIC_WRAP + help + Say y here to select this option to enable the power regulator of + MediaTek MT6380 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MT6397 + tristate "MediaTek MT6397 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6397 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + +config REGULATOR_MTK_DVFSRC + tristate "MediaTek DVFSRC regulator driver" + depends on MTK_DVFSRC + help + Say y here to control regulator by DVFSRC (dynamic voltage + and frequency scaling resource collector). + This driver supports to control regulators via the DVFSRC + of Mediatek. It allows for voting on regulator state + between multiple users. + +config REGULATOR_PALMAS + tristate "TI Palmas PMIC Regulators" + depends on MFD_PALMAS + help + If you wish to control the regulators on the Palmas series of + chips say Y here. This will enable support for all the software + controllable SMPS/LDO regulators. + + The regulators available on Palmas series chips vary depending + on the muxing. This is handled automatically in the driver by + reading the mux info from OTP. + +config REGULATOR_PBIAS + tristate "PBIAS OMAP regulator driver" + depends on (ARCH_OMAP || COMPILE_TEST) && MFD_SYSCON + help + Say y here to support pbias regulator for mmc1:SD card i/o + on OMAP SoCs. + This driver provides support for OMAP pbias modelled + regulators. + +config REGULATOR_PCA9450 + tristate "NXP PCA9450A/PCA9450B/PCA9450C regulator driver" + depends on I2C + select REGMAP_I2C + help + Say y here to support the NXP PCA9450A/PCA9450B/PCA9450C PMIC + regulator driver. + +config REGULATOR_PF9453 + tristate "NXP PF9453 regulator driver" + depends on I2C + select REGMAP_I2C + help + Say y here to support the NXP PF9453 PMIC regulator driver. + +config REGULATOR_PF0900 + tristate "NXP PF0900/PF0901/PF09XX regulator driver" + depends on I2C + select REGMAP_I2C + help + Say y here to support the NXP PF0900/PF0901/PF09XX PMIC + regulator driver. + +config REGULATOR_PF530X + tristate "NXP PF5300/PF5301/PF5302 regulator driver" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the regulators found on the NXP + PF5300/PF5301/PF5302 PMIC. + + Say M here if you want to support for the regulators found + on the NXP PF5300/PF5301/PF5302 PMIC. The module will be named + "pf530x-regulator". + +config REGULATOR_PF8X00 + tristate "NXP PF8100/PF8121A/PF8200 regulator driver" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the regulators found on the NXP + PF8100/PF8121A/PF8200 PMIC. + + Say M here if you want to support for the regulators found + on the NXP PF8100/PF8121A/PF8200 PMIC. The module will be named + "pf8x00-regulator". + +config REGULATOR_PFUZE100 + tristate "Freescale PFUZE100/200/3000/3001 regulator driver" + depends on I2C && OF + select REGMAP_I2C + help + Say y here to support the regulators found on the Freescale + PFUZE100/200/3000/3001 PMIC. + +config REGULATOR_PV88060 + tristate "Powerventure Semiconductor PV88060 regulator" + depends on I2C + select REGMAP_I2C + help + Say y here to support the voltage regulators and convertors + PV88060 + +config REGULATOR_PV88080 + tristate "Powerventure Semiconductor PV88080 regulator" + depends on I2C + select REGMAP_I2C + help + Say y here to support the buck convertors on PV88080 + +config REGULATOR_PV88090 + tristate "Powerventure Semiconductor PV88090 regulator" + depends on I2C + select REGMAP_I2C + help + Say y here to support the voltage regulators and convertors + on PV88090 + +config REGULATOR_PF1550 + tristate "NXP PF1550 regulator" + depends on MFD_PF1550 + help + Say y here to select this option to enable the regulators on + the PF1550 PMICs. + This driver controls the PF1550 regulators via I2C bus. + The regulators include three bucks and three ldos. + +config REGULATOR_PWM + tristate "PWM voltage regulator" + depends on PWM + help + This driver supports PWM controlled voltage regulators. PWM + duty cycle can increase or decrease the voltage. + +config REGULATOR_QCOM_PM8008 + tristate "Qualcomm PM8008 PMIC regulators" + depends on MFD_QCOM_PM8008 + help + Select this option to enable support for the voltage regulators in + Qualcomm PM8008 PMICs. + +config REGULATOR_QCOM_REFGEN + tristate "Qualcomm REFGEN regulator driver" + depends on ARCH_QCOM || COMPILE_TEST + depends on HAS_IOMEM + depends on REGMAP + help + This driver supports the MMIO-mapped reference voltage regulator, + used internally by some PHYs on many Qualcomm SoCs. + + Say M here if you want to include support for this regulator as + a module. The module will be named "qcom-refgen-regulator". + +config REGULATOR_QCOM_RPM + tristate "Qualcomm RPM regulator driver" + depends on MFD_QCOM_RPM + help + If you say yes to this option, support will be included for the + regulators exposed by the Resource Power Manager found in Qualcomm + 8660, 8960 and 8064 based devices. + + Say M here if you want to include support for the regulators on the + Qualcomm RPM as a module. The module will be named + "qcom_rpm-regulator". + +config REGULATOR_QCOM_RPMH + tristate "Qualcomm RPMh regulator driver" + depends on QCOM_RPMH || (QCOM_RPMH=n && COMPILE_TEST) + depends on QCOM_COMMAND_DB || (QCOM_COMMAND_DB=n && COMPILE_TEST) + help + This driver supports control of PMIC regulators via the RPMh hardware + block found on Qualcomm Technologies Inc. SoCs. RPMh regulator + control allows for voting on regulator state between multiple + processors within the SoC. + +config REGULATOR_QCOM_SMD_RPM + tristate "Qualcomm SMD based RPM regulator driver" + depends on QCOM_SMD_RPM + help + If you say yes to this option, support will be included for the + regulators exposed by the Resource Power Manager found in Qualcomm + 8974 based devices. + + Say M here if you want to include support for the regulators on the + Qualcomm RPM as a module. The module will be named + "qcom_smd-regulator". + +config REGULATOR_QCOM_SPMI + tristate "Qualcomm SPMI regulator driver" + depends on SPMI || COMPILE_TEST + help + If you say yes to this option, support will be included for the + regulators found in Qualcomm SPMI PMICs. + + Say M here if you want to include support for the regulators on the + Qualcomm SPMI PMICs as a module. The module will be named + "qcom_spmi-regulator". + +config REGULATOR_QCOM_USB_VBUS + tristate "Qualcomm USB Vbus regulator driver" + depends on SPMI || COMPILE_TEST + help + If you say yes to this option, support will be included for the + regulator used to enable the VBUS output. + + Say M here if you want to include support for enabling the VBUS output + as a module. The module will be named "qcom_usb_vbus_regulator". + +config REGULATOR_RAA215300 + tristate "Renesas RAA215300 driver" + select REGMAP_I2C + depends on COMMON_CLK + depends on I2C + help + If you say yes to this option, support will be included for the + Renesas RAA215300 PMIC. + + Say M here if you want to include support for Renesas RAA215300 PMIC + as a module. The module will be named "raa215300". + +config REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY + tristate "Raspberry Pi 7-inch touchscreen panel ATTINY regulator" + depends on ARM || ARM64 || COMPILE_TEST + depends on BACKLIGHT_CLASS_DEVICE + depends on GPIOLIB + depends on I2C + select REGMAP_I2C + help + This driver supports ATTINY regulator on the Raspberry Pi 7-inch + touchscreen unit. The regulator is used to enable power to the + TC358762, display and to control backlight. + +config REGULATOR_RASPBERRYPI_TOUCHSCREEN_V2 + tristate "Raspberry Pi 7-inch touchscreen panel V2 regulator" + depends on ARM || ARM64 || COMPILE_TEST + depends on GPIOLIB + depends on I2C && OF + select GPIO_REGMAP + select REGMAP_I2C + help + This driver supports regulator on the V2 Raspberry Pi touchscreen + unit. The regulator is used to enable power to the display and to + control backlight PWM. + +config REGULATOR_RC5T583 + tristate "RICOH RC5T583 Power regulators" + depends on MFD_RC5T583 + help + Select this option to enable the power regulator of RICOH + PMIC RC5T583. + This driver supports the control of different power rails of device + through regulator interface. The device supports multiple DCDC/LDO + outputs which can be controlled by i2c communication. + +config REGULATOR_RK808 + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power regulators" + depends on MFD_RK8XX + help + Select this option to enable the power regulator of ROCKCHIP + PMIC RK805,RK809&RK817,RK808 and RK818. + This driver supports the control of different power rails of device + through regulator interface. The device supports multiple DCDC/LDO + outputs which can be controlled by i2c communication. + +config REGULATOR_RN5T618 + tristate "Ricoh RN5T567/618 voltage regulators" + depends on MFD_RN5T618 + help + Say y here to support the regulators found on Ricoh RN5T567, + RN5T618 or RC5T619 PMIC. + +config REGULATOR_ROHM + tristate + +config REGULATOR_RT4801 + tristate "Richtek RT4801 Regulators" + depends on I2C + select REGMAP_I2C + help + This adds support for voltage regulators in Richtek RT4801 Display Bias IC. + The device supports two regulators (DSVP/DSVN). + +config REGULATOR_RT4803 + tristate "Richtek RT4803 boost regulator" + depends on I2C + select REGMAP_I2C + help + This adds support for RT4803 boost converter that integrates the + bypass switch. If the input voltage is low than the required voltage, + RT4803 will enter boost mode. Otherwise, enable internal bypass + switch to enter bypass mode. + +config REGULATOR_RT4831 + tristate "Richtek RT4831 DSV Regulators" + depends on MFD_RT4831 + help + This adds support for voltage regulators in Richtek RT4831. + There are three regulators (VLCM/DSVP/DSVN). + VLCM is a virtual voltage input for DSVP/DSVN inside IC. + And DSVP/DSVN is the real Vout range from 4V to 6.5V. + It's common used to provide the power for the display panel. + +config REGULATOR_RT5033 + tristate "Richtek RT5033 Regulators" + depends on MFD_RT5033 + help + This adds support for voltage and current regulators in Richtek + RT5033 PMIC. The device supports multiple regulators like + current source, LDO and Buck. + +config REGULATOR_RT5120 + tristate "Richtek RT5120 PMIC Regulators" + depends on MFD_RT5120 + help + This adds support for voltage regulator in Richtek RT5120 PMIC. + It integrates 4 channels buck controller, 1 channel LDO, 1 EXTEN + to control external power source. Only BUCK1 is adjustable from + 600mV to 1395mV, per step 6.250mV. The others are all fixed voltage + by external hardware circuit. + +config REGULATOR_RT5133 + tristate "Richtek RT5133 PMIC Regulators" + depends on I2C && GPIOLIB && OF + select REGMAP + select CRC8 + help + This driver adds support for RT5133 PMIC regulators. + RT5133 is an integrated chip. It includes 8 LDOs and 3 GPOs that + can be used to drive output high/low purpose. The dependency of the + GPO block is internally LDO1 Voltage. + +config REGULATOR_RT5190A + tristate "Richtek RT5190A PMIC" + depends on I2C + select REGMAP_I2C + help + This adds support for voltage regulator in Richtek RT5190A PMIC. + It integratas 1 channel buck controller, 3 channels high efficiency + buck converters, 1 LDO, mute AC OFF depop function, with the general + I2C control interface. + +config REGULATOR_RT5739 + tristate "Richtek RT5739 Regulator" + depends on I2C + select REGMAP_I2C + help + This adds support for voltage regulator in Richtek RT5739. + It's a step-down switching voltage regulator. Using a proprietary + architecture with synchronous rectification, it is capable of + delivering 3.5A continuously at over 80% efficiency. + + This driver can also be built as a module. If so, the module + will be called rt5739. + +config REGULATOR_RT5759 + tristate "Richtek RT5759 Regulator" + depends on I2C + select REGMAP_I2C + help + This adds support for voltage regulator in Richtek RT5759. + The RT5759 is a high-performance, synchronous step-down DC-DC + converter that can deliver up to 9A output current from 3V to 6.5V + input supply. + +config REGULATOR_RT6160 + tristate "Richtek RT6160 BuckBoost voltage regulator" + depends on I2C + select REGMAP_I2C + help + This adds support for voltage regulator in Richtek RT6160. + This device automatically change voltage output mode from + Buck or Boost. The mode transition depend on the input source voltage. + The wide output range is from 2025mV to 5200mV and can be used on most + common application scenario. + +config REGULATOR_RT6190 + tristate "Richtek RT6190 4-Switch BuckBoost controller" + depends on I2C + select REGMAP_I2C + help + The RT6190 is a 4-Switch BuckBoost controller designed for converting + input voltage to output voltage that can be equal to, higher or lower + than input voltage. It operates with wide input voltage range from + 4.5V to 36V, and the output voltage can be set from 3V to 36V by + external FB pin. + +config REGULATOR_RT6245 + tristate "Richtek RT6245 voltage regulator" + depends on I2C + select REGMAP_I2C + help + This adds support for Richtek RT6245 voltage regulator. + It can support up to 14A output current and adjustable output voltage + from 0.4375V to 1.3875V, per step 12.5mV. + +config REGULATOR_RT8092 + tristate "Richtek RT8092 voltage regulator" + depends on I2C + select REGMAP_I2C + help + The RT8092 is a peak-current mode PWM step-down DC/DC converter with + I2C control interface. It is capable of delivering 4A continuing + current over a wide input range from 2.5V to 5.5V. + +config REGULATOR_RTQ2134 + tristate "Richtek RTQ2134 SubPMIC Regulator" + depends on I2C + select REGMAP_I2C + help + This driver adds support for RTQ2134 SubPMIC regulators. + The RTQ2134 is a multi-phase, programmable power management IC that + integrate with four high efficient, synchronous step-down converter + cores. It features wide output voltage range and the capability to + configure the corresponding power stages. + +config REGULATOR_RTMV20 + tristate "Richtek RTMV20 Laser Diode Regulator" + depends on I2C + select REGMAP_I2C + help + This driver adds support for the load switch current regulator on + the Richtek RTMV20. It can support the load current up to 6A and + integrate strobe/vsync/fsin signal to synchronize the IR camera. + +config REGULATOR_RTQ6752 + tristate "Richtek RTQ6752 TFT LCD voltage regulator" + depends on I2C + select REGMAP_I2C + help + This driver adds support for Richtek RTQ6752. RTQ6752 includes two + synchronous boost converters for PAVDD, and one synchronous NAVDD + buck-boost. This device is suitable for automotive TFT-LCD panel. + +config REGULATOR_RTQ2208 + tristate "Richtek RTQ2208 SubPMIC Regulator" + depends on I2C + select REGMAP_I2C + help + This driver adds support for RTQ2208 SubPMIC regulators. + The RTQ2208 is a multi-phase, programmable power management IC that + integrate with dual multi-configurable, synchronous buck converters + and two ldos. It features wide output voltage range from 0.4V to 2.05V + and the capability to configure the corresponding power stages. + +config REGULATOR_S2DOS05 + tristate "Samsung S2DOS05 voltage regulator" + depends on MFD_SEC_CORE || COMPILE_TEST + help + This driver provides support for the voltage regulators of the S2DOS05. + The S2DOS05 is a companion power management IC for the smart phones. + The S2DOS05 has 4 LDOs and 1 BUCK outputs. + +config REGULATOR_S2MPA01 + tristate "Samsung S2MPA01 voltage regulator" + depends on MFD_SEC_CORE || COMPILE_TEST + help + This driver controls Samsung S2MPA01 voltage output regulator + via I2C bus. S2MPA01 has 10 Bucks and 26 LDO outputs. + +config REGULATOR_S2MPS11 + tristate "Samsung S2MPS11/13/14/15/S2MPU02/05 voltage regulator" + depends on MFD_SEC_CORE || COMPILE_TEST + help + This driver supports a Samsung S2MPS11/13/14/15/S2MPU02/05 voltage + output regulator via I2C bus. The chip is comprised of high efficient + Buck converters including Dual-Phase Buck converter, Buck-Boost + converter, various LDOs. + +config REGULATOR_S5M8767 + tristate "Samsung S5M8767A voltage regulator" + depends on MFD_SEC_CORE || COMPILE_TEST + help + This driver supports a Samsung S5M8767A voltage output regulator + via I2C bus. S5M8767A have 9 Bucks and 28 LDOs output and + supports DVS mode with 8bits of output voltage control. + +config REGULATOR_SC2730 + tristate "Spreadtrum SC2730 power regulator driver" + depends on MFD_SC27XX_PMIC || COMPILE_TEST + help + This driver provides support for the voltage regulators on the + SC2730 PMIC. + +config REGULATOR_SC2731 + tristate "Spreadtrum SC2731 power regulator driver" + depends on MFD_SC27XX_PMIC || COMPILE_TEST + help + This driver provides support for the voltage regulators on the + SC2731 PMIC. + +config REGULATOR_SGM3804 + tristate "SGMicro SGM3804 voltage regulator" + depends on I2C && OF + depends on GPIOLIB + select REGMAP_I2C + help + This driver supports SGMicro SGM3804 dual-output voltage regulator. + +config REGULATOR_SKY81452 + tristate "Skyworks Solutions SKY81452 voltage regulator" + depends on MFD_SKY81452 + help + This driver supports Skyworks SKY81452 voltage output regulator + via I2C bus. SKY81452 has one voltage linear regulator can be + programmed from 4.5V to 20V. + + This driver can also be built as a module. If so, the module + will be called sky81452-regulator. + +config REGULATOR_SLG51000 + tristate "Dialog Semiconductor SLG51000 regulators" + depends on I2C + select REGMAP_I2C + help + Say y here to support for the Dialog Semiconductor SLG51000. + The SLG51000 is seven compact and customizable low dropout + regulators. + +config REGULATOR_SPACEMIT_P1 + tristate "SpacemiT P1 regulators" + depends on ARCH_SPACEMIT || COMPILE_TEST + depends on I2C + select MFD_SPACEMIT_P1 + default ARCH_SPACEMIT + help + Enable support for regulators implemented by the SpacemiT P1 + power controller. The P1 implements 6 high-efficiency buck + converters and 12 programmable LDO regulators. To compile this + driver as a module, choose M here. The module will be called + "spacemit-pmic". + +config REGULATOR_STM32_BOOSTER + tristate "STMicroelectronics STM32 BOOSTER" + depends on ARCH_STM32 || COMPILE_TEST + help + This driver supports internal booster (3V3) embedded in some + STMicroelectronics STM32 chips. It can be used to supply ADC analog + input switches when vdda supply is below 2.7V. + + This driver can also be built as a module. If so, the module + will be called stm32-booster. + +config REGULATOR_STM32_VREFBUF + tristate "STMicroelectronics STM32 VREFBUF" + depends on ARCH_STM32 || COMPILE_TEST + help + This driver supports STMicroelectronics STM32 VREFBUF (voltage + reference buffer) which can be used as voltage reference for + internal ADCs, DACs and also for external components through + dedicated Vref+ pin. + + This driver can also be built as a module. If so, the module + will be called stm32-vrefbuf. + +config REGULATOR_STM32_PWR + bool "STMicroelectronics STM32 PWR" + depends on ARCH_STM32 || COMPILE_TEST + help + This driver supports internal regulators (1V1, 1V8, 3V3) in the + STMicroelectronics STM32 chips. + +config REGULATOR_STPMIC1 + tristate "STMicroelectronics STPMIC1 PMIC Regulators" + depends on MFD_STPMIC1 + help + This driver supports STMicroelectronics STPMIC1 PMIC voltage + regulators and switches. The STPMIC1 regulators supply power to + an application processor as well as to external system + peripherals such as DDR, Flash memories and system devices. + + To compile this driver as a module, choose M here: the + module will be called stpmic1_regulator. + +config REGULATOR_TI_ABB + tristate "TI Adaptive Body Bias on-chip LDO" + depends on ARCH_OMAP || COMPILE_TEST + help + Select this option to support Texas Instruments' on-chip Adaptive Body + Bias (ABB) LDO regulators. It is recommended that this option be + enabled on required TI SoC. Certain Operating Performance Points + on TI SoCs may be unstable without enabling this as it provides + device specific optimized bias to allow/optimize functionality. + +config REGULATOR_STW481X_VMMC + bool "ST Microelectronics STW481X VMMC regulator" + depends on MFD_STW481X || COMPILE_TEST + default y if MFD_STW481X + help + This driver supports the internal VMMC regulator in the STw481x + PMIC chips. + +config REGULATOR_SUN20I + tristate "Allwinner D1 internal LDOs" + depends on ARCH_SUNXI || COMPILE_TEST + select MFD_SYSCON + default ARCH_SUNXI + help + This driver supports the internal LDOs in the Allwinner D1 SoC. + +config REGULATOR_SY7636A + tristate "Silergy SY7636A voltage regulator" + depends on MFD_SY7636A + help + This driver supports Silergy SY3686A voltage regulator. + +config REGULATOR_SY8106A + tristate "Silergy SY8106A regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports SY8106A single output regulator. + +config REGULATOR_SY8824X + tristate "Silergy SY8824C/SY8824E regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports SY8824C single output regulator. + +config REGULATOR_SY8827N + tristate "Silergy SY8827N regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports SY8827N single output regulator. + +config REGULATOR_TPS51632 + tristate "TI TPS51632 Power Regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports TPS51632 voltage regulator chip. + The TPS51632 is 3-2-1 Phase D-Cap+ Step Down Driverless Controller + with Serial VID control and DVFS. + The voltage output can be configure through I2C interface or PWM + interface. + +config REGULATOR_TPS6105X + tristate "TI TPS6105X Power regulators" + depends on TPS6105X + default y if TPS6105X + help + This driver supports TPS61050/TPS61052 voltage regulator chips. + It is a single boost converter primarily for white LEDs and + audio amplifiers. + +config REGULATOR_TPS62360 + tristate "TI TPS6236x Power Regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports TPS6236x voltage regulator chip. This + regulator is meant for processor core supply. This chip is + high-frequency synchronous step down dc-dc converter optimized + for battery-powered portable applications. + +config REGULATOR_TPS6286X + tristate "TI TPS6286x Power Regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports TPS6236x voltage regulator chips. These are + high-frequency synchronous step-down converters with an I2C + interface. + +config REGULATOR_TPS6287X + tristate "TI TPS6287x Power Regulator" + depends on I2C && OF + select REGMAP_I2C + help + This driver supports TPS6287x voltage regulator chips. These are + pin-to-pin high-frequency synchronous step-down dc-dc converters + with an I2C interface. + + If built as a module it will be called tps6287x-regulator. + +config REGULATOR_TPS65023 + tristate "TI TPS65023 Power regulators" + depends on I2C + select REGMAP_I2C + help + This driver supports TPS65023 voltage regulator chips. TPS65023 provides + three step-down converters and two general-purpose LDO voltage regulators. + It supports TI's software based Class-2 SmartReflex implementation. + +config REGULATOR_TPS6507X + tristate "TI TPS6507X Power regulators" + depends on I2C + help + This driver supports TPS6507X voltage regulator chips. TPS6507X provides + three step-down converters and two general-purpose LDO voltage regulators. + It supports TI's software based Class-2 SmartReflex implementation. + +config REGULATOR_TPS65086 + tristate "TI TPS65086 Power regulators" + depends on MFD_TPS65086 + help + This driver provides support for the voltage regulators on + TI TPS65086 PMICs. + +config REGULATOR_TPS65090 + tristate "TI TPS65090 Power regulator" + depends on MFD_TPS65090 + help + This driver provides support for the voltage regulators on the + TI TPS65090 PMIC. + +config REGULATOR_TPS65132 + tristate "TI TPS65132 Dual Output Power regulators" + depends on I2C && GPIOLIB + select REGMAP_I2C + help + This driver supports TPS65132 single inductor - dual output + power supply specifically designed for display panels. + +config REGULATOR_TPS65185 + tristate "TI TPS65185 EPD regulator" + depends on I2C + select REGMAP_I2C + help + This driver supports the TPS65185 voltage regulator chip + which is used to provide power to Electronic Paper Displays + so it is found in E-Book readers. + If HWWON is enabled, it also provides temperature measurement. + + +config REGULATOR_TPS65217 + tristate "TI TPS65217 Power regulators" + depends on MFD_TPS65217 + help + This driver supports TPS65217 voltage regulator chips. TPS65217 + provides three step-down converters and four general-purpose LDO + voltage regulators. It supports software based voltage control + for different voltage domains + +config REGULATOR_TPS65218 + tristate "TI TPS65218 Power regulators" + depends on MFD_TPS65218 && OF + help + This driver supports TPS65218 voltage regulator chips. TPS65218 + provides six step-down converters and one general-purpose LDO + voltage regulators. It supports software based voltage control + for different voltage domains + +config REGULATOR_TPS65219 + tristate "TI TPS65219 Power regulators" + depends on MFD_TPS65219 && OF + help + This driver supports TPS65219, TPS65215, and TPS65214 voltage + regulator chips. + TPS65219 series of PMICs have 3 single phase BUCKs & 4 LDOs + voltage regulators. + TPS65215 PMIC has 3 single phase BUCKs & 2 LDOs. + TPS65214 PMIC has 3 synchronous stepdown DC-DC converters & 2 + LDOs. One LDO supports a maximum output current of 300 mA and the + other a maximum of 500 mA + All 3 PMICs support software based voltage control for different + voltage domains. + +config REGULATOR_TPS6594 + tristate "TI TPS6594 Power regulators" + depends on MFD_TPS6594 && OF + default MFD_TPS6594 + help + This driver supports TPS6594 series and TPS65224 voltage regulator chips. + TPS6594 series of PMICs have 5 BUCKs and 4 LDOs + voltage regulators. + BUCKs 1,2,3,4 can be used in single phase or multiphase mode. + Part number defines which single or multiphase mode is i used. + It supports software based voltage control + for different voltage domains. + TPS65224 PMIC has 4 BUCKs and 3 LDOs. BUCK12 can be used in dual phase. + All BUCKs and LDOs volatge can be controlled through software. + +config REGULATOR_TPS6524X + tristate "TI TPS6524X Power regulators" + depends on SPI + help + This driver supports TPS6524X voltage regulator chips. TPS6524X + provides three step-down converters and two general-purpose LDO + voltage regulators. This device is interfaced using a customized + serial interface currently supported on the sequencer serial + port controller. + +config REGULATOR_TPS6586X + tristate "TI TPS6586X Power regulators" + depends on MFD_TPS6586X + help + This driver supports TPS6586X voltage regulator chips. + +config REGULATOR_TPS65910 + tristate "TI TPS65910/TPS65911 Power Regulators" + depends on MFD_TPS65910 + help + This driver supports TPS65910/TPS65911 voltage regulator chips. + +config REGULATOR_TPS65912 + tristate "TI TPS65912 Power regulator" + depends on MFD_TPS65912 + help + This driver supports TPS65912 voltage regulator chip. + +config REGULATOR_TPS68470 + tristate "TI TPS68470 PMIC Regulators Driver" + depends on INTEL_SKL_INT3472 || COMPILE_TEST + help + This driver adds support for the TPS68470 PMIC to register + regulators against the usual framework. + + The module will be called "tps68470-regulator". + +config REGULATOR_TWL4030 + tristate "TI TWL4030/TWL5030/TWL6030/TPS659x0 PMIC" + depends on TWL4030_CORE + help + This driver supports the voltage regulators provided by + this family of companion chips. + +config REGULATOR_UNIPHIER + tristate "UniPhier regulator driver" + depends on ARCH_UNIPHIER || COMPILE_TEST + depends on OF + select REGMAP_MMIO + default ARCH_UNIPHIER + help + Support for regulators implemented on Socionext UniPhier SoCs. + +config REGULATOR_RZG2L_VBCTRL + tristate "Renesas RZ/G2L USB VBUS regulator driver" + depends on RESET_RZG2L_USBPHY_CTRL || COMPILE_TEST + depends on OF + select REGMAP_MMIO + default RESET_RZG2L_USBPHY_CTRL + help + Support for VBUS regulators implemented on Renesas RZ/G2L SoCs. + +config REGULATOR_VCTRL + tristate "Voltage controlled regulators" + depends on OF + help + This driver provides support for voltage regulators whose output + voltage is controlled by the voltage of another regulator. + +config REGULATOR_VEXPRESS + tristate "Versatile Express regulators" + depends on VEXPRESS_CONFIG + help + This driver provides support for voltage regulators available + on the ARM Ltd's Versatile Express platform. + +config REGULATOR_VQMMC_IPQ4019 + tristate "IPQ4019 VQMMC SD LDO regulator support" + depends on ARCH_QCOM + help + This driver provides support for the VQMMC LDO I/0 + voltage regulator of the IPQ4019 SD/EMMC controller. + +config REGULATOR_WM831X + tristate "Wolfson Microelectronics WM831x PMIC regulators" + depends on MFD_WM831X + help + Support the voltage and current regulators of the WM831x series + of PMIC devices. + +config REGULATOR_WM8350 + tristate "Wolfson Microelectronics WM8350 AudioPlus PMIC" + depends on MFD_WM8350 + help + This driver provides support for the voltage and current regulators + of the WM8350 AudioPlus PMIC. + +config REGULATOR_WM8400 + tristate "Wolfson Microelectronics WM8400 AudioPlus PMIC" + depends on MFD_WM8400 + help + This driver provides support for the voltage regulators of the + WM8400 AudioPlus PMIC. + +config REGULATOR_WM8994 + tristate "Wolfson Microelectronics WM8994 CODEC" + depends on MFD_WM8994 + help + This driver provides support for the voltage regulators on the + WM8994 CODEC. + +config REGULATOR_QCOM_LABIBB + tristate "Qualcomm LAB/IBB regulator support" + depends on SPMI || COMPILE_TEST + help + This driver supports Qualcomm's LAB/IBB regulators present on the + Qualcomm's PMIC chip pmi8998. QCOM LAB and IBB are SPMI + based PMIC implementations. LAB can be used as positive + boost regulator and IBB can be used as a negative boost regulator + for LCD display panel. + +endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile new file mode 100644 index 000000000..5a764cec8 --- /dev/null +++ b/drivers/regulator/Makefile @@ -0,0 +1,222 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for regulator drivers. +# + + +obj-$(CONFIG_REGULATOR) += core.o dummy.o fixed-helper.o helpers.o devres.o irq_helpers.o +obj-$(CONFIG_REGULATOR_NETLINK_EVENTS) += event.o +obj-$(CONFIG_OF) += of_regulator.o +obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o +obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o +obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o + +obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o +obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o +obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o +obj-$(CONFIG_REGULATOR_88PM886) += 88pm886-regulator.o +obj-$(CONFIG_REGULATOR_CROS_EC) += cros-ec-regulator.o +obj-$(CONFIG_REGULATOR_CPCAP) += cpcap-regulator.o +obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o +obj-$(CONFIG_REGULATOR_AB8500) += ab8500-ext.o ab8500.o +obj-$(CONFIG_REGULATOR_ACT8865) += act8865-regulator.o +obj-$(CONFIG_REGULATOR_ACT8945A) += act8945a-regulator.o +obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o +obj-$(CONFIG_REGULATOR_ADP5055) += adp5055-regulator.o +obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o +obj-$(CONFIG_REGULATOR_ARIZONA_LDO1) += arizona-ldo1.o +obj-$(CONFIG_REGULATOR_ARIZONA_MICSUPP) += arizona-micsupp.o +obj-$(CONFIG_REGULATOR_ARM_SCMI) += scmi-regulator.o +obj-$(CONFIG_REGULATOR_AS3711) += as3711-regulator.o +obj-$(CONFIG_REGULATOR_AS3722) += as3722-regulator.o +obj-$(CONFIG_REGULATOR_ATC260X) += atc260x-regulator.o +obj-$(CONFIG_REGULATOR_AW37503) += aw37503-regulator.o +obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o +obj-$(CONFIG_REGULATOR_BCM590XX) += bcm590xx-regulator.o +obj-$(CONFIG_REGULATOR_BD71815) += bd71815-regulator.o +obj-$(CONFIG_REGULATOR_BD71828) += bd71828-regulator.o +obj-$(CONFIG_REGULATOR_BD718XX) += bd718x7-regulator.o +obj-$(CONFIG_REGULATOR_BD9571MWV) += bd9571mwv-regulator.o +obj-$(CONFIG_REGULATOR_BD957XMUF) += bd9576-regulator.o +obj-$(CONFIG_REGULATOR_BQ257XX) += bq257xx-regulator.o +obj-$(CONFIG_REGULATOR_DA903X) += da903x-regulator.o +obj-$(CONFIG_REGULATOR_BD96801) += bd96801-regulator.o +obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o +obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o +obj-$(CONFIG_REGULATOR_DA9062) += da9062-regulator.o +obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o +obj-$(CONFIG_REGULATOR_DA9121) += da9121-regulator.o +obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o +obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o +obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o +obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o +obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o +obj-$(CONFIG_REGULATOR_FAN53880) += fan53880.o +obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o +obj-$(CONFIG_REGULATOR_HI6421) += hi6421-regulator.o +obj-$(CONFIG_REGULATOR_HI6421V530) += hi6421v530-regulator.o +obj-$(CONFIG_REGULATOR_HI6421V600) += hi6421v600-regulator.o +obj-$(CONFIG_REGULATOR_HI655X) += hi655x-regulator.o +obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o +obj-$(CONFIG_REGULATOR_ISL9305) += isl9305.o +obj-$(CONFIG_REGULATOR_FP9931) += fp9931.o +obj-$(CONFIG_REGULATOR_LM363X) += lm363x-regulator.o +obj-$(CONFIG_REGULATOR_LOCHNAGAR) += lochnagar-regulator.o +obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o +obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o +obj-$(CONFIG_REGULATOR_LP872X) += lp872x.o +obj-$(CONFIG_REGULATOR_LP873X) += lp873x-regulator.o +obj-$(CONFIG_REGULATOR_LP87565) += lp87565-regulator.o +obj-$(CONFIG_REGULATOR_LP8788) += lp8788-buck.o +obj-$(CONFIG_REGULATOR_LP8788) += lp8788-ldo.o +obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o +obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o +obj-$(CONFIG_REGULATOR_LTC3676) += ltc3676.o +obj-$(CONFIG_REGULATOR_MAX14577) += max14577-regulator.o +obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o +obj-$(CONFIG_REGULATOR_MAX5970) += max5970-regulator.o +obj-$(CONFIG_REGULATOR_MAX77503) += max77503-regulator.o +obj-$(CONFIG_REGULATOR_MAX77541) += max77541-regulator.o +obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o +obj-$(CONFIG_REGULATOR_MAX77650) += max77650-regulator.o +obj-$(CONFIG_REGULATOR_MAX77675) += max77675-regulator.o +obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o +obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o +obj-$(CONFIG_REGULATOR_MAX8893) += max8893.o +obj-$(CONFIG_REGULATOR_MAX8907) += max8907-regulator.o +obj-$(CONFIG_REGULATOR_MAX8925) += max8925-regulator.o +obj-$(CONFIG_REGULATOR_MAX8952) += max8952.o +obj-$(CONFIG_REGULATOR_MAX8973) += max8973-regulator.o +obj-$(CONFIG_REGULATOR_MAX8997) += max8997-regulator.o +obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o +obj-$(CONFIG_REGULATOR_MAX20086) += max20086-regulator.o +obj-$(CONFIG_REGULATOR_MAX20411) += max20411-regulator.o +obj-$(CONFIG_REGULATOR_MAX77686) += max77686-regulator.o +obj-$(CONFIG_REGULATOR_MAX77693) += max77693-regulator.o +obj-$(CONFIG_REGULATOR_MAX77802) += max77802-regulator.o +obj-$(CONFIG_REGULATOR_MAX77826) += max77826-regulator.o +obj-$(CONFIG_REGULATOR_MAX77838) += max77838-regulator.o +obj-$(CONFIG_REGULATOR_MAX77857) += max77857-regulator.o +obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o +obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o +obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o +obj-$(CONFIG_REGULATOR_MCP16502) += mcp16502.o +obj-$(CONFIG_REGULATOR_MP5416) += mp5416.o +obj-$(CONFIG_REGULATOR_MP8859) += mp8859.o +obj-$(CONFIG_REGULATOR_MP886X) += mp886x.o +obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o +obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o +obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o +obj-$(CONFIG_REGULATOR_MT6315) += mt6316-regulator.o +obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o +obj-$(CONFIG_REGULATOR_MT6331) += mt6331-regulator.o +obj-$(CONFIG_REGULATOR_MT6332) += mt6332-regulator.o +obj-$(CONFIG_REGULATOR_MT6357) += mt6357-regulator.o +obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o +obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o +obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o +obj-$(CONFIG_REGULATOR_MT6363) += mt6363-regulator.o +obj-$(CONFIG_REGULATOR_MT6370) += mt6370-regulator.o +obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o +obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o +obj-$(CONFIG_REGULATOR_MTK_DVFSRC) += mtk-dvfsrc-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_PM8008) += qcom-pm8008-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_REFGEN) += qcom-refgen-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o +obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o +obj-$(CONFIG_REGULATOR_PCA9450) += pca9450-regulator.o +obj-$(CONFIG_REGULATOR_PF0900) += pf0900-regulator.o +obj-$(CONFIG_REGULATOR_PF9453) += pf9453-regulator.o +obj-$(CONFIG_REGULATOR_PF1550) += pf1550-regulator.o +obj-$(CONFIG_REGULATOR_PF530X) += pf530x-regulator.o +obj-$(CONFIG_REGULATOR_PF8X00) += pf8x00-regulator.o +obj-$(CONFIG_REGULATOR_PFUZE100) += pfuze100-regulator.o +obj-$(CONFIG_REGULATOR_PV88060) += pv88060-regulator.o +obj-$(CONFIG_REGULATOR_PV88080) += pv88080-regulator.o +obj-$(CONFIG_REGULATOR_PV88090) += pv88090-regulator.o +obj-$(CONFIG_REGULATOR_PWM) += pwm-regulator.o +obj-$(CONFIG_REGULATOR_TPS51632) += tps51632-regulator.o +obj-$(CONFIG_REGULATOR_PBIAS) += pbias-regulator.o +obj-$(CONFIG_REGULATOR_RAA215300) += raa215300.o +obj-$(CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY) += rpi-panel-attiny-regulator.o +obj-$(CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_V2) += rpi-panel-v2-regulator.o +obj-$(CONFIG_REGULATOR_RC5T583) += rc5t583-regulator.o +obj-$(CONFIG_REGULATOR_RK808) += rk808-regulator.o +obj-$(CONFIG_REGULATOR_RN5T618) += rn5t618-regulator.o +obj-$(CONFIG_REGULATOR_ROHM) += rohm-regulator.o +obj-$(CONFIG_REGULATOR_RT4801) += rt4801-regulator.o +obj-$(CONFIG_REGULATOR_RT4803) += rt4803.o +obj-$(CONFIG_REGULATOR_RT4831) += rt4831-regulator.o +obj-$(CONFIG_REGULATOR_RT5033) += rt5033-regulator.o +obj-$(CONFIG_REGULATOR_RT5120) += rt5120-regulator.o +obj-$(CONFIG_REGULATOR_RT5133) += rt5133-regulator.o +obj-$(CONFIG_REGULATOR_RT5190A) += rt5190a-regulator.o +obj-$(CONFIG_REGULATOR_RT5739) += rt5739.o +obj-$(CONFIG_REGULATOR_RT5759) += rt5759-regulator.o +obj-$(CONFIG_REGULATOR_RT6160) += rt6160-regulator.o +obj-$(CONFIG_REGULATOR_RT6190) += rt6190-regulator.o +obj-$(CONFIG_REGULATOR_RT6245) += rt6245-regulator.o +obj-$(CONFIG_REGULATOR_RT8092) += rt8092.o +obj-$(CONFIG_REGULATOR_RTMV20) += rtmv20-regulator.o +obj-$(CONFIG_REGULATOR_RTQ2134) += rtq2134-regulator.o +obj-$(CONFIG_REGULATOR_RTQ6752) += rtq6752-regulator.o +obj-$(CONFIG_REGULATOR_RTQ2208) += rtq2208-regulator.o +obj-$(CONFIG_REGULATOR_S2DOS05) += s2dos05-regulator.o +obj-$(CONFIG_REGULATOR_S2MPA01) += s2mpa01.o +obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o +obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o +obj-$(CONFIG_REGULATOR_SC2730) += sc2730-regulator.o +obj-$(CONFIG_REGULATOR_SC2731) += sc2731-regulator.o +obj-$(CONFIG_REGULATOR_SGM3804) += sgm3804-regulator.o +obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o +obj-$(CONFIG_REGULATOR_SLG51000) += slg51000-regulator.o +obj-$(CONFIG_REGULATOR_SPACEMIT_P1) += spacemit-p1.o +obj-$(CONFIG_REGULATOR_STM32_BOOSTER) += stm32-booster.o +obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o +obj-$(CONFIG_REGULATOR_STM32_PWR) += stm32-pwr.o +obj-$(CONFIG_REGULATOR_STPMIC1) += stpmic1_regulator.o +obj-$(CONFIG_REGULATOR_STW481X_VMMC) += stw481x-vmmc.o +obj-$(CONFIG_REGULATOR_SUN20I) += sun20i-regulator.o +obj-$(CONFIG_REGULATOR_SY7636A) += sy7636a-regulator.o +obj-$(CONFIG_REGULATOR_SY8106A) += sy8106a-regulator.o +obj-$(CONFIG_REGULATOR_SY8824X) += sy8824x.o +obj-$(CONFIG_REGULATOR_SY8827N) += sy8827n.o +obj-$(CONFIG_REGULATOR_TI_ABB) += ti-abb-regulator.o +obj-$(CONFIG_REGULATOR_TPS6105X) += tps6105x-regulator.o +obj-$(CONFIG_REGULATOR_TPS62360) += tps62360-regulator.o +obj-$(CONFIG_REGULATOR_TPS6286X) += tps6286x-regulator.o +obj-$(CONFIG_REGULATOR_TPS6287X) += tps6287x-regulator.o +obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o +obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o +obj-$(CONFIG_REGULATOR_TPS65086) += tps65086-regulator.o +obj-$(CONFIG_REGULATOR_TPS65090) += tps65090-regulator.o +obj-$(CONFIG_REGULATOR_TPS65185) += tps65185.o +obj-$(CONFIG_REGULATOR_TPS65217) += tps65217-regulator.o +obj-$(CONFIG_REGULATOR_TPS65218) += tps65218-regulator.o +obj-$(CONFIG_REGULATOR_TPS65219) += tps65219-regulator.o +obj-$(CONFIG_REGULATOR_TPS6524X) += tps6524x-regulator.o +obj-$(CONFIG_REGULATOR_TPS6586X) += tps6586x-regulator.o +obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o +obj-$(CONFIG_REGULATOR_TPS65912) += tps65912-regulator.o +obj-$(CONFIG_REGULATOR_TPS6594) += tps6594-regulator.o +obj-$(CONFIG_REGULATOR_TPS65132) += tps65132-regulator.o +obj-$(CONFIG_REGULATOR_TPS68470) += tps68470-regulator.o +obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o twl6030-regulator.o +obj-$(CONFIG_REGULATOR_UNIPHIER) += uniphier-regulator.o +obj-$(CONFIG_REGULATOR_RZG2L_VBCTRL) += renesas-usb-vbus-regulator.o +obj-$(CONFIG_REGULATOR_VCTRL) += vctrl-regulator.o +obj-$(CONFIG_REGULATOR_VEXPRESS) += vexpress-regulator.o +obj-$(CONFIG_REGULATOR_VQMMC_IPQ4019) += vqmmc-ipq4019-regulator.o +obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o +obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o +obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o +obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o +obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o +obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o + +ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG diff --git a/drivers/regulator/aat2870-regulator.c b/drivers/regulator/aat2870-regulator.c new file mode 100644 index 000000000..970d86f2b --- /dev/null +++ b/drivers/regulator/aat2870-regulator.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/regulator/aat2870-regulator.c + * + * Copyright (c) 2011, NVIDIA Corporation. + * Author: Jin Park + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct aat2870_regulator { + struct aat2870_data *aat2870; + struct regulator_desc desc; + + u8 enable_addr; + u8 enable_shift; + u8 enable_mask; + + u8 voltage_addr; + u8 voltage_shift; + u8 voltage_mask; +}; + +static int aat2870_ldo_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct aat2870_regulator *ri = rdev_get_drvdata(rdev); + struct aat2870_data *aat2870 = ri->aat2870; + + return aat2870->update(aat2870, ri->voltage_addr, ri->voltage_mask, + selector << ri->voltage_shift); +} + +static int aat2870_ldo_get_voltage_sel(struct regulator_dev *rdev) +{ + struct aat2870_regulator *ri = rdev_get_drvdata(rdev); + struct aat2870_data *aat2870 = ri->aat2870; + u8 val; + int ret; + + ret = aat2870->read(aat2870, ri->voltage_addr, &val); + if (ret) + return ret; + + return (val & ri->voltage_mask) >> ri->voltage_shift; +} + +static int aat2870_ldo_enable(struct regulator_dev *rdev) +{ + struct aat2870_regulator *ri = rdev_get_drvdata(rdev); + struct aat2870_data *aat2870 = ri->aat2870; + + return aat2870->update(aat2870, ri->enable_addr, ri->enable_mask, + ri->enable_mask); +} + +static int aat2870_ldo_disable(struct regulator_dev *rdev) +{ + struct aat2870_regulator *ri = rdev_get_drvdata(rdev); + struct aat2870_data *aat2870 = ri->aat2870; + + return aat2870->update(aat2870, ri->enable_addr, ri->enable_mask, 0); +} + +static int aat2870_ldo_is_enabled(struct regulator_dev *rdev) +{ + struct aat2870_regulator *ri = rdev_get_drvdata(rdev); + struct aat2870_data *aat2870 = ri->aat2870; + u8 val; + int ret; + + ret = aat2870->read(aat2870, ri->enable_addr, &val); + if (ret) + return ret; + + return val & ri->enable_mask ? 1 : 0; +} + +static const struct regulator_ops aat2870_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = aat2870_ldo_set_voltage_sel, + .get_voltage_sel = aat2870_ldo_get_voltage_sel, + .enable = aat2870_ldo_enable, + .disable = aat2870_ldo_disable, + .is_enabled = aat2870_ldo_is_enabled, +}; + +static const unsigned int aat2870_ldo_voltages[] = { + 1200000, 1300000, 1500000, 1600000, + 1800000, 2000000, 2200000, 2500000, + 2600000, 2700000, 2800000, 2900000, + 3000000, 3100000, 3200000, 3300000, +}; + +#define AAT2870_LDO(ids) \ + { \ + .desc = { \ + .name = #ids, \ + .id = AAT2870_ID_##ids, \ + .n_voltages = ARRAY_SIZE(aat2870_ldo_voltages), \ + .volt_table = aat2870_ldo_voltages, \ + .ops = &aat2870_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +static struct aat2870_regulator aat2870_regulators[] = { + AAT2870_LDO(LDOA), + AAT2870_LDO(LDOB), + AAT2870_LDO(LDOC), + AAT2870_LDO(LDOD), +}; + +static struct aat2870_regulator *aat2870_get_regulator(int id) +{ + struct aat2870_regulator *ri = NULL; + int i; + + for (i = 0; i < ARRAY_SIZE(aat2870_regulators); i++) { + ri = &aat2870_regulators[i]; + if (ri->desc.id == id) + break; + } + + if (i == ARRAY_SIZE(aat2870_regulators)) + return NULL; + + ri->enable_addr = AAT2870_LDO_EN; + ri->enable_shift = id - AAT2870_ID_LDOA; + ri->enable_mask = 0x1 << ri->enable_shift; + + ri->voltage_addr = (id - AAT2870_ID_LDOA) / 2 ? + AAT2870_LDO_CD : AAT2870_LDO_AB; + ri->voltage_shift = (id - AAT2870_ID_LDOA) % 2 ? 0 : 4; + ri->voltage_mask = 0xF << ri->voltage_shift; + + return ri; +} + +static int aat2870_regulator_probe(struct platform_device *pdev) +{ + struct aat2870_regulator *ri; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + ri = aat2870_get_regulator(pdev->id); + if (!ri) { + dev_err(&pdev->dev, "Invalid device ID, %d\n", pdev->id); + return -EINVAL; + } + ri->aat2870 = dev_get_drvdata(pdev->dev.parent); + + config.dev = &pdev->dev; + config.driver_data = ri; + config.init_data = dev_get_platdata(&pdev->dev); + + rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register regulator %s\n", + ri->desc.name); + return PTR_ERR(rdev); + } + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static struct platform_driver aat2870_regulator_driver = { + .driver = { + .name = "aat2870-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = aat2870_regulator_probe, +}; + +static int __init aat2870_regulator_init(void) +{ + return platform_driver_register(&aat2870_regulator_driver); +} +subsys_initcall(aat2870_regulator_init); + +static void __exit aat2870_regulator_exit(void) +{ + platform_driver_unregister(&aat2870_regulator_driver); +} +module_exit(aat2870_regulator_exit); + +MODULE_DESCRIPTION("AnalogicTech AAT2870 Regulator"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Jin Park "); +MODULE_ALIAS("platform:aat2870-regulator"); diff --git a/drivers/regulator/ab8500-ext.c b/drivers/regulator/ab8500-ext.c new file mode 100644 index 000000000..b9955aa4e --- /dev/null +++ b/drivers/regulator/ab8500-ext.c @@ -0,0 +1,474 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Authors: Bengt Jonsson + * + * This file is based on drivers/regulator/ab8500.c + * + * AB8500 external regulators + * + * ab8500-ext supports the following regulators: + * - VextSupply3 + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* AB8500 external regulators */ +enum ab8500_ext_regulator_id { + AB8500_EXT_SUPPLY1, + AB8500_EXT_SUPPLY2, + AB8500_EXT_SUPPLY3, + AB8500_NUM_EXT_REGULATORS, +}; + +struct ab8500_ext_regulator_cfg { + bool hwreq; /* requires hw mode or high power mode */ +}; + +/* supply for VextSupply3 */ +static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = { + /* SIM supply for 3 V SIM cards */ + REGULATOR_SUPPLY("vinvsim", "sim-detect.0"), +}; + +/* + * AB8500 external regulators + */ +static struct regulator_init_data ab8500_ext_regulators[] = { + /* fixed Vbat supplies VSMPS1_EXT_1V8 */ + [AB8500_EXT_SUPPLY1] = { + .constraints = { + .name = "ab8500-ext-supply1", + .min_uV = 1800000, + .max_uV = 1800000, + .initial_mode = REGULATOR_MODE_IDLE, + .boot_on = 1, + .always_on = 1, + }, + }, + /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */ + [AB8500_EXT_SUPPLY2] = { + .constraints = { + .name = "ab8500-ext-supply2", + .min_uV = 1360000, + .max_uV = 1360000, + }, + }, + /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */ + [AB8500_EXT_SUPPLY3] = { + .constraints = { + .name = "ab8500-ext-supply3", + .min_uV = 3400000, + .max_uV = 3400000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = + ARRAY_SIZE(ab8500_ext_supply3_consumers), + .consumer_supplies = ab8500_ext_supply3_consumers, + }, +}; + +/** + * struct ab8500_ext_regulator_info - ab8500 regulator information + * @dev: device pointer + * @desc: regulator description + * @cfg: regulator configuration (extension of regulator FW configuration) + * @update_bank: bank to control on/off + * @update_reg: register to control on/off + * @update_mask: mask to enable/disable and set mode of regulator + * @update_val: bits holding the regulator current mode + * @update_val_hp: bits to set EN pin active (LPn pin deactive) + * normally this means high power mode + * @update_val_lp: bits to set EN pin active and LPn pin active + * normally this means low power mode + * @update_val_hw: bits to set regulator pins in HW control + * SysClkReq pins and logic will choose mode + */ +struct ab8500_ext_regulator_info { + struct device *dev; + struct regulator_desc desc; + struct ab8500_ext_regulator_cfg *cfg; + u8 update_bank; + u8 update_reg; + u8 update_mask; + u8 update_val; + u8 update_val_hp; + u8 update_val_lp; + u8 update_val_hw; +}; + +static int ab8500_ext_regulator_enable(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + /* + * To satisfy both HW high power request and SW request, the regulator + * must be on in high power. + */ + if (info->cfg && info->cfg->hwreq) + regval = info->update_val_hp; + else + regval = info->update_val; + + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->update_bank, info->update_reg, + info->update_mask, regval); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't set enable bits for regulator\n"); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), + "%s-enable (bank, reg, mask, value): 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, regval); + + return 0; +} + +static int ab8500_ext_regulator_disable(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + /* + * Set the regulator in HW request mode if configured + */ + if (info->cfg && info->cfg->hwreq) + regval = info->update_val_hw; + else + regval = 0; + + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->update_bank, info->update_reg, + info->update_mask, regval); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't set disable bits for regulator\n"); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), "%s-disable (bank, reg, mask, value):" + " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, regval); + + return 0; +} + +static int ab8500_ext_regulator_is_enabled(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + ret = abx500_get_register_interruptible(info->dev, + info->update_bank, info->update_reg, ®val); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't read 0x%x register\n", info->update_reg); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), "%s-is_enabled (bank, reg, mask, value):" + " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, regval); + + if (((regval & info->update_mask) == info->update_val_lp) || + ((regval & info->update_mask) == info->update_val_hp)) + return 1; + else + return 0; +} + +static int ab8500_ext_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + int ret = 0; + struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_NORMAL: + regval = info->update_val_hp; + break; + case REGULATOR_MODE_IDLE: + regval = info->update_val_lp; + break; + + default: + return -EINVAL; + } + + /* If regulator is enabled and info->cfg->hwreq is set, the regulator + must be on in high power, so we don't need to write the register with + the same value. + */ + if (ab8500_ext_regulator_is_enabled(rdev) && + !(info->cfg && info->cfg->hwreq)) { + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->update_bank, info->update_reg, + info->update_mask, regval); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "Could not set regulator mode.\n"); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), + "%s-set_mode (bank, reg, mask, value): " + "0x%x, 0x%x, 0x%x, 0x%x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, regval); + } + + info->update_val = regval; + + return 0; +} + +static unsigned int ab8500_ext_regulator_get_mode(struct regulator_dev *rdev) +{ + struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + if (info->update_val == info->update_val_hp) + ret = REGULATOR_MODE_NORMAL; + else if (info->update_val == info->update_val_lp) + ret = REGULATOR_MODE_IDLE; + else + ret = -EINVAL; + + return ret; +} + +static int ab8500_ext_set_voltage(struct regulator_dev *rdev, int min_uV, + int max_uV, unsigned *selector) +{ + struct regulation_constraints *regu_constraints = rdev->constraints; + + if (!regu_constraints) { + dev_err(rdev_get_dev(rdev), "No regulator constraints\n"); + return -EINVAL; + } + + if (regu_constraints->min_uV == min_uV && + regu_constraints->max_uV == max_uV) + return 0; + + dev_err(rdev_get_dev(rdev), + "Requested min %duV max %duV != constrained min %duV max %duV\n", + min_uV, max_uV, + regu_constraints->min_uV, regu_constraints->max_uV); + + return -EINVAL; +} + +static int ab8500_ext_list_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct regulation_constraints *regu_constraints = rdev->constraints; + + if (regu_constraints == NULL) { + dev_err(rdev_get_dev(rdev), "regulator constraints null pointer\n"); + return -EINVAL; + } + /* return the uV for the fixed regulators */ + if (regu_constraints->min_uV && regu_constraints->max_uV) { + if (regu_constraints->min_uV == regu_constraints->max_uV) + return regu_constraints->min_uV; + } + return -EINVAL; +} + +static const struct regulator_ops ab8500_ext_regulator_ops = { + .enable = ab8500_ext_regulator_enable, + .disable = ab8500_ext_regulator_disable, + .is_enabled = ab8500_ext_regulator_is_enabled, + .set_mode = ab8500_ext_regulator_set_mode, + .get_mode = ab8500_ext_regulator_get_mode, + .set_voltage = ab8500_ext_set_voltage, + .list_voltage = ab8500_ext_list_voltage, +}; + +static struct ab8500_ext_regulator_info + ab8500_ext_regulator_info[AB8500_NUM_EXT_REGULATORS] = { + [AB8500_EXT_SUPPLY1] = { + .desc = { + .name = "VEXTSUPPLY1", + .of_match = of_match_ptr("ab8500_ext1"), + .ops = &ab8500_ext_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_EXT_SUPPLY1, + .owner = THIS_MODULE, + .n_voltages = 1, + }, + .update_bank = 0x04, + .update_reg = 0x08, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_hp = 0x01, + .update_val_lp = 0x03, + .update_val_hw = 0x02, + }, + [AB8500_EXT_SUPPLY2] = { + .desc = { + .name = "VEXTSUPPLY2", + .of_match = of_match_ptr("ab8500_ext2"), + .ops = &ab8500_ext_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_EXT_SUPPLY2, + .owner = THIS_MODULE, + .n_voltages = 1, + }, + .update_bank = 0x04, + .update_reg = 0x08, + .update_mask = 0x0c, + .update_val = 0x04, + .update_val_hp = 0x04, + .update_val_lp = 0x0c, + .update_val_hw = 0x08, + }, + [AB8500_EXT_SUPPLY3] = { + .desc = { + .name = "VEXTSUPPLY3", + .of_match = of_match_ptr("ab8500_ext3"), + .ops = &ab8500_ext_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_EXT_SUPPLY3, + .owner = THIS_MODULE, + .n_voltages = 1, + }, + .update_bank = 0x04, + .update_reg = 0x08, + .update_mask = 0x30, + .update_val = 0x10, + .update_val_hp = 0x10, + .update_val_lp = 0x30, + .update_val_hw = 0x20, + }, +}; + +static int ab8500_ext_regulator_probe(struct platform_device *pdev) +{ + struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + if (!ab8500) { + dev_err(&pdev->dev, "null mfd parent\n"); + return -EINVAL; + } + + /* check for AB8500 2.x */ + if (is_ab8500_2p0_or_earlier(ab8500)) { + struct ab8500_ext_regulator_info *info; + + /* VextSupply3LPn is inverted on AB8500 2.x */ + info = &ab8500_ext_regulator_info[AB8500_EXT_SUPPLY3]; + info->update_val = 0x30; + info->update_val_hp = 0x30; + info->update_val_lp = 0x10; + } + + /* register all regulators */ + for (i = 0; i < ARRAY_SIZE(ab8500_ext_regulator_info); i++) { + struct ab8500_ext_regulator_info *info = NULL; + + /* assign per-regulator data */ + info = &ab8500_ext_regulator_info[i]; + info->dev = &pdev->dev; + info->cfg = (struct ab8500_ext_regulator_cfg *) + ab8500_ext_regulators[i].driver_data; + + config.dev = &pdev->dev; + config.driver_data = info; + config.init_data = &ab8500_ext_regulators[i]; + + /* register regulator with framework */ + rdev = devm_regulator_register(&pdev->dev, &info->desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + + dev_dbg(&pdev->dev, "%s-probed\n", info->desc.name); + } + + return 0; +} + +static struct platform_driver ab8500_ext_regulator_driver = { + .probe = ab8500_ext_regulator_probe, + .driver = { + .name = "ab8500-ext-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init ab8500_ext_regulator_init(void) +{ + int ret; + + ret = platform_driver_register(&ab8500_ext_regulator_driver); + if (ret) + pr_err("Failed to register ab8500 ext regulator: %d\n", ret); + + return ret; +} +subsys_initcall(ab8500_ext_regulator_init); + +static void __exit ab8500_ext_regulator_exit(void) +{ + platform_driver_unregister(&ab8500_ext_regulator_driver); +} +module_exit(ab8500_ext_regulator_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Bengt Jonsson "); +MODULE_DESCRIPTION("AB8500 external regulator driver"); +MODULE_ALIAS("platform:ab8500-ext-regulator"); diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c new file mode 100644 index 000000000..3705c98b0 --- /dev/null +++ b/drivers/regulator/ab8500.c @@ -0,0 +1,1766 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Authors: Sundar Iyer for ST-Ericsson + * Bengt Jonsson for ST-Ericsson + * Daniel Willerud for ST-Ericsson + * + * AB8500 peripheral regulators + * + * AB8500 supports the following regulators: + * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA + * + * AB8505 supports the following regulators: + * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* AB8500 regulators */ +enum ab8500_regulator_id { + AB8500_LDO_AUX1, + AB8500_LDO_AUX2, + AB8500_LDO_AUX3, + AB8500_LDO_INTCORE, + AB8500_LDO_TVOUT, + AB8500_LDO_AUDIO, + AB8500_LDO_ANAMIC1, + AB8500_LDO_ANAMIC2, + AB8500_LDO_DMIC, + AB8500_LDO_ANA, + AB8500_NUM_REGULATORS, +}; + +/* AB8505 regulators */ +enum ab8505_regulator_id { + AB8505_LDO_AUX1, + AB8505_LDO_AUX2, + AB8505_LDO_AUX3, + AB8505_LDO_AUX4, + AB8505_LDO_AUX5, + AB8505_LDO_AUX6, + AB8505_LDO_INTCORE, + AB8505_LDO_ADC, + AB8505_LDO_AUDIO, + AB8505_LDO_ANAMIC1, + AB8505_LDO_ANAMIC2, + AB8505_LDO_AUX8, + AB8505_LDO_ANA, + AB8505_NUM_REGULATORS, +}; + +/* AB8500 registers */ +enum ab8500_regulator_reg { + AB8500_REGUREQUESTCTRL2, + AB8500_REGUREQUESTCTRL3, + AB8500_REGUREQUESTCTRL4, + AB8500_REGUSYSCLKREQ1HPVALID1, + AB8500_REGUSYSCLKREQ1HPVALID2, + AB8500_REGUHWHPREQ1VALID1, + AB8500_REGUHWHPREQ1VALID2, + AB8500_REGUHWHPREQ2VALID1, + AB8500_REGUHWHPREQ2VALID2, + AB8500_REGUSWHPREQVALID1, + AB8500_REGUSWHPREQVALID2, + AB8500_REGUSYSCLKREQVALID1, + AB8500_REGUSYSCLKREQVALID2, + AB8500_REGUMISC1, + AB8500_VAUDIOSUPPLY, + AB8500_REGUCTRL1VAMIC, + AB8500_VPLLVANAREGU, + AB8500_VREFDDR, + AB8500_EXTSUPPLYREGU, + AB8500_VAUX12REGU, + AB8500_VRF1VAUX3REGU, + AB8500_VAUX1SEL, + AB8500_VAUX2SEL, + AB8500_VRF1VAUX3SEL, + AB8500_REGUCTRL2SPARE, + AB8500_REGUCTRLDISCH, + AB8500_REGUCTRLDISCH2, + AB8500_NUM_REGULATOR_REGISTERS, +}; + +/* AB8505 registers */ +enum ab8505_regulator_reg { + AB8505_REGUREQUESTCTRL1, + AB8505_REGUREQUESTCTRL2, + AB8505_REGUREQUESTCTRL3, + AB8505_REGUREQUESTCTRL4, + AB8505_REGUSYSCLKREQ1HPVALID1, + AB8505_REGUSYSCLKREQ1HPVALID2, + AB8505_REGUHWHPREQ1VALID1, + AB8505_REGUHWHPREQ1VALID2, + AB8505_REGUHWHPREQ2VALID1, + AB8505_REGUHWHPREQ2VALID2, + AB8505_REGUSWHPREQVALID1, + AB8505_REGUSWHPREQVALID2, + AB8505_REGUSYSCLKREQVALID1, + AB8505_REGUSYSCLKREQVALID2, + AB8505_REGUVAUX4REQVALID, + AB8505_REGUMISC1, + AB8505_VAUDIOSUPPLY, + AB8505_REGUCTRL1VAMIC, + AB8505_VSMPSAREGU, + AB8505_VSMPSBREGU, + AB8505_VSAFEREGU, /* NOTE! PRCMU register */ + AB8505_VPLLVANAREGU, + AB8505_EXTSUPPLYREGU, + AB8505_VAUX12REGU, + AB8505_VRF1VAUX3REGU, + AB8505_VSMPSASEL1, + AB8505_VSMPSASEL2, + AB8505_VSMPSASEL3, + AB8505_VSMPSBSEL1, + AB8505_VSMPSBSEL2, + AB8505_VSMPSBSEL3, + AB8505_VSAFESEL1, /* NOTE! PRCMU register */ + AB8505_VSAFESEL2, /* NOTE! PRCMU register */ + AB8505_VSAFESEL3, /* NOTE! PRCMU register */ + AB8505_VAUX1SEL, + AB8505_VAUX2SEL, + AB8505_VRF1VAUX3SEL, + AB8505_VAUX4REQCTRL, + AB8505_VAUX4REGU, + AB8505_VAUX4SEL, + AB8505_REGUCTRLDISCH, + AB8505_REGUCTRLDISCH2, + AB8505_REGUCTRLDISCH3, + AB8505_CTRLVAUX5, + AB8505_CTRLVAUX6, + AB8505_NUM_REGULATOR_REGISTERS, +}; + +/** + * struct ab8500_shared_mode - is used when mode is shared between + * two regulators. + * @shared_regulator: pointer to the other sharing regulator + * @lp_mode_req: low power mode requested by this regulator + */ +struct ab8500_shared_mode { + struct ab8500_regulator_info *shared_regulator; + bool lp_mode_req; +}; + +/** + * struct ab8500_regulator_info - ab8500 regulator information + * @dev: device pointer + * @desc: regulator description + * @shared_mode: used when mode is shared between two regulators + * @load_lp_uA: maximum load in idle (low power) mode + * @update_bank: bank to control on/off + * @update_reg: register to control on/off + * @update_mask: mask to enable/disable and set mode of regulator + * @update_val: bits holding the regulator current mode + * @update_val_idle: bits to enable the regulator in idle (low power) mode + * @update_val_normal: bits to enable the regulator in normal (high power) mode + * @mode_bank: bank with location of mode register + * @mode_reg: mode register + * @mode_mask: mask for setting mode + * @mode_val_idle: mode setting for low power + * @mode_val_normal: mode setting for normal power + * @voltage_bank: bank to control regulator voltage + * @voltage_reg: register to control regulator voltage + * @voltage_mask: mask to control regulator voltage + */ +struct ab8500_regulator_info { + struct device *dev; + struct regulator_desc desc; + struct ab8500_shared_mode *shared_mode; + int load_lp_uA; + u8 update_bank; + u8 update_reg; + u8 update_mask; + u8 update_val; + u8 update_val_idle; + u8 update_val_normal; + u8 mode_bank; + u8 mode_reg; + u8 mode_mask; + u8 mode_val_idle; + u8 mode_val_normal; + u8 voltage_bank; + u8 voltage_reg; + u8 voltage_mask; +}; + +/* voltage tables for the vauxn/vintcore supplies */ +static const unsigned int ldo_vauxn_voltages[] = { + 1100000, + 1200000, + 1300000, + 1400000, + 1500000, + 1800000, + 1850000, + 1900000, + 2500000, + 2650000, + 2700000, + 2750000, + 2800000, + 2900000, + 3000000, + 3300000, +}; + +static const unsigned int ldo_vaux3_voltages[] = { + 1200000, + 1500000, + 1800000, + 2100000, + 2500000, + 2750000, + 2790000, + 2910000, +}; + +static const unsigned int ldo_vaux56_voltages[] = { + 1800000, + 1050000, + 1100000, + 1200000, + 1500000, + 2200000, + 2500000, + 2790000, +}; + +static const unsigned int ldo_vintcore_voltages[] = { + 1200000, + 1225000, + 1250000, + 1275000, + 1300000, + 1325000, + 1350000, +}; + +static const unsigned int fixed_1200000_voltage[] = { + 1200000, +}; + +static const unsigned int fixed_1800000_voltage[] = { + 1800000, +}; + +static const unsigned int fixed_2000000_voltage[] = { + 2000000, +}; + +static const unsigned int fixed_2050000_voltage[] = { + 2050000, +}; + +static const unsigned int ldo_vana_voltages[] = { + 1050000, + 1075000, + 1100000, + 1125000, + 1150000, + 1175000, + 1200000, + 1225000, +}; + +static const unsigned int ldo_vaudio_voltages[] = { + 2000000, + 2100000, + 2200000, + 2300000, + 2400000, + 2500000, + 2600000, + 2600000, /* Duplicated in Vaudio and IsoUicc Control register. */ +}; + +static DEFINE_MUTEX(shared_mode_mutex); +static struct ab8500_shared_mode ldo_anamic1_shared; +static struct ab8500_shared_mode ldo_anamic2_shared; + +static int ab8500_regulator_enable(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->update_bank, info->update_reg, + info->update_mask, info->update_val); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't set enable bits for regulator\n"); + return ret; + } + + dev_vdbg(rdev_get_dev(rdev), + "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, info->update_val); + + return ret; +} + +static int ab8500_regulator_disable(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->update_bank, info->update_reg, + info->update_mask, 0x0); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't set disable bits for regulator\n"); + return ret; + } + + dev_vdbg(rdev_get_dev(rdev), + "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, 0x0); + + return ret; +} + +static int ab8500_regulator_is_enabled(struct regulator_dev *rdev) +{ + int ret; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + ret = abx500_get_register_interruptible(info->dev, + info->update_bank, info->update_reg, ®val); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't read 0x%x register\n", info->update_reg); + return ret; + } + + dev_vdbg(rdev_get_dev(rdev), + "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x," + " 0x%x\n", + info->desc.name, info->update_bank, info->update_reg, + info->update_mask, regval); + + if (regval & info->update_mask) + return 1; + else + return 0; +} + +static unsigned int ab8500_regulator_get_optimum_mode( + struct regulator_dev *rdev, int input_uV, + int output_uV, int load_uA) +{ + unsigned int mode; + + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + if (load_uA <= info->load_lp_uA) + mode = REGULATOR_MODE_IDLE; + else + mode = REGULATOR_MODE_NORMAL; + + return mode; +} + +static int ab8500_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + int ret = 0; + u8 bank, reg, mask, val; + bool lp_mode_req = false; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + if (info->mode_mask) { + bank = info->mode_bank; + reg = info->mode_reg; + mask = info->mode_mask; + } else { + bank = info->update_bank; + reg = info->update_reg; + mask = info->update_mask; + } + + if (info->shared_mode) + mutex_lock(&shared_mode_mutex); + + switch (mode) { + case REGULATOR_MODE_NORMAL: + if (info->shared_mode) + lp_mode_req = false; + + if (info->mode_mask) + val = info->mode_val_normal; + else + val = info->update_val_normal; + break; + case REGULATOR_MODE_IDLE: + if (info->shared_mode) { + struct ab8500_regulator_info *shared_regulator; + + shared_regulator = info->shared_mode->shared_regulator; + if (!shared_regulator->shared_mode->lp_mode_req) { + /* Other regulator prevent LP mode */ + info->shared_mode->lp_mode_req = true; + goto out_unlock; + } + + lp_mode_req = true; + } + + if (info->mode_mask) + val = info->mode_val_idle; + else + val = info->update_val_idle; + break; + default: + ret = -EINVAL; + goto out_unlock; + } + + if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) { + ret = abx500_mask_and_set_register_interruptible(info->dev, + bank, reg, mask, val); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't set regulator mode\n"); + goto out_unlock; + } + + dev_vdbg(rdev_get_dev(rdev), + "%s-set_mode (bank, reg, mask, value): " + "0x%x, 0x%x, 0x%x, 0x%x\n", + info->desc.name, bank, reg, + mask, val); + } + + if (!info->mode_mask) + info->update_val = val; + + if (info->shared_mode) + info->shared_mode->lp_mode_req = lp_mode_req; + +out_unlock: + if (info->shared_mode) + mutex_unlock(&shared_mode_mutex); + + return ret; +} + +static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev) +{ + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + u8 val; + u8 val_normal; + u8 val_idle; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + /* Need special handling for shared mode */ + if (info->shared_mode) { + if (info->shared_mode->lp_mode_req) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; + } + + if (info->mode_mask) { + /* Dedicated register for handling mode */ + ret = abx500_get_register_interruptible(info->dev, + info->mode_bank, info->mode_reg, &val); + val = val & info->mode_mask; + + val_normal = info->mode_val_normal; + val_idle = info->mode_val_idle; + } else { + /* Mode register same as enable register */ + val = info->update_val; + val_normal = info->update_val_normal; + val_idle = info->update_val_idle; + } + + if (val == val_normal) + ret = REGULATOR_MODE_NORMAL; + else if (val == val_idle) + ret = REGULATOR_MODE_IDLE; + else + ret = -EINVAL; + + return ret; +} + +static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + int ret, voltage_shift; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + voltage_shift = ffs(info->voltage_mask) - 1; + + ret = abx500_get_register_interruptible(info->dev, + info->voltage_bank, info->voltage_reg, ®val); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "couldn't read voltage reg for regulator\n"); + return ret; + } + + dev_vdbg(rdev_get_dev(rdev), + "%s-get_voltage (bank, reg, mask, shift, value): " + "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", + info->desc.name, info->voltage_bank, + info->voltage_reg, info->voltage_mask, + voltage_shift, regval); + + return (regval & info->voltage_mask) >> voltage_shift; +} + +static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + int ret, voltage_shift; + struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); + u8 regval; + + if (info == NULL) { + dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); + return -EINVAL; + } + + voltage_shift = ffs(info->voltage_mask) - 1; + + /* set the registers for the request */ + regval = (u8)selector << voltage_shift; + ret = abx500_mask_and_set_register_interruptible(info->dev, + info->voltage_bank, info->voltage_reg, + info->voltage_mask, regval); + if (ret < 0) + dev_err(rdev_get_dev(rdev), + "couldn't set voltage reg for regulator\n"); + + dev_vdbg(rdev_get_dev(rdev), + "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x," + " 0x%x\n", + info->desc.name, info->voltage_bank, info->voltage_reg, + info->voltage_mask, regval); + + return ret; +} + +static const struct regulator_ops ab8500_regulator_volt_mode_ops = { + .enable = ab8500_regulator_enable, + .disable = ab8500_regulator_disable, + .is_enabled = ab8500_regulator_is_enabled, + .get_optimum_mode = ab8500_regulator_get_optimum_mode, + .set_mode = ab8500_regulator_set_mode, + .get_mode = ab8500_regulator_get_mode, + .get_voltage_sel = ab8500_regulator_get_voltage_sel, + .set_voltage_sel = ab8500_regulator_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_ops ab8500_regulator_volt_ops = { + .enable = ab8500_regulator_enable, + .disable = ab8500_regulator_disable, + .is_enabled = ab8500_regulator_is_enabled, + .get_voltage_sel = ab8500_regulator_get_voltage_sel, + .set_voltage_sel = ab8500_regulator_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_ops ab8500_regulator_mode_ops = { + .enable = ab8500_regulator_enable, + .disable = ab8500_regulator_disable, + .is_enabled = ab8500_regulator_is_enabled, + .get_optimum_mode = ab8500_regulator_get_optimum_mode, + .set_mode = ab8500_regulator_set_mode, + .get_mode = ab8500_regulator_get_mode, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_ops ab8500_regulator_ops = { + .enable = ab8500_regulator_enable, + .disable = ab8500_regulator_disable, + .is_enabled = ab8500_regulator_is_enabled, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_ops ab8500_regulator_anamic_mode_ops = { + .enable = ab8500_regulator_enable, + .disable = ab8500_regulator_disable, + .is_enabled = ab8500_regulator_is_enabled, + .set_mode = ab8500_regulator_set_mode, + .get_mode = ab8500_regulator_get_mode, + .list_voltage = regulator_list_voltage_table, +}; + +/* AB8500 regulator information */ +static struct ab8500_regulator_info + ab8500_regulator_info[AB8500_NUM_REGULATORS] = { + /* + * Variable Voltage Regulators + * name, min mV, max mV, + * update bank, reg, mask, enable val + * volt bank, reg, mask + */ + [AB8500_LDO_AUX1] = { + .desc = { + .name = "LDO-AUX1", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_AUX1, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), + .volt_table = ldo_vauxn_voltages, + .enable_time = 200, + .supply_name = "vin", + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x09, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_idle = 0x03, + .update_val_normal = 0x01, + .voltage_bank = 0x04, + .voltage_reg = 0x1f, + .voltage_mask = 0x0f, + }, + [AB8500_LDO_AUX2] = { + .desc = { + .name = "LDO-AUX2", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_AUX2, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), + .volt_table = ldo_vauxn_voltages, + .enable_time = 200, + .supply_name = "vin", + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x09, + .update_mask = 0x0c, + .update_val = 0x04, + .update_val_idle = 0x0c, + .update_val_normal = 0x04, + .voltage_bank = 0x04, + .voltage_reg = 0x20, + .voltage_mask = 0x0f, + }, + [AB8500_LDO_AUX3] = { + .desc = { + .name = "LDO-AUX3", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_AUX3, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), + .volt_table = ldo_vaux3_voltages, + .enable_time = 450, + .supply_name = "vin", + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x0a, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_idle = 0x03, + .update_val_normal = 0x01, + .voltage_bank = 0x04, + .voltage_reg = 0x21, + .voltage_mask = 0x07, + }, + [AB8500_LDO_INTCORE] = { + .desc = { + .name = "LDO-INTCORE", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_INTCORE, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), + .volt_table = ldo_vintcore_voltages, + .enable_time = 750, + }, + .load_lp_uA = 5000, + .update_bank = 0x03, + .update_reg = 0x80, + .update_mask = 0x44, + .update_val = 0x44, + .update_val_idle = 0x44, + .update_val_normal = 0x04, + .voltage_bank = 0x03, + .voltage_reg = 0x80, + .voltage_mask = 0x38, + }, + + /* + * Fixed Voltage Regulators + * name, fixed mV, + * update bank, reg, mask, enable val + */ + [AB8500_LDO_TVOUT] = { + .desc = { + .name = "LDO-TVOUT", + .ops = &ab8500_regulator_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_TVOUT, + .owner = THIS_MODULE, + .n_voltages = 1, + .volt_table = fixed_2000000_voltage, + .enable_time = 500, + }, + .load_lp_uA = 1000, + .update_bank = 0x03, + .update_reg = 0x80, + .update_mask = 0x82, + .update_val = 0x02, + .update_val_idle = 0x82, + .update_val_normal = 0x02, + }, + [AB8500_LDO_AUDIO] = { + .desc = { + .name = "LDO-AUDIO", + .ops = &ab8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_AUDIO, + .owner = THIS_MODULE, + .n_voltages = 1, + .enable_time = 140, + .volt_table = fixed_2000000_voltage, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x02, + .update_val = 0x02, + }, + [AB8500_LDO_ANAMIC1] = { + .desc = { + .name = "LDO-ANAMIC1", + .ops = &ab8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_ANAMIC1, + .owner = THIS_MODULE, + .n_voltages = 1, + .enable_time = 500, + .volt_table = fixed_2050000_voltage, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x08, + .update_val = 0x08, + }, + [AB8500_LDO_ANAMIC2] = { + .desc = { + .name = "LDO-ANAMIC2", + .ops = &ab8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_ANAMIC2, + .owner = THIS_MODULE, + .n_voltages = 1, + .enable_time = 500, + .volt_table = fixed_2050000_voltage, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x10, + .update_val = 0x10, + }, + [AB8500_LDO_DMIC] = { + .desc = { + .name = "LDO-DMIC", + .ops = &ab8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_DMIC, + .owner = THIS_MODULE, + .n_voltages = 1, + .enable_time = 420, + .volt_table = fixed_1800000_voltage, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x04, + .update_val = 0x04, + }, + + /* + * Regulators with fixed voltage and normal/idle modes + */ + [AB8500_LDO_ANA] = { + .desc = { + .name = "LDO-ANA", + .ops = &ab8500_regulator_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8500_LDO_ANA, + .owner = THIS_MODULE, + .n_voltages = 1, + .enable_time = 140, + .volt_table = fixed_1200000_voltage, + }, + .load_lp_uA = 1000, + .update_bank = 0x04, + .update_reg = 0x06, + .update_mask = 0x0c, + .update_val = 0x04, + .update_val_idle = 0x0c, + .update_val_normal = 0x04, + }, +}; + +/* AB8505 regulator information */ +static struct ab8500_regulator_info + ab8505_regulator_info[AB8505_NUM_REGULATORS] = { + /* + * Variable Voltage Regulators + * name, min mV, max mV, + * update bank, reg, mask, enable val + * volt bank, reg, mask + */ + [AB8505_LDO_AUX1] = { + .desc = { + .name = "LDO-AUX1", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX1, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), + .volt_table = ldo_vauxn_voltages, + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x09, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_idle = 0x03, + .update_val_normal = 0x01, + .voltage_bank = 0x04, + .voltage_reg = 0x1f, + .voltage_mask = 0x0f, + }, + [AB8505_LDO_AUX2] = { + .desc = { + .name = "LDO-AUX2", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX2, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), + .volt_table = ldo_vauxn_voltages, + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x09, + .update_mask = 0x0c, + .update_val = 0x04, + .update_val_idle = 0x0c, + .update_val_normal = 0x04, + .voltage_bank = 0x04, + .voltage_reg = 0x20, + .voltage_mask = 0x0f, + }, + [AB8505_LDO_AUX3] = { + .desc = { + .name = "LDO-AUX3", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX3, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), + .volt_table = ldo_vaux3_voltages, + }, + .load_lp_uA = 5000, + .update_bank = 0x04, + .update_reg = 0x0a, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_idle = 0x03, + .update_val_normal = 0x01, + .voltage_bank = 0x04, + .voltage_reg = 0x21, + .voltage_mask = 0x07, + }, + [AB8505_LDO_AUX4] = { + .desc = { + .name = "LDO-AUX4", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX4, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), + .volt_table = ldo_vauxn_voltages, + }, + .load_lp_uA = 5000, + /* values for Vaux4Regu register */ + .update_bank = 0x04, + .update_reg = 0x2e, + .update_mask = 0x03, + .update_val = 0x01, + .update_val_idle = 0x03, + .update_val_normal = 0x01, + /* values for Vaux4SEL register */ + .voltage_bank = 0x04, + .voltage_reg = 0x2f, + .voltage_mask = 0x0f, + }, + [AB8505_LDO_AUX5] = { + .desc = { + .name = "LDO-AUX5", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX5, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages), + .volt_table = ldo_vaux56_voltages, + }, + .load_lp_uA = 2000, + /* values for CtrlVaux5 register */ + .update_bank = 0x01, + .update_reg = 0x55, + .update_mask = 0x18, + .update_val = 0x10, + .update_val_idle = 0x18, + .update_val_normal = 0x10, + .voltage_bank = 0x01, + .voltage_reg = 0x55, + .voltage_mask = 0x07, + }, + [AB8505_LDO_AUX6] = { + .desc = { + .name = "LDO-AUX6", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX6, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages), + .volt_table = ldo_vaux56_voltages, + }, + .load_lp_uA = 2000, + /* values for CtrlVaux6 register */ + .update_bank = 0x01, + .update_reg = 0x56, + .update_mask = 0x18, + .update_val = 0x10, + .update_val_idle = 0x18, + .update_val_normal = 0x10, + .voltage_bank = 0x01, + .voltage_reg = 0x56, + .voltage_mask = 0x07, + }, + [AB8505_LDO_INTCORE] = { + .desc = { + .name = "LDO-INTCORE", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_INTCORE, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), + .volt_table = ldo_vintcore_voltages, + }, + .load_lp_uA = 5000, + .update_bank = 0x03, + .update_reg = 0x80, + .update_mask = 0x44, + .update_val = 0x04, + .update_val_idle = 0x44, + .update_val_normal = 0x04, + .voltage_bank = 0x03, + .voltage_reg = 0x80, + .voltage_mask = 0x38, + }, + + /* + * Fixed Voltage Regulators + * name, fixed mV, + * update bank, reg, mask, enable val + */ + [AB8505_LDO_ADC] = { + .desc = { + .name = "LDO-ADC", + .ops = &ab8500_regulator_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_ADC, + .owner = THIS_MODULE, + .n_voltages = 1, + .volt_table = fixed_2000000_voltage, + .enable_time = 10000, + }, + .load_lp_uA = 1000, + .update_bank = 0x03, + .update_reg = 0x80, + .update_mask = 0x82, + .update_val = 0x02, + .update_val_idle = 0x82, + .update_val_normal = 0x02, + }, + [AB8505_LDO_AUDIO] = { + .desc = { + .name = "LDO-AUDIO", + .ops = &ab8500_regulator_volt_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUDIO, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vaudio_voltages), + .volt_table = ldo_vaudio_voltages, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x02, + .update_val = 0x02, + .voltage_bank = 0x01, + .voltage_reg = 0x57, + .voltage_mask = 0x70, + }, + [AB8505_LDO_ANAMIC1] = { + .desc = { + .name = "LDO-ANAMIC1", + .ops = &ab8500_regulator_anamic_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_ANAMIC1, + .owner = THIS_MODULE, + .n_voltages = 1, + .volt_table = fixed_2050000_voltage, + }, + .shared_mode = &ldo_anamic1_shared, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x08, + .update_val = 0x08, + .mode_bank = 0x01, + .mode_reg = 0x54, + .mode_mask = 0x04, + .mode_val_idle = 0x04, + .mode_val_normal = 0x00, + }, + [AB8505_LDO_ANAMIC2] = { + .desc = { + .name = "LDO-ANAMIC2", + .ops = &ab8500_regulator_anamic_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_ANAMIC2, + .owner = THIS_MODULE, + .n_voltages = 1, + .volt_table = fixed_2050000_voltage, + }, + .shared_mode = &ldo_anamic2_shared, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x10, + .update_val = 0x10, + .mode_bank = 0x01, + .mode_reg = 0x54, + .mode_mask = 0x04, + .mode_val_idle = 0x04, + .mode_val_normal = 0x00, + }, + [AB8505_LDO_AUX8] = { + .desc = { + .name = "LDO-AUX8", + .ops = &ab8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_AUX8, + .owner = THIS_MODULE, + .n_voltages = 1, + .volt_table = fixed_1800000_voltage, + }, + .update_bank = 0x03, + .update_reg = 0x83, + .update_mask = 0x04, + .update_val = 0x04, + }, + /* + * Regulators with fixed voltage and normal/idle modes + */ + [AB8505_LDO_ANA] = { + .desc = { + .name = "LDO-ANA", + .ops = &ab8500_regulator_volt_mode_ops, + .type = REGULATOR_VOLTAGE, + .id = AB8505_LDO_ANA, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(ldo_vana_voltages), + .volt_table = ldo_vana_voltages, + }, + .load_lp_uA = 1000, + .update_bank = 0x04, + .update_reg = 0x06, + .update_mask = 0x0c, + .update_val = 0x04, + .update_val_idle = 0x0c, + .update_val_normal = 0x04, + .voltage_bank = 0x04, + .voltage_reg = 0x29, + .voltage_mask = 0x7, + }, +}; + +static struct ab8500_shared_mode ldo_anamic1_shared = { + .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2], +}; + +static struct ab8500_shared_mode ldo_anamic2_shared = { + .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1], +}; + +struct ab8500_reg_init { + u8 bank; + u8 addr; + u8 mask; +}; + +#define REG_INIT(_id, _bank, _addr, _mask) \ + [_id] = { \ + .bank = _bank, \ + .addr = _addr, \ + .mask = _mask, \ + } + +/* AB8500 register init */ +static struct ab8500_reg_init ab8500_reg_init[] = { + /* + * 0x30, VanaRequestCtrl + * 0xc0, VextSupply1RequestCtrl + */ + REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0), + /* + * 0x03, VextSupply2RequestCtrl + * 0x0c, VextSupply3RequestCtrl + * 0x30, Vaux1RequestCtrl + * 0xc0, Vaux2RequestCtrl + */ + REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff), + /* + * 0x03, Vaux3RequestCtrl + * 0x04, SwHPReq + */ + REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07), + /* + * 0x08, VanaSysClkReq1HPValid + * 0x20, Vaux1SysClkReq1HPValid + * 0x40, Vaux2SysClkReq1HPValid + * 0x80, Vaux3SysClkReq1HPValid + */ + REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8), + /* + * 0x10, VextSupply1SysClkReq1HPValid + * 0x20, VextSupply2SysClkReq1HPValid + * 0x40, VextSupply3SysClkReq1HPValid + */ + REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70), + /* + * 0x08, VanaHwHPReq1Valid + * 0x20, Vaux1HwHPReq1Valid + * 0x40, Vaux2HwHPReq1Valid + * 0x80, Vaux3HwHPReq1Valid + */ + REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8), + /* + * 0x01, VextSupply1HwHPReq1Valid + * 0x02, VextSupply2HwHPReq1Valid + * 0x04, VextSupply3HwHPReq1Valid + */ + REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07), + /* + * 0x08, VanaHwHPReq2Valid + * 0x20, Vaux1HwHPReq2Valid + * 0x40, Vaux2HwHPReq2Valid + * 0x80, Vaux3HwHPReq2Valid + */ + REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8), + /* + * 0x01, VextSupply1HwHPReq2Valid + * 0x02, VextSupply2HwHPReq2Valid + * 0x04, VextSupply3HwHPReq2Valid + */ + REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07), + /* + * 0x20, VanaSwHPReqValid + * 0x80, Vaux1SwHPReqValid + */ + REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0), + /* + * 0x01, Vaux2SwHPReqValid + * 0x02, Vaux3SwHPReqValid + * 0x04, VextSupply1SwHPReqValid + * 0x08, VextSupply2SwHPReqValid + * 0x10, VextSupply3SwHPReqValid + */ + REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f), + /* + * 0x02, SysClkReq2Valid1 + * 0x04, SysClkReq3Valid1 + * 0x08, SysClkReq4Valid1 + * 0x10, SysClkReq5Valid1 + * 0x20, SysClkReq6Valid1 + * 0x40, SysClkReq7Valid1 + * 0x80, SysClkReq8Valid1 + */ + REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe), + /* + * 0x02, SysClkReq2Valid2 + * 0x04, SysClkReq3Valid2 + * 0x08, SysClkReq4Valid2 + * 0x10, SysClkReq5Valid2 + * 0x20, SysClkReq6Valid2 + * 0x40, SysClkReq7Valid2 + * 0x80, SysClkReq8Valid2 + */ + REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe), + /* + * 0x02, VTVoutEna + * 0x04, Vintcore12Ena + * 0x38, Vintcore12Sel + * 0x40, Vintcore12LP + * 0x80, VTVoutLP + */ + REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe), + /* + * 0x02, VaudioEna + * 0x04, VdmicEna + * 0x08, Vamic1Ena + * 0x10, Vamic2Ena + */ + REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e), + /* + * 0x01, Vamic1_dzout + * 0x02, Vamic2_dzout + */ + REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), + /* + * 0x03, VpllRegu (NOTE! PRCMU register bits) + * 0x0c, VanaRegu + */ + REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f), + /* + * 0x01, VrefDDREna + * 0x02, VrefDDRSleepMode + */ + REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03), + /* + * 0x03, VextSupply1Regu + * 0x0c, VextSupply2Regu + * 0x30, VextSupply3Regu + * 0x40, ExtSupply2Bypass + * 0x80, ExtSupply3Bypass + */ + REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff), + /* + * 0x03, Vaux1Regu + * 0x0c, Vaux2Regu + */ + REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f), + /* + * 0x03, Vaux3Regu + */ + REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03), + /* + * 0x0f, Vaux1Sel + */ + REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f), + /* + * 0x0f, Vaux2Sel + */ + REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f), + /* + * 0x07, Vaux3Sel + */ + REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07), + /* + * 0x01, VextSupply12LP + */ + REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01), + /* + * 0x04, Vaux1Disch + * 0x08, Vaux2Disch + * 0x10, Vaux3Disch + * 0x20, Vintcore12Disch + * 0x40, VTVoutDisch + * 0x80, VaudioDisch + */ + REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc), + /* + * 0x02, VanaDisch + * 0x04, VdmicPullDownEna + * 0x10, VdmicDisch + */ + REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), +}; + +/* AB8505 register init */ +static struct ab8500_reg_init ab8505_reg_init[] = { + /* + * 0x03, VarmRequestCtrl + * 0x0c, VsmpsCRequestCtrl + * 0x30, VsmpsARequestCtrl + * 0xc0, VsmpsBRequestCtrl + */ + REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff), + /* + * 0x03, VsafeRequestCtrl + * 0x0c, VpllRequestCtrl + * 0x30, VanaRequestCtrl + */ + REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f), + /* + * 0x30, Vaux1RequestCtrl + * 0xc0, Vaux2RequestCtrl + */ + REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0), + /* + * 0x03, Vaux3RequestCtrl + * 0x04, SwHPReq + */ + REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07), + /* + * 0x01, VsmpsASysClkReq1HPValid + * 0x02, VsmpsBSysClkReq1HPValid + * 0x04, VsafeSysClkReq1HPValid + * 0x08, VanaSysClkReq1HPValid + * 0x10, VpllSysClkReq1HPValid + * 0x20, Vaux1SysClkReq1HPValid + * 0x40, Vaux2SysClkReq1HPValid + * 0x80, Vaux3SysClkReq1HPValid + */ + REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff), + /* + * 0x01, VsmpsCSysClkReq1HPValid + * 0x02, VarmSysClkReq1HPValid + * 0x04, VbbSysClkReq1HPValid + * 0x08, VsmpsMSysClkReq1HPValid + */ + REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f), + /* + * 0x01, VsmpsAHwHPReq1Valid + * 0x02, VsmpsBHwHPReq1Valid + * 0x04, VsafeHwHPReq1Valid + * 0x08, VanaHwHPReq1Valid + * 0x10, VpllHwHPReq1Valid + * 0x20, Vaux1HwHPReq1Valid + * 0x40, Vaux2HwHPReq1Valid + * 0x80, Vaux3HwHPReq1Valid + */ + REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff), + /* + * 0x08, VsmpsMHwHPReq1Valid + */ + REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08), + /* + * 0x01, VsmpsAHwHPReq2Valid + * 0x02, VsmpsBHwHPReq2Valid + * 0x04, VsafeHwHPReq2Valid + * 0x08, VanaHwHPReq2Valid + * 0x10, VpllHwHPReq2Valid + * 0x20, Vaux1HwHPReq2Valid + * 0x40, Vaux2HwHPReq2Valid + * 0x80, Vaux3HwHPReq2Valid + */ + REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff), + /* + * 0x08, VsmpsMHwHPReq2Valid + */ + REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08), + /* + * 0x01, VsmpsCSwHPReqValid + * 0x02, VarmSwHPReqValid + * 0x04, VsmpsASwHPReqValid + * 0x08, VsmpsBSwHPReqValid + * 0x10, VsafeSwHPReqValid + * 0x20, VanaSwHPReqValid + * 0x40, VpllSwHPReqValid + * 0x80, Vaux1SwHPReqValid + */ + REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff), + /* + * 0x01, Vaux2SwHPReqValid + * 0x02, Vaux3SwHPReqValid + * 0x20, VsmpsMSwHPReqValid + */ + REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23), + /* + * 0x02, SysClkReq2Valid1 + * 0x04, SysClkReq3Valid1 + * 0x08, SysClkReq4Valid1 + */ + REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e), + /* + * 0x02, SysClkReq2Valid2 + * 0x04, SysClkReq3Valid2 + * 0x08, SysClkReq4Valid2 + */ + REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e), + /* + * 0x01, Vaux4SwHPReqValid + * 0x02, Vaux4HwHPReq2Valid + * 0x04, Vaux4HwHPReq1Valid + * 0x08, Vaux4SysClkReq1HPValid + */ + REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f), + /* + * 0x02, VadcEna + * 0x04, VintCore12Ena + * 0x38, VintCore12Sel + * 0x40, VintCore12LP + * 0x80, VadcLP + */ + REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe), + /* + * 0x02, VaudioEna + * 0x04, VdmicEna + * 0x08, Vamic1Ena + * 0x10, Vamic2Ena + */ + REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e), + /* + * 0x01, Vamic1_dzout + * 0x02, Vamic2_dzout + */ + REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), + /* + * 0x03, VsmpsARegu + * 0x0c, VsmpsASelCtrl + * 0x10, VsmpsAAutoMode + * 0x20, VsmpsAPWMMode + */ + REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f), + /* + * 0x03, VsmpsBRegu + * 0x0c, VsmpsBSelCtrl + * 0x10, VsmpsBAutoMode + * 0x20, VsmpsBPWMMode + */ + REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f), + /* + * 0x03, VsafeRegu + * 0x0c, VsafeSelCtrl + * 0x10, VsafeAutoMode + * 0x20, VsafePWMMode + */ + REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f), + /* + * 0x03, VpllRegu (NOTE! PRCMU register bits) + * 0x0c, VanaRegu + */ + REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f), + /* + * 0x03, VextSupply1Regu + * 0x0c, VextSupply2Regu + * 0x30, VextSupply3Regu + * 0x40, ExtSupply2Bypass + * 0x80, ExtSupply3Bypass + */ + REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff), + /* + * 0x03, Vaux1Regu + * 0x0c, Vaux2Regu + */ + REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f), + /* + * 0x0f, Vaux3Regu + */ + REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f), + /* + * 0x3f, VsmpsASel1 + */ + REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f), + /* + * 0x3f, VsmpsASel2 + */ + REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f), + /* + * 0x3f, VsmpsASel3 + */ + REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f), + /* + * 0x3f, VsmpsBSel1 + */ + REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f), + /* + * 0x3f, VsmpsBSel2 + */ + REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f), + /* + * 0x3f, VsmpsBSel3 + */ + REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f), + /* + * 0x7f, VsafeSel1 + */ + REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f), + /* + * 0x3f, VsafeSel2 + */ + REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f), + /* + * 0x3f, VsafeSel3 + */ + REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f), + /* + * 0x0f, Vaux1Sel + */ + REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f), + /* + * 0x0f, Vaux2Sel + */ + REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f), + /* + * 0x07, Vaux3Sel + * 0x30, VRF1Sel + */ + REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37), + /* + * 0x03, Vaux4RequestCtrl + */ + REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03), + /* + * 0x03, Vaux4Regu + */ + REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03), + /* + * 0x0f, Vaux4Sel + */ + REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f), + /* + * 0x04, Vaux1Disch + * 0x08, Vaux2Disch + * 0x10, Vaux3Disch + * 0x20, Vintcore12Disch + * 0x40, VTVoutDisch + * 0x80, VaudioDisch + */ + REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc), + /* + * 0x02, VanaDisch + * 0x04, VdmicPullDownEna + * 0x10, VdmicDisch + */ + REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16), + /* + * 0x01, Vaux4Disch + */ + REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01), + /* + * 0x07, Vaux5Sel + * 0x08, Vaux5LP + * 0x10, Vaux5Ena + * 0x20, Vaux5Disch + * 0x40, Vaux5DisSfst + * 0x80, Vaux5DisPulld + */ + REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff), + /* + * 0x07, Vaux6Sel + * 0x08, Vaux6LP + * 0x10, Vaux6Ena + * 0x80, Vaux6DisPulld + */ + REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f), +}; + +static struct of_regulator_match ab8500_regulator_match[] = { + { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, }, + { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, }, + { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, }, + { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, }, + { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, }, + { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, }, + { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, }, + { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, }, + { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, }, + { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, }, +}; + +static struct of_regulator_match ab8505_regulator_match[] = { + { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, }, + { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, }, + { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, }, + { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, }, + { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, }, + { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, }, + { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, }, + { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, }, + { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, }, + { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, }, + { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, }, + { .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, }, + { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, }, +}; + +static struct { + struct ab8500_regulator_info *info; + int info_size; + struct ab8500_reg_init *init; + int init_size; + struct of_regulator_match *match; + int match_size; +} abx500_regulator; + +static void abx500_get_regulator_info(struct ab8500 *ab8500) +{ + if (is_ab8505(ab8500)) { + abx500_regulator.info = ab8505_regulator_info; + abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info); + abx500_regulator.init = ab8505_reg_init; + abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS; + abx500_regulator.match = ab8505_regulator_match; + abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match); + } else { + abx500_regulator.info = ab8500_regulator_info; + abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info); + abx500_regulator.init = ab8500_reg_init; + abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS; + abx500_regulator.match = ab8500_regulator_match; + abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match); + } +} + +static int ab8500_regulator_register(struct platform_device *pdev, + struct regulator_init_data *init_data, + int id, struct device_node *np) +{ + struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); + struct ab8500_regulator_info *info = NULL; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + /* assign per-regulator data */ + info = &abx500_regulator.info[id]; + info->dev = &pdev->dev; + + config.dev = &pdev->dev; + config.init_data = init_data; + config.driver_data = info; + config.of_node = np; + + /* fix for hardware before ab8500v2.0 */ + if (is_ab8500_1p1_or_earlier(ab8500)) { + if (info->desc.id == AB8500_LDO_AUX3) { + info->desc.n_voltages = + ARRAY_SIZE(ldo_vauxn_voltages); + info->desc.volt_table = ldo_vauxn_voltages; + info->voltage_mask = 0xf; + } + } + + /* register regulator with framework */ + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + + return 0; +} + +static int ab8500_regulator_probe(struct platform_device *pdev) +{ + struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); + struct device_node *np = pdev->dev.of_node; + struct of_regulator_match *match; + int err, i; + + if (!ab8500) { + dev_err(&pdev->dev, "null mfd parent\n"); + return -EINVAL; + } + + abx500_get_regulator_info(ab8500); + + err = of_regulator_match(&pdev->dev, np, + abx500_regulator.match, + abx500_regulator.match_size); + if (err < 0) { + dev_err(&pdev->dev, + "Error parsing regulator init data: %d\n", err); + return err; + } + + match = abx500_regulator.match; + for (i = 0; i < abx500_regulator.info_size; i++) { + err = ab8500_regulator_register(pdev, match[i].init_data, i, + match[i].of_node); + if (err) + return err; + } + + return 0; +} + +static struct platform_driver ab8500_regulator_driver = { + .probe = ab8500_regulator_probe, + .driver = { + .name = "ab8500-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init ab8500_regulator_init(void) +{ + int ret; + + ret = platform_driver_register(&ab8500_regulator_driver); + if (ret != 0) + pr_err("Failed to register ab8500 regulator: %d\n", ret); + + return ret; +} +subsys_initcall(ab8500_regulator_init); + +static void __exit ab8500_regulator_exit(void) +{ + platform_driver_unregister(&ab8500_regulator_driver); +} +module_exit(ab8500_regulator_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Sundar Iyer "); +MODULE_AUTHOR("Bengt Jonsson "); +MODULE_AUTHOR("Daniel Willerud "); +MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC"); +MODULE_ALIAS("platform:ab8500-regulator"); diff --git a/drivers/regulator/act8865-regulator.c b/drivers/regulator/act8865-regulator.c new file mode 100644 index 000000000..882b6e58e --- /dev/null +++ b/drivers/regulator/act8865-regulator.c @@ -0,0 +1,800 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * act8865-regulator.c - Voltage regulation for active-semi ACT88xx PMUs + * + * http://www.active-semi.com/products/power-management-units/act88xx/ + * + * Copyright (C) 2013 Atmel Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * ACT8600 Global Register Map. + */ +#define ACT8600_SYS_MODE 0x00 +#define ACT8600_SYS_CTRL 0x01 +#define ACT8600_DCDC1_VSET 0x10 +#define ACT8600_DCDC1_CTRL 0x12 +#define ACT8600_DCDC2_VSET 0x20 +#define ACT8600_DCDC2_CTRL 0x22 +#define ACT8600_DCDC3_VSET 0x30 +#define ACT8600_DCDC3_CTRL 0x32 +#define ACT8600_SUDCDC4_VSET 0x40 +#define ACT8600_SUDCDC4_CTRL 0x41 +#define ACT8600_LDO5_VSET 0x50 +#define ACT8600_LDO5_CTRL 0x51 +#define ACT8600_LDO6_VSET 0x60 +#define ACT8600_LDO6_CTRL 0x61 +#define ACT8600_LDO7_VSET 0x70 +#define ACT8600_LDO7_CTRL 0x71 +#define ACT8600_LDO8_VSET 0x80 +#define ACT8600_LDO8_CTRL 0x81 +#define ACT8600_LDO910_CTRL 0x91 +#define ACT8600_APCH0 0xA1 +#define ACT8600_APCH1 0xA8 +#define ACT8600_APCH2 0xA9 +#define ACT8600_APCH_STAT 0xAA +#define ACT8600_OTG0 0xB0 +#define ACT8600_OTG1 0xB2 + +/* + * ACT8846 Global Register Map. + */ +#define ACT8846_SYS0 0x00 +#define ACT8846_SYS1 0x01 +#define ACT8846_REG1_VSET 0x10 +#define ACT8846_REG1_CTRL 0x12 +#define ACT8846_REG2_VSET0 0x20 +#define ACT8846_REG2_VSET1 0x21 +#define ACT8846_REG2_CTRL 0x22 +#define ACT8846_REG3_VSET0 0x30 +#define ACT8846_REG3_VSET1 0x31 +#define ACT8846_REG3_CTRL 0x32 +#define ACT8846_REG4_VSET0 0x40 +#define ACT8846_REG4_VSET1 0x41 +#define ACT8846_REG4_CTRL 0x42 +#define ACT8846_REG5_VSET 0x50 +#define ACT8846_REG5_CTRL 0x51 +#define ACT8846_REG6_VSET 0x58 +#define ACT8846_REG6_CTRL 0x59 +#define ACT8846_REG7_VSET 0x60 +#define ACT8846_REG7_CTRL 0x61 +#define ACT8846_REG8_VSET 0x68 +#define ACT8846_REG8_CTRL 0x69 +#define ACT8846_REG9_VSET 0x70 +#define ACT8846_REG9_CTRL 0x71 +#define ACT8846_REG10_VSET 0x80 +#define ACT8846_REG10_CTRL 0x81 +#define ACT8846_REG11_VSET 0x90 +#define ACT8846_REG11_CTRL 0x91 +#define ACT8846_REG12_VSET 0xa0 +#define ACT8846_REG12_CTRL 0xa1 +#define ACT8846_REG13_CTRL 0xb1 +#define ACT8846_GLB_OFF_CTRL 0xc3 +#define ACT8846_OFF_SYSMASK 0x18 + +/* + * ACT8865 Global Register Map. + */ +#define ACT8865_SYS_MODE 0x00 +#define ACT8865_SYS_CTRL 0x01 +#define ACT8865_SYS_UNLK_REGS 0x0b +#define ACT8865_DCDC1_VSET1 0x20 +#define ACT8865_DCDC1_VSET2 0x21 +#define ACT8865_DCDC1_CTRL 0x22 +#define ACT8865_DCDC1_SUS 0x24 +#define ACT8865_DCDC2_VSET1 0x30 +#define ACT8865_DCDC2_VSET2 0x31 +#define ACT8865_DCDC2_CTRL 0x32 +#define ACT8865_DCDC2_SUS 0x34 +#define ACT8865_DCDC3_VSET1 0x40 +#define ACT8865_DCDC3_VSET2 0x41 +#define ACT8865_DCDC3_CTRL 0x42 +#define ACT8865_DCDC3_SUS 0x44 +#define ACT8865_LDO1_VSET 0x50 +#define ACT8865_LDO1_CTRL 0x51 +#define ACT8865_LDO1_SUS 0x52 +#define ACT8865_LDO2_VSET 0x54 +#define ACT8865_LDO2_CTRL 0x55 +#define ACT8865_LDO2_SUS 0x56 +#define ACT8865_LDO3_VSET 0x60 +#define ACT8865_LDO3_CTRL 0x61 +#define ACT8865_LDO3_SUS 0x62 +#define ACT8865_LDO4_VSET 0x64 +#define ACT8865_LDO4_CTRL 0x65 +#define ACT8865_LDO4_SUS 0x66 +#define ACT8865_MSTROFF 0x20 + +/* + * Field Definitions. + */ +#define ACT8865_ENA 0x80 /* ON - [7] */ +#define ACT8865_DIS 0x40 /* DIS - [6] */ + +#define ACT8865_VSEL_MASK 0x3F /* VSET - [5:0] */ + + +#define ACT8600_LDO10_ENA 0x40 /* ON - [6] */ +#define ACT8600_SUDCDC_VSEL_MASK 0xFF /* SUDCDC VSET - [7:0] */ + +#define ACT8600_APCH_CHG_ACIN BIT(7) +#define ACT8600_APCH_CHG_USB BIT(6) +#define ACT8600_APCH_CSTATE0 BIT(5) +#define ACT8600_APCH_CSTATE1 BIT(4) + +/* + * ACT8865 voltage number + */ +#define ACT8865_VOLTAGE_NUM 64 +#define ACT8600_SUDCDC_VOLTAGE_NUM 256 + +struct act8865 { + struct regmap *regmap; + int off_reg; + int off_mask; +}; + +static const struct regmap_range act8600_reg_ranges[] = { + regmap_reg_range(0x00, 0x01), + regmap_reg_range(0x10, 0x10), + regmap_reg_range(0x12, 0x12), + regmap_reg_range(0x20, 0x20), + regmap_reg_range(0x22, 0x22), + regmap_reg_range(0x30, 0x30), + regmap_reg_range(0x32, 0x32), + regmap_reg_range(0x40, 0x41), + regmap_reg_range(0x50, 0x51), + regmap_reg_range(0x60, 0x61), + regmap_reg_range(0x70, 0x71), + regmap_reg_range(0x80, 0x81), + regmap_reg_range(0x91, 0x91), + regmap_reg_range(0xA1, 0xA1), + regmap_reg_range(0xA8, 0xAA), + regmap_reg_range(0xB0, 0xB0), + regmap_reg_range(0xB2, 0xB2), + regmap_reg_range(0xC1, 0xC1), +}; + +static const struct regmap_range act8600_reg_ro_ranges[] = { + regmap_reg_range(0xAA, 0xAA), + regmap_reg_range(0xC1, 0xC1), +}; + +static const struct regmap_range act8600_reg_volatile_ranges[] = { + regmap_reg_range(0x00, 0x01), + regmap_reg_range(0x12, 0x12), + regmap_reg_range(0x22, 0x22), + regmap_reg_range(0x32, 0x32), + regmap_reg_range(0x41, 0x41), + regmap_reg_range(0x51, 0x51), + regmap_reg_range(0x61, 0x61), + regmap_reg_range(0x71, 0x71), + regmap_reg_range(0x81, 0x81), + regmap_reg_range(0xA8, 0xA8), + regmap_reg_range(0xAA, 0xAA), + regmap_reg_range(0xB0, 0xB0), + regmap_reg_range(0xC1, 0xC1), +}; + +static const struct regmap_access_table act8600_write_ranges_table = { + .yes_ranges = act8600_reg_ranges, + .n_yes_ranges = ARRAY_SIZE(act8600_reg_ranges), + .no_ranges = act8600_reg_ro_ranges, + .n_no_ranges = ARRAY_SIZE(act8600_reg_ro_ranges), +}; + +static const struct regmap_access_table act8600_read_ranges_table = { + .yes_ranges = act8600_reg_ranges, + .n_yes_ranges = ARRAY_SIZE(act8600_reg_ranges), +}; + +static const struct regmap_access_table act8600_volatile_ranges_table = { + .yes_ranges = act8600_reg_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(act8600_reg_volatile_ranges), +}; + +static const struct regmap_config act8600_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xFF, + .wr_table = &act8600_write_ranges_table, + .rd_table = &act8600_read_ranges_table, + .volatile_table = &act8600_volatile_ranges_table, +}; + +static const struct regmap_config act8865_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct linear_range act8865_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000), + REGULATOR_LINEAR_RANGE(1200000, 24, 47, 50000), + REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000), +}; + +static const struct linear_range act8600_sudcdc_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(3000000, 0, 63, 0), + REGULATOR_LINEAR_RANGE(3000000, 64, 159, 100000), + REGULATOR_LINEAR_RANGE(12600000, 160, 191, 200000), + REGULATOR_LINEAR_RANGE(19000000, 192, 247, 400000), + REGULATOR_LINEAR_RANGE(41400000, 248, 255, 0), +}; + +static int act8865_set_suspend_state(struct regulator_dev *rdev, bool enable) +{ + struct regmap *regmap = rdev->regmap; + int id = rdev->desc->id, reg, val; + + switch (id) { + case ACT8865_ID_DCDC1: + reg = ACT8865_DCDC1_SUS; + val = 0xa8; + break; + case ACT8865_ID_DCDC2: + reg = ACT8865_DCDC2_SUS; + val = 0xa8; + break; + case ACT8865_ID_DCDC3: + reg = ACT8865_DCDC3_SUS; + val = 0xa8; + break; + case ACT8865_ID_LDO1: + reg = ACT8865_LDO1_SUS; + val = 0xe8; + break; + case ACT8865_ID_LDO2: + reg = ACT8865_LDO2_SUS; + val = 0xe8; + break; + case ACT8865_ID_LDO3: + reg = ACT8865_LDO3_SUS; + val = 0xe8; + break; + case ACT8865_ID_LDO4: + reg = ACT8865_LDO4_SUS; + val = 0xe8; + break; + default: + return -EINVAL; + } + + if (enable) + val |= BIT(4); + + /* + * Ask the PMIC to enable/disable this output when entering hibernate + * mode. + */ + return regmap_write(regmap, reg, val); +} + +static int act8865_set_suspend_enable(struct regulator_dev *rdev) +{ + return act8865_set_suspend_state(rdev, true); +} + +static int act8865_set_suspend_disable(struct regulator_dev *rdev) +{ + return act8865_set_suspend_state(rdev, false); +} + +static unsigned int act8865_of_map_mode(unsigned int mode) +{ + switch (mode) { + case ACT8865_REGULATOR_MODE_FIXED: + return REGULATOR_MODE_FAST; + case ACT8865_REGULATOR_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case ACT8865_REGULATOR_MODE_LOWPOWER: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int act8865_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev->regmap; + int id = rdev_get_id(rdev); + int reg, val = 0; + + switch (id) { + case ACT8865_ID_DCDC1: + reg = ACT8865_DCDC1_CTRL; + break; + case ACT8865_ID_DCDC2: + reg = ACT8865_DCDC2_CTRL; + break; + case ACT8865_ID_DCDC3: + reg = ACT8865_DCDC3_CTRL; + break; + case ACT8865_ID_LDO1: + reg = ACT8865_LDO1_CTRL; + break; + case ACT8865_ID_LDO2: + reg = ACT8865_LDO2_CTRL; + break; + case ACT8865_ID_LDO3: + reg = ACT8865_LDO3_CTRL; + break; + case ACT8865_ID_LDO4: + reg = ACT8865_LDO4_CTRL; + break; + default: + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_FAST: + case REGULATOR_MODE_NORMAL: + if (id <= ACT8865_ID_DCDC3) + val = BIT(5); + break; + case REGULATOR_MODE_STANDBY: + if (id > ACT8865_ID_DCDC3) + val = BIT(5); + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, reg, BIT(5), val); +} + +static unsigned int act8865_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev->regmap; + int id = rdev_get_id(rdev); + int reg, ret, val = 0; + + switch (id) { + case ACT8865_ID_DCDC1: + reg = ACT8865_DCDC1_CTRL; + break; + case ACT8865_ID_DCDC2: + reg = ACT8865_DCDC2_CTRL; + break; + case ACT8865_ID_DCDC3: + reg = ACT8865_DCDC3_CTRL; + break; + case ACT8865_ID_LDO1: + reg = ACT8865_LDO1_CTRL; + break; + case ACT8865_ID_LDO2: + reg = ACT8865_LDO2_CTRL; + break; + case ACT8865_ID_LDO3: + reg = ACT8865_LDO3_CTRL; + break; + case ACT8865_ID_LDO4: + reg = ACT8865_LDO4_CTRL; + break; + default: + return -EINVAL; + } + + ret = regmap_read(regmap, reg, &val); + if (ret) + return ret; + + if (id <= ACT8865_ID_DCDC3 && (val & BIT(5))) + return REGULATOR_MODE_FAST; + else if (id > ACT8865_ID_DCDC3 && !(val & BIT(5))) + return REGULATOR_MODE_NORMAL; + else + return REGULATOR_MODE_STANDBY; +} + +static const struct regulator_ops act8865_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = act8865_set_mode, + .get_mode = act8865_get_mode, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = act8865_set_suspend_enable, + .set_suspend_disable = act8865_set_suspend_disable, +}; + +static const struct regulator_ops act8865_ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = act8865_set_mode, + .get_mode = act8865_get_mode, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = act8865_set_suspend_enable, + .set_suspend_disable = act8865_set_suspend_disable, + .set_pull_down = regulator_set_pull_down_regmap, +}; + +static const struct regulator_ops act8865_fixed_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, _ops) \ + [_family##_ID_##_id] = { \ + .name = _name, \ + .of_match = of_match_ptr(_name), \ + .of_map_mode = act8865_of_map_mode, \ + .regulators_node = of_match_ptr("regulators"), \ + .supply_name = _supply, \ + .id = _family##_ID_##_id, \ + .type = REGULATOR_VOLTAGE, \ + .ops = _ops, \ + .n_voltages = ACT8865_VOLTAGE_NUM, \ + .linear_ranges = act8865_voltage_ranges, \ + .n_linear_ranges = ARRAY_SIZE(act8865_voltage_ranges), \ + .vsel_reg = _family##_##_id##_##_vsel_reg, \ + .vsel_mask = ACT8865_VSEL_MASK, \ + .enable_reg = _family##_##_id##_CTRL, \ + .enable_mask = ACT8865_ENA, \ + .pull_down_reg = _family##_##_id##_CTRL, \ + .pull_down_mask = ACT8865_DIS, \ + .owner = THIS_MODULE, \ + } + +#define ACT88xx_REG(_name, _family, _id, _vsel_reg, _supply) \ + ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, &act8865_ops) + +#define ACT88xx_LDO(_name, _family, _id, _vsel_reg, _supply) \ + ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, &act8865_ldo_ops) + +static const struct regulator_desc act8600_regulators[] = { + ACT88xx_REG("DCDC1", ACT8600, DCDC1, VSET, "vp1"), + ACT88xx_REG("DCDC2", ACT8600, DCDC2, VSET, "vp2"), + ACT88xx_REG("DCDC3", ACT8600, DCDC3, VSET, "vp3"), + { + .name = "SUDCDC_REG4", + .of_match = of_match_ptr("SUDCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = ACT8600_ID_SUDCDC4, + .ops = &act8865_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = ACT8600_SUDCDC_VOLTAGE_NUM, + .linear_ranges = act8600_sudcdc_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(act8600_sudcdc_voltage_ranges), + .vsel_reg = ACT8600_SUDCDC4_VSET, + .vsel_mask = ACT8600_SUDCDC_VSEL_MASK, + .enable_reg = ACT8600_SUDCDC4_CTRL, + .enable_mask = ACT8865_ENA, + .owner = THIS_MODULE, + }, + ACT88xx_REG("LDO5", ACT8600, LDO5, VSET, "inl"), + ACT88xx_REG("LDO6", ACT8600, LDO6, VSET, "inl"), + ACT88xx_REG("LDO7", ACT8600, LDO7, VSET, "inl"), + ACT88xx_REG("LDO8", ACT8600, LDO8, VSET, "inl"), + { + .name = "LDO_REG9", + .of_match = of_match_ptr("LDO_REG9"), + .regulators_node = of_match_ptr("regulators"), + .id = ACT8600_ID_LDO9, + .ops = &act8865_fixed_ldo_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .fixed_uV = 3300000, + .enable_reg = ACT8600_LDO910_CTRL, + .enable_mask = ACT8865_ENA, + .owner = THIS_MODULE, + }, + { + .name = "LDO_REG10", + .of_match = of_match_ptr("LDO_REG10"), + .regulators_node = of_match_ptr("regulators"), + .id = ACT8600_ID_LDO10, + .ops = &act8865_fixed_ldo_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .fixed_uV = 1200000, + .enable_reg = ACT8600_LDO910_CTRL, + .enable_mask = ACT8600_LDO10_ENA, + .owner = THIS_MODULE, + }, +}; + +static const struct regulator_desc act8846_regulators[] = { + ACT88xx_REG("REG1", ACT8846, REG1, VSET, "vp1"), + ACT88xx_REG("REG2", ACT8846, REG2, VSET0, "vp2"), + ACT88xx_REG("REG3", ACT8846, REG3, VSET0, "vp3"), + ACT88xx_REG("REG4", ACT8846, REG4, VSET0, "vp4"), + ACT88xx_REG("REG5", ACT8846, REG5, VSET, "inl1"), + ACT88xx_REG("REG6", ACT8846, REG6, VSET, "inl1"), + ACT88xx_REG("REG7", ACT8846, REG7, VSET, "inl1"), + ACT88xx_REG("REG8", ACT8846, REG8, VSET, "inl2"), + ACT88xx_REG("REG9", ACT8846, REG9, VSET, "inl2"), + ACT88xx_REG("REG10", ACT8846, REG10, VSET, "inl3"), + ACT88xx_REG("REG11", ACT8846, REG11, VSET, "inl3"), + ACT88xx_REG("REG12", ACT8846, REG12, VSET, "inl3"), +}; + +static const struct regulator_desc act8865_regulators[] = { + ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET1, "vp1"), + ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1, "vp2"), + ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET1, "vp3"), + ACT88xx_LDO("LDO_REG1", ACT8865, LDO1, VSET, "inl45"), + ACT88xx_LDO("LDO_REG2", ACT8865, LDO2, VSET, "inl45"), + ACT88xx_LDO("LDO_REG3", ACT8865, LDO3, VSET, "inl67"), + ACT88xx_LDO("LDO_REG4", ACT8865, LDO4, VSET, "inl67"), +}; + +static const struct regulator_desc act8865_alt_regulators[] = { + ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET2, "vp1"), + ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET2, "vp2"), + ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET2, "vp3"), + ACT88xx_LDO("LDO_REG1", ACT8865, LDO1, VSET, "inl45"), + ACT88xx_LDO("LDO_REG2", ACT8865, LDO2, VSET, "inl45"), + ACT88xx_LDO("LDO_REG3", ACT8865, LDO3, VSET, "inl67"), + ACT88xx_LDO("LDO_REG4", ACT8865, LDO4, VSET, "inl67"), +}; + +#ifdef CONFIG_OF +static const struct of_device_id act8865_dt_ids[] = { + { .compatible = "active-semi,act8600", .data = (void *)ACT8600 }, + { .compatible = "active-semi,act8846", .data = (void *)ACT8846 }, + { .compatible = "active-semi,act8865", .data = (void *)ACT8865 }, + { } +}; +MODULE_DEVICE_TABLE(of, act8865_dt_ids); +#endif + +static struct act8865_regulator_data *act8865_get_regulator_data( + int id, struct act8865_platform_data *pdata) +{ + int i; + + for (i = 0; i < pdata->num_regulators; i++) { + if (pdata->regulators[i].id == id) + return &pdata->regulators[i]; + } + + return NULL; +} + +static struct i2c_client *act8865_i2c_client; +static void act8865_power_off(void) +{ + struct act8865 *act8865; + + act8865 = i2c_get_clientdata(act8865_i2c_client); + regmap_write(act8865->regmap, act8865->off_reg, act8865->off_mask); + while (1); +} + +static int act8600_charger_get_status(struct regmap *map) +{ + unsigned int val; + int ret; + u8 state0, state1; + + ret = regmap_read(map, ACT8600_APCH_STAT, &val); + if (ret < 0) + return ret; + + state0 = val & ACT8600_APCH_CSTATE0; + state1 = val & ACT8600_APCH_CSTATE1; + + if (state0 && !state1) + return POWER_SUPPLY_STATUS_CHARGING; + if (!state0 && state1) + return POWER_SUPPLY_STATUS_NOT_CHARGING; + if (!state0 && !state1) + return POWER_SUPPLY_STATUS_DISCHARGING; + + return POWER_SUPPLY_STATUS_UNKNOWN; +} + +static int act8600_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, union power_supply_propval *val) +{ + struct regmap *map = power_supply_get_drvdata(psy); + int ret; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + ret = act8600_charger_get_status(map); + if (ret < 0) + return ret; + + val->intval = ret; + break; + default: + return -EINVAL; + } + + return 0; +} + +static enum power_supply_property act8600_charger_properties[] = { + POWER_SUPPLY_PROP_STATUS, +}; + +static const struct power_supply_desc act8600_charger_desc = { + .name = "act8600-charger", + .type = POWER_SUPPLY_TYPE_BATTERY, + .properties = act8600_charger_properties, + .num_properties = ARRAY_SIZE(act8600_charger_properties), + .get_property = act8600_charger_get_property, +}; + +static int act8600_charger_probe(struct device *dev, struct regmap *regmap) +{ + struct power_supply *charger; + struct power_supply_config cfg = { + .drv_data = regmap, + .fwnode = dev_fwnode(dev), + }; + + charger = devm_power_supply_register(dev, &act8600_charger_desc, &cfg); + + return PTR_ERR_OR_ZERO(charger); +} + +static int act8865_pmic_probe(struct i2c_client *client) +{ + const struct i2c_device_id *i2c_id = i2c_client_get_device_id(client); + const struct regulator_desc *regulators; + struct act8865_platform_data *pdata = NULL; + struct device *dev = &client->dev; + int i, ret, num_regulators; + struct act8865 *act8865; + const struct regmap_config *regmap_config; + unsigned long type; + int off_reg, off_mask; + int voltage_select = 0; + + if (dev->of_node) { + const struct of_device_id *id; + + id = of_match_device(of_match_ptr(act8865_dt_ids), dev); + if (!id) + return -ENODEV; + + type = (unsigned long) id->data; + + voltage_select = of_property_read_bool(dev->of_node, "active-semi,vsel-high"); + } else { + type = i2c_id->driver_data; + pdata = dev_get_platdata(dev); + } + + switch (type) { + case ACT8600: + regulators = act8600_regulators; + num_regulators = ARRAY_SIZE(act8600_regulators); + regmap_config = &act8600_regmap_config; + off_reg = -1; + off_mask = -1; + break; + case ACT8846: + regulators = act8846_regulators; + num_regulators = ARRAY_SIZE(act8846_regulators); + regmap_config = &act8865_regmap_config; + off_reg = ACT8846_GLB_OFF_CTRL; + off_mask = ACT8846_OFF_SYSMASK; + break; + case ACT8865: + if (voltage_select) { + regulators = act8865_alt_regulators; + num_regulators = ARRAY_SIZE(act8865_alt_regulators); + } else { + regulators = act8865_regulators; + num_regulators = ARRAY_SIZE(act8865_regulators); + } + regmap_config = &act8865_regmap_config; + off_reg = ACT8865_SYS_CTRL; + off_mask = ACT8865_MSTROFF; + break; + default: + dev_err(dev, "invalid device id %lu\n", type); + return -EINVAL; + } + + act8865 = devm_kzalloc(dev, sizeof(struct act8865), GFP_KERNEL); + if (!act8865) + return -ENOMEM; + + act8865->regmap = devm_regmap_init_i2c(client, regmap_config); + if (IS_ERR(act8865->regmap)) { + ret = PTR_ERR(act8865->regmap); + dev_err(dev, "Failed to allocate register map: %d\n", ret); + return ret; + } + + if (of_device_is_system_power_controller(dev->of_node)) { + if (!pm_power_off && (off_reg > 0)) { + act8865_i2c_client = client; + act8865->off_reg = off_reg; + act8865->off_mask = off_mask; + pm_power_off = act8865_power_off; + } else { + dev_err(dev, "Failed to set poweroff capability, already defined\n"); + } + } + + /* Finally register devices */ + for (i = 0; i < num_regulators; i++) { + const struct regulator_desc *desc = ®ulators[i]; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = dev; + config.driver_data = act8865; + config.regmap = act8865->regmap; + + if (pdata) { + struct act8865_regulator_data *rdata; + + rdata = act8865_get_regulator_data(desc->id, pdata); + if (rdata) { + config.init_data = rdata->init_data; + config.of_node = rdata->of_node; + } + } + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "failed to register %s\n", desc->name); + return PTR_ERR(rdev); + } + } + + if (type == ACT8600) { + ret = act8600_charger_probe(dev, act8865->regmap); + if (ret < 0) { + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to probe charger"); + return ret; + } + } + + i2c_set_clientdata(client, act8865); + + /* Unlock expert registers for ACT8865. */ + return type != ACT8865 ? 0 : regmap_write(act8865->regmap, + ACT8865_SYS_UNLK_REGS, 0xef); +} + +static const struct i2c_device_id act8865_ids[] = { + { .name = "act8600", .driver_data = ACT8600 }, + { .name = "act8846", .driver_data = ACT8846 }, + { .name = "act8865", .driver_data = ACT8865 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, act8865_ids); + +static struct i2c_driver act8865_pmic_driver = { + .driver = { + .name = "act8865", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = act8865_pmic_probe, + .id_table = act8865_ids, +}; + +module_i2c_driver(act8865_pmic_driver); + +MODULE_DESCRIPTION("active-semi act88xx voltage regulator driver"); +MODULE_AUTHOR("Wenyou Yang "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/act8945a-regulator.c b/drivers/regulator/act8945a-regulator.c new file mode 100644 index 000000000..5bbe2bce7 --- /dev/null +++ b/drivers/regulator/act8945a-regulator.c @@ -0,0 +1,362 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Voltage regulation driver for active-semi ACT8945A PMIC + * + * Copyright (C) 2015 Atmel Corporation + * + * Author: Wenyou Yang + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * ACT8945A Global Register Map. + */ +#define ACT8945A_SYS_MODE 0x00 +#define ACT8945A_SYS_CTRL 0x01 +#define ACT8945A_SYS_UNLK_REGS 0x0b +#define ACT8945A_DCDC1_VSET1 0x20 +#define ACT8945A_DCDC1_VSET2 0x21 +#define ACT8945A_DCDC1_CTRL 0x22 +#define ACT8945A_DCDC1_SUS 0x24 +#define ACT8945A_DCDC2_VSET1 0x30 +#define ACT8945A_DCDC2_VSET2 0x31 +#define ACT8945A_DCDC2_CTRL 0x32 +#define ACT8945A_DCDC2_SUS 0x34 +#define ACT8945A_DCDC3_VSET1 0x40 +#define ACT8945A_DCDC3_VSET2 0x41 +#define ACT8945A_DCDC3_CTRL 0x42 +#define ACT8945A_DCDC3_SUS 0x44 +#define ACT8945A_LDO1_VSET 0x50 +#define ACT8945A_LDO1_CTRL 0x51 +#define ACT8945A_LDO1_SUS 0x52 +#define ACT8945A_LDO2_VSET 0x54 +#define ACT8945A_LDO2_CTRL 0x55 +#define ACT8945A_LDO2_SUS 0x56 +#define ACT8945A_LDO3_VSET 0x60 +#define ACT8945A_LDO3_CTRL 0x61 +#define ACT8945A_LDO3_SUS 0x62 +#define ACT8945A_LDO4_VSET 0x64 +#define ACT8945A_LDO4_CTRL 0x65 +#define ACT8945A_LDO4_SUS 0x66 + +/* + * Field Definitions. + */ +#define ACT8945A_ENA 0x80 /* ON - [7] */ +#define ACT8945A_VSEL_MASK 0x3F /* VSET - [5:0] */ + +/* + * ACT8945A Voltage Number + */ +#define ACT8945A_VOLTAGE_NUM 64 + +enum { + ACT8945A_ID_DCDC1, + ACT8945A_ID_DCDC2, + ACT8945A_ID_DCDC3, + ACT8945A_ID_LDO1, + ACT8945A_ID_LDO2, + ACT8945A_ID_LDO3, + ACT8945A_ID_LDO4, + ACT8945A_ID_MAX, +}; + +struct act8945a_pmic { + struct regmap *regmap; + u32 op_mode[ACT8945A_ID_MAX]; +}; + +static const struct linear_range act8945a_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000), + REGULATOR_LINEAR_RANGE(1200000, 24, 47, 50000), + REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000), +}; + +static int act8945a_set_suspend_state(struct regulator_dev *rdev, bool enable) +{ + struct regmap *regmap = rdev->regmap; + int id = rdev_get_id(rdev); + int reg, val; + + switch (id) { + case ACT8945A_ID_DCDC1: + reg = ACT8945A_DCDC1_SUS; + val = 0xa8; + break; + case ACT8945A_ID_DCDC2: + reg = ACT8945A_DCDC2_SUS; + val = 0xa8; + break; + case ACT8945A_ID_DCDC3: + reg = ACT8945A_DCDC3_SUS; + val = 0xa8; + break; + case ACT8945A_ID_LDO1: + reg = ACT8945A_LDO1_SUS; + val = 0xe8; + break; + case ACT8945A_ID_LDO2: + reg = ACT8945A_LDO2_SUS; + val = 0xe8; + break; + case ACT8945A_ID_LDO3: + reg = ACT8945A_LDO3_SUS; + val = 0xe8; + break; + case ACT8945A_ID_LDO4: + reg = ACT8945A_LDO4_SUS; + val = 0xe8; + break; + default: + return -EINVAL; + } + + if (enable) + val |= BIT(4); + + /* + * Ask the PMIC to enable/disable this output when entering hibernate + * mode. + */ + return regmap_write(regmap, reg, val); +} + +static int act8945a_set_suspend_enable(struct regulator_dev *rdev) +{ + return act8945a_set_suspend_state(rdev, true); +} + +static int act8945a_set_suspend_disable(struct regulator_dev *rdev) +{ + return act8945a_set_suspend_state(rdev, false); +} + +static unsigned int act8945a_of_map_mode(unsigned int mode) +{ + switch (mode) { + case ACT8945A_REGULATOR_MODE_FIXED: + case ACT8945A_REGULATOR_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case ACT8945A_REGULATOR_MODE_LOWPOWER: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int act8945a_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev->regmap; + int id = rdev_get_id(rdev); + int reg, ret, val = 0; + + switch (id) { + case ACT8945A_ID_DCDC1: + reg = ACT8945A_DCDC1_CTRL; + break; + case ACT8945A_ID_DCDC2: + reg = ACT8945A_DCDC2_CTRL; + break; + case ACT8945A_ID_DCDC3: + reg = ACT8945A_DCDC3_CTRL; + break; + case ACT8945A_ID_LDO1: + reg = ACT8945A_LDO1_CTRL; + break; + case ACT8945A_ID_LDO2: + reg = ACT8945A_LDO2_CTRL; + break; + case ACT8945A_ID_LDO3: + reg = ACT8945A_LDO3_CTRL; + break; + case ACT8945A_ID_LDO4: + reg = ACT8945A_LDO4_CTRL; + break; + default: + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_STANDBY: + if (id > ACT8945A_ID_DCDC3) + val = BIT(5); + break; + case REGULATOR_MODE_NORMAL: + if (id <= ACT8945A_ID_DCDC3) + val = BIT(5); + break; + default: + return -EINVAL; + } + + ret = regmap_update_bits(regmap, reg, BIT(5), val); + if (ret) + return ret; + + act8945a->op_mode[id] = mode; + + return 0; +} + +static unsigned int act8945a_get_mode(struct regulator_dev *rdev) +{ + struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + if (id < ACT8945A_ID_DCDC1 || id >= ACT8945A_ID_MAX) + return -EINVAL; + + return act8945a->op_mode[id]; +} + +static const struct regulator_ops act8945a_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = act8945a_set_mode, + .get_mode = act8945a_get_mode, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = act8945a_set_suspend_enable, + .set_suspend_disable = act8945a_set_suspend_disable, +}; + +#define ACT89xx_REG(_name, _family, _id, _vsel_reg, _supply) \ + [_family##_ID_##_id] = { \ + .name = _name, \ + .supply_name = _supply, \ + .of_match = of_match_ptr("REG_"#_id), \ + .of_map_mode = act8945a_of_map_mode, \ + .regulators_node = of_match_ptr("regulators"), \ + .id = _family##_ID_##_id, \ + .type = REGULATOR_VOLTAGE, \ + .ops = &act8945a_ops, \ + .n_voltages = ACT8945A_VOLTAGE_NUM, \ + .linear_ranges = act8945a_voltage_ranges, \ + .n_linear_ranges = ARRAY_SIZE(act8945a_voltage_ranges), \ + .vsel_reg = _family##_##_id##_##_vsel_reg, \ + .vsel_mask = ACT8945A_VSEL_MASK, \ + .enable_reg = _family##_##_id##_CTRL, \ + .enable_mask = ACT8945A_ENA, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc act8945a_regulators[] = { + ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET1, "vp1"), + ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET1, "vp2"), + ACT89xx_REG("DCDC_REG3", ACT8945A, DCDC3, VSET1, "vp3"), + ACT89xx_REG("LDO_REG1", ACT8945A, LDO1, VSET, "inl45"), + ACT89xx_REG("LDO_REG2", ACT8945A, LDO2, VSET, "inl45"), + ACT89xx_REG("LDO_REG3", ACT8945A, LDO3, VSET, "inl67"), + ACT89xx_REG("LDO_REG4", ACT8945A, LDO4, VSET, "inl67"), +}; + +static const struct regulator_desc act8945a_alt_regulators[] = { + ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET2, "vp1"), + ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET2, "vp2"), + ACT89xx_REG("DCDC_REG3", ACT8945A, DCDC3, VSET2, "vp3"), + ACT89xx_REG("LDO_REG1", ACT8945A, LDO1, VSET, "inl45"), + ACT89xx_REG("LDO_REG2", ACT8945A, LDO2, VSET, "inl45"), + ACT89xx_REG("LDO_REG3", ACT8945A, LDO3, VSET, "inl67"), + ACT89xx_REG("LDO_REG4", ACT8945A, LDO4, VSET, "inl67"), +}; + +static int act8945a_pmic_probe(struct platform_device *pdev) +{ + struct regulator_config config = { }; + const struct regulator_desc *regulators; + struct act8945a_pmic *act8945a; + struct regulator_dev *rdev; + int i, num_regulators; + bool voltage_select; + + act8945a = devm_kzalloc(&pdev->dev, sizeof(*act8945a), GFP_KERNEL); + if (!act8945a) + return -ENOMEM; + + act8945a->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!act8945a->regmap) { + dev_err(&pdev->dev, + "could not retrieve regmap from parent device\n"); + return -EINVAL; + } + + voltage_select = of_property_read_bool(pdev->dev.parent->of_node, + "active-semi,vsel-high"); + + if (voltage_select) { + regulators = act8945a_alt_regulators; + num_regulators = ARRAY_SIZE(act8945a_alt_regulators); + } else { + regulators = act8945a_regulators; + num_regulators = ARRAY_SIZE(act8945a_regulators); + } + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + config.dev = &pdev->dev; + config.driver_data = act8945a; + for (i = 0; i < num_regulators; i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator\n", + regulators[i].name); + return PTR_ERR(rdev); + } + } + + platform_set_drvdata(pdev, act8945a); + + /* Unlock expert registers. */ + return regmap_write(act8945a->regmap, ACT8945A_SYS_UNLK_REGS, 0xef); +} + +static int __maybe_unused act8945a_suspend(struct device *pdev) +{ + struct act8945a_pmic *act8945a = dev_get_drvdata(pdev); + + /* + * Ask the PMIC to enter the suspend mode on the next PWRHLD + * transition. + */ + return regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x42); +} + +static SIMPLE_DEV_PM_OPS(act8945a_pm, act8945a_suspend, NULL); + +static void act8945a_pmic_shutdown(struct platform_device *pdev) +{ + struct act8945a_pmic *act8945a = platform_get_drvdata(pdev); + + /* + * Ask the PMIC to shutdown everything on the next PWRHLD transition. + */ + regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x0); +} + +static struct platform_driver act8945a_pmic_driver = { + .driver = { + .name = "act8945a-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .pm = &act8945a_pm, + }, + .probe = act8945a_pmic_probe, + .shutdown = act8945a_pmic_shutdown, +}; +module_platform_driver(act8945a_pmic_driver); + +MODULE_DESCRIPTION("Active-semi ACT8945A voltage regulator driver"); +MODULE_AUTHOR("Wenyou Yang "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/ad5398.c b/drivers/regulator/ad5398.c new file mode 100644 index 000000000..0123ca815 --- /dev/null +++ b/drivers/regulator/ad5398.c @@ -0,0 +1,285 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Voltage and current regulation for AD5398 and AD5821 + * + * Copyright 2010 Analog Devices Inc. + * + * Enter bugs at http://blackfin.uclinux.org/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define AD5398_SW_POWER_DOWN BIT(15) + +struct ad5398_chip_info { + struct i2c_client *client; + int min_uA; + int max_uA; + unsigned int current_level; + unsigned int current_mask; + unsigned int current_offset; + struct regulator_dev *rdev; +}; + +static int ad5398_calc_current(struct ad5398_chip_info *chip, + unsigned selector) +{ + unsigned range_uA = chip->max_uA - chip->min_uA; + + return chip->min_uA + (selector * range_uA / chip->current_level); +} + +static int ad5398_read_reg(struct i2c_client *client, unsigned short *data) +{ + unsigned short val; + int ret; + + ret = i2c_master_recv(client, (char *)&val, 2); + if (ret < 0) { + dev_err(&client->dev, "I2C read error\n"); + return ret; + } + *data = be16_to_cpu(val); + + return ret; +} + +static int ad5398_write_reg(struct i2c_client *client, const unsigned short data) +{ + unsigned short val; + int ret; + + val = cpu_to_be16(data); + ret = i2c_master_send(client, (char *)&val, 2); + if (ret != 2) { + dev_err(&client->dev, "I2C write error\n"); + return ret < 0 ? ret : -EIO; + } + + return 0; +} + +static int ad5398_get_current_limit(struct regulator_dev *rdev) +{ + struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); + struct i2c_client *client = chip->client; + unsigned short data; + int ret; + + ret = ad5398_read_reg(client, &data); + if (ret < 0) + return ret; + + ret = (data & chip->current_mask) >> chip->current_offset; + + return ad5398_calc_current(chip, ret); +} + +static int ad5398_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) +{ + struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); + struct i2c_client *client = chip->client; + unsigned range_uA = chip->max_uA - chip->min_uA; + unsigned selector; + unsigned short data; + int ret; + + if (min_uA < chip->min_uA) + min_uA = chip->min_uA; + if (max_uA > chip->max_uA) + max_uA = chip->max_uA; + + if (min_uA > chip->max_uA || max_uA < chip->min_uA) + return -EINVAL; + + selector = DIV_ROUND_UP((min_uA - chip->min_uA) * chip->current_level, + range_uA); + if (ad5398_calc_current(chip, selector) > max_uA) + return -EINVAL; + + dev_dbg(&client->dev, "changing current %duA\n", + ad5398_calc_current(chip, selector)); + + /* read chip enable bit */ + ret = ad5398_read_reg(client, &data); + if (ret < 0) + return ret; + + /* prepare register data */ + selector = (selector << chip->current_offset) & chip->current_mask; + data = (unsigned short)selector | (data & AD5398_SW_POWER_DOWN); + + /* write the new current value back as well as enable bit */ + ret = ad5398_write_reg(client, data); + + return ret; +} + +static int ad5398_is_enabled(struct regulator_dev *rdev) +{ + struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); + struct i2c_client *client = chip->client; + unsigned short data; + int ret; + + ret = ad5398_read_reg(client, &data); + if (ret < 0) + return ret; + + if (data & AD5398_SW_POWER_DOWN) + return 0; + else + return 1; +} + +static int ad5398_enable(struct regulator_dev *rdev) +{ + struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); + struct i2c_client *client = chip->client; + unsigned short data; + int ret; + + ret = ad5398_read_reg(client, &data); + if (ret < 0) + return ret; + + if (!(data & AD5398_SW_POWER_DOWN)) + return 0; + + data &= ~AD5398_SW_POWER_DOWN; + + ret = ad5398_write_reg(client, data); + + return ret; +} + +static int ad5398_disable(struct regulator_dev *rdev) +{ + struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); + struct i2c_client *client = chip->client; + unsigned short data; + int ret; + + ret = ad5398_read_reg(client, &data); + if (ret < 0) + return ret; + + if (data & AD5398_SW_POWER_DOWN) + return 0; + + data |= AD5398_SW_POWER_DOWN; + + ret = ad5398_write_reg(client, data); + + return ret; +} + +static const struct regulator_ops ad5398_ops = { + .get_current_limit = ad5398_get_current_limit, + .set_current_limit = ad5398_set_current_limit, + .enable = ad5398_enable, + .disable = ad5398_disable, + .is_enabled = ad5398_is_enabled, +}; + +static const struct regulator_desc ad5398_reg = { + .name = "isink", + .id = 0, + .ops = &ad5398_ops, + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, +}; + +struct ad5398_current_data_format { + int current_bits; + int current_offset; + int min_uA; + int max_uA; +}; + +static const struct ad5398_current_data_format df_10_4_120 = {10, 4, 0, 120000}; + +static const struct i2c_device_id ad5398_id[] = { + { .name = "ad5398", .driver_data = (kernel_ulong_t)&df_10_4_120 }, + { .name = "ad5821", .driver_data = (kernel_ulong_t)&df_10_4_120 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ad5398_id); + +static int ad5398_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct regulator_init_data *init_data = dev_get_platdata(&client->dev); + struct regulator_config config = { }; + struct ad5398_chip_info *chip; + const struct ad5398_current_data_format *df = + (struct ad5398_current_data_format *)id->driver_data; + + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + config.dev = &client->dev; + if (client->dev.of_node) + init_data = of_get_regulator_init_data(&client->dev, + client->dev.of_node, + &ad5398_reg); + if (!init_data) + return -EINVAL; + + config.init_data = init_data; + config.of_node = client->dev.of_node; + config.driver_data = chip; + + chip->client = client; + + chip->min_uA = df->min_uA; + chip->max_uA = df->max_uA; + chip->current_level = 1 << df->current_bits; + chip->current_offset = df->current_offset; + chip->current_mask = (chip->current_level - 1) << chip->current_offset; + + chip->rdev = devm_regulator_register(&client->dev, &ad5398_reg, + &config); + if (IS_ERR(chip->rdev)) { + dev_err(&client->dev, "failed to register %s %s\n", + id->name, ad5398_reg.name); + return PTR_ERR(chip->rdev); + } + + i2c_set_clientdata(client, chip); + dev_dbg(&client->dev, "%s regulator driver is registered.\n", id->name); + return 0; +} + +static struct i2c_driver ad5398_driver = { + .probe = ad5398_probe, + .driver = { + .name = "ad5398", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = ad5398_id, +}; + +static int __init ad5398_init(void) +{ + return i2c_add_driver(&ad5398_driver); +} +subsys_initcall(ad5398_init); + +static void __exit ad5398_exit(void) +{ + i2c_del_driver(&ad5398_driver); +} +module_exit(ad5398_exit); + +MODULE_DESCRIPTION("AD5398 and AD5821 current regulator driver"); +MODULE_AUTHOR("Sonic Zhang"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/adp5055-regulator.c b/drivers/regulator/adp5055-regulator.c new file mode 100644 index 000000000..194dcfe4f --- /dev/null +++ b/drivers/regulator/adp5055-regulator.c @@ -0,0 +1,423 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator driver for Analog Devices ADP5055 +// +// Copyright (C) 2025 Analog Devices, Inc. + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +// ADP5055 Register Map. + +#define ADP5055_CTRL123 0xD1 +#define ADP5055_CTRL_MODE1 0xD3 +#define ADP5055_CTRL_MODE2 0xD4 +#define ADP5055_DLY0 0xD5 +#define ADP5055_DLY1 0xD6 +#define ADP5055_DLY2 0xD7 +#define ADP5055_VID0 0xD8 +#define ADP5055_VID1 0xD9 +#define ADP5055_VID2 0xDA +#define ADP5055_DVS_LIM0 0xDC +#define ADP5055_DVS_LIM1 0xDD +#define ADP5055_DVS_LIM2 0xDE +#define ADP5055_FT_CFG 0xDF +#define ADP5055_PG_CFG 0xE0 + +// ADP5055 Field Masks. + +#define ADP5055_MASK_EN_MODE BIT(0) +#define ADP5055_MASK_OCP_BLANKING BIT(7) +#define ADP5055_MASK_PSM BIT(4) +#define ADP5055_MASK_DIS2 BIT(2) +#define ADP5055_MASK_DIS1 BIT(1) +#define ADP5055_MASK_DIS0 BIT(0) +#define ADP5055_MASK_DIS_DLY GENMASK(6, 4) +#define ADP5055_MASK_EN_DLY GENMASK(2, 0) +#define ADP5055_MASK_DVS_LIM_UPPER GENMASK(7, 4) +#define ADP5055_MASK_DVS_LIM_LOWER GENMASK(3, 0) +#define ADP5055_MASK_FAST_TRANSIENT2 GENMASK(5, 4) +#define ADP5055_MASK_FAST_TRANSIENT1 GENMASK(3, 2) +#define ADP5055_MASK_FAST_TRANSIENT0 GENMASK(1, 0) +#define ADP5055_MASK_DLY_PWRGD BIT(4) +#define ADP5055_MASK_PWRGD2 BIT(2) +#define ADP5055_MASK_PWRGD1 BIT(1) +#define ADP5055_MASK_PWRGD0 BIT(0) + +#define ADP5055_MIN_VOUT 408000 +#define ADP5055_NUM_CH 3 + +struct adp5055 { + struct device *dev; + struct regmap *regmap; + u32 tset; + struct gpio_desc *en_gpiod[ADP5055_NUM_CH]; + bool en_mode_software; + int dvs_limit_upper[ADP5055_NUM_CH]; + int dvs_limit_lower[ADP5055_NUM_CH]; + u32 fast_transient[ADP5055_NUM_CH]; + bool mask_power_good[ADP5055_NUM_CH]; +}; + +static const unsigned int adp5055_tset_vals[] = { + 2600, + 20800, +}; + +static const unsigned int adp5055_enable_delay_vals_2_6[] = { + 0, + 2600, + 5200, + 7800, + 10400, + 13000, + 15600, + 18200, +}; + +static const unsigned int adp5055_enable_delay_vals_20_8[] = { + 0, + 20800, + 41600, + 62400, + 83200, + 104000, + 124800, + 145600, +}; + +static const char * const adp5055_fast_transient_vals[] = { + "none", + "3G_1.5%", + "5G_1.5%", + "5G_2.5%", +}; + +static int adp5055_get_prop_index(const u32 *table, size_t table_size, + u32 value) +{ + int i; + + for (i = 0; i < table_size; i++) + if (table[i] == value) + return i; + + return -EINVAL; +} + +static const struct regmap_range adp5055_reg_ranges[] = { + regmap_reg_range(0xD1, 0xE0), +}; + +static const struct regmap_access_table adp5055_access_ranges_table = { + .yes_ranges = adp5055_reg_ranges, + .n_yes_ranges = ARRAY_SIZE(adp5055_reg_ranges), +}; + +static const struct regmap_config adp5055_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xE0, + .wr_table = &adp5055_access_ranges_table, + .rd_table = &adp5055_access_ranges_table, +}; + +static const struct linear_range adp5055_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(ADP5055_MIN_VOUT, 0, 255, 1500), +}; + +static int adp5055_parse_fw(struct device *dev, struct adp5055 *adp5055) +{ + int i, ret; + struct regmap *regmap = adp5055->regmap; + int val; + bool ocp_blanking; + bool delay_power_good; + + ret = device_property_read_u32(dev, "adi,tset-us", &adp5055->tset); + if (!ret) { + ret = adp5055_get_prop_index(adp5055_tset_vals, + ARRAY_SIZE(adp5055_tset_vals), adp5055->tset); + if (ret < 0) + return dev_err_probe(dev, ret, + "Failed to initialize tset."); + adp5055->tset = adp5055_tset_vals[ret]; + } + + ocp_blanking = device_property_read_bool(dev, "adi,ocp-blanking"); + + delay_power_good = device_property_read_bool(dev, + "adi,delay-power-good"); + + for (i = 0; i < ADP5055_NUM_CH; i++) { + val = FIELD_PREP(ADP5055_MASK_DVS_LIM_UPPER, + DIV_ROUND_CLOSEST_ULL(192000 - adp5055->dvs_limit_upper[i], 12000)); + val |= FIELD_PREP(ADP5055_MASK_DVS_LIM_LOWER, + DIV_ROUND_CLOSEST_ULL(adp5055->dvs_limit_lower[i] + 190500, 12000)); + ret = regmap_write(regmap, ADP5055_DVS_LIM0 + i, val); + if (ret) + return ret; + } + + val = FIELD_PREP(ADP5055_MASK_EN_MODE, adp5055->en_mode_software); + ret = regmap_write(regmap, ADP5055_CTRL_MODE1, val); + if (ret) + return ret; + + val = FIELD_PREP(ADP5055_MASK_OCP_BLANKING, ocp_blanking); + ret = regmap_update_bits(regmap, ADP5055_CTRL_MODE2, + ADP5055_MASK_OCP_BLANKING, val); + if (ret) + return ret; + + val = FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT2, adp5055->fast_transient[2]); + val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT1, adp5055->fast_transient[1]); + val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT0, adp5055->fast_transient[0]); + ret = regmap_write(regmap, ADP5055_FT_CFG, val); + if (ret) + return ret; + + val = FIELD_PREP(ADP5055_MASK_DLY_PWRGD, delay_power_good); + val |= FIELD_PREP(ADP5055_MASK_PWRGD2, adp5055->mask_power_good[2]); + val |= FIELD_PREP(ADP5055_MASK_PWRGD1, adp5055->mask_power_good[1]); + val |= FIELD_PREP(ADP5055_MASK_PWRGD0, adp5055->mask_power_good[0]); + ret = regmap_write(regmap, ADP5055_PG_CFG, val); + if (ret) + return ret; + + return 0; +} + +static int adp5055_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct adp5055 *adp5055 = config->driver_data; + int id, ret, pval, i; + + id = desc->id; + + if (of_property_read_bool(np, "enable-gpios")) { + adp5055->en_gpiod[id] = devm_fwnode_gpiod_get(config->dev, + of_fwnode_handle(np), "enable", + GPIOD_OUT_LOW, "enable"); + if (IS_ERR(adp5055->en_gpiod[id])) + return dev_err_probe(config->dev, PTR_ERR(adp5055->en_gpiod[id]), + "Failed to get enable GPIO\n"); + + config->ena_gpiod = adp5055->en_gpiod[id]; + } else { + adp5055->en_mode_software = true; + } + + ret = of_property_read_u32(np, "adi,dvs-limit-upper-microvolt", &pval); + if (ret) + adp5055->dvs_limit_upper[id] = 192000; + else + adp5055->dvs_limit_upper[id] = pval; + + if (adp5055->dvs_limit_upper[id] > 192000 || adp5055->dvs_limit_upper[id] < 12000) + return dev_err_probe(config->dev, -EINVAL, + "Out of range - dvs-limit-upper-microvolt value."); + + ret = of_property_read_u32(np, "adi,dvs-limit-lower-microvolt", &pval); + if (ret) + adp5055->dvs_limit_lower[id] = -190500; + else + adp5055->dvs_limit_lower[id] = pval; + + if (adp5055->dvs_limit_lower[id] > -10500 || adp5055->dvs_limit_lower[id] < -190500) + return dev_err_probe(config->dev, adp5055->dvs_limit_lower[id], + "Out of range - dvs-limit-lower-microvolt value."); + + for (i = 0; i < 4; i++) { + ret = of_property_match_string(np, "adi,fast-transient", + adp5055_fast_transient_vals[i]); + if (!ret) + break; + } + + if (ret < 0) + adp5055->fast_transient[id] = 3; + else + adp5055->fast_transient[id] = i; + + adp5055->mask_power_good[id] = of_property_read_bool(np, "adi,mask-power-good"); + + return 0; +} + +static int adp5055_set_mode(struct regulator_dev *rdev, u32 mode) +{ + struct adp5055 *adp5055 = rdev_get_drvdata(rdev); + int id, ret; + + id = rdev_get_id(rdev); + + switch (mode) { + case REGULATOR_MODE_NORMAL: + ret = regmap_update_bits(adp5055->regmap, ADP5055_CTRL_MODE2, + ADP5055_MASK_PSM << id, 0); + break; + case REGULATOR_MODE_IDLE: + ret = regmap_update_bits(adp5055->regmap, ADP5055_CTRL_MODE2, + ADP5055_MASK_PSM << id, ADP5055_MASK_PSM << id); + break; + default: + return dev_err_probe(&rdev->dev, -EINVAL, + "Unsupported mode: %d\n", mode); + } + + return ret; +} + +static unsigned int adp5055_get_mode(struct regulator_dev *rdev) +{ + struct adp5055 *adp5055 = rdev_get_drvdata(rdev); + int id, ret, regval; + + id = rdev_get_id(rdev); + + ret = regmap_read(adp5055->regmap, ADP5055_CTRL_MODE2, ®val); + if (ret) + return ret; + + if (regval & (ADP5055_MASK_PSM << id)) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops adp5055_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = adp5055_set_mode, + .get_mode = adp5055_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +#define ADP5055_REG_(_name, _id, _ch, _ops) \ + [_id] = { \ + .name = _name, \ + .of_match = of_match_ptr(_name), \ + .of_parse_cb = adp5055_of_parse_cb, \ + .id = _id, \ + .ops = _ops, \ + .linear_ranges = adp5055_voltage_ranges, \ + .n_linear_ranges = ARRAY_SIZE(adp5055_voltage_ranges), \ + .vsel_reg = ADP5055_VID##_ch, \ + .vsel_mask = GENMASK(7, 0), \ + .enable_reg = ADP5055_CTRL123, \ + .enable_mask = BIT(_ch), \ + .active_discharge_on = ADP5055_MASK_DIS##_id, \ + .active_discharge_off = 0, \ + .active_discharge_mask = ADP5055_MASK_DIS##_id, \ + .active_discharge_reg = ADP5055_CTRL_MODE2, \ + .ramp_reg = ADP5055_DLY##_ch, \ + .ramp_mask = ADP5055_MASK_EN_DLY, \ + .n_ramp_values = ARRAY_SIZE(adp5055_enable_delay_vals_2_6), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +#define ADP5055_REG(_name, _id, _ch) \ + ADP5055_REG_(_name, _id, _ch, &adp5055_ops) + +static struct regulator_desc adp5055_regulators[] = { + ADP5055_REG("buck0", 0, 0), + ADP5055_REG("buck1", 1, 1), + ADP5055_REG("buck2", 2, 2), +}; + +static int adp5055_probe(struct i2c_client *client) +{ + struct regulator_init_data *init_data; + struct device *dev = &client->dev; + struct adp5055 *adp5055; + int i, ret; + + init_data = of_get_regulator_init_data(dev, client->dev.of_node, + &adp5055_regulators[0]); + if (!init_data) + return -EINVAL; + + adp5055 = devm_kzalloc(dev, sizeof(struct adp5055), GFP_KERNEL); + if (!adp5055) + return -ENOMEM; + + adp5055->tset = 2600; + adp5055->en_mode_software = false; + + adp5055->regmap = devm_regmap_init_i2c(client, &adp5055_regmap_config); + if (IS_ERR(adp5055->regmap)) + return dev_err_probe(dev, PTR_ERR(adp5055->regmap), "Failed to allocate reg map"); + + for (i = 0; i < ADP5055_NUM_CH; i++) { + const struct regulator_desc *desc; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + if (adp5055->tset == 2600) + adp5055_regulators[i].ramp_delay_table = adp5055_enable_delay_vals_2_6; + else + adp5055_regulators[i].ramp_delay_table = adp5055_enable_delay_vals_20_8; + + desc = &adp5055_regulators[i]; + + config.dev = dev; + config.driver_data = adp5055; + config.regmap = adp5055->regmap; + config.init_data = init_data; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register %s\n", desc->name); + } + } + + ret = adp5055_parse_fw(dev, adp5055); + if (ret < 0) + return ret; + + return 0; +} + +static const struct of_device_id adp5055_of_match[] = { + { .compatible = "adi,adp5055", }, + { } +}; +MODULE_DEVICE_TABLE(of, adp5055_of_match); + +static const struct i2c_device_id adp5055_ids[] = { + { .name = "adp5055" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, adp5055_ids); + +static struct i2c_driver adp5055_driver = { + .driver = { + .name = "adp5055", + .of_match_table = adp5055_of_match, + }, + .probe = adp5055_probe, + .id_table = adp5055_ids, +}; +module_i2c_driver(adp5055_driver); + +MODULE_DESCRIPTION("ADP5055 Voltage Regulator Driver"); +MODULE_AUTHOR("Alexis Czezar Torreno "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c new file mode 100644 index 000000000..700bd0343 --- /dev/null +++ b/drivers/regulator/anatop-regulator.c @@ -0,0 +1,353 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */ +#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */ + +#define LDO_POWER_GATE 0x00 +#define LDO_FET_FULL_ON 0x1f + +struct anatop_regulator { + u32 delay_reg; + int delay_bit_shift; + int delay_bit_width; + struct regulator_desc rdesc; + bool bypass; + int sel; +}; + +static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg, + unsigned int old_sel, + unsigned int new_sel) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + u32 val; + int ret = 0; + + /* check whether need to care about LDO ramp up speed */ + if (anatop_reg->delay_bit_width && new_sel > old_sel) { + /* + * the delay for LDO ramp up time is + * based on the register setting, we need + * to calculate how many steps LDO need to + * ramp up, and how much delay needed. (us) + */ + regmap_read(reg->regmap, anatop_reg->delay_reg, &val); + val = (val >> anatop_reg->delay_bit_shift) & + ((1 << anatop_reg->delay_bit_width) - 1); + ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << + val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1; + } + + return ret; +} + +static int anatop_regmap_enable(struct regulator_dev *reg) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + int sel; + + sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; + return regulator_set_voltage_sel_regmap(reg, sel); +} + +static int anatop_regmap_disable(struct regulator_dev *reg) +{ + return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE); +} + +static int anatop_regmap_is_enabled(struct regulator_dev *reg) +{ + return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE; +} + +static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg, + unsigned selector) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + int ret; + + if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { + anatop_reg->sel = selector; + return 0; + } + + ret = regulator_set_voltage_sel_regmap(reg, selector); + if (!ret) + anatop_reg->sel = selector; + return ret; +} + +static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + + if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) + return anatop_reg->sel; + + return regulator_get_voltage_sel_regmap(reg); +} + +static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + int sel; + + sel = regulator_get_voltage_sel_regmap(reg); + if (sel == LDO_FET_FULL_ON) + WARN_ON(!anatop_reg->bypass); + else if (sel != LDO_POWER_GATE) + WARN_ON(anatop_reg->bypass); + + *enable = anatop_reg->bypass; + return 0; +} + +static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + int sel; + + if (enable == anatop_reg->bypass) + return 0; + + sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel; + anatop_reg->bypass = enable; + + return regulator_set_voltage_sel_regmap(reg, sel); +} + +static struct regulator_ops anatop_rops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops anatop_core_rops = { + .enable = anatop_regmap_enable, + .disable = anatop_regmap_disable, + .is_enabled = anatop_regmap_is_enabled, + .set_voltage_sel = anatop_regmap_core_set_voltage_sel, + .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel, + .get_voltage_sel = anatop_regmap_core_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_bypass = anatop_regmap_get_bypass, + .set_bypass = anatop_regmap_set_bypass, +}; + +static int anatop_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct device_node *anatop_np; + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + struct anatop_regulator *sreg; + struct regulator_init_data *initdata; + struct regulator_config config = { }; + struct regmap *regmap; + u32 control_reg; + u32 vol_bit_shift; + u32 vol_bit_width; + u32 min_bit_val; + u32 min_voltage; + u32 max_voltage; + int ret = 0; + u32 val; + + sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL); + if (!sreg) + return -ENOMEM; + + rdesc = &sreg->rdesc; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->owner = THIS_MODULE; + + of_property_read_string(np, "regulator-name", &rdesc->name); + if (!rdesc->name) { + dev_err(dev, "failed to get a regulator-name\n"); + return -EINVAL; + } + + initdata = of_get_regulator_init_data(dev, np, rdesc); + if (!initdata) + return -ENOMEM; + + initdata->supply_regulator = "vin"; + + anatop_np = of_get_parent(np); + if (!anatop_np) + return -ENODEV; + regmap = syscon_node_to_regmap(anatop_np); + of_node_put(anatop_np); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = of_property_read_u32(np, "anatop-reg-offset", &control_reg); + if (ret) { + dev_err(dev, "no anatop-reg-offset property set\n"); + return ret; + } + ret = of_property_read_u32(np, "anatop-vol-bit-width", &vol_bit_width); + if (ret) { + dev_err(dev, "no anatop-vol-bit-width property set\n"); + return ret; + } + ret = of_property_read_u32(np, "anatop-vol-bit-shift", &vol_bit_shift); + if (ret) { + dev_err(dev, "no anatop-vol-bit-shift property set\n"); + return ret; + } + ret = of_property_read_u32(np, "anatop-min-bit-val", &min_bit_val); + if (ret) { + dev_err(dev, "no anatop-min-bit-val property set\n"); + return ret; + } + ret = of_property_read_u32(np, "anatop-min-voltage", &min_voltage); + if (ret) { + dev_err(dev, "no anatop-min-voltage property set\n"); + return ret; + } + ret = of_property_read_u32(np, "anatop-max-voltage", &max_voltage); + if (ret) { + dev_err(dev, "no anatop-max-voltage property set\n"); + return ret; + } + + /* read LDO ramp up setting, only for core reg */ + of_property_read_u32(np, "anatop-delay-reg-offset", + &sreg->delay_reg); + of_property_read_u32(np, "anatop-delay-bit-width", + &sreg->delay_bit_width); + of_property_read_u32(np, "anatop-delay-bit-shift", + &sreg->delay_bit_shift); + + rdesc->n_voltages = (max_voltage - min_voltage) / 25000 + 1 + + min_bit_val; + rdesc->min_uV = min_voltage; + rdesc->uV_step = 25000; + rdesc->linear_min_sel = min_bit_val; + rdesc->vsel_reg = control_reg; + rdesc->vsel_mask = ((1 << vol_bit_width) - 1) << vol_bit_shift; + rdesc->min_dropout_uV = 125000; + + config.dev = &pdev->dev; + config.init_data = initdata; + config.driver_data = sreg; + config.of_node = pdev->dev.of_node; + config.regmap = regmap; + + /* Only core regulators have the ramp up delay configuration. */ + if (control_reg && sreg->delay_bit_width) { + rdesc->ops = &anatop_core_rops; + + ret = regmap_read(config.regmap, rdesc->vsel_reg, &val); + if (ret) { + dev_err(dev, "failed to read initial state\n"); + return ret; + } + + sreg->sel = (val & rdesc->vsel_mask) >> vol_bit_shift; + if (sreg->sel == LDO_FET_FULL_ON) { + sreg->sel = 0; + sreg->bypass = true; + } + + /* + * In case vddpu was disabled by the bootloader, we need to set + * a sane default until imx6-cpufreq was probed and changes the + * voltage to the correct value. In this case we set 1.25V. + */ + if (!sreg->sel && !strcmp(rdesc->name, "vddpu")) + sreg->sel = 22; + + /* set the default voltage of the pcie phy to be 1.100v */ + if (!sreg->sel && !strcmp(rdesc->name, "vddpcie")) + sreg->sel = 0x10; + + if (!sreg->bypass && !sreg->sel) { + dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n"); + return -EINVAL; + } + } else { + u32 enable_bit; + + rdesc->ops = &anatop_rops; + + if (!of_property_read_u32(np, "anatop-enable-bit", + &enable_bit)) { + anatop_rops.enable = regulator_enable_regmap; + anatop_rops.disable = regulator_disable_regmap; + anatop_rops.is_enabled = regulator_is_enabled_regmap; + + rdesc->enable_reg = control_reg; + rdesc->enable_mask = BIT(enable_bit); + } + } + + /* register regulator */ + rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + if (ret == -EPROBE_DEFER) + dev_dbg(dev, "failed to register %s, deferring...\n", + rdesc->name); + else + dev_err(dev, "failed to register %s\n", rdesc->name); + return ret; + } + + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static const struct of_device_id of_anatop_regulator_match_tbl[] = { + { .compatible = "fsl,anatop-regulator", }, + { /* end */ } +}; +MODULE_DEVICE_TABLE(of, of_anatop_regulator_match_tbl); + +static struct platform_driver anatop_regulator_driver = { + .driver = { + .name = "anatop_regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_anatop_regulator_match_tbl, + }, + .probe = anatop_regulator_probe, +}; + +static int __init anatop_regulator_init(void) +{ + return platform_driver_register(&anatop_regulator_driver); +} +postcore_initcall(anatop_regulator_init); + +static void __exit anatop_regulator_exit(void) +{ + platform_driver_unregister(&anatop_regulator_driver); +} +module_exit(anatop_regulator_exit); + +MODULE_AUTHOR("Nancy Chen "); +MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) "); +MODULE_DESCRIPTION("ANATOP Regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:anatop_regulator"); diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c new file mode 100644 index 000000000..501843996 --- /dev/null +++ b/drivers/regulator/arizona-ldo1.c @@ -0,0 +1,418 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// arizona-ldo1.c -- LDO1 supply for Arizona devices +// +// Copyright 2012 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include +#include + +struct arizona_ldo1 { + struct regulator_dev *regulator; + struct regmap *regmap; + + struct regulator_consumer_supply supply; + struct regulator_init_data init_data; + + struct gpio_desc *ena_gpiod; +}; + +static int arizona_ldo1_hc_set_voltage_sel(struct regulator_dev *rdev, + unsigned sel) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + int ret; + + if (sel == rdev->desc->n_voltages - 1) + val = ARIZONA_LDO1_HI_PWR; + else + val = 0; + + ret = regmap_update_bits(regmap, ARIZONA_LDO1_CONTROL_2, + ARIZONA_LDO1_HI_PWR, val); + if (ret != 0) + return ret; + + if (val) + return 0; + + return regulator_set_voltage_sel_regmap(rdev, sel); +} + +static int arizona_ldo1_hc_get_voltage_sel(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + int ret; + + ret = regmap_read(regmap, ARIZONA_LDO1_CONTROL_2, &val); + if (ret != 0) + return ret; + + if (val & ARIZONA_LDO1_HI_PWR) + return rdev->desc->n_voltages - 1; + + return regulator_get_voltage_sel_regmap(rdev); +} + +static const struct regulator_ops arizona_ldo1_hc_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = arizona_ldo1_hc_get_voltage_sel, + .set_voltage_sel = arizona_ldo1_hc_set_voltage_sel, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, +}; + +static const struct linear_range arizona_ldo1_hc_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 0x6, 50000), + REGULATOR_LINEAR_RANGE(1800000, 0x7, 0x7, 0), +}; + +static const struct regulator_desc arizona_ldo1_hc = { + .name = "LDO1", + .supply_name = "LDOVDD", + .type = REGULATOR_VOLTAGE, + .ops = &arizona_ldo1_hc_ops, + + .vsel_reg = ARIZONA_LDO1_CONTROL_1, + .vsel_mask = ARIZONA_LDO1_VSEL_MASK, + .bypass_reg = ARIZONA_LDO1_CONTROL_1, + .bypass_mask = ARIZONA_LDO1_BYPASS, + .linear_ranges = arizona_ldo1_hc_ranges, + .n_linear_ranges = ARRAY_SIZE(arizona_ldo1_hc_ranges), + .n_voltages = 8, + .enable_time = 1500, + .ramp_delay = 24000, + + .owner = THIS_MODULE, +}; + +static const struct regulator_ops arizona_ldo1_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc arizona_ldo1 = { + .name = "LDO1", + .supply_name = "LDOVDD", + .type = REGULATOR_VOLTAGE, + .ops = &arizona_ldo1_ops, + + .vsel_reg = ARIZONA_LDO1_CONTROL_1, + .vsel_mask = ARIZONA_LDO1_VSEL_MASK, + .min_uV = 900000, + .uV_step = 25000, + .n_voltages = 13, + .enable_time = 500, + .ramp_delay = 24000, + + .owner = THIS_MODULE, +}; + +static const struct regulator_init_data arizona_ldo1_dvfs = { + .constraints = { + .min_uV = 1200000, + .max_uV = 1800000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = 1, +}; + +static const struct regulator_init_data arizona_ldo1_default = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, +}; + +static const struct regulator_init_data arizona_ldo1_wm5110 = { + .constraints = { + .min_uV = 1175000, + .max_uV = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = 1, +}; + +static const struct regulator_desc madera_ldo1 = { + .name = "LDO1", + .supply_name = "LDOVDD", + .type = REGULATOR_VOLTAGE, + .ops = &arizona_ldo1_ops, + + .vsel_reg = MADERA_LDO1_CONTROL_1, + .vsel_mask = MADERA_LDO1_VSEL_MASK, + .min_uV = 900000, + .uV_step = 25000, + .n_voltages = 13, + .enable_time = 3000, + + .owner = THIS_MODULE, +}; + +static const struct regulator_init_data madera_ldo1_default = { + .constraints = { + .min_uV = 1200000, + .max_uV = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, +}; + +static int arizona_ldo1_of_get_pdata(struct arizona_ldo1_pdata *pdata, + struct regulator_config *config, + const struct regulator_desc *desc, + bool *external_dcvdd) +{ + struct arizona_ldo1 *ldo1 = config->driver_data; + struct device_node *np = config->dev->of_node; + struct device_node *init_node, *dcvdd_node; + struct regulator_init_data *init_data; + + init_node = of_get_child_by_name(np, "ldo1"); + dcvdd_node = of_parse_phandle(np, "DCVDD-supply", 0); + + if (init_node) { + config->of_node = init_node; + + init_data = of_get_regulator_init_data(config->dev, init_node, + desc); + if (init_data) { + init_data->consumer_supplies = &ldo1->supply; + init_data->num_consumer_supplies = 1; + + if (dcvdd_node && dcvdd_node != init_node) + *external_dcvdd = true; + + pdata->init_data = init_data; + } + } else if (dcvdd_node) { + *external_dcvdd = true; + } + + of_node_put(dcvdd_node); + + return 0; +} + +static int arizona_ldo1_common_init(struct platform_device *pdev, + struct arizona_ldo1 *ldo1, + const struct regulator_desc *desc, + struct arizona_ldo1_pdata *pdata, + bool *external_dcvdd) +{ + struct device *parent_dev = pdev->dev.parent; + struct regulator_config config = { }; + int ret; + + *external_dcvdd = false; + + ldo1->supply.supply = "DCVDD"; + ldo1->init_data.consumer_supplies = &ldo1->supply; + ldo1->supply.dev_name = dev_name(parent_dev); + + config.dev = parent_dev; + config.driver_data = ldo1; + config.regmap = ldo1->regmap; + + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(parent_dev)) { + ret = arizona_ldo1_of_get_pdata(pdata, + &config, desc, + external_dcvdd); + if (ret < 0) + return ret; + } + } + + /* We assume that high output = regulator off + * Don't use devm, since we need to get against the parent device + * so clean up would happen at the wrong time + */ + config.ena_gpiod = gpiod_get_optional(parent_dev, "wlf,ldoena", + GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(config.ena_gpiod)) + return PTR_ERR(config.ena_gpiod); + + ldo1->ena_gpiod = config.ena_gpiod; + + if (pdata->init_data) + config.init_data = pdata->init_data; + else + config.init_data = &ldo1->init_data; + + /* + * LDO1 can only be used to supply DCVDD so if it has no + * consumers then DCVDD is supplied externally. + */ + if (config.init_data->num_consumer_supplies == 0) + *external_dcvdd = true; + + ldo1->regulator = devm_regulator_register(&pdev->dev, desc, &config); + + of_node_put(config.of_node); + + if (IS_ERR(ldo1->regulator)) { + ret = PTR_ERR(ldo1->regulator); + dev_err(&pdev->dev, "Failed to register LDO1 supply: %d\n", + ret); + return ret; + } + + platform_set_drvdata(pdev, ldo1); + + return 0; +} + +static int arizona_ldo1_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct arizona_ldo1 *ldo1; + const struct regulator_desc *desc; + bool external_dcvdd; + int ret; + + ldo1 = devm_kzalloc(&pdev->dev, sizeof(*ldo1), GFP_KERNEL); + if (!ldo1) + return -ENOMEM; + + ldo1->regmap = arizona->regmap; + + /* + * Since the chip usually supplies itself we provide some + * default init_data for it. This will be overridden with + * platform data if provided. + */ + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + desc = &arizona_ldo1_hc; + ldo1->init_data = arizona_ldo1_dvfs; + break; + case WM5110: + case WM8280: + desc = &arizona_ldo1; + ldo1->init_data = arizona_ldo1_wm5110; + break; + default: + desc = &arizona_ldo1; + ldo1->init_data = arizona_ldo1_default; + break; + } + + ret = arizona_ldo1_common_init(pdev, ldo1, desc, + &arizona->pdata.ldo1, + &external_dcvdd); + if (ret == 0) + arizona->external_dcvdd = external_dcvdd; + + return ret; +} + +static void arizona_ldo1_remove(struct platform_device *pdev) +{ + struct arizona_ldo1 *ldo1 = platform_get_drvdata(pdev); + + if (ldo1->ena_gpiod) + gpiod_put(ldo1->ena_gpiod); +} + +static int madera_ldo1_probe(struct platform_device *pdev) +{ + struct madera *madera = dev_get_drvdata(pdev->dev.parent); + struct arizona_ldo1 *ldo1; + bool external_dcvdd; + int ret; + + ldo1 = devm_kzalloc(&pdev->dev, sizeof(*ldo1), GFP_KERNEL); + if (!ldo1) + return -ENOMEM; + + ldo1->regmap = madera->regmap; + + ldo1->init_data = madera_ldo1_default; + + ret = arizona_ldo1_common_init(pdev, ldo1, &madera_ldo1, + &madera->pdata.ldo1, + &external_dcvdd); + if (ret) + return ret; + + madera->internal_dcvdd = !external_dcvdd; + + return 0; +} + +static struct platform_driver arizona_ldo1_driver = { + .probe = arizona_ldo1_probe, + .remove = arizona_ldo1_remove, + .driver = { + .name = "arizona-ldo1", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +static struct platform_driver madera_ldo1_driver = { + .probe = madera_ldo1_probe, + .remove = arizona_ldo1_remove, + .driver = { + .name = "madera-ldo1", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +static struct platform_driver * const madera_ldo1_drivers[] = { + &arizona_ldo1_driver, + &madera_ldo1_driver, +}; + +static int __init arizona_ldo1_init(void) +{ + return platform_register_drivers(madera_ldo1_drivers, + ARRAY_SIZE(madera_ldo1_drivers)); +} +module_init(arizona_ldo1_init); + +static void __exit madera_ldo1_exit(void) +{ + platform_unregister_drivers(madera_ldo1_drivers, + ARRAY_SIZE(madera_ldo1_drivers)); +} +module_exit(madera_ldo1_exit); + +/* Module information */ +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("Arizona LDO1 driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:arizona-ldo1"); +MODULE_ALIAS("platform:madera-ldo1"); diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c new file mode 100644 index 000000000..be7208bc7 --- /dev/null +++ b/drivers/regulator/arizona-micsupp.c @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// arizona-micsupp.c -- Microphone supply for Arizona devices +// +// Copyright 2012 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include + +struct arizona_micsupp { + struct regulator_dev *regulator; + struct regmap *regmap; + struct snd_soc_dapm_context **dapm; + const struct regulator_desc *desc; + struct device *dev; + + struct regulator_consumer_supply supply; + struct regulator_init_data init_data; + + struct work_struct check_cp_work; +}; + +static void arizona_micsupp_check_cp(struct work_struct *work) +{ + struct arizona_micsupp *micsupp = + container_of(work, struct arizona_micsupp, check_cp_work); + struct snd_soc_dapm_context *dapm = *micsupp->dapm; + const struct regulator_desc *desc = micsupp->desc; + unsigned int val; + int ret; + + ret = regmap_read(micsupp->regmap, desc->enable_reg, &val); + if (ret != 0) { + dev_err(micsupp->dev, + "Failed to read CP state: %d\n", ret); + return; + } + + if (dapm) { + if ((val & (desc->enable_mask | desc->bypass_mask)) == + desc->enable_mask) + snd_soc_dapm_force_enable_pin(dapm, "MICSUPP"); + else + snd_soc_dapm_disable_pin(dapm, "MICSUPP"); + + snd_soc_dapm_sync(dapm); + } +} + +static int arizona_micsupp_enable(struct regulator_dev *rdev) +{ + struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_enable_regmap(rdev); + + if (ret == 0) + schedule_work(&micsupp->check_cp_work); + + return ret; +} + +static int arizona_micsupp_disable(struct regulator_dev *rdev) +{ + struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_disable_regmap(rdev); + if (ret == 0) + schedule_work(&micsupp->check_cp_work); + + return ret; +} + +static int arizona_micsupp_set_bypass(struct regulator_dev *rdev, bool ena) +{ + struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_set_bypass_regmap(rdev, ena); + if (ret == 0) + schedule_work(&micsupp->check_cp_work); + + return ret; +} + +static const struct regulator_ops arizona_micsupp_ops = { + .enable = arizona_micsupp_enable, + .disable = arizona_micsupp_disable, + .is_enabled = regulator_is_enabled_regmap, + + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = arizona_micsupp_set_bypass, +}; + +static const struct linear_range arizona_micsupp_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 0x1e, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x1f, 0x1f, 0), +}; + +static const struct regulator_desc arizona_micsupp = { + .name = "MICVDD", + .supply_name = "CPVDD", + .type = REGULATOR_VOLTAGE, + .n_voltages = 32, + .ops = &arizona_micsupp_ops, + + .vsel_reg = ARIZONA_LDO2_CONTROL_1, + .vsel_mask = ARIZONA_LDO2_VSEL_MASK, + .enable_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .enable_mask = ARIZONA_CPMIC_ENA, + .bypass_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .bypass_mask = ARIZONA_CPMIC_BYPASS, + + .linear_ranges = arizona_micsupp_ranges, + .n_linear_ranges = ARRAY_SIZE(arizona_micsupp_ranges), + + .enable_time = 3000, + + .owner = THIS_MODULE, +}; + +static const struct linear_range arizona_micsupp_ext_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 0x14, 25000), + REGULATOR_LINEAR_RANGE(1500000, 0x15, 0x27, 100000), +}; + +static const struct regulator_desc arizona_micsupp_ext = { + .name = "MICVDD", + .supply_name = "CPVDD", + .type = REGULATOR_VOLTAGE, + .n_voltages = 40, + .ops = &arizona_micsupp_ops, + + .vsel_reg = ARIZONA_LDO2_CONTROL_1, + .vsel_mask = ARIZONA_LDO2_VSEL_MASK, + .enable_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .enable_mask = ARIZONA_CPMIC_ENA, + .bypass_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .bypass_mask = ARIZONA_CPMIC_BYPASS, + + .linear_ranges = arizona_micsupp_ext_ranges, + .n_linear_ranges = ARRAY_SIZE(arizona_micsupp_ext_ranges), + + .enable_time = 3000, + + .owner = THIS_MODULE, +}; + +static const struct regulator_init_data arizona_micsupp_default = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_BYPASS, + .min_uV = 1700000, + .max_uV = 3300000, + }, + + .num_consumer_supplies = 1, +}; + +static const struct regulator_init_data arizona_micsupp_ext_default = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_BYPASS, + .min_uV = 900000, + .max_uV = 3300000, + }, + + .num_consumer_supplies = 1, +}; + +static const struct regulator_desc madera_micsupp = { + .name = "MICVDD", + .supply_name = "CPVDD1", + .type = REGULATOR_VOLTAGE, + .n_voltages = 40, + .ops = &arizona_micsupp_ops, + .vsel_reg = MADERA_LDO2_CONTROL_1, + .vsel_mask = MADERA_LDO2_VSEL_MASK, + .enable_reg = MADERA_MIC_CHARGE_PUMP_1, + .enable_mask = MADERA_CPMIC_ENA, + .bypass_reg = MADERA_MIC_CHARGE_PUMP_1, + .bypass_mask = MADERA_CPMIC_BYPASS, + + .linear_ranges = arizona_micsupp_ext_ranges, + .n_linear_ranges = ARRAY_SIZE(arizona_micsupp_ext_ranges), + + .enable_time = 3000, + + .owner = THIS_MODULE, +}; + +static int arizona_micsupp_of_get_pdata(struct arizona_micsupp_pdata *pdata, + struct regulator_config *config, + const struct regulator_desc *desc) +{ + struct arizona_micsupp *micsupp = config->driver_data; + struct device_node *np; + struct regulator_init_data *init_data; + + np = of_get_child_by_name(config->dev->of_node, "micvdd"); + + if (np) { + config->of_node = np; + + init_data = of_get_regulator_init_data(config->dev, np, desc); + + if (init_data) { + init_data->consumer_supplies = &micsupp->supply; + init_data->num_consumer_supplies = 1; + + pdata->init_data = init_data; + } + } + + return 0; +} + +static int arizona_micsupp_common_init(struct platform_device *pdev, + struct arizona_micsupp *micsupp, + const struct regulator_desc *desc, + struct arizona_micsupp_pdata *pdata) +{ + struct regulator_config config = { }; + int ret; + + INIT_WORK(&micsupp->check_cp_work, arizona_micsupp_check_cp); + + micsupp->init_data.consumer_supplies = &micsupp->supply; + micsupp->supply.dev_name = dev_name(micsupp->dev); + micsupp->desc = desc; + + config.dev = micsupp->dev; + config.driver_data = micsupp; + config.regmap = micsupp->regmap; + + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(micsupp->dev)) { + ret = arizona_micsupp_of_get_pdata(pdata, &config, + desc); + if (ret < 0) + return ret; + } + } + + if (pdata->init_data) + config.init_data = pdata->init_data; + else + config.init_data = &micsupp->init_data; + + /* Default to regulated mode */ + regmap_update_bits(micsupp->regmap, desc->enable_reg, desc->bypass_mask, 0); + + micsupp->regulator = devm_regulator_register(&pdev->dev, + desc, + &config); + + of_node_put(config.of_node); + + if (IS_ERR(micsupp->regulator)) { + ret = PTR_ERR(micsupp->regulator); + dev_err(micsupp->dev, "Failed to register mic supply: %d\n", + ret); + return ret; + } + + platform_set_drvdata(pdev, micsupp); + + return 0; +} + +static int arizona_micsupp_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + const struct regulator_desc *desc; + struct arizona_micsupp *micsupp; + + micsupp = devm_kzalloc(&pdev->dev, sizeof(*micsupp), GFP_KERNEL); + if (!micsupp) + return -ENOMEM; + + micsupp->regmap = arizona->regmap; + micsupp->dapm = &arizona->dapm; + micsupp->dev = arizona->dev; + + micsupp->supply.supply = "MICVDD"; + + /* + * Since the chip usually supplies itself we provide some + * default init_data for it. This will be overridden with + * platform data if provided. + */ + switch (arizona->type) { + case WM5110: + case WM8280: + desc = &arizona_micsupp_ext; + micsupp->init_data = arizona_micsupp_ext_default; + break; + default: + desc = &arizona_micsupp; + micsupp->init_data = arizona_micsupp_default; + break; + } + + return arizona_micsupp_common_init(pdev, micsupp, desc, + &arizona->pdata.micvdd); +} + +static int madera_micsupp_probe(struct platform_device *pdev) +{ + struct madera *madera = dev_get_drvdata(pdev->dev.parent); + struct arizona_micsupp *micsupp; + + micsupp = devm_kzalloc(&pdev->dev, sizeof(*micsupp), GFP_KERNEL); + if (!micsupp) + return -ENOMEM; + + micsupp->regmap = madera->regmap; + micsupp->dapm = &madera->dapm; + micsupp->dev = madera->dev; + micsupp->init_data = arizona_micsupp_ext_default; + + micsupp->supply.supply = "MICVDD"; + + return arizona_micsupp_common_init(pdev, micsupp, &madera_micsupp, + &madera->pdata.micvdd); +} + +static struct platform_driver arizona_micsupp_driver = { + .probe = arizona_micsupp_probe, + .driver = { + .name = "arizona-micsupp", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +static struct platform_driver madera_micsupp_driver = { + .probe = madera_micsupp_probe, + .driver = { + .name = "madera-micsupp", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +static struct platform_driver * const arizona_micsupp_drivers[] = { + &arizona_micsupp_driver, + &madera_micsupp_driver, +}; + +static int __init arizona_micsupp_init(void) +{ + return platform_register_drivers(arizona_micsupp_drivers, + ARRAY_SIZE(arizona_micsupp_drivers)); +} +module_init(arizona_micsupp_init); + +static void __exit arizona_micsupp_exit(void) +{ + platform_unregister_drivers(arizona_micsupp_drivers, + ARRAY_SIZE(arizona_micsupp_drivers)); +} +module_exit(arizona_micsupp_exit); + +/* Module information */ +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("Arizona microphone supply driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:arizona-micsupp"); +MODULE_ALIAS("platform:madera-micsupp"); diff --git a/drivers/regulator/as3711-regulator.c b/drivers/regulator/as3711-regulator.c new file mode 100644 index 000000000..0431a732c --- /dev/null +++ b/drivers/regulator/as3711-regulator.c @@ -0,0 +1,266 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AS3711 PMIC regulator driver, using DCDC Step Down and LDO supplies + * + * Copyright (C) 2012 Renesas Electronics Corporation + * Author: Guennadi Liakhovetski, + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * The regulator API supports 4 modes of operataion: FAST, NORMAL, IDLE and + * STANDBY. We map them in the following way to AS3711 SD1-4 DCDC modes: + * FAST: sdX_fast=1 + * NORMAL: low_noise=1 + * IDLE: low_noise=0 + */ + +static int as3711_set_mode_sd(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int fast_bit = rdev->desc->enable_mask, + low_noise_bit = fast_bit << 4; + u8 val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = fast_bit | low_noise_bit; + break; + case REGULATOR_MODE_NORMAL: + val = low_noise_bit; + break; + case REGULATOR_MODE_IDLE: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, AS3711_SD_CONTROL_1, + low_noise_bit | fast_bit, val); +} + +static unsigned int as3711_get_mode_sd(struct regulator_dev *rdev) +{ + unsigned int fast_bit = rdev->desc->enable_mask, + low_noise_bit = fast_bit << 4, mask = fast_bit | low_noise_bit; + unsigned int val; + int ret = regmap_read(rdev->regmap, AS3711_SD_CONTROL_1, &val); + + if (ret < 0) + return ret; + + if ((val & mask) == mask) + return REGULATOR_MODE_FAST; + + if ((val & mask) == low_noise_bit) + return REGULATOR_MODE_NORMAL; + + if (!(val & mask)) + return REGULATOR_MODE_IDLE; + + return -EINVAL; +} + +static const struct regulator_ops as3711_sd_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_mode = as3711_get_mode_sd, + .set_mode = as3711_set_mode_sd, +}; + +static const struct regulator_ops as3711_aldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_ops as3711_dldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct linear_range as3711_sd_ranges[] = { + REGULATOR_LINEAR_RANGE(612500, 0x1, 0x40, 12500), + REGULATOR_LINEAR_RANGE(1425000, 0x41, 0x70, 25000), + REGULATOR_LINEAR_RANGE(2650000, 0x71, 0x7f, 50000), +}; + +static const struct linear_range as3711_aldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 0xf, 50000), + REGULATOR_LINEAR_RANGE(1800000, 0x10, 0x1f, 100000), +}; + +static const struct linear_range as3711_dldo_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 0x10, 50000), + REGULATOR_LINEAR_RANGE(1750000, 0x20, 0x3f, 50000), +}; + +#define AS3711_REG(_id, _en_reg, _en_bit, _vmask, _sfx) \ + [AS3711_REGULATOR_ ## _id] = { \ + .name = "as3711-regulator-" # _id, \ + .id = AS3711_REGULATOR_ ## _id, \ + .n_voltages = (_vmask + 1), \ + .ops = &as3711_ ## _sfx ## _ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = AS3711_ ## _id ## _VOLTAGE, \ + .vsel_mask = _vmask, \ + .enable_reg = AS3711_ ## _en_reg, \ + .enable_mask = BIT(_en_bit), \ + .linear_ranges = as3711_ ## _sfx ## _ranges, \ + .n_linear_ranges = ARRAY_SIZE(as3711_ ## _sfx ## _ranges), \ +} + +static const struct regulator_desc as3711_reg_desc[] = { + AS3711_REG(SD_1, SD_CONTROL, 0, 0x7f, sd), + AS3711_REG(SD_2, SD_CONTROL, 1, 0x7f, sd), + AS3711_REG(SD_3, SD_CONTROL, 2, 0x7f, sd), + AS3711_REG(SD_4, SD_CONTROL, 3, 0x7f, sd), + AS3711_REG(LDO_1, LDO_1_VOLTAGE, 7, 0x1f, aldo), + AS3711_REG(LDO_2, LDO_2_VOLTAGE, 7, 0x1f, aldo), + AS3711_REG(LDO_3, LDO_3_VOLTAGE, 7, 0x3f, dldo), + AS3711_REG(LDO_4, LDO_4_VOLTAGE, 7, 0x3f, dldo), + AS3711_REG(LDO_5, LDO_5_VOLTAGE, 7, 0x3f, dldo), + AS3711_REG(LDO_6, LDO_6_VOLTAGE, 7, 0x3f, dldo), + AS3711_REG(LDO_7, LDO_7_VOLTAGE, 7, 0x3f, dldo), + AS3711_REG(LDO_8, LDO_8_VOLTAGE, 7, 0x3f, dldo), + /* StepUp output voltage depends on supplying regulator */ +}; + +#define AS3711_REGULATOR_NUM ARRAY_SIZE(as3711_reg_desc) + +static struct of_regulator_match +as3711_regulator_matches[AS3711_REGULATOR_NUM] = { + [AS3711_REGULATOR_SD_1] = { .name = "sd1" }, + [AS3711_REGULATOR_SD_2] = { .name = "sd2" }, + [AS3711_REGULATOR_SD_3] = { .name = "sd3" }, + [AS3711_REGULATOR_SD_4] = { .name = "sd4" }, + [AS3711_REGULATOR_LDO_1] = { .name = "ldo1" }, + [AS3711_REGULATOR_LDO_2] = { .name = "ldo2" }, + [AS3711_REGULATOR_LDO_3] = { .name = "ldo3" }, + [AS3711_REGULATOR_LDO_4] = { .name = "ldo4" }, + [AS3711_REGULATOR_LDO_5] = { .name = "ldo5" }, + [AS3711_REGULATOR_LDO_6] = { .name = "ldo6" }, + [AS3711_REGULATOR_LDO_7] = { .name = "ldo7" }, + [AS3711_REGULATOR_LDO_8] = { .name = "ldo8" }, +}; + +static int as3711_regulator_parse_dt(struct device *dev, + struct device_node **of_node, const int count) +{ + struct as3711_regulator_pdata *pdata = dev_get_platdata(dev); + struct device_node *regulators = + of_get_child_by_name(dev->parent->of_node, "regulators"); + struct of_regulator_match *match; + int ret, i; + + if (!regulators) { + dev_err(dev, "regulator node not found\n"); + return -ENODEV; + } + + ret = of_regulator_match(dev->parent, regulators, + as3711_regulator_matches, count); + of_node_put(regulators); + if (ret < 0) { + dev_err(dev, "Error parsing regulator init data: %d\n", ret); + return ret; + } + + for (i = 0, match = as3711_regulator_matches; i < count; i++, match++) + if (match->of_node) { + pdata->init_data[i] = match->init_data; + of_node[i] = match->of_node; + } + + return 0; +} + +static int as3711_regulator_probe(struct platform_device *pdev) +{ + struct as3711_regulator_pdata *pdata = dev_get_platdata(&pdev->dev); + struct as3711 *as3711 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {.dev = &pdev->dev,}; + struct device_node *of_node[AS3711_REGULATOR_NUM] = {}; + struct regulator_dev *rdev; + int ret; + int id; + + if (!pdata) { + dev_err(&pdev->dev, "No platform data...\n"); + return -ENODEV; + } + + if (pdev->dev.parent->of_node) { + ret = as3711_regulator_parse_dt(&pdev->dev, of_node, AS3711_REGULATOR_NUM); + if (ret < 0) { + dev_err(&pdev->dev, "DT parsing failed: %d\n", ret); + return ret; + } + } + + for (id = 0; id < AS3711_REGULATOR_NUM; id++) { + config.init_data = pdata->init_data[id]; + config.regmap = as3711->regmap; + config.of_node = of_node[id]; + + rdev = devm_regulator_register(&pdev->dev, &as3711_reg_desc[id], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register regulator %s\n", + as3711_reg_desc[id].name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver as3711_regulator_driver = { + .driver = { + .name = "as3711-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = as3711_regulator_probe, +}; + +static int __init as3711_regulator_init(void) +{ + return platform_driver_register(&as3711_regulator_driver); +} +subsys_initcall(as3711_regulator_init); + +static void __exit as3711_regulator_exit(void) +{ + platform_driver_unregister(&as3711_regulator_driver); +} +module_exit(as3711_regulator_exit); + +MODULE_AUTHOR("Guennadi Liakhovetski "); +MODULE_DESCRIPTION("AS3711 regulator driver"); +MODULE_ALIAS("platform:as3711-regulator"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/as3722-regulator.c b/drivers/regulator/as3722-regulator.c new file mode 100644 index 000000000..85e2aaa1a --- /dev/null +++ b/drivers/regulator/as3722-regulator.c @@ -0,0 +1,845 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Voltage regulator support for AMS AS3722 PMIC + * + * Copyright (C) 2013 ams + * + * Author: Florian Lobmaier + * Author: Laxman Dewangan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Regulator IDs */ +enum as3722_regulators_id { + AS3722_REGULATOR_ID_SD0, + AS3722_REGULATOR_ID_SD1, + AS3722_REGULATOR_ID_SD2, + AS3722_REGULATOR_ID_SD3, + AS3722_REGULATOR_ID_SD4, + AS3722_REGULATOR_ID_SD5, + AS3722_REGULATOR_ID_SD6, + AS3722_REGULATOR_ID_LDO0, + AS3722_REGULATOR_ID_LDO1, + AS3722_REGULATOR_ID_LDO2, + AS3722_REGULATOR_ID_LDO3, + AS3722_REGULATOR_ID_LDO4, + AS3722_REGULATOR_ID_LDO5, + AS3722_REGULATOR_ID_LDO6, + AS3722_REGULATOR_ID_LDO7, + AS3722_REGULATOR_ID_LDO9, + AS3722_REGULATOR_ID_LDO10, + AS3722_REGULATOR_ID_LDO11, + AS3722_REGULATOR_ID_MAX, +}; + +struct as3722_register_mapping { + u8 regulator_id; + const char *name; + const char *sname; + u8 vsel_reg; + u8 vsel_mask; + int n_voltages; + u32 enable_reg; + u8 enable_mask; + u32 control_reg; + u8 mode_mask; + u32 sleep_ctrl_reg; + u8 sleep_ctrl_mask; +}; + +struct as3722_regulator_config_data { + struct regulator_init_data *reg_init; + bool enable_tracking; + int ext_control; +}; + +struct as3722_regulators { + struct device *dev; + struct as3722 *as3722; + struct regulator_desc desc[AS3722_REGULATOR_ID_MAX]; + struct as3722_regulator_config_data + reg_config_data[AS3722_REGULATOR_ID_MAX]; +}; + +static const struct as3722_register_mapping as3722_reg_lookup[] = { + { + .regulator_id = AS3722_REGULATOR_ID_SD0, + .name = "as3722-sd0", + .vsel_reg = AS3722_SD0_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(0), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL1_REG, + .sleep_ctrl_mask = AS3722_SD0_EXT_ENABLE_MASK, + .control_reg = AS3722_SD0_CONTROL_REG, + .mode_mask = AS3722_SD0_MODE_FAST, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD1, + .name = "as3722-sd1", + .vsel_reg = AS3722_SD1_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(1), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL1_REG, + .sleep_ctrl_mask = AS3722_SD1_EXT_ENABLE_MASK, + .control_reg = AS3722_SD1_CONTROL_REG, + .mode_mask = AS3722_SD1_MODE_FAST, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD2, + .name = "as3722-sd2", + .sname = "vsup-sd2", + .vsel_reg = AS3722_SD2_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(2), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL1_REG, + .sleep_ctrl_mask = AS3722_SD2_EXT_ENABLE_MASK, + .control_reg = AS3722_SD23_CONTROL_REG, + .mode_mask = AS3722_SD2_MODE_FAST, + .n_voltages = AS3722_SD2_VSEL_MAX + 1, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD3, + .name = "as3722-sd3", + .sname = "vsup-sd3", + .vsel_reg = AS3722_SD3_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(3), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL1_REG, + .sleep_ctrl_mask = AS3722_SD3_EXT_ENABLE_MASK, + .control_reg = AS3722_SD23_CONTROL_REG, + .mode_mask = AS3722_SD3_MODE_FAST, + .n_voltages = AS3722_SD2_VSEL_MAX + 1, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD4, + .name = "as3722-sd4", + .sname = "vsup-sd4", + .vsel_reg = AS3722_SD4_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(4), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL2_REG, + .sleep_ctrl_mask = AS3722_SD4_EXT_ENABLE_MASK, + .control_reg = AS3722_SD4_CONTROL_REG, + .mode_mask = AS3722_SD4_MODE_FAST, + .n_voltages = AS3722_SD2_VSEL_MAX + 1, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD5, + .name = "as3722-sd5", + .sname = "vsup-sd5", + .vsel_reg = AS3722_SD5_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(5), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL2_REG, + .sleep_ctrl_mask = AS3722_SD5_EXT_ENABLE_MASK, + .control_reg = AS3722_SD5_CONTROL_REG, + .mode_mask = AS3722_SD5_MODE_FAST, + .n_voltages = AS3722_SD2_VSEL_MAX + 1, + }, + { + .regulator_id = AS3722_REGULATOR_ID_SD6, + .name = "as3722-sd6", + .vsel_reg = AS3722_SD6_VOLTAGE_REG, + .vsel_mask = AS3722_SD_VSEL_MASK, + .enable_reg = AS3722_SD_CONTROL_REG, + .enable_mask = AS3722_SDn_CTRL(6), + .sleep_ctrl_reg = AS3722_ENABLE_CTRL2_REG, + .sleep_ctrl_mask = AS3722_SD6_EXT_ENABLE_MASK, + .control_reg = AS3722_SD6_CONTROL_REG, + .mode_mask = AS3722_SD6_MODE_FAST, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO0, + .name = "as3722-ldo0", + .sname = "vin-ldo0", + .vsel_reg = AS3722_LDO0_VOLTAGE_REG, + .vsel_mask = AS3722_LDO0_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO0_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL3_REG, + .sleep_ctrl_mask = AS3722_LDO0_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO0_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO1, + .name = "as3722-ldo1", + .sname = "vin-ldo1-6", + .vsel_reg = AS3722_LDO1_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO1_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL3_REG, + .sleep_ctrl_mask = AS3722_LDO1_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO2, + .name = "as3722-ldo2", + .sname = "vin-ldo2-5-7", + .vsel_reg = AS3722_LDO2_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO2_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL3_REG, + .sleep_ctrl_mask = AS3722_LDO2_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO3, + .name = "as3722-ldo3", + .sname = "vin-ldo3-4", + .vsel_reg = AS3722_LDO3_VOLTAGE_REG, + .vsel_mask = AS3722_LDO3_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO3_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL3_REG, + .sleep_ctrl_mask = AS3722_LDO3_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO3_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO4, + .name = "as3722-ldo4", + .sname = "vin-ldo3-4", + .vsel_reg = AS3722_LDO4_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO4_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL4_REG, + .sleep_ctrl_mask = AS3722_LDO4_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO5, + .name = "as3722-ldo5", + .sname = "vin-ldo2-5-7", + .vsel_reg = AS3722_LDO5_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO5_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL4_REG, + .sleep_ctrl_mask = AS3722_LDO5_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO6, + .name = "as3722-ldo6", + .sname = "vin-ldo1-6", + .vsel_reg = AS3722_LDO6_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO6_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL4_REG, + .sleep_ctrl_mask = AS3722_LDO6_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO7, + .name = "as3722-ldo7", + .sname = "vin-ldo2-5-7", + .vsel_reg = AS3722_LDO7_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL0_REG, + .enable_mask = AS3722_LDO7_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL4_REG, + .sleep_ctrl_mask = AS3722_LDO7_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO9, + .name = "as3722-ldo9", + .sname = "vin-ldo9-10", + .vsel_reg = AS3722_LDO9_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL1_REG, + .enable_mask = AS3722_LDO9_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL5_REG, + .sleep_ctrl_mask = AS3722_LDO9_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO10, + .name = "as3722-ldo10", + .sname = "vin-ldo9-10", + .vsel_reg = AS3722_LDO10_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL1_REG, + .enable_mask = AS3722_LDO10_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL5_REG, + .sleep_ctrl_mask = AS3722_LDO10_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, + { + .regulator_id = AS3722_REGULATOR_ID_LDO11, + .name = "as3722-ldo11", + .sname = "vin-ldo11", + .vsel_reg = AS3722_LDO11_VOLTAGE_REG, + .vsel_mask = AS3722_LDO_VSEL_MASK, + .enable_reg = AS3722_LDOCONTROL1_REG, + .enable_mask = AS3722_LDO11_CTRL, + .sleep_ctrl_reg = AS3722_ENABLE_CTRL5_REG, + .sleep_ctrl_mask = AS3722_LDO11_EXT_ENABLE_MASK, + .n_voltages = AS3722_LDO_NUM_VOLT, + }, +}; + +static const unsigned int as3722_ldo_current[] = { 150000, 300000 }; +static const unsigned int as3722_sd016_current[] = { + 2500000, 3000000, 3500000 +}; + +static const struct regulator_ops as3722_ldo0_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static const struct regulator_ops as3722_ldo0_extcntrl_ops = { + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static int as3722_ldo3_set_tracking_mode(struct as3722_regulators *as3722_reg, + int id, u8 mode) +{ + struct as3722 *as3722 = as3722_reg->as3722; + + switch (mode) { + case AS3722_LDO3_MODE_PMOS: + case AS3722_LDO3_MODE_PMOS_TRACKING: + case AS3722_LDO3_MODE_NMOS: + case AS3722_LDO3_MODE_SWITCH: + return as3722_update_bits(as3722, + as3722_reg_lookup[id].vsel_reg, + AS3722_LDO3_MODE_MASK, mode); + + default: + return -EINVAL; + } +} + +static int as3722_ldo3_get_current_limit(struct regulator_dev *rdev) +{ + return 150000; +} + +static const struct regulator_ops as3722_ldo3_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = as3722_ldo3_get_current_limit, +}; + +static const struct regulator_ops as3722_ldo3_extcntrl_ops = { + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = as3722_ldo3_get_current_limit, +}; + +static const struct regulator_ops as3722_ldo6_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, +}; + +static const struct regulator_ops as3722_ldo6_extcntrl_ops = { + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, +}; + +static const struct linear_range as3722_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x00, 0x00, 0), + REGULATOR_LINEAR_RANGE(825000, 0x01, 0x24, 25000), + REGULATOR_LINEAR_RANGE(1725000, 0x40, 0x7F, 25000), +}; + +static const struct regulator_ops as3722_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static const struct regulator_ops as3722_ldo_extcntrl_ops = { + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static unsigned int as3722_sd_get_mode(struct regulator_dev *rdev) +{ + struct as3722_regulators *as3722_regs = rdev_get_drvdata(rdev); + struct as3722 *as3722 = as3722_regs->as3722; + int id = rdev_get_id(rdev); + u32 val; + int ret; + + if (!as3722_reg_lookup[id].control_reg) + return -ENOTSUPP; + + ret = as3722_read(as3722, as3722_reg_lookup[id].control_reg, &val); + if (ret < 0) { + dev_err(as3722_regs->dev, "Reg 0x%02x read failed: %d\n", + as3722_reg_lookup[id].control_reg, ret); + return ret; + } + + if (val & as3722_reg_lookup[id].mode_mask) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int as3722_sd_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct as3722_regulators *as3722_regs = rdev_get_drvdata(rdev); + struct as3722 *as3722 = as3722_regs->as3722; + u8 id = rdev_get_id(rdev); + u8 val = 0; + int ret; + + if (!as3722_reg_lookup[id].control_reg) + return -ERANGE; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = as3722_reg_lookup[id].mode_mask; + fallthrough; + case REGULATOR_MODE_NORMAL: + break; + default: + return -EINVAL; + } + + ret = as3722_update_bits(as3722, as3722_reg_lookup[id].control_reg, + as3722_reg_lookup[id].mode_mask, val); + if (ret < 0) { + dev_err(as3722_regs->dev, "Reg 0x%02x update failed: %d\n", + as3722_reg_lookup[id].control_reg, ret); + return ret; + } + return ret; +} + +static bool as3722_sd0_is_low_voltage(struct as3722_regulators *as3722_regs) +{ + int err; + unsigned val; + + err = as3722_read(as3722_regs->as3722, AS3722_FUSE7_REG, &val); + if (err < 0) { + dev_err(as3722_regs->dev, "Reg 0x%02x read failed: %d\n", + AS3722_FUSE7_REG, err); + return false; + } + if (val & AS3722_FUSE7_SD0_LOW_VOLTAGE) + return true; + return false; +} + +static const struct linear_range as3722_sd2345_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x00, 0x00, 0), + REGULATOR_LINEAR_RANGE(612500, 0x01, 0x40, 12500), + REGULATOR_LINEAR_RANGE(1425000, 0x41, 0x70, 25000), + REGULATOR_LINEAR_RANGE(2650000, 0x71, 0x7F, 50000), +}; + +static const struct regulator_ops as3722_sd016_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .get_mode = as3722_sd_get_mode, + .set_mode = as3722_sd_set_mode, +}; + +static const struct regulator_ops as3722_sd016_extcntrl_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .get_mode = as3722_sd_get_mode, + .set_mode = as3722_sd_set_mode, +}; + +static const struct regulator_ops as3722_sd2345_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .get_mode = as3722_sd_get_mode, + .set_mode = as3722_sd_set_mode, +}; + +static const struct regulator_ops as3722_sd2345_extcntrl_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .get_mode = as3722_sd_get_mode, + .set_mode = as3722_sd_set_mode, +}; + +static int as3722_extreg_init(struct as3722_regulators *as3722_regs, int id, + int ext_pwr_ctrl) +{ + int ret; + unsigned int val; + + if ((ext_pwr_ctrl < AS3722_EXT_CONTROL_ENABLE1) || + (ext_pwr_ctrl > AS3722_EXT_CONTROL_ENABLE3)) + return -EINVAL; + + val = ext_pwr_ctrl << (ffs(as3722_reg_lookup[id].sleep_ctrl_mask) - 1); + ret = as3722_update_bits(as3722_regs->as3722, + as3722_reg_lookup[id].sleep_ctrl_reg, + as3722_reg_lookup[id].sleep_ctrl_mask, val); + if (ret < 0) + dev_err(as3722_regs->dev, "Reg 0x%02x update failed: %d\n", + as3722_reg_lookup[id].sleep_ctrl_reg, ret); + return ret; +} + +static struct of_regulator_match as3722_regulator_matches[] = { + { .name = "sd0", }, + { .name = "sd1", }, + { .name = "sd2", }, + { .name = "sd3", }, + { .name = "sd4", }, + { .name = "sd5", }, + { .name = "sd6", }, + { .name = "ldo0", }, + { .name = "ldo1", }, + { .name = "ldo2", }, + { .name = "ldo3", }, + { .name = "ldo4", }, + { .name = "ldo5", }, + { .name = "ldo6", }, + { .name = "ldo7", }, + { .name = "ldo9", }, + { .name = "ldo10", }, + { .name = "ldo11", }, +}; + +static int as3722_get_regulator_dt_data(struct platform_device *pdev, + struct as3722_regulators *as3722_regs) +{ + struct device_node *np; + struct as3722_regulator_config_data *reg_config; + u32 prop; + int id; + int ret; + + np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); + if (!np) { + dev_err(&pdev->dev, "Device is not having regulators node\n"); + return -ENODEV; + } + pdev->dev.of_node = np; + + ret = of_regulator_match(&pdev->dev, np, as3722_regulator_matches, + ARRAY_SIZE(as3722_regulator_matches)); + if (ret < 0) { + dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n", + ret); + return ret; + } + + for (id = 0; id < ARRAY_SIZE(as3722_regulator_matches); ++id) { + struct device_node *reg_node; + + reg_config = &as3722_regs->reg_config_data[id]; + reg_config->reg_init = as3722_regulator_matches[id].init_data; + reg_node = as3722_regulator_matches[id].of_node; + + if (!reg_config->reg_init || !reg_node) + continue; + + ret = of_property_read_u32(reg_node, "ams,ext-control", &prop); + if (!ret) { + if (prop < 3) + reg_config->ext_control = prop; + else + dev_warn(&pdev->dev, + "ext-control have invalid option: %u\n", + prop); + } + reg_config->enable_tracking = + of_property_read_bool(reg_node, "ams,enable-tracking"); + } + return 0; +} + +static int as3722_regulator_probe(struct platform_device *pdev) +{ + struct as3722 *as3722 = dev_get_drvdata(pdev->dev.parent); + struct as3722_regulators *as3722_regs; + struct as3722_regulator_config_data *reg_config; + struct regulator_dev *rdev; + struct regulator_config config = { }; + const struct regulator_ops *ops; + int id; + int ret; + + as3722_regs = devm_kzalloc(&pdev->dev, sizeof(*as3722_regs), + GFP_KERNEL); + if (!as3722_regs) + return -ENOMEM; + + as3722_regs->dev = &pdev->dev; + as3722_regs->as3722 = as3722; + platform_set_drvdata(pdev, as3722_regs); + + ret = as3722_get_regulator_dt_data(pdev, as3722_regs); + if (ret < 0) + return ret; + + config.dev = &pdev->dev; + config.driver_data = as3722_regs; + config.regmap = as3722->regmap; + + for (id = 0; id < AS3722_REGULATOR_ID_MAX; id++) { + struct regulator_desc *desc; + + desc = &as3722_regs->desc[id]; + reg_config = &as3722_regs->reg_config_data[id]; + + desc->name = as3722_reg_lookup[id].name; + desc->supply_name = as3722_reg_lookup[id].sname; + desc->id = as3722_reg_lookup[id].regulator_id; + desc->n_voltages = as3722_reg_lookup[id].n_voltages; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + desc->enable_reg = as3722_reg_lookup[id].enable_reg; + desc->enable_mask = as3722_reg_lookup[id].enable_mask; + desc->vsel_reg = as3722_reg_lookup[id].vsel_reg; + desc->vsel_mask = as3722_reg_lookup[id].vsel_mask; + switch (id) { + case AS3722_REGULATOR_ID_LDO0: + if (reg_config->ext_control) + ops = &as3722_ldo0_extcntrl_ops; + else + ops = &as3722_ldo0_ops; + desc->min_uV = 825000; + desc->uV_step = 25000; + desc->linear_min_sel = 1; + desc->enable_time = 500; + desc->curr_table = as3722_ldo_current; + desc->n_current_limits = ARRAY_SIZE(as3722_ldo_current); + desc->csel_reg = as3722_reg_lookup[id].vsel_reg; + desc->csel_mask = AS3722_LDO_ILIMIT_MASK; + break; + case AS3722_REGULATOR_ID_LDO3: + if (reg_config->ext_control) + ops = &as3722_ldo3_extcntrl_ops; + else + ops = &as3722_ldo3_ops; + desc->min_uV = 620000; + desc->uV_step = 20000; + desc->linear_min_sel = 1; + desc->enable_time = 500; + if (reg_config->enable_tracking) { + ret = as3722_ldo3_set_tracking_mode(as3722_regs, + id, AS3722_LDO3_MODE_PMOS_TRACKING); + if (ret < 0) { + dev_err(&pdev->dev, + "LDO3 tracking failed: %d\n", + ret); + return ret; + } + } + break; + case AS3722_REGULATOR_ID_LDO6: + if (reg_config->ext_control) + ops = &as3722_ldo6_extcntrl_ops; + else + ops = &as3722_ldo6_ops; + desc->enable_time = 500; + desc->bypass_reg = AS3722_LDO6_VOLTAGE_REG; + desc->bypass_mask = AS3722_LDO_VSEL_MASK; + desc->bypass_val_on = AS3722_LDO6_VSEL_BYPASS; + desc->bypass_val_off = AS3722_LDO6_VSEL_BYPASS; + desc->linear_ranges = as3722_ldo_ranges; + desc->n_linear_ranges = ARRAY_SIZE(as3722_ldo_ranges); + desc->curr_table = as3722_ldo_current; + desc->n_current_limits = ARRAY_SIZE(as3722_ldo_current); + desc->csel_reg = as3722_reg_lookup[id].vsel_reg; + desc->csel_mask = AS3722_LDO_ILIMIT_MASK; + break; + case AS3722_REGULATOR_ID_SD0: + case AS3722_REGULATOR_ID_SD1: + case AS3722_REGULATOR_ID_SD6: + if (reg_config->ext_control) + ops = &as3722_sd016_extcntrl_ops; + else + ops = &as3722_sd016_ops; + if (id == AS3722_REGULATOR_ID_SD0 && + as3722_sd0_is_low_voltage(as3722_regs)) { + as3722_regs->desc[id].n_voltages = + AS3722_SD0_VSEL_LOW_VOL_MAX + 1; + as3722_regs->desc[id].min_uV = 410000; + } else { + as3722_regs->desc[id].n_voltages = + AS3722_SD0_VSEL_MAX + 1; + as3722_regs->desc[id].min_uV = 610000; + } + desc->uV_step = 10000; + desc->linear_min_sel = 1; + desc->enable_time = 600; + desc->curr_table = as3722_sd016_current; + desc->n_current_limits = + ARRAY_SIZE(as3722_sd016_current); + if (id == AS3722_REGULATOR_ID_SD0) { + desc->csel_reg = AS3722_OVCURRENT_REG; + desc->csel_mask = + AS3722_OVCURRENT_SD0_TRIP_MASK; + } else if (id == AS3722_REGULATOR_ID_SD1) { + desc->csel_reg = AS3722_OVCURRENT_REG; + desc->csel_mask = + AS3722_OVCURRENT_SD1_TRIP_MASK; + } else if (id == AS3722_REGULATOR_ID_SD6) { + desc->csel_reg = AS3722_OVCURRENT_DEB_REG; + desc->csel_mask = + AS3722_OVCURRENT_SD6_TRIP_MASK; + } + break; + case AS3722_REGULATOR_ID_SD2: + case AS3722_REGULATOR_ID_SD3: + case AS3722_REGULATOR_ID_SD4: + case AS3722_REGULATOR_ID_SD5: + if (reg_config->ext_control) + ops = &as3722_sd2345_extcntrl_ops; + else + ops = &as3722_sd2345_ops; + desc->linear_ranges = as3722_sd2345_ranges; + desc->n_linear_ranges = + ARRAY_SIZE(as3722_sd2345_ranges); + break; + default: + if (reg_config->ext_control) + ops = &as3722_ldo_extcntrl_ops; + else + ops = &as3722_ldo_ops; + desc->enable_time = 500; + desc->linear_ranges = as3722_ldo_ranges; + desc->n_linear_ranges = ARRAY_SIZE(as3722_ldo_ranges); + desc->curr_table = as3722_ldo_current; + desc->n_current_limits = ARRAY_SIZE(as3722_ldo_current); + desc->csel_reg = as3722_reg_lookup[id].vsel_reg; + desc->csel_mask = AS3722_LDO_ILIMIT_MASK; + break; + } + desc->ops = ops; + config.init_data = reg_config->reg_init; + config.of_node = as3722_regulator_matches[id].of_node; + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, "regulator %d register failed %d\n", + id, ret); + return ret; + } + + if (reg_config->ext_control) { + ret = regulator_enable_regmap(rdev); + if (ret < 0) { + dev_err(&pdev->dev, + "Regulator %d enable failed: %d\n", + id, ret); + return ret; + } + ret = as3722_extreg_init(as3722_regs, id, + reg_config->ext_control); + if (ret < 0) { + dev_err(&pdev->dev, + "AS3722 ext control failed: %d", ret); + return ret; + } + } + } + return 0; +} + +static const struct of_device_id of_as3722_regulator_match[] = { + { .compatible = "ams,as3722-regulator", }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_as3722_regulator_match); + +static struct platform_driver as3722_regulator_driver = { + .driver = { + .name = "as3722-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_as3722_regulator_match, + }, + .probe = as3722_regulator_probe, +}; + +module_platform_driver(as3722_regulator_driver); + +MODULE_ALIAS("platform:as3722-regulator"); +MODULE_DESCRIPTION("AS3722 regulator driver"); +MODULE_AUTHOR("Florian Lobmaier "); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/atc260x-regulator.c b/drivers/regulator/atc260x-regulator.c new file mode 100644 index 000000000..3e9f8fd54 --- /dev/null +++ b/drivers/regulator/atc260x-regulator.c @@ -0,0 +1,543 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Regulator driver for ATC260x PMICs +// +// Copyright (C) 2019 Manivannan Sadhasivam +// Copyright (C) 2020 Cristian Ciocaltea + +#include +#include +#include +#include +#include +#include + +struct atc260x_regulator_data { + int voltage_time_dcdc; + int voltage_time_ldo; +}; + +static const struct linear_range atc2603c_dcdc_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(1300000, 0, 13, 50000), + REGULATOR_LINEAR_RANGE(1950000, 14, 15, 100000), +}; + +static const struct linear_range atc2609a_dcdc_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 127, 6250), + REGULATOR_LINEAR_RANGE(1400000, 128, 232, 25000), +}; + +static const struct linear_range atc2609a_ldo_voltage_ranges0[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 15, 100000), + REGULATOR_LINEAR_RANGE(2100000, 0, 12, 100000), +}; + +static const struct linear_range atc2609a_ldo_voltage_ranges1[] = { + REGULATOR_LINEAR_RANGE(850000, 0, 15, 100000), + REGULATOR_LINEAR_RANGE(2100000, 0, 11, 100000), +}; + +static const unsigned int atc260x_ldo_voltage_range_sel[] = { + 0x0, 0x1, +}; + +static int atc260x_dcdc_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct atc260x_regulator_data *data = rdev_get_drvdata(rdev); + + if (new_selector > old_selector) + return data->voltage_time_dcdc; + + return 0; +} + +static int atc260x_ldo_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct atc260x_regulator_data *data = rdev_get_drvdata(rdev); + + if (new_selector > old_selector) + return data->voltage_time_ldo; + + return 0; +} + +static const struct regulator_ops atc260x_dcdc_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_dcdc_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_ldo_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_ldo_bypass_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_ldo_set_voltage_time_sel, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +static const struct regulator_ops atc260x_ldo_bypass_discharge_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_ldo_set_voltage_time_sel, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops atc260x_dcdc_range_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_dcdc_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_ldo_range_pick_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_time_sel = atc260x_ldo_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_dcdc_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_dcdc_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_ldo_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = atc260x_ldo_set_voltage_time_sel, +}; + +static const struct regulator_ops atc260x_no_ops = { +}; + +/* + * Note LDO8 is not documented in datasheet (v2.4), but supported + * in the vendor's driver implementation (xapp-le-kernel). + */ +enum atc2603c_reg_ids { + ATC2603C_ID_DCDC1, + ATC2603C_ID_DCDC2, + ATC2603C_ID_DCDC3, + ATC2603C_ID_LDO1, + ATC2603C_ID_LDO2, + ATC2603C_ID_LDO3, + ATC2603C_ID_LDO5, + ATC2603C_ID_LDO6, + ATC2603C_ID_LDO7, + ATC2603C_ID_LDO8, + ATC2603C_ID_LDO11, + ATC2603C_ID_LDO12, + ATC2603C_ID_SWITCHLDO1, + ATC2603C_ID_MAX, +}; + +#define atc2603c_reg_desc_dcdc(num, min, step, n_volt, vsel_h, vsel_l) { \ + .name = "DCDC"#num, \ + .supply_name = "dcdc"#num, \ + .of_match = of_match_ptr("dcdc"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_DCDC##num, \ + .ops = &atc260x_dcdc_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2603C_PMU_DC##num##_CTL0, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_reg = ATC2603C_PMU_DC##num##_CTL0, \ + .enable_mask = BIT(15), \ + .enable_time = 800, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_dcdc_range(num, vsel_h, vsel_l) { \ + .name = "DCDC"#num, \ + .supply_name = "dcdc"#num, \ + .of_match = of_match_ptr("dcdc"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_DCDC##num, \ + .ops = &atc260x_dcdc_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .n_voltages = 16, \ + .linear_ranges = atc2603c_dcdc_voltage_ranges, \ + .n_linear_ranges = ARRAY_SIZE(atc2603c_dcdc_voltage_ranges), \ + .vsel_reg = ATC2603C_PMU_DC##num##_CTL0, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_reg = ATC2603C_PMU_DC##num##_CTL0, \ + .enable_mask = BIT(15), \ + .enable_time = 800, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_dcdc_fixed(num, min, step, n_volt, vsel_h, vsel_l) { \ + .name = "DCDC"#num, \ + .supply_name = "dcdc"#num, \ + .of_match = of_match_ptr("dcdc"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_DCDC##num, \ + .ops = &atc260x_dcdc_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2603C_PMU_DC##num##_CTL0, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_time = 800, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_ldo(num, min, step, n_volt, vsel_h, vsel_l) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_LDO##num, \ + .ops = &atc260x_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2603C_PMU_LDO##num##_CTL, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_reg = ATC2603C_PMU_LDO##num##_CTL, \ + .enable_mask = BIT(0), \ + .enable_time = 2000, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_ldo_fixed(num, min, step, n_volt, vsel_h, vsel_l) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_LDO##num, \ + .ops = &atc260x_ldo_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2603C_PMU_LDO##num##_CTL, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_time = 2000, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_ldo_noops(num, vfixed) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_LDO##num, \ + .ops = &atc260x_no_ops, \ + .type = REGULATOR_VOLTAGE, \ + .fixed_uV = vfixed, \ + .n_voltages = 1, \ + .owner = THIS_MODULE, \ +} + +#define atc2603c_reg_desc_ldo_switch(num, min, step, n_volt, vsel_h, vsel_l) { \ + .name = "SWITCHLDO"#num, \ + .supply_name = "switchldo"#num, \ + .of_match = of_match_ptr("switchldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2603C_ID_SWITCHLDO##num, \ + .ops = &atc260x_ldo_bypass_discharge_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2603C_PMU_SWITCH_CTL, \ + .vsel_mask = GENMASK(vsel_h, vsel_l), \ + .enable_reg = ATC2603C_PMU_SWITCH_CTL, \ + .enable_mask = BIT(15), \ + .enable_is_inverted = true, \ + .enable_time = 2000, \ + .bypass_reg = ATC2603C_PMU_SWITCH_CTL, \ + .bypass_mask = BIT(5), \ + .active_discharge_reg = ATC2603C_PMU_SWITCH_CTL, \ + .active_discharge_mask = BIT(1), \ + .active_discharge_on = BIT(1), \ + .owner = THIS_MODULE, \ +} + +static const struct regulator_desc atc2603c_reg[] = { + atc2603c_reg_desc_dcdc_fixed(1, 700000, 25000, 29, 11, 7), + atc2603c_reg_desc_dcdc_range(2, 12, 8), + atc2603c_reg_desc_dcdc_fixed(3, 2600000, 100000, 8, 11, 9), + atc2603c_reg_desc_ldo_fixed(1, 2600000, 100000, 8, 15, 13), + atc2603c_reg_desc_ldo_fixed(2, 2600000, 100000, 8, 15, 13), + atc2603c_reg_desc_ldo_fixed(3, 1500000, 100000, 6, 15, 13), + atc2603c_reg_desc_ldo(5, 2600000, 100000, 8, 15, 13), + atc2603c_reg_desc_ldo_fixed(6, 700000, 25000, 29, 15, 11), + atc2603c_reg_desc_ldo(7, 1500000, 100000, 6, 15, 13), + atc2603c_reg_desc_ldo(8, 2300000, 100000, 11, 15, 12), + atc2603c_reg_desc_ldo_fixed(11, 2600000, 100000, 8, 15, 13), + atc2603c_reg_desc_ldo_noops(12, 1800000), + atc2603c_reg_desc_ldo_switch(1, 3000000, 100000, 4, 4, 3), +}; + +static const struct regulator_desc atc2603c_reg_dcdc2_ver_b = + atc2603c_reg_desc_dcdc(2, 1000000, 50000, 18, 12, 8); + +enum atc2609a_reg_ids { + ATC2609A_ID_DCDC0, + ATC2609A_ID_DCDC1, + ATC2609A_ID_DCDC2, + ATC2609A_ID_DCDC3, + ATC2609A_ID_DCDC4, + ATC2609A_ID_LDO0, + ATC2609A_ID_LDO1, + ATC2609A_ID_LDO2, + ATC2609A_ID_LDO3, + ATC2609A_ID_LDO4, + ATC2609A_ID_LDO5, + ATC2609A_ID_LDO6, + ATC2609A_ID_LDO7, + ATC2609A_ID_LDO8, + ATC2609A_ID_LDO9, + ATC2609A_ID_MAX, +}; + +#define atc2609a_reg_desc_dcdc(num, en_bit) { \ + .name = "DCDC"#num, \ + .supply_name = "dcdc"#num, \ + .of_match = of_match_ptr("dcdc"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_DCDC##num, \ + .ops = &atc260x_dcdc_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = 600000, \ + .uV_step = 6250, \ + .n_voltages = 256, \ + .vsel_reg = ATC2609A_PMU_DC##num##_CTL0, \ + .vsel_mask = GENMASK(15, 8), \ + .enable_reg = ATC2609A_PMU_DC_OSC, \ + .enable_mask = BIT(en_bit), \ + .enable_time = 800, \ + .owner = THIS_MODULE, \ +} + +#define atc2609a_reg_desc_dcdc_range(num, en_bit) { \ + .name = "DCDC"#num, \ + .supply_name = "dcdc"#num, \ + .of_match = of_match_ptr("dcdc"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_DCDC##num, \ + .ops = &atc260x_dcdc_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .n_voltages = 233, \ + .linear_ranges = atc2609a_dcdc_voltage_ranges, \ + .n_linear_ranges = ARRAY_SIZE(atc2609a_dcdc_voltage_ranges), \ + .vsel_reg = ATC2609A_PMU_DC##num##_CTL0, \ + .vsel_mask = GENMASK(15, 8), \ + .enable_reg = ATC2609A_PMU_DC_OSC, \ + .enable_mask = BIT(en_bit), \ + .enable_time = 800, \ + .owner = THIS_MODULE, \ +} + +#define atc2609a_reg_desc_ldo(num) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_LDO##num, \ + .ops = &atc260x_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = 700000, \ + .uV_step = 100000, \ + .n_voltages = 16, \ + .vsel_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .vsel_mask = GENMASK(4, 1), \ + .enable_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .enable_mask = BIT(0), \ + .enable_time = 2000, \ + .owner = THIS_MODULE, \ +} + +#define atc2609a_reg_desc_ldo_bypass(num) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_LDO##num, \ + .ops = &atc260x_ldo_bypass_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = 2300000, \ + .uV_step = 100000, \ + .n_voltages = 12, \ + .vsel_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .vsel_mask = GENMASK(5, 2), \ + .enable_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .enable_mask = BIT(0), \ + .enable_time = 2000, \ + .bypass_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .bypass_mask = BIT(1), \ + .owner = THIS_MODULE, \ +} + +#define atc2609a_reg_desc_ldo_range_pick(num, n_range, n_volt) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_LDO##num, \ + .ops = &atc260x_ldo_range_pick_ops, \ + .type = REGULATOR_VOLTAGE, \ + .linear_ranges = atc2609a_ldo_voltage_ranges##n_range, \ + .n_linear_ranges = ARRAY_SIZE(atc2609a_ldo_voltage_ranges##n_range), \ + .n_voltages = n_volt, \ + .vsel_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .vsel_mask = GENMASK(4, 1), \ + .vsel_range_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .vsel_range_mask = BIT(5), \ + .linear_range_selectors_bitfield = atc260x_ldo_voltage_range_sel, \ + .enable_reg = ATC2609A_PMU_LDO##num##_CTL0, \ + .enable_mask = BIT(0), \ + .enable_time = 2000, \ + .owner = THIS_MODULE, \ +} + +#define atc2609a_reg_desc_ldo_fixed(num) { \ + .name = "LDO"#num, \ + .supply_name = "ldo"#num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = ATC2609A_ID_LDO##num, \ + .ops = &atc260x_ldo_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .min_uV = 2600000, \ + .uV_step = 100000, \ + .n_voltages = 8, \ + .vsel_reg = ATC2609A_PMU_LDO##num##_CTL, \ + .vsel_mask = GENMASK(15, 13), \ + .enable_time = 2000, \ + .owner = THIS_MODULE, \ +} + +static const struct regulator_desc atc2609a_reg[] = { + atc2609a_reg_desc_dcdc(0, 4), + atc2609a_reg_desc_dcdc(1, 5), + atc2609a_reg_desc_dcdc(2, 6), + atc2609a_reg_desc_dcdc_range(3, 7), + atc2609a_reg_desc_dcdc(4, 8), + atc2609a_reg_desc_ldo_bypass(0), + atc2609a_reg_desc_ldo_bypass(1), + atc2609a_reg_desc_ldo_bypass(2), + atc2609a_reg_desc_ldo_range_pick(3, 0, 29), + atc2609a_reg_desc_ldo_range_pick(4, 0, 29), + atc2609a_reg_desc_ldo(5), + atc2609a_reg_desc_ldo_range_pick(6, 1, 28), + atc2609a_reg_desc_ldo_range_pick(7, 0, 29), + atc2609a_reg_desc_ldo_range_pick(8, 0, 29), + atc2609a_reg_desc_ldo_fixed(9), +}; + +static int atc260x_regulator_probe(struct platform_device *pdev) +{ + struct atc260x *atc260x = dev_get_drvdata(pdev->dev.parent); + struct device *dev = atc260x->dev; + struct atc260x_regulator_data *atc260x_data; + struct regulator_config config = {}; + struct regulator_dev *atc260x_rdev; + const struct regulator_desc *regulators; + bool atc2603c_ver_b = false; + int i, nregulators; + + atc260x_data = devm_kzalloc(&pdev->dev, sizeof(*atc260x_data), GFP_KERNEL); + if (!atc260x_data) + return -ENOMEM; + + atc260x_data->voltage_time_dcdc = 350; + atc260x_data->voltage_time_ldo = 800; + + switch (atc260x->ic_type) { + case ATC2603C: + regulators = atc2603c_reg; + nregulators = ATC2603C_ID_MAX; + atc2603c_ver_b = atc260x->ic_ver == ATC260X_B; + break; + case ATC2609A: + atc260x_data->voltage_time_dcdc = 250; + regulators = atc2609a_reg; + nregulators = ATC2609A_ID_MAX; + break; + default: + dev_err(dev, "unsupported ATC260X ID %d\n", atc260x->ic_type); + return -EINVAL; + } + + config.dev = dev; + config.regmap = atc260x->regmap; + config.driver_data = atc260x_data; + + /* Instantiate the regulators */ + for (i = 0; i < nregulators; i++) { + if (atc2603c_ver_b && regulators[i].id == ATC2603C_ID_DCDC2) + atc260x_rdev = devm_regulator_register(&pdev->dev, + &atc2603c_reg_dcdc2_ver_b, + &config); + else + atc260x_rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], + &config); + if (IS_ERR(atc260x_rdev)) { + dev_err(dev, "failed to register regulator: %d\n", i); + return PTR_ERR(atc260x_rdev); + } + } + + return 0; +} + +static struct platform_driver atc260x_regulator_driver = { + .probe = atc260x_regulator_probe, + .driver = { + .name = "atc260x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +module_platform_driver(atc260x_regulator_driver); + +MODULE_DESCRIPTION("Regulator driver for ATC260x PMICs"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_AUTHOR("Cristian Ciocaltea "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/aw37503-regulator.c b/drivers/regulator/aw37503-regulator.c new file mode 100644 index 000000000..ca5f2a14c --- /dev/null +++ b/drivers/regulator/aw37503-regulator.c @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// AWINIC AW37503 Regulator Driver +// +// Copyright (C) 2023 awinic. All Rights Reserved +// +// Author: + +#include +#include +#include +#include +#include +#include +#include + +#define AW37503_REG_VPOS 0x00 +#define AW37503_REG_VNEG 0x01 +#define AW37503_REG_APPS 0x03 +#define AW37503_REG_CONTROL 0x04 +#define AW37503_REG_WPRTEN 0x21 + +#define AW37503_VOUT_MASK 0x1F +#define AW37503_VOUT_N_VOLTAGE 0x15 +#define AW37503_VOUT_VMIN 4000000 +#define AW37503_VOUT_VMAX 6000000 +#define AW37503_VOUT_STEP 100000 + +#define AW37503_REG_APPS_DIS_VPOS BIT(1) +#define AW37503_REG_APPS_DIS_VNEG BIT(0) + +#define AW37503_REGULATOR_ID_VPOS 0 +#define AW37503_REGULATOR_ID_VNEG 1 +#define AW37503_MAX_REGULATORS 2 + +struct aw37503_reg_pdata { + struct gpio_desc *en_gpiod; + int ena_gpio_state; +}; + +struct aw37503_regulator { + struct device *dev; + struct aw37503_reg_pdata reg_pdata[AW37503_MAX_REGULATORS]; +}; + +static int aw37503_regulator_enable(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + int ret; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 1); + rpdata->ena_gpio_state = 1; + } + + /* Hardware automatically enable discharge bit in enable */ + if (rdev->constraints->active_discharge == + REGULATOR_ACTIVE_DISCHARGE_DISABLE) { + ret = regulator_set_active_discharge_regmap(rdev, false); + if (ret < 0) { + dev_err(chip->dev, "Failed to disable active discharge: %d\n", + ret); + return ret; + } + } + + return 0; +} + +static int aw37503_regulator_disable(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 0); + rpdata->ena_gpio_state = 0; + } + + return 0; +} + +static int aw37503_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) + return rpdata->ena_gpio_state; + + return 1; +} + +static const struct regulator_ops aw37503_regulator_ops = { + .enable = aw37503_regulator_enable, + .disable = aw37503_regulator_disable, + .is_enabled = aw37503_regulator_is_enabled, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static int aw37503_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct aw37503_regulator *chip = config->driver_data; + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[desc->id]; + int ret; + + rpdata->en_gpiod = devm_fwnode_gpiod_get(chip->dev, of_fwnode_handle(np), + "enable", GPIOD_OUT_LOW, + "enable"); + + if (IS_ERR(rpdata->en_gpiod)) { + ret = PTR_ERR(rpdata->en_gpiod); + + /* Ignore the error other than probe defer */ + if (ret == -EPROBE_DEFER) + return ret; + return 0; + } + + return 0; +} + +#define AW37503_REGULATOR_DESC(_id, _name) \ + [AW37503_REGULATOR_ID_##_id] = { \ + .name = "aw37503-"#_name, \ + .supply_name = "vin", \ + .id = AW37503_REGULATOR_ID_##_id, \ + .of_match = of_match_ptr(#_name), \ + .of_parse_cb = aw37503_of_parse_cb, \ + .ops = &aw37503_regulator_ops, \ + .n_voltages = AW37503_VOUT_N_VOLTAGE, \ + .min_uV = AW37503_VOUT_VMIN, \ + .uV_step = AW37503_VOUT_STEP, \ + .enable_time = 500, \ + .vsel_mask = AW37503_VOUT_MASK, \ + .vsel_reg = AW37503_REG_##_id, \ + .active_discharge_off = 0, \ + .active_discharge_on = AW37503_REG_APPS_DIS_##_id, \ + .active_discharge_mask = AW37503_REG_APPS_DIS_##_id, \ + .active_discharge_reg = AW37503_REG_APPS, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc aw_regs_desc[AW37503_MAX_REGULATORS] = { + AW37503_REGULATOR_DESC(VPOS, outp), + AW37503_REGULATOR_DESC(VNEG, outn), +}; + +static const struct regmap_range aw37503_no_reg_ranges[] = { + regmap_reg_range(AW37503_REG_CONTROL + 1, + AW37503_REG_WPRTEN - 1), +}; + +static const struct regmap_access_table aw37503_no_reg_table = { + .no_ranges = aw37503_no_reg_ranges, + .n_no_ranges = ARRAY_SIZE(aw37503_no_reg_ranges), +}; + +static const struct regmap_config aw37503_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = AW37503_REG_WPRTEN, + .rd_table = &aw37503_no_reg_table, + .wr_table = &aw37503_no_reg_table, +}; + +static int aw37503_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct aw37503_regulator *chip; + struct regulator_dev *rdev; + struct regmap *regmap; + struct regulator_config config = { }; + int id; + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(client, &aw37503_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to init regmap\n"); + + i2c_set_clientdata(client, chip); + chip->dev = dev; + + config.regmap = regmap; + config.dev = dev; + config.driver_data = chip; + + for (id = 0; id < AW37503_MAX_REGULATORS; ++id) { + rdev = devm_regulator_register(dev, &aw_regs_desc[id], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register regulator %s\n", + aw_regs_desc[id].name); + } + return 0; +} + +static const struct i2c_device_id aw37503_id[] = { + { .name = "aw37503" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, aw37503_id); + +static const struct of_device_id aw37503_of_match[] = { + {.compatible = "awinic,aw37503",}, + { /* Sentinel */ }, +}; + +MODULE_DEVICE_TABLE(of, aw37503_of_match); + +static struct i2c_driver aw37503_i2c_driver = { + .driver = { + .name = "aw37503", + .of_match_table = aw37503_of_match, + }, + .probe = aw37503_probe, + .id_table = aw37503_id, +}; + +module_i2c_driver(aw37503_i2c_driver); + +MODULE_DESCRIPTION("aw37503 regulator driver"); +MODULE_AUTHOR("Alec Li "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c new file mode 100644 index 000000000..da891415e --- /dev/null +++ b/drivers/regulator/axp20x-regulator.c @@ -0,0 +1,1759 @@ +/* + * AXP20x regulators driver. + * + * Copyright (C) 2013 Carlo Caione + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AXP20X_GPIO0_FUNC_MASK GENMASK(3, 0) +#define AXP20X_GPIO1_FUNC_MASK GENMASK(3, 0) + +#define AXP20X_IO_ENABLED 0x03 +#define AXP20X_IO_DISABLED 0x07 + +#define AXP20X_WORKMODE_DCDC2_MASK BIT_MASK(2) +#define AXP20X_WORKMODE_DCDC3_MASK BIT_MASK(1) + +#define AXP20X_FREQ_DCDC_MASK GENMASK(3, 0) + +#define AXP20X_VBUS_IPSOUT_MGMT_MASK BIT_MASK(2) + +#define AXP20X_DCDC2_V_OUT_MASK GENMASK(5, 0) +#define AXP20X_DCDC3_V_OUT_MASK GENMASK(7, 0) +#define AXP20X_LDO2_V_OUT_MASK GENMASK(7, 4) +#define AXP20X_LDO3_V_OUT_MASK GENMASK(6, 0) +#define AXP20X_LDO4_V_OUT_MASK GENMASK(3, 0) +#define AXP20X_LDO5_V_OUT_MASK GENMASK(7, 4) + +#define AXP20X_PWR_OUT_EXTEN_MASK BIT_MASK(0) +#define AXP20X_PWR_OUT_DCDC3_MASK BIT_MASK(1) +#define AXP20X_PWR_OUT_LDO2_MASK BIT_MASK(2) +#define AXP20X_PWR_OUT_LDO4_MASK BIT_MASK(3) +#define AXP20X_PWR_OUT_DCDC2_MASK BIT_MASK(4) +#define AXP20X_PWR_OUT_LDO3_MASK BIT_MASK(6) + +#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK BIT_MASK(0) +#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(x) \ + ((x) << 0) +#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK BIT_MASK(1) +#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(x) \ + ((x) << 1) +#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK BIT_MASK(2) +#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN BIT(2) +#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK BIT_MASK(3) +#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN BIT(3) + +#define AXP20X_LDO4_V_OUT_1250mV_START 0x0 +#define AXP20X_LDO4_V_OUT_1250mV_STEPS 0 +#define AXP20X_LDO4_V_OUT_1250mV_END \ + (AXP20X_LDO4_V_OUT_1250mV_START + AXP20X_LDO4_V_OUT_1250mV_STEPS) +#define AXP20X_LDO4_V_OUT_1300mV_START 0x1 +#define AXP20X_LDO4_V_OUT_1300mV_STEPS 7 +#define AXP20X_LDO4_V_OUT_1300mV_END \ + (AXP20X_LDO4_V_OUT_1300mV_START + AXP20X_LDO4_V_OUT_1300mV_STEPS) +#define AXP20X_LDO4_V_OUT_2500mV_START 0x9 +#define AXP20X_LDO4_V_OUT_2500mV_STEPS 0 +#define AXP20X_LDO4_V_OUT_2500mV_END \ + (AXP20X_LDO4_V_OUT_2500mV_START + AXP20X_LDO4_V_OUT_2500mV_STEPS) +#define AXP20X_LDO4_V_OUT_2700mV_START 0xa +#define AXP20X_LDO4_V_OUT_2700mV_STEPS 1 +#define AXP20X_LDO4_V_OUT_2700mV_END \ + (AXP20X_LDO4_V_OUT_2700mV_START + AXP20X_LDO4_V_OUT_2700mV_STEPS) +#define AXP20X_LDO4_V_OUT_3000mV_START 0xc +#define AXP20X_LDO4_V_OUT_3000mV_STEPS 3 +#define AXP20X_LDO4_V_OUT_3000mV_END \ + (AXP20X_LDO4_V_OUT_3000mV_START + AXP20X_LDO4_V_OUT_3000mV_STEPS) +#define AXP20X_LDO4_V_OUT_NUM_VOLTAGES 16 + +#define AXP22X_IO_ENABLED 0x03 +#define AXP22X_IO_DISABLED 0x04 + +#define AXP22X_WORKMODE_DCDCX_MASK(x) BIT_MASK(x) + +#define AXP22X_MISC_N_VBUSEN_FUNC BIT(4) + +#define AXP22X_DCDC1_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DCDC2_V_OUT_MASK GENMASK(5, 0) +#define AXP22X_DCDC3_V_OUT_MASK GENMASK(5, 0) +#define AXP22X_DCDC4_V_OUT_MASK GENMASK(5, 0) +#define AXP22X_DCDC5_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DC5LDO_V_OUT_MASK GENMASK(2, 0) +#define AXP22X_ALDO1_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_ALDO2_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_ALDO3_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DLDO1_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DLDO2_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DLDO3_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_DLDO4_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_ELDO1_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_ELDO2_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_ELDO3_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_LDO_IO0_V_OUT_MASK GENMASK(4, 0) +#define AXP22X_LDO_IO1_V_OUT_MASK GENMASK(4, 0) + +#define AXP22X_PWR_OUT_DC5LDO_MASK BIT_MASK(0) +#define AXP22X_PWR_OUT_DCDC1_MASK BIT_MASK(1) +#define AXP22X_PWR_OUT_DCDC2_MASK BIT_MASK(2) +#define AXP22X_PWR_OUT_DCDC3_MASK BIT_MASK(3) +#define AXP22X_PWR_OUT_DCDC4_MASK BIT_MASK(4) +#define AXP22X_PWR_OUT_DCDC5_MASK BIT_MASK(5) +#define AXP22X_PWR_OUT_ALDO1_MASK BIT_MASK(6) +#define AXP22X_PWR_OUT_ALDO2_MASK BIT_MASK(7) + +#define AXP22X_PWR_OUT_SW_MASK BIT_MASK(6) +#define AXP22X_PWR_OUT_DC1SW_MASK BIT_MASK(7) + +#define AXP22X_PWR_OUT_ELDO1_MASK BIT_MASK(0) +#define AXP22X_PWR_OUT_ELDO2_MASK BIT_MASK(1) +#define AXP22X_PWR_OUT_ELDO3_MASK BIT_MASK(2) +#define AXP22X_PWR_OUT_DLDO1_MASK BIT_MASK(3) +#define AXP22X_PWR_OUT_DLDO2_MASK BIT_MASK(4) +#define AXP22X_PWR_OUT_DLDO3_MASK BIT_MASK(5) +#define AXP22X_PWR_OUT_DLDO4_MASK BIT_MASK(6) +#define AXP22X_PWR_OUT_ALDO3_MASK BIT_MASK(7) + +#define AXP313A_DCDC1_NUM_VOLTAGES 107 +#define AXP313A_DCDC23_NUM_VOLTAGES 88 +#define AXP313A_DCDC_V_OUT_MASK GENMASK(6, 0) +#define AXP313A_LDO_V_OUT_MASK GENMASK(4, 0) + +#define AXP717_DCDC1_NUM_VOLTAGES 88 +#define AXP717_DCDC2_NUM_VOLTAGES 107 +#define AXP717_DCDC3_NUM_VOLTAGES 103 +#define AXP717_DCDC_V_OUT_MASK GENMASK(6, 0) +#define AXP717_LDO_V_OUT_MASK GENMASK(4, 0) +#define AXP717_BOOST_V_OUT_MASK GENMASK(7, 4) + +#define AXP803_PWR_OUT_DCDC1_MASK BIT_MASK(0) +#define AXP803_PWR_OUT_DCDC2_MASK BIT_MASK(1) +#define AXP803_PWR_OUT_DCDC3_MASK BIT_MASK(2) +#define AXP803_PWR_OUT_DCDC4_MASK BIT_MASK(3) +#define AXP803_PWR_OUT_DCDC5_MASK BIT_MASK(4) +#define AXP803_PWR_OUT_DCDC6_MASK BIT_MASK(5) + +#define AXP803_PWR_OUT_FLDO1_MASK BIT_MASK(2) +#define AXP803_PWR_OUT_FLDO2_MASK BIT_MASK(3) + +#define AXP803_DCDC1_V_OUT_MASK GENMASK(4, 0) +#define AXP803_DCDC2_V_OUT_MASK GENMASK(6, 0) +#define AXP803_DCDC3_V_OUT_MASK GENMASK(6, 0) +#define AXP803_DCDC4_V_OUT_MASK GENMASK(6, 0) +#define AXP803_DCDC5_V_OUT_MASK GENMASK(6, 0) +#define AXP803_DCDC6_V_OUT_MASK GENMASK(6, 0) + +#define AXP803_FLDO1_V_OUT_MASK GENMASK(3, 0) +#define AXP803_FLDO2_V_OUT_MASK GENMASK(3, 0) + +#define AXP803_DCDC23_POLYPHASE_DUAL BIT(6) +#define AXP803_DCDC56_POLYPHASE_DUAL BIT(5) + +#define AXP803_DCDC234_500mV_START 0x00 +#define AXP803_DCDC234_500mV_STEPS 70 +#define AXP803_DCDC234_500mV_END \ + (AXP803_DCDC234_500mV_START + AXP803_DCDC234_500mV_STEPS) +#define AXP803_DCDC234_1220mV_START 0x47 +#define AXP803_DCDC234_1220mV_STEPS 4 +#define AXP803_DCDC234_1220mV_END \ + (AXP803_DCDC234_1220mV_START + AXP803_DCDC234_1220mV_STEPS) +#define AXP803_DCDC234_NUM_VOLTAGES 76 + +#define AXP803_DCDC5_800mV_START 0x00 +#define AXP803_DCDC5_800mV_STEPS 32 +#define AXP803_DCDC5_800mV_END \ + (AXP803_DCDC5_800mV_START + AXP803_DCDC5_800mV_STEPS) +#define AXP803_DCDC5_1140mV_START 0x21 +#define AXP803_DCDC5_1140mV_STEPS 35 +#define AXP803_DCDC5_1140mV_END \ + (AXP803_DCDC5_1140mV_START + AXP803_DCDC5_1140mV_STEPS) +#define AXP803_DCDC5_NUM_VOLTAGES 69 + +#define AXP803_DCDC6_600mV_START 0x00 +#define AXP803_DCDC6_600mV_STEPS 50 +#define AXP803_DCDC6_600mV_END \ + (AXP803_DCDC6_600mV_START + AXP803_DCDC6_600mV_STEPS) +#define AXP803_DCDC6_1120mV_START 0x33 +#define AXP803_DCDC6_1120mV_STEPS 20 +#define AXP803_DCDC6_1120mV_END \ + (AXP803_DCDC6_1120mV_START + AXP803_DCDC6_1120mV_STEPS) +#define AXP803_DCDC6_NUM_VOLTAGES 72 + +#define AXP803_DLDO2_700mV_START 0x00 +#define AXP803_DLDO2_700mV_STEPS 26 +#define AXP803_DLDO2_700mV_END \ + (AXP803_DLDO2_700mV_START + AXP803_DLDO2_700mV_STEPS) +#define AXP803_DLDO2_3400mV_START 0x1b +#define AXP803_DLDO2_3400mV_STEPS 4 +#define AXP803_DLDO2_3400mV_END \ + (AXP803_DLDO2_3400mV_START + AXP803_DLDO2_3400mV_STEPS) +#define AXP803_DLDO2_NUM_VOLTAGES 32 + +#define AXP806_DCDCA_V_CTRL_MASK GENMASK(6, 0) +#define AXP806_DCDCB_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_DCDCC_V_CTRL_MASK GENMASK(6, 0) +#define AXP806_DCDCD_V_CTRL_MASK GENMASK(5, 0) +#define AXP806_DCDCE_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_ALDO1_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_ALDO2_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_ALDO3_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_BLDO1_V_CTRL_MASK GENMASK(3, 0) +#define AXP806_BLDO2_V_CTRL_MASK GENMASK(3, 0) +#define AXP806_BLDO3_V_CTRL_MASK GENMASK(3, 0) +#define AXP806_BLDO4_V_CTRL_MASK GENMASK(3, 0) +#define AXP806_CLDO1_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_CLDO2_V_CTRL_MASK GENMASK(4, 0) +#define AXP806_CLDO3_V_CTRL_MASK GENMASK(4, 0) + +#define AXP806_PWR_OUT_DCDCA_MASK BIT_MASK(0) +#define AXP806_PWR_OUT_DCDCB_MASK BIT_MASK(1) +#define AXP806_PWR_OUT_DCDCC_MASK BIT_MASK(2) +#define AXP806_PWR_OUT_DCDCD_MASK BIT_MASK(3) +#define AXP806_PWR_OUT_DCDCE_MASK BIT_MASK(4) +#define AXP806_PWR_OUT_ALDO1_MASK BIT_MASK(5) +#define AXP806_PWR_OUT_ALDO2_MASK BIT_MASK(6) +#define AXP806_PWR_OUT_ALDO3_MASK BIT_MASK(7) +#define AXP806_PWR_OUT_BLDO1_MASK BIT_MASK(0) +#define AXP806_PWR_OUT_BLDO2_MASK BIT_MASK(1) +#define AXP806_PWR_OUT_BLDO3_MASK BIT_MASK(2) +#define AXP806_PWR_OUT_BLDO4_MASK BIT_MASK(3) +#define AXP806_PWR_OUT_CLDO1_MASK BIT_MASK(4) +#define AXP806_PWR_OUT_CLDO2_MASK BIT_MASK(5) +#define AXP806_PWR_OUT_CLDO3_MASK BIT_MASK(6) +#define AXP806_PWR_OUT_SW_MASK BIT_MASK(7) + +#define AXP806_DCDCAB_POLYPHASE_DUAL 0x40 +#define AXP806_DCDCABC_POLYPHASE_TRI 0x80 +#define AXP806_DCDCABC_POLYPHASE_MASK GENMASK(7, 6) + +#define AXP806_DCDCDE_POLYPHASE_DUAL BIT(5) + +#define AXP806_DCDCA_600mV_START 0x00 +#define AXP806_DCDCA_600mV_STEPS 50 +#define AXP806_DCDCA_600mV_END \ + (AXP806_DCDCA_600mV_START + AXP806_DCDCA_600mV_STEPS) +#define AXP806_DCDCA_1120mV_START 0x33 +#define AXP806_DCDCA_1120mV_STEPS 20 +#define AXP806_DCDCA_1120mV_END \ + (AXP806_DCDCA_1120mV_START + AXP806_DCDCA_1120mV_STEPS) +#define AXP806_DCDCA_NUM_VOLTAGES 72 + +#define AXP806_DCDCD_600mV_START 0x00 +#define AXP806_DCDCD_600mV_STEPS 45 +#define AXP806_DCDCD_600mV_END \ + (AXP806_DCDCD_600mV_START + AXP806_DCDCD_600mV_STEPS) +#define AXP806_DCDCD_1600mV_START 0x2e +#define AXP806_DCDCD_1600mV_STEPS 17 +#define AXP806_DCDCD_1600mV_END \ + (AXP806_DCDCD_1600mV_START + AXP806_DCDCD_1600mV_STEPS) +#define AXP806_DCDCD_NUM_VOLTAGES 64 + +#define AXP809_DCDC4_600mV_START 0x00 +#define AXP809_DCDC4_600mV_STEPS 47 +#define AXP809_DCDC4_600mV_END \ + (AXP809_DCDC4_600mV_START + AXP809_DCDC4_600mV_STEPS) +#define AXP809_DCDC4_1800mV_START 0x30 +#define AXP809_DCDC4_1800mV_STEPS 8 +#define AXP809_DCDC4_1800mV_END \ + (AXP809_DCDC4_1800mV_START + AXP809_DCDC4_1800mV_STEPS) +#define AXP809_DCDC4_NUM_VOLTAGES 57 + +#define AXP813_DCDC7_V_OUT_MASK GENMASK(6, 0) + +#define AXP813_PWR_OUT_DCDC7_MASK BIT_MASK(6) + +#define AXP15060_DCDC1_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_DCDC2_V_CTRL_MASK GENMASK(6, 0) +#define AXP15060_DCDC3_V_CTRL_MASK GENMASK(6, 0) +#define AXP15060_DCDC4_V_CTRL_MASK GENMASK(6, 0) +#define AXP15060_DCDC5_V_CTRL_MASK GENMASK(6, 0) +#define AXP15060_DCDC6_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_ALDO1_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_ALDO2_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_ALDO3_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_ALDO4_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_ALDO5_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_BLDO1_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_BLDO2_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_BLDO3_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_BLDO4_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_BLDO5_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_CLDO1_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_CLDO2_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_CLDO3_V_CTRL_MASK GENMASK(4, 0) +#define AXP15060_CLDO4_V_CTRL_MASK GENMASK(5, 0) +#define AXP15060_CPUSLDO_V_CTRL_MASK GENMASK(3, 0) + +#define AXP15060_PWR_OUT_DCDC1_MASK BIT_MASK(0) +#define AXP15060_PWR_OUT_DCDC2_MASK BIT_MASK(1) +#define AXP15060_PWR_OUT_DCDC3_MASK BIT_MASK(2) +#define AXP15060_PWR_OUT_DCDC4_MASK BIT_MASK(3) +#define AXP15060_PWR_OUT_DCDC5_MASK BIT_MASK(4) +#define AXP15060_PWR_OUT_DCDC6_MASK BIT_MASK(5) +#define AXP15060_PWR_OUT_ALDO1_MASK BIT_MASK(0) +#define AXP15060_PWR_OUT_ALDO2_MASK BIT_MASK(1) +#define AXP15060_PWR_OUT_ALDO3_MASK BIT_MASK(2) +#define AXP15060_PWR_OUT_ALDO4_MASK BIT_MASK(3) +#define AXP15060_PWR_OUT_ALDO5_MASK BIT_MASK(4) +#define AXP15060_PWR_OUT_BLDO1_MASK BIT_MASK(5) +#define AXP15060_PWR_OUT_BLDO2_MASK BIT_MASK(6) +#define AXP15060_PWR_OUT_BLDO3_MASK BIT_MASK(7) +#define AXP15060_PWR_OUT_BLDO4_MASK BIT_MASK(0) +#define AXP15060_PWR_OUT_BLDO5_MASK BIT_MASK(1) +#define AXP15060_PWR_OUT_CLDO1_MASK BIT_MASK(2) +#define AXP15060_PWR_OUT_CLDO2_MASK BIT_MASK(3) +#define AXP15060_PWR_OUT_CLDO3_MASK BIT_MASK(4) +#define AXP15060_PWR_OUT_CLDO4_MASK BIT_MASK(5) +#define AXP15060_PWR_OUT_CPUSLDO_MASK BIT_MASK(6) +#define AXP15060_PWR_OUT_SW_MASK BIT_MASK(7) + +#define AXP15060_DCDC23_POLYPHASE_DUAL_MASK BIT_MASK(6) +#define AXP15060_DCDC46_POLYPHASE_DUAL_MASK BIT_MASK(7) + +#define AXP15060_DCDC234_500mV_START 0x00 +#define AXP15060_DCDC234_500mV_STEPS 70 +#define AXP15060_DCDC234_500mV_END \ + (AXP15060_DCDC234_500mV_START + AXP15060_DCDC234_500mV_STEPS) +#define AXP15060_DCDC234_1220mV_START 0x47 +#define AXP15060_DCDC234_1220mV_STEPS 16 +#define AXP15060_DCDC234_1220mV_END \ + (AXP15060_DCDC234_1220mV_START + AXP15060_DCDC234_1220mV_STEPS) +#define AXP15060_DCDC234_NUM_VOLTAGES 88 + +#define AXP15060_DCDC5_800mV_START 0x00 +#define AXP15060_DCDC5_800mV_STEPS 32 +#define AXP15060_DCDC5_800mV_END \ + (AXP15060_DCDC5_800mV_START + AXP15060_DCDC5_800mV_STEPS) +#define AXP15060_DCDC5_1140mV_START 0x21 +#define AXP15060_DCDC5_1140mV_STEPS 35 +#define AXP15060_DCDC5_1140mV_END \ + (AXP15060_DCDC5_1140mV_START + AXP15060_DCDC5_1140mV_STEPS) +#define AXP15060_DCDC5_NUM_VOLTAGES 69 + +#define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _enable_val, _disable_val) \ + [_family##_##_id] = { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = _family##_##_id, \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enable_val), \ + .disable_val = (_disable_val), \ + .ops = &axp20x_ops, \ + } + +#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask) \ + [_family##_##_id] = { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = _family##_##_id, \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .ops = &axp20x_ops, \ + } + +#define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \ + [_family##_##_id] = { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = _family##_##_id, \ + .owner = THIS_MODULE, \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .ops = &axp20x_ops_sw, \ + } + +#define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \ + [_family##_##_id] = { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = _family##_##_id, \ + .n_voltages = 1, \ + .owner = THIS_MODULE, \ + .min_uV = (_volt) * 1000, \ + .ops = &axp20x_ops_fixed \ + } + +#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, _n_voltages, \ + _vreg, _vmask, _ereg, _emask, _ramp_delay) \ + [_family##_##_id] = { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = _family##_##_id, \ + .n_voltages = (_n_voltages), \ + .owner = THIS_MODULE, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .linear_ranges = (_ranges), \ + .n_linear_ranges = ARRAY_SIZE(_ranges), \ + .ramp_delay = (_ramp_delay), \ + .ops = &axp20x_ops_range, \ + } + +#define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \ + _vreg, _vmask, _ereg, _emask) \ + AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, 0) + +static const int axp209_dcdc2_ldo3_slew_rates[] = { + 1600, + 800, +}; + +static int axp20x_set_ramp_delay(struct regulator_dev *rdev, int ramp) +{ + struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + u8 reg, mask, enable, cfg = 0xff; + const int *slew_rates; + int rate_count = 0; + + switch (axp20x->variant) { + case AXP209_ID: + if (id == AXP20X_DCDC2) { + slew_rates = axp209_dcdc2_ldo3_slew_rates; + rate_count = ARRAY_SIZE(axp209_dcdc2_ldo3_slew_rates); + reg = AXP20X_DCDC2_LDO3_V_RAMP; + mask = AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK | + AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK; + enable = (ramp > 0) ? + AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN : 0; + break; + } + + if (id == AXP20X_LDO3) { + slew_rates = axp209_dcdc2_ldo3_slew_rates; + rate_count = ARRAY_SIZE(axp209_dcdc2_ldo3_slew_rates); + reg = AXP20X_DCDC2_LDO3_V_RAMP; + mask = AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK | + AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK; + enable = (ramp > 0) ? + AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN : 0; + break; + } + + if (rate_count > 0) + break; + + fallthrough; + default: + /* Not supported for this regulator */ + return -ENOTSUPP; + } + + if (ramp == 0) { + cfg = enable; + } else { + int i; + + for (i = 0; i < rate_count; i++) { + if (ramp > slew_rates[i]) + break; + + if (id == AXP20X_DCDC2) + cfg = AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(i); + else + cfg = AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(i); + } + + if (cfg == 0xff) { + dev_err(axp20x->dev, "unsupported ramp value %d", ramp); + return -EINVAL; + } + + cfg |= enable; + } + + return regmap_update_bits(axp20x->regmap, reg, mask, cfg); +} + +static int axp20x_regulator_enable_regmap(struct regulator_dev *rdev) +{ + struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + switch (axp20x->variant) { + case AXP209_ID: + if ((id == AXP20X_LDO3) && + rdev->constraints && rdev->constraints->soft_start) { + int v_out; + int ret; + + /* + * On some boards, the LDO3 can be overloaded when + * turning on, causing the entire PMIC to shutdown + * without warning. Turning it on at the minimal voltage + * and then setting the voltage to the requested value + * works reliably. + */ + if (regulator_is_enabled_regmap(rdev)) + break; + + v_out = regulator_get_voltage_sel_regmap(rdev); + if (v_out < 0) + return v_out; + + if (v_out == 0) + break; + + ret = regulator_set_voltage_sel_regmap(rdev, 0x00); + /* + * A small pause is needed between + * setting the voltage and enabling the LDO to give the + * internal state machine time to process the request. + */ + usleep_range(1000, 5000); + ret |= regulator_enable_regmap(rdev); + ret |= regulator_set_voltage_sel_regmap(rdev, v_out); + + return ret; + } + break; + default: + /* No quirks */ + break; + } + + return regulator_enable_regmap(rdev); +}; + +static const struct regulator_ops axp20x_ops_fixed = { + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops axp20x_ops_range = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops axp20x_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .enable = axp20x_regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_ramp_delay = axp20x_set_ramp_delay, +}; + +static const struct regulator_ops axp20x_ops_sw = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct linear_range axp20x_ldo4_ranges[] = { + REGULATOR_LINEAR_RANGE(1250000, + AXP20X_LDO4_V_OUT_1250mV_START, + AXP20X_LDO4_V_OUT_1250mV_END, + 0), + REGULATOR_LINEAR_RANGE(1300000, + AXP20X_LDO4_V_OUT_1300mV_START, + AXP20X_LDO4_V_OUT_1300mV_END, + 100000), + REGULATOR_LINEAR_RANGE(2500000, + AXP20X_LDO4_V_OUT_2500mV_START, + AXP20X_LDO4_V_OUT_2500mV_END, + 0), + REGULATOR_LINEAR_RANGE(2700000, + AXP20X_LDO4_V_OUT_2700mV_START, + AXP20X_LDO4_V_OUT_2700mV_END, + 100000), + REGULATOR_LINEAR_RANGE(3000000, + AXP20X_LDO4_V_OUT_3000mV_START, + AXP20X_LDO4_V_OUT_3000mV_END, + 100000), +}; + +static const struct regulator_desc axp20x_regulators[] = { + AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25, + AXP20X_DCDC2_V_OUT, AXP20X_DCDC2_V_OUT_MASK, + AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_DCDC2_MASK), + AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25, + AXP20X_DCDC3_V_OUT, AXP20X_DCDC3_V_OUT_MASK, + AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_DCDC3_MASK), + AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300), + AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100, + AXP20X_LDO24_V_OUT, AXP20X_LDO2_V_OUT_MASK, + AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO2_MASK), + AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25, + AXP20X_LDO3_V_OUT, AXP20X_LDO3_V_OUT_MASK, + AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO3_MASK), + AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in", + axp20x_ldo4_ranges, AXP20X_LDO4_V_OUT_NUM_VOLTAGES, + AXP20X_LDO24_V_OUT, AXP20X_LDO4_V_OUT_MASK, + AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO4_MASK), + AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100, + AXP20X_LDO5_V_OUT, AXP20X_LDO5_V_OUT_MASK, + AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK, + AXP20X_IO_ENABLED, AXP20X_IO_DISABLED), +}; + +static const struct regulator_desc axp22x_regulators[] = { + AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100, + AXP22X_DCDC1_V_OUT, AXP22X_DCDC1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC1_MASK), + AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20, + AXP22X_DCDC2_V_OUT, AXP22X_DCDC2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC2_MASK), + AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20, + AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK), + AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20, + AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK), + AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50, + AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC5_MASK), + /* secondary switchable output of DCDC1 */ + AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK), + /* LDO regulator internally chained to DCDC5 */ + AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100, + AXP22X_DC5LDO_V_OUT, AXP22X_DC5LDO_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DC5LDO_MASK), + AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100, + AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP22X_PWR_OUT_ALDO3_MASK), + AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100, + AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK), + AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100, + AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK), + AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100, + AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK), + AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100, + AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK), + AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100, + AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK), + AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100, + AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK), + AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100, + AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK), + /* Note the datasheet only guarantees reliable operation up to + * 3.3V, this needs to be enforced via dts provided constraints */ + AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100, + AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK, + AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + /* Note the datasheet only guarantees reliable operation up to + * 3.3V, this needs to be enforced via dts provided constraints */ + AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100, + AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK, + AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000), +}; + +static const struct regulator_desc axp22x_drivevbus_regulator = { + .name = "drivevbus", + .supply_name = "drivevbus", + .of_match = of_match_ptr("drivevbus"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = AXP20X_VBUS_IPSOUT_MGMT, + .enable_mask = AXP20X_VBUS_IPSOUT_MGMT_MASK, + .ops = &axp20x_ops_sw, +}; + +static const struct linear_range axp313a_dcdc1_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), + REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000), +}; + +static const struct linear_range axp313a_dcdc2_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), +}; + +/* + * This is deviating from the datasheet. The values here are taken from the + * BSP driver and have been confirmed by measurements. + */ +static const struct linear_range axp313a_dcdc3_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), +}; + +static const struct regulator_desc axp313a_regulators[] = { + AXP_DESC_RANGES(AXP313A, DCDC1, "dcdc1", "vin1", + axp313a_dcdc1_ranges, AXP313A_DCDC1_NUM_VOLTAGES, + AXP313A_DCDC1_CONTROL, AXP313A_DCDC_V_OUT_MASK, + AXP313A_OUTPUT_CONTROL, BIT(0)), + AXP_DESC_RANGES(AXP313A, DCDC2, "dcdc2", "vin2", + axp313a_dcdc2_ranges, AXP313A_DCDC23_NUM_VOLTAGES, + AXP313A_DCDC2_CONTROL, AXP313A_DCDC_V_OUT_MASK, + AXP313A_OUTPUT_CONTROL, BIT(1)), + AXP_DESC_RANGES(AXP313A, DCDC3, "dcdc3", "vin3", + axp313a_dcdc3_ranges, AXP313A_DCDC23_NUM_VOLTAGES, + AXP313A_DCDC3_CONTROL, AXP313A_DCDC_V_OUT_MASK, + AXP313A_OUTPUT_CONTROL, BIT(2)), + AXP_DESC(AXP313A, ALDO1, "aldo1", "vin1", 500, 3500, 100, + AXP313A_ALDO1_CONTROL, AXP313A_LDO_V_OUT_MASK, + AXP313A_OUTPUT_CONTROL, BIT(3)), + AXP_DESC(AXP313A, DLDO1, "dldo1", "vin1", 500, 3500, 100, + AXP313A_DLDO1_CONTROL, AXP313A_LDO_V_OUT_MASK, + AXP313A_OUTPUT_CONTROL, BIT(4)), + AXP_DESC_FIXED(AXP313A, RTC_LDO, "rtc-ldo", "vin1", 1800), +}; + +static const struct linear_range axp717_dcdc1_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), +}; + +/* + * The manual says that the last voltage is 3.4V, encoded as 0b1101011 (107), + * but every other method proves that this is wrong, so it's really 106 that + * programs the final 3.4V. + */ +static const struct linear_range axp717_dcdc2_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), + REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000), +}; + +static const struct linear_range axp717_dcdc3_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), +}; + +static const struct regulator_desc axp717_regulators[] = { + AXP_DESC_RANGES_DELAY(AXP717, DCDC1, "dcdc1", "vin1", + axp717_dcdc1_ranges, AXP717_DCDC1_NUM_VOLTAGES, + AXP717_DCDC1_CONTROL, AXP717_DCDC_V_OUT_MASK, + AXP717_DCDC_OUTPUT_CONTROL, BIT(0), 640), + AXP_DESC_RANGES_DELAY(AXP717, DCDC2, "dcdc2", "vin2", + axp717_dcdc2_ranges, AXP717_DCDC2_NUM_VOLTAGES, + AXP717_DCDC2_CONTROL, AXP717_DCDC_V_OUT_MASK, + AXP717_DCDC_OUTPUT_CONTROL, BIT(1), 640), + AXP_DESC_RANGES_DELAY(AXP717, DCDC3, "dcdc3", "vin3", + axp717_dcdc3_ranges, AXP717_DCDC3_NUM_VOLTAGES, + AXP717_DCDC3_CONTROL, AXP717_DCDC_V_OUT_MASK, + AXP717_DCDC_OUTPUT_CONTROL, BIT(2), 640), + AXP_DESC(AXP717, DCDC4, "dcdc4", "vin4", 1000, 3700, 100, + AXP717_DCDC4_CONTROL, AXP717_DCDC_V_OUT_MASK, + AXP717_DCDC_OUTPUT_CONTROL, BIT(3)), + AXP_DESC(AXP717, ALDO1, "aldo1", "aldoin", 500, 3500, 100, + AXP717_ALDO1_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(0)), + AXP_DESC(AXP717, ALDO2, "aldo2", "aldoin", 500, 3500, 100, + AXP717_ALDO2_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(1)), + AXP_DESC(AXP717, ALDO3, "aldo3", "aldoin", 500, 3500, 100, + AXP717_ALDO3_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(2)), + AXP_DESC(AXP717, ALDO4, "aldo4", "aldoin", 500, 3500, 100, + AXP717_ALDO4_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(3)), + AXP_DESC(AXP717, BLDO1, "bldo1", "bldoin", 500, 3500, 100, + AXP717_BLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(4)), + AXP_DESC(AXP717, BLDO2, "bldo2", "bldoin", 500, 3500, 100, + AXP717_BLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(5)), + AXP_DESC(AXP717, BLDO3, "bldo3", "bldoin", 500, 3500, 100, + AXP717_BLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(6)), + AXP_DESC(AXP717, BLDO4, "bldo4", "bldoin", 500, 3500, 100, + AXP717_BLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO0_OUTPUT_CONTROL, BIT(7)), + AXP_DESC(AXP717, CLDO1, "cldo1", "cldoin", 500, 3500, 100, + AXP717_CLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO1_OUTPUT_CONTROL, BIT(0)), + AXP_DESC(AXP717, CLDO2, "cldo2", "cldoin", 500, 3500, 100, + AXP717_CLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO1_OUTPUT_CONTROL, BIT(1)), + AXP_DESC(AXP717, CLDO3, "cldo3", "cldoin", 500, 3500, 100, + AXP717_CLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO1_OUTPUT_CONTROL, BIT(2)), + AXP_DESC(AXP717, CLDO4, "cldo4", "cldoin", 500, 3500, 100, + AXP717_CLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO1_OUTPUT_CONTROL, BIT(3)), + AXP_DESC(AXP717, CPUSLDO, "cpusldo", "vin1", 500, 1400, 50, + AXP717_CPUSLDO_CONTROL, AXP717_LDO_V_OUT_MASK, + AXP717_LDO1_OUTPUT_CONTROL, BIT(4)), + AXP_DESC(AXP717, BOOST, "boost", "vin1", 4550, 5510, 64, + AXP717_BOOST_CONTROL, AXP717_BOOST_V_OUT_MASK, + AXP717_MODULE_EN_CONTROL_2, BIT(4)), +}; + +/* DCDC ranges shared with AXP813 */ +static const struct linear_range axp803_dcdc234_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, + AXP803_DCDC234_500mV_START, + AXP803_DCDC234_500mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1220000, + AXP803_DCDC234_1220mV_START, + AXP803_DCDC234_1220mV_END, + 20000), +}; + +static const struct linear_range axp803_dcdc5_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, + AXP803_DCDC5_800mV_START, + AXP803_DCDC5_800mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1140000, + AXP803_DCDC5_1140mV_START, + AXP803_DCDC5_1140mV_END, + 20000), +}; + +static const struct linear_range axp803_dcdc6_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, + AXP803_DCDC6_600mV_START, + AXP803_DCDC6_600mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1120000, + AXP803_DCDC6_1120mV_START, + AXP803_DCDC6_1120mV_END, + 20000), +}; + +/* AXP806's CLDO2 and AXP809's DLDO1 share the same range */ +static const struct linear_range axp803_dldo2_ranges[] = { + REGULATOR_LINEAR_RANGE(700000, + AXP803_DLDO2_700mV_START, + AXP803_DLDO2_700mV_END, + 100000), + REGULATOR_LINEAR_RANGE(3400000, + AXP803_DLDO2_3400mV_START, + AXP803_DLDO2_3400mV_END, + 200000), +}; + +static const struct regulator_desc axp803_regulators[] = { + AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100, + AXP803_DCDC1_V_OUT, AXP803_DCDC1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC1_MASK), + AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC2_V_OUT, AXP803_DCDC2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC2_MASK), + AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC3_V_OUT, AXP803_DCDC3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC3_MASK), + AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC4_V_OUT, AXP803_DCDC4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC4_MASK), + AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5", + axp803_dcdc5_ranges, AXP803_DCDC5_NUM_VOLTAGES, + AXP803_DCDC5_V_OUT, AXP803_DCDC5_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC5_MASK), + AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6", + axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES, + AXP803_DCDC6_V_OUT, AXP803_DCDC6_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC6_MASK), + /* secondary switchable output of DCDC1 */ + AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK), + AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100, + AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO3_MASK), + AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100, + AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK), + AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", + axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES, + AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK), + AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100, + AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK), + AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100, + AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK), + AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50, + AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK), + AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50, + AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK), + AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50, + AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK), + AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50, + AXP803_FLDO1_V_OUT, AXP803_FLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO1_MASK), + AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50, + AXP803_FLDO2_V_OUT, AXP803_FLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO2_MASK), + AXP_DESC_IO(AXP803, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100, + AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK, + AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_IO(AXP803, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100, + AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK, + AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc-ldo", "ips", 3000), +}; + +static const struct linear_range axp806_dcdca_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, + AXP806_DCDCA_600mV_START, + AXP806_DCDCA_600mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1120000, + AXP806_DCDCA_1120mV_START, + AXP806_DCDCA_1120mV_END, + 20000), +}; + +static const struct linear_range axp806_dcdcd_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, + AXP806_DCDCD_600mV_START, + AXP806_DCDCD_600mV_END, + 20000), + REGULATOR_LINEAR_RANGE(1600000, + AXP806_DCDCD_1600mV_START, + AXP806_DCDCD_1600mV_END, + 100000), +}; + +static const struct regulator_desc axp806_regulators[] = { + AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina", + axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES, + AXP806_DCDCA_V_CTRL, AXP806_DCDCA_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCA_MASK), + AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50, + AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCB_MASK), + AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc", + axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES, + AXP806_DCDCC_V_CTRL, AXP806_DCDCC_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCC_MASK), + AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind", + axp806_dcdcd_ranges, AXP806_DCDCD_NUM_VOLTAGES, + AXP806_DCDCD_V_CTRL, AXP806_DCDCD_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCD_MASK), + AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100, + AXP806_DCDCE_V_CTRL, AXP806_DCDCE_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCE_MASK), + AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP806_ALDO1_V_CTRL, AXP806_ALDO1_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100, + AXP806_ALDO2_V_CTRL, AXP806_ALDO2_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP806_ALDO3_V_CTRL, AXP806_ALDO3_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO3_MASK), + AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100, + AXP806_BLDO1_V_CTRL, AXP806_BLDO1_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO1_MASK), + AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100, + AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO2_MASK), + AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100, + AXP806_BLDO3_V_CTRL, AXP806_BLDO3_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO3_MASK), + AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100, + AXP806_BLDO4_V_CTRL, AXP806_BLDO4_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO4_MASK), + AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100, + AXP806_CLDO1_V_CTRL, AXP806_CLDO1_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO1_MASK), + AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin", + axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES, + AXP806_CLDO2_V_CTRL, AXP806_CLDO2_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO2_MASK), + AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100, + AXP806_CLDO3_V_CTRL, AXP806_CLDO3_V_CTRL_MASK, + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO3_MASK), + AXP_DESC_SW(AXP806, SW, "sw", "swin", + AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_SW_MASK), +}; + +static const struct linear_range axp809_dcdc4_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, + AXP809_DCDC4_600mV_START, + AXP809_DCDC4_600mV_END, + 20000), + REGULATOR_LINEAR_RANGE(1800000, + AXP809_DCDC4_1800mV_START, + AXP809_DCDC4_1800mV_END, + 100000), +}; + +static const struct regulator_desc axp809_regulators[] = { + AXP_DESC(AXP809, DCDC1, "dcdc1", "vin1", 1600, 3400, 100, + AXP22X_DCDC1_V_OUT, AXP22X_DCDC1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC1_MASK), + AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20, + AXP22X_DCDC2_V_OUT, AXP22X_DCDC2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC2_MASK), + AXP_DESC(AXP809, DCDC3, "dcdc3", "vin3", 600, 1860, 20, + AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK), + AXP_DESC_RANGES(AXP809, DCDC4, "dcdc4", "vin4", + axp809_dcdc4_ranges, AXP809_DCDC4_NUM_VOLTAGES, + AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK), + AXP_DESC(AXP809, DCDC5, "dcdc5", "vin5", 1000, 2550, 50, + AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC5_MASK), + /* secondary switchable output of DCDC1 */ + AXP_DESC_SW(AXP809, DC1SW, "dc1sw", NULL, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK), + /* LDO regulator internally chained to DCDC5 */ + AXP_DESC(AXP809, DC5LDO, "dc5ldo", NULL, 700, 1400, 100, + AXP22X_DC5LDO_V_OUT, AXP22X_DC5LDO_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DC5LDO_MASK), + AXP_DESC(AXP809, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP809, ALDO2, "aldo2", "aldoin", 700, 3300, 100, + AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP809, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ALDO3_MASK), + AXP_DESC_RANGES(AXP809, DLDO1, "dldo1", "dldoin", + axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES, + AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK), + AXP_DESC(AXP809, DLDO2, "dldo2", "dldoin", 700, 3300, 100, + AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK), + AXP_DESC(AXP809, ELDO1, "eldo1", "eldoin", 700, 3300, 100, + AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK), + AXP_DESC(AXP809, ELDO2, "eldo2", "eldoin", 700, 3300, 100, + AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK), + AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100, + AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK), + /* + * Note the datasheet only guarantees reliable operation up to + * 3.3V, this needs to be enforced via dts provided constraints + */ + AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100, + AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK, + AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + /* + * Note the datasheet only guarantees reliable operation up to + * 3.3V, this needs to be enforced via dts provided constraints + */ + AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100, + AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK, + AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800), + AXP_DESC_SW(AXP809, SW, "sw", "swin", + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_SW_MASK), +}; + +static const struct regulator_desc axp813_regulators[] = { + AXP_DESC(AXP813, DCDC1, "dcdc1", "vin1", 1600, 3400, 100, + AXP803_DCDC1_V_OUT, AXP803_DCDC1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC1_MASK), + AXP_DESC_RANGES(AXP813, DCDC2, "dcdc2", "vin2", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC2_V_OUT, AXP803_DCDC2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC2_MASK), + AXP_DESC_RANGES(AXP813, DCDC3, "dcdc3", "vin3", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC3_V_OUT, AXP803_DCDC3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC3_MASK), + AXP_DESC_RANGES(AXP813, DCDC4, "dcdc4", "vin4", + axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES, + AXP803_DCDC4_V_OUT, AXP803_DCDC4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC4_MASK), + AXP_DESC_RANGES(AXP813, DCDC5, "dcdc5", "vin5", + axp803_dcdc5_ranges, AXP803_DCDC5_NUM_VOLTAGES, + AXP803_DCDC5_V_OUT, AXP803_DCDC5_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC5_MASK), + AXP_DESC_RANGES(AXP813, DCDC6, "dcdc6", "vin6", + axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES, + AXP803_DCDC6_V_OUT, AXP803_DCDC6_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC6_MASK), + AXP_DESC_RANGES(AXP813, DCDC7, "dcdc7", "vin7", + axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES, + AXP813_DCDC7_V_OUT, AXP813_DCDC7_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL1, AXP813_PWR_OUT_DCDC7_MASK), + AXP_DESC(AXP813, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100, + AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO3_MASK), + AXP_DESC(AXP813, DLDO1, "dldo1", "dldoin", 700, 3300, 100, + AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK), + AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin", + axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES, + AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK), + AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100, + AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK), + AXP_DESC(AXP813, DLDO4, "dldo4", "dldoin", 700, 3300, 100, + AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK), + AXP_DESC(AXP813, ELDO1, "eldo1", "eldoin", 700, 1900, 50, + AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK), + AXP_DESC(AXP813, ELDO2, "eldo2", "eldoin", 700, 1900, 50, + AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK), + AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50, + AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK), + /* to do / check ... */ + AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50, + AXP803_FLDO1_V_OUT, AXP803_FLDO1_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO1_MASK), + AXP_DESC(AXP813, FLDO2, "fldo2", "fldoin", 700, 1450, 50, + AXP803_FLDO2_V_OUT, AXP803_FLDO2_V_OUT_MASK, + AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO2_MASK), + /* + * TODO: FLDO3 = {DCDC5, FLDOIN} / 2 + * + * This means FLDO3 effectively switches supplies at runtime, + * something the regulator subsystem does not support. + */ + AXP_DESC_FIXED(AXP813, RTC_LDO, "rtc-ldo", "ips", 1800), + AXP_DESC_IO(AXP813, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100, + AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK, + AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_IO(AXP813, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100, + AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK, + AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_SW(AXP813, SW, "sw", "swin", + AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK), +}; + +static const struct linear_range axp15060_dcdc234_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, + AXP15060_DCDC234_500mV_START, + AXP15060_DCDC234_500mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1220000, + AXP15060_DCDC234_1220mV_START, + AXP15060_DCDC234_1220mV_END, + 20000), +}; + +static const struct linear_range axp15060_dcdc5_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, + AXP15060_DCDC5_800mV_START, + AXP15060_DCDC5_800mV_END, + 10000), + REGULATOR_LINEAR_RANGE(1140000, + AXP15060_DCDC5_1140mV_START, + AXP15060_DCDC5_1140mV_END, + 20000), +}; + +static const struct regulator_desc axp15060_regulators[] = { + AXP_DESC(AXP15060, DCDC1, "dcdc1", "vin1", 1500, 3400, 100, + AXP15060_DCDC1_V_CTRL, AXP15060_DCDC1_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC1_MASK), + AXP_DESC_RANGES(AXP15060, DCDC2, "dcdc2", "vin2", + axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES, + AXP15060_DCDC2_V_CTRL, AXP15060_DCDC2_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC2_MASK), + AXP_DESC_RANGES(AXP15060, DCDC3, "dcdc3", "vin3", + axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES, + AXP15060_DCDC3_V_CTRL, AXP15060_DCDC3_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC3_MASK), + AXP_DESC_RANGES(AXP15060, DCDC4, "dcdc4", "vin4", + axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES, + AXP15060_DCDC4_V_CTRL, AXP15060_DCDC4_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC4_MASK), + AXP_DESC_RANGES(AXP15060, DCDC5, "dcdc5", "vin5", + axp15060_dcdc5_ranges, AXP15060_DCDC5_NUM_VOLTAGES, + AXP15060_DCDC5_V_CTRL, AXP15060_DCDC5_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC5_MASK), + AXP_DESC(AXP15060, DCDC6, "dcdc6", "vin6", 500, 3400, 100, + AXP15060_DCDC6_V_CTRL, AXP15060_DCDC6_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC6_MASK), + AXP_DESC(AXP15060, ALDO1, "aldo1", "aldoin", 700, 3300, 100, + AXP15060_ALDO1_V_CTRL, AXP15060_ALDO1_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO1_MASK), + AXP_DESC(AXP15060, ALDO2, "aldo2", "aldoin", 700, 3300, 100, + AXP15060_ALDO2_V_CTRL, AXP15060_ALDO2_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO2_MASK), + AXP_DESC(AXP15060, ALDO3, "aldo3", "aldoin", 700, 3300, 100, + AXP15060_ALDO3_V_CTRL, AXP15060_ALDO3_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO3_MASK), + AXP_DESC(AXP15060, ALDO4, "aldo4", "aldoin", 700, 3300, 100, + AXP15060_ALDO4_V_CTRL, AXP15060_ALDO4_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO4_MASK), + AXP_DESC(AXP15060, ALDO5, "aldo5", "aldoin", 700, 3300, 100, + AXP15060_ALDO5_V_CTRL, AXP15060_ALDO5_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO5_MASK), + AXP_DESC(AXP15060, BLDO1, "bldo1", "bldoin", 700, 3300, 100, + AXP15060_BLDO1_V_CTRL, AXP15060_BLDO1_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO1_MASK), + AXP_DESC(AXP15060, BLDO2, "bldo2", "bldoin", 700, 3300, 100, + AXP15060_BLDO2_V_CTRL, AXP15060_BLDO2_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO2_MASK), + AXP_DESC(AXP15060, BLDO3, "bldo3", "bldoin", 700, 3300, 100, + AXP15060_BLDO3_V_CTRL, AXP15060_BLDO3_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO3_MASK), + AXP_DESC(AXP15060, BLDO4, "bldo4", "bldoin", 700, 3300, 100, + AXP15060_BLDO4_V_CTRL, AXP15060_BLDO4_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_BLDO4_MASK), + AXP_DESC(AXP15060, BLDO5, "bldo5", "bldoin", 700, 3300, 100, + AXP15060_BLDO5_V_CTRL, AXP15060_BLDO5_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_BLDO5_MASK), + AXP_DESC(AXP15060, CLDO1, "cldo1", "cldoin", 700, 3300, 100, + AXP15060_CLDO1_V_CTRL, AXP15060_CLDO1_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO1_MASK), + AXP_DESC(AXP15060, CLDO2, "cldo2", "cldoin", 700, 3300, 100, + AXP15060_CLDO2_V_CTRL, AXP15060_CLDO2_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO2_MASK), + AXP_DESC(AXP15060, CLDO3, "cldo3", "cldoin", 700, 3300, 100, + AXP15060_CLDO3_V_CTRL, AXP15060_CLDO3_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO3_MASK), + AXP_DESC(AXP15060, CLDO4, "cldo4", "cldoin", 700, 4200, 100, + AXP15060_CLDO4_V_CTRL, AXP15060_CLDO4_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO4_MASK), + /* Supply comes from DCDC5 */ + AXP_DESC(AXP15060, CPUSLDO, "cpusldo", NULL, 700, 1400, 50, + AXP15060_CPUSLDO_V_CTRL, AXP15060_CPUSLDO_V_CTRL_MASK, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CPUSLDO_MASK), + /* Supply comes from DCDC1 */ + AXP_DESC_SW(AXP15060, SW, "sw", NULL, + AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_SW_MASK), + /* Supply comes from ALDO1 */ + AXP_DESC_FIXED(AXP15060, RTC_LDO, "rtc-ldo", NULL, 1800), +}; + +static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) +{ + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + unsigned int reg = AXP20X_DCDC_FREQ; + u32 min, max, def, step; + + switch (axp20x->variant) { + case AXP202_ID: + case AXP209_ID: + min = 750; + max = 1875; + def = 1500; + step = 75; + break; + case AXP803_ID: + case AXP813_ID: + /* + * AXP803/AXP813 DCDC work frequency setting has the same + * range and step as AXP22X, but at a different register. + * (See include/linux/mfd/axp20x.h) + */ + reg = AXP803_DCDC_FREQ_CTRL; + fallthrough; /* to the check below */ + case AXP806_ID: + /* + * AXP806 also have DCDC work frequency setting register at a + * different position. + */ + if (axp20x->variant == AXP806_ID) + reg = AXP806_DCDC_FREQ_CTRL; + fallthrough; + case AXP221_ID: + case AXP223_ID: + case AXP809_ID: + min = 1800; + max = 4050; + def = 3000; + step = 150; + break; + case AXP313A_ID: + case AXP323_ID: + case AXP717_ID: + case AXP15060_ID: + /* The DCDC PWM frequency seems to be fixed to 3 MHz. */ + if (dcdcfreq != 0) { + dev_err(&pdev->dev, + "DCDC frequency on this PMIC is fixed to 3 MHz.\n"); + return -EINVAL; + } + + return 0; + default: + dev_err(&pdev->dev, + "Setting DCDC frequency for unsupported AXP variant\n"); + return -EINVAL; + } + + if (dcdcfreq == 0) + dcdcfreq = def; + + if (dcdcfreq < min) { + dcdcfreq = min; + dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n", + min); + } + + if (dcdcfreq > max) { + dcdcfreq = max; + dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n", + max); + } + + dcdcfreq = (dcdcfreq - min) / step; + + return regmap_update_bits(axp20x->regmap, reg, + AXP20X_FREQ_DCDC_MASK, dcdcfreq); +} + +static int axp20x_regulator_parse_dt(struct platform_device *pdev) +{ + struct device_node *np, *regulators; + int ret = 0; + u32 dcdcfreq = 0; + + np = of_node_get(pdev->dev.parent->of_node); + if (!np) + return 0; + + regulators = of_get_child_by_name(np, "regulators"); + if (!regulators) { + dev_warn(&pdev->dev, "regulators node not found\n"); + } else { + of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq); + ret = axp20x_set_dcdc_freq(pdev, dcdcfreq); + if (ret < 0) { + dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret); + } + of_node_put(regulators); + } + + of_node_put(np); + return ret; +} + +static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) +{ + struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); + unsigned int reg = AXP20X_DCDC_MODE; + unsigned int mask; + + switch (axp20x->variant) { + case AXP202_ID: + case AXP209_ID: + if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3)) + return -EINVAL; + + mask = AXP20X_WORKMODE_DCDC2_MASK; + if (id == AXP20X_DCDC3) + mask = AXP20X_WORKMODE_DCDC3_MASK; + + workmode <<= ffs(mask) - 1; + break; + + case AXP806_ID: + /* + * AXP806 DCDC regulator IDs have the same range as AXP22X. + * (See include/linux/mfd/axp20x.h) + */ + reg = AXP806_DCDC_MODE_CTRL2; + fallthrough; /* to the check below */ + case AXP221_ID: + case AXP223_ID: + case AXP809_ID: + if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5) + return -EINVAL; + + mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1); + workmode <<= id - AXP22X_DCDC1; + break; + + case AXP803_ID: + if (id < AXP803_DCDC1 || id > AXP803_DCDC6) + return -EINVAL; + + mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1); + workmode <<= id - AXP803_DCDC1; + break; + + case AXP813_ID: + if (id < AXP813_DCDC1 || id > AXP813_DCDC7) + return -EINVAL; + + mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP813_DCDC1); + workmode <<= id - AXP813_DCDC1; + break; + + case AXP15060_ID: + reg = AXP15060_DCDC_MODE_CTRL2; + if (id < AXP15060_DCDC1 || id > AXP15060_DCDC6) + return -EINVAL; + + mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP15060_DCDC1); + workmode <<= id - AXP15060_DCDC1; + break; + + default: + /* should not happen */ + WARN_ON(1); + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, reg, mask, workmode); +} + +/* + * This function checks whether a regulator is part of a poly-phase + * output setup based on the registers settings. Returns true if it is. + */ +static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id) +{ + u32 reg = 0; + + /* + * Currently in our supported AXP variants, only AXP803, AXP806, + * AXP813 and AXP15060 have polyphase regulators. + */ + switch (axp20x->variant) { + case AXP803_ID: + case AXP813_ID: + regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, ®); + + switch (id) { + case AXP803_DCDC3: + return !!(reg & AXP803_DCDC23_POLYPHASE_DUAL); + case AXP803_DCDC6: + return !!(reg & AXP803_DCDC56_POLYPHASE_DUAL); + } + break; + + case AXP806_ID: + regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, ®); + + switch (id) { + case AXP806_DCDCB: + return (((reg & AXP806_DCDCABC_POLYPHASE_MASK) == + AXP806_DCDCAB_POLYPHASE_DUAL) || + ((reg & AXP806_DCDCABC_POLYPHASE_MASK) == + AXP806_DCDCABC_POLYPHASE_TRI)); + case AXP806_DCDCC: + return ((reg & AXP806_DCDCABC_POLYPHASE_MASK) == + AXP806_DCDCABC_POLYPHASE_TRI); + case AXP806_DCDCE: + return !!(reg & AXP806_DCDCDE_POLYPHASE_DUAL); + } + break; + + case AXP15060_ID: + regmap_read(axp20x->regmap, AXP15060_DCDC_MODE_CTRL1, ®); + + switch (id) { + case AXP15060_DCDC3: + return !!(reg & AXP15060_DCDC23_POLYPHASE_DUAL_MASK); + case AXP15060_DCDC6: + return !!(reg & AXP15060_DCDC46_POLYPHASE_DUAL_MASK); + } + break; + + case AXP323_ID: + regmap_read(axp20x->regmap, AXP323_DCDC_MODE_CTRL2, ®); + + switch (id) { + case AXP313A_DCDC2: + return !!(reg & BIT(1)); + } + break; + + default: + return false; + } + + return false; +} + +static int axp20x_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + const struct regulator_desc *regulators; + struct regulator_config config = { + .dev = pdev->dev.parent, + .regmap = axp20x->regmap, + .driver_data = axp20x, + }; + int ret, i, nregulators; + u32 workmode; + const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name; + const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name; + const char *aldo1_name = axp15060_regulators[AXP15060_ALDO1].name; + bool drivevbus = false; + + switch (axp20x->variant) { + case AXP202_ID: + case AXP209_ID: + regulators = axp20x_regulators; + nregulators = AXP20X_REG_ID_MAX; + break; + case AXP221_ID: + case AXP223_ID: + regulators = axp22x_regulators; + nregulators = AXP22X_REG_ID_MAX; + drivevbus = of_property_read_bool(pdev->dev.parent->of_node, + "x-powers,drive-vbus-en"); + break; + case AXP313A_ID: + case AXP323_ID: + regulators = axp313a_regulators; + nregulators = AXP313A_REG_ID_MAX; + break; + case AXP717_ID: + regulators = axp717_regulators; + nregulators = AXP717_REG_ID_MAX; + break; + case AXP803_ID: + regulators = axp803_regulators; + nregulators = AXP803_REG_ID_MAX; + drivevbus = of_property_read_bool(pdev->dev.parent->of_node, + "x-powers,drive-vbus-en"); + break; + case AXP806_ID: + regulators = axp806_regulators; + nregulators = AXP806_REG_ID_MAX; + break; + case AXP809_ID: + regulators = axp809_regulators; + nregulators = AXP809_REG_ID_MAX; + break; + case AXP813_ID: + regulators = axp813_regulators; + nregulators = AXP813_REG_ID_MAX; + drivevbus = of_property_read_bool(pdev->dev.parent->of_node, + "x-powers,drive-vbus-en"); + break; + case AXP15060_ID: + regulators = axp15060_regulators; + nregulators = AXP15060_REG_ID_MAX; + break; + default: + dev_err(&pdev->dev, "Unsupported AXP variant: %d\n", + axp20x->variant); + return -EINVAL; + } + + /* This only sets the dcdc freq. Ignore any errors */ + axp20x_regulator_parse_dt(pdev); + + for (i = 0; i < nregulators; i++) { + const struct regulator_desc *desc = ®ulators[i]; + struct regulator_desc *new_desc; + + /* + * If this regulator is a slave in a poly-phase setup, + * skip it, as its controls are bound to the master + * regulator and won't work. + */ + if (axp20x_is_polyphase_slave(axp20x, i)) + continue; + + /* Support for AXP813's FLDO3 is not implemented */ + if (axp20x->variant == AXP813_ID && i == AXP813_FLDO3) + continue; + + /* + * Regulators DC1SW, DC5LDO and RTCLDO on AXP15060 are + * connected internally, so we have to handle their supply + * names separately. + * + * We always register the regulators in proper sequence, + * so the supply names are correctly read. See the last + * part of this loop to see where we save the DT defined + * name. + */ + if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) || + (regulators == axp803_regulators && i == AXP803_DC1SW) || + (regulators == axp809_regulators && i == AXP809_DC1SW) || + (regulators == axp15060_regulators && i == AXP15060_SW)) { + new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc), + GFP_KERNEL); + if (!new_desc) + return -ENOMEM; + + *new_desc = regulators[i]; + new_desc->supply_name = dcdc1_name; + desc = new_desc; + } + + if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) || + (regulators == axp809_regulators && i == AXP809_DC5LDO) || + (regulators == axp15060_regulators && i == AXP15060_CPUSLDO)) { + new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc), + GFP_KERNEL); + if (!new_desc) + return -ENOMEM; + + *new_desc = regulators[i]; + new_desc->supply_name = dcdc5_name; + desc = new_desc; + } + + + if (regulators == axp15060_regulators && i == AXP15060_RTC_LDO) { + new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc), + GFP_KERNEL); + if (!new_desc) + return -ENOMEM; + + *new_desc = regulators[i]; + new_desc->supply_name = aldo1_name; + desc = new_desc; + } + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register %s\n", + regulators[i].name); + + return PTR_ERR(rdev); + } + + ret = of_property_read_u32(rdev->dev.of_node, + "x-powers,dcdc-workmode", + &workmode); + if (!ret) { + if (axp20x_set_dcdc_workmode(rdev, i, workmode)) + dev_err(&pdev->dev, "Failed to set workmode on %s\n", + rdev->desc->name); + } + + /* + * Save AXP22X DCDC1 / DCDC5 / AXP15060 ALDO1 regulator names for later. + */ + if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) || + (regulators == axp809_regulators && i == AXP809_DCDC1) || + (regulators == axp15060_regulators && i == AXP15060_DCDC1)) + of_property_read_string(rdev->dev.of_node, + "regulator-name", + &dcdc1_name); + + if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) || + (regulators == axp809_regulators && i == AXP809_DCDC5) || + (regulators == axp15060_regulators && i == AXP15060_DCDC5)) + of_property_read_string(rdev->dev.of_node, + "regulator-name", + &dcdc5_name); + + if (regulators == axp15060_regulators && i == AXP15060_ALDO1) + of_property_read_string(rdev->dev.of_node, + "regulator-name", + &aldo1_name); + } + + if (drivevbus) { + /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */ + regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP, + AXP22X_MISC_N_VBUSEN_FUNC, 0); + rdev = devm_regulator_register(&pdev->dev, + &axp22x_drivevbus_regulator, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register drivevbus\n"); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver axp20x_regulator_driver = { + .probe = axp20x_regulator_probe, + .driver = { + .name = "axp20x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +module_platform_driver(axp20x_regulator_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Carlo Caione "); +MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC"); +MODULE_ALIAS("platform:axp20x-regulator"); diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm590xx-regulator.c new file mode 100644 index 000000000..50414f4cb --- /dev/null +++ b/drivers/regulator/bcm590xx-regulator.c @@ -0,0 +1,1177 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Broadcom BCM590xx regulator driver + * + * Copyright 2014 Linaro Limited + * Author: Matt Porter + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BCM590XX_REG_ENABLE BIT(7) +#define BCM590XX_VBUS_ENABLE BIT(2) +#define BCM590XX_LDO_VSEL_MASK GENMASK(5, 3) +#define BCM590XX_SR_VSEL_MASK GENMASK(5, 0) + +enum bcm590xx_reg_type { + BCM590XX_REG_TYPE_LDO, + BCM590XX_REG_TYPE_GPLDO, + BCM590XX_REG_TYPE_SR, + BCM590XX_REG_TYPE_VBUS +}; + +struct bcm590xx_reg_data { + enum bcm590xx_reg_type type; + enum bcm590xx_regmap_type regmap; + const struct regulator_desc desc; +}; + +struct bcm590xx_reg { + struct bcm590xx *mfd; + unsigned int n_regulators; + const struct bcm590xx_reg_data *regs; +}; + +static const struct regulator_ops bcm590xx_ops_ldo = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, +}; + +/* + * LDO ops without voltage selection, used for MICLDO on BCM59054. + * (These are currently the same as VBUS ops, but will be different + * in the future once full PMMODE support is implemented.) + */ +static const struct regulator_ops bcm590xx_ops_ldo_novolt = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops bcm590xx_ops_dcdc = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_ops bcm590xx_ops_vbus = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +#define BCM590XX_REG_DESC(_model, _name, _name_lower) \ + .id = _model##_REG_##_name, \ + .name = #_name_lower, \ + .of_match = of_match_ptr(#_name_lower), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE \ + +#define BCM590XX_LDO_DESC(_model, _model_lower, _name, _name_lower, _table) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ + .ops = &bcm590xx_ops_ldo, \ + .n_voltages = ARRAY_SIZE(_model_lower##_##_table), \ + .volt_table = _model_lower##_##_table, \ + .vsel_reg = _model##_##_name##CTRL, \ + .vsel_mask = BCM590XX_LDO_VSEL_MASK, \ + .enable_reg = _model##_##_name##PMCTRL1, \ + .enable_mask = BCM590XX_REG_ENABLE, \ + .enable_is_inverted = true + +#define BCM590XX_SR_DESC(_model, _model_lower, _name, _name_lower, _ranges) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ + .ops = &bcm590xx_ops_dcdc, \ + .n_voltages = 64, \ + .linear_ranges = _model_lower##_##_ranges, \ + .n_linear_ranges = ARRAY_SIZE(_model_lower##_##_ranges), \ + .vsel_reg = _model##_##_name##VOUT1, \ + .vsel_mask = BCM590XX_SR_VSEL_MASK, \ + .enable_reg = _model##_##_name##PMCTRL1, \ + .enable_mask = BCM590XX_REG_ENABLE, \ + .enable_is_inverted = true + +#define BCM59056_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59056, _name, _name_lower) +#define BCM59056_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59056, bcm59056, _name, _name_lower, _table) +#define BCM59056_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59056, bcm59056, _name, _name_lower, _ranges) + +#define BCM59054_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59054, _name, _name_lower) +#define BCM59054_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59054, bcm59054, _name, _name_lower, _table) +#define BCM59054_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59054, bcm59054, _name, _name_lower, _ranges) + +/* BCM59056 data */ + +/* I2C slave 0 registers */ +#define BCM59056_RFLDOPMCTRL1 0x60 +#define BCM59056_CAMLDO1PMCTRL1 0x62 +#define BCM59056_CAMLDO2PMCTRL1 0x64 +#define BCM59056_SIMLDO1PMCTRL1 0x66 +#define BCM59056_SIMLDO2PMCTRL1 0x68 +#define BCM59056_SDLDOPMCTRL1 0x6a +#define BCM59056_SDXLDOPMCTRL1 0x6c +#define BCM59056_MMCLDO1PMCTRL1 0x6e +#define BCM59056_MMCLDO2PMCTRL1 0x70 +#define BCM59056_AUDLDOPMCTRL1 0x72 +#define BCM59056_MICLDOPMCTRL1 0x74 +#define BCM59056_USBLDOPMCTRL1 0x76 +#define BCM59056_VIBLDOPMCTRL1 0x78 +#define BCM59056_IOSR1PMCTRL1 0x7a +#define BCM59056_IOSR2PMCTRL1 0x7c +#define BCM59056_CSRPMCTRL1 0x7e +#define BCM59056_SDSR1PMCTRL1 0x82 +#define BCM59056_SDSR2PMCTRL1 0x86 +#define BCM59056_MSRPMCTRL1 0x8a +#define BCM59056_VSRPMCTRL1 0x8e +#define BCM59056_RFLDOCTRL 0x96 +#define BCM59056_CAMLDO1CTRL 0x97 +#define BCM59056_CAMLDO2CTRL 0x98 +#define BCM59056_SIMLDO1CTRL 0x99 +#define BCM59056_SIMLDO2CTRL 0x9a +#define BCM59056_SDLDOCTRL 0x9b +#define BCM59056_SDXLDOCTRL 0x9c +#define BCM59056_MMCLDO1CTRL 0x9d +#define BCM59056_MMCLDO2CTRL 0x9e +#define BCM59056_AUDLDOCTRL 0x9f +#define BCM59056_MICLDOCTRL 0xa0 +#define BCM59056_USBLDOCTRL 0xa1 +#define BCM59056_VIBLDOCTRL 0xa2 +#define BCM59056_CSRVOUT1 0xc0 +#define BCM59056_IOSR1VOUT1 0xc3 +#define BCM59056_IOSR2VOUT1 0xc6 +#define BCM59056_MSRVOUT1 0xc9 +#define BCM59056_SDSR1VOUT1 0xcc +#define BCM59056_SDSR2VOUT1 0xcf +#define BCM59056_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59056_GPLDO5PMCTRL1 0x16 +#define BCM59056_GPLDO6PMCTRL1 0x18 +#define BCM59056_GPLDO1CTRL 0x1a +#define BCM59056_GPLDO2CTRL 0x1b +#define BCM59056_GPLDO3CTRL 0x1c +#define BCM59056_GPLDO4CTRL 0x1d +#define BCM59056_GPLDO5CTRL 0x1e +#define BCM59056_GPLDO6CTRL 0x1f +#define BCM59056_OTG_CTRL 0x40 +#define BCM59056_GPLDO1PMCTRL1 0x57 +#define BCM59056_GPLDO2PMCTRL1 0x59 +#define BCM59056_GPLDO3PMCTRL1 0x5b +#define BCM59056_GPLDO4PMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59056_REG_RFLDO 0 +#define BCM59056_REG_CAMLDO1 1 +#define BCM59056_REG_CAMLDO2 2 +#define BCM59056_REG_SIMLDO1 3 +#define BCM59056_REG_SIMLDO2 4 +#define BCM59056_REG_SDLDO 5 +#define BCM59056_REG_SDXLDO 6 +#define BCM59056_REG_MMCLDO1 7 +#define BCM59056_REG_MMCLDO2 8 +#define BCM59056_REG_AUDLDO 9 +#define BCM59056_REG_MICLDO 10 +#define BCM59056_REG_USBLDO 11 +#define BCM59056_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59056_REG_CSR 13 +#define BCM59056_REG_IOSR1 14 +#define BCM59056_REG_IOSR2 15 +#define BCM59056_REG_MSR 16 +#define BCM59056_REG_SDSR1 17 +#define BCM59056_REG_SDSR2 18 +#define BCM59056_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59056_REG_GPLDO1 20 +#define BCM59056_REG_GPLDO2 21 +#define BCM59056_REG_GPLDO3 22 +#define BCM59056_REG_GPLDO4 23 +#define BCM59056_REG_GPLDO5 24 +#define BCM59056_REG_GPLDO6 25 +#define BCM59056_REG_VBUS 26 + +#define BCM59056_NUM_REGS 27 + +/* LDO group A: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_a_table[] = { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group C: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_c_table[] = { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_csr_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1360000, 51, 55, 20000), + REGULATOR_LINEAR_RANGE(900000, 56, 63, 0), +}; + +/* DCDC group IOSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_iosr1_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 51, 10000), + REGULATOR_LINEAR_RANGE(1500000, 52, 52, 0), + REGULATOR_LINEAR_RANGE(1800000, 53, 53, 0), + REGULATOR_LINEAR_RANGE(900000, 54, 63, 0), +}; + +/* DCDC group SDSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_sdsr1_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1340000, 51, 51, 0), + REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59056_regs[BCM59056_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(RFLDO, rfldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(SDLDO, sdldo, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(AUDLDO, audldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(MICLDO, micldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(USBLDO, usbldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_LDO_DESC(VIBLDO, vibldo, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(MSR, msr, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59056_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59056_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM59056_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + +/* BCM59054 data */ + +/* I2C slave 0 registers */ +#define BCM59054_RFLDOPMCTRL1 0x60 +#define BCM59054_CAMLDO1PMCTRL1 0x62 +#define BCM59054_CAMLDO2PMCTRL1 0x64 +#define BCM59054_SIMLDO1PMCTRL1 0x66 +#define BCM59054_SIMLDO2PMCTRL1 0x68 +#define BCM59054_SDLDOPMCTRL1 0x6a +#define BCM59054_SDXLDOPMCTRL1 0x6c +#define BCM59054_MMCLDO1PMCTRL1 0x6e +#define BCM59054_MMCLDO2PMCTRL1 0x70 +#define BCM59054_AUDLDOPMCTRL1 0x72 +#define BCM59054_MICLDOPMCTRL1 0x74 +#define BCM59054_USBLDOPMCTRL1 0x76 +#define BCM59054_VIBLDOPMCTRL1 0x78 +#define BCM59054_IOSR1PMCTRL1 0x7a +#define BCM59054_IOSR2PMCTRL1 0x7c +#define BCM59054_CSRPMCTRL1 0x7e +#define BCM59054_SDSR1PMCTRL1 0x82 +#define BCM59054_SDSR2PMCTRL1 0x86 +#define BCM59054_MMSRPMCTRL1 0x8a +#define BCM59054_VSRPMCTRL1 0x8e +#define BCM59054_RFLDOCTRL 0x96 +#define BCM59054_CAMLDO1CTRL 0x97 +#define BCM59054_CAMLDO2CTRL 0x98 +#define BCM59054_SIMLDO1CTRL 0x99 +#define BCM59054_SIMLDO2CTRL 0x9a +#define BCM59054_SDLDOCTRL 0x9b +#define BCM59054_SDXLDOCTRL 0x9c +#define BCM59054_MMCLDO1CTRL 0x9d +#define BCM59054_MMCLDO2CTRL 0x9e +#define BCM59054_AUDLDOCTRL 0x9f +#define BCM59054_MICLDOCTRL 0xa0 +#define BCM59054_USBLDOCTRL 0xa1 +#define BCM59054_VIBLDOCTRL 0xa2 +#define BCM59054_CSRVOUT1 0xc0 +#define BCM59054_IOSR1VOUT1 0xc3 +#define BCM59054_IOSR2VOUT1 0xc6 +#define BCM59054_MMSRVOUT1 0xc9 +#define BCM59054_SDSR1VOUT1 0xcc +#define BCM59054_SDSR2VOUT1 0xcf +#define BCM59054_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59054_LVLDO1PMCTRL1 0x16 +#define BCM59054_LVLDO2PMCTRL1 0x18 +#define BCM59054_GPLDO1CTRL 0x1a +#define BCM59054_GPLDO2CTRL 0x1b +#define BCM59054_GPLDO3CTRL 0x1c +#define BCM59054_TCXLDOCTRL 0x1d +#define BCM59054_LVLDO1CTRL 0x1e +#define BCM59054_LVLDO2CTRL 0x1f +#define BCM59054_OTG_CTRL 0x40 +#define BCM59054_GPLDO1PMCTRL1 0x57 +#define BCM59054_GPLDO2PMCTRL1 0x59 +#define BCM59054_GPLDO3PMCTRL1 0x5b +#define BCM59054_TCXLDOPMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59054_REG_RFLDO 0 +#define BCM59054_REG_CAMLDO1 1 +#define BCM59054_REG_CAMLDO2 2 +#define BCM59054_REG_SIMLDO1 3 +#define BCM59054_REG_SIMLDO2 4 +#define BCM59054_REG_SDLDO 5 +#define BCM59054_REG_SDXLDO 6 +#define BCM59054_REG_MMCLDO1 7 +#define BCM59054_REG_MMCLDO2 8 +#define BCM59054_REG_AUDLDO 9 +#define BCM59054_REG_MICLDO 10 +#define BCM59054_REG_USBLDO 11 +#define BCM59054_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59054_REG_CSR 13 +#define BCM59054_REG_IOSR1 14 +#define BCM59054_REG_IOSR2 15 +#define BCM59054_REG_MMSR 16 +#define BCM59054_REG_SDSR1 17 +#define BCM59054_REG_SDSR2 18 +#define BCM59054_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59054_REG_GPLDO1 20 +#define BCM59054_REG_GPLDO2 21 +#define BCM59054_REG_GPLDO3 22 +#define BCM59054_REG_TCXLDO 23 +#define BCM59054_REG_LVLDO1 24 +#define BCM59054_REG_LVLDO2 25 +#define BCM59054_REG_VBUS 26 + +#define BCM59054_NUM_REGS 27 + +/* LDO group 1: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_1_table[] = { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 2: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_2_table[] = { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 3: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_3_table[] = { + 1000000, 1107000, 1143000, 1214000, 1250000, + 1464000, 1500000, 1786000, +}; + +/* DCDC group SR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_sr_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(900000, 63, 63, 0), +}; + +/* DCDC group VSR (BCM59054A1): supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_vsr_a1_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 59, 10000), + REGULATOR_LINEAR_RANGE(1700000, 60, 60, 0), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(1600000, 63, 63, 0), +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_csr_ranges[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 1, 100000), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(900000, 61, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59054_regs[BCM59054_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_REG_DESC(MICLDO, micldo), + .ops = &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages = 1, + .fixed_uV = 1800000, + .enable_reg = BCM59054_MICLDOPMCTRL1, + .enable_mask = BCM590XX_REG_ENABLE, + .enable_is_inverted = true, + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(VSR, vsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM59054_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + +/* + * BCM59054A1 regulators; same as previous revision, but with different + * VSR voltage table. + */ +static const struct bcm590xx_reg_data bcm59054_a1_regs[BCM59054_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_REG_DESC(MICLDO, micldo), + .ops = &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages = 1, + .fixed_uV = 1800000, + .enable_reg = BCM59054_MICLDOPMCTRL1, + .enable_mask = BCM590XX_REG_ENABLE, + .enable_is_inverted = true, + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(VSR, vsr, dcdc_vsr_a1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM59054_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + +static int bcm590xx_probe(struct platform_device *pdev) +{ + struct bcm590xx *bcm590xx = dev_get_drvdata(pdev->dev.parent); + struct bcm590xx_reg *pmu; + const struct bcm590xx_reg_data *info; + struct regulator_config config = { }; + struct regulator_dev *rdev; + unsigned int i; + + pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL); + if (!pmu) + return -ENOMEM; + + pmu->mfd = bcm590xx; + + switch (pmu->mfd->pmu_id) { + case BCM590XX_PMUID_BCM59054: + pmu->n_regulators = BCM59054_NUM_REGS; + if (pmu->mfd->rev_analog == BCM59054_REV_ANALOG_A1) + pmu->regs = bcm59054_a1_regs; + else + pmu->regs = bcm59054_regs; + break; + case BCM590XX_PMUID_BCM59056: + pmu->n_regulators = BCM59056_NUM_REGS; + pmu->regs = bcm59056_regs; + break; + default: + dev_err(bcm590xx->dev, + "unknown device type, could not initialize\n"); + return -EINVAL; + } + + platform_set_drvdata(pdev, pmu); + + /* Register the regulators */ + for (i = 0; i < pmu->n_regulators; i++) { + info = &pmu->regs[i]; + + config.dev = bcm590xx->dev; + config.driver_data = pmu; + + switch (info->regmap) { + case BCM590XX_REGMAP_PRI: + config.regmap = bcm590xx->regmap_pri; + break; + case BCM590XX_REGMAP_SEC: + config.regmap = bcm590xx->regmap_sec; + break; + default: + dev_err(bcm590xx->dev, + "invalid regmap for %s regulator; this is a driver bug\n", + pdev->name); + return -EINVAL; + } + + rdev = devm_regulator_register(&pdev->dev, &info->desc, + &config); + if (IS_ERR(rdev)) + return dev_err_probe(bcm590xx->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + pdev->name); + } + + return 0; +} + +static struct platform_driver bcm590xx_regulator_driver = { + .driver = { + .name = "bcm590xx-vregs", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = bcm590xx_probe, +}; +module_platform_driver(bcm590xx_regulator_driver); + +MODULE_AUTHOR("Matt Porter "); +MODULE_DESCRIPTION("BCM590xx voltage regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:bcm590xx-vregs"); diff --git a/drivers/regulator/bd71815-regulator.c b/drivers/regulator/bd71815-regulator.c new file mode 100644 index 000000000..4c2b20d1b --- /dev/null +++ b/drivers/regulator/bd71815-regulator.c @@ -0,0 +1,628 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright 2014 Embest Technology Co. Ltd. Inc. +// bd71815-regulator.c ROHM BD71815 regulator driver +// +// Author: Tony Luo +// +// Partially rewritten at 2021 by +// Matti Vaittinen + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct bd71815_regulator { + struct regulator_desc desc; + const struct rohm_dvs_config *dvs; +}; + +static const int bd7181x_wled_currents[] = { + 10, 20, 30, 50, 70, 100, 200, 300, 500, 700, 1000, 2000, 3000, 4000, + 5000, 6000, 7000, 8000, 9000, 10000, 11000, 12000, 13000, 14000, 15000, + 16000, 17000, 18000, 19000, 20000, 21000, 22000, 23000, 24000, 25000, +}; + +static const struct rohm_dvs_config buck1_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_BUCK1_VOLT_H, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = BD71815_BUCK_RUN_ON, + .snvs_on_mask = BD71815_BUCK_SNVS_ON, + .suspend_reg = BD71815_REG_BUCK1_VOLT_L, + .suspend_mask = BD71815_VOLT_MASK, + .suspend_on_mask = BD71815_BUCK_SUSP_ON, + .lpsr_reg = BD71815_REG_BUCK1_VOLT_L, + .lpsr_mask = BD71815_VOLT_MASK, + .lpsr_on_mask = BD71815_BUCK_LPSR_ON, +}; + +static const struct rohm_dvs_config buck2_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_BUCK2_VOLT_H, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = BD71815_BUCK_RUN_ON, + .snvs_on_mask = BD71815_BUCK_SNVS_ON, + .suspend_reg = BD71815_REG_BUCK2_VOLT_L, + .suspend_mask = BD71815_VOLT_MASK, + .suspend_on_mask = BD71815_BUCK_SUSP_ON, + .lpsr_reg = BD71815_REG_BUCK2_VOLT_L, + .lpsr_mask = BD71815_VOLT_MASK, + .lpsr_on_mask = BD71815_BUCK_LPSR_ON, +}; + +static const struct rohm_dvs_config buck3_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_BUCK3_VOLT, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = BD71815_BUCK_RUN_ON, + .snvs_on_mask = BD71815_BUCK_SNVS_ON, + .suspend_on_mask = BD71815_BUCK_SUSP_ON, + .lpsr_on_mask = BD71815_BUCK_LPSR_ON, +}; + +static const struct rohm_dvs_config buck4_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_BUCK4_VOLT, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = BD71815_BUCK_RUN_ON, + .snvs_on_mask = BD71815_BUCK_SNVS_ON, + .suspend_on_mask = BD71815_BUCK_SUSP_ON, + .lpsr_on_mask = BD71815_BUCK_LPSR_ON, +}; + +static const struct rohm_dvs_config ldo1_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_LDO_MODE1, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = LDO1_RUN_ON, + .snvs_on_mask = LDO1_SNVS_ON, + .suspend_on_mask = LDO1_SUSP_ON, + .lpsr_on_mask = LDO1_LPSR_ON, +}; + +static const struct rohm_dvs_config ldo2_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_LDO_MODE2, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = LDO2_RUN_ON, + .snvs_on_mask = LDO2_SNVS_ON, + .suspend_on_mask = LDO2_SUSP_ON, + .lpsr_on_mask = LDO2_LPSR_ON, +}; + +static const struct rohm_dvs_config ldo3_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_LDO_MODE2, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = LDO3_RUN_ON, + .snvs_on_mask = LDO3_SNVS_ON, + .suspend_on_mask = LDO3_SUSP_ON, + .lpsr_on_mask = LDO3_LPSR_ON, +}; + +static const struct rohm_dvs_config ldo4_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_LDO_MODE3, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = LDO4_RUN_ON, + .snvs_on_mask = LDO4_SNVS_ON, + .suspend_on_mask = LDO4_SUSP_ON, + .lpsr_on_mask = LDO4_LPSR_ON, +}; + +static const struct rohm_dvs_config ldo5_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_LDO_MODE3, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = LDO5_RUN_ON, + .snvs_on_mask = LDO5_SNVS_ON, + .suspend_on_mask = LDO5_SUSP_ON, + .lpsr_on_mask = LDO5_LPSR_ON, +}; + +static const struct rohm_dvs_config dvref_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_on_mask = DVREF_RUN_ON, + .snvs_on_mask = DVREF_SNVS_ON, + .suspend_on_mask = DVREF_SUSP_ON, + .lpsr_on_mask = DVREF_LPSR_ON, +}; + +static const struct rohm_dvs_config ldolpsr_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_on_mask = DVREF_RUN_ON, + .snvs_on_mask = DVREF_SNVS_ON, + .suspend_on_mask = DVREF_SUSP_ON, + .lpsr_on_mask = DVREF_LPSR_ON, +}; + +static const struct rohm_dvs_config buck5_dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_SNVS | + ROHM_DVS_LEVEL_SUSPEND | ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71815_REG_BUCK5_VOLT, + .run_mask = BD71815_VOLT_MASK, + .run_on_mask = BD71815_BUCK_RUN_ON, + .snvs_on_mask = BD71815_BUCK_SNVS_ON, + .suspend_on_mask = BD71815_BUCK_SUSP_ON, + .lpsr_on_mask = BD71815_BUCK_LPSR_ON, +}; + +static int set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct bd71815_regulator *data; + + data = container_of_const(desc, struct bd71815_regulator, desc); + return rohm_regulator_set_dvs_levels(data->dvs, np, desc, cfg->regmap); +} + +/* + * Bucks 1 and 2 have two voltage selection registers where selected + * voltage can be set. Which of the registers is used can be either controlled + * by a control bit in register - or by HW state. If HW state specific voltages + * are given - then we assume HW state based control should be used. + * + * If volatge value is updated to currently selected register - then output + * voltage is immediately changed no matter what is set as ramp rate. Thus we + * default changing voltage by writing new value to inactive register and + * then updating the 'register selection' bit. This naturally only works when + * HW state machine is not used to select the voltage. + */ +static int buck12_set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct bd71815_regulator *data; + int ret = 0, val; + + data = container_of_const(desc, struct bd71815_regulator, desc); + + if (of_property_present(np, "rohm,dvs-run-voltage") || + of_property_present(np, "rohm,dvs-suspend-voltage") || + of_property_present(np, "rohm,dvs-lpsr-voltage") || + of_property_present(np, "rohm,dvs-snvs-voltage")) { + ret = regmap_read(cfg->regmap, desc->vsel_reg, &val); + if (ret) + return ret; + + if (!(BD71815_BUCK_STBY_DVS & val) && + !(BD71815_BUCK_DVSSEL & val)) { + int val2; + + /* + * We are currently using voltage from _L. + * We'd better copy it to _H and switch to it to + * avoid shutting us down if LPSR or SUSPEND is set to + * disabled. _L value is at reg _H + 1 + */ + ret = regmap_read(cfg->regmap, desc->vsel_reg + 1, + &val2); + if (ret) + return ret; + + ret = regmap_update_bits(cfg->regmap, desc->vsel_reg, + BD71815_VOLT_MASK | + BD71815_BUCK_DVSSEL, + val2 | BD71815_BUCK_DVSSEL); + if (ret) + return ret; + } + ret = rohm_regulator_set_dvs_levels(data->dvs, np, desc, + cfg->regmap); + if (ret) + return ret; + /* + * DVS levels were given => use HW-state machine for voltage + * controls. NOTE: AFAIK, This means that if voltage is changed + * by SW the ramp-rate is not respected. Should we disable + * SW voltage control when the HW state machine is used? + */ + ret = regmap_update_bits(cfg->regmap, desc->vsel_reg, + BD71815_BUCK_STBY_DVS, + BD71815_BUCK_STBY_DVS); + } + + return ret; +} + +/* + * BUCK1/2 + * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting + * 00: 10.00mV/usec 10mV 1uS + * 01: 5.00mV/usec 10mV 2uS + * 10: 2.50mV/usec 10mV 4uS + * 11: 1.25mV/usec 10mV 8uS + */ +static const unsigned int bd7181x_ramp_table[] = { 10000, 5000, 2500, 1250 }; + +static int bd7181x_led_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + int ret; + int onstatus; + + onstatus = regulator_is_enabled_regmap(rdev); + + ret = regulator_set_current_limit_regmap(rdev, min_uA, max_uA); + if (!ret) { + int newstatus; + + newstatus = regulator_is_enabled_regmap(rdev); + if (onstatus != newstatus) { + /* + * HW FIX: spurious led status change detected. Toggle + * state as a workaround + */ + if (onstatus) + ret = regulator_enable_regmap(rdev); + else + ret = regulator_disable_regmap(rdev); + + if (ret) + dev_err(rdev_get_dev(rdev), + "failed to revert the LED state (%d)\n", + ret); + } + } + + return ret; +} + +static int bd7181x_buck12_get_voltage_sel(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + int ret, regh, regl, val; + + regh = BD71815_REG_BUCK1_VOLT_H + rid * 0x2; + regl = BD71815_REG_BUCK1_VOLT_L + rid * 0x2; + + ret = regmap_read(rdev->regmap, regh, &val); + if (ret) + return ret; + + /* + * If we use HW state machine based voltage reg selection - then we + * return BD71815_REG_BUCK1_VOLT_H which is used at RUN. + * Else we do return the BD71815_REG_BUCK1_VOLT_H or + * BD71815_REG_BUCK1_VOLT_L depending on which is selected to be used + * by BD71815_BUCK_DVSSEL bit + */ + if ((!(val & BD71815_BUCK_STBY_DVS)) && (!(val & BD71815_BUCK_DVSSEL))) + ret = regmap_read(rdev->regmap, regl, &val); + + if (ret) + return ret; + + return val & BD71815_VOLT_MASK; +} + +/* + * For Buck 1/2. + */ +static int bd7181x_buck12_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + int rid = rdev_get_id(rdev); + int ret, val, reg, regh, regl; + + regh = BD71815_REG_BUCK1_VOLT_H + rid*0x2; + regl = BD71815_REG_BUCK1_VOLT_L + rid*0x2; + + ret = regmap_read(rdev->regmap, regh, &val); + if (ret) + return ret; + + /* + * If bucks 1 & 2 are controlled by state machine - then the RUN state + * voltage is set to BD71815_REG_BUCK1_VOLT_H. Changing SUSPEND/LPSR + * voltages at runtime is not supported by this driver. + */ + if (((val & BD71815_BUCK_STBY_DVS))) { + return regmap_update_bits(rdev->regmap, regh, BD71815_VOLT_MASK, + sel); + } + /* Update new voltage to the register which is not selected now */ + if (val & BD71815_BUCK_DVSSEL) + reg = regl; + else + reg = regh; + + ret = regmap_update_bits(rdev->regmap, reg, BD71815_VOLT_MASK, sel); + if (ret) + return ret; + + /* Select the other DVS register to be used */ + return regmap_update_bits(rdev->regmap, regh, BD71815_BUCK_DVSSEL, + ~val); +} + +static const struct regulator_ops bd7181x_ldo_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd7181x_fixed_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops bd7181x_buck_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops bd7181x_buck12_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = bd7181x_buck12_set_voltage_sel, + .get_voltage_sel = bd7181x_buck12_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd7181x_led_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_current_limit = bd7181x_led_set_current_limit, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +#define BD71815_FIXED_REG(_name, _id, ereg, emsk, voltage, _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = 1, \ + .ops = &bd7181x_fixed_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .owner = THIS_MODULE, \ + .min_uV = (voltage), \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define BD71815_BUCK_REG(_name, _id, vsel, ereg, min, max, step, _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_buck_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = BD71815_VOLT_MASK, \ + .enable_reg = (ereg), \ + .enable_mask = BD71815_BUCK_RUN_ON, \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define BD71815_BUCK12_REG(_name, _id, vsel, ereg, min, max, step, \ + _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_buck12_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = BD71815_VOLT_MASK, \ + .enable_reg = (ereg), \ + .enable_mask = BD71815_BUCK_RUN_ON, \ + .ramp_reg = (ereg), \ + .ramp_mask = BD71815_BUCK_RAMPRATE_MASK, \ + .ramp_delay_table = bd7181x_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(bd7181x_ramp_table),\ + .of_parse_cb = buck12_set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +#define BD71815_LED_REG(_name, _id, csel, mask, ereg, emsk, currents) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_current_limits = ARRAY_SIZE(currents), \ + .ops = &bd7181x_led_regulator_ops, \ + .type = REGULATOR_CURRENT, \ + .id = (_id), \ + .owner = THIS_MODULE, \ + .curr_table = currents, \ + .csel_reg = (csel), \ + .csel_mask = (mask), \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + }, \ + } + +#define BD71815_LDO_REG(_name, _id, vsel, ereg, emsk, min, max, step, \ + _dvs) \ + [(_id)] = { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &bd7181x_ldo_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (vsel), \ + .vsel_mask = BD71815_VOLT_MASK, \ + .enable_reg = (ereg), \ + .enable_mask = (emsk), \ + .of_parse_cb = set_hw_dvs_levels, \ + }, \ + .dvs = (_dvs), \ + } + +static const struct bd71815_regulator bd71815_regulators[] = { + BD71815_BUCK12_REG(buck1, BD71815_BUCK1, BD71815_REG_BUCK1_VOLT_H, + BD71815_REG_BUCK1_MODE, 800000, 2000000, 25000, + &buck1_dvs), + BD71815_BUCK12_REG(buck2, BD71815_BUCK2, BD71815_REG_BUCK2_VOLT_H, + BD71815_REG_BUCK2_MODE, 800000, 2000000, 25000, + &buck2_dvs), + BD71815_BUCK_REG(buck3, BD71815_BUCK3, BD71815_REG_BUCK3_VOLT, + BD71815_REG_BUCK3_MODE, 1200000, 2700000, 50000, + &buck3_dvs), + BD71815_BUCK_REG(buck4, BD71815_BUCK4, BD71815_REG_BUCK4_VOLT, + BD71815_REG_BUCK4_MODE, 1100000, 1850000, 25000, + &buck4_dvs), + BD71815_BUCK_REG(buck5, BD71815_BUCK5, BD71815_REG_BUCK5_VOLT, + BD71815_REG_BUCK5_MODE, 1800000, 3300000, 50000, + &buck5_dvs), + BD71815_LDO_REG(ldo1, BD71815_LDO1, BD71815_REG_LDO1_VOLT, + BD71815_REG_LDO_MODE1, LDO1_RUN_ON, 800000, 3300000, + 50000, &ldo1_dvs), + BD71815_LDO_REG(ldo2, BD71815_LDO2, BD71815_REG_LDO2_VOLT, + BD71815_REG_LDO_MODE2, LDO2_RUN_ON, 800000, 3300000, + 50000, &ldo2_dvs), + /* + * Let's default LDO3 to be enabled by SW. We can override ops if DT + * says LDO3 should be enabled by HW when DCIN is connected. + */ + BD71815_LDO_REG(ldo3, BD71815_LDO3, BD71815_REG_LDO3_VOLT, + BD71815_REG_LDO_MODE2, LDO3_RUN_ON, 800000, 3300000, + 50000, &ldo3_dvs), + BD71815_LDO_REG(ldo4, BD71815_LDO4, BD71815_REG_LDO4_VOLT, + BD71815_REG_LDO_MODE3, LDO4_RUN_ON, 800000, 3300000, + 50000, &ldo4_dvs), + BD71815_LDO_REG(ldo5, BD71815_LDO5, BD71815_REG_LDO5_VOLT_H, + BD71815_REG_LDO_MODE3, LDO5_RUN_ON, 800000, 3300000, + 50000, &ldo5_dvs), + BD71815_FIXED_REG(ldodvref, BD71815_LDODVREF, BD71815_REG_LDO_MODE4, + DVREF_RUN_ON, 3000000, &dvref_dvs), + BD71815_FIXED_REG(ldolpsr, BD71815_LDOLPSR, BD71815_REG_LDO_MODE4, + LDO_LPSR_RUN_ON, 1800000, &ldolpsr_dvs), + BD71815_LED_REG(wled, BD71815_WLED, BD71815_REG_LED_DIMM, LED_DIMM_MASK, + BD71815_REG_LED_CTRL, LED_RUN_ON, + bd7181x_wled_currents), +}; + +static int bd7181x_probe(struct platform_device *pdev) +{ + struct regulator_config config = {}; + int i, ret; + struct gpio_desc *ldo4_en; + struct regmap *regmap; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "No parent regmap\n"); + return -ENODEV; + } + + ldo4_en = devm_fwnode_gpiod_get_optional(&pdev->dev, + dev_fwnode(pdev->dev.parent), + "rohm,vsel", GPIOD_ASIS, + "ldo4-en"); + if (IS_ERR(ldo4_en)) + return PTR_ERR(ldo4_en); + + /* Disable to go to ship-mode */ + ret = regmap_update_bits(regmap, BD71815_REG_PWRCTRL, RESTARTEN, 0); + if (ret) + return ret; + + config.dev = pdev->dev.parent; + config.regmap = regmap; + + for (i = 0; i < BD71815_REGULATOR_CNT; i++) { + const struct regulator_desc *desc; + struct regulator_dev *rdev; + + desc = &bd71815_regulators[i].desc; + + if (i == BD71815_LDO4) + config.ena_gpiod = ldo4_en; + else + config.ena_gpiod = NULL; + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + desc->name); + } + return 0; +} + +static const struct platform_device_id bd7181x_pmic_id[] = { + { .name = "bd71815-pmic", .driver_data = ROHM_CHIP_TYPE_BD71815 }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd7181x_pmic_id); + +static struct platform_driver bd7181x_regulator = { + .driver = { + .name = "bd7181x-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = bd7181x_probe, + .id_table = bd7181x_pmic_id, +}; +module_platform_driver(bd7181x_regulator); + +MODULE_AUTHOR("Tony Luo "); +MODULE_DESCRIPTION("BD71815 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:bd7181x-pmic"); diff --git a/drivers/regulator/bd71828-regulator.c b/drivers/regulator/bd71828-regulator.c new file mode 100644 index 000000000..2ced81df0 --- /dev/null +++ b/drivers/regulator/bd71828-regulator.c @@ -0,0 +1,1712 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (C) 2019 ROHM Semiconductors +// bd71828-regulator.c ROHM BD71828GW-DS1 regulator driver +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BD72720_MASK_LDON_HEAD GENMASK(2, 0) +struct reg_init { + unsigned int reg; + unsigned int mask; + unsigned int val; +}; +struct bd71828_regulator_data { + struct regulator_desc desc; + const struct rohm_dvs_config dvs; + const struct reg_init *reg_inits; + int reg_init_amnt; +}; + +static const struct reg_init bd71828_buck1_inits[] = { + /* + * DVS Buck voltages can be changed by register values or via GPIO. + * Use register accesses by default. + */ + { + .reg = BD71828_REG_PS_CTRL_1, + .mask = BD71828_MASK_DVS_BUCK1_CTRL, + .val = BD71828_DVS_BUCK1_CTRL_I2C, + }, +}; + +static const struct reg_init bd71828_buck2_inits[] = { + { + .reg = BD71828_REG_PS_CTRL_1, + .mask = BD71828_MASK_DVS_BUCK2_CTRL, + .val = BD71828_DVS_BUCK2_CTRL_I2C, + }, +}; + +static const struct reg_init bd71828_buck6_inits[] = { + { + .reg = BD71828_REG_PS_CTRL_1, + .mask = BD71828_MASK_DVS_BUCK6_CTRL, + .val = BD71828_DVS_BUCK6_CTRL_I2C, + }, +}; + +static const struct reg_init bd71828_buck7_inits[] = { + { + .reg = BD71828_REG_PS_CTRL_1, + .mask = BD71828_MASK_DVS_BUCK7_CTRL, + .val = BD71828_DVS_BUCK7_CTRL_I2C, + }, +}; + +#define BD72720_MASK_DVS_BUCK1_CTRL BIT(4) +#define BD72720_MASK_DVS_LDO1_CTRL BIT(5) + +static const struct reg_init bd72720_buck1_inits[] = { + { + .reg = BD72720_REG_PS_CTRL_2, + .mask = BD72720_MASK_DVS_BUCK1_CTRL, + .val = 0, /* Disable "run-level" control */ + }, +}; + +static const struct reg_init bd72720_ldo1_inits[] = { + { + .reg = BD72720_REG_PS_CTRL_2, + .mask = BD72720_MASK_DVS_LDO1_CTRL, + .val = 0, /* Disable "run-level" control */ + }, +}; + +/* BD71828 Buck voltages */ +static const struct linear_range bd71828_buck1267_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0xef, 6250), + REGULATOR_LINEAR_RANGE(2000000, 0xf0, 0xff, 0), +}; + +static const struct linear_range bd71828_buck3_volts[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x0f, 50000), + REGULATOR_LINEAR_RANGE(2000000, 0x10, 0x1f, 0), +}; + +static const struct linear_range bd71828_buck4_volts[] = { + REGULATOR_LINEAR_RANGE(1000000, 0x00, 0x1f, 25000), + REGULATOR_LINEAR_RANGE(1800000, 0x20, 0x3f, 0), +}; + +static const struct linear_range bd71828_buck5_volts[] = { + REGULATOR_LINEAR_RANGE(2500000, 0x00, 0x0f, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x10, 0x1f, 0), +}; + +/* BD71828 LDO voltages */ +static const struct linear_range bd71828_ldo_volts[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x31, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x32, 0x3f, 0), +}; + +/* BD72720 Buck voltages */ +static const struct linear_range bd72720_buck1234_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0xc0, 6250), + REGULATOR_LINEAR_RANGE(1700000, 0xc1, 0xff, 0), +}; + +static const struct linear_range bd72720_buck589_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x78, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0x79, 0xff, 0), +}; + +static const struct linear_range bd72720_buck67_volts[] = { + REGULATOR_LINEAR_RANGE(1500000, 0x00, 0xb4, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0xb5, 0xff, 0), +}; + +/* + * The BUCK10 on BD72720 has two modes of operation, depending on a LDON_HEAD + * setting. When LDON_HEAD is 0x0, the behaviour is as with other bucks, eg. + * voltage can be set to a values indicated below using the VSEL register. + * + * However, when LDON_HEAD is set to 0x1 ... 0x7, BUCK 10 voltage is, according + * to the data-sheet, "automatically adjusted following LDON_HEAD setting and + * clamped to BUCK10_VID setting". + * + * Again, reading the data-sheet shows a "typical connection" where the BUCK10 + * is used to supply the LDOs 1-4. My assumption is that in practice, this + * means that the BUCK10 voltage will be adjusted based on the maximum output + * of the LDO 1-4 (to minimize power loss). This makes sense. + * + * Auto-adjusting regulators aren't something I really like to model in the + * driver though - and, if the auto-adjustment works as intended, then there + * should really be no need to software to care about the buck10 voltages. + * If enable/disable control is still needed, we can implement buck10 as a + * regulator with only the enable/disable ops - and device-tree can be used + * to model the supply-relations. I believe this could allow the regulator + * framework to automagically disable the BUCK10 if all LDOs that are being + * supplied by it are disabled. + */ +static const struct linear_range bd72720_buck10_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0xc0, 6250), + REGULATOR_LINEAR_RANGE(1700000, 0xc1, 0xff, 0), +}; + +/* BD72720 LDO voltages */ +static const struct linear_range bd72720_ldo1234_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x50, 6250), + REGULATOR_LINEAR_RANGE(1000000, 0x51, 0x7f, 0), +}; + +static const struct linear_range bd72720_ldo57891011_volts[] = { + REGULATOR_LINEAR_RANGE(750000, 0x00, 0xff, 10000), +}; + +static const struct linear_range bd72720_ldo6_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x78, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0x79, 0x7f, 0), +}; + +static const unsigned int bd71828_ramp_delay[] = { 2500, 5000, 10000, 20000 }; + +/* + * BD72720 supports setting both the ramp-up and ramp-down values + * separately. Do we need to support ramp-down setting? + */ +static const unsigned int bd72720_ramp_delay[] = { 5000, 7500, 10000, 12500 }; + +static int buck_set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct bd71828_regulator_data *data; + + data = container_of_const(desc, struct bd71828_regulator_data, desc); + + return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); +} + +static int bd71828_ldo6_parse_dt(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + int ret, i; + uint32_t uv = 0; + unsigned int en; + struct regmap *regmap = cfg->regmap; + static const char * const props[] = { "rohm,dvs-run-voltage", + "rohm,dvs-idle-voltage", + "rohm,dvs-suspend-voltage", + "rohm,dvs-lpsr-voltage" }; + unsigned int mask[] = { BD71828_MASK_RUN_EN, BD71828_MASK_IDLE_EN, + BD71828_MASK_SUSP_EN, BD71828_MASK_LPSR_EN }; + + for (i = 0; i < ARRAY_SIZE(props); i++) { + ret = of_property_read_u32(np, props[i], &uv); + if (ret) { + if (ret != -EINVAL) + return ret; + continue; + } + if (uv) + en = 0xffffffff; + else + en = 0; + + ret = regmap_update_bits(regmap, desc->enable_reg, mask[i], en); + if (ret) + return ret; + } + return 0; +} + +static const struct regulator_ops bd71828_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd71828_dvs_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd71828_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd71828_ldo6_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops bd72720_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd72720_buck10_ldon_head_op = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct bd71828_regulator_data bd71828_rdata[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK1, + .ops = &bd71828_dvs_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck1267_volts), + .n_voltages = BD71828_BUCK1267_VOLTS, + .enable_reg = BD71828_REG_BUCK1_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK1_VOLT, + .vsel_mask = BD71828_MASK_BUCK1267_VOLT, + .ramp_delay_table = bd71828_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd71828_ramp_delay), + .ramp_reg = BD71828_REG_BUCK1_MODE, + .ramp_mask = BD71828_MASK_RAMP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK1_VOLT, + .run_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_reg = BD71828_REG_BUCK1_IDLE_VOLT, + .idle_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_reg = BD71828_REG_BUCK1_SUSP_VOLT, + .suspend_mask = BD71828_MASK_BUCK1267_VOLT, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + /* + * LPSR voltage is same as SUSPEND voltage. Allow + * only enabling/disabling regulator for LPSR state + */ + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + .reg_inits = bd71828_buck1_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck1_inits), + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK2, + .ops = &bd71828_dvs_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck1267_volts), + .n_voltages = BD71828_BUCK1267_VOLTS, + .enable_reg = BD71828_REG_BUCK2_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK2_VOLT, + .vsel_mask = BD71828_MASK_BUCK1267_VOLT, + .ramp_delay_table = bd71828_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd71828_ramp_delay), + .ramp_reg = BD71828_REG_BUCK2_MODE, + .ramp_mask = BD71828_MASK_RAMP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK2_VOLT, + .run_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_reg = BD71828_REG_BUCK2_IDLE_VOLT, + .idle_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_reg = BD71828_REG_BUCK2_SUSP_VOLT, + .suspend_mask = BD71828_MASK_BUCK1267_VOLT, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + .lpsr_reg = BD71828_REG_BUCK2_SUSP_VOLT, + .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, + }, + .reg_inits = bd71828_buck2_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck2_inits), + }, + { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("BUCK3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK3, + .ops = &bd71828_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck3_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck3_volts), + .n_voltages = BD71828_BUCK3_VOLTS, + .enable_reg = BD71828_REG_BUCK3_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK3_VOLT, + .vsel_mask = BD71828_MASK_BUCK3_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * BUCK3 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK3_VOLT, + .run_mask = BD71828_MASK_BUCK3_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, + { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK4, + .ops = &bd71828_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck4_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck4_volts), + .n_voltages = BD71828_BUCK4_VOLTS, + .enable_reg = BD71828_REG_BUCK4_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK4_VOLT, + .vsel_mask = BD71828_MASK_BUCK4_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * BUCK4 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK4_VOLT, + .run_mask = BD71828_MASK_BUCK4_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, + { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK5, + .ops = &bd71828_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck5_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck5_volts), + .n_voltages = BD71828_BUCK5_VOLTS, + .enable_reg = BD71828_REG_BUCK5_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK5_VOLT, + .vsel_mask = BD71828_MASK_BUCK5_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * BUCK5 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK5_VOLT, + .run_mask = BD71828_MASK_BUCK5_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, + { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK6, + .ops = &bd71828_dvs_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck1267_volts), + .n_voltages = BD71828_BUCK1267_VOLTS, + .enable_reg = BD71828_REG_BUCK6_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK6_VOLT, + .vsel_mask = BD71828_MASK_BUCK1267_VOLT, + .ramp_delay_table = bd71828_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd71828_ramp_delay), + .ramp_reg = BD71828_REG_BUCK6_MODE, + .ramp_mask = BD71828_MASK_RAMP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK6_VOLT, + .run_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_reg = BD71828_REG_BUCK6_IDLE_VOLT, + .idle_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_reg = BD71828_REG_BUCK6_SUSP_VOLT, + .suspend_mask = BD71828_MASK_BUCK1267_VOLT, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + .lpsr_reg = BD71828_REG_BUCK6_SUSP_VOLT, + .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, + }, + .reg_inits = bd71828_buck6_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck6_inits), + }, + { + .desc = { + .name = "buck7", + .of_match = of_match_ptr("BUCK7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_BUCK7, + .ops = &bd71828_dvs_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_buck1267_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_buck1267_volts), + .n_voltages = BD71828_BUCK1267_VOLTS, + .enable_reg = BD71828_REG_BUCK7_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_BUCK7_VOLT, + .vsel_mask = BD71828_MASK_BUCK1267_VOLT, + .ramp_delay_table = bd71828_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd71828_ramp_delay), + .ramp_reg = BD71828_REG_BUCK7_MODE, + .ramp_mask = BD71828_MASK_RAMP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_BUCK7_VOLT, + .run_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_reg = BD71828_REG_BUCK7_IDLE_VOLT, + .idle_mask = BD71828_MASK_BUCK1267_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_reg = BD71828_REG_BUCK7_SUSP_VOLT, + .suspend_mask = BD71828_MASK_BUCK1267_VOLT, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + .lpsr_reg = BD71828_REG_BUCK7_SUSP_VOLT, + .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, + }, + .reg_inits = bd71828_buck7_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck7_inits), + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO1, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO1_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO1_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * LDO1 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO1_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO2, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO2_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO2_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * LDO2 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO2_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO3, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO3_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO3_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * LDO3 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO3_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + + }, { + .desc = { + .name = "ldo4", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO4, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO4_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO4_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * LDO1 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO4_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO5, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO5_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO5_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .of_parse_cb = buck_set_hw_dvs_levels, + .owner = THIS_MODULE, + }, + /* + * LDO5 is special. It can choose vsel settings to be configured + * from 2 different registers (by GPIO). + * + * This driver supports only configuration where + * BD71828_REG_LDO5_VOLT_L is used. + */ + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO5_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("LDO6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO6, + .ops = &bd71828_ldo6_ops, + .type = REGULATOR_VOLTAGE, + .fixed_uV = BD71828_LDO_6_VOLTAGE, + .n_voltages = 1, + .enable_reg = BD71828_REG_LDO6_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .owner = THIS_MODULE, + /* + * LDO6 only supports enable/disable for all states. + * Voltage for LDO6 is fixed. + */ + .of_parse_cb = bd71828_ldo6_parse_dt, + }, + }, { + .desc = { + /* SNVS LDO in data-sheet */ + .name = "ldo7", + .of_match = of_match_ptr("LDO7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD71828_LDO_SNVS, + .ops = &bd71828_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd71828_ldo_volts, + .n_linear_ranges = ARRAY_SIZE(bd71828_ldo_volts), + .n_voltages = BD71828_LDO_VOLTS, + .enable_reg = BD71828_REG_LDO7_EN, + .enable_mask = BD71828_MASK_RUN_EN, + .vsel_reg = BD71828_REG_LDO7_VOLT, + .vsel_mask = BD71828_MASK_LDO_VOLT, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + /* + * LDO7 only supports single voltage for all states. + * voltage can be individually enabled for each state + * though => allow setting all states to support + * enabling power rail on different states. + */ + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD71828_REG_LDO7_VOLT, + .idle_reg = BD71828_REG_LDO7_VOLT, + .suspend_reg = BD71828_REG_LDO7_VOLT, + .lpsr_reg = BD71828_REG_LDO7_VOLT, + .run_mask = BD71828_MASK_LDO_VOLT, + .idle_on_mask = BD71828_MASK_IDLE_EN, + .suspend_on_mask = BD71828_MASK_SUSP_EN, + .lpsr_on_mask = BD71828_MASK_LPSR_EN, + }, + + }, +}; + +#define BD72720_BUCK10_DESC_INDEX 9 +#define BD72720_NUM_BUCK_VOLTS 0x100 +#define BD72720_NUM_LDO_VOLTS 0x100 +#define BD72720_NUM_LDO12346_VOLTS 0x80 + +static const struct bd71828_regulator_data bd72720_rdata[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK1, + .type = REGULATOR_VOLTAGE, + + /* + * The BD72720 BUCK1 and LDO1 support GPIO toggled + * sub-RUN states called RUN0, RUN1, RUN2 and RUN3. + * The "operating mode" (sub-RUN states or normal) + * can be changed by a register. + * + * When the sub-RUN states are used, the voltage and + * enable state depend on a state specific + * configuration. The voltage and enable configuration + * for BUCK1 and LDO1 can be defined for each sub-RUN + * state using BD72720_REG_[BUCK,LDO]1_VSEL_R[0,1,2,3] + * voltage selection registers and the bits + * BD72720_MASK_RUN_[0,1,2,3]_EN in the enable registers. + * The PMIC will change both the BUCK1 and LDO1 voltages + * to the states defined in these registers when + * "DVS GPIOs" are toggled. + * + * If RUN 0 .. RUN 4 states are to be used, the normal + * voltage configuration mechanisms do not apply + * and we should overwrite the ops and ignore the + * voltage setting/getting registers which are setup + * here. This is not supported for now. If you need + * this functionality, you may try merging functionality + * from a downstream driver: + * https://rohmsemiconductor.github.io/Linux-Kernel-PMIC-Drivers/BD72720/ + */ + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK1_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK1_VSEL_RB, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK1_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, /* Deep idle in data-sheet */ + .run_reg = BD72720_REG_BUCK1_VSEL_RB, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK1_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK1_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK1_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + .reg_inits = bd72720_buck1_inits, + .reg_init_amnt = ARRAY_SIZE(bd72720_buck1_inits), + }, { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK2, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK2_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK2_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK2_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK2_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK2_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK2_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK2_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK3, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK3_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK3_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK3_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK3_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK3_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK3_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK3_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK4, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK4_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK4_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK4_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK4_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK4_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK4_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK4_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("buck5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK5, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK5_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK5_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK5_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK5_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("buck6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK6, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck67_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck67_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK6_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK6_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK6_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK6_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck7", + .of_match = of_match_ptr("buck7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK7, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck67_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck67_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK7_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK7_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK7_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK7_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck8", + .of_match = of_match_ptr("buck8"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK8, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK8_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK8_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK8_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK8_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck9", + .of_match = of_match_ptr("buck9"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK9, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK9_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK9_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK9_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK9_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck10", + .of_match = of_match_ptr("buck10"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK10, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck10_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck10_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK10_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK10_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK10_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK10_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO1, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO1_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO1_VSEL_RB, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO1_MODE1, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO1_VSEL_RB, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO1_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO1_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_LDO1_VSEL_DI, + .lpsr_mask = BD72720_MASK_LDO12346_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + .reg_inits = bd72720_ldo1_inits, + .reg_init_amnt = ARRAY_SIZE(bd72720_ldo1_inits), + }, { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO2, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO2_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO2_VSEL_R, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO2_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO2_VSEL_R, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO2_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO2_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_LDO2_VSEL_DI, + .lpsr_mask = BD72720_MASK_LDO12346_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("ldo3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO3, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO3_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO3_VSEL_R, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO3_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO3_VSEL_R, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO3_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO3_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_LDO3_VSEL_DI, + .lpsr_mask = BD72720_MASK_LDO12346_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo4", + .of_match = of_match_ptr("ldo4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO4, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO4_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO4_VSEL_R, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO4_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO4_VSEL_R, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO4_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO4_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_LDO4_VSEL_DI, + .lpsr_mask = BD72720_MASK_LDO12346_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO5, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO5_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO5_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO5_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO5_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("ldo6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO6, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo6_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo6_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO6_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO6_VSEL, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO6_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO6_VSEL, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo7", + .of_match = of_match_ptr("ldo7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO7, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO7_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO7_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO7_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO7_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo8", + .of_match = of_match_ptr("ldo8"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO8, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO8_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO8_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO8_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO8_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo9", + .of_match = of_match_ptr("ldo9"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO9, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO9_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO9_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO9_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO9_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo10", + .of_match = of_match_ptr("ldo10"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO10, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO10_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO10_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO10_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO10_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo11", + .of_match = of_match_ptr("ldo11"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO11, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo57891011_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo57891011_volts), + .n_voltages = BD72720_NUM_LDO_VOLTS, + .enable_reg = BD72720_REG_LDO11_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO11_VSEL, + .vsel_mask = BD72720_MASK_LDO_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO11_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO11_VSEL, + .run_mask = BD72720_MASK_LDO_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, +}; + +static int bd72720_buck10_ldon_head_mode(struct device *dev, + struct device_node *npreg, + struct regmap *regmap, + struct regulator_desc *buck10_desc) +{ + struct device_node *np __free(device_node) = + of_get_child_by_name(npreg, "buck10"); + uint32_t ldon_head; + int ldon_val; + int ret; + + if (!np) { + dev_err(dev, "failed to find buck10 regulator node\n"); + return -ENODEV; + } + + ret = of_property_read_u32(np, "rohm,ldon-head-microvolt", &ldon_head); + if (ret == -EINVAL) + return 0; + if (ret) + return ret; + + /* + * LDON_HEAD mode means the BUCK10 is used to supply LDOs 1-4 and + * the BUCK 10 voltage is automatically set to follow LDO 1-4 + * settings. Thus the BUCK10 should not allow voltage [g/s]etting. + */ + buck10_desc->ops = &bd72720_buck10_ldon_head_op; + + ldon_val = ldon_head / 50000 + 1; + if (ldon_head > 300000) { + dev_warn(dev, "Unsupported LDON_HEAD, clamping to 300 mV\n"); + ldon_val = 7; + } + + return regmap_update_bits(regmap, BD72720_REG_LDO1_MODE2, + BD72720_MASK_LDON_HEAD, ldon_val); +} + +static int bd72720_dt_parse(struct device *dev, + struct regulator_desc *buck10_desc, + struct regmap *regmap) +{ + struct device_node *nproot __free(device_node) = + of_get_child_by_name(dev->parent->of_node, "regulators"); + + if (!nproot) { + dev_err(dev, "failed to find regulators node\n"); + return -ENODEV; + } + + return bd72720_buck10_ldon_head_mode(dev, nproot, regmap, buck10_desc); +} + +static int bd71828_probe(struct platform_device *pdev) +{ + int i, j, ret, num_regulators; + struct regulator_config config = { + .dev = pdev->dev.parent, + }; + enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; + struct bd71828_regulator_data *rdata; + + config.regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!config.regmap) + return -ENODEV; + + switch (chip) { + case ROHM_CHIP_TYPE_BD72720: + rdata = devm_kmemdup(&pdev->dev, bd72720_rdata, + sizeof(bd72720_rdata), GFP_KERNEL); + if (!rdata) + return -ENOMEM; + + ret = bd72720_dt_parse(&pdev->dev, &rdata[BD72720_BUCK10_DESC_INDEX].desc, + config.regmap); + if (ret) + return ret; + + num_regulators = ARRAY_SIZE(bd72720_rdata); + break; + + case ROHM_CHIP_TYPE_BD71828: + rdata = devm_kmemdup(&pdev->dev, bd71828_rdata, + sizeof(bd71828_rdata), GFP_KERNEL); + if (!rdata) + return -ENOMEM; + + num_regulators = ARRAY_SIZE(bd71828_rdata); + + break; + default: + return dev_err_probe(&pdev->dev, -EINVAL, + "Unsupported device\n"); + } + + for (i = 0; i < num_regulators; i++) { + struct regulator_dev *rdev; + struct bd71828_regulator_data *rd; + + rd = &rdata[i]; + + config.driver_data = rd; + rdev = devm_regulator_register(&pdev->dev, + &rd->desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + rd->desc.name); + + for (j = 0; j < rd->reg_init_amnt; j++) { + ret = regmap_update_bits(config.regmap, + rd->reg_inits[j].reg, + rd->reg_inits[j].mask, + rd->reg_inits[j].val); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "regulator %s init failed\n", + rd->desc.name); + } + } + return 0; +} + +static const struct platform_device_id bd71828_pmic_id[] = { + { .name = "bd71828-pmic", .driver_data = ROHM_CHIP_TYPE_BD71828 }, + { .name = "bd72720-pmic", .driver_data = ROHM_CHIP_TYPE_BD72720 }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd71828_pmic_id); + +static struct platform_driver bd71828_regulator = { + .driver = { + .name = "bd71828-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = bd71828_probe, + .id_table = bd71828_pmic_id, +}; + +module_platform_driver(bd71828_regulator); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD71828 voltage regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/bd718x7-regulator.c b/drivers/regulator/bd718x7-regulator.c new file mode 100644 index 000000000..9cc29b940 --- /dev/null +++ b/drivers/regulator/bd718x7-regulator.c @@ -0,0 +1,1839 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 ROHM Semiconductors +// bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Typical regulator startup times as per data sheet in uS */ +#define BD71847_BUCK1_STARTUP_TIME 144 +#define BD71847_BUCK2_STARTUP_TIME 162 +#define BD71847_BUCK3_STARTUP_TIME 162 +#define BD71847_BUCK4_STARTUP_TIME 240 +#define BD71847_BUCK5_STARTUP_TIME 270 +#define BD71847_BUCK6_STARTUP_TIME 200 +#define BD71847_LDO1_STARTUP_TIME 440 +#define BD71847_LDO2_STARTUP_TIME 370 +#define BD71847_LDO3_STARTUP_TIME 310 +#define BD71847_LDO4_STARTUP_TIME 400 +#define BD71847_LDO5_STARTUP_TIME 530 +#define BD71847_LDO6_STARTUP_TIME 400 + +#define BD71837_BUCK1_STARTUP_TIME 160 +#define BD71837_BUCK2_STARTUP_TIME 180 +#define BD71837_BUCK3_STARTUP_TIME 180 +#define BD71837_BUCK4_STARTUP_TIME 180 +#define BD71837_BUCK5_STARTUP_TIME 160 +#define BD71837_BUCK6_STARTUP_TIME 240 +#define BD71837_BUCK7_STARTUP_TIME 220 +#define BD71837_BUCK8_STARTUP_TIME 200 +#define BD71837_LDO1_STARTUP_TIME 440 +#define BD71837_LDO2_STARTUP_TIME 370 +#define BD71837_LDO3_STARTUP_TIME 310 +#define BD71837_LDO4_STARTUP_TIME 400 +#define BD71837_LDO5_STARTUP_TIME 310 +#define BD71837_LDO6_STARTUP_TIME 400 +#define BD71837_LDO7_STARTUP_TIME 530 + +/* + * BD718(37/47/50) have two "enable control modes". ON/OFF can either be + * controlled by software - or by PMIC internal HW state machine. Whether + * regulator should be under SW or HW control can be defined from device-tree. + * Let's provide separate ops for regulators to use depending on the "enable + * control mode". + */ +#define BD718XX_HWOPNAME(swopname) swopname##_hwcontrol + +#define BD718XX_OPS(name, _list_voltage, _map_voltage, _set_voltage_sel, \ + _get_voltage_sel, _set_voltage_time_sel, _set_ramp_delay, \ + _set_uvp, _set_ovp) \ +static const struct regulator_ops name = { \ + .enable = regulator_enable_regmap, \ + .disable = regulator_disable_regmap, \ + .is_enabled = regulator_is_enabled_regmap, \ + .list_voltage = (_list_voltage), \ + .map_voltage = (_map_voltage), \ + .set_voltage_sel = (_set_voltage_sel), \ + .get_voltage_sel = (_get_voltage_sel), \ + .set_voltage_time_sel = (_set_voltage_time_sel), \ + .set_ramp_delay = (_set_ramp_delay), \ + .set_under_voltage_protection = (_set_uvp), \ + .set_over_voltage_protection = (_set_ovp), \ +}; \ + \ +static const struct regulator_ops BD718XX_HWOPNAME(name) = { \ + .is_enabled = always_enabled_by_hwstate, \ + .list_voltage = (_list_voltage), \ + .map_voltage = (_map_voltage), \ + .set_voltage_sel = (_set_voltage_sel), \ + .get_voltage_sel = (_get_voltage_sel), \ + .set_voltage_time_sel = (_set_voltage_time_sel), \ + .set_ramp_delay = (_set_ramp_delay), \ + .set_under_voltage_protection = (_set_uvp), \ + .set_over_voltage_protection = (_set_ovp), \ +} \ + +/* + * BUCK1/2/3/4 + * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting + * 00: 10.00mV/usec 10mV 1uS + * 01: 5.00mV/usec 10mV 2uS + * 10: 2.50mV/usec 10mV 4uS + * 11: 1.25mV/usec 10mV 8uS + */ +static const unsigned int bd718xx_ramp_delay[] = { 10000, 5000, 2500, 1250 }; + +/* These functions are used when regulators are under HW state machine control. + * We assume PMIC is in RUN state because SW running and able to query the + * status. Most of the regulators have fixed ON or OFF state at RUN/IDLE so for + * them we just return a constant. BD71837 BUCK3 and BUCK4 are exceptions as + * they support configuring the ON/OFF state for RUN. + * + * Note for next hacker - these PMICs have a register where the HW state can be + * read. If assuming RUN appears to be false in your use-case - you can + * implement state reading (although that is not going to be atomic) before + * returning the enable state. + */ +static int always_enabled_by_hwstate(struct regulator_dev *rdev) +{ + return 1; +} + +static int never_enabled_by_hwstate(struct regulator_dev *rdev) +{ + return 0; +} + +static int bd71837_get_buck34_enable_hwctrl(struct regulator_dev *rdev) +{ + int ret; + unsigned int val; + + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); + if (ret) + return ret; + + return !!(BD718XX_BUCK_RUN_ON & val); +} + +static void voltage_change_done(struct regulator_dev *rdev, unsigned int sel, + unsigned int *mask) +{ + int ret; + + if (*mask) { + /* + * We had fault detection disabled for the duration of the + * voltage change. + * + * According to HW colleagues the maximum time it takes is + * 1000us. I assume that on systems with light load this + * might be less - and we could probably use DT to give + * system specific delay value if performance matters. + * + * Well, knowing we use I2C here and can add scheduling delays + * I don't think it is worth the hassle and I just add fixed + * 1ms sleep here (and allow scheduling). If this turns out to + * be a problem we can change it to delay and make the delay + * time configurable. + */ + msleep(1); + + ret = regmap_clear_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2, + *mask); + if (ret) + dev_err(&rdev->dev, + "Failed to re-enable voltage monitoring (%d)\n", + ret); + } +} + +static int voltage_change_prepare(struct regulator_dev *rdev, unsigned int sel, + unsigned int *mask) +{ + int ret; + + *mask = 0; + if (rdev->desc->ops->is_enabled(rdev)) { + int now, new; + + now = rdev->desc->ops->get_voltage_sel(rdev); + if (now < 0) + return now; + + now = rdev->desc->ops->list_voltage(rdev, now); + if (now < 0) + return now; + + new = rdev->desc->ops->list_voltage(rdev, sel); + if (new < 0) + return new; + + /* + * If we increase LDO voltage when LDO is enabled we need to + * disable the power-good detection until voltage has reached + * the new level. + */ + if (new > now) { + int tmp; + int prot_bit; + int ldo_offset = rdev->desc->id - BD718XX_LDO1; + + prot_bit = BD718XX_LDO1_VRMON80 << ldo_offset; + ret = regmap_read(rdev->regmap, BD718XX_REG_MVRFLTMASK2, + &tmp); + if (ret) { + dev_err(&rdev->dev, + "Failed to read voltage monitoring state\n"); + return ret; + } + + if (!(tmp & prot_bit)) { + /* We disable protection if it was enabled... */ + ret = regmap_set_bits(rdev->regmap, + BD718XX_REG_MVRFLTMASK2, + prot_bit); + /* ...and we also want to re-enable it */ + *mask = prot_bit; + } + if (ret) { + dev_err(&rdev->dev, + "Failed to stop voltage monitoring\n"); + return ret; + } + } + } + + return 0; +} + +static int bd718xx_set_voltage_sel_restricted(struct regulator_dev *rdev, + unsigned int sel) +{ + int ret; + int mask; + + ret = voltage_change_prepare(rdev, sel, &mask); + if (ret) + return ret; + + ret = regulator_set_voltage_sel_regmap(rdev, sel); + voltage_change_done(rdev, sel, &mask); + + return ret; +} + +static int bd718xx_set_voltage_sel_pickable_restricted( + struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + int mask; + + ret = voltage_change_prepare(rdev, sel, &mask); + if (ret) + return ret; + + ret = regulator_set_voltage_sel_pickable_regmap(rdev, sel); + voltage_change_done(rdev, sel, &mask); + + return ret; +} + +static int bd71837_set_voltage_sel_pickable_restricted( + struct regulator_dev *rdev, unsigned int sel) +{ + if (rdev->desc->ops->is_enabled(rdev)) + return -EBUSY; + + return regulator_set_voltage_sel_pickable_regmap(rdev, sel); +} + +/* + * BD71837 BUCK1/2/3/4 + * BD71847 BUCK1/2 + * 0.70 to 1.30V (10mV step) + */ +static const struct linear_range bd718xx_dvs_buck_volts[] = { + REGULATOR_LINEAR_RANGE(700000, 0x00, 0x3C, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0x3D, 0x3F, 0), +}; + +/* + * BD71837 BUCK5 + * 0.7V to 1.35V (range 0) + * and + * 0.675 to 1.325 (range 1) + */ +static const struct linear_range bd71837_buck5_volts[] = { + /* Ranges when VOLT_SEL bit is 0 */ + REGULATOR_LINEAR_RANGE(700000, 0x00, 0x03, 100000), + REGULATOR_LINEAR_RANGE(1050000, 0x04, 0x05, 50000), + REGULATOR_LINEAR_RANGE(1200000, 0x06, 0x07, 150000), + /* Ranges when VOLT_SEL bit is 1 */ + REGULATOR_LINEAR_RANGE(675000, 0x0, 0x3, 100000), + REGULATOR_LINEAR_RANGE(1025000, 0x4, 0x5, 50000), + REGULATOR_LINEAR_RANGE(1175000, 0x6, 0x7, 150000), +}; + +/* + * Range selector for first 3 linear ranges is 0x0 + * and 0x1 for last 3 ranges. + */ +static const unsigned int bd71837_buck5_volt_range_sel[] = { + 0x0, 0x0, 0x0, 0x1, 0x1, 0x1 +}; + +/* + * BD71847 BUCK3 + */ +static const struct linear_range bd71847_buck3_volts[] = { + /* Ranges when VOLT_SEL bits are 00 */ + REGULATOR_LINEAR_RANGE(700000, 0x00, 0x03, 100000), + REGULATOR_LINEAR_RANGE(1050000, 0x04, 0x05, 50000), + REGULATOR_LINEAR_RANGE(1200000, 0x06, 0x07, 150000), + /* Ranges when VOLT_SEL bits are 01 */ + REGULATOR_LINEAR_RANGE(550000, 0x0, 0x7, 50000), + /* Ranges when VOLT_SEL bits are 11 */ + REGULATOR_LINEAR_RANGE(675000, 0x0, 0x3, 100000), + REGULATOR_LINEAR_RANGE(1025000, 0x4, 0x5, 50000), + REGULATOR_LINEAR_RANGE(1175000, 0x6, 0x7, 150000), +}; + +static const unsigned int bd71847_buck3_volt_range_sel[] = { + 0x0, 0x0, 0x0, 0x1, 0x2, 0x2, 0x2 +}; + +static const struct linear_range bd71847_buck4_volts[] = { + REGULATOR_LINEAR_RANGE(3000000, 0x00, 0x03, 100000), + REGULATOR_LINEAR_RANGE(2600000, 0x00, 0x03, 100000), +}; + +static const unsigned int bd71847_buck4_volt_range_sel[] = { 0x0, 0x1 }; + +/* + * BUCK6 + * 3.0V to 3.3V (step 100mV) + */ +static const struct linear_range bd71837_buck6_volts[] = { + REGULATOR_LINEAR_RANGE(3000000, 0x00, 0x03, 100000), +}; + +/* + * BD71837 BUCK7 + * BD71847 BUCK5 + * 000 = 1.605V + * 001 = 1.695V + * 010 = 1.755V + * 011 = 1.8V (Initial) + * 100 = 1.845V + * 101 = 1.905V + * 110 = 1.95V + * 111 = 1.995V + */ +static const unsigned int bd718xx_3rd_nodvs_buck_volts[] = { + 1605000, 1695000, 1755000, 1800000, 1845000, 1905000, 1950000, 1995000 +}; + +/* + * BUCK8 + * 0.8V to 1.40V (step 10mV) + */ +static const struct linear_range bd718xx_4th_nodvs_buck_volts[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x3C, 10000), +}; + +/* + * LDO1 + * 3.0 to 3.3V (100mV step) + */ +static const struct linear_range bd718xx_ldo1_volts[] = { + REGULATOR_LINEAR_RANGE(3000000, 0x00, 0x03, 100000), + REGULATOR_LINEAR_RANGE(1600000, 0x00, 0x03, 100000), +}; + +static const unsigned int bd718xx_ldo1_volt_range_sel[] = { 0x0, 0x1 }; + +/* + * LDO2 + * 0.8 or 0.9V + */ +static const unsigned int ldo_2_volts[] = { + 900000, 800000 +}; + +/* + * LDO3 + * 1.8 to 3.3V (100mV step) + */ +static const struct linear_range bd718xx_ldo3_volts[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), +}; + +/* + * LDO4 + * 0.9 to 1.8V (100mV step) + */ +static const struct linear_range bd718xx_ldo4_volts[] = { + REGULATOR_LINEAR_RANGE(900000, 0x00, 0x09, 100000), +}; + +/* + * LDO5 for BD71837 + * 1.8 to 3.3V (100mV step) + */ +static const struct linear_range bd71837_ldo5_volts[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), +}; + +/* + * LDO5 for BD71837 + * 1.8 to 3.3V (100mV step) + */ +static const struct linear_range bd71847_ldo5_volts[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x0F, 100000), +}; + +static const unsigned int bd71847_ldo5_volt_range_sel[] = { 0x0, 0x1 }; + +/* + * LDO6 + * 0.9 to 1.8V (100mV step) + */ +static const struct linear_range bd718xx_ldo6_volts[] = { + REGULATOR_LINEAR_RANGE(900000, 0x00, 0x09, 100000), +}; + +/* + * LDO7 + * 1.8 to 3.3V (100mV step) + */ +static const struct linear_range bd71837_ldo7_volts[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), +}; + +struct reg_init { + unsigned int reg; + unsigned int mask; + unsigned int val; +}; +struct bd718xx_regulator_data { + struct regulator_desc desc; + const struct rohm_dvs_config dvs; + const struct reg_init init; + const struct reg_init *additional_inits; + int additional_init_amnt; +}; + +static int bd718x7_xvp_sanity_check(struct regulator_dev *rdev, int lim_uV, + int severity) +{ + /* + * BD71837/47/50 ... (ICs supported by this driver) do not provide + * warnings, only protection + */ + if (severity != REGULATOR_SEVERITY_PROT) { + dev_err(&rdev->dev, + "Unsupported Under Voltage protection level\n"); + return -EINVAL; + } + + /* + * And protection limit is not changeable. It can only be enabled + * or disabled + */ + if (lim_uV) + return -EINVAL; + + return 0; +} + +static int bd718x7_set_ldo_uvp(struct regulator_dev *rdev, int lim_uV, + int severity, bool enable) +{ + int ldo_offset = rdev->desc->id - BD718XX_LDO1; + int prot_bit, ret; + + ret = bd718x7_xvp_sanity_check(rdev, lim_uV, severity); + if (ret) + return ret; + + prot_bit = BD718XX_LDO1_VRMON80 << ldo_offset; + + if (enable) + return regmap_clear_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2, + prot_bit); + + return regmap_set_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2, + prot_bit); +} + +static int bd718x7_get_buck_prot_reg(int id, int *reg) +{ + + if (id > BD718XX_BUCK8) { + WARN_ON(id > BD718XX_BUCK8); + return -EINVAL; + } + + if (id > BD718XX_BUCK4) + *reg = BD718XX_REG_MVRFLTMASK0; + else + *reg = BD718XX_REG_MVRFLTMASK1; + + return 0; +} + +static int bd718x7_get_buck_ovp_info(int id, int *reg, int *bit) +{ + int ret; + + ret = bd718x7_get_buck_prot_reg(id, reg); + if (ret) + return ret; + + *bit = BIT((id % 4) * 2 + 1); + + return 0; +} + +static int bd718x7_get_buck_uvp_info(int id, int *reg, int *bit) +{ + int ret; + + ret = bd718x7_get_buck_prot_reg(id, reg); + if (ret) + return ret; + + *bit = BIT((id % 4) * 2); + + return 0; +} + +static int bd718x7_set_buck_uvp(struct regulator_dev *rdev, int lim_uV, + int severity, bool enable) +{ + int bit, reg, ret; + + ret = bd718x7_xvp_sanity_check(rdev, lim_uV, severity); + if (ret) + return ret; + + ret = bd718x7_get_buck_uvp_info(rdev->desc->id, ®, &bit); + if (ret) + return ret; + + if (enable) + return regmap_clear_bits(rdev->regmap, reg, bit); + + return regmap_set_bits(rdev->regmap, reg, bit); + +} + +static int bd718x7_set_buck_ovp(struct regulator_dev *rdev, int lim_uV, + int severity, + bool enable) +{ + int bit, reg, ret; + + ret = bd718x7_xvp_sanity_check(rdev, lim_uV, severity); + if (ret) + return ret; + + ret = bd718x7_get_buck_ovp_info(rdev->desc->id, ®, &bit); + if (ret) + return ret; + + if (enable) + return regmap_clear_bits(rdev->regmap, reg, bit); + + return regmap_set_bits(rdev->regmap, reg, bit); +} + +/* + * OPS common for BD71847 and BD71850 + */ +BD718XX_OPS(bd718xx_pickable_range_ldo_ops, + regulator_list_voltage_pickable_linear_range, NULL, + bd718xx_set_voltage_sel_pickable_restricted, + regulator_get_voltage_sel_pickable_regmap, NULL, NULL, + bd718x7_set_ldo_uvp, NULL); + +/* BD71847 and BD71850 LDO 5 is by default OFF at RUN state */ +static const struct regulator_ops bd718xx_ldo5_ops_hwstate = { + .is_enabled = never_enabled_by_hwstate, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .set_voltage_sel = bd718xx_set_voltage_sel_pickable_restricted, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_under_voltage_protection = bd718x7_set_ldo_uvp, +}; + +BD718XX_OPS(bd718xx_pickable_range_buck_ops, + regulator_list_voltage_pickable_linear_range, NULL, + regulator_set_voltage_sel_pickable_regmap, + regulator_get_voltage_sel_pickable_regmap, + regulator_set_voltage_time_sel, NULL, bd718x7_set_buck_uvp, + bd718x7_set_buck_ovp); + +BD718XX_OPS(bd718xx_ldo_regulator_ops, regulator_list_voltage_linear_range, + NULL, bd718xx_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, NULL, NULL, bd718x7_set_ldo_uvp, + NULL); + +BD718XX_OPS(bd718xx_ldo_regulator_nolinear_ops, regulator_list_voltage_table, + NULL, bd718xx_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, NULL, NULL, bd718x7_set_ldo_uvp, + NULL); + +BD718XX_OPS(bd718xx_buck_regulator_ops, regulator_list_voltage_linear_range, + NULL, regulator_set_voltage_sel_regmap, + regulator_get_voltage_sel_regmap, regulator_set_voltage_time_sel, + NULL, bd718x7_set_buck_uvp, bd718x7_set_buck_ovp); + +BD718XX_OPS(bd718xx_buck_regulator_nolinear_ops, regulator_list_voltage_table, + regulator_map_voltage_ascend, regulator_set_voltage_sel_regmap, + regulator_get_voltage_sel_regmap, regulator_set_voltage_time_sel, + NULL, bd718x7_set_buck_uvp, bd718x7_set_buck_ovp); + +/* + * OPS for BD71837 + */ +BD718XX_OPS(bd71837_pickable_range_ldo_ops, + regulator_list_voltage_pickable_linear_range, NULL, + bd71837_set_voltage_sel_pickable_restricted, + regulator_get_voltage_sel_pickable_regmap, NULL, NULL, + bd718x7_set_ldo_uvp, NULL); + +BD718XX_OPS(bd71837_pickable_range_buck_ops, + regulator_list_voltage_pickable_linear_range, NULL, + bd71837_set_voltage_sel_pickable_restricted, + regulator_get_voltage_sel_pickable_regmap, + regulator_set_voltage_time_sel, NULL, bd718x7_set_buck_uvp, + bd718x7_set_buck_ovp); + +BD718XX_OPS(bd71837_ldo_regulator_ops, regulator_list_voltage_linear_range, + NULL, rohm_regulator_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, NULL, NULL, bd718x7_set_ldo_uvp, + NULL); + +BD718XX_OPS(bd71837_ldo_regulator_nolinear_ops, regulator_list_voltage_table, + NULL, rohm_regulator_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, NULL, NULL, bd718x7_set_ldo_uvp, + NULL); + +BD718XX_OPS(bd71837_buck_regulator_ops, regulator_list_voltage_linear_range, + NULL, rohm_regulator_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, regulator_set_voltage_time_sel, + NULL, bd718x7_set_buck_uvp, bd718x7_set_buck_ovp); + +BD718XX_OPS(bd71837_buck_regulator_nolinear_ops, regulator_list_voltage_table, + regulator_map_voltage_ascend, rohm_regulator_set_voltage_sel_restricted, + regulator_get_voltage_sel_regmap, regulator_set_voltage_time_sel, + NULL, bd718x7_set_buck_uvp, bd718x7_set_buck_ovp); +/* + * BD71837 bucks 3 and 4 support defining their enable/disable state also + * when buck enable state is under HW state machine control. In that case the + * bit [2] in CTRL register is used to indicate if regulator should be ON. + */ +static const struct regulator_ops bd71837_buck34_ops_hwctrl = { + .is_enabled = bd71837_get_buck34_enable_hwctrl, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_under_voltage_protection = bd718x7_set_buck_uvp, + .set_over_voltage_protection = bd718x7_set_buck_ovp, +}; + +/* + * OPS for all of the ICs - BD718(37/47/50) + */ +BD718XX_OPS(bd718xx_dvs_buck_regulator_ops, regulator_list_voltage_linear_range, + NULL, regulator_set_voltage_sel_regmap, + regulator_get_voltage_sel_regmap, regulator_set_voltage_time_sel, + regulator_set_ramp_delay_regmap, bd718x7_set_buck_uvp, + bd718x7_set_buck_ovp); + + + +/* + * There is a HW quirk in BD71837. The shutdown sequence timings for + * bucks/LDOs which are controlled via register interface are changed. + * At PMIC poweroff the voltage for BUCK6/7 is cut immediately at the + * beginning of shut-down sequence. As bucks 6 and 7 are parent + * supplies for LDO5 and LDO6 - this causes LDO5/6 voltage + * monitoring to errorneously detect under voltage and force PMIC to + * emergency state instead of poweroff. In order to avoid this we + * disable voltage monitoring for LDO5 and LDO6 + */ +static const struct reg_init bd71837_ldo5_inits[] = { + { + .reg = BD718XX_REG_MVRFLTMASK2, + .mask = BD718XX_LDO5_VRMON80, + .val = BD718XX_LDO5_VRMON80, + }, +}; + +static const struct reg_init bd71837_ldo6_inits[] = { + { + .reg = BD718XX_REG_MVRFLTMASK2, + .mask = BD718XX_LDO6_VRMON80, + .val = BD718XX_LDO6_VRMON80, + }, +}; + +static int buck_set_hw_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct bd718xx_regulator_data *data; + + data = container_of_const(desc, struct bd718xx_regulator_data, desc); + + return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); +} + +static const struct regulator_ops *bd71847_swcontrol_ops[] = { + &bd718xx_dvs_buck_regulator_ops, &bd718xx_dvs_buck_regulator_ops, + &bd718xx_pickable_range_buck_ops, &bd718xx_pickable_range_buck_ops, + &bd718xx_buck_regulator_nolinear_ops, &bd718xx_buck_regulator_ops, + &bd718xx_pickable_range_ldo_ops, &bd718xx_ldo_regulator_nolinear_ops, + &bd718xx_ldo_regulator_ops, &bd718xx_ldo_regulator_ops, + &bd718xx_pickable_range_ldo_ops, &bd718xx_ldo_regulator_ops, +}; + +static const struct regulator_ops *bd71847_hwcontrol_ops[] = { + &BD718XX_HWOPNAME(bd718xx_dvs_buck_regulator_ops), + &BD718XX_HWOPNAME(bd718xx_dvs_buck_regulator_ops), + &BD718XX_HWOPNAME(bd718xx_pickable_range_buck_ops), + &BD718XX_HWOPNAME(bd718xx_pickable_range_buck_ops), + &BD718XX_HWOPNAME(bd718xx_buck_regulator_nolinear_ops), + &BD718XX_HWOPNAME(bd718xx_buck_regulator_ops), + &BD718XX_HWOPNAME(bd718xx_pickable_range_ldo_ops), + &BD718XX_HWOPNAME(bd718xx_ldo_regulator_nolinear_ops), + &BD718XX_HWOPNAME(bd718xx_ldo_regulator_ops), + &BD718XX_HWOPNAME(bd718xx_ldo_regulator_ops), + &bd718xx_ldo5_ops_hwstate, + &BD718XX_HWOPNAME(bd718xx_ldo_regulator_ops), +}; + +static struct bd718xx_regulator_data bd71847_regulators[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK1, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = + ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD718XX_REG_BUCK1_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD718XX_REG_BUCK1_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK1_STARTUP_TIME, + .owner = THIS_MODULE, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD718XX_REG_BUCK1_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND, + .run_reg = BD718XX_REG_BUCK1_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + .idle_reg = BD718XX_REG_BUCK1_VOLT_IDLE, + .idle_mask = DVS_BUCK_RUN_MASK, + .suspend_reg = BD718XX_REG_BUCK1_VOLT_SUSP, + .suspend_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD718XX_REG_BUCK1_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK2, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD718XX_REG_BUCK2_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD718XX_REG_BUCK2_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK2_STARTUP_TIME, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD718XX_REG_BUCK2_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE, + .run_reg = BD718XX_REG_BUCK2_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + .idle_reg = BD718XX_REG_BUCK2_VOLT_IDLE, + .idle_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD718XX_REG_BUCK2_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("BUCK3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK3, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71847_BUCK3_VOLTAGE_NUM, + .linear_ranges = bd71847_buck3_volts, + .n_linear_ranges = + ARRAY_SIZE(bd71847_buck3_volts), + .vsel_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, + .vsel_mask = BD718XX_1ST_NODVS_BUCK_MASK, + .vsel_range_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, + .vsel_range_mask = BD71847_BUCK3_RANGE_MASK, + .linear_range_selectors_bitfield = bd71847_buck3_volt_range_sel, + .enable_reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK3_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK4, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71847_BUCK4_VOLTAGE_NUM, + .linear_ranges = bd71847_buck4_volts, + .n_linear_ranges = + ARRAY_SIZE(bd71847_buck4_volts), + .enable_reg = BD718XX_REG_2ND_NODVS_BUCK_CTRL, + .vsel_reg = BD718XX_REG_2ND_NODVS_BUCK_VOLT, + .vsel_mask = BD71847_BUCK4_MASK, + .vsel_range_reg = BD718XX_REG_2ND_NODVS_BUCK_VOLT, + .vsel_range_mask = BD71847_BUCK4_RANGE_MASK, + .linear_range_selectors_bitfield = bd71847_buck4_volt_range_sel, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK4_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_2ND_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK5, + .type = REGULATOR_VOLTAGE, + .volt_table = &bd718xx_3rd_nodvs_buck_volts[0], + .n_voltages = ARRAY_SIZE(bd718xx_3rd_nodvs_buck_volts), + .vsel_reg = BD718XX_REG_3RD_NODVS_BUCK_VOLT, + .vsel_mask = BD718XX_3RD_NODVS_BUCK_MASK, + .enable_reg = BD718XX_REG_3RD_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK5_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_3RD_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK6, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_4TH_NODVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_4th_nodvs_buck_volts, + .n_linear_ranges = + ARRAY_SIZE(bd718xx_4th_nodvs_buck_volts), + .vsel_reg = BD718XX_REG_4TH_NODVS_BUCK_VOLT, + .vsel_mask = BD718XX_4TH_NODVS_BUCK_MASK, + .enable_reg = BD718XX_REG_4TH_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71847_BUCK6_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_4TH_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO1, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO1_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo1_volts), + .vsel_reg = BD718XX_REG_LDO1_VOLT, + .vsel_mask = BD718XX_LDO1_MASK, + .vsel_range_reg = BD718XX_REG_LDO1_VOLT, + .vsel_range_mask = BD718XX_LDO1_RANGE_MASK, + .linear_range_selectors_bitfield = bd718xx_ldo1_volt_range_sel, + .enable_reg = BD718XX_REG_LDO1_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO1_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO1_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO2, + .type = REGULATOR_VOLTAGE, + .volt_table = &ldo_2_volts[0], + .vsel_reg = BD718XX_REG_LDO2_VOLT, + .vsel_mask = BD718XX_LDO2_MASK, + .n_voltages = ARRAY_SIZE(ldo_2_volts), + .enable_reg = BD718XX_REG_LDO2_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO2_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO2_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO3, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO3_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo3_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo3_volts), + .vsel_reg = BD718XX_REG_LDO3_VOLT, + .vsel_mask = BD718XX_LDO3_MASK, + .enable_reg = BD718XX_REG_LDO3_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO3_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO3_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo4", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO4, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO4_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo4_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo4_volts), + .vsel_reg = BD718XX_REG_LDO4_VOLT, + .vsel_mask = BD718XX_LDO4_MASK, + .enable_reg = BD718XX_REG_LDO4_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO4_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO4_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO5, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71847_LDO5_VOLTAGE_NUM, + .linear_ranges = bd71847_ldo5_volts, + .n_linear_ranges = ARRAY_SIZE(bd71847_ldo5_volts), + .vsel_reg = BD718XX_REG_LDO5_VOLT, + .vsel_mask = BD71847_LDO5_MASK, + .vsel_range_reg = BD718XX_REG_LDO5_VOLT, + .vsel_range_mask = BD71847_LDO5_RANGE_MASK, + .linear_range_selectors_bitfield = bd71847_ldo5_volt_range_sel, + .enable_reg = BD718XX_REG_LDO5_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO5_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO5_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("LDO6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO6, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO6_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo6_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo6_volts), + /* LDO6 is supplied by buck5 */ + .supply_name = "buck5", + .vsel_reg = BD718XX_REG_LDO6_VOLT, + .vsel_mask = BD718XX_LDO6_MASK, + .enable_reg = BD718XX_REG_LDO6_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71847_LDO6_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO6_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, +}; + +static const struct regulator_ops *bd71837_swcontrol_ops[] = { + &bd718xx_dvs_buck_regulator_ops, &bd718xx_dvs_buck_regulator_ops, + &bd718xx_dvs_buck_regulator_ops, &bd718xx_dvs_buck_regulator_ops, + &bd71837_pickable_range_buck_ops, &bd71837_buck_regulator_ops, + &bd71837_buck_regulator_nolinear_ops, &bd71837_buck_regulator_ops, + &bd71837_pickable_range_ldo_ops, &bd71837_ldo_regulator_nolinear_ops, + &bd71837_ldo_regulator_ops, &bd71837_ldo_regulator_ops, + &bd71837_ldo_regulator_ops, &bd71837_ldo_regulator_ops, + &bd71837_ldo_regulator_ops, +}; + +static const struct regulator_ops *bd71837_hwcontrol_ops[] = { + &BD718XX_HWOPNAME(bd718xx_dvs_buck_regulator_ops), + &BD718XX_HWOPNAME(bd718xx_dvs_buck_regulator_ops), + &bd71837_buck34_ops_hwctrl, &bd71837_buck34_ops_hwctrl, + &BD718XX_HWOPNAME(bd71837_pickable_range_buck_ops), + &BD718XX_HWOPNAME(bd71837_buck_regulator_ops), + &BD718XX_HWOPNAME(bd71837_buck_regulator_nolinear_ops), + &BD718XX_HWOPNAME(bd71837_buck_regulator_ops), + &BD718XX_HWOPNAME(bd71837_pickable_range_ldo_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_nolinear_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_ops), + &BD718XX_HWOPNAME(bd71837_ldo_regulator_ops), +}; + +static struct bd718xx_regulator_data bd71837_regulators[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK1, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD718XX_REG_BUCK1_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD718XX_REG_BUCK1_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK1_STARTUP_TIME, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD718XX_REG_BUCK1_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND, + .run_reg = BD718XX_REG_BUCK1_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + .idle_reg = BD718XX_REG_BUCK1_VOLT_IDLE, + .idle_mask = DVS_BUCK_RUN_MASK, + .suspend_reg = BD718XX_REG_BUCK1_VOLT_SUSP, + .suspend_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD718XX_REG_BUCK1_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK2, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD718XX_REG_BUCK2_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD718XX_REG_BUCK2_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK2_STARTUP_TIME, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD718XX_REG_BUCK2_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE, + .run_reg = BD718XX_REG_BUCK2_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + .idle_reg = BD718XX_REG_BUCK2_VOLT_IDLE, + .idle_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD718XX_REG_BUCK2_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("BUCK3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK3, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD71837_REG_BUCK3_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD71837_REG_BUCK3_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK3_STARTUP_TIME, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD71837_REG_BUCK3_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN, + .run_reg = BD71837_REG_BUCK3_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD71837_REG_BUCK3_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK4, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_DVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_dvs_buck_volts), + .vsel_reg = BD71837_REG_BUCK4_VOLT_RUN, + .vsel_mask = DVS_BUCK_RUN_MASK, + .enable_reg = BD71837_REG_BUCK4_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK4_STARTUP_TIME, + .ramp_delay_table = bd718xx_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd718xx_ramp_delay), + .ramp_reg = BD71837_REG_BUCK4_CTRL, + .ramp_mask = BUCK_RAMPRATE_MASK, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN, + .run_reg = BD71837_REG_BUCK4_VOLT_RUN, + .run_mask = DVS_BUCK_RUN_MASK, + }, + .init = { + .reg = BD71837_REG_BUCK4_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK5, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71837_BUCK5_VOLTAGE_NUM, + .linear_ranges = bd71837_buck5_volts, + .n_linear_ranges = + ARRAY_SIZE(bd71837_buck5_volts), + .vsel_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, + .vsel_mask = BD71837_BUCK5_MASK, + .vsel_range_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, + .vsel_range_mask = BD71837_BUCK5_RANGE_MASK, + .linear_range_selectors_bitfield = bd71837_buck5_volt_range_sel, + .enable_reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK5_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK6, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71837_BUCK6_VOLTAGE_NUM, + .linear_ranges = bd71837_buck6_volts, + .n_linear_ranges = + ARRAY_SIZE(bd71837_buck6_volts), + .vsel_reg = BD718XX_REG_2ND_NODVS_BUCK_VOLT, + .vsel_mask = BD71837_BUCK6_MASK, + .enable_reg = BD718XX_REG_2ND_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK6_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_2ND_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck7", + .of_match = of_match_ptr("BUCK7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK7, + .type = REGULATOR_VOLTAGE, + .volt_table = &bd718xx_3rd_nodvs_buck_volts[0], + .n_voltages = ARRAY_SIZE(bd718xx_3rd_nodvs_buck_volts), + .vsel_reg = BD718XX_REG_3RD_NODVS_BUCK_VOLT, + .vsel_mask = BD718XX_3RD_NODVS_BUCK_MASK, + .enable_reg = BD718XX_REG_3RD_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK7_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_3RD_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "buck8", + .of_match = of_match_ptr("BUCK8"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_BUCK8, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_4TH_NODVS_BUCK_VOLTAGE_NUM, + .linear_ranges = bd718xx_4th_nodvs_buck_volts, + .n_linear_ranges = + ARRAY_SIZE(bd718xx_4th_nodvs_buck_volts), + .vsel_reg = BD718XX_REG_4TH_NODVS_BUCK_VOLT, + .vsel_mask = BD718XX_4TH_NODVS_BUCK_MASK, + .enable_reg = BD718XX_REG_4TH_NODVS_BUCK_CTRL, + .enable_mask = BD718XX_BUCK_EN, + .enable_time = BD71837_BUCK8_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_4TH_NODVS_BUCK_CTRL, + .mask = BD718XX_BUCK_SEL, + .val = BD718XX_BUCK_SEL, + }, + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO1, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO1_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo1_volts), + .vsel_reg = BD718XX_REG_LDO1_VOLT, + .vsel_mask = BD718XX_LDO1_MASK, + .vsel_range_reg = BD718XX_REG_LDO1_VOLT, + .vsel_range_mask = BD718XX_LDO1_RANGE_MASK, + .linear_range_selectors_bitfield = bd718xx_ldo1_volt_range_sel, + .enable_reg = BD718XX_REG_LDO1_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO1_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO1_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO2, + .type = REGULATOR_VOLTAGE, + .volt_table = &ldo_2_volts[0], + .vsel_reg = BD718XX_REG_LDO2_VOLT, + .vsel_mask = BD718XX_LDO2_MASK, + .n_voltages = ARRAY_SIZE(ldo_2_volts), + .enable_reg = BD718XX_REG_LDO2_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO2_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO2_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO3, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO3_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo3_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo3_volts), + .vsel_reg = BD718XX_REG_LDO3_VOLT, + .vsel_mask = BD718XX_LDO3_MASK, + .enable_reg = BD718XX_REG_LDO3_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO3_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO3_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo4", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO4, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO4_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo4_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo4_volts), + .vsel_reg = BD718XX_REG_LDO4_VOLT, + .vsel_mask = BD718XX_LDO4_MASK, + .enable_reg = BD718XX_REG_LDO4_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO4_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO4_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, + { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO5, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71837_LDO5_VOLTAGE_NUM, + .linear_ranges = bd71837_ldo5_volts, + .n_linear_ranges = ARRAY_SIZE(bd71837_ldo5_volts), + /* LDO5 is supplied by buck6 */ + .supply_name = "buck6", + .vsel_reg = BD718XX_REG_LDO5_VOLT, + .vsel_mask = BD71837_LDO5_MASK, + .enable_reg = BD718XX_REG_LDO5_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO5_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO5_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + .additional_inits = bd71837_ldo5_inits, + .additional_init_amnt = ARRAY_SIZE(bd71837_ldo5_inits), + }, + { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("LDO6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO6, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD718XX_LDO6_VOLTAGE_NUM, + .linear_ranges = bd718xx_ldo6_volts, + .n_linear_ranges = ARRAY_SIZE(bd718xx_ldo6_volts), + /* LDO6 is supplied by buck7 */ + .supply_name = "buck7", + .vsel_reg = BD718XX_REG_LDO6_VOLT, + .vsel_mask = BD718XX_LDO6_MASK, + .enable_reg = BD718XX_REG_LDO6_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO6_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD718XX_REG_LDO6_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + .additional_inits = bd71837_ldo6_inits, + .additional_init_amnt = ARRAY_SIZE(bd71837_ldo6_inits), + }, + { + .desc = { + .name = "ldo7", + .of_match = of_match_ptr("LDO7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD718XX_LDO7, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD71837_LDO7_VOLTAGE_NUM, + .linear_ranges = bd71837_ldo7_volts, + .n_linear_ranges = ARRAY_SIZE(bd71837_ldo7_volts), + .vsel_reg = BD71837_REG_LDO7_VOLT, + .vsel_mask = BD71837_LDO7_MASK, + .enable_reg = BD71837_REG_LDO7_VOLT, + .enable_mask = BD718XX_LDO_EN, + .enable_time = BD71837_LDO7_STARTUP_TIME, + .owner = THIS_MODULE, + }, + .init = { + .reg = BD71837_REG_LDO7_VOLT, + .mask = BD718XX_LDO_SEL, + .val = BD718XX_LDO_SEL, + }, + }, +}; + +static void mark_hw_controlled(struct device *dev, struct device_node *np, + struct bd718xx_regulator_data *reg_data, + unsigned int num_reg_data, int *info) +{ + int i; + + for (i = 1; i <= num_reg_data; i++) { + if (!of_node_name_eq(np, reg_data[i-1].desc.of_match)) + continue; + + *info |= 1 << (i - 1); + dev_dbg(dev, "regulator %d runlevel controlled\n", i); + return; + } + dev_warn(dev, "Bad regulator node\n"); +} + +/* + * Setups where regulator (especially the buck8) output voltage is scaled + * by adding external connection where some other regulator output is connected + * to feedback-pin (over suitable resistors) is getting popular amongst users + * of BD71837. (This allows for example scaling down the buck8 voltages to suit + * lover GPU voltages for projects where buck8 is (ab)used to supply power + * for GPU. Additionally some setups do allow DVS for buck8 but as this do + * produce voltage spikes the HW must be evaluated to be able to survive this + * - hence I keep the DVS disabled for non DVS bucks by default. I don't want + * to help you burn your proto board) + * + * So we allow describing this external connection from DT and scale the + * voltages accordingly. This is what the connection should look like: + * + * |------------| + * | buck 8 |-------+----->Vout + * | | | + * |------------| | + * | FB pin | + * | | + * +-------+--R2---+ + * | + * R1 + * | + * V FB-pull-up + * + * Here the buck output is sifted according to formula: + * + * Vout_o = Vo - (Vpu - Vo)*R2/R1 + * Linear_step = step_orig*(R1+R2)/R1 + * + * where: + * Vout_o is adjusted voltage output at vsel reg value 0 + * Vo is original voltage output at vsel reg value 0 + * Vpu is the pull-up voltage V FB-pull-up in the picture + * R1 and R2 are resistor values. + * + * As a real world example for buck8 and a specific GPU: + * VLDO = 1.6V (used as FB-pull-up) + * R1 = 1000ohms + * R2 = 150ohms + * VSEL 0x0 => 0.8V – (VLDO – 0.8) * R2 / R1 = 0.68V + * Linear Step = 10mV * (R1 + R2) / R1 = 11.5mV + */ +static int setup_feedback_loop(struct device *dev, struct device_node *np, + struct bd718xx_regulator_data *reg_data, + unsigned int num_reg_data, int fb_uv) +{ + int i, r1, r2, ret; + + /* + * We do adjust the values in the global desc based on DT settings. + * This may not be best approach as it can cause problems if more than + * one PMIC is controlled from same processor. I don't see such use-case + * for BD718x7 now - so we spare some bits. + * + * If this will point out to be a problem - then we can allocate new + * bd718xx_regulator_data array at probe and just use the global + * array as a template where we copy initial values. Then we can + * use allocated descs for regultor registration and do IC specific + * modifications to this copy while leaving other PMICs untouched. But + * that means allocating new array for each PMIC - and currently I see + * no need for that. + */ + + for (i = 0; i < num_reg_data; i++) { + struct regulator_desc *desc = ®_data[i].desc; + int j; + + if (!of_node_name_eq(np, desc->of_match)) + continue; + + /* The feedback loop connection does not make sense for LDOs */ + if (desc->id >= BD718XX_LDO1) + return -EINVAL; + + ret = of_property_read_u32(np, "rohm,feedback-pull-up-r1-ohms", + &r1); + if (ret) + return ret; + + if (!r1) + return -EINVAL; + + ret = of_property_read_u32(np, "rohm,feedback-pull-up-r2-ohms", + &r2); + if (ret) + return ret; + + if (desc->n_linear_ranges && desc->linear_ranges) { + struct linear_range *new; + + new = devm_kcalloc(dev, desc->n_linear_ranges, + sizeof(struct linear_range), + GFP_KERNEL); + if (!new) + return -ENOMEM; + + for (j = 0; j < desc->n_linear_ranges; j++) { + int min = desc->linear_ranges[j].min; + int step = desc->linear_ranges[j].step; + + min -= (fb_uv - min)*r2/r1; + step = step * (r1 + r2); + step /= r1; + + new[j].min = min; + new[j].min_sel = desc->linear_ranges[j].min_sel; + new[j].max_sel = desc->linear_ranges[j].max_sel; + new[j].step = step; + + dev_dbg(dev, "%s: old range min %d, step %d\n", + desc->name, desc->linear_ranges[j].min, + desc->linear_ranges[j].step); + dev_dbg(dev, "new range min %d, step %d\n", min, + step); + } + desc->linear_ranges = new; + } + dev_dbg(dev, "regulator '%s' has FB pull-up configured\n", + desc->name); + + return 0; + } + + return -ENODEV; +} + +static int get_special_regulators(struct device *dev, + struct bd718xx_regulator_data *reg_data, + unsigned int num_reg_data, int *info) +{ + int ret; + int uv; + + *info = 0; + + struct device_node *nproot __free(device_node) = of_get_child_by_name(dev->of_node, + "regulators"); + if (!nproot) { + dev_err(dev, "failed to find regulators node\n"); + return -ENODEV; + } + for_each_child_of_node_scoped(nproot, np) { + if (of_property_read_bool(np, "rohm,no-regulator-enable-control")) + mark_hw_controlled(dev, np, reg_data, num_reg_data, + info); + ret = of_property_read_u32(np, "rohm,fb-pull-up-microvolt", + &uv); + if (ret) { + if (ret == -EINVAL) + continue; + else + return ret; + } + + ret = setup_feedback_loop(dev, np, reg_data, num_reg_data, uv); + if (ret) + return ret; + } + + return 0; +} + +static int bd718xx_probe(struct platform_device *pdev) +{ + struct regmap *regmap; + struct regulator_config config = { 0 }; + int i, j, err, omit_enable; + bool use_snvs; + struct bd718xx_regulator_data *reg_data; + unsigned int num_reg_data; + enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; + const struct regulator_ops **swops, **hwops; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + + switch (chip) { + case ROHM_CHIP_TYPE_BD71837: + reg_data = bd71837_regulators; + num_reg_data = ARRAY_SIZE(bd71837_regulators); + swops = &bd71837_swcontrol_ops[0]; + hwops = &bd71837_hwcontrol_ops[0]; + break; + case ROHM_CHIP_TYPE_BD71847: + reg_data = bd71847_regulators; + num_reg_data = ARRAY_SIZE(bd71847_regulators); + swops = &bd71847_swcontrol_ops[0]; + hwops = &bd71847_hwcontrol_ops[0]; + break; + default: + dev_err(&pdev->dev, "Unsupported chip type\n"); + return -EINVAL; + } + + /* Register LOCK release */ + err = regmap_update_bits(regmap, BD718XX_REG_REGLOCK, + (REGLOCK_PWRSEQ | REGLOCK_VREG), 0); + if (err) + return dev_err_probe(&pdev->dev, err, "Failed to unlock PMIC\n"); + + dev_dbg(&pdev->dev, "Unlocked lock register 0x%x\n", + BD718XX_REG_REGLOCK); + + use_snvs = of_property_read_bool(pdev->dev.parent->of_node, + "rohm,reset-snvs-powered"); + + /* + * Change the next stage from poweroff to be READY instead of SNVS + * for all reset types because OTP loading at READY will clear SEL + * bit allowing HW defaults for power rails to be used + */ + if (!use_snvs) { + err = regmap_update_bits(regmap, BD718XX_REG_TRANS_COND1, + BD718XX_ON_REQ_POWEROFF_MASK | + BD718XX_SWRESET_POWEROFF_MASK | + BD718XX_WDOG_POWEROFF_MASK | + BD718XX_KEY_L_POWEROFF_MASK, + BD718XX_POWOFF_TO_RDY); + if (err) + return dev_err_probe(&pdev->dev, err, + "Failed to change reset target\n"); + + dev_dbg(&pdev->dev, "Changed all resets from SVNS to READY\n"); + } + + config.dev = pdev->dev.parent; + config.regmap = regmap; + /* + * There are cases when we want to leave the enable-control for + * the HW state machine and use this driver only for voltage control. + * One special case is when we use PMIC_STBY_REQ line from SoC to PMIC + * in order to set the system to SUSPEND state. + * + * If regulator is taken under SW control the regulator state will not + * be affected by PMIC state machine - Eg. regulator is likely to stay + * on even in SUSPEND + */ + err = get_special_regulators(pdev->dev.parent, reg_data, num_reg_data, + &omit_enable); + if (err) + return err; + + for (i = 0; i < num_reg_data; i++) { + + struct regulator_desc *desc; + struct regulator_dev *rdev; + struct bd718xx_regulator_data *r; + int no_enable_control = omit_enable & (1 << i); + + r = ®_data[i]; + desc = &r->desc; + + if (no_enable_control) + desc->ops = hwops[i]; + else + desc->ops = swops[i]; + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + desc->name); + + /* + * Regulator register gets the regulator constraints and + * applies them (set_machine_constraints). This should have + * turned the control register(s) to correct values and we + * can now switch the control from PMIC state machine to the + * register interface + * + * At poweroff transition PMIC HW disables EN bit for + * regulators but leaves SEL bit untouched. So if state + * transition from POWEROFF is done to SNVS - then all power + * rails controlled by SW (having SEL bit set) stay disabled + * as EN is cleared. This will result boot failure if any + * crucial systems are powered by these rails. We don't + * enable SW control for crucial regulators if snvs state is + * used + */ + if (!no_enable_control && (!use_snvs || + !rdev->constraints->always_on || + !rdev->constraints->boot_on)) { + err = regmap_update_bits(regmap, r->init.reg, + r->init.mask, r->init.val); + if (err) + return dev_err_probe(&pdev->dev, err, + "Failed to take control for (%s)\n", + desc->name); + } + for (j = 0; j < r->additional_init_amnt; j++) { + err = regmap_update_bits(regmap, + r->additional_inits[j].reg, + r->additional_inits[j].mask, + r->additional_inits[j].val); + if (err) + return dev_err_probe(&pdev->dev, err, + "Buck (%s) initialization failed\n", + desc->name); + } + } + + return err; +} + +static const struct platform_device_id bd718x7_pmic_id[] = { + { .name = "bd71837-pmic", .driver_data = ROHM_CHIP_TYPE_BD71837 }, + { .name = "bd71847-pmic", .driver_data = ROHM_CHIP_TYPE_BD71847 }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd718x7_pmic_id); + +static struct platform_driver bd718xx_regulator = { + .driver = { + .name = "bd718xx-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = bd718xx_probe, + .id_table = bd718x7_pmic_id, +}; + +module_platform_driver(bd718xx_regulator); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD71837/BD71847 voltage regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:bd718xx-pmic"); diff --git a/drivers/regulator/bd9571mwv-regulator.c b/drivers/regulator/bd9571mwv-regulator.c new file mode 100644 index 000000000..5bf02dc0d --- /dev/null +++ b/drivers/regulator/bd9571mwv-regulator.c @@ -0,0 +1,367 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ROHM BD9571MWV-M and BD9574MWF-M regulator driver + * + * Copyright (C) 2017 Marek Vasut + * + * Based on the TPS65086 driver + * + * NOTE: VD09 is missing + */ + +#include +#include +#include +#include +#include + +#include + +struct bd9571mwv_reg { + struct regmap *regmap; + + /* DDR Backup Power */ + u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */ + u8 bkup_mode_cnt_saved; + bool bkup_mode_enabled; + + /* Power switch type */ + bool rstbmode_level; + bool rstbmode_pulse; +}; + +enum bd9571mwv_regulators { VD09, VD18, VD25, VD33, DVFS }; + +#define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\ + { \ + .name = _name, \ + .of_match = of_match_ptr(_of), \ + .regulators_node = "regulators", \ + .id = _id, \ + .ops = &_ops, \ + .n_voltages = _nv, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .min_uV = _min, \ + .uV_step = _step, \ + .linear_min_sel = _lmin, \ + } + +static int bd9571mwv_avs_get_moni_state(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); + if (ret != 0) + return ret; + + return val & BD9571MWV_AVS_SET_MONI_MASK; +} + +static int bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev *rdev, + unsigned int sel) +{ + int ret; + + ret = bd9571mwv_avs_get_moni_state(rdev); + if (ret < 0) + return ret; + + return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), + rdev->desc->vsel_mask, sel); +} + +static int bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = bd9571mwv_avs_get_moni_state(rdev); + if (ret < 0) + return ret; + + ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); + if (ret != 0) + return ret; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static int bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev *rdev, + unsigned int sel) +{ + return regmap_write_bits(rdev->regmap, BD9571MWV_DVFS_SETVID, + rdev->desc->vsel_mask, sel); +} + +/* Operations permitted on AVS voltage regulator */ +static const struct regulator_ops avs_ops = { + .set_voltage_sel = bd9571mwv_avs_set_voltage_sel_regmap, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = bd9571mwv_avs_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +/* Operations permitted on voltage regulators */ +static const struct regulator_ops reg_ops = { + .set_voltage_sel = bd9571mwv_reg_set_voltage_sel_regmap, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +/* Operations permitted on voltage monitors */ +static const struct regulator_ops vid_ops = { + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_desc regulators[] = { + BD9571MWV_REG("VD09", "vd09", VD09, avs_ops, 0, 0x7f, + 0x6f, 600000, 10000, 0x3c), + BD9571MWV_REG("VD18", "vd18", VD18, vid_ops, BD9571MWV_VD18_VID, 0xf, + 16, 1625000, 25000, 0), + BD9571MWV_REG("VD25", "vd25", VD25, vid_ops, BD9571MWV_VD25_VID, 0xf, + 16, 2150000, 50000, 0), + BD9571MWV_REG("VD33", "vd33", VD33, vid_ops, BD9571MWV_VD33_VID, 0xf, + 11, 2800000, 100000, 0), + BD9571MWV_REG("DVFS", "dvfs", DVFS, reg_ops, + BD9571MWV_DVFS_MONIVDAC, 0x7f, + 0x6f, 600000, 10000, 0x3c), +}; + +#ifdef CONFIG_PM_SLEEP +static int bd9571mwv_bkup_mode_read(struct bd9571mwv_reg *bdreg, + unsigned int *mode) +{ + int ret; + + ret = regmap_read(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode); + if (ret) { + dev_err(regmap_get_device(bdreg->regmap), + "failed to read backup mode (%d)\n", ret); + return ret; + } + + return 0; +} + +static int bd9571mwv_bkup_mode_write(struct bd9571mwv_reg *bdreg, + unsigned int mode) +{ + int ret; + + ret = regmap_write(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode); + if (ret) { + dev_err(regmap_get_device(bdreg->regmap), + "failed to configure backup mode 0x%x (%d)\n", + mode, ret); + return ret; + } + + return 0; +} + +static ssize_t backup_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); + + return sysfs_emit(buf, "%s\n", bdreg->bkup_mode_enabled ? "on" : "off"); +} + +static ssize_t backup_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); + unsigned int mode; + int ret; + + if (!count) + return 0; + + ret = kstrtobool(buf, &bdreg->bkup_mode_enabled); + if (ret) + return ret; + + if (!bdreg->rstbmode_level) + return count; + + /* + * Configure DDR Backup Mode, to change the role of the accessory power + * switch from a power switch to a wake-up switch, or vice versa + */ + ret = bd9571mwv_bkup_mode_read(bdreg, &mode); + if (ret) + return ret; + + mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK; + if (bdreg->bkup_mode_enabled) + mode |= bdreg->bkup_mode_cnt_keepon; + + ret = bd9571mwv_bkup_mode_write(bdreg, mode); + if (ret) + return ret; + + return count; +} + +static DEVICE_ATTR_RW(backup_mode); + +static int bd9571mwv_suspend(struct device *dev) +{ + struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); + unsigned int mode; + int ret; + + if (!bdreg->bkup_mode_enabled) + return 0; + + /* Save DDR Backup Mode */ + ret = bd9571mwv_bkup_mode_read(bdreg, &mode); + if (ret) + return ret; + + bdreg->bkup_mode_cnt_saved = mode; + + if (!bdreg->rstbmode_pulse) + return 0; + + /* Enable DDR Backup Mode */ + mode &= ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK; + mode |= bdreg->bkup_mode_cnt_keepon; + + if (mode != bdreg->bkup_mode_cnt_saved) + return bd9571mwv_bkup_mode_write(bdreg, mode); + + return 0; +} + +static int bd9571mwv_resume(struct device *dev) +{ + struct bd9571mwv_reg *bdreg = dev_get_drvdata(dev); + + if (!bdreg->bkup_mode_enabled) + return 0; + + /* Restore DDR Backup Mode */ + return bd9571mwv_bkup_mode_write(bdreg, bdreg->bkup_mode_cnt_saved); +} + +static const struct dev_pm_ops bd9571mwv_pm = { + SET_SYSTEM_SLEEP_PM_OPS(bd9571mwv_suspend, bd9571mwv_resume) +}; + +static void bd9571mwv_regulator_remove(struct platform_device *pdev) +{ + device_remove_file(&pdev->dev, &dev_attr_backup_mode); +} +#define DEV_PM_OPS &bd9571mwv_pm +#else +#define DEV_PM_OPS NULL +#define bd9571mwv_regulator_remove NULL +#endif /* CONFIG_PM_SLEEP */ + +static int bd9571mwv_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = { }; + struct bd9571mwv_reg *bdreg; + struct regulator_dev *rdev; + unsigned int val; + int i; + enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; + + bdreg = devm_kzalloc(&pdev->dev, sizeof(*bdreg), GFP_KERNEL); + if (!bdreg) + return -ENOMEM; + + bdreg->regmap = dev_get_regmap(pdev->dev.parent, NULL); + + platform_set_drvdata(pdev, bdreg); + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + config.dev = &pdev->dev; + config.driver_data = bdreg; + config.regmap = bdreg->regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + /* BD9574MWF supports DVFS only */ + if (chip == ROHM_CHIP_TYPE_BD9574 && regulators[i].id != DVFS) + continue; + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s regulator\n", + regulators[i].name); + return PTR_ERR(rdev); + } + } + + val = 0; + of_property_read_u32(config.dev->of_node, "rohm,ddr-backup-power", &val); + if (val & ~BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK) { + dev_err(&pdev->dev, "invalid %s mode %u\n", + "rohm,ddr-backup-power", val); + return -EINVAL; + } + bdreg->bkup_mode_cnt_keepon = val; + + bdreg->rstbmode_level = of_property_read_bool(config.dev->of_node, + "rohm,rstbmode-level"); + bdreg->rstbmode_pulse = of_property_read_bool(config.dev->of_node, + "rohm,rstbmode-pulse"); + if (bdreg->rstbmode_level && bdreg->rstbmode_pulse) { + dev_err(&pdev->dev, "only one rohm,rstbmode-* may be specified"); + return -EINVAL; + } + +#ifdef CONFIG_PM_SLEEP + if (bdreg->bkup_mode_cnt_keepon) { + int ret; + + /* + * Backup mode is enabled by default in pulse mode, but needs + * explicit user setup in level mode. + */ + bdreg->bkup_mode_enabled = bdreg->rstbmode_pulse; + + ret = device_create_file(&pdev->dev, &dev_attr_backup_mode); + if (ret) + return ret; + } +#endif /* CONFIG_PM_SLEEP */ + + return 0; +} + +static const struct platform_device_id bd9571mwv_regulator_id_table[] = { + { .name = "bd9571mwv-regulator", .driver_data = ROHM_CHIP_TYPE_BD9571 }, + { .name = "bd9574mwf-regulator", .driver_data = ROHM_CHIP_TYPE_BD9574 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, bd9571mwv_regulator_id_table); + +static struct platform_driver bd9571mwv_regulator_driver = { + .driver = { + .name = "bd9571mwv-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .pm = DEV_PM_OPS, + }, + .probe = bd9571mwv_regulator_probe, + .remove = bd9571mwv_regulator_remove, + .id_table = bd9571mwv_regulator_id_table, +}; +module_platform_driver(bd9571mwv_regulator_driver); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("BD9571MWV Regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/bd9576-regulator.c b/drivers/regulator/bd9576-regulator.c new file mode 100644 index 000000000..fcdaaa56e --- /dev/null +++ b/drivers/regulator/bd9576-regulator.c @@ -0,0 +1,1140 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2020 ROHM Semiconductors +// ROHM BD9576MUF/BD9573MUF regulator driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BD957X_VOUTS1_VOLT 3300000 +#define BD957X_VOUTS4_BASE_VOLT 1030000 +#define BD957X_VOUTS34_NUM_VOLT 32 + +#define BD9576_THERM_IRQ_MASK_TW BIT(5) +#define BD9576_xVD_IRQ_MASK_VOUTL1 BIT(5) +#define BD9576_UVD_IRQ_MASK_VOUTS1_OCW BIT(6) +#define BD9576_xVD_IRQ_MASK_VOUT1TO4 0x0F + +static const unsigned int vout1_volt_table[] = { + 5000000, 4900000, 4800000, 4700000, 4600000, + 4500000, 4500000, 4500000, 5000000, 5100000, + 5200000, 5300000, 5400000, 5500000, 5500000, + 5500000 +}; + +static const unsigned int vout2_volt_table[] = { + 1800000, 1780000, 1760000, 1740000, 1720000, + 1700000, 1680000, 1660000, 1800000, 1820000, + 1840000, 1860000, 1880000, 1900000, 1920000, + 1940000 +}; + +static const unsigned int voutl1_volt_table[] = { + 2500000, 2540000, 2580000, 2620000, 2660000, + 2700000, 2740000, 2780000, 2500000, 2460000, + 2420000, 2380000, 2340000, 2300000, 2260000, + 2220000 +}; + +static const struct linear_range vout1_xvd_ranges[] = { + REGULATOR_LINEAR_RANGE(225000, 0x01, 0x2b, 0), + REGULATOR_LINEAR_RANGE(225000, 0x2c, 0x54, 5000), + REGULATOR_LINEAR_RANGE(425000, 0x55, 0x7f, 0), +}; + +static const struct linear_range vout234_xvd_ranges[] = { + REGULATOR_LINEAR_RANGE(17000, 0x01, 0x0f, 0), + REGULATOR_LINEAR_RANGE(17000, 0x10, 0x6d, 1000), + REGULATOR_LINEAR_RANGE(110000, 0x6e, 0x7f, 0), +}; + +static const struct linear_range voutL1_xvd_ranges[] = { + REGULATOR_LINEAR_RANGE(34000, 0x01, 0x0f, 0), + REGULATOR_LINEAR_RANGE(34000, 0x10, 0x6d, 2000), + REGULATOR_LINEAR_RANGE(220000, 0x6e, 0x7f, 0), +}; + +static const struct linear_range voutS1_ocw_ranges_internal[] = { + REGULATOR_LINEAR_RANGE(200000, 0x01, 0x04, 0), + REGULATOR_LINEAR_RANGE(250000, 0x05, 0x18, 50000), + REGULATOR_LINEAR_RANGE(1200000, 0x19, 0x3f, 0), +}; + +static const struct linear_range voutS1_ocw_ranges[] = { + REGULATOR_LINEAR_RANGE(50000, 0x01, 0x04, 0), + REGULATOR_LINEAR_RANGE(60000, 0x05, 0x18, 10000), + REGULATOR_LINEAR_RANGE(250000, 0x19, 0x3f, 0), +}; + +static const struct linear_range voutS1_ocp_ranges_internal[] = { + REGULATOR_LINEAR_RANGE(300000, 0x01, 0x06, 0), + REGULATOR_LINEAR_RANGE(350000, 0x7, 0x1b, 50000), + REGULATOR_LINEAR_RANGE(1350000, 0x1c, 0x3f, 0), +}; + +static const struct linear_range voutS1_ocp_ranges[] = { + REGULATOR_LINEAR_RANGE(70000, 0x01, 0x06, 0), + REGULATOR_LINEAR_RANGE(80000, 0x7, 0x1b, 10000), + REGULATOR_LINEAR_RANGE(280000, 0x1c, 0x3f, 0), +}; + +struct bd957x_regulator_data { + struct regulator_desc desc; + int base_voltage; + struct regulator_dev *rdev; + int ovd_notif; + int uvd_notif; + int temp_notif; + int ovd_err; + int uvd_err; + int temp_err; + const struct linear_range *xvd_ranges; + int num_xvd_ranges; + bool oc_supported; + unsigned int ovd_reg; + unsigned int uvd_reg; + unsigned int xvd_mask; + unsigned int ocp_reg; + unsigned int ocp_mask; + unsigned int ocw_reg; + unsigned int ocw_mask; + unsigned int ocw_rfet; +}; + +#define BD9576_NUM_REGULATORS 6 +#define BD9576_NUM_OVD_REGULATORS 5 + +struct bd957x_data { + struct bd957x_regulator_data regulator_data[BD9576_NUM_REGULATORS]; + struct regmap *regmap; + struct delayed_work therm_irq_suppress; + struct delayed_work ovd_irq_suppress; + struct delayed_work uvd_irq_suppress; + unsigned int therm_irq; + unsigned int ovd_irq; + unsigned int uvd_irq; + spinlock_t err_lock; + int regulator_global_err; +}; + +static int bd957x_vout34_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct regulator_desc *desc = rdev->desc; + int multiplier = selector & desc->vsel_mask & 0x7f; + int tune; + + /* VOUT3 and 4 has 10mV step */ + tune = multiplier * 10000; + + if (!(selector & 0x80)) + return desc->fixed_uV - tune; + + return desc->fixed_uV + tune; +} + +static int bd957x_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct regulator_desc *desc = rdev->desc; + int index = selector & desc->vsel_mask & 0x7f; + + if (!(selector & 0x80)) + index += desc->n_voltages/2; + + if (index >= desc->n_voltages) + return -EINVAL; + + return desc->volt_table[index]; +} + +static void bd9576_fill_ovd_flags(struct bd957x_regulator_data *data, + bool warn) +{ + if (warn) { + data->ovd_notif = REGULATOR_EVENT_OVER_VOLTAGE_WARN; + data->ovd_err = REGULATOR_ERROR_OVER_VOLTAGE_WARN; + } else { + data->ovd_notif = REGULATOR_EVENT_REGULATION_OUT; + data->ovd_err = REGULATOR_ERROR_REGULATION_OUT; + } +} + +static void bd9576_fill_ocp_flags(struct bd957x_regulator_data *data, + bool warn) +{ + if (warn) { + data->uvd_notif = REGULATOR_EVENT_OVER_CURRENT_WARN; + data->uvd_err = REGULATOR_ERROR_OVER_CURRENT_WARN; + } else { + data->uvd_notif = REGULATOR_EVENT_OVER_CURRENT; + data->uvd_err = REGULATOR_ERROR_OVER_CURRENT; + } +} + +static void bd9576_fill_uvd_flags(struct bd957x_regulator_data *data, + bool warn) +{ + if (warn) { + data->uvd_notif = REGULATOR_EVENT_UNDER_VOLTAGE_WARN; + data->uvd_err = REGULATOR_ERROR_UNDER_VOLTAGE_WARN; + } else { + data->uvd_notif = REGULATOR_EVENT_UNDER_VOLTAGE; + data->uvd_err = REGULATOR_ERROR_UNDER_VOLTAGE; + } +} + +static void bd9576_fill_temp_flags(struct bd957x_regulator_data *data, + bool enable, bool warn) +{ + if (!enable) { + data->temp_notif = 0; + data->temp_err = 0; + } else if (warn) { + data->temp_notif = REGULATOR_EVENT_OVER_TEMP_WARN; + data->temp_err = REGULATOR_ERROR_OVER_TEMP_WARN; + } else { + data->temp_notif = REGULATOR_EVENT_OVER_TEMP; + data->temp_err = REGULATOR_ERROR_OVER_TEMP; + } +} + +static int bd9576_set_limit(const struct linear_range *r, int num_ranges, + struct regmap *regmap, int reg, int mask, int lim) +{ + int ret; + bool found; + int sel = 0; + + if (lim) { + + ret = linear_range_get_selector_low_array(r, num_ranges, + lim, &sel, &found); + if (ret) + return ret; + + if (!found) + dev_warn(regmap_get_device(regmap), + "limit %d out of range. Setting lower\n", + lim); + } + + return regmap_update_bits(regmap, reg, mask, sel); +} + +static bool check_ocp_flag_mismatch(struct regulator_dev *rdev, int severity, + struct bd957x_regulator_data *r) +{ + if ((severity == REGULATOR_SEVERITY_ERR && + r->uvd_notif != REGULATOR_EVENT_OVER_CURRENT) || + (severity == REGULATOR_SEVERITY_WARN && + r->uvd_notif != REGULATOR_EVENT_OVER_CURRENT_WARN)) { + dev_warn(rdev_get_dev(rdev), + "Can't support both OCP WARN and ERR\n"); + /* Do not overwrite ERR config with WARN */ + if (severity == REGULATOR_SEVERITY_WARN) + return true; + + bd9576_fill_ocp_flags(r, 0); + } + + return false; +} + +static bool check_uvd_flag_mismatch(struct regulator_dev *rdev, int severity, + struct bd957x_regulator_data *r) +{ + if ((severity == REGULATOR_SEVERITY_ERR && + r->uvd_notif != REGULATOR_EVENT_UNDER_VOLTAGE) || + (severity == REGULATOR_SEVERITY_WARN && + r->uvd_notif != REGULATOR_EVENT_UNDER_VOLTAGE_WARN)) { + dev_warn(rdev_get_dev(rdev), + "Can't support both UVD WARN and ERR\n"); + if (severity == REGULATOR_SEVERITY_WARN) + return true; + + bd9576_fill_uvd_flags(r, 0); + } + + return false; +} + +static bool check_ovd_flag_mismatch(struct regulator_dev *rdev, int severity, + struct bd957x_regulator_data *r) +{ + if ((severity == REGULATOR_SEVERITY_ERR && + r->ovd_notif != REGULATOR_EVENT_REGULATION_OUT) || + (severity == REGULATOR_SEVERITY_WARN && + r->ovd_notif != REGULATOR_EVENT_OVER_VOLTAGE_WARN)) { + dev_warn(rdev_get_dev(rdev), + "Can't support both OVD WARN and ERR\n"); + if (severity == REGULATOR_SEVERITY_WARN) + return true; + + bd9576_fill_ovd_flags(r, 0); + } + + return false; +} + +static bool check_temp_flag_mismatch(struct regulator_dev *rdev, int severity, + struct bd957x_regulator_data *r) +{ + if ((severity == REGULATOR_SEVERITY_ERR && + r->temp_notif != REGULATOR_EVENT_OVER_TEMP) || + (severity == REGULATOR_SEVERITY_WARN && + r->temp_notif != REGULATOR_EVENT_OVER_TEMP_WARN)) { + dev_warn(rdev_get_dev(rdev), + "Can't support both thermal WARN and ERR\n"); + if (severity == REGULATOR_SEVERITY_WARN) + return true; + } + + return false; +} + +static int bd9576_set_ocp(struct regulator_dev *rdev, int lim_uA, int severity, + bool enable) +{ + struct bd957x_data *d; + struct bd957x_regulator_data *r; + int reg, mask; + int Vfet, rfet; + const struct linear_range *range; + int num_ranges; + + if ((lim_uA && !enable) || (!lim_uA && enable)) + return -EINVAL; + + r = container_of(rdev->desc, struct bd957x_regulator_data, desc); + if (!r->oc_supported) + return -EINVAL; + + d = rdev_get_drvdata(rdev); + + if (severity == REGULATOR_SEVERITY_PROT) { + reg = r->ocp_reg; + mask = r->ocp_mask; + if (r->ocw_rfet) { + range = voutS1_ocp_ranges; + num_ranges = ARRAY_SIZE(voutS1_ocp_ranges); + rfet = r->ocw_rfet / 1000; + } else { + range = voutS1_ocp_ranges_internal; + num_ranges = ARRAY_SIZE(voutS1_ocp_ranges_internal); + /* Internal values are already micro-amperes */ + rfet = 1000; + } + } else { + reg = r->ocw_reg; + mask = r->ocw_mask; + + if (r->ocw_rfet) { + range = voutS1_ocw_ranges; + num_ranges = ARRAY_SIZE(voutS1_ocw_ranges); + rfet = r->ocw_rfet / 1000; + } else { + range = voutS1_ocw_ranges_internal; + num_ranges = ARRAY_SIZE(voutS1_ocw_ranges_internal); + /* Internal values are already micro-amperes */ + rfet = 1000; + } + + /* We abuse uvd fields for OCW on VoutS1 */ + if (r->uvd_notif) { + /* + * If both warning and error are requested, prioritize + * ERROR configuration + */ + if (check_ocp_flag_mismatch(rdev, severity, r)) + return 0; + } else { + bool warn = severity == REGULATOR_SEVERITY_WARN; + + bd9576_fill_ocp_flags(r, warn); + } + } + + /* + * limits are given in uA, rfet is mOhm + * Divide lim_uA by 1000 to get Vfet in uV. + * (We expect both Rfet and limit uA to be magnitude of hundreds of + * milli Amperes & milli Ohms => we should still have decent accuracy) + */ + Vfet = lim_uA/1000 * rfet; + + return bd9576_set_limit(range, num_ranges, d->regmap, + reg, mask, Vfet); +} + +static int bd9576_set_uvp(struct regulator_dev *rdev, int lim_uV, int severity, + bool enable) +{ + struct bd957x_data *d; + struct bd957x_regulator_data *r; + int mask, reg; + + if (severity == REGULATOR_SEVERITY_PROT) { + if (!enable || lim_uV) + return -EINVAL; + return 0; + } + + /* + * BD9576 has enable control as a special value in limit reg. Can't + * set limit but keep feature disabled or enable W/O given limit. + */ + if ((lim_uV && !enable) || (!lim_uV && enable)) + return -EINVAL; + + r = container_of(rdev->desc, struct bd957x_regulator_data, desc); + d = rdev_get_drvdata(rdev); + + mask = r->xvd_mask; + reg = r->uvd_reg; + /* + * Check that there is no mismatch for what the detection IRQs are to + * be used. + */ + if (r->uvd_notif) { + if (check_uvd_flag_mismatch(rdev, severity, r)) + return 0; + } else { + bd9576_fill_uvd_flags(r, severity == REGULATOR_SEVERITY_WARN); + } + + return bd9576_set_limit(r->xvd_ranges, r->num_xvd_ranges, d->regmap, + reg, mask, lim_uV); +} + +static int bd9576_set_ovp(struct regulator_dev *rdev, int lim_uV, int severity, + bool enable) +{ + struct bd957x_data *d; + struct bd957x_regulator_data *r; + int mask, reg; + + if (severity == REGULATOR_SEVERITY_PROT) { + if (!enable || lim_uV) + return -EINVAL; + return 0; + } + + /* + * BD9576 has enable control as a special value in limit reg. Can't + * set limit but keep feature disabled or enable W/O given limit. + */ + if ((lim_uV && !enable) || (!lim_uV && enable)) + return -EINVAL; + + r = container_of(rdev->desc, struct bd957x_regulator_data, desc); + d = rdev_get_drvdata(rdev); + + mask = r->xvd_mask; + reg = r->ovd_reg; + /* + * Check that there is no mismatch for what the detection IRQs are to + * be used. + */ + if (r->ovd_notif) { + if (check_ovd_flag_mismatch(rdev, severity, r)) + return 0; + } else { + bd9576_fill_ovd_flags(r, severity == REGULATOR_SEVERITY_WARN); + } + + return bd9576_set_limit(r->xvd_ranges, r->num_xvd_ranges, d->regmap, + reg, mask, lim_uV); +} + + +static int bd9576_set_tw(struct regulator_dev *rdev, int lim, int severity, + bool enable) +{ + struct bd957x_data *d; + struct bd957x_regulator_data *r; + int i; + + /* + * BD9576MUF has fixed temperature limits + * The detection can only be enabled/disabled + */ + if (lim) + return -EINVAL; + + /* Protection can't be disabled */ + if (severity == REGULATOR_SEVERITY_PROT) { + if (!enable) + return -EINVAL; + else + return 0; + } + + r = container_of(rdev->desc, struct bd957x_regulator_data, desc); + d = rdev_get_drvdata(rdev); + + /* + * Check that there is no mismatch for what the detection IRQs are to + * be used. + */ + if (r->temp_notif) + if (check_temp_flag_mismatch(rdev, severity, r)) + return 0; + + bd9576_fill_temp_flags(r, enable, severity == REGULATOR_SEVERITY_WARN); + + if (enable) + return regmap_update_bits(d->regmap, BD957X_REG_INT_THERM_MASK, + BD9576_THERM_IRQ_MASK_TW, 0); + + /* + * If any of the regulators is interested in thermal warning we keep IRQ + * enabled. + */ + for (i = 0; i < BD9576_NUM_REGULATORS; i++) + if (d->regulator_data[i].temp_notif) + return 0; + + return regmap_update_bits(d->regmap, BD957X_REG_INT_THERM_MASK, + BD9576_THERM_IRQ_MASK_TW, + BD9576_THERM_IRQ_MASK_TW); +} + +static const struct regulator_ops bd9573_vout34_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd957x_vout34_list_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd9576_vout34_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd957x_vout34_list_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_over_voltage_protection = bd9576_set_ovp, + .set_under_voltage_protection = bd9576_set_uvp, + .set_thermal_protection = bd9576_set_tw, +}; + +static const struct regulator_ops bd9573_vouts1_regulator_ops = { + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops bd9576_vouts1_regulator_ops = { + .is_enabled = regulator_is_enabled_regmap, + .set_over_current_protection = bd9576_set_ocp, +}; + +static const struct regulator_ops bd9573_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd957x_list_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd9576_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd957x_list_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_over_voltage_protection = bd9576_set_ovp, + .set_under_voltage_protection = bd9576_set_uvp, + .set_thermal_protection = bd9576_set_tw, +}; + +static const struct regulator_ops *bd9573_ops_arr[] = { + [BD957X_VD50] = &bd9573_ops, + [BD957X_VD18] = &bd9573_ops, + [BD957X_VDDDR] = &bd9573_vout34_ops, + [BD957X_VD10] = &bd9573_vout34_ops, + [BD957X_VOUTL1] = &bd9573_ops, + [BD957X_VOUTS1] = &bd9573_vouts1_regulator_ops, +}; + +static const struct regulator_ops *bd9576_ops_arr[] = { + [BD957X_VD50] = &bd9576_ops, + [BD957X_VD18] = &bd9576_ops, + [BD957X_VDDDR] = &bd9576_vout34_ops, + [BD957X_VD10] = &bd9576_vout34_ops, + [BD957X_VOUTL1] = &bd9576_ops, + [BD957X_VOUTS1] = &bd9576_vouts1_regulator_ops, +}; + +static int vouts1_get_fet_res(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct bd957x_regulator_data *data; + int ret; + u32 uohms; + + data = container_of(desc, struct bd957x_regulator_data, desc); + + ret = of_property_read_u32(np, "rohm,ocw-fet-ron-micro-ohms", &uohms); + if (ret) { + if (ret != -EINVAL) + return ret; + + return 0; + } + data->ocw_rfet = uohms; + return 0; +} + +static struct bd957x_data bd957x_regulators = { + .regulator_data = { + { + .desc = { + .name = "VD50", + .of_match = of_match_ptr("regulator-vd50"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VD50, + .type = REGULATOR_VOLTAGE, + .volt_table = &vout1_volt_table[0], + .n_voltages = ARRAY_SIZE(vout1_volt_table), + .vsel_reg = BD957X_REG_VOUT1_TUNE, + .vsel_mask = BD957X_MASK_VOUT1_TUNE, + .enable_reg = BD957X_REG_POW_TRIGGER1, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + }, + .xvd_ranges = vout1_xvd_ranges, + .num_xvd_ranges = ARRAY_SIZE(vout1_xvd_ranges), + .ovd_reg = BD9576_REG_VOUT1_OVD, + .uvd_reg = BD9576_REG_VOUT1_UVD, + .xvd_mask = BD9576_MASK_XVD, + }, + { + .desc = { + .name = "VD18", + .of_match = of_match_ptr("regulator-vd18"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VD18, + .type = REGULATOR_VOLTAGE, + .volt_table = &vout2_volt_table[0], + .n_voltages = ARRAY_SIZE(vout2_volt_table), + .vsel_reg = BD957X_REG_VOUT2_TUNE, + .vsel_mask = BD957X_MASK_VOUT2_TUNE, + .enable_reg = BD957X_REG_POW_TRIGGER2, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + }, + .xvd_ranges = vout234_xvd_ranges, + .num_xvd_ranges = ARRAY_SIZE(vout234_xvd_ranges), + .ovd_reg = BD9576_REG_VOUT2_OVD, + .uvd_reg = BD9576_REG_VOUT2_UVD, + .xvd_mask = BD9576_MASK_XVD, + }, + { + .desc = { + .name = "VDDDR", + .of_match = of_match_ptr("regulator-vdddr"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VDDDR, + .type = REGULATOR_VOLTAGE, + .n_voltages = BD957X_VOUTS34_NUM_VOLT, + .vsel_reg = BD957X_REG_VOUT3_TUNE, + .vsel_mask = BD957X_MASK_VOUT3_TUNE, + .enable_reg = BD957X_REG_POW_TRIGGER3, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + }, + .ovd_reg = BD9576_REG_VOUT3_OVD, + .uvd_reg = BD9576_REG_VOUT3_UVD, + .xvd_mask = BD9576_MASK_XVD, + .xvd_ranges = vout234_xvd_ranges, + .num_xvd_ranges = ARRAY_SIZE(vout234_xvd_ranges), + }, + { + .desc = { + .name = "VD10", + .of_match = of_match_ptr("regulator-vd10"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VD10, + .type = REGULATOR_VOLTAGE, + .fixed_uV = BD957X_VOUTS4_BASE_VOLT, + .n_voltages = BD957X_VOUTS34_NUM_VOLT, + .vsel_reg = BD957X_REG_VOUT4_TUNE, + .vsel_mask = BD957X_MASK_VOUT4_TUNE, + .enable_reg = BD957X_REG_POW_TRIGGER4, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + }, + .xvd_ranges = vout234_xvd_ranges, + .num_xvd_ranges = ARRAY_SIZE(vout234_xvd_ranges), + .ovd_reg = BD9576_REG_VOUT4_OVD, + .uvd_reg = BD9576_REG_VOUT4_UVD, + .xvd_mask = BD9576_MASK_XVD, + }, + { + .desc = { + .name = "VOUTL1", + .of_match = of_match_ptr("regulator-voutl1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VOUTL1, + .type = REGULATOR_VOLTAGE, + .volt_table = &voutl1_volt_table[0], + .n_voltages = ARRAY_SIZE(voutl1_volt_table), + .vsel_reg = BD957X_REG_VOUTL1_TUNE, + .vsel_mask = BD957X_MASK_VOUTL1_TUNE, + .enable_reg = BD957X_REG_POW_TRIGGERL1, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + }, + .xvd_ranges = voutL1_xvd_ranges, + .num_xvd_ranges = ARRAY_SIZE(voutL1_xvd_ranges), + .ovd_reg = BD9576_REG_VOUTL1_OVD, + .uvd_reg = BD9576_REG_VOUTL1_UVD, + .xvd_mask = BD9576_MASK_XVD, + }, + { + .desc = { + .name = "VOUTS1", + .of_match = of_match_ptr("regulator-vouts1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD957X_VOUTS1, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .fixed_uV = BD957X_VOUTS1_VOLT, + .enable_reg = BD957X_REG_POW_TRIGGERS1, + .enable_mask = BD957X_REGULATOR_EN_MASK, + .enable_val = BD957X_REGULATOR_DIS_VAL, + .enable_is_inverted = true, + .owner = THIS_MODULE, + .of_parse_cb = vouts1_get_fet_res, + }, + .oc_supported = true, + .ocw_reg = BD9576_REG_VOUT1S_OCW, + .ocw_mask = BD9576_MASK_VOUT1S_OCW, + .ocp_reg = BD9576_REG_VOUT1S_OCP, + .ocp_mask = BD9576_MASK_VOUT1S_OCP, + }, + }, +}; + +static int bd9576_renable(struct regulator_irq_data *rid, int reg, int mask) +{ + int val, ret; + struct bd957x_data *d = (struct bd957x_data *)rid->data; + + ret = regmap_read(d->regmap, reg, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + if (rid->opaque && rid->opaque == (val & mask)) { + /* + * It seems we stil have same status. Ack and return + * information that we are still out of limits and core + * should not enable IRQ + */ + regmap_write(d->regmap, reg, mask & val); + return REGULATOR_ERROR_ON; + } + rid->opaque = 0; + /* + * Status was changed. Either prolem was solved or we have new issues. + * Let's re-enable IRQs and be prepared to report problems again + */ + return REGULATOR_ERROR_CLEARED; +} + +static int bd9576_uvd_renable(struct regulator_irq_data *rid) +{ + return bd9576_renable(rid, BD957X_REG_INT_UVD_STAT, UVD_IRQ_VALID_MASK); +} + +static int bd9576_ovd_renable(struct regulator_irq_data *rid) +{ + return bd9576_renable(rid, BD957X_REG_INT_OVD_STAT, OVD_IRQ_VALID_MASK); +} + +static int bd9576_temp_renable(struct regulator_irq_data *rid) +{ + return bd9576_renable(rid, BD957X_REG_INT_THERM_STAT, + BD9576_THERM_IRQ_MASK_TW); +} + +static int bd9576_uvd_handler(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int val, ret, i; + struct bd957x_data *d = (struct bd957x_data *)rid->data; + + ret = regmap_read(d->regmap, BD957X_REG_INT_UVD_STAT, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + *dev_mask = 0; + + rid->opaque = val & UVD_IRQ_VALID_MASK; + + /* + * Go through the set status bits and report either error or warning + * to the notifier depending on what was flagged in DT + */ + *dev_mask = val & BD9576_xVD_IRQ_MASK_VOUT1TO4; + /* There is 1 bit gap in register after Vout1 .. Vout4 statuses */ + *dev_mask |= ((val & BD9576_xVD_IRQ_MASK_VOUTL1) >> 1); + /* + * We (ab)use the uvd for OCW notification. DT parsing should + * have added correct OCW flag to uvd_notif and uvd_err for S1 + */ + *dev_mask |= ((val & BD9576_UVD_IRQ_MASK_VOUTS1_OCW) >> 1); + + for_each_set_bit(i, dev_mask, 6) { + struct bd957x_regulator_data *rdata; + struct regulator_err_state *stat; + + rdata = &d->regulator_data[i]; + stat = &rid->states[i]; + + stat->notifs = rdata->uvd_notif; + stat->errors = rdata->uvd_err; + } + + ret = regmap_write(d->regmap, BD957X_REG_INT_UVD_STAT, + UVD_IRQ_VALID_MASK & val); + + return 0; +} + +static int bd9576_ovd_handler(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int val, ret, i; + struct bd957x_data *d = (struct bd957x_data *)rid->data; + + ret = regmap_read(d->regmap, BD957X_REG_INT_OVD_STAT, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + rid->opaque = val & OVD_IRQ_VALID_MASK; + *dev_mask = 0; + + if (!(val & OVD_IRQ_VALID_MASK)) + return 0; + + *dev_mask = val & BD9576_xVD_IRQ_MASK_VOUT1TO4; + /* There is 1 bit gap in register after Vout1 .. Vout4 statuses */ + *dev_mask |= ((val & BD9576_xVD_IRQ_MASK_VOUTL1) >> 1); + + for_each_set_bit(i, dev_mask, 5) { + struct bd957x_regulator_data *rdata; + struct regulator_err_state *stat; + + rdata = &d->regulator_data[i]; + stat = &rid->states[i]; + + stat->notifs = rdata->ovd_notif; + stat->errors = rdata->ovd_err; + } + + /* Clear the sub-IRQ status */ + regmap_write(d->regmap, BD957X_REG_INT_OVD_STAT, + OVD_IRQ_VALID_MASK & val); + + return 0; +} + +#define BD9576_DEV_MASK_ALL_REGULATORS 0x3F + +static int bd9576_thermal_handler(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int val, ret, i; + struct bd957x_data *d = (struct bd957x_data *)rid->data; + + ret = regmap_read(d->regmap, BD957X_REG_INT_THERM_STAT, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + if (!(val & BD9576_THERM_IRQ_MASK_TW)) { + *dev_mask = 0; + return 0; + } + + *dev_mask = BD9576_DEV_MASK_ALL_REGULATORS; + + for (i = 0; i < BD9576_NUM_REGULATORS; i++) { + struct bd957x_regulator_data *rdata; + struct regulator_err_state *stat; + + rdata = &d->regulator_data[i]; + stat = &rid->states[i]; + + stat->notifs = rdata->temp_notif; + stat->errors = rdata->temp_err; + } + + /* Clear the sub-IRQ status */ + regmap_write(d->regmap, BD957X_REG_INT_THERM_STAT, + BD9576_THERM_IRQ_MASK_TW); + + return 0; +} + +static int bd957x_probe(struct platform_device *pdev) +{ + int i; + unsigned int num_reg_data; + bool vout_mode, ddr_sel, may_have_irqs = false; + struct regmap *regmap; + struct bd957x_data *ic_data; + struct regulator_config config = { 0 }; + /* All regulators are related to UVD and thermal IRQs... */ + struct regulator_dev *rdevs[BD9576_NUM_REGULATORS]; + /* ...But VoutS1 is not flagged by OVD IRQ */ + struct regulator_dev *ovd_devs[BD9576_NUM_OVD_REGULATORS]; + static const struct regulator_irq_desc bd9576_notif_uvd = { + .name = "bd9576-uvd", + .irq_off_ms = 1000, + .map_event = bd9576_uvd_handler, + .renable = bd9576_uvd_renable, + .data = &bd957x_regulators, + }; + static const struct regulator_irq_desc bd9576_notif_ovd = { + .name = "bd9576-ovd", + .irq_off_ms = 1000, + .map_event = bd9576_ovd_handler, + .renable = bd9576_ovd_renable, + .data = &bd957x_regulators, + }; + static const struct regulator_irq_desc bd9576_notif_temp = { + .name = "bd9576-temp", + .irq_off_ms = 1000, + .map_event = bd9576_thermal_handler, + .renable = bd9576_temp_renable, + .data = &bd957x_regulators, + }; + enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; + + num_reg_data = ARRAY_SIZE(bd957x_regulators.regulator_data); + + ic_data = &bd957x_regulators; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "No regmap\n"); + return -EINVAL; + } + + ic_data->regmap = regmap; + vout_mode = device_property_read_bool(pdev->dev.parent, + "rohm,vout1-en-low"); + if (vout_mode) { + struct gpio_desc *en; + + dev_dbg(&pdev->dev, "GPIO controlled mode\n"); + + /* VOUT1 enable state judged by VOUT1_EN pin */ + /* See if we have GPIO defined */ + en = devm_fwnode_gpiod_get(&pdev->dev, + dev_fwnode(pdev->dev.parent), + "rohm,vout1-en", GPIOD_OUT_LOW, + "vout1-en"); + + /* VOUT1_OPS gpio ctrl */ + /* + * Regulator core prioritizes the ena_gpio over + * enable/disable/is_enabled callbacks so no need to clear them + * even if GPIO is used. So, we can still use same ops. + * + * In theory it is possible someone wants to set vout1-en LOW + * during OTP loading and set VOUT1 to be controlled by GPIO - + * but control the GPIO from some where else than this driver. + * For that to work we should unset the is_enabled callback + * here. + * + * I believe such case where rohm,vout1-en-low is set and + * vout1-en-gpios is not is likely to be a misconfiguration. + * So let's just err out for now. + */ + if (!IS_ERR(en)) + config.ena_gpiod = en; + else + return dev_err_probe(&pdev->dev, PTR_ERR(en), + "Failed to get VOUT1 control GPIO\n"); + } + + /* + * If more than one PMIC needs to be controlled by same processor then + * allocate the regulator data array here and use bd9576_regulators as + * template. At the moment I see no such use-case so I spare some + * bytes and use bd9576_regulators directly for non-constant configs + * like DDR voltage selection. + */ + platform_set_drvdata(pdev, ic_data); + ddr_sel = device_property_read_bool(pdev->dev.parent, + "rohm,ddr-sel-low"); + if (ddr_sel) + ic_data->regulator_data[2].desc.fixed_uV = 1350000; + else + ic_data->regulator_data[2].desc.fixed_uV = 1500000; + + switch (chip) { + case ROHM_CHIP_TYPE_BD9576: + may_have_irqs = true; + dev_dbg(&pdev->dev, "Found BD9576MUF\n"); + break; + case ROHM_CHIP_TYPE_BD9573: + dev_dbg(&pdev->dev, "Found BD9573MUF\n"); + break; + default: + dev_err(&pdev->dev, "Unsupported chip type\n"); + return -EINVAL; + } + + for (i = 0; i < num_reg_data; i++) { + struct regulator_desc *d; + + d = &ic_data->regulator_data[i].desc; + + + if (may_have_irqs) { + if (d->id >= ARRAY_SIZE(bd9576_ops_arr)) + return -EINVAL; + + d->ops = bd9576_ops_arr[d->id]; + } else { + if (d->id >= ARRAY_SIZE(bd9573_ops_arr)) + return -EINVAL; + + d->ops = bd9573_ops_arr[d->id]; + } + } + + config.dev = pdev->dev.parent; + config.regmap = regmap; + config.driver_data = ic_data; + + for (i = 0; i < num_reg_data; i++) { + + struct bd957x_regulator_data *r = &ic_data->regulator_data[i]; + const struct regulator_desc *desc = &r->desc; + + r->rdev = devm_regulator_register(&pdev->dev, desc, + &config); + if (IS_ERR(r->rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(r->rdev), + "failed to register %s regulator\n", + desc->name); + /* + * Clear the VOUT1 GPIO setting - rest of the regulators do not + * support GPIO control + */ + config.ena_gpiod = NULL; + + if (!may_have_irqs) + continue; + + rdevs[i] = r->rdev; + if (i < BD957X_VOUTS1) + ovd_devs[i] = r->rdev; + } + if (may_have_irqs) { + void *ret; + /* + * We can add both the possible error and warning flags here + * because the core uses these only for status clearing and + * if we use warnings - errors are always clear and the other + * way around. We can also add CURRENT flag for all regulators + * because it is never set if it is not supported. Same applies + * to setting UVD for VoutS1 - it is not accidentally cleared + * as it is never set. + */ + int uvd_errs = REGULATOR_ERROR_UNDER_VOLTAGE | + REGULATOR_ERROR_UNDER_VOLTAGE_WARN | + REGULATOR_ERROR_OVER_CURRENT | + REGULATOR_ERROR_OVER_CURRENT_WARN; + int ovd_errs = REGULATOR_ERROR_OVER_VOLTAGE_WARN | + REGULATOR_ERROR_REGULATION_OUT; + int temp_errs = REGULATOR_ERROR_OVER_TEMP | + REGULATOR_ERROR_OVER_TEMP_WARN; + int irq; + + irq = platform_get_irq_byname(pdev, "bd9576-uvd"); + + /* Register notifiers - can fail if IRQ is not given */ + ret = devm_regulator_irq_helper(&pdev->dev, &bd9576_notif_uvd, + irq, 0, uvd_errs, NULL, + &rdevs[0], + BD9576_NUM_REGULATORS); + if (IS_ERR(ret)) { + if (PTR_ERR(ret) == -EPROBE_DEFER) + return -EPROBE_DEFER; + + dev_warn(&pdev->dev, "UVD disabled %pe\n", ret); + } + + irq = platform_get_irq_byname(pdev, "bd9576-ovd"); + + ret = devm_regulator_irq_helper(&pdev->dev, &bd9576_notif_ovd, + irq, 0, ovd_errs, NULL, + &ovd_devs[0], + BD9576_NUM_OVD_REGULATORS); + if (IS_ERR(ret)) { + if (PTR_ERR(ret) == -EPROBE_DEFER) + return -EPROBE_DEFER; + + dev_warn(&pdev->dev, "OVD disabled %pe\n", ret); + } + irq = platform_get_irq_byname(pdev, "bd9576-temp"); + + ret = devm_regulator_irq_helper(&pdev->dev, &bd9576_notif_temp, + irq, 0, temp_errs, NULL, + &rdevs[0], + BD9576_NUM_REGULATORS); + if (IS_ERR(ret)) { + if (PTR_ERR(ret) == -EPROBE_DEFER) + return -EPROBE_DEFER; + + dev_warn(&pdev->dev, "Thermal warning disabled %pe\n", + ret); + } + } + return 0; +} + +static const struct platform_device_id bd957x_pmic_id[] = { + { .name = "bd9573-regulator", .driver_data = ROHM_CHIP_TYPE_BD9573 }, + { .name = "bd9576-regulator", .driver_data = ROHM_CHIP_TYPE_BD9576 }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd957x_pmic_id); + +static struct platform_driver bd957x_regulator = { + .driver = { + .name = "bd957x-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = bd957x_probe, + .id_table = bd957x_pmic_id, +}; + +module_platform_driver(bd957x_regulator); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("ROHM BD9576/BD9573 voltage regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:bd957x-pmic"); diff --git a/drivers/regulator/bd96801-regulator.c b/drivers/regulator/bd96801-regulator.c new file mode 100644 index 000000000..308279b31 --- /dev/null +++ b/drivers/regulator/bd96801-regulator.c @@ -0,0 +1,1352 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2024 ROHM Semiconductors +// bd96801-regulator.c ROHM BD96801 regulator driver + +/* + * This version of the "BD86801 scalable PMIC"'s driver supports only very + * basic set of the PMIC features. Most notably, there is no support for + * the configurations which should be done when the PMIC is in STBY mode. + * + * Being able to reliably do the configurations like changing the + * regulator safety limits (like limits for the over/under -voltages, over + * current, thermal protection) would require the configuring driver to be + * synchronized with entity causing the PMIC state transitions. Eg, one + * should be able to ensure the PMIC is in STBY state when the + * configurations are applied to the hardware. How and when the PMIC state + * transitions are to be done is likely to be very system specific, as will + * be the need to configure these safety limits. Hence it's not simple to + * come up with a generic solution. + * + * Users who require the STBY state configurations can have a look at the + * original RFC: + * https://lore.kernel.org/all/cover.1712920132.git.mazziesaccount@gmail.com/ + * which implements some of the safety limit configurations - but leaves the + * state change handling and synchronization to be implemented. + * + * It would be great to hear (and receive a patch!) if you implement the + * STBY configuration support in your downstream driver ;) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + BD96801_BUCK1, + BD96801_BUCK2, + BD96801_BUCK3, + BD96801_BUCK4, + BD96801_LDO5, + BD96801_LDO6, + BD96801_LDO7, + BD96801_REGULATOR_AMOUNT, +}; + +enum { + BD96801_PROT_OVP, + BD96801_PROT_UVP, + BD96801_PROT_OCP, + BD96801_PROT_TEMP, + BD96801_NUM_PROT, +}; + +#define BD96801_ALWAYS_ON_REG 0x3c +#define BD96801_REG_ENABLE 0x0b +#define BD96801_BUCK1_EN_MASK BIT(0) +#define BD96801_BUCK2_EN_MASK BIT(1) +#define BD96801_BUCK3_EN_MASK BIT(2) +#define BD96801_BUCK4_EN_MASK BIT(3) +#define BD96801_LDO5_EN_MASK BIT(4) +#define BD96801_LDO6_EN_MASK BIT(5) +#define BD96801_LDO7_EN_MASK BIT(6) + +#define BD96801_BUCK1_VSEL_REG 0x28 +#define BD96801_BUCK2_VSEL_REG 0x29 +#define BD96801_BUCK3_VSEL_REG 0x2a +#define BD96801_BUCK4_VSEL_REG 0x2b +#define BD96801_LDO5_VSEL_REG 0x25 +#define BD96801_LDO6_VSEL_REG 0x26 +#define BD96801_LDO7_VSEL_REG 0x27 +#define BD96801_BUCK_VSEL_MASK 0x1F +#define BD96805_BUCK_VSEL_MASK 0x3f +#define BD96801_LDO_VSEL_MASK 0xff + +#define BD96801_MASK_RAMP_DELAY 0xc0 +#define BD96801_INT_VOUT_BASE_REG 0x21 +#define BD96801_BUCK_INT_VOUT_MASK 0xff + +#define BD96801_BUCK_VOLTS 256 +#define BD96805_BUCK_VOLTS 64 +#define BD96801_LDO_VOLTS 256 + +#define BD96801_OVP_MASK 0x03 +#define BD96801_MASK_BUCK1_OVP_SHIFT 0x00 +#define BD96801_MASK_BUCK2_OVP_SHIFT 0x02 +#define BD96801_MASK_BUCK3_OVP_SHIFT 0x04 +#define BD96801_MASK_BUCK4_OVP_SHIFT 0x06 +#define BD96801_MASK_LDO5_OVP_SHIFT 0x00 +#define BD96801_MASK_LDO6_OVP_SHIFT 0x02 +#define BD96801_MASK_LDO7_OVP_SHIFT 0x04 + +#define BD96801_PROT_LIMIT_OCP_MIN 0x00 +#define BD96801_PROT_LIMIT_LOW 0x01 +#define BD96801_PROT_LIMIT_MID 0x02 +#define BD96801_PROT_LIMIT_HI 0x03 + +#define BD96801_REG_BUCK1_OCP 0x32 +#define BD96801_REG_BUCK2_OCP 0x32 +#define BD96801_REG_BUCK3_OCP 0x33 +#define BD96801_REG_BUCK4_OCP 0x33 + +#define BD96801_MASK_BUCK1_OCP_SHIFT 0x00 +#define BD96801_MASK_BUCK2_OCP_SHIFT 0x04 +#define BD96801_MASK_BUCK3_OCP_SHIFT 0x00 +#define BD96801_MASK_BUCK4_OCP_SHIFT 0x04 + +#define BD96801_REG_LDO5_OCP 0x34 +#define BD96801_REG_LDO6_OCP 0x34 +#define BD96801_REG_LDO7_OCP 0x34 + +#define BD96801_MASK_LDO5_OCP_SHIFT 0x00 +#define BD96801_MASK_LDO6_OCP_SHIFT 0x02 +#define BD96801_MASK_LDO7_OCP_SHIFT 0x04 + +#define BD96801_MASK_SHD_INTB BIT(7) +#define BD96801_INTB_FATAL BIT(7) + +#define BD96801_NUM_REGULATORS 7 +#define BD96801_NUM_LDOS 4 + +/* + * Ramp rates for bucks are controlled by bits [7:6] as follows: + * 00 => 1 mV/uS + * 01 => 5 mV/uS + * 10 => 10 mV/uS + * 11 => 20 mV/uS + */ +static const unsigned int buck_ramp_table[] = { 1000, 5000, 10000, 20000 }; + +/* + * This is a voltage range that get's appended to selected + * bd96801_buck_init_volts value. The range from 0x0 to 0xF is actually + * bd96801_buck_init_volts + 0 ... bd96801_buck_init_volts + 150mV + * and the range from 0x10 to 0x1f is bd96801_buck_init_volts - 150mV ... + * bd96801_buck_init_volts - 0. But as the members of linear_range + * are all unsigned I will apply offset of -150 mV to value in + * linear_range - which should increase these ranges with + * 150 mV getting all the values to >= 0. + */ +static const struct linear_range bd96801_tune_volts[] = { + REGULATOR_LINEAR_RANGE(150000, 0x00, 0xF, 10000), + REGULATOR_LINEAR_RANGE(0, 0x10, 0x1F, 10000), +}; + +static const struct linear_range bd96801_buck_init_volts[] = { + REGULATOR_LINEAR_RANGE(500000 - 150000, 0x00, 0xc8, 5000), + REGULATOR_LINEAR_RANGE(1550000 - 150000, 0xc9, 0xec, 50000), + REGULATOR_LINEAR_RANGE(3300000 - 150000, 0xed, 0xff, 0), +}; + +/* BD96802 uses same voltage ranges for bucks as BD96801 */ +#define bd96802_tune_volts bd96801_tune_volts +#define bd96802_buck_init_volts bd96801_buck_init_volts + +/* + * On BD96805 we have similar "negative tuning range" as on BD96801, except + * that the max tuning is -310 ... +310 mV (instead of the 150mV). We use same + * approach as with the BD96801 ranges. + */ +static const struct linear_range bd96805_tune_volts[] = { + REGULATOR_LINEAR_RANGE(310000, 0x00, 0x1F, 10000), + REGULATOR_LINEAR_RANGE(0, 0x20, 0x3F, 10000), +}; + +static const struct linear_range bd96805_buck_init_volts[] = { + REGULATOR_LINEAR_RANGE(500000 - 310000, 0x00, 0xc8, 5000), + REGULATOR_LINEAR_RANGE(1550000 - 310000, 0xc9, 0xec, 50000), + REGULATOR_LINEAR_RANGE(3300000 - 310000, 0xed, 0xff, 0), +}; + +/* BD96806 uses same voltage ranges for bucks as BD96805 */ +#define bd96806_tune_volts bd96805_tune_volts +#define bd96806_buck_init_volts bd96805_buck_init_volts + +static const struct linear_range bd96801_ldo_int_volts[] = { + REGULATOR_LINEAR_RANGE(300000, 0x00, 0x78, 25000), + REGULATOR_LINEAR_RANGE(3300000, 0x79, 0xff, 0), +}; + +#define BD96801_LDO_SD_VOLT_MASK 0x1 +#define BD96801_LDO_MODE_MASK 0x6 +#define BD96801_LDO_MODE_INT 0x0 +#define BD96801_LDO_MODE_SD 0x2 +#define BD96801_LDO_MODE_DDR 0x4 + +static int ldo_ddr_volt_table[] = {500000, 300000}; +static int ldo_sd_volt_table[] = {3300000, 1800000}; + +/* Constant IRQ initialization data (templates) */ +struct bd96801_irqinfo { + int type; + struct regulator_irq_desc irq_desc; + int err_cfg; + int wrn_cfg; + const char *irq_name; +}; + +#define BD96801_IRQINFO(_type, _name, _irqoff_ms, _irqname) \ +{ \ + .type = (_type), \ + .err_cfg = -1, \ + .wrn_cfg = -1, \ + .irq_name = (_irqname), \ + .irq_desc = { \ + .name = (_name), \ + .irq_off_ms = (_irqoff_ms), \ + .map_event = regulator_irq_map_event_simple, \ + }, \ +} + +static const struct bd96801_irqinfo buck1_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-h", 500, + "buck1-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-l", 500, + "buck1-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-n", 500, + "buck1-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck1-over-voltage", 500, + "buck1-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck1-under-voltage", 500, + "buck1-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck1-over-temp", 500, + "buck1-thermal") +}; + +static const struct bd96801_irqinfo buck2_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-h", 500, + "buck2-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-l", 500, + "buck2-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-n", 500, + "buck2-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck2-over-voltage", 500, + "buck2-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck2-under-voltage", 500, + "buck2-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck2-over-temp", 500, + "buck2-thermal") +}; + +static const struct bd96801_irqinfo buck3_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-h", 500, + "buck3-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-l", 500, + "buck3-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-n", 500, + "buck3-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck3-over-voltage", 500, + "buck3-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck3-under-voltage", 500, + "buck3-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck3-over-temp", 500, + "buck3-thermal") +}; + +static const struct bd96801_irqinfo buck4_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-h", 500, + "buck4-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-l", 500, + "buck4-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-n", 500, + "buck4-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck4-over-voltage", 500, + "buck4-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck4-under-voltage", 500, + "buck4-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck4-over-temp", 500, + "buck4-thermal") +}; + +static const struct bd96801_irqinfo ldo5_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo5-overcurr", 500, + "ldo5-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo5-over-voltage", 500, + "ldo5-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo5-under-voltage", 500, + "ldo5-undervolt"), +}; + +static const struct bd96801_irqinfo ldo6_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo6-overcurr", 500, + "ldo6-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo6-over-voltage", 500, + "ldo6-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo6-under-voltage", 500, + "ldo6-undervolt"), +}; + +static const struct bd96801_irqinfo ldo7_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo7-overcurr", 500, + "ldo7-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo7-over-voltage", 500, + "ldo7-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo7-under-voltage", 500, + "ldo7-undervolt"), +}; + +struct bd96801_irq_desc { + struct bd96801_irqinfo *irqinfo; + int num_irqs; +}; + +struct bd96801_regulator_data { + struct regulator_desc desc; + const struct linear_range *init_ranges; + int num_ranges; + struct bd96801_irq_desc irq_desc; + int initial_voltage; + int ldo_vol_lvl; + int ldo_errs; +}; + +struct bd96801_pmic_data { + struct bd96801_regulator_data regulator_data[BD96801_NUM_REGULATORS]; + struct regmap *regmap; + int fatal_ind; + int num_regulators; +}; + +static int ldo_map_notif(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int i; + + for (i = 0; i < rid->num_states; i++) { + const struct bd96801_regulator_data *rdata; + struct regulator_dev *rdev; + + rdev = rid->states[i].rdev; + rdata = container_of_const(rdev->desc, struct bd96801_regulator_data, + desc); + rid->states[i].notifs = regulator_err2notif(rdata->ldo_errs); + rid->states[i].errors = rdata->ldo_errs; + *dev_mask |= BIT(i); + } + return 0; +} + +static int bd96801_list_voltage_lr(struct regulator_dev *rdev, + unsigned int selector) +{ + int voltage; + const struct bd96801_regulator_data *data; + + data = container_of_const(rdev->desc, struct bd96801_regulator_data, desc); + + /* + * The BD096801 has voltage setting in two registers. One giving the + * "initial voltage" (can be changed only when regulator is disabled. + * This driver caches the value and sets it only at startup. The other + * register is voltage tuning value which applies -150 mV ... +150 mV + * offset to the voltage. + * + * Note that the cached initial voltage stored in regulator data is + * 'scaled down' by the 150 mV so that all of our tuning values are + * >= 0. This is done because the linear_ranges uses unsigned values. + * + * As a result, we increase the tuning voltage which we get based on + * the selector by the stored initial_voltage. + */ + voltage = regulator_list_voltage_linear_range(rdev, selector); + if (voltage < 0) + return voltage; + + return voltage + data->initial_voltage; +} + + +static const struct regulator_ops bd96801_ldo_table_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd96801_buck_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd96801_list_voltage_lr, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd96801_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static int buck_get_initial_voltage(struct regmap *regmap, struct device *dev, + struct bd96801_regulator_data *data) +{ + int ret = 0, sel, initial_uv; + int reg = BD96801_INT_VOUT_BASE_REG + data->desc.id; + + if (data->num_ranges) { + ret = regmap_read(regmap, reg, &sel); + sel &= BD96801_BUCK_INT_VOUT_MASK; + + ret = linear_range_get_value_array(data->init_ranges, + data->num_ranges, sel, + &initial_uv); + if (ret) + return ret; + + data->initial_voltage = initial_uv; + dev_dbg(dev, "Tune-scaled initial voltage %u\n", + data->initial_voltage); + } + + return 0; +} + +static int get_ldo_initial_voltage(struct regmap *regmap, + struct device *dev, + struct bd96801_regulator_data *data) +{ + int ret; + int cfgreg; + + ret = regmap_read(regmap, data->ldo_vol_lvl, &cfgreg); + if (ret) + return ret; + + switch (cfgreg & BD96801_LDO_MODE_MASK) { + case BD96801_LDO_MODE_DDR: + data->desc.volt_table = ldo_ddr_volt_table; + data->desc.n_voltages = ARRAY_SIZE(ldo_ddr_volt_table); + break; + case BD96801_LDO_MODE_SD: + data->desc.volt_table = ldo_sd_volt_table; + data->desc.n_voltages = ARRAY_SIZE(ldo_sd_volt_table); + break; + default: + dev_info(dev, "Leaving LDO to normal mode"); + return 0; + } + + /* SD or DDR mode => override default ops */ + data->desc.ops = &bd96801_ldo_table_ops, + data->desc.vsel_mask = 1; + data->desc.vsel_reg = data->ldo_vol_lvl; + + return 0; +} + +static int get_initial_voltage(struct device *dev, struct regmap *regmap, + struct bd96801_regulator_data *data) +{ + /* BUCK */ + if (data->desc.id <= BD96801_BUCK4) + return buck_get_initial_voltage(regmap, dev, data); + + /* LDO */ + return get_ldo_initial_voltage(regmap, dev, data); +} + +static int bd96801_walk_regulator_dt(struct device *dev, struct regmap *regmap, + struct bd96801_regulator_data *data, + int num) +{ + int i, ret; + + struct device_node *nproot __free(device_node) = + of_get_child_by_name(dev->parent->of_node, "regulators"); + if (!nproot) { + dev_err(dev, "failed to find regulators node\n"); + return -ENODEV; + } + for_each_child_of_node_scoped(nproot, np) { + for (i = 0; i < num; i++) { + if (!of_node_name_eq(np, data[i].desc.of_match)) + continue; + /* + * If STBY configs are supported, we must pass node + * here to extract the initial voltages from the DT. + * Thus we do the initial voltage getting in this + * loop. + */ + ret = get_initial_voltage(dev, regmap, &data[i]); + if (ret) { + dev_err(dev, + "Initializing voltages for %s failed\n", + data[i].desc.name); + return ret; + } + + if (of_property_read_bool(np, "rohm,keep-on-stby")) { + ret = regmap_set_bits(regmap, + BD96801_ALWAYS_ON_REG, + 1 << data[i].desc.id); + if (ret) { + dev_err(dev, + "failed to set %s on-at-stby\n", + data[i].desc.name); + return ret; + } + } + } + } + + return 0; +} + +/* + * Template for regulator data. Probe will allocate dynamic / driver instance + * struct so we should be on a safe side even if there were multiple PMICs to + * control. Note that there is a plan to allow multiple PMICs to be used so + * systems can scale better. I am however still slightly unsure how the + * multi-PMIC case will be handled. I don't know if the processor will have I2C + * acces to all of the PMICs or only the first one. I'd guess there will be + * access provided to all PMICs for voltage scaling - but the errors will only + * be informed via the master PMIC. Eg, we should prepare to support multiple + * driver instances - either with or without the IRQs... Well, let's first + * just support the simple and clear single-PMIC setup and ponder the multi PMIC + * case later. What we can easly do for preparing is to not use static global + * data for regulators though. + */ +static const struct bd96801_pmic_data bd96802_data = { + .regulator_data = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK1, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96802_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96802_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK1_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK1_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK1_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .init_ranges = bd96802_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96802_buck_init_volts), + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck1_irqinfo), + }, + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK2, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96802_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96802_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK2_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK2_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK2_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck2_irqinfo), + }, + .init_ranges = bd96802_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96802_buck_init_volts), + }, + }, + .num_regulators = 2, +}; + +static const struct bd96801_pmic_data bd96801_data = { + .regulator_data = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK1, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK1_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK1_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK1_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck1_irqinfo), + }, + }, { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK2, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK2_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK2_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK2_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck2_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK3, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK3_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK3_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK3_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck3_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck3_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK4, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK4_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK4_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK4_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck4_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck4_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO5, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO5_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO5_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo5_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo5_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO5_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("ldo6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO6, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO6_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO6_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo6_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo6_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO6_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo7", + .of_match = of_match_ptr("ldo7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO7, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO7_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO7_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo7_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo7_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO7_VOL_LVL_REG, + }, + }, + .num_regulators = 7, +}; + +static const struct bd96801_pmic_data bd96805_data = { + .regulator_data = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK1, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96805_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK1_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK1_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK1_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .init_ranges = bd96805_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts), + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck1_irqinfo), + }, + }, { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK2, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96805_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK2_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK2_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK2_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck2_irqinfo), + }, + .init_ranges = bd96805_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts), + }, { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK3, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96805_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK3_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK3_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK3_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck3_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck3_irqinfo), + }, + .init_ranges = bd96805_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts), + }, { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK4, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96805_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK4_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK4_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK4_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck4_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck4_irqinfo), + }, + .init_ranges = bd96805_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts), + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO5, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO5_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO5_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo5_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo5_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO5_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("ldo6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO6, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO6_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO6_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo6_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo6_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO6_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo7", + .of_match = of_match_ptr("ldo7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO7, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO7_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO7_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo7_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo7_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO7_VOL_LVL_REG, + }, + }, + .num_regulators = 7, +}; + +static const struct bd96801_pmic_data bd96806_data = { + .regulator_data = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK1, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96806_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96806_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK1_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK1_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK1_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .init_ranges = bd96806_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96806_buck_init_volts), + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck1_irqinfo), + }, + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK2, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96806_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96806_tune_volts), + .n_voltages = BD96805_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK2_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK2_VSEL_REG, + .vsel_mask = BD96805_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK2_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck2_irqinfo), + }, + .init_ranges = bd96806_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96806_buck_init_volts), + }, + }, + .num_regulators = 2, +}; + +static int initialize_pmic_data(struct platform_device *pdev, + struct bd96801_pmic_data *pdata) +{ + struct device *dev = &pdev->dev; + int r, i; + + /* + * Allocate and initialize IRQ data for all of the regulators. We + * wish to modify IRQ information independently for each driver + * instance. + */ + for (r = 0; r < pdata->num_regulators; r++) { + const struct bd96801_irqinfo *template; + struct bd96801_irqinfo *new; + int num_infos; + + template = pdata->regulator_data[r].irq_desc.irqinfo; + num_infos = pdata->regulator_data[r].irq_desc.num_irqs; + + new = devm_kcalloc(dev, num_infos, sizeof(*new), GFP_KERNEL); + if (!new) + return -ENOMEM; + + pdata->regulator_data[r].irq_desc.irqinfo = new; + + for (i = 0; i < num_infos; i++) + new[i] = template[i]; + } + + return 0; +} + +static int bd96801_map_event_all(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int i; + + for (i = 0; i < rid->num_states; i++) { + rid->states[i].notifs = REGULATOR_EVENT_FAIL; + rid->states[i].errors = REGULATOR_ERROR_FAIL; + *dev_mask |= BIT(i); + } + + return 0; +} + +static int bd96801_rdev_errb_irqs(struct platform_device *pdev, + struct regulator_dev *rdev) +{ + int i; + void *retp; + static const char * const single_out_errb_irqs[] = { + "%s-pvin-err", "%s-ovp-err", "%s-uvp-err", "%s-shdn-err", + }; + + for (i = 0; i < ARRAY_SIZE(single_out_errb_irqs); i++) { + struct regulator_irq_desc id = { + .map_event = bd96801_map_event_all, + .irq_off_ms = 1000, + }; + struct regulator_dev *rdev_arr[1]; + char tmp[255]; + int irq; + + snprintf(tmp, 255, single_out_errb_irqs[i], rdev->desc->name); + tmp[254] = 0; + id.name = tmp; + + irq = platform_get_irq_byname(pdev, tmp); + if (irq < 0) + continue; + + rdev_arr[0] = rdev; + retp = devm_regulator_irq_helper(&pdev->dev, &id, irq, 0, + REGULATOR_ERROR_FAIL, NULL, + rdev_arr, 1); + if (IS_ERR(retp)) + return PTR_ERR(retp); + + } + return 0; +} + +static int bd96801_global_errb_irqs(struct platform_device *pdev, + struct regulator_dev **rdev, int num_rdev) +{ + int i, num_irqs; + void *retp; + static const char * const global_errb_irqs[] = { + "otp-err", "dbist-err", "eep-err", "abist-err", "prstb-err", + "drmoserr1", "drmoserr2", "slave-err", "vref-err", "tsd", + "uvlo-err", "ovlo-err", "osc-err", "pon-err", "poff-err", + "cmd-shdn-err", "int-shdn-err" + }; + + num_irqs = ARRAY_SIZE(global_errb_irqs); + for (i = 0; i < num_irqs; i++) { + int irq; + struct regulator_irq_desc id = { + .name = global_errb_irqs[i], + .map_event = bd96801_map_event_all, + .irq_off_ms = 1000, + }; + + irq = platform_get_irq_byname(pdev, global_errb_irqs[i]); + if (irq < 0) + continue; + + retp = devm_regulator_irq_helper(&pdev->dev, &id, irq, 0, + REGULATOR_ERROR_FAIL, NULL, + rdev, num_rdev); + if (IS_ERR(retp)) + return PTR_ERR(retp); + } + + return 0; +} + +static int bd96801_rdev_intb_irqs(struct platform_device *pdev, + struct bd96801_pmic_data *pdata, + struct bd96801_irqinfo *iinfo, + struct regulator_dev *rdev) +{ + struct regulator_dev *rdev_arr[1]; + void *retp; + int err = 0; + int irq; + int err_flags[] = { + [BD96801_PROT_OVP] = REGULATOR_ERROR_REGULATION_OUT, + [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE, + [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT, + [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP, + + }; + int wrn_flags[] = { + [BD96801_PROT_OVP] = REGULATOR_ERROR_OVER_VOLTAGE_WARN, + [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE_WARN, + [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT_WARN, + [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP_WARN, + }; + + /* + * Don't install IRQ handler if both error and warning + * notifications are explicitly disabled + */ + if (!iinfo->err_cfg && !iinfo->wrn_cfg) + return 0; + + if (WARN_ON(iinfo->type >= BD96801_NUM_PROT)) + return -EINVAL; + + if (iinfo->err_cfg) + err = err_flags[iinfo->type]; + else if (iinfo->wrn_cfg) + err = wrn_flags[iinfo->type]; + + iinfo->irq_desc.data = pdata; + irq = platform_get_irq_byname(pdev, iinfo->irq_name); + if (irq < 0) + return irq; + /* Find notifications for this IRQ (WARN/ERR) */ + + rdev_arr[0] = rdev; + retp = devm_regulator_irq_helper(&pdev->dev, + &iinfo->irq_desc, irq, + 0, err, NULL, rdev_arr, + 1); + if (IS_ERR(retp)) + return PTR_ERR(retp); + + return 0; +} + +static int bd96801_probe(struct platform_device *pdev) +{ + struct regulator_dev *ldo_errs_rdev_arr[BD96801_NUM_LDOS]; + struct regulator_dev *all_rdevs[BD96801_NUM_REGULATORS]; + struct bd96801_pmic_data *pdata_template; + struct bd96801_regulator_data *rdesc; + struct regulator_config config = {}; + int ldo_errs_arr[BD96801_NUM_LDOS]; + struct bd96801_pmic_data *pdata; + int temp_notif_ldos = 0; + struct device *parent; + int i, ret; + bool use_errb; + void *retp; + + parent = pdev->dev.parent; + + pdata_template = (struct bd96801_pmic_data *)platform_get_device_id(pdev)->driver_data; + if (!pdata_template) + return -ENODEV; + + pdata = devm_kmemdup(&pdev->dev, pdata_template, sizeof(bd96801_data), + GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + if (initialize_pmic_data(pdev, pdata)) + return -ENOMEM; + + pdata->regmap = dev_get_regmap(parent, NULL); + if (!pdata->regmap) { + dev_err(&pdev->dev, "No register map found\n"); + return -ENODEV; + } + + rdesc = &pdata->regulator_data[0]; + + config.driver_data = pdata; + config.regmap = pdata->regmap; + config.dev = parent; + + ret = of_property_match_string(pdev->dev.parent->of_node, + "interrupt-names", "errb"); + if (ret < 0) + use_errb = false; + else + use_errb = true; + + ret = bd96801_walk_regulator_dt(&pdev->dev, pdata->regmap, rdesc, + pdata->num_regulators); + if (ret) + return ret; + + for (i = 0; i < pdata->num_regulators; i++) { + struct regulator_dev *rdev; + struct bd96801_irq_desc *idesc = &rdesc[i].irq_desc; + int j; + + rdev = devm_regulator_register(&pdev->dev, + &rdesc[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator\n", + rdesc[i].desc.name); + return PTR_ERR(rdev); + } + + all_rdevs[i] = rdev; + /* + * LDOs don't have own temperature monitoring. If temperature + * notification was requested for this LDO from DT then we will + * add the regulator to be notified if central IC temperature + * exceeds threshold. + */ + if (rdesc[i].ldo_errs) { + ldo_errs_rdev_arr[temp_notif_ldos] = rdev; + ldo_errs_arr[temp_notif_ldos] = rdesc[i].ldo_errs; + temp_notif_ldos++; + } + + /* Register INTB handlers for configured protections */ + for (j = 0; j < idesc->num_irqs; j++) { + ret = bd96801_rdev_intb_irqs(pdev, pdata, + &idesc->irqinfo[j], rdev); + if (ret) + return ret; + } + /* Register per regulator ERRB notifiers */ + if (use_errb) { + ret = bd96801_rdev_errb_irqs(pdev, rdev); + if (ret) + return ret; + } + } + if (temp_notif_ldos) { + int irq; + struct regulator_irq_desc tw_desc = { + .name = "core-thermal", + .irq_off_ms = 500, + .map_event = ldo_map_notif, + }; + + irq = platform_get_irq_byname(pdev, "core-thermal"); + if (irq < 0) + return irq; + + retp = devm_regulator_irq_helper(&pdev->dev, &tw_desc, irq, 0, + 0, &ldo_errs_arr[0], + &ldo_errs_rdev_arr[0], + temp_notif_ldos); + if (IS_ERR(retp)) + return PTR_ERR(retp); + } + + if (use_errb) + return bd96801_global_errb_irqs(pdev, all_rdevs, + pdata->num_regulators); + + return 0; +} + +static const struct platform_device_id bd96801_pmic_id[] = { + { .name = "bd96801-regulator", .driver_data = (kernel_ulong_t)&bd96801_data }, + { .name = "bd96802-regulator", .driver_data = (kernel_ulong_t)&bd96802_data }, + { .name = "bd96805-regulator", .driver_data = (kernel_ulong_t)&bd96805_data }, + { .name = "bd96806-regulator", .driver_data = (kernel_ulong_t)&bd96806_data }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd96801_pmic_id); + +static struct platform_driver bd96801_regulator = { + .driver = { + .name = "bd96801-pmic" + }, + .probe = bd96801_probe, + .id_table = bd96801_pmic_id, +}; + +module_platform_driver(bd96801_regulator); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD96801 voltage regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/bq257xx-regulator.c b/drivers/regulator/bq257xx-regulator.c new file mode 100644 index 000000000..577b277ef --- /dev/null +++ b/drivers/regulator/bq257xx-regulator.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * BQ257XX Battery Charger Driver + * Copyright (C) 2025 Chris Morgan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct bq257xx_reg_data { + struct regulator_dev *bq257xx_reg; + struct gpio_desc *otg_en_gpio; + struct regulator_desc desc; +}; + +static int bq25703_vbus_get_cur_limit(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int ret; + unsigned int reg; + + ret = regmap_read(regmap, BQ25703_OTG_CURRENT, ®); + if (ret) + return ret; + return FIELD_GET(BQ25703_OTG_CUR_MASK, reg) * BQ25703_OTG_CUR_STEP_UA; +} + +/* + * Check if the minimum current and maximum current requested are + * sane values, then set the register accordingly. + */ +static int bq25703_vbus_set_cur_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int reg; + + if ((min_uA > BQ25703_OTG_CUR_MAX_UA) || (max_uA < 0)) + return -EINVAL; + + reg = (max_uA / BQ25703_OTG_CUR_STEP_UA); + + /* Catch rounding errors since our step is 50000uA. */ + if ((reg * BQ25703_OTG_CUR_STEP_UA) < min_uA) + return -EINVAL; + + return regmap_write(regmap, BQ25703_OTG_CURRENT, + FIELD_PREP(BQ25703_OTG_CUR_MASK, reg)); +} + +static int bq25703_vbus_enable(struct regulator_dev *rdev) +{ + struct bq257xx_reg_data *pdata = rdev_get_drvdata(rdev); + + if (pdata->otg_en_gpio) + gpiod_set_value_cansleep(pdata->otg_en_gpio, 1); + return regulator_enable_regmap(rdev); +} + +static int bq25703_vbus_disable(struct regulator_dev *rdev) +{ + struct bq257xx_reg_data *pdata = rdev_get_drvdata(rdev); + + if (pdata->otg_en_gpio) + gpiod_set_value_cansleep(pdata->otg_en_gpio, 0); + return regulator_disable_regmap(rdev); +} + +static const struct regulator_ops bq25703_vbus_ops = { + .enable = bq25703_vbus_enable, + .disable = bq25703_vbus_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = bq25703_vbus_get_cur_limit, + .set_current_limit = bq25703_vbus_set_cur_limit, +}; + +static const struct regulator_desc bq25703_vbus_desc = { + .name = "vbus", + .of_match = of_match_ptr("vbus"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &bq25703_vbus_ops, + .min_uV = BQ25703_OTG_VOLT_MIN_UV, + .uV_step = BQ25703_OTG_VOLT_STEP_UV, + .n_voltages = BQ25703_OTG_VOLT_NUM_VOLT, + .enable_mask = BQ25703_EN_OTG_MASK, + .enable_reg = BQ25703_CHARGE_OPTION_3, + .enable_val = BQ25703_EN_OTG_MASK, + .disable_val = 0, + .vsel_reg = BQ25703_OTG_VOLT, + .vsel_mask = BQ25703_OTG_VOLT_MASK, +}; + +/* Get optional GPIO for OTG regulator enable. */ +static void bq257xx_reg_dt_parse_gpio(struct platform_device *pdev) +{ + struct device_node *child, *subchild; + struct bq257xx_reg_data *pdata = platform_get_drvdata(pdev); + + child = of_get_child_by_name(pdev->dev.of_node, + pdata->desc.regulators_node); + if (!child) + return; + + subchild = of_get_child_by_name(child, pdata->desc.of_match); + of_node_put(child); + if (!subchild) + return; + + pdata->otg_en_gpio = devm_fwnode_gpiod_get_index(&pdev->dev, + of_fwnode_handle(subchild), + "enable", 0, + GPIOD_OUT_LOW, + pdata->desc.of_match); + + of_node_put(subchild); + + if (IS_ERR(pdata->otg_en_gpio)) { + if (PTR_ERR(pdata->otg_en_gpio) == -ENOENT) { + /* No GPIO, will only use register writes for OTG */ + pdata->otg_en_gpio = NULL; + return; + } + + dev_err(&pdev->dev, "Error getting enable gpio: %ld\n", + PTR_ERR(pdata->otg_en_gpio)); + return; + } +} + +static int bq257xx_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct bq257xx_reg_data *pdata; + struct regulator_config cfg = {}; + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + pdata = devm_kzalloc(&pdev->dev, sizeof(struct bq257xx_reg_data), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->desc = bq25703_vbus_desc; + + platform_set_drvdata(pdev, pdata); + bq257xx_reg_dt_parse_gpio(pdev); + + cfg.dev = &pdev->dev; + cfg.driver_data = pdata; + cfg.regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!cfg.regmap) + return -ENODEV; + + pdata->bq257xx_reg = devm_regulator_register(dev, &pdata->desc, &cfg); + if (IS_ERR(pdata->bq257xx_reg)) { + return dev_err_probe(&pdev->dev, PTR_ERR(pdata->bq257xx_reg), + "error registering bq257xx regulator"); + } + + return 0; +} + +static struct platform_driver bq257xx_reg_driver = { + .driver = { + .name = "bq257xx-regulator", + }, + .probe = bq257xx_regulator_probe, +}; + +module_platform_driver(bq257xx_reg_driver); + +MODULE_DESCRIPTION("bq257xx regulator driver"); +MODULE_AUTHOR("Chris Morgan "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c new file mode 100644 index 000000000..6a4008f38 --- /dev/null +++ b/drivers/regulator/core.c @@ -0,0 +1,6909 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// core.c -- Voltage/Current Regulator framework. +// +// Copyright 2007, 2008 Wolfson Microelectronics PLC. +// Copyright 2008 SlimLogic Ltd. +// +// Author: Liam Girdwood + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CREATE_TRACE_POINTS +#include + +#include "dummy.h" +#include "internal.h" +#include "regnl.h" + +static DEFINE_WW_CLASS(regulator_ww_class); +static DEFINE_MUTEX(regulator_nesting_mutex); +static DEFINE_MUTEX(regulator_list_mutex); +static LIST_HEAD(regulator_map_list); +static LIST_HEAD(regulator_ena_gpio_list); +static LIST_HEAD(regulator_supply_alias_list); +static LIST_HEAD(regulator_coupler_list); +static bool has_full_constraints; + +static const struct bus_type regulator_bus; + +static struct dentry *debugfs_root; + +/* + * struct regulator_map + * + * Used to provide symbolic supply names to devices. + */ +struct regulator_map { + struct list_head list; + const char *dev_name; /* The dev_name() for the consumer */ + const char *supply; + struct regulator_dev *regulator; +}; + +/* + * struct regulator_enable_gpio + * + * Management for shared enable GPIO pin + */ +struct regulator_enable_gpio { + struct list_head list; + struct gpio_desc *gpiod; + u32 enable_count; /* a number of enabled shared GPIO */ + u32 request_count; /* a number of requested shared GPIO */ +}; + +/* + * struct regulator_supply_alias + * + * Used to map lookups for a supply onto an alternative device. + */ +struct regulator_supply_alias { + struct list_head list; + struct device *src_dev; + const char *src_supply; + struct device *alias_dev; + const char *alias_supply; +}; + +/* + * Work item used to forward regulator events. + * + * @work: workqueue entry + * @rdev: regulator device to notify (consumer receiving the forwarded event) + * @event: event code to be forwarded + */ +struct regulator_event_work { + struct work_struct work; + struct regulator_dev *rdev; + unsigned long event; +}; + +static int _regulator_enable(struct regulator *regulator); +static int _regulator_is_enabled(struct regulator_dev *rdev); +static int _regulator_disable(struct regulator *regulator); +static int _regulator_get_error_flags(struct regulator_dev *rdev, unsigned int *flags); +static int _regulator_get_current_limit(struct regulator_dev *rdev); +static unsigned int _regulator_get_mode(struct regulator_dev *rdev); +static int _notifier_call_chain(struct regulator_dev *rdev, + unsigned long event, void *data); +static int _regulator_do_set_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV); +static int regulator_balance_voltage(struct regulator_dev *rdev, + suspend_state_t state); +static struct regulator *create_regulator(struct regulator_dev *rdev, + struct device *dev, + const char *supply_name); +static void destroy_regulator(struct regulator *regulator); +static void _regulator_put(struct regulator *regulator); + +const char *rdev_get_name(struct regulator_dev *rdev) +{ + if (rdev->constraints && rdev->constraints->name) + return rdev->constraints->name; + else if (rdev->desc->name) + return rdev->desc->name; + else + return ""; +} +EXPORT_SYMBOL_GPL(rdev_get_name); + +static bool have_full_constraints(void) +{ + return has_full_constraints || of_have_populated_dt(); +} + +static bool regulator_ops_is_valid(struct regulator_dev *rdev, int ops) +{ + if (!rdev->constraints) { + rdev_err(rdev, "no constraints\n"); + return false; + } + + if (rdev->constraints->valid_ops_mask & ops) + return true; + + return false; +} + +/** + * regulator_lock_nested - lock a single regulator + * @rdev: regulator source + * @ww_ctx: w/w mutex acquire context + * + * This function can be called many times by one task on + * a single regulator and its mutex will be locked only + * once. If a task, which is calling this function is other + * than the one, which initially locked the mutex, it will + * wait on mutex. + * + * Return: 0 on success or a negative error number on failure. + */ +static inline int regulator_lock_nested(struct regulator_dev *rdev, + struct ww_acquire_ctx *ww_ctx) +{ + bool lock = false; + int ret = 0; + + mutex_lock(®ulator_nesting_mutex); + + if (!ww_mutex_trylock(&rdev->mutex, ww_ctx)) { + if (rdev->mutex_owner == current) + rdev->ref_cnt++; + else + lock = true; + + if (lock) { + mutex_unlock(®ulator_nesting_mutex); + ret = ww_mutex_lock(&rdev->mutex, ww_ctx); + mutex_lock(®ulator_nesting_mutex); + } + } else { + lock = true; + } + + if (lock && ret != -EDEADLK) { + rdev->ref_cnt++; + rdev->mutex_owner = current; + } + + mutex_unlock(®ulator_nesting_mutex); + + return ret; +} + +/** + * regulator_lock - lock a single regulator + * @rdev: regulator source + * + * This function can be called many times by one task on + * a single regulator and its mutex will be locked only + * once. If a task, which is calling this function is other + * than the one, which initially locked the mutex, it will + * wait on mutex. + */ +static void regulator_lock(struct regulator_dev *rdev) +{ + regulator_lock_nested(rdev, NULL); +} + +/** + * regulator_unlock - unlock a single regulator + * @rdev: regulator_source + * + * This function unlocks the mutex when the + * reference counter reaches 0. + */ +static void regulator_unlock(struct regulator_dev *rdev) +{ + mutex_lock(®ulator_nesting_mutex); + + if (--rdev->ref_cnt == 0) { + rdev->mutex_owner = NULL; + ww_mutex_unlock(&rdev->mutex); + } + + WARN_ON_ONCE(rdev->ref_cnt < 0); + + mutex_unlock(®ulator_nesting_mutex); +} + +/** + * regulator_lock_two - lock two regulators + * @rdev1: first regulator + * @rdev2: second regulator + * @ww_ctx: w/w mutex acquire context + * + * Locks both rdevs using the regulator_ww_class. + */ +static void regulator_lock_two(struct regulator_dev *rdev1, + struct regulator_dev *rdev2, + struct ww_acquire_ctx *ww_ctx) +{ + struct regulator_dev *held, *contended; + int ret; + + ww_acquire_init(ww_ctx, ®ulator_ww_class); + + /* Try to just grab both of them */ + ret = regulator_lock_nested(rdev1, ww_ctx); + WARN_ON(ret); + ret = regulator_lock_nested(rdev2, ww_ctx); + if (ret != -EDEADLK) { + WARN_ON(ret); + goto exit; + } + + held = rdev1; + contended = rdev2; + while (true) { + regulator_unlock(held); + + ww_mutex_lock_slow(&contended->mutex, ww_ctx); + contended->ref_cnt++; + contended->mutex_owner = current; + swap(held, contended); + ret = regulator_lock_nested(contended, ww_ctx); + + if (ret != -EDEADLK) { + WARN_ON(ret); + break; + } + } + +exit: + ww_acquire_done(ww_ctx); +} + +/** + * regulator_unlock_two - unlock two regulators + * @rdev1: first regulator + * @rdev2: second regulator + * @ww_ctx: w/w mutex acquire context + * + * The inverse of regulator_lock_two(). + */ + +static void regulator_unlock_two(struct regulator_dev *rdev1, + struct regulator_dev *rdev2, + struct ww_acquire_ctx *ww_ctx) +{ + regulator_unlock(rdev2); + regulator_unlock(rdev1); + ww_acquire_fini(ww_ctx); +} + +static bool regulator_supply_is_couple(struct regulator_dev *rdev) +{ + struct regulator_dev *c_rdev; + int i; + + for (i = 1; i < rdev->coupling_desc.n_coupled; i++) { + c_rdev = rdev->coupling_desc.coupled_rdevs[i]; + + if (rdev->supply->rdev == c_rdev) + return true; + } + + return false; +} + +static void regulator_unlock_recursive(struct regulator_dev *rdev, + unsigned int n_coupled) +{ + struct regulator_dev *c_rdev, *supply_rdev; + int i, supply_n_coupled; + + for (i = n_coupled; i > 0; i--) { + c_rdev = rdev->coupling_desc.coupled_rdevs[i - 1]; + + if (!c_rdev) + continue; + + if (c_rdev->supply && !regulator_supply_is_couple(c_rdev)) { + supply_rdev = c_rdev->supply->rdev; + supply_n_coupled = supply_rdev->coupling_desc.n_coupled; + + regulator_unlock_recursive(supply_rdev, + supply_n_coupled); + } + + regulator_unlock(c_rdev); + } +} + +static int regulator_lock_recursive(struct regulator_dev *rdev, + struct regulator_dev **new_contended_rdev, + struct regulator_dev **old_contended_rdev, + struct ww_acquire_ctx *ww_ctx) +{ + struct regulator_dev *c_rdev; + int i, err; + + for (i = 0; i < rdev->coupling_desc.n_coupled; i++) { + c_rdev = rdev->coupling_desc.coupled_rdevs[i]; + + if (!c_rdev) + continue; + + if (c_rdev != *old_contended_rdev) { + err = regulator_lock_nested(c_rdev, ww_ctx); + if (err) { + if (err == -EDEADLK) { + *new_contended_rdev = c_rdev; + goto err_unlock; + } + + /* shouldn't happen */ + WARN_ON_ONCE(err != -EALREADY); + } + } else { + *old_contended_rdev = NULL; + } + + if (c_rdev->supply && !regulator_supply_is_couple(c_rdev)) { + err = regulator_lock_recursive(c_rdev->supply->rdev, + new_contended_rdev, + old_contended_rdev, + ww_ctx); + if (err) { + regulator_unlock(c_rdev); + goto err_unlock; + } + } + } + + return 0; + +err_unlock: + regulator_unlock_recursive(rdev, i); + + return err; +} + +/** + * regulator_unlock_dependent - unlock regulator's suppliers and coupled + * regulators + * @rdev: regulator source + * @ww_ctx: w/w mutex acquire context + * + * Unlock all regulators related with rdev by coupling or supplying. + */ +static void regulator_unlock_dependent(struct regulator_dev *rdev, + struct ww_acquire_ctx *ww_ctx) +{ + regulator_unlock_recursive(rdev, rdev->coupling_desc.n_coupled); + ww_acquire_fini(ww_ctx); +} + +/** + * regulator_lock_dependent - lock regulator's suppliers and coupled regulators + * @rdev: regulator source + * @ww_ctx: w/w mutex acquire context + * + * This function as a wrapper on regulator_lock_recursive(), which locks + * all regulators related with rdev by coupling or supplying. + */ +static void regulator_lock_dependent(struct regulator_dev *rdev, + struct ww_acquire_ctx *ww_ctx) +{ + struct regulator_dev *new_contended_rdev = NULL; + struct regulator_dev *old_contended_rdev = NULL; + int err; + + mutex_lock(®ulator_list_mutex); + + ww_acquire_init(ww_ctx, ®ulator_ww_class); + + do { + if (new_contended_rdev) { + ww_mutex_lock_slow(&new_contended_rdev->mutex, ww_ctx); + old_contended_rdev = new_contended_rdev; + old_contended_rdev->ref_cnt++; + old_contended_rdev->mutex_owner = current; + } + + err = regulator_lock_recursive(rdev, + &new_contended_rdev, + &old_contended_rdev, + ww_ctx); + + if (old_contended_rdev) + regulator_unlock(old_contended_rdev); + + } while (err == -EDEADLK); + + ww_acquire_done(ww_ctx); + + mutex_unlock(®ulator_list_mutex); +} + +/* Platform voltage constraint check */ +int regulator_check_voltage(struct regulator_dev *rdev, + int *min_uV, int *max_uV) +{ + BUG_ON(*min_uV > *max_uV); + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { + rdev_err(rdev, "voltage operation not allowed\n"); + return -EPERM; + } + + if (*max_uV > rdev->constraints->max_uV) + *max_uV = rdev->constraints->max_uV; + if (*min_uV < rdev->constraints->min_uV) + *min_uV = rdev->constraints->min_uV; + + if (*min_uV > *max_uV) { + rdev_err(rdev, "unsupportable voltage range: %d-%duV\n", + *min_uV, *max_uV); + return -EINVAL; + } + + return 0; +} + +/* return 0 if the state is valid */ +static int regulator_check_states(suspend_state_t state) +{ + return (state > PM_SUSPEND_MAX || state == PM_SUSPEND_TO_IDLE); +} + +/* Make sure we select a voltage that suits the needs of all + * regulator consumers + */ +int regulator_check_consumers(struct regulator_dev *rdev, + int *min_uV, int *max_uV, + suspend_state_t state) +{ + struct regulator *regulator; + struct regulator_voltage *voltage; + + list_for_each_entry(regulator, &rdev->consumer_list, list) { + voltage = ®ulator->voltage[state]; + /* + * Assume consumers that didn't say anything are OK + * with anything in the constraint range. + */ + if (!voltage->min_uV && !voltage->max_uV) + continue; + + if (*max_uV > voltage->max_uV) + *max_uV = voltage->max_uV; + if (*min_uV < voltage->min_uV) + *min_uV = voltage->min_uV; + } + + if (*min_uV > *max_uV) { + rdev_err(rdev, "Restricting voltage, %u-%uuV\n", + *min_uV, *max_uV); + return -EINVAL; + } + + return 0; +} + +/* current constraint check */ +static int regulator_check_current_limit(struct regulator_dev *rdev, + int *min_uA, int *max_uA) +{ + BUG_ON(*min_uA > *max_uA); + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_CURRENT)) { + rdev_err(rdev, "current operation not allowed\n"); + return -EPERM; + } + + if (*max_uA > rdev->constraints->max_uA && + rdev->constraints->max_uA) + *max_uA = rdev->constraints->max_uA; + if (*min_uA < rdev->constraints->min_uA) + *min_uA = rdev->constraints->min_uA; + + if (*min_uA > *max_uA) { + rdev_err(rdev, "unsupportable current range: %d-%duA\n", + *min_uA, *max_uA); + return -EINVAL; + } + + return 0; +} + +/* operating mode constraint check */ +static int regulator_mode_constrain(struct regulator_dev *rdev, + unsigned int *mode) +{ + switch (*mode) { + case REGULATOR_MODE_FAST: + case REGULATOR_MODE_NORMAL: + case REGULATOR_MODE_IDLE: + case REGULATOR_MODE_STANDBY: + break; + default: + rdev_err(rdev, "invalid mode %x specified\n", *mode); + return -EINVAL; + } + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_MODE)) { + rdev_err(rdev, "mode operation not allowed\n"); + return -EPERM; + } + + /* The modes are bitmasks, the most power hungry modes having + * the lowest values. If the requested mode isn't supported + * try higher modes. + */ + while (*mode) { + if (rdev->constraints->valid_modes_mask & *mode) + return 0; + *mode /= 2; + } + + return -EINVAL; +} + +static inline struct regulator_state * +regulator_get_suspend_state(struct regulator_dev *rdev, suspend_state_t state) +{ + if (rdev->constraints == NULL) + return NULL; + + switch (state) { + case PM_SUSPEND_STANDBY: + return &rdev->constraints->state_standby; + case PM_SUSPEND_MEM: + return &rdev->constraints->state_mem; + case PM_SUSPEND_MAX: + return &rdev->constraints->state_disk; + default: + return NULL; + } +} + +static const struct regulator_state * +regulator_get_suspend_state_check(struct regulator_dev *rdev, suspend_state_t state) +{ + const struct regulator_state *rstate; + + rstate = regulator_get_suspend_state(rdev, state); + if (rstate == NULL) + return NULL; + + /* If we have no suspend mode configuration don't set anything; + * only warn if the driver implements set_suspend_voltage or + * set_suspend_mode callback. + */ + if (rstate->enabled != ENABLE_IN_SUSPEND && + rstate->enabled != DISABLE_IN_SUSPEND) { + if (rdev->desc->ops->set_suspend_voltage || + rdev->desc->ops->set_suspend_mode) + rdev_warn(rdev, "No configuration\n"); + return NULL; + } + + return rstate; +} + +static ssize_t microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + int uV; + + regulator_lock(rdev); + uV = regulator_get_voltage_rdev(rdev); + regulator_unlock(rdev); + + if (uV < 0) + return uV; + return sprintf(buf, "%d\n", uV); +} +static DEVICE_ATTR_RO(microvolts); + +static ssize_t microamps_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", _regulator_get_current_limit(rdev)); +} +static DEVICE_ATTR_RO(microamps); + +static ssize_t name_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%s\n", rdev_get_name(rdev)); +} +static DEVICE_ATTR_RO(name); + +static const char *regulator_opmode_to_str(int mode) +{ + switch (mode) { + case REGULATOR_MODE_FAST: + return "fast"; + case REGULATOR_MODE_NORMAL: + return "normal"; + case REGULATOR_MODE_IDLE: + return "idle"; + case REGULATOR_MODE_STANDBY: + return "standby"; + } + return "unknown"; +} + +static ssize_t regulator_print_opmode(char *buf, int mode) +{ + return sprintf(buf, "%s\n", regulator_opmode_to_str(mode)); +} + +static ssize_t opmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_opmode(buf, _regulator_get_mode(rdev)); +} +static DEVICE_ATTR_RO(opmode); + +static ssize_t regulator_print_state(char *buf, int state) +{ + if (state > 0) + return sprintf(buf, "enabled\n"); + else if (state == 0) + return sprintf(buf, "disabled\n"); + else + return sprintf(buf, "unknown\n"); +} + +static ssize_t state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + ssize_t ret; + + regulator_lock(rdev); + ret = regulator_print_state(buf, _regulator_is_enabled(rdev)); + regulator_unlock(rdev); + + return ret; +} +static DEVICE_ATTR_RO(state); + +static ssize_t status_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + int status; + char *label; + + status = rdev->desc->ops->get_status(rdev); + if (status < 0) + return status; + + switch (status) { + case REGULATOR_STATUS_OFF: + label = "off"; + break; + case REGULATOR_STATUS_ON: + label = "on"; + break; + case REGULATOR_STATUS_ERROR: + label = "error"; + break; + case REGULATOR_STATUS_FAST: + label = "fast"; + break; + case REGULATOR_STATUS_NORMAL: + label = "normal"; + break; + case REGULATOR_STATUS_IDLE: + label = "idle"; + break; + case REGULATOR_STATUS_STANDBY: + label = "standby"; + break; + case REGULATOR_STATUS_BYPASS: + label = "bypass"; + break; + case REGULATOR_STATUS_UNDEFINED: + label = "undefined"; + break; + default: + return -ERANGE; + } + + return sprintf(buf, "%s\n", label); +} +static DEVICE_ATTR_RO(status); + +static ssize_t min_microamps_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + if (!rdev->constraints) + return sprintf(buf, "constraint not defined\n"); + + return sprintf(buf, "%d\n", rdev->constraints->min_uA); +} +static DEVICE_ATTR_RO(min_microamps); + +static ssize_t max_microamps_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + if (!rdev->constraints) + return sprintf(buf, "constraint not defined\n"); + + return sprintf(buf, "%d\n", rdev->constraints->max_uA); +} +static DEVICE_ATTR_RO(max_microamps); + +static ssize_t min_microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + if (!rdev->constraints) + return sprintf(buf, "constraint not defined\n"); + + return sprintf(buf, "%d\n", rdev->constraints->min_uV); +} +static DEVICE_ATTR_RO(min_microvolts); + +static ssize_t max_microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + if (!rdev->constraints) + return sprintf(buf, "constraint not defined\n"); + + return sprintf(buf, "%d\n", rdev->constraints->max_uV); +} +static DEVICE_ATTR_RO(max_microvolts); + +static ssize_t requested_microamps_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + struct regulator *regulator; + int uA = 0; + + regulator_lock(rdev); + list_for_each_entry(regulator, &rdev->consumer_list, list) { + if (regulator->enable_count) + uA += regulator->uA_load; + } + regulator_unlock(rdev); + return sprintf(buf, "%d\n", uA); +} +static DEVICE_ATTR_RO(requested_microamps); + +static ssize_t num_users_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + return sprintf(buf, "%d\n", rdev->use_count); +} +static DEVICE_ATTR_RO(num_users); + +static ssize_t type_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + switch (rdev->desc->type) { + case REGULATOR_VOLTAGE: + return sprintf(buf, "voltage\n"); + case REGULATOR_CURRENT: + return sprintf(buf, "current\n"); + } + return sprintf(buf, "unknown\n"); +} +static DEVICE_ATTR_RO(type); + +static ssize_t suspend_mem_microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", rdev->constraints->state_mem.uV); +} +static DEVICE_ATTR_RO(suspend_mem_microvolts); + +static ssize_t suspend_disk_microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", rdev->constraints->state_disk.uV); +} +static DEVICE_ATTR_RO(suspend_disk_microvolts); + +static ssize_t suspend_standby_microvolts_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", rdev->constraints->state_standby.uV); +} +static DEVICE_ATTR_RO(suspend_standby_microvolts); + +static ssize_t suspend_mem_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_opmode(buf, + rdev->constraints->state_mem.mode); +} +static DEVICE_ATTR_RO(suspend_mem_mode); + +static ssize_t suspend_disk_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_opmode(buf, + rdev->constraints->state_disk.mode); +} +static DEVICE_ATTR_RO(suspend_disk_mode); + +static ssize_t suspend_standby_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_opmode(buf, + rdev->constraints->state_standby.mode); +} +static DEVICE_ATTR_RO(suspend_standby_mode); + +static ssize_t suspend_mem_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_state(buf, + rdev->constraints->state_mem.enabled); +} +static DEVICE_ATTR_RO(suspend_mem_state); + +static ssize_t suspend_disk_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_state(buf, + rdev->constraints->state_disk.enabled); +} +static DEVICE_ATTR_RO(suspend_disk_state); + +static ssize_t suspend_standby_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return regulator_print_state(buf, + rdev->constraints->state_standby.enabled); +} +static DEVICE_ATTR_RO(suspend_standby_state); + +static ssize_t bypass_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + const char *report; + bool bypass; + int ret; + + ret = rdev->desc->ops->get_bypass(rdev, &bypass); + + if (ret != 0) + report = "unknown"; + else if (bypass) + report = "enabled"; + else + report = "disabled"; + + return sprintf(buf, "%s\n", report); +} +static DEVICE_ATTR_RO(bypass); + +static ssize_t power_budget_milliwatt_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", rdev->constraints->pw_budget_mW); +} +static DEVICE_ATTR_RO(power_budget_milliwatt); + +static ssize_t power_requested_milliwatt_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", rdev->pw_requested_mW); +} +static DEVICE_ATTR_RO(power_requested_milliwatt); + +#define REGULATOR_ERROR_ATTR(name, bit) \ + static ssize_t name##_show(struct device *dev, struct device_attribute *attr, \ + char *buf) \ + { \ + int ret; \ + unsigned int flags; \ + struct regulator_dev *rdev = dev_get_drvdata(dev); \ + ret = _regulator_get_error_flags(rdev, &flags); \ + if (ret) \ + return ret; \ + return sysfs_emit(buf, "%d\n", !!(flags & (bit))); \ + } \ + static DEVICE_ATTR_RO(name) + +REGULATOR_ERROR_ATTR(under_voltage, REGULATOR_ERROR_UNDER_VOLTAGE); +REGULATOR_ERROR_ATTR(over_current, REGULATOR_ERROR_OVER_CURRENT); +REGULATOR_ERROR_ATTR(regulation_out, REGULATOR_ERROR_REGULATION_OUT); +REGULATOR_ERROR_ATTR(fail, REGULATOR_ERROR_FAIL); +REGULATOR_ERROR_ATTR(over_temp, REGULATOR_ERROR_OVER_TEMP); +REGULATOR_ERROR_ATTR(under_voltage_warn, REGULATOR_ERROR_UNDER_VOLTAGE_WARN); +REGULATOR_ERROR_ATTR(over_current_warn, REGULATOR_ERROR_OVER_CURRENT_WARN); +REGULATOR_ERROR_ATTR(over_voltage_warn, REGULATOR_ERROR_OVER_VOLTAGE_WARN); +REGULATOR_ERROR_ATTR(over_temp_warn, REGULATOR_ERROR_OVER_TEMP_WARN); + +/* Calculate the new optimum regulator operating mode based on the new total + * consumer load. All locks held by caller + */ +static int drms_uA_update(struct regulator_dev *rdev) +{ + struct regulator *sibling; + int current_uA = 0, output_uV, input_uV, err; + unsigned int mode; + + /* + * first check to see if we can set modes at all, otherwise just + * tell the consumer everything is OK. + */ + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_DRMS)) { + rdev_dbg(rdev, "DRMS operation not allowed\n"); + return 0; + } + + if (!rdev->desc->ops->get_optimum_mode && + !rdev->desc->ops->set_load) + return 0; + + if (!rdev->desc->ops->set_mode && + !rdev->desc->ops->set_load) + return -EINVAL; + + /* calc total requested load */ + list_for_each_entry(sibling, &rdev->consumer_list, list) { + if (sibling->enable_count) + current_uA += sibling->uA_load; + } + + current_uA += rdev->constraints->system_load; + + if (rdev->desc->ops->set_load) { + /* set the optimum mode for our new total regulator load */ + err = rdev->desc->ops->set_load(rdev, current_uA); + if (err < 0) + rdev_err(rdev, "failed to set load %d: %pe\n", + current_uA, ERR_PTR(err)); + } else { + /* + * Unfortunately in some cases the constraints->valid_ops has + * REGULATOR_CHANGE_DRMS but there are no valid modes listed. + * That's not really legit but we won't consider it a fatal + * error here. We'll treat it as if REGULATOR_CHANGE_DRMS + * wasn't set. + */ + if (!rdev->constraints->valid_modes_mask) { + rdev_dbg(rdev, "Can change modes; but no valid mode\n"); + return 0; + } + + /* get output voltage */ + output_uV = regulator_get_voltage_rdev(rdev); + + /* + * Don't return an error; if regulator driver cares about + * output_uV then it's up to the driver to validate. + */ + if (output_uV <= 0) + rdev_dbg(rdev, "invalid output voltage found\n"); + + /* get input voltage */ + input_uV = 0; + if (rdev->supply) + input_uV = regulator_get_voltage_rdev(rdev->supply->rdev); + if (input_uV <= 0) + input_uV = rdev->constraints->input_uV; + + /* + * Don't return an error; if regulator driver cares about + * input_uV then it's up to the driver to validate. + */ + if (input_uV <= 0) + rdev_dbg(rdev, "invalid input voltage found\n"); + + /* now get the optimum mode for our new total regulator load */ + mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, + output_uV, current_uA); + + /* check the new mode is allowed */ + err = regulator_mode_constrain(rdev, &mode); + if (err < 0) { + rdev_err(rdev, "failed to get optimum mode @ %d uA %d -> %d uV: %pe\n", + current_uA, input_uV, output_uV, ERR_PTR(err)); + return err; + } + + err = rdev->desc->ops->set_mode(rdev, mode); + if (err < 0) + rdev_err(rdev, "failed to set optimum mode %x: %pe\n", + mode, ERR_PTR(err)); + } + + return err; +} + +static int __suspend_set_state(struct regulator_dev *rdev, + const struct regulator_state *rstate) +{ + int ret = 0; + + if (rstate->enabled == ENABLE_IN_SUSPEND && + rdev->desc->ops->set_suspend_enable) + ret = rdev->desc->ops->set_suspend_enable(rdev); + else if (rstate->enabled == DISABLE_IN_SUSPEND && + rdev->desc->ops->set_suspend_disable) + ret = rdev->desc->ops->set_suspend_disable(rdev); + else /* OK if set_suspend_enable or set_suspend_disable is NULL */ + ret = 0; + + if (ret < 0) { + rdev_err(rdev, "failed to enabled/disable: %pe\n", ERR_PTR(ret)); + return ret; + } + + if (rdev->desc->ops->set_suspend_voltage && rstate->uV > 0) { + ret = rdev->desc->ops->set_suspend_voltage(rdev, rstate->uV); + if (ret < 0) { + rdev_err(rdev, "failed to set voltage: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + if (rdev->desc->ops->set_suspend_mode && rstate->mode > 0) { + ret = rdev->desc->ops->set_suspend_mode(rdev, rstate->mode); + if (ret < 0) { + rdev_err(rdev, "failed to set mode: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + return ret; +} + +static int suspend_set_initial_state(struct regulator_dev *rdev) +{ + const struct regulator_state *rstate; + + rstate = regulator_get_suspend_state_check(rdev, + rdev->constraints->initial_state); + if (!rstate) + return 0; + + return __suspend_set_state(rdev, rstate); +} + +#if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG) +static void print_constraints_debug(struct regulator_dev *rdev) +{ + struct regulation_constraints *constraints = rdev->constraints; + char buf[160] = ""; + size_t len = sizeof(buf) - 1; + int count = 0; + int ret; + + if (constraints->min_uV && constraints->max_uV) { + if (constraints->min_uV == constraints->max_uV) + count += scnprintf(buf + count, len - count, "%d mV ", + constraints->min_uV / 1000); + else + count += scnprintf(buf + count, len - count, + "%d <--> %d mV ", + constraints->min_uV / 1000, + constraints->max_uV / 1000); + } + + if (!constraints->min_uV || + constraints->min_uV != constraints->max_uV) { + ret = regulator_get_voltage_rdev(rdev); + if (ret > 0) + count += scnprintf(buf + count, len - count, + "at %d mV ", ret / 1000); + } + + if (constraints->uV_offset) + count += scnprintf(buf + count, len - count, "%dmV offset ", + constraints->uV_offset / 1000); + + if (constraints->min_uA && constraints->max_uA) { + if (constraints->min_uA == constraints->max_uA) + count += scnprintf(buf + count, len - count, "%d mA ", + constraints->min_uA / 1000); + else + count += scnprintf(buf + count, len - count, + "%d <--> %d mA ", + constraints->min_uA / 1000, + constraints->max_uA / 1000); + } + + if (!constraints->min_uA || + constraints->min_uA != constraints->max_uA) { + ret = _regulator_get_current_limit(rdev); + if (ret > 0) + count += scnprintf(buf + count, len - count, + "at %d mA ", ret / 1000); + } + + if (constraints->valid_modes_mask & REGULATOR_MODE_FAST) + count += scnprintf(buf + count, len - count, "fast "); + if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL) + count += scnprintf(buf + count, len - count, "normal "); + if (constraints->valid_modes_mask & REGULATOR_MODE_IDLE) + count += scnprintf(buf + count, len - count, "idle "); + if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY) + count += scnprintf(buf + count, len - count, "standby "); + + if (constraints->pw_budget_mW) + count += scnprintf(buf + count, len - count, "%d mW budget ", + constraints->pw_budget_mW); + + if (!count) + count = scnprintf(buf, len, "no parameters"); + else + --count; + + count += scnprintf(buf + count, len - count, ", %s", + _regulator_is_enabled(rdev) ? "enabled" : "disabled"); + + rdev_dbg(rdev, "%s\n", buf); +} +#else /* !DEBUG && !CONFIG_DYNAMIC_DEBUG */ +static inline void print_constraints_debug(struct regulator_dev *rdev) {} +#endif /* !DEBUG && !CONFIG_DYNAMIC_DEBUG */ + +static void print_constraints(struct regulator_dev *rdev) +{ + struct regulation_constraints *constraints = rdev->constraints; + + print_constraints_debug(rdev); + + if ((constraints->min_uV != constraints->max_uV) && + !regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) + rdev_warn(rdev, + "Voltage range but no REGULATOR_CHANGE_VOLTAGE\n"); +} + +static int machine_constraints_voltage(struct regulator_dev *rdev, + struct regulation_constraints *constraints) +{ + const struct regulator_ops *ops = rdev->desc->ops; + int ret; + bool apply_uV; + + /* + * Decide up front, from the constraints as handed to us, whether + * apply_uV needs to run below. The clamping pass right after this + * may rewrite constraints->min_uV/max_uV (e.g. the fixed-voltage + * autoconfigure case), and we don't want that to change whether + * apply_uV fires. + */ + apply_uV = rdev->constraints->apply_uV && + rdev->constraints->min_uV && rdev->constraints->max_uV; + + /* + * Constrain machine-level voltage specs to fit the actual range + * supported by this regulator before apply_uV (below) tries to + * force hardware to a value from that range: otherwise apply_uV + * can target a constraint value that doesn't correspond to any + * real voltage selector and fail registration outright, even + * though the clamping pass would have narrowed it to a value + * the regulator can actually hit. + */ + if (ops->list_voltage && rdev->desc->n_voltages) { + int count = rdev->desc->n_voltages; + int i; + int min_uV = INT_MAX; + int max_uV = INT_MIN; + int cmin = constraints->min_uV; + int cmax = constraints->max_uV; + + /* it's safe to autoconfigure fixed-voltage supplies + * and the constraints are used by list_voltage. + */ + if (count == 1 && !cmin) { + cmin = 1; + cmax = INT_MAX; + constraints->min_uV = cmin; + constraints->max_uV = cmax; + } + + /* voltage constraints are optional */ + if ((cmin == 0) && (cmax == 0)) { + /* nothing more to do */ + + /* else require explicit machine-level constraints */ + } else if (cmin <= 0 || cmax <= 0 || cmax < cmin) { + rdev_err(rdev, "invalid voltage constraints\n"); + return -EINVAL; + + /* no need to loop voltages if range is continuous */ + } else if (rdev->desc->continuous_voltage_range) { + /* nothing more to do */ + + } else { + /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */ + for (i = 0; i < count; i++) { + int value; + + value = ops->list_voltage(rdev, i); + if (value <= 0) + continue; + + /* maybe adjust [min_uV..max_uV] */ + if (value >= cmin && value < min_uV) + min_uV = value; + if (value <= cmax && value > max_uV) + max_uV = value; + } + + /* final: [min_uV..max_uV] valid iff constraints valid */ + if (max_uV < min_uV) { + rdev_err(rdev, + "unsupportable voltage constraints %u-%uuV\n", + min_uV, max_uV); + return -EINVAL; + } + + /* use regulator's subset of machine constraints */ + if (constraints->min_uV < min_uV) { + rdev_dbg(rdev, "override min_uV, %d -> %d\n", + constraints->min_uV, min_uV); + constraints->min_uV = min_uV; + } + if (constraints->max_uV > max_uV) { + rdev_dbg(rdev, "override max_uV, %d -> %d\n", + constraints->max_uV, max_uV); + constraints->max_uV = max_uV; + } + } + } + + /* do we need to apply the constraint voltage */ + if (apply_uV) { + int target_min, target_max; + int current_uV = regulator_get_voltage_rdev(rdev); + + if (current_uV == -ENOTRECOVERABLE) { + /* This regulator can't be read and must be initialized */ + rdev_info(rdev, "Setting %d-%duV\n", + rdev->constraints->min_uV, + rdev->constraints->max_uV); + _regulator_do_set_voltage(rdev, + rdev->constraints->min_uV, + rdev->constraints->max_uV); + current_uV = regulator_get_voltage_rdev(rdev); + } + + if (current_uV < 0) { + if (current_uV != -EPROBE_DEFER) + rdev_err(rdev, + "failed to get the current voltage: %pe\n", + ERR_PTR(current_uV)); + return current_uV; + } + + /* + * If we're below the minimum voltage move up to the + * minimum voltage, if we're above the maximum voltage + * then move down to the maximum. + */ + target_min = current_uV; + target_max = current_uV; + + if (current_uV < rdev->constraints->min_uV) { + target_min = rdev->constraints->min_uV; + target_max = rdev->constraints->min_uV; + } + + if (current_uV > rdev->constraints->max_uV) { + target_min = rdev->constraints->max_uV; + target_max = rdev->constraints->max_uV; + } + + if (target_min != current_uV || target_max != current_uV) { + rdev_info(rdev, "Bringing %duV into %d-%duV\n", + current_uV, target_min, target_max); + ret = _regulator_do_set_voltage( + rdev, target_min, target_max); + if (ret < 0) { + rdev_err(rdev, + "failed to apply %d-%duV constraint: %pe\n", + target_min, target_max, ERR_PTR(ret)); + return ret; + } + } + } + + return 0; +} + +static int machine_constraints_current(struct regulator_dev *rdev, + struct regulation_constraints *constraints) +{ + const struct regulator_ops *ops = rdev->desc->ops; + int ret; + + if (!constraints->min_uA && !constraints->max_uA) + return 0; + + if (constraints->min_uA > constraints->max_uA) { + rdev_err(rdev, "Invalid current constraints\n"); + return -EINVAL; + } + + if (!ops->set_current_limit || !ops->get_current_limit) { + rdev_warn(rdev, "Operation of current configuration missing\n"); + return 0; + } + + /* Set regulator current in constraints range */ + ret = ops->set_current_limit(rdev, constraints->min_uA, + constraints->max_uA); + if (ret < 0) { + rdev_err(rdev, "Failed to set current constraint, %d\n", ret); + return ret; + } + + return 0; +} + +static int _regulator_do_enable(struct regulator_dev *rdev); + +static int notif_set_limit(struct regulator_dev *rdev, + int (*set)(struct regulator_dev *, int, int, bool), + int limit, int severity) +{ + bool enable; + + if (limit == REGULATOR_NOTIF_LIMIT_DISABLE) { + enable = false; + limit = 0; + } else { + enable = true; + } + + if (limit == REGULATOR_NOTIF_LIMIT_ENABLE) + limit = 0; + + return set(rdev, limit, severity, enable); +} + +static int handle_notify_limits(struct regulator_dev *rdev, + int (*set)(struct regulator_dev *, int, int, bool), + struct notification_limit *limits) +{ + int ret = 0; + + if (!set) + return -EOPNOTSUPP; + + if (limits->prot) + ret = notif_set_limit(rdev, set, limits->prot, + REGULATOR_SEVERITY_PROT); + if (ret) + return ret; + + if (limits->err) + ret = notif_set_limit(rdev, set, limits->err, + REGULATOR_SEVERITY_ERR); + if (ret) + return ret; + + if (limits->warn) + ret = notif_set_limit(rdev, set, limits->warn, + REGULATOR_SEVERITY_WARN); + + return ret; +} +/** + * set_machine_constraints - sets regulator constraints + * @rdev: regulator source + * @is_locked: whether or not this is called with locks held already + * + * Allows platform initialisation code to define and constrain + * regulator circuits e.g. valid voltage/current ranges, etc. NOTE: + * Constraints *must* be set by platform code in order for some + * regulator operations to proceed i.e. set_voltage, set_current_limit, + * set_mode. + * + * Return: 0 on success or a negative error number on failure. + */ +static int set_machine_constraints(struct regulator_dev *rdev, + bool is_locked) +{ + int ret = 0; + const struct regulator_ops *ops = rdev->desc->ops; + + /* + * If there is no mechanism for controlling the regulator then + * flag it as always_on so we don't end up duplicating checks + * for this so much. Note that we could control the state of + * a supply to control the output on a regulator that has no + * direct control. + */ + if (!rdev->ena_pin && !ops->enable) { + if (rdev->supply_name && !rdev->supply) + return -EPROBE_DEFER; + + if (rdev->supply) + rdev->constraints->always_on = + rdev->supply->rdev->constraints->always_on; + else + rdev->constraints->always_on = true; + } + + /* + * If we want to enable this regulator, make sure that we know the + * supplying regulator. + */ + if (rdev->constraints->always_on || rdev->constraints->boot_on) { + if (rdev->supply_name && !rdev->supply) + return -EPROBE_DEFER; + } + + ret = machine_constraints_voltage(rdev, rdev->constraints); + if (ret != 0) + return ret; + + ret = machine_constraints_current(rdev, rdev->constraints); + if (ret != 0) + return ret; + + if (rdev->constraints->ilim_uA && ops->set_input_current_limit) { + ret = ops->set_input_current_limit(rdev, + rdev->constraints->ilim_uA); + if (ret < 0) { + rdev_err(rdev, "failed to set input limit: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + /* do we need to setup our suspend state */ + if (rdev->constraints->initial_state) { + ret = suspend_set_initial_state(rdev); + if (ret < 0) { + rdev_err(rdev, "failed to set suspend state: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + if (rdev->constraints->initial_mode) { + if (!ops->set_mode) { + rdev_err(rdev, "no set_mode operation\n"); + return -EINVAL; + } + + ret = ops->set_mode(rdev, rdev->constraints->initial_mode); + if (ret < 0) { + rdev_err(rdev, "failed to set initial mode: %pe\n", ERR_PTR(ret)); + return ret; + } + } else if (rdev->constraints->system_load) { + /* + * We'll only apply the initial system load if an + * initial mode wasn't specified. + */ + drms_uA_update(rdev); + } + + if ((rdev->constraints->ramp_delay || rdev->constraints->ramp_disable) + && ops->set_ramp_delay) { + ret = ops->set_ramp_delay(rdev, rdev->constraints->ramp_delay); + if (ret < 0) { + rdev_err(rdev, "failed to set ramp_delay: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + if (rdev->constraints->pull_down && ops->set_pull_down) { + ret = ops->set_pull_down(rdev); + if (ret < 0) { + rdev_err(rdev, "failed to set pull down: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + if (rdev->constraints->soft_start && ops->set_soft_start) { + ret = ops->set_soft_start(rdev); + if (ret < 0) { + rdev_err(rdev, "failed to set soft start: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + /* + * Existing logic does not warn if over_current_protection is given as + * a constraint but driver does not support that. I think we should + * warn about this type of issues as it is possible someone changes + * PMIC on board to another type - and the other PMIC's driver does + * not support setting protection. Board composer may happily believe + * the DT limits are respected - especially if the new PMIC HW also + * supports protection but the driver does not. I won't change the logic + * without hearing more experienced opinion on this though. + * + * If warning is seen as a good idea then we can merge handling the + * over-curret protection and detection and get rid of this special + * handling. + */ + if (rdev->constraints->over_current_protection + && ops->set_over_current_protection) { + int lim = rdev->constraints->over_curr_limits.prot; + + ret = ops->set_over_current_protection(rdev, lim, + REGULATOR_SEVERITY_PROT, + true); + if (ret < 0) { + rdev_err(rdev, "failed to set over current protection: %pe\n", + ERR_PTR(ret)); + return ret; + } + } + + if (rdev->constraints->over_current_detection) + ret = handle_notify_limits(rdev, + ops->set_over_current_protection, + &rdev->constraints->over_curr_limits); + if (ret) { + if (ret != -EOPNOTSUPP) { + rdev_err(rdev, "failed to set over current limits: %pe\n", + ERR_PTR(ret)); + return ret; + } + rdev_warn(rdev, + "IC does not support requested over-current limits\n"); + } + + if (rdev->constraints->over_voltage_detection) + ret = handle_notify_limits(rdev, + ops->set_over_voltage_protection, + &rdev->constraints->over_voltage_limits); + if (ret) { + if (ret != -EOPNOTSUPP) { + rdev_err(rdev, "failed to set over voltage limits %pe\n", + ERR_PTR(ret)); + return ret; + } + rdev_warn(rdev, + "IC does not support requested over voltage limits\n"); + } + + if (rdev->constraints->under_voltage_detection) + ret = handle_notify_limits(rdev, + ops->set_under_voltage_protection, + &rdev->constraints->under_voltage_limits); + if (ret) { + if (ret != -EOPNOTSUPP) { + rdev_err(rdev, "failed to set under voltage limits %pe\n", + ERR_PTR(ret)); + return ret; + } + rdev_warn(rdev, + "IC does not support requested under voltage limits\n"); + } + + if (rdev->constraints->over_temp_detection) + ret = handle_notify_limits(rdev, + ops->set_thermal_protection, + &rdev->constraints->temp_limits); + if (ret) { + if (ret != -EOPNOTSUPP) { + rdev_err(rdev, "failed to set temperature limits %pe\n", + ERR_PTR(ret)); + return ret; + } + rdev_warn(rdev, + "IC does not support requested temperature limits\n"); + } + + if (rdev->constraints->active_discharge && ops->set_active_discharge) { + bool ad_state = rdev->constraints->active_discharge == + REGULATOR_ACTIVE_DISCHARGE_ENABLE; + + ret = ops->set_active_discharge(rdev, ad_state); + if (ret < 0) { + rdev_err(rdev, "failed to set active discharge: %pe\n", ERR_PTR(ret)); + return ret; + } + } + + /* If the constraints say the regulator should be on at this point + * and we have control then make sure it is enabled. + */ + if (rdev->constraints->always_on || rdev->constraints->boot_on) { + bool supply_enabled = false; + + /* We have ensured a potential supply has been resolved above. + * + * If supplying regulator has already been enabled, + * it's not intended to have use_count increment + * when rdev is only boot-on. + */ + if (rdev->supply && + (rdev->constraints->always_on || + !regulator_is_enabled(rdev->supply))) { + ret = (is_locked + ? _regulator_enable(rdev->supply) + : regulator_enable(rdev->supply)); + if (ret < 0) { + _regulator_put(rdev->supply); + rdev->supply = NULL; + return ret; + } + supply_enabled = true; + } + + ret = _regulator_do_enable(rdev); + if (ret < 0 && ret != -EINVAL) { + rdev_err(rdev, "failed to enable: %pe\n", ERR_PTR(ret)); + if (supply_enabled) + regulator_disable(rdev->supply); + return ret; + } + + if (rdev->constraints->always_on) + rdev->use_count++; + } else if (rdev->desc->off_on_delay) { + rdev->last_off = ktime_get(); + } + + if (!rdev->constraints->pw_budget_mW) + rdev->constraints->pw_budget_mW = INT_MAX; + + print_constraints(rdev); + return 0; +} + +/** + * regulator_event_work_fn - process a deferred regulator event + * @work: work_struct queued by the notifier + * + * Calls the regulator's notifier chain in process context while holding + * the rdev lock, then releases the device reference. + */ +static void regulator_event_work_fn(struct work_struct *work) +{ + struct regulator_event_work *rew = + container_of(work, struct regulator_event_work, work); + struct regulator_dev *rdev = rew->rdev; + int ret; + + regulator_lock(rdev); + ret = regulator_notifier_call_chain(rdev, rew->event, NULL); + regulator_unlock(rdev); + if (ret == NOTIFY_BAD) + dev_err(rdev_get_dev(rdev), "failed to forward regulator event\n"); + + put_device(rdev_get_dev(rdev)); + kfree(rew); +} + +/** + * regulator_event_forward_notifier - notifier callback for supply events + * @nb: notifier block embedded in the regulator + * @event: regulator event code + * @data: unused + * + * Packages the event into a work item and schedules it in process context. + * Takes a reference on @rdev->dev to pin the regulator until the work + * completes (see put_device() in the worker). + * + * Return: NOTIFY_OK on success, NOTIFY_DONE for events that are not forwarded. + */ +static int regulator_event_forward_notifier(struct notifier_block *nb, + unsigned long event, + void __always_unused *data) +{ + struct regulator_dev *rdev = container_of(nb, struct regulator_dev, + supply_fwd_nb); + struct regulator_event_work *rew; + + switch (event) { + case REGULATOR_EVENT_UNDER_VOLTAGE: + break; + default: + /* Only forward allowed events downstream. */ + return NOTIFY_DONE; + } + + rew = kmalloc_obj(*rew, GFP_ATOMIC); + if (!rew) + return NOTIFY_DONE; + + get_device(rdev_get_dev(rdev)); + rew->rdev = rdev; + rew->event = event; + INIT_WORK(&rew->work, regulator_event_work_fn); + + queue_work(system_highpri_wq, &rew->work); + + return NOTIFY_OK; +} + +/** + * register_regulator_event_forwarding - enable supply event forwarding + * @rdev: regulator device + * + * Registers a notifier on the regulator's supply so that supply events + * are forwarded to the consumer regulator via the deferred work handler. + * + * Return: 0 on success, -EALREADY if already enabled, or a negative error code. + */ +static int register_regulator_event_forwarding(struct regulator_dev *rdev) +{ + int ret; + + if (!rdev->supply) + return 0; /* top-level regulator: nothing to forward */ + + if (rdev->supply_fwd_nb.notifier_call) + return -EALREADY; + + rdev->supply_fwd_nb.notifier_call = regulator_event_forward_notifier; + + ret = regulator_register_notifier(rdev->supply, &rdev->supply_fwd_nb); + if (ret) { + dev_err(&rdev->dev, "failed to register supply notifier: %pe\n", + ERR_PTR(ret)); + rdev->supply_fwd_nb.notifier_call = NULL; + return ret; + } + + return 0; +} + +static void unregister_regulator_event_forwarding(struct regulator_dev *rdev) +{ + if (!rdev->supply_fwd_nb.notifier_call) + return; + + regulator_unregister_notifier(rdev->supply, &rdev->supply_fwd_nb); + rdev->supply_fwd_nb.notifier_call = NULL; +} + +/** + * set_supply - set regulator supply regulator + * @rdev: regulator (locked) + * @supply_rdev: supply regulator (locked)) + * + * Called by platform initialisation code to set the supply regulator for this + * regulator. This ensures that a regulators supply will also be enabled by the + * core if it's child is enabled. + * + * Return: 0 on success or a negative error number on failure. + */ +static int set_supply(struct regulator_dev *rdev, + struct regulator_dev *supply_rdev) +{ + int err; + + rdev_dbg(rdev, "supplied by %s\n", rdev_get_name(supply_rdev)); + + if (!try_module_get(supply_rdev->owner)) + return -ENODEV; + + rdev->supply = create_regulator(supply_rdev, &rdev->dev, "SUPPLY"); + if (rdev->supply == NULL) { + module_put(supply_rdev->owner); + err = -ENOMEM; + return err; + } + supply_rdev->open_count++; + + return 0; +} + +/** + * set_consumer_device_supply - Bind a regulator to a symbolic supply + * @rdev: regulator source + * @consumer_dev_name: dev_name() string for device supply applies to + * @supply: symbolic name for supply + * + * Allows platform initialisation code to map physical regulator + * sources to symbolic names for supplies for use by devices. Devices + * should use these symbolic names to request regulators, avoiding the + * need to provide board-specific regulator names as platform data. + * + * Return: 0 on success or a negative error number on failure. + */ +static int set_consumer_device_supply(struct regulator_dev *rdev, + const char *consumer_dev_name, + const char *supply) +{ + struct regulator_map *node, *new_node; + int has_dev; + + if (supply == NULL) + return -EINVAL; + + if (consumer_dev_name != NULL) + has_dev = 1; + else + has_dev = 0; + + new_node = kzalloc_obj(struct regulator_map); + if (new_node == NULL) + return -ENOMEM; + + new_node->regulator = rdev; + new_node->supply = supply; + + if (has_dev) { + new_node->dev_name = kstrdup(consumer_dev_name, GFP_KERNEL); + if (new_node->dev_name == NULL) { + kfree(new_node); + return -ENOMEM; + } + } + + mutex_lock(®ulator_list_mutex); + list_for_each_entry(node, ®ulator_map_list, list) { + if (node->dev_name && consumer_dev_name) { + if (strcmp(node->dev_name, consumer_dev_name) != 0) + continue; + } else if (node->dev_name || consumer_dev_name) { + continue; + } + + if (strcmp(node->supply, supply) != 0) + continue; + + pr_debug("%s: %s/%s is '%s' supply; fail %s/%s\n", + consumer_dev_name, + dev_name(&node->regulator->dev), + node->regulator->desc->name, + supply, + dev_name(&rdev->dev), rdev_get_name(rdev)); + goto fail; + } + + list_add(&new_node->list, ®ulator_map_list); + mutex_unlock(®ulator_list_mutex); + + return 0; + +fail: + mutex_unlock(®ulator_list_mutex); + kfree(new_node->dev_name); + kfree(new_node); + return -EBUSY; +} + +static void unset_regulator_supplies(struct regulator_dev *rdev) +{ + struct regulator_map *node, *n; + + list_for_each_entry_safe(node, n, ®ulator_map_list, list) { + if (rdev == node->regulator) { + list_del(&node->list); + kfree(node->dev_name); + kfree(node); + } + } +} + +#ifdef CONFIG_DEBUG_FS +static ssize_t constraint_flags_read_file(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + const struct regulator *regulator = file->private_data; + const struct regulation_constraints *c = regulator->rdev->constraints; + char *buf; + ssize_t ret; + + if (!c) + return 0; + + buf = kmalloc(PAGE_SIZE, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = snprintf(buf, PAGE_SIZE, + "always_on: %u\n" + "boot_on: %u\n" + "apply_uV: %u\n" + "ramp_disable: %u\n" + "soft_start: %u\n" + "pull_down: %u\n" + "over_current_protection: %u\n", + c->always_on, + c->boot_on, + c->apply_uV, + c->ramp_disable, + c->soft_start, + c->pull_down, + c->over_current_protection); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); + kfree(buf); + + return ret; +} + +#endif + +static const struct file_operations constraint_flags_fops = { +#ifdef CONFIG_DEBUG_FS + .open = simple_open, + .read = constraint_flags_read_file, + .llseek = default_llseek, +#endif +}; + +static void link_and_create_debugfs(struct regulator *regulator, struct regulator_dev *rdev, + struct device *dev) +{ + int err = 0; + + if (dev) { + regulator->dev = dev; + + /* Add a link to the device sysfs entry */ + err = sysfs_create_link_nowarn(&rdev->dev.kobj, &dev->kobj, + regulator->supply_name); + if (err) { + rdev_dbg(rdev, "could not add device link %s: %pe\n", + dev->kobj.name, ERR_PTR(err)); + /* non-fatal */ + } + } + + if (err != -EEXIST) { + regulator->debugfs = debugfs_create_dir(regulator->supply_name, rdev->debugfs); + if (IS_ERR(regulator->debugfs)) { + rdev_dbg(rdev, "Failed to create debugfs directory\n"); + regulator->debugfs = NULL; + } + } + + if (regulator->debugfs) { + debugfs_create_u32("uA_load", 0444, regulator->debugfs, + ®ulator->uA_load); + debugfs_create_u32("min_uV", 0444, regulator->debugfs, + ®ulator->voltage[PM_SUSPEND_ON].min_uV); + debugfs_create_u32("max_uV", 0444, regulator->debugfs, + ®ulator->voltage[PM_SUSPEND_ON].max_uV); + debugfs_create_file("constraint_flags", 0444, regulator->debugfs, + regulator, &constraint_flags_fops); + } +} + +static struct regulator *create_regulator(struct regulator_dev *rdev, + struct device *dev, + const char *supply_name) +{ + struct regulator *regulator; + + lockdep_assert_held_once(&rdev->mutex.base); + + if (dev) { + supply_name = kasprintf(GFP_KERNEL, "%s-%s", dev->kobj.name, supply_name); + if (supply_name == NULL) + return NULL; + } else { + supply_name = kstrdup_const(supply_name, GFP_KERNEL); + if (supply_name == NULL) + return NULL; + } + + regulator = kzalloc_obj(*regulator); + if (regulator == NULL) { + kfree_const(supply_name); + return NULL; + } + + regulator->rdev = rdev; + regulator->supply_name = supply_name; + + list_add(®ulator->list, &rdev->consumer_list); + + /* + * Check now if the regulator is an always on regulator - if + * it is then we don't need to do nearly so much work for + * enable/disable calls. + */ + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS) && + _regulator_is_enabled(rdev)) + regulator->always_on = true; + + return regulator; +} + +static int _regulator_get_enable_time(struct regulator_dev *rdev) +{ + if (rdev->constraints && rdev->constraints->enable_time) + return rdev->constraints->enable_time; + if (rdev->desc->ops->enable_time) + return rdev->desc->ops->enable_time(rdev); + return rdev->desc->enable_time; +} + +static struct regulator_supply_alias *regulator_find_supply_alias( + struct device *dev, const char *supply) +{ + struct regulator_supply_alias *map; + + list_for_each_entry(map, ®ulator_supply_alias_list, list) + if (map->src_dev == dev && strcmp(map->src_supply, supply) == 0) + return map; + + return NULL; +} + +static void regulator_supply_alias(struct device **dev, const char **supply) +{ + struct regulator_supply_alias *map; + + mutex_lock(®ulator_list_mutex); + map = regulator_find_supply_alias(*dev, *supply); + if (map) { + dev_dbg(*dev, "Mapping supply %s to %s,%s\n", + *supply, map->alias_supply, + dev_name(map->alias_dev)); + *dev = map->alias_dev; + *supply = map->alias_supply; + } + mutex_unlock(®ulator_list_mutex); +} + +static int regulator_match(struct device *dev, const void *data) +{ + struct regulator_dev *r = dev_to_rdev(dev); + + return strcmp(rdev_get_name(r), data) == 0; +} + +static struct regulator_dev *regulator_lookup_by_name(const char *name) +{ + struct device *dev; + + dev = class_find_device(®ulator_class, NULL, name, regulator_match); + + return dev ? dev_to_rdev(dev) : NULL; +} + +static struct regulator_dev *regulator_dt_lookup(struct device *dev, + const char *supply) +{ + struct regulator_dev *r = NULL; + + if (dev_of_node(dev)) { + r = of_regulator_dev_lookup(dev, dev_of_node(dev), supply); + if (PTR_ERR(r) == -ENODEV) + r = NULL; + } + + return r; +} + +/** + * regulator_dev_lookup - lookup a regulator device. + * @dev: device for regulator "consumer". + * @supply: Supply name or regulator ID. + * + * Return: pointer to &struct regulator_dev or ERR_PTR() encoded negative error number. + * + * If successful, returns a struct regulator_dev that corresponds to the name + * @supply and with the embedded struct device refcount incremented by one. + * The refcount must be dropped by calling put_device(). + * On failure one of the following ERR_PTR() encoded values is returned: + * -%ENODEV if lookup fails permanently, -%EPROBE_DEFER if lookup could succeed + * in the future. + */ +static struct regulator_dev *regulator_dev_lookup(struct device *dev, + const char *supply) +{ + struct regulator_dev *r = NULL; + struct regulator_map *map; + const char *devname = NULL; + + regulator_supply_alias(&dev, &supply); + + /* first do a dt based lookup */ + r = regulator_dt_lookup(dev, supply); + if (r) + return r; + + /* if not found, try doing it non-dt way */ + if (dev) + devname = dev_name(dev); + + mutex_lock(®ulator_list_mutex); + list_for_each_entry(map, ®ulator_map_list, list) { + /* If the mapping has a device set up it must match */ + if (map->dev_name && + (!devname || strcmp(map->dev_name, devname))) + continue; + + if (strcmp(map->supply, supply) == 0 && + get_device(&map->regulator->dev)) { + r = map->regulator; + break; + } + } + mutex_unlock(®ulator_list_mutex); + + if (r) + return r; + + r = regulator_lookup_by_name(supply); + if (r) + return r; + + return ERR_PTR(-ENODEV); +} + +static int regulator_resolve_supply(struct regulator_dev *rdev) +{ + struct regulator_dev *r; + struct device *dev = rdev->dev.parent; + struct ww_acquire_ctx ww_ctx; + struct regulator *supply; + bool do_final_setup; + int ret = 0; + + /* No supply to resolve? */ + if (!rdev->supply_name) + return 0; + + /* Supply already resolved? (fast-path without locking contention) */ + if (rdev->supply && !rdev->constraints_pending) + return 0; + + /* first do a dt based lookup on the node described in the virtual + * device. + */ + r = regulator_dt_lookup(&rdev->dev, rdev->supply_name); + + /* If regulator not found use usual search path in the parent + * device. + */ + if (!r) + r = regulator_dev_lookup(dev, rdev->supply_name); + + if (IS_ERR(r)) { + ret = PTR_ERR(r); + + /* Did the lookup explicitly defer for us? */ + if (ret == -EPROBE_DEFER) + goto out; + + if (have_full_constraints()) { + r = dummy_regulator_rdev; + if (!r) { + ret = -EPROBE_DEFER; + goto out; + } + get_device(&r->dev); + } else { + dev_err(dev, "Failed to resolve %s-supply for %s\n", + rdev->supply_name, rdev->desc->name); + ret = -EPROBE_DEFER; + goto out; + } + } + + if (r == rdev) { + dev_err(dev, "Supply for %s (%s) resolved to itself\n", + rdev->desc->name, rdev->supply_name); + if (!have_full_constraints()) { + ret = -EINVAL; + goto out; + } + r = dummy_regulator_rdev; + if (!r) { + ret = -EPROBE_DEFER; + goto out; + } + get_device(&r->dev); + } + + /* + * If the supply's parent device is not the same as the + * regulator's parent device, then ensure the parent device + * is bound before we resolve the supply, in case the parent + * device get probe deferred and unregisters the supply. + */ + if (r->dev.parent && r->dev.parent != rdev->dev.parent) { + if (!device_is_bound(r->dev.parent)) { + put_device(&r->dev); + ret = -EPROBE_DEFER; + goto out; + } + } + + /* Recursively resolve the supply of the supply */ + ret = regulator_resolve_supply(r); + if (ret < 0) { + put_device(&r->dev); + goto out; + } + + /* + * Recheck rdev->supply with rdev->mutex lock held to avoid a race + * between rdev->supply null check and setting rdev->supply in + * set_supply() from concurrent tasks. + */ + regulator_lock_two(rdev, r, &ww_ctx); + + /* Supply just resolved by a concurrent task? */ + if (rdev->supply) { + /* Constraints might still be pending due to concurrency. */ + bool done = !rdev->constraints_pending; + + supply = rdev->supply; + + regulator_unlock_two(rdev, r, &ww_ctx); + put_device(&r->dev); + + /* + * Supply resolved by concurrent task, and constraints set as + * well (or not required): fast path. + */ + if (done) + goto out; + + do_final_setup = false; + } else { + ret = set_supply(rdev, r); + if (ret < 0) { + regulator_unlock_two(rdev, r, &ww_ctx); + put_device(&r->dev); + goto out; + } + + supply = rdev->supply; + + /* + * Automatically register for event forwarding from the new + * supply. This creates the downstream propagation link for + * events like under-voltage. + */ + ret = register_regulator_event_forwarding(rdev); + if (ret < 0) { + rdev_warn(rdev, + "Failed to register event forwarding: %pe\n", + ERR_PTR(ret)); + + goto unset_supply; + } + + regulator_unlock_two(rdev, r, &ww_ctx); + + do_final_setup = true; + } + + /* + * Now that we have the supply, we can retry setting the machine + * constraints, if necessary. + */ + regulator_lock_dependent(rdev, &ww_ctx); + if (rdev->constraints_pending) { + if (!rdev->supply) { + /* + * Supply could have been released by another task that + * failed to set the constraints or event forwarding. + */ + regulator_unlock_dependent(rdev, &ww_ctx); + ret = -EPROBE_DEFER; + goto out; + } + + ret = set_machine_constraints(rdev, true); + if (ret < 0) { + regulator_unlock_dependent(rdev, &ww_ctx); + + rdev_warn(rdev, + "Failed to set machine constraints: %pe\n", + ERR_PTR(ret)); + + regulator_lock_two(rdev, r, &ww_ctx); + + if (supply != rdev->supply) { + /* + * Supply could have been released by another + * task that got here before us. If it did, it + * will have released 'supply' (i.e. the + * previous rdev->supply) and we shouldn't do + * that again via unset_supply. + */ + regulator_unlock_two(rdev, r, &ww_ctx); + goto out; + } + + unregister_regulator_event_forwarding(rdev); + rdev->constraints_pending = true; + goto unset_supply; + } + rdev->constraints_pending = false; + } + regulator_unlock_dependent(rdev, &ww_ctx); + + if (!do_final_setup) + goto out; + + /* rdev->supply was created in set_supply() */ + link_and_create_debugfs(rdev->supply, rdev->supply->rdev, &rdev->dev); + +out: + return ret; + +unset_supply: + lockdep_assert_held_once(&rdev->mutex.base); + lockdep_assert_held_once(&r->mutex.base); + rdev->supply = NULL; + regulator_unlock_two(rdev, supply->rdev, &ww_ctx); + + regulator_put(supply); + + return ret; +} + +/* common pre-checks for regulator requests */ +int _regulator_get_common_check(struct device *dev, const char *id, + enum regulator_get_type get_type) +{ + if (get_type >= MAX_GET_TYPE) { + dev_err(dev, "invalid type %d in %s\n", get_type, __func__); + return -EINVAL; + } + + if (id == NULL) { + dev_err(dev, "regulator request with no identifier\n"); + return -EINVAL; + } + + return 0; +} + +/** + * _regulator_get_common - Common code for regulator requests + * @rdev: regulator device pointer as returned by *regulator_dev_lookup() + * Its reference count is expected to have been incremented. + * @dev: device used for dev_printk messages + * @id: Supply name or regulator ID + * @get_type: enum regulator_get_type value corresponding to type of request + * + * Returns: pointer to struct regulator corresponding to @rdev, or ERR_PTR() + * encoded error. + * + * This function should be chained with *regulator_dev_lookup() functions. + */ +struct regulator *_regulator_get_common(struct regulator_dev *rdev, struct device *dev, + const char *id, enum regulator_get_type get_type) +{ + struct regulator *regulator; + struct device_link *link; + int ret; + + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + + /* + * If regulator_dev_lookup() fails with error other + * than -ENODEV our job here is done, we simply return it. + */ + if (ret != -ENODEV) + return ERR_PTR(ret); + + if (!have_full_constraints()) { + dev_warn(dev, + "incomplete constraints, dummy supplies not allowed (id=%s)\n", id); + return ERR_PTR(-ENODEV); + } + + switch (get_type) { + case NORMAL_GET: + /* + * Assume that a regulator is physically present and + * enabled, even if it isn't hooked up, and just + * provide a dummy. + */ + rdev = dummy_regulator_rdev; + if (!rdev) + return ERR_PTR(-EPROBE_DEFER); + dev_warn(dev, "supply %s not found, using dummy regulator\n", id); + get_device(&rdev->dev); + break; + + case EXCLUSIVE_GET: + dev_warn(dev, + "dummy supplies not allowed for exclusive requests (id=%s)\n", id); + fallthrough; + + default: + return ERR_PTR(-ENODEV); + } + } + + if (rdev->exclusive) { + regulator = ERR_PTR(-EPERM); + put_device(&rdev->dev); + return regulator; + } + + if (get_type == EXCLUSIVE_GET && rdev->open_count) { + regulator = ERR_PTR(-EBUSY); + put_device(&rdev->dev); + return regulator; + } + + mutex_lock(®ulator_list_mutex); + ret = (rdev->coupling_desc.n_resolved != rdev->coupling_desc.n_coupled); + mutex_unlock(®ulator_list_mutex); + + if (ret != 0) { + regulator = ERR_PTR(-EPROBE_DEFER); + put_device(&rdev->dev); + return regulator; + } + + ret = regulator_resolve_supply(rdev); + if (ret < 0) { + regulator = ERR_PTR(ret); + put_device(&rdev->dev); + return regulator; + } + + if (!try_module_get(rdev->owner)) { + regulator = ERR_PTR(-EPROBE_DEFER); + put_device(&rdev->dev); + return regulator; + } + + regulator_lock(rdev); + regulator = create_regulator(rdev, dev, id); + regulator_unlock(rdev); + if (regulator == NULL) { + regulator = ERR_PTR(-ENOMEM); + module_put(rdev->owner); + put_device(&rdev->dev); + return regulator; + } + + link_and_create_debugfs(regulator, rdev, dev); + + rdev->open_count++; + if (get_type == EXCLUSIVE_GET) { + rdev->exclusive = 1; + + ret = _regulator_is_enabled(rdev); + if (ret > 0) { + rdev->use_count = 1; + regulator->enable_count = 1; + + /* Propagate the regulator state to its supply */ + if (rdev->supply) { + ret = regulator_enable(rdev->supply); + if (ret < 0) { + destroy_regulator(regulator); + module_put(rdev->owner); + put_device(&rdev->dev); + return ERR_PTR(ret); + } + } + } else { + rdev->use_count = 0; + regulator->enable_count = 0; + } + } + + link = device_link_add(dev, &rdev->dev, DL_FLAG_STATELESS); + if (!IS_ERR_OR_NULL(link)) + regulator->device_link = true; + + return regulator; +} + +/* Internal regulator request function */ +struct regulator *_regulator_get(struct device *dev, const char *id, + enum regulator_get_type get_type) +{ + struct regulator_dev *rdev; + int ret; + + ret = _regulator_get_common_check(dev, id, get_type); + if (ret) + return ERR_PTR(ret); + + rdev = regulator_dev_lookup(dev, id); + return _regulator_get_common(rdev, dev, id, get_type); +} + +/** + * regulator_get - lookup and obtain a reference to a regulator. + * @dev: device for regulator "consumer" + * @id: Supply name or regulator ID. + * + * Use of supply names configured via set_consumer_device_supply() is + * strongly encouraged. It is recommended that the supply name used + * should match the name used for the supply and/or the relevant + * device pins in the datasheet. + * + * Return: Pointer to a &struct regulator corresponding to the regulator + * producer, or an ERR_PTR() encoded negative error number. + */ +struct regulator *regulator_get(struct device *dev, const char *id) +{ + return _regulator_get(dev, id, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(regulator_get); + +/** + * regulator_get_exclusive - obtain exclusive access to a regulator. + * @dev: device for regulator "consumer" + * @id: Supply name or regulator ID. + * + * Other consumers will be unable to obtain this regulator while this + * reference is held and the use count for the regulator will be + * initialised to reflect the current state of the regulator. + * + * This is intended for use by consumers which cannot tolerate shared + * use of the regulator such as those which need to force the + * regulator off for correct operation of the hardware they are + * controlling. + * + * Use of supply names configured via set_consumer_device_supply() is + * strongly encouraged. It is recommended that the supply name used + * should match the name used for the supply and/or the relevant + * device pins in the datasheet. + * + * Return: Pointer to a &struct regulator corresponding to the regulator + * producer, or an ERR_PTR() encoded negative error number. + */ +struct regulator *regulator_get_exclusive(struct device *dev, const char *id) +{ + return _regulator_get(dev, id, EXCLUSIVE_GET); +} +EXPORT_SYMBOL_GPL(regulator_get_exclusive); + +/** + * regulator_get_optional - obtain optional access to a regulator. + * @dev: device for regulator "consumer" + * @id: Supply name or regulator ID. + * + * This is intended for use by consumers for devices which can have + * some supplies unconnected in normal use, such as some MMC devices. + * It can allow the regulator core to provide stub supplies for other + * supplies requested using normal regulator_get() calls without + * disrupting the operation of drivers that can handle absent + * supplies. + * + * Use of supply names configured via set_consumer_device_supply() is + * strongly encouraged. It is recommended that the supply name used + * should match the name used for the supply and/or the relevant + * device pins in the datasheet. + * + * Return: Pointer to a &struct regulator corresponding to the regulator + * producer, or an ERR_PTR() encoded negative error number. + */ +struct regulator *regulator_get_optional(struct device *dev, const char *id) +{ + return _regulator_get(dev, id, OPTIONAL_GET); +} +EXPORT_SYMBOL_GPL(regulator_get_optional); + +static void destroy_regulator(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + + debugfs_remove_recursive(regulator->debugfs); + + if (regulator->dev) { + if (regulator->device_link) + device_link_remove(regulator->dev, &rdev->dev); + + /* remove any sysfs entries */ + sysfs_remove_link(&rdev->dev.kobj, regulator->supply_name); + } + + regulator_lock(rdev); + list_del(®ulator->list); + + rdev->open_count--; + rdev->exclusive = 0; + regulator_unlock(rdev); + + kfree_const(regulator->supply_name); + kfree(regulator); +} + +/* regulator_list_mutex lock held by regulator_put() */ +static void _regulator_put(struct regulator *regulator) +{ + struct regulator_dev *rdev; + + if (IS_ERR_OR_NULL(regulator)) + return; + + lockdep_assert_held_once(®ulator_list_mutex); + + /* Docs say you must disable before calling regulator_put() */ + WARN_ON(regulator->enable_count); + + rdev = regulator->rdev; + + destroy_regulator(regulator); + + module_put(rdev->owner); + put_device(&rdev->dev); +} + +/** + * regulator_put - "free" the regulator source + * @regulator: regulator source + * + * Note: drivers must ensure that all regulator_enable calls made on this + * regulator source are balanced by regulator_disable calls prior to calling + * this function. + */ +void regulator_put(struct regulator *regulator) +{ + mutex_lock(®ulator_list_mutex); + _regulator_put(regulator); + mutex_unlock(®ulator_list_mutex); +} +EXPORT_SYMBOL_GPL(regulator_put); + +/** + * regulator_register_supply_alias - Provide device alias for supply lookup + * + * @dev: device that will be given as the regulator "consumer" + * @id: Supply name or regulator ID + * @alias_dev: device that should be used to lookup the supply + * @alias_id: Supply name or regulator ID that should be used to lookup the + * supply + * + * All lookups for id on dev will instead be conducted for alias_id on + * alias_dev. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_register_supply_alias(struct device *dev, const char *id, + struct device *alias_dev, + const char *alias_id) +{ + struct regulator_supply_alias *map; + struct regulator_supply_alias *new_map; + + new_map = kzalloc_obj(struct regulator_supply_alias); + if (!new_map) + return -ENOMEM; + + mutex_lock(®ulator_list_mutex); + map = regulator_find_supply_alias(dev, id); + if (map) { + mutex_unlock(®ulator_list_mutex); + kfree(new_map); + return -EEXIST; + } + + new_map->src_dev = dev; + new_map->src_supply = id; + new_map->alias_dev = alias_dev; + new_map->alias_supply = alias_id; + list_add(&new_map->list, ®ulator_supply_alias_list); + mutex_unlock(®ulator_list_mutex); + pr_info("Adding alias for supply %s,%s -> %s,%s\n", + id, dev_name(dev), alias_id, dev_name(alias_dev)); + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_register_supply_alias); + +/** + * regulator_unregister_supply_alias - Remove device alias + * + * @dev: device that will be given as the regulator "consumer" + * @id: Supply name or regulator ID + * + * Remove a lookup alias if one exists for id on dev. + */ +void regulator_unregister_supply_alias(struct device *dev, const char *id) +{ + struct regulator_supply_alias *map; + + mutex_lock(®ulator_list_mutex); + map = regulator_find_supply_alias(dev, id); + if (map) { + list_del(&map->list); + kfree(map); + } + mutex_unlock(®ulator_list_mutex); +} +EXPORT_SYMBOL_GPL(regulator_unregister_supply_alias); + +/** + * regulator_bulk_register_supply_alias - register multiple aliases + * + * @dev: device that will be given as the regulator "consumer" + * @id: List of supply names or regulator IDs + * @alias_dev: device that should be used to lookup the supply + * @alias_id: List of supply names or regulator IDs that should be used to + * lookup the supply + * @num_id: Number of aliases to register + * + * This helper function allows drivers to register several supply + * aliases in one operation. If any of the aliases cannot be + * registered any aliases that were registered will be removed + * before returning to the caller. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_bulk_register_supply_alias(struct device *dev, + const char *const *id, + struct device *alias_dev, + const char *const *alias_id, + int num_id) +{ + int i; + int ret; + + for (i = 0; i < num_id; ++i) { + ret = regulator_register_supply_alias(dev, id[i], alias_dev, + alias_id[i]); + if (ret < 0) + goto err; + } + + return 0; + +err: + dev_err(dev, + "Failed to create supply alias %s,%s -> %s,%s\n", + id[i], dev_name(dev), alias_id[i], dev_name(alias_dev)); + + while (--i >= 0) + regulator_unregister_supply_alias(dev, id[i]); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_bulk_register_supply_alias); + +/** + * regulator_bulk_unregister_supply_alias - unregister multiple aliases + * + * @dev: device that will be given as the regulator "consumer" + * @id: List of supply names or regulator IDs + * @num_id: Number of aliases to unregister + * + * This helper function allows drivers to unregister several supply + * aliases in one operation. + */ +void regulator_bulk_unregister_supply_alias(struct device *dev, + const char *const *id, + int num_id) +{ + int i; + + for (i = 0; i < num_id; ++i) + regulator_unregister_supply_alias(dev, id[i]); +} +EXPORT_SYMBOL_GPL(regulator_bulk_unregister_supply_alias); + + +/* Manage enable GPIO list. Same GPIO pin can be shared among regulators */ +static int regulator_ena_gpio_request(struct regulator_dev *rdev, + const struct regulator_config *config) +{ + struct regulator_enable_gpio *pin, *new_pin; + struct gpio_desc *gpiod; + + gpiod = config->ena_gpiod; + new_pin = kzalloc_obj(*new_pin); + + mutex_lock(®ulator_list_mutex); + + if (gpiod_is_shared(gpiod)) + /* + * The sharing of this GPIO pin is managed internally by + * GPIOLIB. We don't need to keep track of its enable count. + */ + goto skip_compare; + + list_for_each_entry(pin, ®ulator_ena_gpio_list, list) { + if (gpiod_is_equal(pin->gpiod, gpiod)) { + rdev_dbg(rdev, "GPIO is already used\n"); + goto update_ena_gpio_to_rdev; + } + } + + if (new_pin == NULL) { + mutex_unlock(®ulator_list_mutex); + return -ENOMEM; + } + +skip_compare: + pin = new_pin; + new_pin = NULL; + + pin->gpiod = gpiod; + list_add(&pin->list, ®ulator_ena_gpio_list); + +update_ena_gpio_to_rdev: + pin->request_count++; + rdev->ena_pin = pin; + + mutex_unlock(®ulator_list_mutex); + kfree(new_pin); + + return 0; +} + +static void regulator_ena_gpio_free(struct regulator_dev *rdev) +{ + struct regulator_enable_gpio *pin, *n; + + if (!rdev->ena_pin) + return; + + /* Free the GPIO only in case of no use */ + list_for_each_entry_safe(pin, n, ®ulator_ena_gpio_list, list) { + if (pin != rdev->ena_pin) + continue; + + if (--pin->request_count) + break; + + gpiod_put(pin->gpiod); + list_del(&pin->list); + kfree(pin); + break; + } + + rdev->ena_pin = NULL; +} + +/** + * regulator_ena_gpio_ctrl - balance enable_count of each GPIO and actual GPIO pin control + * @rdev: regulator_dev structure + * @enable: enable GPIO at initial use? + * + * GPIO is enabled in case of initial use. (enable_count is 0) + * GPIO is disabled when it is not shared any more. (enable_count <= 1) + * + * Return: 0 on success or a negative error number on failure. + */ +static int regulator_ena_gpio_ctrl(struct regulator_dev *rdev, bool enable) +{ + struct regulator_enable_gpio *pin = rdev->ena_pin; + int ret; + + if (!pin) + return -EINVAL; + + if (enable) { + /* Enable GPIO at initial use */ + if (pin->enable_count == 0) { + ret = gpiod_set_value_cansleep(pin->gpiod, 1); + if (ret) + return ret; + } + + pin->enable_count++; + } else { + if (pin->enable_count > 1) { + pin->enable_count--; + return 0; + } + + /* Disable GPIO if not used */ + if (pin->enable_count <= 1) { + ret = gpiod_set_value_cansleep(pin->gpiod, 0); + if (ret) + return ret; + + pin->enable_count = 0; + } + } + + return 0; +} + +/** + * _regulator_check_status_enabled - check if regulator status can be + * interpreted as "regulator is enabled" + * @rdev: the regulator device to check + * + * Return: + * * 1 - if status shows regulator is in enabled state + * * 0 - if not enabled state + * * Error Value - as received from ops->get_status() + */ +static inline int _regulator_check_status_enabled(struct regulator_dev *rdev) +{ + int ret = rdev->desc->ops->get_status(rdev); + + if (ret < 0) { + rdev_info(rdev, "get_status returned error: %d\n", ret); + return ret; + } + + switch (ret) { + case REGULATOR_STATUS_OFF: + case REGULATOR_STATUS_ERROR: + case REGULATOR_STATUS_UNDEFINED: + return 0; + default: + return 1; + } +} + +static int _regulator_do_enable(struct regulator_dev *rdev) +{ + int ret, delay; + + /* Query before enabling in case configuration dependent. */ + ret = _regulator_get_enable_time(rdev); + if (ret >= 0) { + delay = ret; + } else { + rdev_warn(rdev, "enable_time() failed: %pe\n", ERR_PTR(ret)); + delay = 0; + } + + trace_regulator_enable(rdev_get_name(rdev)); + + if (rdev->desc->off_on_delay) { + /* if needed, keep a distance of off_on_delay from last time + * this regulator was disabled. + */ + ktime_t end = ktime_add_us(rdev->last_off, rdev->desc->off_on_delay); + s64 remaining = ktime_us_delta(end, ktime_get_boottime()); + + if (remaining > 0) + fsleep(remaining); + } + + if (rdev->ena_pin) { + if (!rdev->ena_gpio_state) { + ret = regulator_ena_gpio_ctrl(rdev, true); + if (ret < 0) + return ret; + rdev->ena_gpio_state = 1; + } + } else if (rdev->desc->ops->enable) { + ret = rdev->desc->ops->enable(rdev); + if (ret < 0) + return ret; + } else { + return -EINVAL; + } + + /* Allow the regulator to ramp; it would be useful to extend + * this for bulk operations so that the regulators can ramp + * together. + */ + trace_regulator_enable_delay(rdev_get_name(rdev)); + + /* If poll_enabled_time is set, poll upto the delay calculated + * above, delaying poll_enabled_time uS to check if the regulator + * actually got enabled. + * If the regulator isn't enabled after our delay helper has expired, + * return -ETIMEDOUT. + */ + if (rdev->desc->poll_enabled_time) { + int time_remaining = delay; + + while (time_remaining > 0) { + fsleep(rdev->desc->poll_enabled_time); + + if (rdev->desc->ops->get_status) { + ret = _regulator_check_status_enabled(rdev); + if (ret < 0) + return ret; + else if (ret) + break; + } else if (rdev->desc->ops->is_enabled(rdev)) + break; + + time_remaining -= rdev->desc->poll_enabled_time; + } + + if (time_remaining <= 0) { + rdev_err(rdev, "Enabled check timed out\n"); + return -ETIMEDOUT; + } + } else { + fsleep(delay); + } + + trace_regulator_enable_complete(rdev_get_name(rdev)); + + return 0; +} + +/** + * _regulator_handle_consumer_enable - handle that a consumer enabled + * @regulator: regulator source + * + * Some things on a regulator consumer (like the contribution towards total + * load on the regulator) only have an effect when the consumer wants the + * regulator enabled. Explained in example with two consumers of the same + * regulator: + * consumer A: set_load(100); => total load = 0 + * consumer A: regulator_enable(); => total load = 100 + * consumer B: set_load(1000); => total load = 100 + * consumer B: regulator_enable(); => total load = 1100 + * consumer A: regulator_disable(); => total_load = 1000 + * + * This function (together with _regulator_handle_consumer_disable) is + * responsible for keeping track of the refcount for a given regulator consumer + * and applying / unapplying these things. + * + * Return: 0 on success or negative error number on failure. + */ +static int _regulator_handle_consumer_enable(struct regulator *regulator) +{ + int ret; + struct regulator_dev *rdev = regulator->rdev; + + lockdep_assert_held_once(&rdev->mutex.base); + + regulator->enable_count++; + if (regulator->uA_load && regulator->enable_count == 1) { + ret = drms_uA_update(rdev); + if (ret) + regulator->enable_count--; + return ret; + } + + return 0; +} + +/** + * _regulator_handle_consumer_disable - handle that a consumer disabled + * @regulator: regulator source + * + * The opposite of _regulator_handle_consumer_enable(). + * + * Return: 0 on success or a negative error number on failure. + */ +static int _regulator_handle_consumer_disable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + + lockdep_assert_held_once(&rdev->mutex.base); + + if (!regulator->enable_count) { + rdev_err(rdev, "Underflow of regulator enable count\n"); + return -EINVAL; + } + + regulator->enable_count--; + if (regulator->uA_load && regulator->enable_count == 0) + return drms_uA_update(rdev); + + return 0; +} + +/* locks held by regulator_enable() */ +static int _regulator_enable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + int ret; + + lockdep_assert_held_once(&rdev->mutex.base); + + if (rdev->use_count == 0 && rdev->supply) { + ret = _regulator_enable(rdev->supply); + if (ret < 0) + return ret; + } + + /* balance only if there are regulators coupled */ + if (rdev->coupling_desc.n_coupled > 1) { + ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); + if (ret < 0) + goto err_disable_supply; + } + + ret = _regulator_handle_consumer_enable(regulator); + if (ret < 0) + goto err_disable_supply; + + if (rdev->use_count == 0) { + /* + * The regulator may already be enabled if it's not switchable + * or was left on + */ + ret = _regulator_is_enabled(rdev); + if (ret == -EINVAL || ret == 0) { + if (!regulator_ops_is_valid(rdev, + REGULATOR_CHANGE_STATUS)) { + ret = -EPERM; + goto err_consumer_disable; + } + + ret = _regulator_do_enable(rdev); + if (ret < 0) + goto err_consumer_disable; + + _notifier_call_chain(rdev, REGULATOR_EVENT_ENABLE, + NULL); + } else if (ret < 0) { + rdev_err(rdev, "is_enabled() failed: %pe\n", ERR_PTR(ret)); + goto err_consumer_disable; + } + /* Fallthrough on positive return values - already enabled */ + } + + if (regulator->enable_count == 1) + rdev->use_count++; + + return 0; + +err_consumer_disable: + _regulator_handle_consumer_disable(regulator); + +err_disable_supply: + if (rdev->use_count == 0 && rdev->supply) + _regulator_disable(rdev->supply); + + return ret; +} + +/** + * regulator_enable - enable regulator output + * @regulator: regulator source + * + * Request that the regulator be enabled with the regulator output at + * the predefined voltage or current value. Calls to regulator_enable() + * must be balanced with calls to regulator_disable(). + * + * NOTE: the output value can be set by other drivers, boot loader or may be + * hardwired in the regulator. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_enable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + struct ww_acquire_ctx ww_ctx; + int ret; + + regulator_lock_dependent(rdev, &ww_ctx); + ret = _regulator_enable(regulator); + regulator_unlock_dependent(rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_enable); + +static int _regulator_do_disable(struct regulator_dev *rdev) +{ + int ret; + + trace_regulator_disable(rdev_get_name(rdev)); + + if (rdev->ena_pin) { + if (rdev->ena_gpio_state) { + ret = regulator_ena_gpio_ctrl(rdev, false); + if (ret < 0) + return ret; + rdev->ena_gpio_state = 0; + } + + } else if (rdev->desc->ops->disable) { + ret = rdev->desc->ops->disable(rdev); + if (ret != 0) + return ret; + } + + if (rdev->desc->off_on_delay) + rdev->last_off = ktime_get_boottime(); + + trace_regulator_disable_complete(rdev_get_name(rdev)); + + return 0; +} + +/* locks held by regulator_disable() */ +static int _regulator_disable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + int ret = 0; + + lockdep_assert_held_once(&rdev->mutex.base); + + if (WARN(regulator->enable_count == 0, + "unbalanced disables for %s\n", rdev_get_name(rdev))) + return -EIO; + + if (regulator->enable_count == 1) { + /* disabling last enable_count from this regulator */ + /* are we the last user and permitted to disable ? */ + if (rdev->use_count == 1 && + (rdev->constraints && !rdev->constraints->always_on)) { + + /* we are last user */ + if (regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS)) { + ret = _notifier_call_chain(rdev, + REGULATOR_EVENT_PRE_DISABLE, + NULL); + if (ret & NOTIFY_STOP_MASK) + return -EINVAL; + + ret = _regulator_do_disable(rdev); + if (ret < 0) { + rdev_err(rdev, "failed to disable: %pe\n", ERR_PTR(ret)); + _notifier_call_chain(rdev, + REGULATOR_EVENT_ABORT_DISABLE, + NULL); + return ret; + } + _notifier_call_chain(rdev, REGULATOR_EVENT_DISABLE, + NULL); + } + + rdev->use_count = 0; + } else if (rdev->use_count > 1) { + rdev->use_count--; + } + } + + if (ret == 0) + ret = _regulator_handle_consumer_disable(regulator); + + if (ret == 0 && rdev->coupling_desc.n_coupled > 1) + ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); + + if (ret == 0 && rdev->use_count == 0 && rdev->supply) + ret = _regulator_disable(rdev->supply); + + return ret; +} + +/** + * regulator_disable - disable regulator output + * @regulator: regulator source + * + * Disable the regulator output voltage or current. Calls to + * regulator_enable() must be balanced with calls to + * regulator_disable(). + * + * NOTE: this will only disable the regulator output if no other consumer + * devices have it enabled, the regulator device supports disabling and + * machine constraints permit this operation. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_disable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + struct ww_acquire_ctx ww_ctx; + int ret; + + regulator_lock_dependent(rdev, &ww_ctx); + ret = _regulator_disable(regulator); + regulator_unlock_dependent(rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_disable); + +/* locks held by regulator_force_disable() */ +static int _regulator_force_disable(struct regulator_dev *rdev) +{ + int ret = 0; + + lockdep_assert_held_once(&rdev->mutex.base); + + ret = _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | + REGULATOR_EVENT_PRE_DISABLE, NULL); + if (ret & NOTIFY_STOP_MASK) + return -EINVAL; + + ret = _regulator_do_disable(rdev); + if (ret < 0) { + rdev_err(rdev, "failed to force disable: %pe\n", ERR_PTR(ret)); + _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | + REGULATOR_EVENT_ABORT_DISABLE, NULL); + return ret; + } + + _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | + REGULATOR_EVENT_DISABLE, NULL); + + return 0; +} + +/** + * regulator_force_disable - force disable regulator output + * @regulator: regulator source + * + * Forcibly disable the regulator output voltage or current. + * NOTE: this *will* disable the regulator output even if other consumer + * devices have it enabled. This should be used for situations when device + * damage will likely occur if the regulator is not disabled (e.g. over temp). + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_force_disable(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + struct ww_acquire_ctx ww_ctx; + int ret; + + regulator_lock_dependent(rdev, &ww_ctx); + + ret = _regulator_force_disable(regulator->rdev); + + if (rdev->coupling_desc.n_coupled > 1) + regulator_balance_voltage(rdev, PM_SUSPEND_ON); + + if (regulator->uA_load) { + regulator->uA_load = 0; + ret = drms_uA_update(rdev); + } + + if (rdev->use_count != 0 && rdev->supply) + _regulator_disable(rdev->supply); + + regulator_unlock_dependent(rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_force_disable); + +static void regulator_disable_work(struct work_struct *work) +{ + struct regulator_dev *rdev = container_of(work, struct regulator_dev, + disable_work.work); + struct ww_acquire_ctx ww_ctx; + int count, i, ret; + struct regulator *regulator; + int total_count = 0; + + regulator_lock_dependent(rdev, &ww_ctx); + + /* + * Workqueue functions queue the new work instance while the previous + * work instance is being processed. Cancel the queued work instance + * as the work instance under processing does the job of the queued + * work instance. + */ + cancel_delayed_work(&rdev->disable_work); + + list_for_each_entry(regulator, &rdev->consumer_list, list) { + count = regulator->deferred_disables; + + if (!count) + continue; + + total_count += count; + regulator->deferred_disables = 0; + + for (i = 0; i < count; i++) { + ret = _regulator_disable(regulator); + if (ret != 0) + rdev_err(rdev, "Deferred disable failed: %pe\n", + ERR_PTR(ret)); + } + } + WARN_ON(!total_count); + + if (rdev->coupling_desc.n_coupled > 1) + regulator_balance_voltage(rdev, PM_SUSPEND_ON); + + regulator_unlock_dependent(rdev, &ww_ctx); +} + +/** + * regulator_disable_deferred - disable regulator output with delay + * @regulator: regulator source + * @ms: milliseconds until the regulator is disabled + * + * Execute regulator_disable() on the regulator after a delay. This + * is intended for use with devices that require some time to quiesce. + * + * NOTE: this will only disable the regulator output if no other consumer + * devices have it enabled, the regulator device supports disabling and + * machine constraints permit this operation. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_disable_deferred(struct regulator *regulator, int ms) +{ + struct regulator_dev *rdev = regulator->rdev; + + if (!ms) + return regulator_disable(regulator); + + regulator_lock(rdev); + regulator->deferred_disables++; + mod_delayed_work(system_power_efficient_wq, &rdev->disable_work, + msecs_to_jiffies(ms)); + regulator_unlock(rdev); + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_disable_deferred); + +static int _regulator_is_enabled(struct regulator_dev *rdev) +{ + /* A GPIO control always takes precedence */ + if (rdev->ena_pin) + return rdev->ena_gpio_state; + + /* If we don't know then assume that the regulator is always on */ + if (!rdev->desc->ops->is_enabled) + return 1; + + return rdev->desc->ops->is_enabled(rdev); +} + +static int _regulator_list_voltage(struct regulator_dev *rdev, + unsigned selector, int lock) +{ + const struct regulator_ops *ops = rdev->desc->ops; + int ret; + + if (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1 && !selector) + return rdev->desc->fixed_uV; + + if (ops->list_voltage) { + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + if (selector < rdev->desc->linear_min_sel) + return 0; + if (lock) + regulator_lock(rdev); + ret = ops->list_voltage(rdev, selector); + if (lock) + regulator_unlock(rdev); + } else if (rdev->is_switch && rdev->supply) { + ret = _regulator_list_voltage(rdev->supply->rdev, + selector, lock); + } else { + return -EINVAL; + } + + if (ret > 0) { + if (ret < rdev->constraints->min_uV) + ret = 0; + else if (ret > rdev->constraints->max_uV) + ret = 0; + } + + return ret; +} + +/** + * regulator_is_enabled - is the regulator output enabled + * @regulator: regulator source + * + * Note that the device backing this regulator handle can have multiple + * users, so it might be enabled even if regulator_enable() was never + * called for this particular source. + * + * Return: Positive if the regulator driver backing the source/client + * has requested that the device be enabled, zero if it hasn't, + * else a negative error number. + */ +int regulator_is_enabled(struct regulator *regulator) +{ + int ret; + + if (regulator->always_on) + return 1; + + regulator_lock(regulator->rdev); + ret = _regulator_is_enabled(regulator->rdev); + regulator_unlock(regulator->rdev); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_is_enabled); + +/** + * regulator_count_voltages - count regulator_list_voltage() selectors + * @regulator: regulator source + * + * Return: Number of selectors for @regulator, or negative error number. + * + * Selectors are numbered starting at zero, and typically correspond to + * bitfields in hardware registers. + */ +int regulator_count_voltages(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + + if (rdev->desc->n_voltages) + return rdev->desc->n_voltages; + + if (!rdev->is_switch || !rdev->supply) + return -EINVAL; + + return regulator_count_voltages(rdev->supply); +} +EXPORT_SYMBOL_GPL(regulator_count_voltages); + +/** + * regulator_list_voltage - enumerate supported voltages + * @regulator: regulator source + * @selector: identify voltage to list + * Context: can sleep + * + * Return: Voltage for @selector that can be passed to regulator_set_voltage(), + * 0 if @selector can't be used on this system, or a negative error + * number on failure. + */ +int regulator_list_voltage(struct regulator *regulator, unsigned selector) +{ + return _regulator_list_voltage(regulator->rdev, selector, 1); +} +EXPORT_SYMBOL_GPL(regulator_list_voltage); + +/** + * regulator_get_regmap - get the regulator's register map + * @regulator: regulator source + * + * Return: Pointer to the &struct regmap for @regulator, or ERR_PTR() + * encoded -%EOPNOTSUPP if @regulator doesn't use regmap. + */ +struct regmap *regulator_get_regmap(struct regulator *regulator) +{ + struct regmap *map = regulator->rdev->regmap; + + return map ? map : ERR_PTR(-EOPNOTSUPP); +} +EXPORT_SYMBOL_GPL(regulator_get_regmap); + +/** + * regulator_get_hardware_vsel_register - get the HW voltage selector register + * @regulator: regulator source + * @vsel_reg: voltage selector register, output parameter + * @vsel_mask: mask for voltage selector bitfield, output parameter + * + * Returns the hardware register offset and bitmask used for setting the + * regulator voltage. This might be useful when configuring voltage-scaling + * hardware or firmware that can make I2C requests behind the kernel's back, + * for example. + * + * Return: 0 on success, or -%EOPNOTSUPP if the regulator does not support + * voltage selectors. + * + * On success, the output parameters @vsel_reg and @vsel_mask are filled in + * and 0 is returned, otherwise a negative error number is returned. + */ +int regulator_get_hardware_vsel_register(struct regulator *regulator, + unsigned *vsel_reg, + unsigned *vsel_mask) +{ + struct regulator_dev *rdev = regulator->rdev; + const struct regulator_ops *ops = rdev->desc->ops; + + if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap) + return -EOPNOTSUPP; + + *vsel_reg = rdev->desc->vsel_reg; + *vsel_mask = rdev->desc->vsel_mask; + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_get_hardware_vsel_register); + +/** + * regulator_list_hardware_vsel - get the HW-specific register value for a selector + * @regulator: regulator source + * @selector: identify voltage to list + * + * Converts the selector to a hardware-specific voltage selector that can be + * directly written to the regulator registers. The address of the voltage + * register can be determined by calling @regulator_get_hardware_vsel_register. + * + * Return: 0 on success, -%EINVAL if the selector is outside the supported + * range, or -%EOPNOTSUPP if the regulator does not support voltage + * selectors. + */ +int regulator_list_hardware_vsel(struct regulator *regulator, + unsigned selector) +{ + struct regulator_dev *rdev = regulator->rdev; + const struct regulator_ops *ops = rdev->desc->ops; + + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + if (selector < rdev->desc->linear_min_sel) + return 0; + if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap) + return -EOPNOTSUPP; + + return selector; +} +EXPORT_SYMBOL_GPL(regulator_list_hardware_vsel); + +/** + * regulator_hardware_enable - access the HW for enable/disable regulator + * @regulator: regulator source + * @enable: true for enable, false for disable + * + * Request that the regulator be enabled/disabled with the regulator output at + * the predefined voltage or current value. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_hardware_enable(struct regulator *regulator, bool enable) +{ + struct regulator_dev *rdev = regulator->rdev; + const struct regulator_ops *ops = rdev->desc->ops; + int ret = -EOPNOTSUPP; + + if (!rdev->exclusive || !ops || !ops->enable || !ops->disable) + return ret; + + if (enable) + ret = ops->enable(rdev); + else + ret = ops->disable(rdev); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_hardware_enable); + +/** + * regulator_get_linear_step - return the voltage step size between VSEL values + * @regulator: regulator source + * + * Return: The voltage step size between VSEL values for linear regulators, + * or 0 if the regulator isn't a linear regulator. + */ +unsigned int regulator_get_linear_step(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + + return rdev->desc->uV_step; +} +EXPORT_SYMBOL_GPL(regulator_get_linear_step); + +/** + * regulator_is_supported_voltage - check if a voltage range can be supported + * + * @regulator: Regulator to check. + * @min_uV: Minimum required voltage in uV. + * @max_uV: Maximum required voltage in uV. + * + * Return: 1 if the voltage range is supported, 0 if not, or a negative error + * number if @regulator's voltage can't be changed and voltage readback + * failed. + */ +int regulator_is_supported_voltage(struct regulator *regulator, + int min_uV, int max_uV) +{ + struct regulator_dev *rdev = regulator->rdev; + int i, voltages, ret; + + /* If we can't change voltage check the current voltage */ + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { + ret = regulator_get_voltage(regulator); + if (ret >= 0) + return min_uV <= ret && ret <= max_uV; + else + return ret; + } + + /* Any voltage within constrains range is fine? */ + if (rdev->desc->continuous_voltage_range) + return min_uV >= rdev->constraints->min_uV && + max_uV <= rdev->constraints->max_uV; + + ret = regulator_count_voltages(regulator); + if (ret < 0) + return 0; + voltages = ret; + + for (i = 0; i < voltages; i++) { + ret = regulator_list_voltage(regulator, i); + + if (ret >= min_uV && ret <= max_uV) + return 1; + } + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_is_supported_voltage); + +static int regulator_map_voltage(struct regulator_dev *rdev, int min_uV, + int max_uV) +{ + const struct regulator_desc *desc = rdev->desc; + + if (desc->ops->map_voltage) + return desc->ops->map_voltage(rdev, min_uV, max_uV); + + if (desc->ops->list_voltage == regulator_list_voltage_linear) + return regulator_map_voltage_linear(rdev, min_uV, max_uV); + + if (desc->ops->list_voltage == regulator_list_voltage_linear_range) + return regulator_map_voltage_linear_range(rdev, min_uV, max_uV); + + if (desc->ops->list_voltage == + regulator_list_voltage_pickable_linear_range) + return regulator_map_voltage_pickable_linear_range(rdev, + min_uV, max_uV); + + return regulator_map_voltage_iterate(rdev, min_uV, max_uV); +} + +static int _regulator_call_set_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV, + unsigned *selector) +{ + struct pre_voltage_change_data data; + int ret; + + data.old_uV = regulator_get_voltage_rdev(rdev); + data.min_uV = min_uV; + data.max_uV = max_uV; + ret = _notifier_call_chain(rdev, REGULATOR_EVENT_PRE_VOLTAGE_CHANGE, + &data); + if (ret & NOTIFY_STOP_MASK) + return -EINVAL; + + ret = rdev->desc->ops->set_voltage(rdev, min_uV, max_uV, selector); + if (ret >= 0) + return ret; + + _notifier_call_chain(rdev, REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE, + (void *)data.old_uV); + + return ret; +} + +static int _regulator_call_set_voltage_sel(struct regulator_dev *rdev, + int uV, unsigned selector) +{ + struct pre_voltage_change_data data; + int ret; + + data.old_uV = regulator_get_voltage_rdev(rdev); + data.min_uV = uV; + data.max_uV = uV; + ret = _notifier_call_chain(rdev, REGULATOR_EVENT_PRE_VOLTAGE_CHANGE, + &data); + if (ret & NOTIFY_STOP_MASK) + return -EINVAL; + + ret = rdev->desc->ops->set_voltage_sel(rdev, selector); + if (ret >= 0) + return ret; + + _notifier_call_chain(rdev, REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE, + (void *)data.old_uV); + + return ret; +} + +static int _regulator_set_voltage_sel_step(struct regulator_dev *rdev, + int uV, int new_selector) +{ + const struct regulator_ops *ops = rdev->desc->ops; + int diff, old_sel, curr_sel, ret; + + /* Stepping is only needed if the regulator is enabled. */ + if (!_regulator_is_enabled(rdev)) + goto final_set; + + if (!ops->get_voltage_sel) + return -EINVAL; + + old_sel = ops->get_voltage_sel(rdev); + if (old_sel < 0) + return old_sel; + + diff = new_selector - old_sel; + if (diff == 0) + return 0; /* No change needed. */ + + if (diff > 0) { + /* Stepping up. */ + for (curr_sel = old_sel + rdev->desc->vsel_step; + curr_sel < new_selector; + curr_sel += rdev->desc->vsel_step) { + /* + * Call the callback directly instead of using + * _regulator_call_set_voltage_sel() as we don't + * want to notify anyone yet. Same in the branch + * below. + */ + ret = ops->set_voltage_sel(rdev, curr_sel); + if (ret) + goto try_revert; + } + } else { + /* Stepping down. */ + for (curr_sel = old_sel - rdev->desc->vsel_step; + curr_sel > new_selector; + curr_sel -= rdev->desc->vsel_step) { + ret = ops->set_voltage_sel(rdev, curr_sel); + if (ret) + goto try_revert; + } + } + +final_set: + /* The final selector will trigger the notifiers. */ + return _regulator_call_set_voltage_sel(rdev, uV, new_selector); + +try_revert: + /* + * At least try to return to the previous voltage if setting a new + * one failed. + */ + (void)ops->set_voltage_sel(rdev, old_sel); + return ret; +} + +static int _regulator_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uV) +{ + unsigned int ramp_delay = 0; + + if (rdev->constraints->ramp_delay) + ramp_delay = rdev->constraints->ramp_delay; + else if (rdev->desc->ramp_delay) + ramp_delay = rdev->desc->ramp_delay; + else if (rdev->constraints->settling_time) + return rdev->constraints->settling_time; + else if (rdev->constraints->settling_time_up && + (new_uV > old_uV)) + return rdev->constraints->settling_time_up; + else if (rdev->constraints->settling_time_down && + (new_uV < old_uV)) + return rdev->constraints->settling_time_down; + + if (ramp_delay == 0) + return 0; + + return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay); +} + +static int _regulator_do_set_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + int ret; + int delay = 0; + int best_val = 0; + unsigned int selector; + int old_selector = -1; + const struct regulator_ops *ops = rdev->desc->ops; + int old_uV = regulator_get_voltage_rdev(rdev); + + trace_regulator_set_voltage(rdev_get_name(rdev), min_uV, max_uV); + + min_uV += rdev->constraints->uV_offset; + max_uV += rdev->constraints->uV_offset; + + /* + * If we can't obtain the old selector there is not enough + * info to call set_voltage_time_sel(). + */ + if (_regulator_is_enabled(rdev) && + ops->set_voltage_time_sel && ops->get_voltage_sel) { + old_selector = ops->get_voltage_sel(rdev); + if (old_selector < 0) + return old_selector; + } + + if (ops->set_voltage) { + ret = _regulator_call_set_voltage(rdev, min_uV, max_uV, + &selector); + + if (ret >= 0) { + if (ops->list_voltage) + best_val = ops->list_voltage(rdev, + selector); + else + best_val = regulator_get_voltage_rdev(rdev); + } + + } else if (ops->set_voltage_sel) { + ret = regulator_map_voltage(rdev, min_uV, max_uV); + if (ret >= 0) { + best_val = ops->list_voltage(rdev, ret); + if (min_uV <= best_val && max_uV >= best_val) { + selector = ret; + if (old_selector == selector) + ret = 0; + else if (rdev->desc->vsel_step) + ret = _regulator_set_voltage_sel_step( + rdev, best_val, selector); + else + ret = _regulator_call_set_voltage_sel( + rdev, best_val, selector); + } else { + ret = -EINVAL; + } + } + } else { + ret = -EINVAL; + } + + if (ret) + goto out; + + if (ops->set_voltage_time_sel) { + /* + * Call set_voltage_time_sel if successfully obtained + * old_selector + */ + if (old_selector >= 0 && old_selector != selector) + delay = ops->set_voltage_time_sel(rdev, old_selector, + selector); + } else { + if (old_uV != best_val) { + if (ops->set_voltage_time) + delay = ops->set_voltage_time(rdev, old_uV, + best_val); + else + delay = _regulator_set_voltage_time(rdev, + old_uV, + best_val); + } + } + + if (delay < 0) { + rdev_warn(rdev, "failed to get delay: %pe\n", ERR_PTR(delay)); + delay = 0; + } + + /* Insert any necessary delays */ + fsleep(delay); + + if (best_val >= 0) { + unsigned long data = best_val; + + _notifier_call_chain(rdev, REGULATOR_EVENT_VOLTAGE_CHANGE, + (void *)data); + } + +out: + trace_regulator_set_voltage_complete(rdev_get_name(rdev), best_val); + + return ret; +} + +static int _regulator_do_set_suspend_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV, suspend_state_t state) +{ + struct regulator_state *rstate; + int uV, sel; + + rstate = regulator_get_suspend_state(rdev, state); + if (rstate == NULL) + return -EINVAL; + + if (min_uV < rstate->min_uV) + min_uV = rstate->min_uV; + if (max_uV > rstate->max_uV) + max_uV = rstate->max_uV; + + sel = regulator_map_voltage(rdev, min_uV, max_uV); + if (sel < 0) + return sel; + + uV = rdev->desc->ops->list_voltage(rdev, sel); + if (uV >= min_uV && uV <= max_uV) + rstate->uV = uV; + + return 0; +} + +static int regulator_get_voltage_delta(struct regulator_dev *rdev, int uV) +{ + int current_uV = regulator_get_voltage_rdev(rdev); + + if (current_uV < 0) + return current_uV; + + return abs(current_uV - uV); +} + +static int regulator_set_voltage_unlocked(struct regulator *regulator, + int min_uV, int max_uV, + suspend_state_t state) +{ + struct regulator_dev *rdev = regulator->rdev; + struct regulator_voltage *voltage = ®ulator->voltage[state]; + int ret = 0; + int current_uV, delta, new_delta; + int old_min_uV, old_max_uV; + + /* If we're setting the same range as last time the change + * should be a noop (some cpufreq implementations use the same + * voltage for multiple frequencies, for example). + */ + if (voltage->min_uV == min_uV && voltage->max_uV == max_uV) + goto out; + + /* If we're trying to set a range that overlaps the current voltage, + * return successfully even though the regulator does not support + * changing the voltage. + */ + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { + current_uV = regulator_get_voltage_rdev(rdev); + if (min_uV <= current_uV && current_uV <= max_uV) { + voltage->min_uV = min_uV; + voltage->max_uV = max_uV; + goto out; + } + } + + /* sanity check */ + if (!rdev->desc->ops->set_voltage && + !rdev->desc->ops->set_voltage_sel) { + ret = -EINVAL; + goto out; + } + + /* constraints check */ + ret = regulator_check_voltage(rdev, &min_uV, &max_uV); + if (ret < 0) + goto out; + + /* restore original values in case of error */ + old_min_uV = voltage->min_uV; + old_max_uV = voltage->max_uV; + voltage->min_uV = min_uV; + voltage->max_uV = max_uV; + + /* for not coupled regulators this will just set the voltage */ + ret = regulator_balance_voltage(rdev, state); + if (ret < 0) { + voltage->min_uV = old_min_uV; + voltage->max_uV = old_max_uV; + } + + if (rdev->constraints->max_uV_step > 0) { + /* For regulators with a maximum voltage step, reaching the desired + * voltage might take a few retries. + */ + ret = regulator_get_voltage_delta(rdev, min_uV); + if (ret < 0) + goto out; + + delta = ret; + + while (delta > 0) { + ret = regulator_balance_voltage(rdev, state); + if (ret < 0) + goto out; + + ret = regulator_get_voltage_delta(rdev, min_uV); + if (ret < 0) + goto out; + + new_delta = ret; + + /* check that voltage is converging quickly enough */ + if (delta - new_delta < rdev->constraints->max_uV_step) { + ret = -EWOULDBLOCK; + goto out; + } + + delta = new_delta; + } + } + +out: + return ret; +} + +int regulator_set_voltage_rdev(struct regulator_dev *rdev, int min_uV, + int max_uV, suspend_state_t state) +{ + int best_supply_uV = 0; + int supply_change_uV = 0; + int ret; + + if (rdev->supply && + regulator_ops_is_valid(rdev->supply->rdev, + REGULATOR_CHANGE_VOLTAGE) && + (rdev->desc->min_dropout_uV || !(rdev->desc->ops->get_voltage || + rdev->desc->ops->get_voltage_sel))) { + int current_supply_uV; + int selector; + + selector = regulator_map_voltage(rdev, min_uV, max_uV); + if (selector < 0) { + ret = selector; + goto out; + } + + best_supply_uV = _regulator_list_voltage(rdev, selector, 0); + if (best_supply_uV < 0) { + ret = best_supply_uV; + goto out; + } + + best_supply_uV += rdev->desc->min_dropout_uV; + + current_supply_uV = regulator_get_voltage_rdev(rdev->supply->rdev); + if (current_supply_uV < 0) { + ret = current_supply_uV; + goto out; + } + + supply_change_uV = best_supply_uV - current_supply_uV; + } + + if (supply_change_uV > 0) { + ret = regulator_set_voltage_unlocked(rdev->supply, + best_supply_uV, INT_MAX, state); + if (ret) { + dev_err(&rdev->dev, "Failed to increase supply voltage: %pe\n", + ERR_PTR(ret)); + goto out; + } + } + + if (state == PM_SUSPEND_ON) + ret = _regulator_do_set_voltage(rdev, min_uV, max_uV); + else + ret = _regulator_do_set_suspend_voltage(rdev, min_uV, + max_uV, state); + if (ret < 0) + goto out; + + if (supply_change_uV < 0) { + ret = regulator_set_voltage_unlocked(rdev->supply, + best_supply_uV, INT_MAX, state); + if (ret) + dev_warn(&rdev->dev, "Failed to decrease supply voltage: %pe\n", + ERR_PTR(ret)); + /* No need to fail here */ + ret = 0; + } + +out: + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_voltage_rdev); + +static int regulator_limit_voltage_step(struct regulator_dev *rdev, + int *current_uV, int *min_uV) +{ + struct regulation_constraints *constraints = rdev->constraints; + + /* Limit voltage change only if necessary */ + if (!constraints->max_uV_step || !_regulator_is_enabled(rdev)) + return 1; + + if (*current_uV < 0) { + *current_uV = regulator_get_voltage_rdev(rdev); + + if (*current_uV < 0) + return *current_uV; + } + + if (abs(*current_uV - *min_uV) <= constraints->max_uV_step) + return 1; + + /* Clamp target voltage within the given step */ + if (*current_uV < *min_uV) + *min_uV = min(*current_uV + constraints->max_uV_step, + *min_uV); + else + *min_uV = max(*current_uV - constraints->max_uV_step, + *min_uV); + + return 0; +} + +static int regulator_get_optimal_voltage(struct regulator_dev *rdev, + int *current_uV, + int *min_uV, int *max_uV, + suspend_state_t state, + int n_coupled) +{ + struct coupling_desc *c_desc = &rdev->coupling_desc; + struct regulator_dev **c_rdevs = c_desc->coupled_rdevs; + struct regulation_constraints *constraints = rdev->constraints; + int desired_min_uV = 0, desired_max_uV = INT_MAX; + int max_current_uV = 0, min_current_uV = INT_MAX; + int highest_min_uV = 0, target_uV, possible_uV; + int i, ret, max_spread; + bool done; + + *current_uV = -1; + + /* + * If there are no coupled regulators, simply set the voltage + * demanded by consumers. + */ + if (n_coupled == 1) { + /* + * If consumers don't provide any demands, set voltage + * to min_uV + */ + desired_min_uV = constraints->min_uV; + desired_max_uV = constraints->max_uV; + + ret = regulator_check_consumers(rdev, + &desired_min_uV, + &desired_max_uV, state); + if (ret < 0) + return ret; + + done = true; + + goto finish; + } + + /* Find highest min desired voltage */ + for (i = 0; i < n_coupled; i++) { + int tmp_min = 0; + int tmp_max = INT_MAX; + + lockdep_assert_held_once(&c_rdevs[i]->mutex.base); + + ret = regulator_check_consumers(c_rdevs[i], + &tmp_min, + &tmp_max, state); + if (ret < 0) + return ret; + + ret = regulator_check_voltage(c_rdevs[i], &tmp_min, &tmp_max); + if (ret < 0) + return ret; + + highest_min_uV = max(highest_min_uV, tmp_min); + + if (i == 0) { + desired_min_uV = tmp_min; + desired_max_uV = tmp_max; + } + } + + max_spread = constraints->max_spread[0]; + + /* + * Let target_uV be equal to the desired one if possible. + * If not, set it to minimum voltage, allowed by other coupled + * regulators. + */ + target_uV = max(desired_min_uV, highest_min_uV - max_spread); + + /* + * Find min and max voltages, which currently aren't violating + * max_spread. + */ + for (i = 1; i < n_coupled; i++) { + int tmp_act; + + if (!_regulator_is_enabled(c_rdevs[i])) + continue; + + tmp_act = regulator_get_voltage_rdev(c_rdevs[i]); + if (tmp_act < 0) + return tmp_act; + + min_current_uV = min(tmp_act, min_current_uV); + max_current_uV = max(tmp_act, max_current_uV); + } + + /* There aren't any other regulators enabled */ + if (max_current_uV == 0) { + possible_uV = target_uV; + } else { + /* + * Correct target voltage, so as it currently isn't + * violating max_spread + */ + possible_uV = max(target_uV, max_current_uV - max_spread); + possible_uV = min(possible_uV, min_current_uV + max_spread); + } + + if (possible_uV > desired_max_uV) + return -EINVAL; + + done = (possible_uV == target_uV); + desired_min_uV = possible_uV; + +finish: + /* Apply max_uV_step constraint if necessary */ + if (state == PM_SUSPEND_ON) { + ret = regulator_limit_voltage_step(rdev, current_uV, + &desired_min_uV); + if (ret < 0) + return ret; + + if (ret == 0) + done = false; + } + + /* Set current_uV if wasn't done earlier in the code and if necessary */ + if (n_coupled > 1 && *current_uV == -1) { + + if (_regulator_is_enabled(rdev)) { + ret = regulator_get_voltage_rdev(rdev); + if (ret < 0) + return ret; + + *current_uV = ret; + } else { + *current_uV = desired_min_uV; + } + } + + *min_uV = desired_min_uV; + *max_uV = desired_max_uV; + + return done; +} + +int regulator_do_balance_voltage(struct regulator_dev *rdev, + suspend_state_t state, bool skip_coupled) +{ + struct regulator_dev **c_rdevs; + struct regulator_dev *best_rdev; + struct coupling_desc *c_desc = &rdev->coupling_desc; + int i, ret, n_coupled, best_min_uV, best_max_uV, best_c_rdev; + unsigned int delta, best_delta; + unsigned long c_rdev_done = 0; + bool best_c_rdev_done; + + c_rdevs = c_desc->coupled_rdevs; + n_coupled = skip_coupled ? 1 : c_desc->n_coupled; + + /* + * Find the best possible voltage change on each loop. Leave the loop + * if there isn't any possible change. + */ + do { + best_c_rdev_done = false; + best_delta = 0; + best_min_uV = 0; + best_max_uV = 0; + best_c_rdev = 0; + best_rdev = NULL; + + /* + * Find highest difference between optimal voltage + * and current voltage. + */ + for (i = 0; i < n_coupled; i++) { + /* + * optimal_uV is the best voltage that can be set for + * i-th regulator at the moment without violating + * max_spread constraint in order to balance + * the coupled voltages. + */ + int optimal_uV = 0, optimal_max_uV = 0, current_uV = 0; + + if (test_bit(i, &c_rdev_done)) + continue; + + ret = regulator_get_optimal_voltage(c_rdevs[i], + ¤t_uV, + &optimal_uV, + &optimal_max_uV, + state, n_coupled); + if (ret < 0) + goto out; + + delta = abs(optimal_uV - current_uV); + + if (delta && best_delta <= delta) { + best_c_rdev_done = ret; + best_delta = delta; + best_rdev = c_rdevs[i]; + best_min_uV = optimal_uV; + best_max_uV = optimal_max_uV; + best_c_rdev = i; + } + } + + /* Nothing to change, return successfully */ + if (!best_rdev) { + ret = 0; + goto out; + } + + ret = regulator_set_voltage_rdev(best_rdev, best_min_uV, + best_max_uV, state); + + if (ret < 0) + goto out; + + if (best_c_rdev_done) + set_bit(best_c_rdev, &c_rdev_done); + + } while (n_coupled > 1); + +out: + return ret; +} + +static int regulator_balance_voltage(struct regulator_dev *rdev, + suspend_state_t state) +{ + struct coupling_desc *c_desc = &rdev->coupling_desc; + struct regulator_coupler *coupler = c_desc->coupler; + bool skip_coupled = false; + + /* + * If system is in a state other than PM_SUSPEND_ON, don't check + * other coupled regulators. + */ + if (state != PM_SUSPEND_ON) + skip_coupled = true; + + if (c_desc->n_resolved < c_desc->n_coupled) { + rdev_err(rdev, "Not all coupled regulators registered\n"); + return -EPERM; + } + + /* Invoke custom balancer for customized couplers */ + if (coupler && coupler->balance_voltage) + return coupler->balance_voltage(coupler, rdev, state); + + return regulator_do_balance_voltage(rdev, state, skip_coupled); +} + +/** + * regulator_set_voltage - set regulator output voltage + * @regulator: regulator source + * @min_uV: Minimum required voltage in uV + * @max_uV: Maximum acceptable voltage in uV + * + * Sets a voltage regulator to the desired output voltage. This can be set + * during any regulator state. IOW, regulator can be disabled or enabled. + * + * If the regulator is enabled then the voltage will change to the new value + * immediately otherwise if the regulator is disabled the regulator will + * output at the new voltage when enabled. + * + * NOTE: If the regulator is shared between several devices then the lowest + * request voltage that meets the system constraints will be used. + * Regulator system constraints must be set for this regulator before + * calling this function otherwise this call will fail. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV) +{ + struct ww_acquire_ctx ww_ctx; + int ret; + + regulator_lock_dependent(regulator->rdev, &ww_ctx); + + ret = regulator_set_voltage_unlocked(regulator, min_uV, max_uV, + PM_SUSPEND_ON); + + regulator_unlock_dependent(regulator->rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_voltage); + +static inline int regulator_suspend_toggle(struct regulator_dev *rdev, + suspend_state_t state, bool en) +{ + struct regulator_state *rstate; + + rstate = regulator_get_suspend_state(rdev, state); + if (rstate == NULL) + return -EINVAL; + + if (!rstate->changeable) + return -EPERM; + + rstate->enabled = (en) ? ENABLE_IN_SUSPEND : DISABLE_IN_SUSPEND; + + return 0; +} + +int regulator_suspend_enable(struct regulator_dev *rdev, + suspend_state_t state) +{ + return regulator_suspend_toggle(rdev, state, true); +} +EXPORT_SYMBOL_GPL(regulator_suspend_enable); + +int regulator_suspend_disable(struct regulator_dev *rdev, + suspend_state_t state) +{ + struct regulator *regulator; + struct regulator_voltage *voltage; + + /* + * if any consumer wants this regulator device keeping on in + * suspend states, don't set it as disabled. + */ + list_for_each_entry(regulator, &rdev->consumer_list, list) { + voltage = ®ulator->voltage[state]; + if (voltage->min_uV || voltage->max_uV) + return 0; + } + + return regulator_suspend_toggle(rdev, state, false); +} +EXPORT_SYMBOL_GPL(regulator_suspend_disable); + +static int _regulator_set_suspend_voltage(struct regulator *regulator, + int min_uV, int max_uV, + suspend_state_t state) +{ + struct regulator_dev *rdev = regulator->rdev; + struct regulator_state *rstate; + + rstate = regulator_get_suspend_state(rdev, state); + if (rstate == NULL) + return -EINVAL; + + if (rstate->min_uV == rstate->max_uV) { + rdev_err(rdev, "The suspend voltage can't be changed!\n"); + return -EPERM; + } + + return regulator_set_voltage_unlocked(regulator, min_uV, max_uV, state); +} + +int regulator_set_suspend_voltage(struct regulator *regulator, int min_uV, + int max_uV, suspend_state_t state) +{ + struct ww_acquire_ctx ww_ctx; + int ret; + + /* PM_SUSPEND_ON is handled by regulator_set_voltage() */ + if (regulator_check_states(state) || state == PM_SUSPEND_ON) + return -EINVAL; + + regulator_lock_dependent(regulator->rdev, &ww_ctx); + + ret = _regulator_set_suspend_voltage(regulator, min_uV, + max_uV, state); + + regulator_unlock_dependent(regulator->rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_suspend_voltage); + +/** + * regulator_set_voltage_time - get raise/fall time + * @regulator: regulator source + * @old_uV: starting voltage in microvolts + * @new_uV: target voltage in microvolts + * + * Provided with the starting and ending voltage, this function attempts to + * calculate the time in microseconds required to rise or fall to this new + * voltage. + * + * Return: ramp time in microseconds, or a negative error number if calculation failed. + */ +int regulator_set_voltage_time(struct regulator *regulator, + int old_uV, int new_uV) +{ + struct regulator_dev *rdev = regulator->rdev; + const struct regulator_ops *ops = rdev->desc->ops; + int old_sel = -1; + int new_sel = -1; + int voltage; + int i; + + if (ops->set_voltage_time) + return ops->set_voltage_time(rdev, old_uV, new_uV); + else if (!ops->set_voltage_time_sel) + return _regulator_set_voltage_time(rdev, old_uV, new_uV); + + /* Currently requires operations to do this */ + if (!ops->list_voltage || !rdev->desc->n_voltages) + return -EINVAL; + + for (i = 0; i < rdev->desc->n_voltages; i++) { + /* We only look for exact voltage matches here */ + if (i < rdev->desc->linear_min_sel) + continue; + + if (old_sel >= 0 && new_sel >= 0) + break; + + voltage = regulator_list_voltage(regulator, i); + if (voltage < 0) + return -EINVAL; + if (voltage == 0) + continue; + if (voltage == old_uV) + old_sel = i; + if (voltage == new_uV) + new_sel = i; + } + + if (old_sel < 0 || new_sel < 0) + return -EINVAL; + + return ops->set_voltage_time_sel(rdev, old_sel, new_sel); +} +EXPORT_SYMBOL_GPL(regulator_set_voltage_time); + +/** + * regulator_set_voltage_time_sel - get raise/fall time + * @rdev: regulator source device + * @old_selector: selector for starting voltage + * @new_selector: selector for target voltage + * + * Provided with the starting and target voltage selectors, this function + * returns time in microseconds required to rise or fall to this new voltage + * + * Drivers providing ramp_delay in regulation_constraints can use this as their + * set_voltage_time_sel() operation. + * + * Return: ramp time in microseconds, or a negative error number if calculation failed. + */ +int regulator_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + int old_volt, new_volt; + + /* sanity check */ + if (!rdev->desc->ops->list_voltage) + return -EINVAL; + + old_volt = rdev->desc->ops->list_voltage(rdev, old_selector); + new_volt = rdev->desc->ops->list_voltage(rdev, new_selector); + + if (rdev->desc->ops->set_voltage_time) + return rdev->desc->ops->set_voltage_time(rdev, old_volt, + new_volt); + else + return _regulator_set_voltage_time(rdev, old_volt, new_volt); +} +EXPORT_SYMBOL_GPL(regulator_set_voltage_time_sel); + +int regulator_sync_voltage_rdev(struct regulator_dev *rdev) +{ + int ret; + + regulator_lock(rdev); + + if (!rdev->desc->ops->set_voltage && + !rdev->desc->ops->set_voltage_sel) { + ret = -EINVAL; + goto out; + } + + /* balance only, if regulator is coupled */ + if (rdev->coupling_desc.n_coupled > 1) + ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); + else + ret = -EOPNOTSUPP; + +out: + regulator_unlock(rdev); + return ret; +} + +/** + * regulator_sync_voltage - re-apply last regulator output voltage + * @regulator: regulator source + * + * Re-apply the last configured voltage. This is intended to be used + * where some external control source the consumer is cooperating with + * has caused the configured voltage to change. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_sync_voltage(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->rdev; + struct regulator_voltage *voltage = ®ulator->voltage[PM_SUSPEND_ON]; + int ret, min_uV, max_uV; + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) + return 0; + + regulator_lock(rdev); + + if (!rdev->desc->ops->set_voltage && + !rdev->desc->ops->set_voltage_sel) { + ret = -EINVAL; + goto out; + } + + /* This is only going to work if we've had a voltage configured. */ + if (!voltage->min_uV && !voltage->max_uV) { + ret = -EINVAL; + goto out; + } + + min_uV = voltage->min_uV; + max_uV = voltage->max_uV; + + /* This should be a paranoia check... */ + ret = regulator_check_voltage(rdev, &min_uV, &max_uV); + if (ret < 0) + goto out; + + ret = regulator_check_consumers(rdev, &min_uV, &max_uV, 0); + if (ret < 0) + goto out; + + /* balance only, if regulator is coupled */ + if (rdev->coupling_desc.n_coupled > 1) + ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); + else + ret = _regulator_do_set_voltage(rdev, min_uV, max_uV); + +out: + regulator_unlock(rdev); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_sync_voltage); + +int regulator_get_voltage_rdev(struct regulator_dev *rdev) +{ + int sel, ret; + bool bypassed; + + if (rdev->desc->ops->get_bypass) { + ret = rdev->desc->ops->get_bypass(rdev, &bypassed); + if (ret < 0) + return ret; + if (bypassed) { + /* if bypassed the regulator must have a supply */ + if (!rdev->supply) { + rdev_err(rdev, + "bypassed regulator has no supply!\n"); + return -EPROBE_DEFER; + } + + return regulator_get_voltage_rdev(rdev->supply->rdev); + } + } + + if (rdev->desc->ops->get_voltage_sel) { + sel = rdev->desc->ops->get_voltage_sel(rdev); + if (sel < 0) + return sel; + ret = rdev->desc->ops->list_voltage(rdev, sel); + } else if (rdev->desc->ops->get_voltage) { + ret = rdev->desc->ops->get_voltage(rdev); + } else if (rdev->desc->ops->list_voltage) { + ret = rdev->desc->ops->list_voltage(rdev, 0); + } else if (rdev->desc->fixed_uV && (rdev->desc->n_voltages == 1)) { + ret = rdev->desc->fixed_uV; + } else if (rdev->supply) { + ret = regulator_get_voltage_rdev(rdev->supply->rdev); + } else if (rdev->supply_name) { + return -EPROBE_DEFER; + } else { + return -EINVAL; + } + + if (ret < 0) + return ret; + return ret - rdev->constraints->uV_offset; +} +EXPORT_SYMBOL_GPL(regulator_get_voltage_rdev); + +/** + * regulator_get_voltage - get regulator output voltage + * @regulator: regulator source + * + * Return: Current regulator voltage in uV, or a negative error number on failure. + * + * NOTE: If the regulator is disabled it will return the voltage value. This + * function should not be used to determine regulator state. + */ +int regulator_get_voltage(struct regulator *regulator) +{ + struct ww_acquire_ctx ww_ctx; + int ret; + + regulator_lock_dependent(regulator->rdev, &ww_ctx); + ret = regulator_get_voltage_rdev(regulator->rdev); + regulator_unlock_dependent(regulator->rdev, &ww_ctx); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_get_voltage); + +/** + * regulator_set_current_limit - set regulator output current limit + * @regulator: regulator source + * @min_uA: Minimum supported current in uA + * @max_uA: Maximum supported current in uA + * + * Sets current sink to the desired output current. This can be set during + * any regulator state. IOW, regulator can be disabled or enabled. + * + * If the regulator is enabled then the current will change to the new value + * immediately otherwise if the regulator is disabled the regulator will + * output at the new current when enabled. + * + * NOTE: Regulator system constraints must be set for this regulator before + * calling this function otherwise this call will fail. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_set_current_limit(struct regulator *regulator, + int min_uA, int max_uA) +{ + struct regulator_dev *rdev = regulator->rdev; + int ret; + + regulator_lock(rdev); + + /* sanity check */ + if (!rdev->desc->ops->set_current_limit) { + ret = -EINVAL; + goto out; + } + + /* constraints check */ + ret = regulator_check_current_limit(rdev, &min_uA, &max_uA); + if (ret < 0) + goto out; + + ret = rdev->desc->ops->set_current_limit(rdev, min_uA, max_uA); +out: + regulator_unlock(rdev); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_current_limit); + +static int _regulator_get_current_limit_unlocked(struct regulator_dev *rdev) +{ + /* sanity check */ + if (!rdev->desc->ops->get_current_limit) + return -EINVAL; + + return rdev->desc->ops->get_current_limit(rdev); +} + +static int _regulator_get_current_limit(struct regulator_dev *rdev) +{ + int ret; + + regulator_lock(rdev); + ret = _regulator_get_current_limit_unlocked(rdev); + regulator_unlock(rdev); + + return ret; +} + +/** + * regulator_get_current_limit - get regulator output current + * @regulator: regulator source + * + * Return: Current supplied by the specified current sink in uA, + * or a negative error number on failure. + * + * NOTE: If the regulator is disabled it will return the current value. This + * function should not be used to determine regulator state. + */ +int regulator_get_current_limit(struct regulator *regulator) +{ + return _regulator_get_current_limit(regulator->rdev); +} +EXPORT_SYMBOL_GPL(regulator_get_current_limit); + +/** + * regulator_get_unclaimed_power_budget - get regulator unclaimed power budget + * @regulator: regulator source + * + * Return: Unclaimed power budget of the regulator in mW. + */ +int regulator_get_unclaimed_power_budget(struct regulator *regulator) +{ + return regulator->rdev->constraints->pw_budget_mW - + regulator->rdev->pw_requested_mW; +} +EXPORT_SYMBOL_GPL(regulator_get_unclaimed_power_budget); + +/** + * regulator_request_power_budget - request power budget on a regulator + * @regulator: regulator source + * @pw_req: Power requested + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_request_power_budget(struct regulator *regulator, + unsigned int pw_req) +{ + struct regulator_dev *rdev = regulator->rdev; + int ret = 0, pw_tot_req; + + regulator_lock(rdev); + if (rdev->supply) { + ret = regulator_request_power_budget(rdev->supply, pw_req); + if (ret < 0) + goto out; + } + + pw_tot_req = rdev->pw_requested_mW + pw_req; + if (pw_tot_req > rdev->constraints->pw_budget_mW) { + rdev_warn(rdev, "power requested %d mW out of budget %d mW", + pw_req, + rdev->constraints->pw_budget_mW - rdev->pw_requested_mW); + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_OVER_CURRENT_WARN, + NULL); + ret = -ERANGE; + goto out; + } + + rdev->pw_requested_mW = pw_tot_req; +out: + regulator_unlock(rdev); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_request_power_budget); + +/** + * regulator_free_power_budget - free power budget on a regulator + * @regulator: regulator source + * @pw: Power to be released. + * + * Return: Power budget of the regulator in mW. + */ +void regulator_free_power_budget(struct regulator *regulator, + unsigned int pw) +{ + struct regulator_dev *rdev = regulator->rdev; + int pw_tot_req; + + regulator_lock(rdev); + if (rdev->supply) + regulator_free_power_budget(rdev->supply, pw); + + pw_tot_req = rdev->pw_requested_mW - pw; + if (pw_tot_req >= 0) + rdev->pw_requested_mW = pw_tot_req; + else + rdev_warn(rdev, + "too much power freed %d mW (already requested %d mW)", + pw, rdev->pw_requested_mW); + + regulator_unlock(rdev); +} +EXPORT_SYMBOL_GPL(regulator_free_power_budget); + +/** + * regulator_set_mode - set regulator operating mode + * @regulator: regulator source + * @mode: operating mode - one of the REGULATOR_MODE constants + * + * Set regulator operating mode to increase regulator efficiency or improve + * regulation performance. + * + * NOTE: Regulator system constraints must be set for this regulator before + * calling this function otherwise this call will fail. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_set_mode(struct regulator *regulator, unsigned int mode) +{ + struct regulator_dev *rdev = regulator->rdev; + int ret; + int regulator_curr_mode; + + regulator_lock(rdev); + + /* sanity check */ + if (!rdev->desc->ops->set_mode) { + ret = -EINVAL; + goto out; + } + + /* return if the same mode is requested */ + if (rdev->desc->ops->get_mode) { + regulator_curr_mode = rdev->desc->ops->get_mode(rdev); + if (regulator_curr_mode == mode) { + ret = 0; + goto out; + } + } + + /* constraints check */ + ret = regulator_mode_constrain(rdev, &mode); + if (ret < 0) + goto out; + + ret = rdev->desc->ops->set_mode(rdev, mode); +out: + regulator_unlock(rdev); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_mode); + +static unsigned int _regulator_get_mode_unlocked(struct regulator_dev *rdev) +{ + /* sanity check */ + if (!rdev->desc->ops->get_mode) + return -EINVAL; + + return rdev->desc->ops->get_mode(rdev); +} + +static unsigned int _regulator_get_mode(struct regulator_dev *rdev) +{ + int ret; + + regulator_lock(rdev); + ret = _regulator_get_mode_unlocked(rdev); + regulator_unlock(rdev); + + return ret; +} + +/** + * regulator_get_mode - get regulator operating mode + * @regulator: regulator source + * + * Get the current regulator operating mode. + * + * Return: Current operating mode as %REGULATOR_MODE_* values, + * or a negative error number on failure. + */ +unsigned int regulator_get_mode(struct regulator *regulator) +{ + return _regulator_get_mode(regulator->rdev); +} +EXPORT_SYMBOL_GPL(regulator_get_mode); + +static int rdev_get_cached_err_flags(struct regulator_dev *rdev) +{ + int ret = 0; + + if (rdev->use_cached_err) { + spin_lock(&rdev->err_lock); + ret = rdev->cached_err; + spin_unlock(&rdev->err_lock); + } + return ret; +} + +static int _regulator_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + int cached_flags, ret = 0; + + regulator_lock(rdev); + + cached_flags = rdev_get_cached_err_flags(rdev); + + if (rdev->desc->ops->get_error_flags) + ret = rdev->desc->ops->get_error_flags(rdev, flags); + else if (!rdev->use_cached_err) + ret = -EINVAL; + + *flags |= cached_flags; + + regulator_unlock(rdev); + + return ret; +} + +/** + * regulator_get_error_flags - get regulator error information + * @regulator: regulator source + * @flags: pointer to store error flags + * + * Get the current regulator error information. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_get_error_flags(struct regulator *regulator, + unsigned int *flags) +{ + return _regulator_get_error_flags(regulator->rdev, flags); +} +EXPORT_SYMBOL_GPL(regulator_get_error_flags); + +/** + * regulator_set_load - set regulator load + * @regulator: regulator source + * @uA_load: load current + * + * Notifies the regulator core of a new device load. This is then used by + * DRMS (if enabled by constraints) to set the most efficient regulator + * operating mode for the new regulator loading. + * + * Consumer devices notify their supply regulator of the maximum power + * they will require (can be taken from device datasheet in the power + * consumption tables) when they change operational status and hence power + * state. Examples of operational state changes that can affect power + * consumption are :- + * + * o Device is opened / closed. + * o Device I/O is about to begin or has just finished. + * o Device is idling in between work. + * + * This information is also exported via sysfs to userspace. + * + * DRMS will sum the total requested load on the regulator and change + * to the most efficient operating mode if platform constraints allow. + * + * NOTE: when a regulator consumer requests to have a regulator + * disabled then any load that consumer requested no longer counts + * toward the total requested load. If the regulator is re-enabled + * then the previously requested load will start counting again. + * + * If a regulator is an always-on regulator then an individual consumer's + * load will still be removed if that consumer is fully disabled. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_set_load(struct regulator *regulator, int uA_load) +{ + struct regulator_dev *rdev = regulator->rdev; + int old_uA_load; + int ret = 0; + + regulator_lock(rdev); + old_uA_load = regulator->uA_load; + regulator->uA_load = uA_load; + if (regulator->enable_count && old_uA_load != uA_load) { + ret = drms_uA_update(rdev); + if (ret < 0) + regulator->uA_load = old_uA_load; + } + regulator_unlock(rdev); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_load); + +/** + * regulator_allow_bypass - allow the regulator to go into bypass mode + * + * @regulator: Regulator to configure + * @enable: enable or disable bypass mode + * + * Allow the regulator to go into bypass mode if all other consumers + * for the regulator also enable bypass mode and the machine + * constraints allow this. Bypass mode means that the regulator is + * simply passing the input directly to the output with no regulation. + * + * Return: 0 on success or if changing bypass is not possible, or + * a negative error number on failure. + */ +int regulator_allow_bypass(struct regulator *regulator, bool enable) +{ + struct regulator_dev *rdev = regulator->rdev; + const char *name = rdev_get_name(rdev); + int ret = 0; + + if (!rdev->desc->ops->set_bypass) + return 0; + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_BYPASS)) + return 0; + + regulator_lock(rdev); + + if (enable && !regulator->bypass) { + rdev->bypass_count++; + + if (rdev->bypass_count == rdev->open_count) { + trace_regulator_bypass_enable(name); + + ret = rdev->desc->ops->set_bypass(rdev, enable); + if (ret != 0) + rdev->bypass_count--; + else + trace_regulator_bypass_enable_complete(name); + } + + } else if (!enable && regulator->bypass) { + rdev->bypass_count--; + + if (rdev->bypass_count != rdev->open_count) { + trace_regulator_bypass_disable(name); + + ret = rdev->desc->ops->set_bypass(rdev, enable); + if (ret != 0) + rdev->bypass_count++; + else + trace_regulator_bypass_disable_complete(name); + } + } + + if (ret == 0) + regulator->bypass = enable; + + regulator_unlock(rdev); + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_allow_bypass); + +/** + * regulator_register_notifier - register regulator event notifier + * @regulator: regulator source + * @nb: notifier block + * + * Register notifier block to receive regulator events. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_register_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + return blocking_notifier_chain_register(®ulator->rdev->notifier, + nb); +} +EXPORT_SYMBOL_GPL(regulator_register_notifier); + +/** + * regulator_unregister_notifier - unregister regulator event notifier + * @regulator: regulator source + * @nb: notifier block + * + * Unregister regulator event notifier block. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_unregister_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + return blocking_notifier_chain_unregister(®ulator->rdev->notifier, + nb); +} +EXPORT_SYMBOL_GPL(regulator_unregister_notifier); + +/* notify regulator consumers and downstream regulator consumers. + * Note mutex must be held by caller. + */ +static int _notifier_call_chain(struct regulator_dev *rdev, + unsigned long event, void *data) +{ + /* call rdev chain first */ + int ret = blocking_notifier_call_chain(&rdev->notifier, event, data); + + if (IS_REACHABLE(CONFIG_REGULATOR_NETLINK_EVENTS)) { + struct device *parent = rdev->dev.parent; + const char *rname = rdev_get_name(rdev); + char name[32]; + + /* Avoid duplicate debugfs directory names */ + if (parent && rname == rdev->desc->name) { + snprintf(name, sizeof(name), "%s-%s", dev_name(parent), + rname); + rname = name; + } + reg_generate_netlink_event(rname, event); + } + + return ret; +} + +int _regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers, enum regulator_get_type get_type) +{ + int i; + int ret; + + for (i = 0; i < num_consumers; i++) + consumers[i].consumer = NULL; + + for (i = 0; i < num_consumers; i++) { + consumers[i].consumer = _regulator_get(dev, + consumers[i].supply, get_type); + if (IS_ERR(consumers[i].consumer)) { + ret = dev_err_probe(dev, PTR_ERR(consumers[i].consumer), + "Failed to get supply '%s'\n", + consumers[i].supply); + consumers[i].consumer = NULL; + goto err; + } + + if (consumers[i].init_load_uA > 0) { + ret = regulator_set_load(consumers[i].consumer, + consumers[i].init_load_uA); + if (ret) { + i++; + goto err; + } + } + } + + return 0; + +err: + while (--i >= 0) + regulator_put(consumers[i].consumer); + + return ret; +} + +/** + * regulator_bulk_get - get multiple regulator consumers + * + * @dev: Device to supply + * @num_consumers: Number of consumers to register + * @consumers: Configuration of consumers; clients are stored here. + * + * This helper function allows drivers to get several regulator + * consumers in one operation. If any of the regulators cannot be + * acquired then any regulators that were allocated will be freed + * before returning to the caller. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers) +{ + return _regulator_bulk_get(dev, num_consumers, consumers, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(regulator_bulk_get); + +static void regulator_bulk_enable_async(void *data, async_cookie_t cookie) +{ + struct regulator_bulk_data *bulk = data; + + bulk->ret = regulator_enable(bulk->consumer); +} + +/** + * regulator_bulk_enable - enable multiple regulator consumers + * + * @num_consumers: Number of consumers + * @consumers: Consumer data; clients are stored here. + * + * This convenience API allows consumers to enable multiple regulator + * clients in a single API call. If any consumers cannot be enabled + * then any others that were enabled will be disabled again prior to + * return. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_bulk_enable(int num_consumers, + struct regulator_bulk_data *consumers) +{ + ASYNC_DOMAIN_EXCLUSIVE(async_domain); + int i; + int ret = 0; + + for (i = 0; i < num_consumers; i++) { + async_schedule_domain(regulator_bulk_enable_async, + &consumers[i], &async_domain); + } + + async_synchronize_full_domain(&async_domain); + + /* If any consumer failed we need to unwind any that succeeded */ + for (i = 0; i < num_consumers; i++) { + if (consumers[i].ret != 0) { + ret = consumers[i].ret; + goto err; + } + } + + return 0; + +err: + for (i = 0; i < num_consumers; i++) { + if (consumers[i].ret < 0) + pr_err("Failed to enable %s: %pe\n", consumers[i].supply, + ERR_PTR(consumers[i].ret)); + else + regulator_disable(consumers[i].consumer); + } + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_bulk_enable); + +/** + * regulator_bulk_disable - disable multiple regulator consumers + * + * @num_consumers: Number of consumers + * @consumers: Consumer data; clients are stored here. + * + * This convenience API allows consumers to disable multiple regulator + * clients in a single API call. If any consumers cannot be disabled + * then any others that were disabled will be enabled again prior to + * return. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_bulk_disable(int num_consumers, + struct regulator_bulk_data *consumers) +{ + int i; + int ret, r; + + for (i = num_consumers - 1; i >= 0; --i) { + ret = regulator_disable(consumers[i].consumer); + if (ret != 0) + goto err; + } + + return 0; + +err: + pr_err("Failed to disable %s: %pe\n", consumers[i].supply, ERR_PTR(ret)); + for (++i; i < num_consumers; ++i) { + r = regulator_enable(consumers[i].consumer); + if (r != 0) + pr_err("Failed to re-enable %s: %pe\n", + consumers[i].supply, ERR_PTR(r)); + } + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_bulk_disable); + +/** + * regulator_bulk_force_disable - force disable multiple regulator consumers + * + * @num_consumers: Number of consumers + * @consumers: Consumer data; clients are stored here. + * + * This convenience API allows consumers to forcibly disable multiple regulator + * clients in a single API call. + * NOTE: This should be used for situations when device damage will + * likely occur if the regulators are not disabled (e.g. over temp). + * Although regulator_force_disable function call for some consumers can + * return error numbers, the function is called for all consumers. + * + * Return: 0 on success or a negative error number on failure. + */ +int regulator_bulk_force_disable(int num_consumers, + struct regulator_bulk_data *consumers) +{ + int i; + int ret = 0; + + for (i = 0; i < num_consumers; i++) { + consumers[i].ret = + regulator_force_disable(consumers[i].consumer); + + /* Store first error for reporting */ + if (consumers[i].ret && !ret) + ret = consumers[i].ret; + } + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_bulk_force_disable); + +/** + * regulator_bulk_free - free multiple regulator consumers + * + * @num_consumers: Number of consumers + * @consumers: Consumer data; clients are stored here. + * + * This convenience API allows consumers to free multiple regulator + * clients in a single API call. + */ +void regulator_bulk_free(int num_consumers, + struct regulator_bulk_data *consumers) +{ + int i; + + for (i = 0; i < num_consumers; i++) { + regulator_put(consumers[i].consumer); + consumers[i].consumer = NULL; + } +} +EXPORT_SYMBOL_GPL(regulator_bulk_free); + +/** + * regulator_handle_critical - Handle events for system-critical regulators. + * @rdev: The regulator device. + * @event: The event being handled. + * + * This function handles critical events such as under-voltage, over-current, + * and unknown errors for regulators deemed system-critical. On detecting such + * events, it triggers a hardware protection shutdown with a defined timeout. + */ +static void regulator_handle_critical(struct regulator_dev *rdev, + unsigned long event) +{ + const char *reason = NULL; + + if (!rdev->constraints->system_critical) + return; + + switch (event) { + case REGULATOR_EVENT_UNDER_VOLTAGE: + reason = "System critical regulator: voltage drop detected"; + break; + case REGULATOR_EVENT_OVER_CURRENT: + reason = "System critical regulator: over-current detected"; + break; + case REGULATOR_EVENT_FAIL: + reason = "System critical regulator: unknown error"; + } + + if (!reason) + return; + + hw_protection_trigger(reason, + rdev->constraints->uv_less_critical_window_ms); +} + +/** + * regulator_notifier_call_chain - call regulator event notifier + * @rdev: regulator source + * @event: notifier block + * @data: callback-specific data. + * + * Called by regulator drivers to notify clients a regulator event has + * occurred. + * + * Return: %NOTIFY_DONE. + */ +int regulator_notifier_call_chain(struct regulator_dev *rdev, + unsigned long event, void *data) +{ + regulator_handle_critical(rdev, event); + + _notifier_call_chain(rdev, event, data); + return NOTIFY_DONE; + +} +EXPORT_SYMBOL_GPL(regulator_notifier_call_chain); + +/** + * regulator_mode_to_status - convert a regulator mode into a status + * + * @mode: Mode to convert + * + * Convert a regulator mode into a status. + * + * Return: %REGULATOR_STATUS_* value corresponding to given mode. + */ +int regulator_mode_to_status(unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_FAST: + return REGULATOR_STATUS_FAST; + case REGULATOR_MODE_NORMAL: + return REGULATOR_STATUS_NORMAL; + case REGULATOR_MODE_IDLE: + return REGULATOR_STATUS_IDLE; + case REGULATOR_MODE_STANDBY: + return REGULATOR_STATUS_STANDBY; + default: + return REGULATOR_STATUS_UNDEFINED; + } +} +EXPORT_SYMBOL_GPL(regulator_mode_to_status); + +static struct attribute *regulator_dev_attrs[] = { + &dev_attr_name.attr, + &dev_attr_num_users.attr, + &dev_attr_type.attr, + &dev_attr_microvolts.attr, + &dev_attr_microamps.attr, + &dev_attr_opmode.attr, + &dev_attr_state.attr, + &dev_attr_status.attr, + &dev_attr_bypass.attr, + &dev_attr_requested_microamps.attr, + &dev_attr_min_microvolts.attr, + &dev_attr_max_microvolts.attr, + &dev_attr_min_microamps.attr, + &dev_attr_max_microamps.attr, + &dev_attr_under_voltage.attr, + &dev_attr_over_current.attr, + &dev_attr_regulation_out.attr, + &dev_attr_fail.attr, + &dev_attr_over_temp.attr, + &dev_attr_under_voltage_warn.attr, + &dev_attr_over_current_warn.attr, + &dev_attr_over_voltage_warn.attr, + &dev_attr_over_temp_warn.attr, + &dev_attr_suspend_standby_state.attr, + &dev_attr_suspend_mem_state.attr, + &dev_attr_suspend_disk_state.attr, + &dev_attr_suspend_standby_microvolts.attr, + &dev_attr_suspend_mem_microvolts.attr, + &dev_attr_suspend_disk_microvolts.attr, + &dev_attr_suspend_standby_mode.attr, + &dev_attr_suspend_mem_mode.attr, + &dev_attr_suspend_disk_mode.attr, + &dev_attr_power_budget_milliwatt.attr, + &dev_attr_power_requested_milliwatt.attr, + NULL +}; + +/* + * To avoid cluttering sysfs (and memory) with useless state, only + * create attributes that can be meaningfully displayed. + */ +static umode_t regulator_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int idx) +{ + struct device *dev = kobj_to_dev(kobj); + struct regulator_dev *rdev = dev_to_rdev(dev); + const struct regulator_ops *ops = rdev->desc->ops; + umode_t mode = attr->mode; + + /* these three are always present */ + if (attr == &dev_attr_name.attr || + attr == &dev_attr_num_users.attr || + attr == &dev_attr_type.attr) + return mode; + + /* some attributes need specific methods to be displayed */ + if (attr == &dev_attr_microvolts.attr) { + if ((ops->get_voltage && ops->get_voltage(rdev) >= 0) || + (ops->get_voltage_sel && ops->get_voltage_sel(rdev) >= 0) || + (ops->list_voltage && ops->list_voltage(rdev, 0) >= 0) || + (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1)) + return mode; + return 0; + } + + if (attr == &dev_attr_microamps.attr) + return ops->get_current_limit ? mode : 0; + + if (attr == &dev_attr_opmode.attr) + return ops->get_mode ? mode : 0; + + if (attr == &dev_attr_state.attr) + return (rdev->ena_pin || ops->is_enabled) ? mode : 0; + + if (attr == &dev_attr_status.attr) + return ops->get_status ? mode : 0; + + if (attr == &dev_attr_bypass.attr) + return ops->get_bypass ? mode : 0; + + if (attr == &dev_attr_under_voltage.attr || + attr == &dev_attr_over_current.attr || + attr == &dev_attr_regulation_out.attr || + attr == &dev_attr_fail.attr || + attr == &dev_attr_over_temp.attr || + attr == &dev_attr_under_voltage_warn.attr || + attr == &dev_attr_over_current_warn.attr || + attr == &dev_attr_over_voltage_warn.attr || + attr == &dev_attr_over_temp_warn.attr) + return ops->get_error_flags ? mode : 0; + + /* constraints need specific supporting methods */ + if (attr == &dev_attr_min_microvolts.attr || + attr == &dev_attr_max_microvolts.attr) + return (ops->set_voltage || ops->set_voltage_sel) ? mode : 0; + + if (attr == &dev_attr_min_microamps.attr || + attr == &dev_attr_max_microamps.attr) + return ops->set_current_limit ? mode : 0; + + if (attr == &dev_attr_suspend_standby_state.attr || + attr == &dev_attr_suspend_mem_state.attr || + attr == &dev_attr_suspend_disk_state.attr) + return mode; + + if (attr == &dev_attr_suspend_standby_microvolts.attr || + attr == &dev_attr_suspend_mem_microvolts.attr || + attr == &dev_attr_suspend_disk_microvolts.attr) + return ops->set_suspend_voltage ? mode : 0; + + if (attr == &dev_attr_suspend_standby_mode.attr || + attr == &dev_attr_suspend_mem_mode.attr || + attr == &dev_attr_suspend_disk_mode.attr) + return ops->set_suspend_mode ? mode : 0; + + if (attr == &dev_attr_power_budget_milliwatt.attr || + attr == &dev_attr_power_requested_milliwatt.attr) + return rdev->constraints->pw_budget_mW != INT_MAX ? mode : 0; + + return mode; +} + +static const struct attribute_group regulator_dev_group = { + .attrs = regulator_dev_attrs, + .is_visible = regulator_attr_is_visible, +}; + +static const struct attribute_group *regulator_dev_groups[] = { + ®ulator_dev_group, + NULL +}; + +static void regulator_dev_release(struct device *dev) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + + debugfs_remove_recursive(rdev->debugfs); + kfree(rdev->constraints); + of_node_put(rdev->dev.of_node); + kfree(rdev); +} + +static void rdev_init_debugfs(struct regulator_dev *rdev) +{ + struct device *parent = rdev->dev.parent; + const char *rname = rdev_get_name(rdev); + char name[NAME_MAX]; + + /* Avoid duplicate debugfs directory names */ + if (parent && rname == rdev->desc->name) { + snprintf(name, sizeof(name), "%s-%s", dev_name(parent), + rname); + rname = name; + } + + rdev->debugfs = debugfs_create_dir(rname, debugfs_root); + if (IS_ERR(rdev->debugfs)) + rdev_dbg(rdev, "Failed to create debugfs directory\n"); + + debugfs_create_u32("use_count", 0444, rdev->debugfs, + &rdev->use_count); + debugfs_create_u32("open_count", 0444, rdev->debugfs, + &rdev->open_count); + debugfs_create_u32("bypass_count", 0444, rdev->debugfs, + &rdev->bypass_count); +} + +int regulator_coupler_register(struct regulator_coupler *coupler) +{ + mutex_lock(®ulator_list_mutex); + list_add_tail(&coupler->list, ®ulator_coupler_list); + mutex_unlock(®ulator_list_mutex); + + return 0; +} + +static struct regulator_coupler * +regulator_find_coupler(struct regulator_dev *rdev) +{ + struct regulator_coupler *coupler; + int err; + + /* + * Note that regulators are appended to the list and the generic + * coupler is registered first, hence it will be attached at last + * if nobody cared. + */ + list_for_each_entry_reverse(coupler, ®ulator_coupler_list, list) { + err = coupler->attach_regulator(coupler, rdev); + if (!err) { + if (!coupler->balance_voltage && + rdev->coupling_desc.n_coupled > 2) + goto err_unsupported; + + return coupler; + } + + if (err < 0) + return ERR_PTR(err); + + if (err == 1) + continue; + + break; + } + + return ERR_PTR(-EINVAL); + +err_unsupported: + if (coupler->detach_regulator) + coupler->detach_regulator(coupler, rdev); + + rdev_err(rdev, + "Voltage balancing for multiple regulator couples is unimplemented\n"); + + return ERR_PTR(-EPERM); +} + +static void regulator_resolve_coupling(struct regulator_dev *rdev) +{ + struct regulator_coupler *coupler = rdev->coupling_desc.coupler; + struct coupling_desc *c_desc = &rdev->coupling_desc; + int n_coupled = c_desc->n_coupled; + struct regulator_dev *c_rdev; + int i; + + for (i = 1; i < n_coupled; i++) { + /* already resolved */ + if (c_desc->coupled_rdevs[i]) + continue; + + c_rdev = of_parse_coupled_regulator(rdev, i - 1); + + if (!c_rdev) + continue; + + if (c_rdev->coupling_desc.coupler != coupler) { + rdev_err(rdev, "coupler mismatch with %s\n", + rdev_get_name(c_rdev)); + return; + } + + c_desc->coupled_rdevs[i] = c_rdev; + c_desc->n_resolved++; + + regulator_resolve_coupling(c_rdev); + } +} + +static void regulator_remove_coupling(struct regulator_dev *rdev) +{ + struct regulator_coupler *coupler = rdev->coupling_desc.coupler; + struct coupling_desc *__c_desc, *c_desc = &rdev->coupling_desc; + struct regulator_dev *__c_rdev, *c_rdev; + unsigned int __n_coupled, n_coupled; + int i, k; + int err; + + n_coupled = c_desc->n_coupled; + + for (i = 1; i < n_coupled; i++) { + c_rdev = c_desc->coupled_rdevs[i]; + + if (!c_rdev) + continue; + + regulator_lock(c_rdev); + + __c_desc = &c_rdev->coupling_desc; + __n_coupled = __c_desc->n_coupled; + + for (k = 1; k < __n_coupled; k++) { + __c_rdev = __c_desc->coupled_rdevs[k]; + + if (__c_rdev == rdev) { + __c_desc->coupled_rdevs[k] = NULL; + __c_desc->n_resolved--; + break; + } + } + + regulator_unlock(c_rdev); + + c_desc->coupled_rdevs[i] = NULL; + c_desc->n_resolved--; + } + + if (coupler && coupler->detach_regulator) { + err = coupler->detach_regulator(coupler, rdev); + if (err) + rdev_err(rdev, "failed to detach from coupler: %pe\n", + ERR_PTR(err)); + } + + rdev->coupling_desc.n_coupled = 0; + kfree(rdev->coupling_desc.coupled_rdevs); + rdev->coupling_desc.coupled_rdevs = NULL; +} + +static int regulator_init_coupling(struct regulator_dev *rdev) +{ + struct regulator_dev **coupled; + int err, n_phandles; + + if (!IS_ENABLED(CONFIG_OF)) + n_phandles = 0; + else + n_phandles = of_get_n_coupled(rdev); + + coupled = kzalloc_objs(*coupled, n_phandles + 1); + if (!coupled) + return -ENOMEM; + + rdev->coupling_desc.coupled_rdevs = coupled; + + /* + * Every regulator should always have coupling descriptor filled with + * at least pointer to itself. + */ + rdev->coupling_desc.coupled_rdevs[0] = rdev; + rdev->coupling_desc.n_coupled = n_phandles + 1; + rdev->coupling_desc.n_resolved++; + + /* regulator isn't coupled */ + if (n_phandles == 0) + return 0; + + if (!of_check_coupling_data(rdev)) + return -EPERM; + + mutex_lock(®ulator_list_mutex); + rdev->coupling_desc.coupler = regulator_find_coupler(rdev); + mutex_unlock(®ulator_list_mutex); + + if (IS_ERR(rdev->coupling_desc.coupler)) { + err = PTR_ERR(rdev->coupling_desc.coupler); + rdev_err(rdev, "failed to get coupler: %pe\n", ERR_PTR(err)); + return err; + } + + return 0; +} + +static int generic_coupler_attach(struct regulator_coupler *coupler, + struct regulator_dev *rdev) +{ + if (rdev->coupling_desc.n_coupled > 2) { + rdev_err(rdev, + "Voltage balancing for multiple regulator couples is unimplemented\n"); + return -EPERM; + } + + if (!rdev->constraints->always_on) { + rdev_err(rdev, + "Coupling of a non always-on regulator is unimplemented\n"); + return -ENOTSUPP; + } + + return 0; +} + +static struct regulator_coupler generic_regulator_coupler = { + .attach_regulator = generic_coupler_attach, +}; + +/** + * regulator_register - register regulator + * @dev: the device that drive the regulator + * @regulator_desc: regulator to register + * @cfg: runtime configuration for regulator + * + * Called by regulator drivers to register a regulator. + * + * Return: Pointer to a valid &struct regulator_dev on success or + * an ERR_PTR() encoded negative error number on failure. + */ +struct regulator_dev * +regulator_register(struct device *dev, + const struct regulator_desc *regulator_desc, + const struct regulator_config *cfg) +{ + const struct regulator_init_data *init_data; + struct regulator_config *config = NULL; + static atomic_t regulator_no = ATOMIC_INIT(-1); + struct regulator_dev *rdev; + bool tried_supply_resolve = false; + bool dangling_cfg_gpiod = false; + bool dangling_of_gpiod = false; + int ret, i; + + if (cfg == NULL) + return ERR_PTR(-EINVAL); + if (cfg->ena_gpiod) + dangling_cfg_gpiod = true; + if (regulator_desc == NULL) { + ret = -EINVAL; + goto rinse; + } + + WARN_ON(!dev || !cfg->dev); + + if (regulator_desc->name == NULL || regulator_desc->ops == NULL) { + ret = -EINVAL; + goto rinse; + } + + if (regulator_desc->type != REGULATOR_VOLTAGE && + regulator_desc->type != REGULATOR_CURRENT) { + ret = -EINVAL; + goto rinse; + } + + /* Only one of each should be implemented */ + WARN_ON(regulator_desc->ops->get_voltage && + regulator_desc->ops->get_voltage_sel); + WARN_ON(regulator_desc->ops->set_voltage && + regulator_desc->ops->set_voltage_sel); + + /* If we're using selectors we must implement list_voltage. */ + if (regulator_desc->ops->get_voltage_sel && + !regulator_desc->ops->list_voltage) { + ret = -EINVAL; + goto rinse; + } + if (regulator_desc->ops->set_voltage_sel && + !regulator_desc->ops->list_voltage) { + ret = -EINVAL; + goto rinse; + } + + rdev = kzalloc_obj(struct regulator_dev); + if (rdev == NULL) { + ret = -ENOMEM; + goto rinse; + } + device_initialize(&rdev->dev); + dev_set_drvdata(&rdev->dev, rdev); + rdev->dev.class = ®ulator_class; + spin_lock_init(&rdev->err_lock); + + /* + * Duplicate the config so the driver could override it after + * parsing init data. + */ + config = kmemdup(cfg, sizeof(*cfg), GFP_KERNEL); + if (config == NULL) { + ret = -ENOMEM; + goto clean; + } + + /* + * DT may override the config->init_data provided if the platform + * needs to do so. If so, config->init_data is completely ignored. + */ + init_data = regulator_of_get_init_data(dev, regulator_desc, config, + &rdev->dev.of_node); + + /* + * Sometimes not all resources are probed already so we need to take + * that into account. This happens most the time if the ena_gpiod comes + * from a gpio extender or something else. + */ + if (PTR_ERR(init_data) == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto clean; + } + + /* + * We need to keep track of any GPIO descriptor coming from the + * device tree until we have handled it over to the core. If the + * config that was passed in to this function DOES NOT contain + * a descriptor, and the config after this call DOES contain + * a descriptor, we definitely got one from parsing the device + * tree. + */ + if (!cfg->ena_gpiod && config->ena_gpiod) + dangling_of_gpiod = true; + if (!init_data) { + init_data = config->init_data; + rdev->dev.of_node = of_node_get(config->of_node); + } + + ww_mutex_init(&rdev->mutex, ®ulator_ww_class); + rdev->reg_data = config->driver_data; + rdev->owner = regulator_desc->owner; + rdev->desc = regulator_desc; + if (config->regmap) + rdev->regmap = config->regmap; + else if (dev_get_regmap(dev, NULL)) + rdev->regmap = dev_get_regmap(dev, NULL); + else if (dev->parent) + rdev->regmap = dev_get_regmap(dev->parent, NULL); + INIT_LIST_HEAD(&rdev->consumer_list); + INIT_LIST_HEAD(&rdev->list); + BLOCKING_INIT_NOTIFIER_HEAD(&rdev->notifier); + INIT_DELAYED_WORK(&rdev->disable_work, regulator_disable_work); + + if (init_data && init_data->supply_regulator) + rdev->supply_name = init_data->supply_regulator; + else if (regulator_desc->supply_name) + rdev->supply_name = regulator_desc->supply_name; + + /* register with sysfs */ + rdev->dev.parent = config->dev; + dev_set_name(&rdev->dev, "regulator.%lu", + (unsigned long) atomic_inc_return(®ulator_no)); + + /* set regulator constraints */ + if (init_data) + rdev->constraints = kmemdup(&init_data->constraints, + sizeof(*rdev->constraints), + GFP_KERNEL); + else + rdev->constraints = kzalloc_obj(*rdev->constraints); + if (!rdev->constraints) { + ret = -ENOMEM; + goto wash; + } + + if (regulator_desc->init_cb) { + ret = regulator_desc->init_cb(rdev, config); + if (ret < 0) + goto wash; + } + + if (config->ena_gpiod) { + ret = regulator_ena_gpio_request(rdev, config); + if (ret != 0) { + rdev_err(rdev, "Failed to request enable GPIO: %pe\n", + ERR_PTR(ret)); + goto wash; + } + /* The regulator core took over the GPIO descriptor */ + dangling_cfg_gpiod = false; + dangling_of_gpiod = false; + } + + ret = set_machine_constraints(rdev, false); + if (ret == -EPROBE_DEFER) { + /* Regulator might be in bypass mode or an always-on or boot-on + * regulator and so needs its supply to set the constraints or + * for enable. + */ + /* FIXME: this currently triggers a chicken-and-egg problem + * when creating -SUPPLY symlink in sysfs to a regulator + * that is just being created + */ + rdev_dbg(rdev, "will resolve supply early: %s\n", + rdev->supply_name); + ret = regulator_resolve_supply(rdev); + if (!ret) + ret = set_machine_constraints(rdev, false); + else + rdev_dbg(rdev, "unable to resolve supply early: %pe\n", + ERR_PTR(ret)); + tried_supply_resolve = true; + } + if (ret < 0) { + if (ret != -EPROBE_DEFER) + goto wash; + rdev->constraints_pending = true; + } + + ret = regulator_init_coupling(rdev); + if (ret < 0) + goto wash; + + /* add consumers devices */ + if (init_data) { + for (i = 0; i < init_data->num_consumer_supplies; i++) { + ret = set_consumer_device_supply(rdev, + init_data->consumer_supplies[i].dev_name, + init_data->consumer_supplies[i].supply); + if (ret < 0) { + dev_err(dev, "Failed to set supply %s\n", + init_data->consumer_supplies[i].supply); + goto unset_supplies; + } + } + } + + if (!rdev->desc->ops->get_voltage && + !rdev->desc->ops->list_voltage && + !rdev->desc->fixed_uV) + rdev->is_switch = true; + + ret = device_add(&rdev->dev); + if (ret != 0) + goto unset_supplies; + + if (!tried_supply_resolve) { + /* + * As an optimisation, try to resolve our supply (if any) now to + * avoid adding the bus device. Errors are not fatal at this + * stage, we'll simply try again later. + */ + ret = regulator_resolve_supply(rdev); + if (ret) + rdev_dbg(rdev, + "unable to resolve supply (ignoring): %pe\n", + ERR_PTR(ret)); + } + + /* + * If we have a supply but couldn't resolve it yet, register a device + * with our bus, so that the bus probe gets called whenever any new + * driver binds, allowing us to retry matching supplies and which then + * triggers (re)probe of consumers if successful. + */ + if (rdev->supply_name && !rdev->supply) { + device_initialize(&rdev->bdev); + rdev->bdev.bus = ®ulator_bus; + rdev->bdev.parent = &rdev->dev; + device_set_pm_not_required(&rdev->dev); + dev_set_name(&rdev->bdev, "%s.bdev", dev_name(&rdev->dev)); + + ret = device_add(&rdev->bdev); + if (ret) + goto del_cdev_and_bdev; + } + + rdev_init_debugfs(rdev); + + /* try to resolve regulators coupling since a new one was registered */ + mutex_lock(®ulator_list_mutex); + regulator_resolve_coupling(rdev); + mutex_unlock(®ulator_list_mutex); + + kfree(config); + return rdev; + +del_cdev_and_bdev: + if (rdev->bdev.bus == ®ulator_bus) + put_device(&rdev->bdev); + device_del(&rdev->dev); +unset_supplies: + mutex_lock(®ulator_list_mutex); + unset_regulator_supplies(rdev); + regulator_remove_coupling(rdev); + mutex_unlock(®ulator_list_mutex); +wash: + regulator_put(rdev->supply); + kfree(rdev->coupling_desc.coupled_rdevs); + mutex_lock(®ulator_list_mutex); + regulator_ena_gpio_free(rdev); + mutex_unlock(®ulator_list_mutex); +clean: + if (dangling_of_gpiod) + gpiod_put(config->ena_gpiod); + kfree(config); + put_device(&rdev->dev); +rinse: + if (dangling_cfg_gpiod) + gpiod_put(cfg->ena_gpiod); + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(regulator_register); + +/** + * regulator_unregister - unregister regulator + * @rdev: regulator to unregister + * + * Called by regulator drivers to unregister a regulator. + */ +void regulator_unregister(struct regulator_dev *rdev) +{ + if (rdev == NULL) + return; + + if (rdev->supply) { + regulator_unregister_notifier(rdev->supply, + &rdev->supply_fwd_nb); + + while (rdev->use_count--) + regulator_disable(rdev->supply); + regulator_put(rdev->supply); + } + + flush_work(&rdev->disable_work.work); + + mutex_lock(®ulator_list_mutex); + + WARN_ON(rdev->open_count); + regulator_remove_coupling(rdev); + unset_regulator_supplies(rdev); + list_del(&rdev->list); + regulator_ena_gpio_free(rdev); + if (rdev->bdev.bus == ®ulator_bus) + /* only if the device was added in the first place */ + device_unregister(&rdev->bdev); + device_unregister(&rdev->dev); + + mutex_unlock(®ulator_list_mutex); +} +EXPORT_SYMBOL_GPL(regulator_unregister); + +#ifdef CONFIG_SUSPEND +/** + * regulator_suspend - prepare regulators for system wide suspend + * @dev: ``&struct device`` pointer that is passed to _regulator_suspend() + * + * Configure each regulator with it's suspend operating parameters for state. + * + * Return: 0 on success or a negative error number on failure. + */ +static int regulator_suspend(struct device *dev) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + suspend_state_t state = pm_suspend_target_state; + int ret; + const struct regulator_state *rstate; + + rstate = regulator_get_suspend_state_check(rdev, state); + if (!rstate) + return 0; + + regulator_lock(rdev); + ret = __suspend_set_state(rdev, rstate); + regulator_unlock(rdev); + + return ret; +} + +static int regulator_resume(struct device *dev) +{ + suspend_state_t state = pm_suspend_target_state; + struct regulator_dev *rdev = dev_to_rdev(dev); + struct regulator_state *rstate; + int ret = 0; + + rstate = regulator_get_suspend_state(rdev, state); + if (rstate == NULL) + return 0; + + /* Avoid grabbing the lock if we don't need to */ + if (!rdev->desc->ops->resume) + return 0; + + regulator_lock(rdev); + + if (rstate->enabled == ENABLE_IN_SUSPEND || + rstate->enabled == DISABLE_IN_SUSPEND) + ret = rdev->desc->ops->resume(rdev); + + regulator_unlock(rdev); + + return ret; +} +#else /* !CONFIG_SUSPEND */ + +#define regulator_suspend NULL +#define regulator_resume NULL + +#endif /* !CONFIG_SUSPEND */ + +#ifdef CONFIG_PM +static const struct dev_pm_ops __maybe_unused regulator_pm_ops = { + .suspend = regulator_suspend, + .resume = regulator_resume, +}; +#endif + +const struct class regulator_class = { + .name = "regulator", + .dev_release = regulator_dev_release, + .dev_groups = regulator_dev_groups, +#ifdef CONFIG_PM + .pm = ®ulator_pm_ops, +#endif +}; + +#define bdev_to_rdev(__bdev) container_of_const(__bdev, struct regulator_dev, bdev) + +static int regulator_bus_match(struct device *bdev, + const struct device_driver *drv) +{ + /* Match always succeeds, we only have one driver */ + return 1; +} + +static int regulator_bus_probe(struct device *bdev) +{ + struct regulator_dev *rdev = bdev_to_rdev(bdev); + int ret; + + ret = regulator_resolve_supply(rdev); + if (ret) + rdev_dbg(rdev, + "unable to resolve supply or constraints '%s': %pe\n", + rdev->supply_name, ERR_PTR(ret)); + else + rdev_dbg(rdev, "resolved supply '%s'\n", rdev->supply_name); + + return ret; +} + +static const struct bus_type regulator_bus = { + .name = "regulator", + .match = regulator_bus_match, + .probe = regulator_bus_probe, +}; + +static struct device_driver regulator_bus_driver = { + .name = "regulator-bus-drv", + .bus = ®ulator_bus, + .suppress_bind_attrs = true, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, +}; + +/** + * regulator_has_full_constraints - the system has fully specified constraints + * + * Calling this function will cause the regulator API to disable all + * regulators which have a zero use count and don't have an always_on + * constraint in a late_initcall. + * + * The intention is that this will become the default behaviour in a + * future kernel release so users are encouraged to use this facility + * now. + */ +void regulator_has_full_constraints(void) +{ + has_full_constraints = 1; +} +EXPORT_SYMBOL_GPL(regulator_has_full_constraints); + +/** + * rdev_get_drvdata - get rdev regulator driver data + * @rdev: regulator + * + * Get rdev regulator driver private data. This call can be used in the + * regulator driver context. + * + * Return: Pointer to regulator driver private data. + */ +void *rdev_get_drvdata(struct regulator_dev *rdev) +{ + return rdev->reg_data; +} +EXPORT_SYMBOL_GPL(rdev_get_drvdata); + +/** + * regulator_get_drvdata - get regulator driver data + * @regulator: regulator + * + * Get regulator driver private data. This call can be used in the consumer + * driver context when non API regulator specific functions need to be called. + * + * Return: Pointer to regulator driver private data. + */ +void *regulator_get_drvdata(struct regulator *regulator) +{ + return regulator->rdev->reg_data; +} +EXPORT_SYMBOL_GPL(regulator_get_drvdata); + +/** + * regulator_set_drvdata - set regulator driver data + * @regulator: regulator + * @data: data + */ +void regulator_set_drvdata(struct regulator *regulator, void *data) +{ + regulator->rdev->reg_data = data; +} +EXPORT_SYMBOL_GPL(regulator_set_drvdata); + +/** + * rdev_get_id - get regulator ID + * @rdev: regulator + * + * Return: Regulator ID for @rdev. + */ +int rdev_get_id(struct regulator_dev *rdev) +{ + return rdev->desc->id; +} +EXPORT_SYMBOL_GPL(rdev_get_id); + +struct device *rdev_get_dev(struct regulator_dev *rdev) +{ + return &rdev->dev; +} +EXPORT_SYMBOL_GPL(rdev_get_dev); + +struct regmap *rdev_get_regmap(struct regulator_dev *rdev) +{ + return rdev->regmap; +} +EXPORT_SYMBOL_GPL(rdev_get_regmap); + +void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data) +{ + return reg_init_data->driver_data; +} +EXPORT_SYMBOL_GPL(regulator_get_init_drvdata); + +#ifdef CONFIG_DEBUG_FS +static int supply_map_show(struct seq_file *sf, void *data) +{ + struct regulator_map *map; + + list_for_each_entry(map, ®ulator_map_list, list) { + seq_printf(sf, "%s -> %s.%s\n", + rdev_get_name(map->regulator), map->dev_name, + map->supply); + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(supply_map); + +struct summary_data { + struct seq_file *s; + struct regulator_dev *parent; + int level; +}; + +static void regulator_summary_show_subtree(struct seq_file *s, + struct regulator_dev *rdev, + int level); + +static int regulator_summary_show_children(struct device *dev, void *data) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + struct summary_data *summary_data = data; + + if (rdev->supply && rdev->supply->rdev == summary_data->parent) + regulator_summary_show_subtree(summary_data->s, rdev, + summary_data->level + 1); + + return 0; +} + +static void regulator_summary_show_subtree(struct seq_file *s, + struct regulator_dev *rdev, + int level) +{ + struct regulation_constraints *c; + struct regulator *consumer; + struct summary_data summary_data; + unsigned int opmode; + + if (!rdev) + return; + + opmode = _regulator_get_mode_unlocked(rdev); + seq_printf(s, "%*s%-*s %3d %4d %6d %7s ", + level * 3 + 1, "", + 30 - level * 3, rdev_get_name(rdev), + rdev->use_count, rdev->open_count, rdev->bypass_count, + regulator_opmode_to_str(opmode)); + + seq_printf(s, "%5dmV ", regulator_get_voltage_rdev(rdev) / 1000); + seq_printf(s, "%5dmA ", + _regulator_get_current_limit_unlocked(rdev) / 1000); + + c = rdev->constraints; + if (c) { + switch (rdev->desc->type) { + case REGULATOR_VOLTAGE: + seq_printf(s, "%5dmV %5dmV ", + c->min_uV / 1000, c->max_uV / 1000); + break; + case REGULATOR_CURRENT: + seq_printf(s, "%5dmA %5dmA ", + c->min_uA / 1000, c->max_uA / 1000); + break; + } + } + + seq_puts(s, "\n"); + + list_for_each_entry(consumer, &rdev->consumer_list, list) { + if (consumer->dev && consumer->dev->class == ®ulator_class) + continue; + + seq_printf(s, "%*s%-*s ", + (level + 1) * 3 + 1, "", + 30 - (level + 1) * 3, + consumer->supply_name ? consumer->supply_name : + consumer->dev ? dev_name(consumer->dev) : "deviceless"); + + switch (rdev->desc->type) { + case REGULATOR_VOLTAGE: + seq_printf(s, "%3d %33dmA%c%5dmV %5dmV", + consumer->enable_count, + consumer->uA_load / 1000, + consumer->uA_load && !consumer->enable_count ? + '*' : ' ', + consumer->voltage[PM_SUSPEND_ON].min_uV / 1000, + consumer->voltage[PM_SUSPEND_ON].max_uV / 1000); + break; + case REGULATOR_CURRENT: + break; + } + + seq_puts(s, "\n"); + } + + summary_data.s = s; + summary_data.level = level; + summary_data.parent = rdev; + + class_for_each_device(®ulator_class, NULL, &summary_data, + regulator_summary_show_children); +} + +struct summary_lock_data { + struct ww_acquire_ctx *ww_ctx; + struct regulator_dev **new_contended_rdev; + struct regulator_dev **old_contended_rdev; +}; + +static int regulator_summary_lock_one(struct device *dev, void *data) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + struct summary_lock_data *lock_data = data; + int ret = 0; + + if (rdev != *lock_data->old_contended_rdev) { + ret = regulator_lock_nested(rdev, lock_data->ww_ctx); + + if (ret == -EDEADLK) + *lock_data->new_contended_rdev = rdev; + else + WARN_ON_ONCE(ret); + } else { + *lock_data->old_contended_rdev = NULL; + } + + return ret; +} + +static int regulator_summary_unlock_one(struct device *dev, void *data) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + struct summary_lock_data *lock_data = data; + + if (lock_data) { + if (rdev == *lock_data->new_contended_rdev) + return -EDEADLK; + } + + regulator_unlock(rdev); + + return 0; +} + +static int regulator_summary_lock_all(struct ww_acquire_ctx *ww_ctx, + struct regulator_dev **new_contended_rdev, + struct regulator_dev **old_contended_rdev) +{ + struct summary_lock_data lock_data; + int ret; + + lock_data.ww_ctx = ww_ctx; + lock_data.new_contended_rdev = new_contended_rdev; + lock_data.old_contended_rdev = old_contended_rdev; + + ret = class_for_each_device(®ulator_class, NULL, &lock_data, + regulator_summary_lock_one); + if (ret) + class_for_each_device(®ulator_class, NULL, &lock_data, + regulator_summary_unlock_one); + + return ret; +} + +static void regulator_summary_lock(struct ww_acquire_ctx *ww_ctx) +{ + struct regulator_dev *new_contended_rdev = NULL; + struct regulator_dev *old_contended_rdev = NULL; + int err; + + mutex_lock(®ulator_list_mutex); + + ww_acquire_init(ww_ctx, ®ulator_ww_class); + + do { + if (new_contended_rdev) { + ww_mutex_lock_slow(&new_contended_rdev->mutex, ww_ctx); + old_contended_rdev = new_contended_rdev; + old_contended_rdev->ref_cnt++; + old_contended_rdev->mutex_owner = current; + } + + err = regulator_summary_lock_all(ww_ctx, + &new_contended_rdev, + &old_contended_rdev); + + if (old_contended_rdev) + regulator_unlock(old_contended_rdev); + + } while (err == -EDEADLK); + + ww_acquire_done(ww_ctx); +} + +static void regulator_summary_unlock(struct ww_acquire_ctx *ww_ctx) +{ + class_for_each_device(®ulator_class, NULL, NULL, + regulator_summary_unlock_one); + ww_acquire_fini(ww_ctx); + + mutex_unlock(®ulator_list_mutex); +} + +static int regulator_summary_show_roots(struct device *dev, void *data) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + struct seq_file *s = data; + + if (!rdev->supply) + regulator_summary_show_subtree(s, rdev, 0); + + return 0; +} + +static int regulator_summary_show(struct seq_file *s, void *data) +{ + struct ww_acquire_ctx ww_ctx; + + seq_puts(s, " regulator use open bypass opmode voltage current min max\n"); + seq_puts(s, "---------------------------------------------------------------------------------------\n"); + + regulator_summary_lock(&ww_ctx); + + class_for_each_device(®ulator_class, NULL, s, + regulator_summary_show_roots); + + regulator_summary_unlock(&ww_ctx); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(regulator_summary); +#endif /* CONFIG_DEBUG_FS */ + +static int __init regulator_init(void) +{ + int ret; + + ret = bus_register(®ulator_bus); + if (ret) + return ret; + + ret = class_register(®ulator_class); + if (ret) + goto err_class; + + ret = driver_register(®ulator_bus_driver); + if (ret) + goto err_driver; + + debugfs_root = debugfs_create_dir("regulator", NULL); + if (IS_ERR(debugfs_root)) + pr_debug("regulator: Failed to create debugfs directory\n"); + +#ifdef CONFIG_DEBUG_FS + debugfs_create_file("supply_map", 0444, debugfs_root, NULL, + &supply_map_fops); + + debugfs_create_file("regulator_summary", 0444, debugfs_root, + NULL, ®ulator_summary_fops); +#endif + regulator_dummy_init(); + + regulator_coupler_register(&generic_regulator_coupler); + + return 0; + +err_driver: + class_unregister(®ulator_class); +err_class: + bus_unregister(®ulator_bus); + return ret; +} + +/* init early to allow our consumers to complete system booting */ +core_initcall(regulator_init); + +static int regulator_late_cleanup(struct device *dev, void *data) +{ + struct regulator_dev *rdev = dev_to_rdev(dev); + struct regulation_constraints *c = rdev->constraints; + int ret; + + if (c && c->always_on) + return 0; + + if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS)) + return 0; + + regulator_lock(rdev); + + if (rdev->use_count) + goto unlock; + + /* If reading the status failed, assume that it's off. */ + if (_regulator_is_enabled(rdev) <= 0) + goto unlock; + + if (have_full_constraints()) { + /* We log since this may kill the system if it goes + * wrong. + */ + rdev_info(rdev, "disabling\n"); + ret = _regulator_do_disable(rdev); + if (ret != 0) + rdev_err(rdev, "couldn't disable: %pe\n", ERR_PTR(ret)); + } else { + /* The intention is that in future we will + * assume that full constraints are provided + * so warn even if we aren't going to do + * anything here. + */ + rdev_warn(rdev, "incomplete constraints, leaving on\n"); + } + +unlock: + regulator_unlock(rdev); + + return 0; +} + +static bool regulator_ignore_unused; +static int __init regulator_ignore_unused_setup(char *__unused) +{ + regulator_ignore_unused = true; + return 1; +} +__setup("regulator_ignore_unused", regulator_ignore_unused_setup); + +static void regulator_init_complete_work_function(struct work_struct *work) +{ + /* + * For debugging purposes, it may be useful to prevent unused + * regulators from being disabled. + */ + if (regulator_ignore_unused) { + pr_warn("regulator: Not disabling unused regulators\n"); + return; + } + + /* If we have a full configuration then disable any regulators + * we have permission to change the status for and which are + * not in use or always_on. This is effectively the default + * for DT and ACPI as they have full constraints. + */ + class_for_each_device(®ulator_class, NULL, NULL, + regulator_late_cleanup); +} + +static DECLARE_DELAYED_WORK(regulator_init_complete_work, + regulator_init_complete_work_function); + +static int __init regulator_init_complete(void) +{ + /* + * Since DT doesn't provide an idiomatic mechanism for + * enabling full constraints and since it's much more natural + * with DT to provide them just assume that a DT enabled + * system has full constraints. + */ + if (of_have_populated_dt()) + has_full_constraints = true; + + /* + * We punt completion for an arbitrary amount of time since + * systems like distros will load many drivers from userspace + * so consumers might not always be ready yet, this is + * particularly an issue with laptops where this might bounce + * the display off then on. Ideally we'd get a notification + * from userspace when this happens but we don't so just wait + * a bit and hope we waited long enough. It'd be better if + * we'd only do this on systems that need it, and a kernel + * command line option might be useful. + */ + queue_delayed_work(system_freezable_wq, + ®ulator_init_complete_work, + msecs_to_jiffies(30000)); + + return 0; +} +late_initcall_sync(regulator_init_complete); diff --git a/drivers/regulator/cpcap-regulator.c b/drivers/regulator/cpcap-regulator.c new file mode 100644 index 000000000..63f5c90dd --- /dev/null +++ b/drivers/regulator/cpcap-regulator.c @@ -0,0 +1,671 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Motorola CPCAP PMIC regulator driver + * + * Based on cpcap-regulator.c from Motorola Linux kernel tree + * Copyright (C) 2009-2011 Motorola, Inc. + * + * Rewritten for mainline kernel to use device tree and regmap + * Copyright (C) 2017 Tony Lindgren + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Resource assignment register bits. These seem to control the state + * idle modes adn are used at least for omap4. + */ + +/* CPCAP_REG_ASSIGN2 bits - Resource Assignment 2 */ +#define CPCAP_BIT_VSDIO_SEL BIT(15) +#define CPCAP_BIT_VDIG_SEL BIT(14) +#define CPCAP_BIT_VCAM_SEL BIT(13) +#define CPCAP_BIT_SW6_SEL BIT(12) +#define CPCAP_BIT_SW5_SEL BIT(11) +#define CPCAP_BIT_SW4_SEL BIT(10) +#define CPCAP_BIT_SW3_SEL BIT(9) +#define CPCAP_BIT_SW2_SEL BIT(8) +#define CPCAP_BIT_SW1_SEL BIT(7) + +/* CPCAP_REG_ASSIGN3 bits - Resource Assignment 3 */ +#define CPCAP_BIT_VUSBINT2_SEL BIT(15) +#define CPCAP_BIT_VUSBINT1_SEL BIT(14) +#define CPCAP_BIT_VVIB_SEL BIT(13) +#define CPCAP_BIT_VWLAN1_SEL BIT(12) +#define CPCAP_BIT_VRF1_SEL BIT(11) +#define CPCAP_BIT_VHVIO_SEL BIT(10) +#define CPCAP_BIT_VDAC_SEL BIT(9) +#define CPCAP_BIT_VUSB_SEL BIT(8) +#define CPCAP_BIT_VSIM_SEL BIT(7) +#define CPCAP_BIT_VRFREF_SEL BIT(6) +#define CPCAP_BIT_VPLL_SEL BIT(5) +#define CPCAP_BIT_VFUSE_SEL BIT(4) +#define CPCAP_BIT_VCSI_SEL BIT(3) +#define CPCAP_BIT_SPARE_14_2 BIT(2) +#define CPCAP_BIT_VWLAN2_SEL BIT(1) +#define CPCAP_BIT_VRF2_SEL BIT(0) + +/* CPCAP_REG_ASSIGN4 bits - Resource Assignment 4 */ +#define CPCAP_BIT_VAUDIO_SEL BIT(0) + +/* + * Enable register bits. At least CPCAP_BIT_AUDIO_LOW_PWR is generic, + * and not limited to audio regulator. Let's use the Motorola kernel + * naming for now until we have a better understanding of the other + * enable register bits. No idea why BIT(3) is not defined. + */ +#define CPCAP_BIT_AUDIO_LOW_PWR BIT(6) +#define CPCAP_BIT_AUD_LOWPWR_SPEED BIT(5) +#define CPCAP_BIT_VAUDIOPRISTBY BIT(4) +#define CPCAP_BIT_VAUDIO_MODE1 BIT(2) +#define CPCAP_BIT_VAUDIO_MODE0 BIT(1) +#define CPCAP_BIT_V_AUDIO_EN BIT(0) + +#define CPCAP_BIT_AUDIO_NORMAL_MODE 0x00 + +/* + * Off mode configuration bit. Used currently only by SW5 on omap4. There's + * the following comment in Motorola Linux kernel tree for it: + * + * When set in the regulator mode, the regulator assignment will be changed + * to secondary when the regulator is disabled. The mode will be set back to + * primary when the regulator is turned on. + */ +#define CPCAP_REG_OFF_MODE_SEC BIT(15) + +/* + * SoC specific configuration for CPCAP regulator. There are at least three + * different SoCs each with their own parameters: omap3, omap4 and tegra2. + * + * The assign_reg and assign_mask seem to allow toggling between primary + * and secondary mode that at least omap4 uses for off mode. + */ +struct cpcap_regulator { + struct regulator_desc rdesc; + const u16 assign_reg; + const u16 assign_mask; +}; + +#define CPCAP_REG(_ID, reg, assignment_reg, assignment_mask, val_tbl, \ + mode_mask, volt_mask, mode_val, off_val, \ + volt_trans_time) { \ + .rdesc = { \ + .name = #_ID, \ + .of_match = of_match_ptr(#_ID), \ + .ops = &cpcap_regulator_ops, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = CPCAP_##_ID, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(val_tbl), \ + .volt_table = (val_tbl), \ + .vsel_reg = (reg), \ + .vsel_mask = (volt_mask), \ + .enable_reg = (reg), \ + .enable_mask = (mode_mask), \ + .enable_val = (mode_val), \ + .disable_val = (off_val), \ + .ramp_delay = (volt_trans_time), \ + .of_map_mode = cpcap_map_mode, \ + }, \ + .assign_reg = (assignment_reg), \ + .assign_mask = (assignment_mask), \ +} + +struct cpcap_ddata { + struct regmap *reg; + struct device *dev; + const struct cpcap_regulator *soc; +}; + +enum cpcap_regulator_id { + CPCAP_SW1, + CPCAP_SW2, + CPCAP_SW3, + CPCAP_SW4, + CPCAP_SW5, + CPCAP_SW6, + CPCAP_VCAM, + CPCAP_VCSI, + CPCAP_VDAC, + CPCAP_VDIG, + CPCAP_VFUSE, + CPCAP_VHVIO, + CPCAP_VSDIO, + CPCAP_VPLL, + CPCAP_VRF1, + CPCAP_VRF2, + CPCAP_VRFREF, + CPCAP_VWLAN1, + CPCAP_VWLAN2, + CPCAP_VSIM, + CPCAP_VSIMCARD, + CPCAP_VVIB, + CPCAP_VUSB, + CPCAP_VAUDIO, + CPCAP_NR_REGULATORS, +}; + +/* + * We need to also configure regulator idle mode for SoC off mode if + * CPCAP_REG_OFF_MODE_SEC is set. + */ +static int cpcap_regulator_enable(struct regulator_dev *rdev) +{ + struct cpcap_regulator *regulator = rdev_get_drvdata(rdev); + int error; + + error = regulator_enable_regmap(rdev); + if (error) + return error; + + if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { + error = regmap_update_bits(rdev->regmap, regulator->assign_reg, + regulator->assign_mask, + regulator->assign_mask); + if (error) + regulator_disable_regmap(rdev); + } + + return error; +} + +/* + * We need to also configure regulator idle mode for SoC off mode if + * CPCAP_REG_OFF_MODE_SEC is set. + */ +static int cpcap_regulator_disable(struct regulator_dev *rdev) +{ + struct cpcap_regulator *regulator = rdev_get_drvdata(rdev); + int error; + + if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { + error = regmap_update_bits(rdev->regmap, regulator->assign_reg, + regulator->assign_mask, 0); + if (error) + return error; + } + + error = regulator_disable_regmap(rdev); + if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { + regmap_update_bits(rdev->regmap, regulator->assign_reg, + regulator->assign_mask, + regulator->assign_mask); + } + + return error; +} + +static unsigned int cpcap_map_mode(unsigned int mode) +{ + switch (mode) { + case CPCAP_BIT_AUDIO_NORMAL_MODE: + return REGULATOR_MODE_NORMAL; + case CPCAP_BIT_AUDIO_LOW_PWR: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int cpcap_regulator_get_mode(struct regulator_dev *rdev) +{ + int value; + + regmap_read(rdev->regmap, rdev->desc->enable_reg, &value); + + if (value & CPCAP_BIT_AUDIO_LOW_PWR) + return REGULATOR_MODE_STANDBY; + + return REGULATOR_MODE_NORMAL; +} + +static int cpcap_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + int value; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + value = CPCAP_BIT_AUDIO_NORMAL_MODE; + break; + case REGULATOR_MODE_STANDBY: + value = CPCAP_BIT_AUDIO_LOW_PWR; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + CPCAP_BIT_AUDIO_LOW_PWR, value); +} + +static const struct regulator_ops cpcap_regulator_ops = { + .enable = cpcap_regulator_enable, + .disable = cpcap_regulator_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = cpcap_regulator_get_mode, + .set_mode = cpcap_regulator_set_mode, +}; + +static const unsigned int unknown_val_tbl[] = { 0, }; +static const unsigned int sw_mot_val_tbl[] = { 600000, 612500, 625000, + 637500, 650000, 662500, + 675000, 687500, 700000, + 712500, 725000, 737500, + 750000, 762500, 775000, + 787500, 800000, 812500, + 825000, 837500, 850000, + 862500, 875000, 887500, + 900000, 912500, 925000, + 937500, 950000, 962500, + 975000, 987500, 1000000, + 1012500, 1025000, 1037500, + 1050000, 1062500, 1075000, + 1087500, 1100000, 1112500, + 1125000, 1137500, 1150000, + 1162500, 1175000, 1187500, + 1200000, 1212500, 1225000, + 1237500, 1250000, 1262500, + 1275000, 1287500, 1300000, + 1312500, 1325000, 1337500, + 1350000, 1362500, 1375000, + 1387500, 1400000, 1412500, + 1425000, 1437500, 1450000, + 1462500, 1475000, }; +static const unsigned int sw2_sw4_val_tbl[] = { 612500, 625000, 637500, + 650000, 662500, 675000, + 687500, 700000, 712500, + 725000, 737500, 750000, + 762500, 775000, 787500, + 800000, 812500, 825000, + 837500, 850000, 862500, + 875000, 887500, 900000, + 912500, 925000, 937500, + 950000, 962500, 975000, + 987500, 1000000, 1012500, + 1025000, 1037500, 1050000, + 1062500, 1075000, 1087500, + 1100000, 1112500, 1125000, + 1137500, 1150000, 1162500, + 1175000, 1187500, 1200000, + 1212500, 1225000, 1237500, + 1250000, 1262500, 1275000, + 1287500, 1300000, 1312500, + 1325000, 1337500, 1350000, + 1362500, 1375000, 1387500, + 1400000, 1412500, 1425000, + 1437500, 1450000, 1462500, }; +static const unsigned int sw3_val_tbl[] = { 1350000, 1800000, 1850000, 1875000, }; +static const unsigned int sw5_val_tbl[] = { 0, 5050000, }; +static const unsigned int vcam_val_tbl[] = { 2600000, 2700000, 2800000, + 2900000, }; +static const unsigned int vcsi_val_tbl[] = { 1200000, 1800000, }; +static const unsigned int vdac_val_tbl[] = { 1200000, 1500000, 1800000, + 2500000,}; +static const unsigned int vdig_val_tbl[] = { 1200000, 1350000, 1500000, + 1875000, }; +static const unsigned int vfuse_val_tbl[] = { 1500000, 1600000, 1700000, + 1800000, 1900000, 2000000, + 2100000, 2200000, 2300000, + 2400000, 2500000, 2600000, + 2700000, 3150000, }; +static const unsigned int vhvio_val_tbl[] = { 2775000, }; +static const unsigned int vsdio_val_tbl[] = { 1500000, 1600000, 1800000, + 2600000, 2700000, 2800000, + 2900000, 3000000, }; +static const unsigned int vpll_val_tbl[] = { 1200000, 1300000, 1400000, + 1800000, }; +/* Quirk: 2775000 is before 2500000 for vrf1 regulator */ +static const unsigned int vrf1_val_tbl[] = { 2775000, 2500000, }; +static const unsigned int vrf2_val_tbl[] = { 0, 2775000, }; +static const unsigned int vrfref_val_tbl[] = { 2500000, 2775000, }; +static const unsigned int vwlan1_val_tbl[] = { 1800000, 1900000, }; +static const unsigned int vwlan2_val_tbl[] = { 2775000, 3000000, 3300000, + 3300000, }; +static const unsigned int vsim_val_tbl[] = { 1800000, 2900000, }; +static const unsigned int vsimcard_val_tbl[] = { 1800000, 2900000, }; +static const unsigned int vvib_val_tbl[] = { 1300000, 1800000, 2000000, + 3000000, }; +static const unsigned int vusb_val_tbl[] = { 0, 3300000, }; +static const unsigned int vaudio_val_tbl[] = { 0, 2775000, }; + +/* + * SoC specific configuration for omap4. The data below is comes from Motorola + * Linux kernel tree. It's basically the values of cpcap_regltr_data, + * cpcap_regulator_mode_values and cpcap_regulator_off_mode_values, see + * CPCAP_REG macro above. + * + * SW1 to SW4 and SW6 seems to be unused for mapphone. Note that VSIM and + * VSIMCARD have a shared resource assignment bit. + */ +static const struct cpcap_regulator omap4_regulators[] = { + CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW1_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW2_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW3, CPCAP_REG_S3C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW3_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW4_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW5, CPCAP_REG_S5C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW5_SEL, sw5_val_tbl, + 0x28, 0, 0x20 | CPCAP_REG_OFF_MODE_SEC, 0, 0), + CPCAP_REG(SW6, CPCAP_REG_S6C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW6_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(VCAM, CPCAP_REG_VCAMC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VCAM_SEL, vcam_val_tbl, + 0x87, 0x30, 0x3, 0, 420), + CPCAP_REG(VCSI, CPCAP_REG_VCSIC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VCSI_SEL, vcsi_val_tbl, + 0x47, 0x10, 0x43, 0x41, 350), + CPCAP_REG(VDAC, CPCAP_REG_VDACC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VDAC_SEL, vdac_val_tbl, + 0x87, 0x30, 0x3, 0, 420), + CPCAP_REG(VDIG, CPCAP_REG_VDIGC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VDIG_SEL, vdig_val_tbl, + 0x87, 0x30, 0x82, 0, 420), + CPCAP_REG(VFUSE, CPCAP_REG_VFUSEC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VFUSE_SEL, vfuse_val_tbl, + 0x80, 0xf, 0x80, 0, 420), + CPCAP_REG(VHVIO, CPCAP_REG_VHVIOC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VHVIO_SEL, vhvio_val_tbl, + 0x17, 0, 0, 0x12, 0), + CPCAP_REG(VSDIO, CPCAP_REG_VSDIOC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VSDIO_SEL, vsdio_val_tbl, + 0x87, 0x38, 0x82, 0, 420), + CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VPLL_SEL, vpll_val_tbl, + 0x43, 0x18, 0x2, 0, 420), + CPCAP_REG(VRF1, CPCAP_REG_VRF1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF1_SEL, vrf1_val_tbl, + 0xac, 0x2, 0x4, 0, 10), + CPCAP_REG(VRF2, CPCAP_REG_VRF2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF2_SEL, vrf2_val_tbl, + 0x23, 0x8, 0, 0, 10), + CPCAP_REG(VRFREF, CPCAP_REG_VRFREFC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRFREF_SEL, vrfref_val_tbl, + 0x23, 0x8, 0, 0, 420), + CPCAP_REG(VWLAN1, CPCAP_REG_VWLAN1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN1_SEL, vwlan1_val_tbl, + 0x47, 0x10, 0, 0, 420), + CPCAP_REG(VWLAN2, CPCAP_REG_VWLAN2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN2_SEL, vwlan2_val_tbl, + 0x20c, 0xc0, 0x20c, 0, 420), + CPCAP_REG(VSIM, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsim_val_tbl, + 0x23, 0x8, 0x3, 0, 420), + CPCAP_REG(VSIMCARD, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsimcard_val_tbl, + 0x1e80, 0x8, 0x1e00, 0, 420), + CPCAP_REG(VVIB, CPCAP_REG_VVIBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VVIB_SEL, vvib_val_tbl, + 0x1, 0xc, 0x1, 0, 500), + CPCAP_REG(VUSB, CPCAP_REG_VUSBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VUSB_SEL, vusb_val_tbl, + 0x11c, 0x40, 0xc, 0, 0), + CPCAP_REG(VAUDIO, CPCAP_REG_VAUDIOC, CPCAP_REG_ASSIGN4, + CPCAP_BIT_VAUDIO_SEL, vaudio_val_tbl, + 0x16, 0x1, 0x4, 0, 0), + { /* sentinel */ }, +}; + +static const struct cpcap_regulator mot_regulators[] = { + CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW1_SEL, sw_mot_val_tbl, + 0x6f00, 0x7f, 0x6800, 0, 0), + CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW2_SEL, sw_mot_val_tbl, + 0x6f00, 0x7f, 0x4804, 0, 0), + CPCAP_REG(SW3, CPCAP_REG_S3C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW3_SEL, sw3_val_tbl, + 0x578, 0x3, 0x043c, 0, 0), + CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW4_SEL, sw_mot_val_tbl, + 0x6f00, 0x7f, 0x4909, 0, 0), + CPCAP_REG(SW5, CPCAP_REG_S5C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW5_SEL, sw5_val_tbl, + 0x28, 0, 0x20, 0, 0), + CPCAP_REG(SW6, CPCAP_REG_S6C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW6_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(VCAM, CPCAP_REG_VCAMC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VCAM_SEL, vcam_val_tbl, + 0x87, 0x30, 0x7, 0, 420), + CPCAP_REG(VCSI, CPCAP_REG_VCSIC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VCSI_SEL, vcsi_val_tbl, + 0x47, 0x10, 0x7, 0, 350), + CPCAP_REG(VDAC, CPCAP_REG_VDACC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VDAC_SEL, vdac_val_tbl, + 0x87, 0x30, 0x0, 0, 420), + CPCAP_REG(VDIG, CPCAP_REG_VDIGC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VDIG_SEL, vdig_val_tbl, + 0x87, 0x30, 0x0, 0, 420), + CPCAP_REG(VFUSE, CPCAP_REG_VFUSEC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VFUSE_SEL, vfuse_val_tbl, + 0xa0, 0xf, 0x0, 0, 420), + CPCAP_REG(VHVIO, CPCAP_REG_VHVIOC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VHVIO_SEL, vhvio_val_tbl, + 0x17, 0, 0x2, 0, 0), + CPCAP_REG(VSDIO, CPCAP_REG_VSDIOC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VSDIO_SEL, vsdio_val_tbl, + 0x87, 0x38, 0x2, 0, 420), + CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VPLL_SEL, vpll_val_tbl, + 0x47, 0x18, 0x1, 0, 420), + CPCAP_REG(VRF1, CPCAP_REG_VRF1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF1_SEL, vrf1_val_tbl, + 0xac, 0x2, 0, 0, 10), + CPCAP_REG(VRF2, CPCAP_REG_VRF2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF2_SEL, vrf2_val_tbl, + 0x23, 0x8, 0, 0, 10), + CPCAP_REG(VRFREF, CPCAP_REG_VRFREFC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRFREF_SEL, vrfref_val_tbl, + 0x23, 0x8, 0, 0, 420), + CPCAP_REG(VWLAN1, CPCAP_REG_VWLAN1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN1_SEL, vwlan1_val_tbl, + 0x47, 0x10, 0x5, 0, 420), + CPCAP_REG(VWLAN2, CPCAP_REG_VWLAN2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN2_SEL, vwlan2_val_tbl, + 0x20c, 0xc0, 0xd, 0, 420), + CPCAP_REG(VSIM, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsim_val_tbl, + 0x23, 0x8, 0, 0, 420), + CPCAP_REG(VSIMCARD, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsimcard_val_tbl, + 0x1e80, 0x8, 0x1e00, 0, 420), + CPCAP_REG(VVIB, CPCAP_REG_VVIBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VVIB_SEL, vvib_val_tbl, + 0x1, 0xc, 0x1, 0, 500), + CPCAP_REG(VUSB, CPCAP_REG_VUSBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VUSB_SEL, vusb_val_tbl, + 0x11c, 0x40, 0xc, 0, 0), + CPCAP_REG(VAUDIO, CPCAP_REG_VAUDIOC, CPCAP_REG_ASSIGN4, + CPCAP_BIT_VAUDIO_SEL, vaudio_val_tbl, + 0x16, 0x1, 0x5, 0, 0), + { /* sentinel */ } +}; + +static const struct cpcap_regulator xoom_regulators[] = { + CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW1_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW2_SEL, sw2_sw4_val_tbl, + 0xf00, 0x7f, 0x800, 0, 120), + CPCAP_REG(SW3, CPCAP_REG_S3C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW3_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW4_SEL, sw2_sw4_val_tbl, + 0xf00, 0x7f, 0x900, 0, 100), + CPCAP_REG(SW5, CPCAP_REG_S5C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW5_SEL, sw5_val_tbl, + 0x2a, 0, 0x22, 0, 0), + CPCAP_REG(SW6, CPCAP_REG_S6C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW6_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0), + CPCAP_REG(VCAM, CPCAP_REG_VCAMC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VCAM_SEL, vcam_val_tbl, + 0x87, 0x30, 0x7, 0, 420), + CPCAP_REG(VCSI, CPCAP_REG_VCSIC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VCSI_SEL, vcsi_val_tbl, + 0x47, 0x10, 0x7, 0, 350), + CPCAP_REG(VDAC, CPCAP_REG_VDACC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VDAC_SEL, vdac_val_tbl, + 0x87, 0x30, 0x3, 0, 420), + CPCAP_REG(VDIG, CPCAP_REG_VDIGC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VDIG_SEL, vdig_val_tbl, + 0x87, 0x30, 0x5, 0, 420), + CPCAP_REG(VFUSE, CPCAP_REG_VFUSEC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VFUSE_SEL, vfuse_val_tbl, + 0x80, 0xf, 0x80, 0, 420), + CPCAP_REG(VHVIO, CPCAP_REG_VHVIOC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VHVIO_SEL, vhvio_val_tbl, + 0x17, 0, 0x2, 0, 0), + CPCAP_REG(VSDIO, CPCAP_REG_VSDIOC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VSDIO_SEL, vsdio_val_tbl, + 0x87, 0x38, 0x2, 0, 420), + CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VPLL_SEL, vpll_val_tbl, + 0x43, 0x18, 0x1, 0, 420), + CPCAP_REG(VRF1, CPCAP_REG_VRF1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF1_SEL, vrf1_val_tbl, + 0xac, 0x2, 0xc, 0, 10), + CPCAP_REG(VRF2, CPCAP_REG_VRF2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF2_SEL, vrf2_val_tbl, + 0x23, 0x8, 0x3, 0, 10), + CPCAP_REG(VRFREF, CPCAP_REG_VRFREFC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRFREF_SEL, vrfref_val_tbl, + 0x23, 0x8, 0x3, 0, 420), + CPCAP_REG(VWLAN1, CPCAP_REG_VWLAN1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN1_SEL, vwlan1_val_tbl, + 0x47, 0x10, 0x5, 0, 420), + CPCAP_REG(VWLAN2, CPCAP_REG_VWLAN2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN2_SEL, vwlan2_val_tbl, + 0x20c, 0xc0, 0x8, 0, 420), + CPCAP_REG(VSIM, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsim_val_tbl, + 0x23, 0x8, 0x3, 0, 420), + CPCAP_REG(VSIMCARD, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsimcard_val_tbl, + 0x1e80, 0x8, 0x1e00, 0, 420), + CPCAP_REG(VVIB, CPCAP_REG_VVIBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VVIB_SEL, vvib_val_tbl, + 0x1, 0xc, 0, 0x1, 500), + CPCAP_REG(VUSB, CPCAP_REG_VUSBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VUSB_SEL, vusb_val_tbl, + 0x11c, 0x40, 0xc, 0, 0), + CPCAP_REG(VAUDIO, CPCAP_REG_VAUDIOC, CPCAP_REG_ASSIGN4, + CPCAP_BIT_VAUDIO_SEL, vaudio_val_tbl, + 0x16, 0x1, 0x4, 0, 0), + { /* sentinel */ }, +}; + +static const struct of_device_id cpcap_regulator_id_table[] = { + { + .compatible = "motorola,cpcap-regulator", + }, + { + .compatible = "motorola,mapphone-cpcap-regulator", + .data = omap4_regulators, + }, + { + .compatible = "motorola,mot-cpcap-regulator", + .data = mot_regulators, + }, + { + .compatible = "motorola,xoom-cpcap-regulator", + .data = xoom_regulators, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, cpcap_regulator_id_table); + +static int cpcap_regulator_probe(struct platform_device *pdev) +{ + struct cpcap_ddata *ddata; + const struct cpcap_regulator *match_data; + struct regulator_config config; + int i; + + match_data = of_device_get_match_data(&pdev->dev); + if (!match_data) { + dev_err(&pdev->dev, "no configuration data found\n"); + + return -ENODEV; + } + + ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + ddata->reg = dev_get_regmap(pdev->dev.parent, NULL); + if (!ddata->reg) + return -ENODEV; + + ddata->dev = &pdev->dev; + ddata->soc = match_data; + platform_set_drvdata(pdev, ddata); + + memset(&config, 0, sizeof(config)); + config.dev = &pdev->dev; + config.regmap = ddata->reg; + + for (i = 0; i < CPCAP_NR_REGULATORS; i++) { + const struct cpcap_regulator *regulator = &ddata->soc[i]; + struct regulator_dev *rdev; + + if (!regulator->rdesc.name) + break; + + if (regulator->rdesc.volt_table == unknown_val_tbl) + continue; + + config.driver_data = (void *)regulator; + rdev = devm_regulator_register(&pdev->dev, + ®ulator->rdesc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + regulator->rdesc.name); + + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver cpcap_regulator_driver = { + .probe = cpcap_regulator_probe, + .driver = { + .name = "cpcap-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(cpcap_regulator_id_table), + }, +}; + +module_platform_driver(cpcap_regulator_driver); + +MODULE_ALIAS("platform:cpcap-regulator"); +MODULE_AUTHOR("Tony Lindgren "); +MODULE_DESCRIPTION("CPCAP regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/cros-ec-regulator.c b/drivers/regulator/cros-ec-regulator.c new file mode 100644 index 000000000..aec275fe1 --- /dev/null +++ b/drivers/regulator/cros-ec-regulator.c @@ -0,0 +1,228 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright 2020 Google LLC. + +#include +#include +#include +#include +#include +#include +#include +#include + +struct cros_ec_regulator_data { + struct regulator_desc desc; + struct regulator_dev *dev; + struct cros_ec_device *ec_dev; + + u32 index; + + u16 *voltages_mV; + u16 num_voltages; +}; + +static int cros_ec_regulator_enable(struct regulator_dev *dev) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + struct ec_params_regulator_enable cmd = { + .index = data->index, + .enable = 1, + }; + + return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, + sizeof(cmd), NULL, 0); +} + +static int cros_ec_regulator_disable(struct regulator_dev *dev) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + struct ec_params_regulator_enable cmd = { + .index = data->index, + .enable = 0, + }; + + return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, + sizeof(cmd), NULL, 0); +} + +static int cros_ec_regulator_is_enabled(struct regulator_dev *dev) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + struct ec_params_regulator_is_enabled cmd = { + .index = data->index, + }; + struct ec_response_regulator_is_enabled resp; + int ret; + + ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_IS_ENABLED, &cmd, + sizeof(cmd), &resp, sizeof(resp)); + if (ret < 0) + return ret; + return resp.enabled; +} + +static int cros_ec_regulator_list_voltage(struct regulator_dev *dev, + unsigned int selector) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + + if (selector >= data->num_voltages) + return -EINVAL; + + return data->voltages_mV[selector] * 1000; +} + +static int cros_ec_regulator_get_voltage(struct regulator_dev *dev) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + struct ec_params_regulator_get_voltage cmd = { + .index = data->index, + }; + struct ec_response_regulator_get_voltage resp; + int ret; + + ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_GET_VOLTAGE, &cmd, + sizeof(cmd), &resp, sizeof(resp)); + if (ret < 0) + return ret; + return resp.voltage_mv * 1000; +} + +static int cros_ec_regulator_set_voltage(struct regulator_dev *dev, int min_uV, + int max_uV, unsigned int *selector) +{ + struct cros_ec_regulator_data *data = rdev_get_drvdata(dev); + int min_mV = DIV_ROUND_UP(min_uV, 1000); + int max_mV = max_uV / 1000; + struct ec_params_regulator_set_voltage cmd = { + .index = data->index, + .min_mv = min_mV, + .max_mv = max_mV, + }; + + /* + * This can happen when the given range [min_uV, max_uV] doesn't + * contain any voltage that can be represented exactly in mV. + */ + if (min_mV > max_mV) + return -EINVAL; + + return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_SET_VOLTAGE, &cmd, + sizeof(cmd), NULL, 0); +} + +static const struct regulator_ops cros_ec_regulator_voltage_ops = { + .enable = cros_ec_regulator_enable, + .disable = cros_ec_regulator_disable, + .is_enabled = cros_ec_regulator_is_enabled, + .list_voltage = cros_ec_regulator_list_voltage, + .get_voltage = cros_ec_regulator_get_voltage, + .set_voltage = cros_ec_regulator_set_voltage, +}; + +static int cros_ec_regulator_init_info(struct device *dev, + struct cros_ec_regulator_data *data) +{ + struct ec_params_regulator_get_info cmd = { + .index = data->index, + }; + struct ec_response_regulator_get_info resp; + int ret; + + ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_GET_INFO, &cmd, + sizeof(cmd), &resp, sizeof(resp)); + if (ret < 0) + return ret; + + data->num_voltages = + min_t(u16, ARRAY_SIZE(resp.voltages_mv), resp.num_voltages); + data->voltages_mV = + devm_kmemdup_array(dev, resp.voltages_mv, data->num_voltages, + sizeof(resp.voltages_mv[0]), GFP_KERNEL); + if (!data->voltages_mV) + return -ENOMEM; + + data->desc.n_voltages = data->num_voltages; + + /* Make sure the returned name is always a valid string */ + resp.name[ARRAY_SIZE(resp.name) - 1] = '\0'; + data->desc.name = devm_kstrdup(dev, resp.name, GFP_KERNEL); + if (!data->desc.name) + return -ENOMEM; + + return 0; +} + +static int cros_ec_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct cros_ec_regulator_data *drvdata; + struct regulator_init_data *init_data; + struct regulator_config cfg = {}; + struct regulator_desc *desc; + int ret; + + drvdata = devm_kzalloc( + &pdev->dev, sizeof(struct cros_ec_regulator_data), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->ec_dev = dev_get_drvdata(dev->parent); + desc = &drvdata->desc; + + init_data = of_get_regulator_init_data(dev, np, desc); + if (!init_data) + return -EINVAL; + + ret = of_property_read_u32(np, "reg", &drvdata->index); + if (ret < 0) + return ret; + + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->ops = &cros_ec_regulator_voltage_ops; + desc->supply_name = "vin"; + + ret = cros_ec_regulator_init_info(dev, drvdata); + if (ret < 0) + return ret; + + cfg.dev = &pdev->dev; + cfg.init_data = init_data; + cfg.driver_data = drvdata; + cfg.of_node = np; + + drvdata->dev = devm_regulator_register(dev, &drvdata->desc, &cfg); + if (IS_ERR(drvdata->dev)) { + ret = PTR_ERR(drvdata->dev); + dev_err(&pdev->dev, "Failed to register regulator: %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, drvdata); + + return 0; +} + +static const struct of_device_id regulator_cros_ec_of_match[] = { + { .compatible = "google,cros-ec-regulator", }, + {} +}; +MODULE_DEVICE_TABLE(of, regulator_cros_ec_of_match); + +static struct platform_driver cros_ec_regulator_driver = { + .probe = cros_ec_regulator_probe, + .driver = { + .name = "cros-ec-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = regulator_cros_ec_of_match, + }, +}; + +module_platform_driver(cros_ec_regulator_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("ChromeOS EC controlled regulator"); +MODULE_AUTHOR("Pi-Hsun Shih "); diff --git a/drivers/regulator/da903x-regulator.c b/drivers/regulator/da903x-regulator.c new file mode 100644 index 000000000..2f8589718 --- /dev/null +++ b/drivers/regulator/da903x-regulator.c @@ -0,0 +1,495 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulators driver for Dialog Semiconductor DA903x +// +// Copyright (C) 2006-2008 Marvell International Ltd. +// Copyright (C) 2008 Compulab Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include + +/* DA9030 Registers */ +#define DA9030_INVAL (-1) +#define DA9030_LDO1011 (0x10) +#define DA9030_LDO15 (0x11) +#define DA9030_LDO1416 (0x12) +#define DA9030_LDO1819 (0x13) +#define DA9030_LDO17 (0x14) +#define DA9030_BUCK2DVM1 (0x15) +#define DA9030_BUCK2DVM2 (0x16) +#define DA9030_RCTL11 (0x17) +#define DA9030_RCTL21 (0x18) +#define DA9030_LDO1 (0x90) +#define DA9030_LDO23 (0x91) +#define DA9030_LDO45 (0x92) +#define DA9030_LDO6 (0x93) +#define DA9030_LDO78 (0x94) +#define DA9030_LDO912 (0x95) +#define DA9030_BUCK (0x96) +#define DA9030_RCTL12 (0x97) +#define DA9030_RCTL22 (0x98) +#define DA9030_LDO_UNLOCK (0xa0) +#define DA9030_LDO_UNLOCK_MASK (0xe0) +#define DA9034_OVER1 (0x10) + +/* DA9034 Registers */ +#define DA9034_INVAL (-1) +#define DA9034_OVER2 (0x11) +#define DA9034_OVER3 (0x12) +#define DA9034_LDO643 (0x13) +#define DA9034_LDO987 (0x14) +#define DA9034_LDO1110 (0x15) +#define DA9034_LDO1312 (0x16) +#define DA9034_LDO1514 (0x17) +#define DA9034_VCC1 (0x20) +#define DA9034_ADTV1 (0x23) +#define DA9034_ADTV2 (0x24) +#define DA9034_AVRC (0x25) +#define DA9034_CDTV1 (0x26) +#define DA9034_CDTV2 (0x27) +#define DA9034_CVRC (0x28) +#define DA9034_SDTV1 (0x29) +#define DA9034_SDTV2 (0x2a) +#define DA9034_SVRC (0x2b) +#define DA9034_MDTV1 (0x32) +#define DA9034_MDTV2 (0x33) +#define DA9034_MVRC (0x34) + +/* DA9035 Registers. DA9034 Registers are compatible to DA9035. */ +#define DA9035_OVER3 (0x12) +#define DA9035_VCC2 (0x1f) +#define DA9035_3DTV1 (0x2c) +#define DA9035_3DTV2 (0x2d) +#define DA9035_3VRC (0x2e) +#define DA9035_AUTOSKIP (0x2f) + +struct da903x_regulator_info { + struct regulator_desc desc; + + int max_uV; + int vol_reg; + int vol_shift; + int vol_nbits; + int update_reg; + int update_bit; + int enable_reg; + int enable_bit; +}; + +static inline struct device *to_da903x_dev(struct regulator_dev *rdev) +{ + return rdev_get_dev(rdev)->parent->parent; +} + +static inline int check_range(struct da903x_regulator_info *info, + int min_uV, int max_uV) +{ + if (min_uV < info->desc.min_uV || min_uV > info->max_uV) + return -EINVAL; + + return 0; +} + +/* DA9030/DA9034 common operations */ +static int da903x_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + uint8_t val, mask; + + if (rdev->desc->n_voltages == 1) + return -EINVAL; + + val = selector << info->vol_shift; + mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; + + return da903x_update(da9034_dev, info->vol_reg, val, mask); +} + +static int da903x_get_voltage_sel(struct regulator_dev *rdev) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + uint8_t val, mask; + int ret; + + if (rdev->desc->n_voltages == 1) + return 0; + + ret = da903x_read(da9034_dev, info->vol_reg, &val); + if (ret) + return ret; + + mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; + val = (val & mask) >> info->vol_shift; + + return val; +} + +static int da903x_enable(struct regulator_dev *rdev) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + + return da903x_set_bits(da9034_dev, info->enable_reg, + 1 << info->enable_bit); +} + +static int da903x_disable(struct regulator_dev *rdev) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + + return da903x_clr_bits(da9034_dev, info->enable_reg, + 1 << info->enable_bit); +} + +static int da903x_is_enabled(struct regulator_dev *rdev) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + uint8_t reg_val; + int ret; + + ret = da903x_read(da9034_dev, info->enable_reg, ®_val); + if (ret) + return ret; + + return !!(reg_val & (1 << info->enable_bit)); +} + +/* DA9030 specific operations */ +static int da9030_set_ldo1_15_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da903x_dev = to_da903x_dev(rdev); + uint8_t val, mask; + int ret; + + val = selector << info->vol_shift; + mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; + val |= DA9030_LDO_UNLOCK; /* have to set UNLOCK bits */ + mask |= DA9030_LDO_UNLOCK_MASK; + + /* write twice */ + ret = da903x_update(da903x_dev, info->vol_reg, val, mask); + if (ret) + return ret; + + return da903x_update(da903x_dev, info->vol_reg, val, mask); +} + +static int da9030_map_ldo14_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + int thresh, sel; + + if (check_range(info, min_uV, max_uV)) { + pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV); + return -EINVAL; + } + + thresh = (info->max_uV + info->desc.min_uV) / 2; + if (min_uV < thresh) { + sel = DIV_ROUND_UP(thresh - min_uV, info->desc.uV_step); + sel |= 0x4; + } else { + sel = DIV_ROUND_UP(min_uV - thresh, info->desc.uV_step); + } + + return sel; +} + +static int da9030_list_ldo14_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + int volt; + + if (selector & 0x4) + volt = rdev->desc->min_uV + + rdev->desc->uV_step * (3 - (selector & ~0x4)); + else + volt = (info->max_uV + rdev->desc->min_uV) / 2 + + rdev->desc->uV_step * (selector & ~0x4); + + if (volt > info->max_uV) + return -EINVAL; + + return volt; +} + +/* DA9034 specific operations */ +static int da9034_set_dvc_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct da903x_regulator_info *info = rdev_get_drvdata(rdev); + struct device *da9034_dev = to_da903x_dev(rdev); + uint8_t val, mask; + int ret; + + val = selector << info->vol_shift; + mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; + + ret = da903x_update(da9034_dev, info->vol_reg, val, mask); + if (ret) + return ret; + + ret = da903x_set_bits(da9034_dev, info->update_reg, + 1 << info->update_bit); + return ret; +} + +static const struct linear_range da9034_ldo12_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 7, 50000), + REGULATOR_LINEAR_RANGE(2700000, 8, 15, 50000), +}; + +static const struct regulator_ops da903x_regulator_ldo_ops = { + .set_voltage_sel = da903x_set_voltage_sel, + .get_voltage_sel = da903x_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = da903x_enable, + .disable = da903x_disable, + .is_enabled = da903x_is_enabled, +}; + +/* NOTE: this is dedicated for the insane DA9030 LDO14 */ +static const struct regulator_ops da9030_regulator_ldo14_ops = { + .set_voltage_sel = da903x_set_voltage_sel, + .get_voltage_sel = da903x_get_voltage_sel, + .list_voltage = da9030_list_ldo14_voltage, + .map_voltage = da9030_map_ldo14_voltage, + .enable = da903x_enable, + .disable = da903x_disable, + .is_enabled = da903x_is_enabled, +}; + +/* NOTE: this is dedicated for the DA9030 LDO1 and LDO15 that have locks */ +static const struct regulator_ops da9030_regulator_ldo1_15_ops = { + .set_voltage_sel = da9030_set_ldo1_15_voltage_sel, + .get_voltage_sel = da903x_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = da903x_enable, + .disable = da903x_disable, + .is_enabled = da903x_is_enabled, +}; + +static const struct regulator_ops da9034_regulator_dvc_ops = { + .set_voltage_sel = da9034_set_dvc_voltage_sel, + .get_voltage_sel = da903x_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = da903x_enable, + .disable = da903x_disable, + .is_enabled = da903x_is_enabled, +}; + +/* NOTE: this is dedicated for the insane LDO12 */ +static const struct regulator_ops da9034_regulator_ldo12_ops = { + .set_voltage_sel = da903x_set_voltage_sel, + .get_voltage_sel = da903x_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .enable = da903x_enable, + .disable = da903x_disable, + .is_enabled = da903x_is_enabled, +}; + +#define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ +{ \ + .desc = { \ + .name = "LDO" #_id, \ + .ops = &da903x_regulator_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _pmic##_ID_LDO##_id, \ + .n_voltages = (step) ? ((max - min) / step + 1) : 1, \ + .owner = THIS_MODULE, \ + .min_uV = (min) * 1000, \ + .uV_step = (step) * 1000, \ + }, \ + .max_uV = (max) * 1000, \ + .vol_reg = _pmic##_##vreg, \ + .vol_shift = (shift), \ + .vol_nbits = (nbits), \ + .enable_reg = _pmic##_##ereg, \ + .enable_bit = (ebit), \ +} + +#define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ +{ \ + .desc = { \ + .name = #_id, \ + .ops = &da9034_regulator_dvc_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _pmic##_ID_##_id, \ + .n_voltages = (step) ? ((max - min) / step + 1) : 1, \ + .owner = THIS_MODULE, \ + .min_uV = (min) * 1000, \ + .uV_step = (step) * 1000, \ + }, \ + .max_uV = (max) * 1000, \ + .vol_reg = _pmic##_##vreg, \ + .vol_shift = (0), \ + .vol_nbits = (nbits), \ + .update_reg = _pmic##_##ureg, \ + .update_bit = (ubit), \ + .enable_reg = _pmic##_##ereg, \ + .enable_bit = (ebit), \ +} + +#define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ + DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit) + +#define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ + DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit) + +#define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ + DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \ + ereg, ebit) + +#define DA9034_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ + DA903x_DVC(DA9034, _id, min, max, step, vreg, nbits, ureg, ubit, \ + ereg, ebit) + +#define DA9035_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ + DA903x_DVC(DA9035, _id, min, max, step, vreg, nbits, ureg, ubit, \ + ereg, ebit) + +static struct da903x_regulator_info da903x_regulator_info[] = { + /* DA9030 */ + DA9030_DVC(BUCK2, 850, 1625, 25, BUCK2DVM1, 5, BUCK2DVM1, 7, RCTL11, 0), + + DA9030_LDO( 1, 1200, 3200, 100, LDO1, 0, 5, RCTL12, 1), + DA9030_LDO( 2, 1800, 3200, 100, LDO23, 0, 4, RCTL12, 2), + DA9030_LDO( 3, 1800, 3200, 100, LDO23, 4, 4, RCTL12, 3), + DA9030_LDO( 4, 1800, 3200, 100, LDO45, 0, 4, RCTL12, 4), + DA9030_LDO( 5, 1800, 3200, 100, LDO45, 4, 4, RCTL12, 5), + DA9030_LDO( 6, 1800, 3200, 100, LDO6, 0, 4, RCTL12, 6), + DA9030_LDO( 7, 1800, 3200, 100, LDO78, 0, 4, RCTL12, 7), + DA9030_LDO( 8, 1800, 3200, 100, LDO78, 4, 4, RCTL22, 0), + DA9030_LDO( 9, 1800, 3200, 100, LDO912, 0, 4, RCTL22, 1), + DA9030_LDO(10, 1800, 3200, 100, LDO1011, 0, 4, RCTL22, 2), + DA9030_LDO(11, 1800, 3200, 100, LDO1011, 4, 4, RCTL22, 3), + DA9030_LDO(12, 1800, 3200, 100, LDO912, 4, 4, RCTL22, 4), + DA9030_LDO(14, 2760, 2940, 30, LDO1416, 0, 3, RCTL11, 4), + DA9030_LDO(15, 1100, 2650, 50, LDO15, 0, 5, RCTL11, 5), + DA9030_LDO(16, 1100, 2650, 50, LDO1416, 3, 5, RCTL11, 6), + DA9030_LDO(17, 1800, 3200, 100, LDO17, 0, 4, RCTL11, 7), + DA9030_LDO(18, 1800, 3200, 100, LDO1819, 0, 4, RCTL21, 2), + DA9030_LDO(19, 1800, 3200, 100, LDO1819, 4, 4, RCTL21, 1), + DA9030_LDO(13, 2100, 2100, 0, INVAL, 0, 0, RCTL11, 3), /* fixed @2.1V */ + + /* DA9034 */ + DA9034_DVC(BUCK1, 725, 1500, 25, ADTV2, 5, VCC1, 0, OVER1, 0), + DA9034_DVC(BUCK2, 725, 1500, 25, CDTV2, 5, VCC1, 2, OVER1, 1), + DA9034_DVC(LDO2, 725, 1500, 25, SDTV2, 5, VCC1, 4, OVER1, 2), + DA9034_DVC(LDO1, 1700, 2075, 25, MDTV1, 4, VCC1, 6, OVER3, 4), + + DA9034_LDO( 3, 1800, 3300, 100, LDO643, 0, 4, OVER3, 5), + DA9034_LDO( 4, 1800, 2900,1100, LDO643, 4, 1, OVER3, 6), + DA9034_LDO( 6, 2500, 2850, 50, LDO643, 5, 3, OVER2, 0), + DA9034_LDO( 7, 2700, 3050, 50, LDO987, 0, 3, OVER2, 1), + DA9034_LDO( 8, 2700, 2850, 50, LDO987, 3, 2, OVER2, 2), + DA9034_LDO( 9, 2700, 3050, 50, LDO987, 5, 3, OVER2, 3), + DA9034_LDO(10, 2700, 3050, 50, LDO1110, 0, 3, OVER2, 4), + DA9034_LDO(11, 1800, 3300, 100, LDO1110, 4, 4, OVER2, 5), + DA9034_LDO(12, 1700, 3050, 50, LDO1312, 0, 4, OVER3, 6), + DA9034_LDO(13, 1800, 3300, 100, LDO1312, 4, 4, OVER2, 7), + DA9034_LDO(14, 1800, 3300, 100, LDO1514, 0, 4, OVER3, 0), + DA9034_LDO(15, 1800, 3300, 100, LDO1514, 4, 4, OVER3, 1), + DA9034_LDO(5, 3100, 3100, 0, INVAL, 0, 0, OVER3, 7), /* fixed @3.1V */ + + /* DA9035 */ + DA9035_DVC(BUCK3, 1800, 2200, 100, 3DTV1, 3, VCC2, 0, OVER3, 3), +}; + +static inline struct da903x_regulator_info *find_regulator_info(int id) +{ + struct da903x_regulator_info *ri; + int i; + + for (i = 0; i < ARRAY_SIZE(da903x_regulator_info); i++) { + ri = &da903x_regulator_info[i]; + if (ri->desc.id == id) + return ri; + } + return NULL; +} + +static int da903x_regulator_probe(struct platform_device *pdev) +{ + struct da903x_regulator_info *ri = NULL; + struct regulator_dev *rdev; + struct regulator_config config = { }; + + ri = find_regulator_info(pdev->id); + if (ri == NULL) { + dev_err(&pdev->dev, "invalid regulator ID specified\n"); + return -EINVAL; + } + + /* Workaround for the weird LDO12 voltage setting */ + if (ri->desc.id == DA9034_ID_LDO12) { + ri->desc.ops = &da9034_regulator_ldo12_ops; + ri->desc.n_voltages = 16; + ri->desc.linear_ranges = da9034_ldo12_ranges; + ri->desc.n_linear_ranges = ARRAY_SIZE(da9034_ldo12_ranges); + } + + if (ri->desc.id == DA9030_ID_LDO14) + ri->desc.ops = &da9030_regulator_ldo14_ops; + + if (ri->desc.id == DA9030_ID_LDO1 || ri->desc.id == DA9030_ID_LDO15) + ri->desc.ops = &da9030_regulator_ldo1_15_ops; + + config.dev = &pdev->dev; + config.init_data = dev_get_platdata(&pdev->dev); + config.driver_data = ri; + + rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + ri->desc.name); + return PTR_ERR(rdev); + } + + platform_set_drvdata(pdev, rdev); + return 0; +} + +static struct platform_driver da903x_regulator_driver = { + .driver = { + .name = "da903x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = da903x_regulator_probe, +}; + +static int __init da903x_regulator_init(void) +{ + return platform_driver_register(&da903x_regulator_driver); +} +subsys_initcall(da903x_regulator_init); + +static void __exit da903x_regulator_exit(void) +{ + platform_driver_unregister(&da903x_regulator_driver); +} +module_exit(da903x_regulator_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Eric Miao " + "Mike Rapoport "); +MODULE_DESCRIPTION("Regulator Driver for Dialog Semiconductor DA903X PMIC"); +MODULE_ALIAS("platform:da903x-regulator"); diff --git a/drivers/regulator/da9052-regulator.c b/drivers/regulator/da9052-regulator.c new file mode 100644 index 000000000..fbebe538a --- /dev/null +++ b/drivers/regulator/da9052-regulator.c @@ -0,0 +1,460 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// da9052-regulator.c: Regulator driver for DA9052 +// +// Copyright(c) 2011 Dialog Semiconductor Ltd. +// +// Author: David Dajun Chen + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* Buck step size */ +#define DA9052_BUCK_PERI_3uV_STEP 100000 +#define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 +#define DA9052_CONST_3uV 3000000 + +#define DA9052_MIN_UA 0 +#define DA9052_MAX_UA 3 +#define DA9052_CURRENT_RANGE 4 + +/* Bit masks */ +#define DA9052_BUCK_ILIM_MASK_EVEN 0x0c +#define DA9052_BUCK_ILIM_MASK_ODD 0xc0 + +/* DA9052 REGULATOR IDs */ +#define DA9052_ID_BUCK1 0 +#define DA9052_ID_BUCK2 1 +#define DA9052_ID_BUCK3 2 +#define DA9052_ID_BUCK4 3 +#define DA9052_ID_LDO1 4 +#define DA9052_ID_LDO2 5 +#define DA9052_ID_LDO3 6 +#define DA9052_ID_LDO4 7 +#define DA9052_ID_LDO5 8 +#define DA9052_ID_LDO6 9 +#define DA9052_ID_LDO7 10 +#define DA9052_ID_LDO8 11 +#define DA9052_ID_LDO9 12 +#define DA9052_ID_LDO10 13 + +static const u32 da9052_current_limits[3][4] = { + {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ + {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ + {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, + * BUCK-MEM and BUCK-PERI + */ +}; + +struct da9052_regulator_info { + struct regulator_desc reg_desc; + int step_uV; + int min_uV; + int max_uV; + unsigned char activate_bit; +}; + +struct da9052_regulator { + struct da9052 *da9052; + const struct da9052_regulator_info *info; + struct regulator_dev *rdev; +}; + +static int verify_range(const struct da9052_regulator_info *info, + int min_uV, int max_uV) +{ + if (min_uV > info->max_uV || max_uV < info->min_uV) + return -EINVAL; + + return 0; +} + +static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + int offset = rdev_get_id(rdev); + int ret, row = 2; + + ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); + if (ret < 0) + return ret; + + /* Determine the even or odd position of the buck current limit + * register field + */ + if (offset % 2 == 0) + ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; + else + ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; + + /* Select the appropriate current limit range */ + if (regulator->da9052->chip_id == DA9052) + row = 0; + else if (offset == 0) + row = 1; + + return da9052_current_limits[row][ret]; +} + +static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + int offset = rdev_get_id(rdev); + int reg_val = 0; + int i, row = 2; + + /* Select the appropriate current limit range */ + if (regulator->da9052->chip_id == DA9052) + row = 0; + else if (offset == 0) + row = 1; + + for (i = DA9052_CURRENT_RANGE - 1; i >= 0; i--) { + if ((min_uA <= da9052_current_limits[row][i]) && + (da9052_current_limits[row][i] <= max_uA)) { + reg_val = i; + break; + } + } + + if (i < 0) + return -EINVAL; + + /* Determine the even or odd position of the buck current limit + * register field + */ + if (offset % 2 == 0) + return da9052_reg_update(regulator->da9052, + DA9052_BUCKA_REG + offset/2, + DA9052_BUCK_ILIM_MASK_EVEN, + reg_val << 2); + else + return da9052_reg_update(regulator->da9052, + DA9052_BUCKA_REG + offset/2, + DA9052_BUCK_ILIM_MASK_ODD, + reg_val << 6); +} + +static int da9052_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9052_regulator_info *info = regulator->info; + int id = rdev_get_id(rdev); + int volt_uV; + + if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) + && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { + volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) + + info->min_uV); + volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) + * (DA9052_BUCK_PERI_3uV_STEP); + } else { + volt_uV = (selector * info->step_uV) + info->min_uV; + } + + if (volt_uV > info->max_uV) + return -EINVAL; + + return volt_uV; +} + +static int da9052_map_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9052_regulator_info *info = regulator->info; + int id = rdev_get_id(rdev); + int ret, sel; + + ret = verify_range(info, min_uV, max_uV); + if (ret < 0) + return ret; + + if (min_uV < info->min_uV) + min_uV = info->min_uV; + + if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) + && (min_uV >= DA9052_CONST_3uV)) { + sel = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + + DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, + DA9052_BUCK_PERI_3uV_STEP); + } else { + sel = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); + } + + ret = da9052_list_voltage(rdev, sel); + if (ret < 0) + return ret; + + return sel; +} + +static int da9052_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9052_regulator_info *info = regulator->info; + int id = rdev_get_id(rdev); + int ret; + + ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg, + rdev->desc->vsel_mask, selector); + if (ret < 0) + return ret; + + /* Some LDOs and DCDCs are DVC controlled which requires enabling of + * the activate bit to implment the changes on the output. + */ + switch (id) { + case DA9052_ID_BUCK1: + case DA9052_ID_BUCK2: + case DA9052_ID_BUCK3: + case DA9052_ID_LDO2: + case DA9052_ID_LDO3: + ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, + info->activate_bit, info->activate_bit); + break; + } + + return ret; +} + +static int da9052_regulator_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_sel, + unsigned int new_sel) +{ + struct da9052_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9052_regulator_info *info = regulator->info; + int id = rdev_get_id(rdev); + int ret = 0; + + /* The DVC controlled LDOs and DCDCs ramp with 6.25mV/µs after enabling + * the activate bit. + */ + switch (id) { + case DA9052_ID_BUCK1: + case DA9052_ID_BUCK2: + case DA9052_ID_BUCK3: + case DA9052_ID_LDO2: + case DA9052_ID_LDO3: + ret = DIV_ROUND_UP(abs(new_sel - old_sel) * info->step_uV, + 6250); + break; + } + + return ret; +} + +static const struct regulator_ops da9052_dcdc_ops = { + .get_current_limit = da9052_dcdc_get_current_limit, + .set_current_limit = da9052_dcdc_set_current_limit, + + .list_voltage = da9052_list_voltage, + .map_voltage = da9052_map_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = da9052_regulator_set_voltage_sel, + .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops da9052_ldo_ops = { + .list_voltage = da9052_list_voltage, + .map_voltage = da9052_map_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = da9052_regulator_set_voltage_sel, + .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +#define DA9052_LDO(_id, _name, step, min, max, sbits, ebits, abits) \ +{\ + .reg_desc = {\ + .name = #_name,\ + .of_match = of_match_ptr(#_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .ops = &da9052_ldo_ops,\ + .type = REGULATOR_VOLTAGE,\ + .id = DA9052_ID_##_id,\ + .n_voltages = (max - min) / step + 1, \ + .owner = THIS_MODULE,\ + .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ + .vsel_mask = (1 << (sbits)) - 1,\ + .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ + .enable_mask = 1 << (ebits),\ + },\ + .min_uV = (min) * 1000,\ + .max_uV = (max) * 1000,\ + .step_uV = (step) * 1000,\ + .activate_bit = (abits),\ +} + +#define DA9052_DCDC(_id, _name, step, min, max, sbits, ebits, abits) \ +{\ + .reg_desc = {\ + .name = #_name,\ + .of_match = of_match_ptr(#_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .ops = &da9052_dcdc_ops,\ + .type = REGULATOR_VOLTAGE,\ + .id = DA9052_ID_##_id,\ + .n_voltages = (max - min) / step + 1, \ + .owner = THIS_MODULE,\ + .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ + .vsel_mask = (1 << (sbits)) - 1,\ + .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ + .enable_mask = 1 << (ebits),\ + },\ + .min_uV = (min) * 1000,\ + .max_uV = (max) * 1000,\ + .step_uV = (step) * 1000,\ + .activate_bit = (abits),\ +} + +static const struct da9052_regulator_info da9052_regulator_info[] = { + DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), + DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), + DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), + DA9052_DCDC(BUCK4, buck4, 50, 1800, 3600, 5, 6, 0), + DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), + DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), + DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), + DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), + DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), + DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), +}; + +static const struct da9052_regulator_info da9053_regulator_info[] = { + DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), + DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), + DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), + DA9052_DCDC(BUCK4, buck4, 25, 950, 2525, 6, 6, 0), + DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), + DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), + DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), + DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), + DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), + DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), + DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), +}; + +static inline const struct da9052_regulator_info *find_regulator_info(u8 chip_id, + int id) +{ + const struct da9052_regulator_info *info; + int i; + + switch (chip_id) { + case DA9052: + for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { + info = &da9052_regulator_info[i]; + if (info->reg_desc.id == id) + return info; + } + break; + case DA9053_AA: + case DA9053_BA: + case DA9053_BB: + case DA9053_BC: + for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { + info = &da9053_regulator_info[i]; + if (info->reg_desc.id == id) + return info; + } + break; + } + + return NULL; +} + +static int da9052_regulator_probe(struct platform_device *pdev) +{ + const struct mfd_cell *cell = mfd_get_cell(pdev); + struct regulator_config config = { }; + struct da9052_regulator *regulator; + struct da9052 *da9052; + struct da9052_pdata *pdata; + + regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), + GFP_KERNEL); + if (!regulator) + return -ENOMEM; + + da9052 = dev_get_drvdata(pdev->dev.parent); + pdata = dev_get_platdata(da9052->dev); + regulator->da9052 = da9052; + + regulator->info = find_regulator_info(regulator->da9052->chip_id, + cell->id); + if (regulator->info == NULL) { + dev_err(&pdev->dev, "invalid regulator ID specified\n"); + return -EINVAL; + } + + config.dev = da9052->dev; + config.driver_data = regulator; + config.regmap = da9052->regmap; + if (pdata) + config.init_data = pdata->regulators[cell->id]; + + regulator->rdev = devm_regulator_register(&pdev->dev, + ®ulator->info->reg_desc, + &config); + if (IS_ERR(regulator->rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + regulator->info->reg_desc.name); + return PTR_ERR(regulator->rdev); + } + + platform_set_drvdata(pdev, regulator); + + return 0; +} + +static struct platform_driver da9052_regulator_driver = { + .probe = da9052_regulator_probe, + .driver = { + .name = "da9052-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init da9052_regulator_init(void) +{ + return platform_driver_register(&da9052_regulator_driver); +} +subsys_initcall(da9052_regulator_init); + +static void __exit da9052_regulator_exit(void) +{ + platform_driver_unregister(&da9052_regulator_driver); +} +module_exit(da9052_regulator_exit); + +MODULE_AUTHOR("David Dajun Chen "); +MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:da9052-regulator"); diff --git a/drivers/regulator/da9055-regulator.c b/drivers/regulator/da9055-regulator.c new file mode 100644 index 000000000..a0d3414aa --- /dev/null +++ b/drivers/regulator/da9055-regulator.c @@ -0,0 +1,598 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Regulator driver for DA9055 PMIC +// +// Copyright(c) 2012 Dialog Semiconductor Ltd. +// +// Author: David Dajun Chen + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DA9055_MIN_UA 0 +#define DA9055_MAX_UA 3 + +#define DA9055_LDO_MODE_SYNC 0 +#define DA9055_LDO_MODE_SLEEP 1 + +#define DA9055_BUCK_MODE_SLEEP 1 +#define DA9055_BUCK_MODE_SYNC 2 +#define DA9055_BUCK_MODE_AUTO 3 + +/* DA9055 REGULATOR IDs */ +#define DA9055_ID_BUCK1 0 +#define DA9055_ID_BUCK2 1 +#define DA9055_ID_LDO1 2 +#define DA9055_ID_LDO2 3 +#define DA9055_ID_LDO3 4 +#define DA9055_ID_LDO4 5 +#define DA9055_ID_LDO5 6 +#define DA9055_ID_LDO6 7 + +/* DA9055 BUCK current limit */ +static const unsigned int da9055_current_limits[] = { + 500000, 600000, 700000, 800000 +}; + +struct da9055_conf_reg { + int reg; + int sel_mask; + int en_mask; +}; + +struct da9055_volt_reg { + int reg_a; + int reg_b; + int sl_shift; + int v_mask; +}; + +struct da9055_mode_reg { + int reg; + int mask; + int shift; +}; + +struct da9055_regulator_info { + struct regulator_desc reg_desc; + struct da9055_conf_reg conf; + struct da9055_volt_reg volt; + struct da9055_mode_reg mode; +}; + +struct da9055_regulator { + struct da9055 *da9055; + const struct da9055_regulator_info *info; + struct regulator_dev *rdev; + enum gpio_select reg_rselect; +}; + +static unsigned int da9055_buck_get_mode(struct regulator_dev *rdev) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + int ret, mode = 0; + + ret = da9055_reg_read(regulator->da9055, info->mode.reg); + if (ret < 0) + return ret; + + switch ((ret & info->mode.mask) >> info->mode.shift) { + case DA9055_BUCK_MODE_SYNC: + mode = REGULATOR_MODE_FAST; + break; + case DA9055_BUCK_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case DA9055_BUCK_MODE_SLEEP: + mode = REGULATOR_MODE_STANDBY; + break; + } + + return mode; +} + +static int da9055_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + int val = 0; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = DA9055_BUCK_MODE_SYNC << info->mode.shift; + break; + case REGULATOR_MODE_NORMAL: + val = DA9055_BUCK_MODE_AUTO << info->mode.shift; + break; + case REGULATOR_MODE_STANDBY: + val = DA9055_BUCK_MODE_SLEEP << info->mode.shift; + break; + } + + return da9055_reg_update(regulator->da9055, info->mode.reg, + info->mode.mask, val); +} + +static unsigned int da9055_ldo_get_mode(struct regulator_dev *rdev) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + int ret; + + ret = da9055_reg_read(regulator->da9055, info->volt.reg_b); + if (ret < 0) + return ret; + + if (ret >> info->volt.sl_shift) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_NORMAL; +} + +static int da9055_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + struct da9055_volt_reg volt = info->volt; + int val = 0; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + case REGULATOR_MODE_FAST: + val = DA9055_LDO_MODE_SYNC; + break; + case REGULATOR_MODE_STANDBY: + val = DA9055_LDO_MODE_SLEEP; + break; + } + + return da9055_reg_update(regulator->da9055, volt.reg_b, + 1 << volt.sl_shift, + val << volt.sl_shift); +} + +static int da9055_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + struct da9055_volt_reg volt = info->volt; + int ret, sel; + + /* + * There are two voltage register set A & B for voltage ramping but + * either one of then can be active therefore we first determine + * the active register set. + */ + ret = da9055_reg_read(regulator->da9055, info->conf.reg); + if (ret < 0) + return ret; + + ret &= info->conf.sel_mask; + + /* Get the voltage for the active register set A/B */ + if (ret == DA9055_REGUALTOR_SET_A) + ret = da9055_reg_read(regulator->da9055, volt.reg_a); + else + ret = da9055_reg_read(regulator->da9055, volt.reg_b); + + if (ret < 0) + return ret; + + sel = (ret & volt.v_mask); + return sel; +} + +static int da9055_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + int ret; + + /* + * Regulator register set A/B is not selected through GPIO therefore + * we use default register set A for voltage ramping. + */ + if (regulator->reg_rselect == NO_GPIO) { + /* Select register set A */ + ret = da9055_reg_update(regulator->da9055, info->conf.reg, + info->conf.sel_mask, DA9055_SEL_REG_A); + if (ret < 0) + return ret; + + /* Set the voltage */ + return da9055_reg_update(regulator->da9055, info->volt.reg_a, + info->volt.v_mask, selector); + } + + /* + * Here regulator register set A/B is selected through GPIO. + * Therefore we first determine the selected register set A/B and + * then set the desired voltage for that register set A/B. + */ + ret = da9055_reg_read(regulator->da9055, info->conf.reg); + if (ret < 0) + return ret; + + ret &= info->conf.sel_mask; + + /* Set the voltage */ + if (ret == DA9055_REGUALTOR_SET_A) + return da9055_reg_update(regulator->da9055, info->volt.reg_a, + info->volt.v_mask, selector); + else + return da9055_reg_update(regulator->da9055, info->volt.reg_b, + info->volt.v_mask, selector); +} + +static int da9055_regulator_set_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + int ret; + + /* Select register set B for suspend voltage ramping. */ + if (regulator->reg_rselect == NO_GPIO) { + ret = da9055_reg_update(regulator->da9055, info->conf.reg, + info->conf.sel_mask, DA9055_SEL_REG_B); + if (ret < 0) + return ret; + } + + ret = regulator_map_voltage_linear(rdev, uV, uV); + if (ret < 0) + return ret; + + return da9055_reg_update(regulator->da9055, info->volt.reg_b, + info->volt.v_mask, ret); +} + +static int da9055_suspend_enable(struct regulator_dev *rdev) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + + /* Select register set B for voltage ramping. */ + if (regulator->reg_rselect == NO_GPIO) + return da9055_reg_update(regulator->da9055, info->conf.reg, + info->conf.sel_mask, DA9055_SEL_REG_B); + else + return 0; +} + +static int da9055_suspend_disable(struct regulator_dev *rdev) +{ + struct da9055_regulator *regulator = rdev_get_drvdata(rdev); + const struct da9055_regulator_info *info = regulator->info; + + /* Diselect register set B. */ + if (regulator->reg_rselect == NO_GPIO) + return da9055_reg_update(regulator->da9055, info->conf.reg, + info->conf.sel_mask, DA9055_SEL_REG_A); + else + return 0; +} + +static const struct regulator_ops da9055_buck_ops = { + .get_mode = da9055_buck_get_mode, + .set_mode = da9055_buck_set_mode, + + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + + .get_voltage_sel = da9055_regulator_get_voltage_sel, + .set_voltage_sel = da9055_regulator_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + + .set_suspend_voltage = da9055_regulator_set_suspend_voltage, + .set_suspend_enable = da9055_suspend_enable, + .set_suspend_disable = da9055_suspend_disable, + .set_suspend_mode = da9055_buck_set_mode, +}; + +static const struct regulator_ops da9055_ldo_ops = { + .get_mode = da9055_ldo_get_mode, + .set_mode = da9055_ldo_set_mode, + + .get_voltage_sel = da9055_regulator_get_voltage_sel, + .set_voltage_sel = da9055_regulator_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + + .set_suspend_voltage = da9055_regulator_set_suspend_voltage, + .set_suspend_enable = da9055_suspend_enable, + .set_suspend_disable = da9055_suspend_disable, + .set_suspend_mode = da9055_ldo_set_mode, + +}; + +#define DA9055_LDO(_id, step, min, max, vbits, voffset) \ +{\ + .reg_desc = {\ + .name = #_id,\ + .of_match = of_match_ptr(#_id),\ + .regulators_node = of_match_ptr("regulators"),\ + .ops = &da9055_ldo_ops,\ + .type = REGULATOR_VOLTAGE,\ + .id = DA9055_ID_##_id,\ + .n_voltages = (max - min) / step + 1 + (voffset), \ + .enable_reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ + .enable_mask = 1, \ + .min_uV = (min) * 1000,\ + .uV_step = (step) * 1000,\ + .linear_min_sel = (voffset),\ + .owner = THIS_MODULE,\ + },\ + .conf = {\ + .reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ + .sel_mask = (1 << 4),\ + .en_mask = 1,\ + },\ + .volt = {\ + .reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \ + .reg_b = DA9055_REG_VBCORE_B + DA9055_ID_##_id, \ + .sl_shift = 7,\ + .v_mask = (1 << (vbits)) - 1,\ + },\ +} + +#define DA9055_BUCK(_id, step, min, max, vbits, voffset, mbits, sbits) \ +{\ + .reg_desc = {\ + .name = #_id,\ + .of_match = of_match_ptr(#_id),\ + .regulators_node = of_match_ptr("regulators"),\ + .ops = &da9055_buck_ops,\ + .type = REGULATOR_VOLTAGE,\ + .id = DA9055_ID_##_id,\ + .n_voltages = (max - min) / step + 1 + (voffset), \ + .enable_reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ + .enable_mask = 1,\ + .min_uV = (min) * 1000,\ + .uV_step = (step) * 1000,\ + .linear_min_sel = (voffset),\ + .owner = THIS_MODULE,\ + .curr_table = da9055_current_limits,\ + .n_current_limits = ARRAY_SIZE(da9055_current_limits),\ + .csel_reg = DA9055_REG_BUCK_LIM,\ + .csel_mask = (mbits),\ + },\ + .conf = {\ + .reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ + .sel_mask = (1 << 4),\ + .en_mask = 1,\ + },\ + .volt = {\ + .reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \ + .reg_b = DA9055_REG_VBCORE_B + DA9055_ID_##_id, \ + .sl_shift = 7,\ + .v_mask = (1 << (vbits)) - 1,\ + },\ + .mode = {\ + .reg = DA9055_REG_BCORE_MODE,\ + .mask = (mbits),\ + .shift = (sbits),\ + },\ +} + +static const struct da9055_regulator_info da9055_regulator_info[] = { + DA9055_BUCK(BUCK1, 25, 725, 2075, 6, 9, 0xc, 2), + DA9055_BUCK(BUCK2, 25, 925, 2500, 6, 0, 3, 0), + DA9055_LDO(LDO1, 50, 900, 3300, 6, 2), + DA9055_LDO(LDO2, 50, 900, 3300, 6, 3), + DA9055_LDO(LDO3, 50, 900, 3300, 6, 2), + DA9055_LDO(LDO4, 50, 900, 3300, 6, 2), + DA9055_LDO(LDO5, 50, 900, 2750, 6, 2), + DA9055_LDO(LDO6, 20, 900, 3300, 7, 0), +}; + +/* + * Configures regulator to be controlled either through GPIO 1 or 2. + * GPIO can control regulator state and/or select the regulator register + * set A/B for voltage ramping. + */ +static int da9055_gpio_init(struct device *dev, + struct da9055_regulator *regulator, + struct regulator_config *config, + struct da9055_pdata *pdata, int id) +{ + const struct da9055_regulator_info *info = regulator->info; + struct gpio_desc *ren; + struct gpio_desc *ena; + struct gpio_desc *rsel; + int ret = 0; + + /* Look for "regulator-enable-gpios" GPIOs in the regulator node */ + ren = devm_gpiod_get_optional(dev, "regulator-enable", GPIOD_IN); + if (IS_ERR(ren)) + return PTR_ERR(ren); + + if (ren) { + /* This GPIO is not optional at this point */ + ena = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(ena)) + return PTR_ERR(ena); + + config->ena_gpiod = ena; + + /* + * GPI pin is muxed with regulator to control the + * regulator state. + */ + gpiod_set_consumer_name(ren, "DA9055 ren GPI"); + + /* + * Let the regulator know that its state is controlled + * through GPI. + */ + ret = da9055_reg_update(regulator->da9055, info->conf.reg, + DA9055_E_GPI_MASK, + pdata->reg_ren[id] + << DA9055_E_GPI_SHIFT); + if (ret < 0) + return ret; + } + + /* Look for "regulator-select-gpios" GPIOs in the regulator node */ + rsel = devm_gpiod_get_optional(dev, "regulator-select", GPIOD_IN); + if (IS_ERR(rsel)) + return PTR_ERR(rsel); + + if (rsel) { + regulator->reg_rselect = pdata->reg_rsel[id]; + + /* + * GPI pin is muxed with regulator to select the + * regulator register set A/B for voltage ramping. + */ + gpiod_set_consumer_name(rsel, "DA9055 rsel GPI"); + + /* + * Let the regulator know that its register set A/B + * will be selected through GPI for voltage ramping. + */ + ret = da9055_reg_update(regulator->da9055, info->conf.reg, + DA9055_V_GPI_MASK, + pdata->reg_rsel[id] + << DA9055_V_GPI_SHIFT); + } + + return ret; +} + +static irqreturn_t da9055_ldo5_6_oc_irq(int irq, void *data) +{ + struct da9055_regulator *regulator = data; + + regulator_notifier_call_chain(regulator->rdev, + REGULATOR_EVENT_OVER_CURRENT, NULL); + + return IRQ_HANDLED; +} + +static inline const struct da9055_regulator_info *find_regulator_info(int id) +{ + const struct da9055_regulator_info *info; + int i; + + for (i = 0; i < ARRAY_SIZE(da9055_regulator_info); i++) { + info = &da9055_regulator_info[i]; + if (info->reg_desc.id == id) + return info; + } + + return NULL; +} + +static int da9055_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = { }; + struct da9055_regulator *regulator; + struct da9055 *da9055 = dev_get_drvdata(pdev->dev.parent); + struct da9055_pdata *pdata = dev_get_platdata(da9055->dev); + int ret, irq; + + regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9055_regulator), + GFP_KERNEL); + if (!regulator) + return -ENOMEM; + + regulator->info = find_regulator_info(pdev->id); + if (regulator->info == NULL) { + dev_err(&pdev->dev, "invalid regulator ID specified\n"); + return -EINVAL; + } + + regulator->da9055 = da9055; + config.dev = da9055->dev; + config.driver_data = regulator; + config.regmap = da9055->regmap; + + if (pdata) + config.init_data = pdata->regulators[pdev->id]; + + ret = da9055_gpio_init(&pdev->dev, regulator, &config, pdata, pdev->id); + if (ret < 0) + return ret; + + regulator->rdev = devm_regulator_register(&pdev->dev, + ®ulator->info->reg_desc, + &config); + if (IS_ERR(regulator->rdev)) { + dev_err(&pdev->dev, "Failed to register regulator %s\n", + regulator->info->reg_desc.name); + return PTR_ERR(regulator->rdev); + } + + /* Only LDO 5 and 6 has got the over current interrupt */ + if (pdev->id == DA9055_ID_LDO5 || pdev->id == DA9055_ID_LDO6) { + irq = platform_get_irq_byname(pdev, "REGULATOR"); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + da9055_ldo5_6_oc_irq, + IRQF_TRIGGER_HIGH | + IRQF_ONESHOT | + IRQF_PROBE_SHARED, + pdev->name, regulator); + if (ret != 0) { + if (ret != -EBUSY) { + dev_err(&pdev->dev, + "Failed to request Regulator IRQ %d: %d\n", + irq, ret); + return ret; + } + } + } + + platform_set_drvdata(pdev, regulator); + + return 0; +} + +static struct platform_driver da9055_regulator_driver = { + .probe = da9055_regulator_probe, + .driver = { + .name = "da9055-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init da9055_regulator_init(void) +{ + return platform_driver_register(&da9055_regulator_driver); +} +subsys_initcall(da9055_regulator_init); + +static void __exit da9055_regulator_exit(void) +{ + platform_driver_unregister(&da9055_regulator_driver); +} +module_exit(da9055_regulator_exit); + +MODULE_AUTHOR("David Dajun Chen "); +MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9055 PMIC"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:da9055-regulator"); diff --git a/drivers/regulator/da9062-regulator.c b/drivers/regulator/da9062-regulator.c new file mode 100644 index 000000000..e0c96f10e --- /dev/null +++ b/drivers/regulator/da9062-regulator.c @@ -0,0 +1,1056 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Regulator device driver for DA9061 and DA9062. +// Copyright (C) 2015-2017 Dialog Semiconductor + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Regulator IDs */ +enum { + DA9061_ID_BUCK1, + DA9061_ID_BUCK2, + DA9061_ID_BUCK3, + DA9061_ID_LDO1, + DA9061_ID_LDO2, + DA9061_ID_LDO3, + DA9061_ID_LDO4, + DA9061_MAX_REGULATORS, +}; + +enum { + DA9062_ID_BUCK1, + DA9062_ID_BUCK2, + DA9062_ID_BUCK3, + DA9062_ID_BUCK4, + DA9062_ID_LDO1, + DA9062_ID_LDO2, + DA9062_ID_LDO3, + DA9062_ID_LDO4, + DA9062_MAX_REGULATORS, +}; + +/* Regulator capabilities and registers description */ +struct da9062_regulator_info { + struct regulator_desc desc; + /* Main register fields */ + struct reg_field mode; + struct reg_field suspend; + struct reg_field sleep; + struct reg_field suspend_sleep; + unsigned int suspend_vsel_reg; + /* Event detection bit */ + struct reg_field oc_event; +}; + +/* Single regulator settings */ +struct da9062_regulator { + struct regulator_desc desc; + struct regulator_dev *rdev; + struct da9062 *hw; + const struct da9062_regulator_info *info; + + struct regmap_field *mode; + struct regmap_field *suspend; + struct regmap_field *sleep; + struct regmap_field *suspend_sleep; +}; + +/* Encapsulates all information for the regulators driver */ +struct da9062_regulators { + int irq_ldo_lim; + unsigned n_regulators; + /* Array size to be defined during init. Keep at end. */ + struct da9062_regulator regulator[] __counted_by(n_regulators); +}; + +/* Regulator operations */ + +/* Current limits array (in uA) + * - DA9061_ID_[BUCK1|BUCK3] + * - DA9062_ID_[BUCK1|BUCK2|BUCK4] + * Entry indexes corresponds to register values. + */ +static const unsigned int da9062_buck_a_limits[] = { + 500000, 600000, 700000, 800000, 900000, 1000000, 1100000, 1200000, + 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1900000, 2000000 +}; + +/* Current limits array (in uA) + * - DA9061_ID_BUCK2 + * - DA9062_ID_BUCK3 + * Entry indexes corresponds to register values. + */ +static const unsigned int da9062_buck_b_limits[] = { + 1500000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000, + 2300000, 2400000, 2500000, 2600000, 2700000, 2800000, 2900000, 3000000 +}; + +static unsigned int da9062_map_buck_mode(unsigned int mode) +{ + switch (mode) { + case DA9063_BUCK_MODE_SLEEP: + return REGULATOR_MODE_STANDBY; + case DA9063_BUCK_MODE_SYNC: + return REGULATOR_MODE_FAST; + case DA9063_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int da9062_buck_set_mode(struct regulator_dev *rdev, unsigned mode) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + unsigned val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = DA9063_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = DA9063_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = DA9063_BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->mode, val); +} + +/* + * Bucks use single mode register field for normal operation + * and suspend state. + * There are 3 modes to map to: FAST, NORMAL, and STANDBY. + */ + +static unsigned da9062_buck_get_mode(struct regulator_dev *rdev) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_field_read(regl->mode, &val); + if (ret < 0) + return ret; + + switch (val) { + default: + /* Sleep flag bit decides the mode */ + break; + case DA9063_BUCK_MODE_SLEEP: + return REGULATOR_MODE_STANDBY; + case DA9063_BUCK_MODE_SYNC: + return REGULATOR_MODE_FAST; + case DA9063_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + } + + ret = regmap_field_read(regl->sleep, &val); + if (ret < 0) + return 0; + + if (val) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_FAST; +} + +/* + * LDOs use sleep flags - one for normal and one for suspend state. + * There are 2 modes to map to: NORMAL and STANDBY (sleep) for each state. + */ + +static int da9062_ldo_set_mode(struct regulator_dev *rdev, unsigned mode) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + unsigned val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_STANDBY: + val = 1; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->sleep, val); +} + +static unsigned da9062_ldo_get_mode(struct regulator_dev *rdev) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + int ret, val; + + ret = regmap_field_read(regl->sleep, &val); + if (ret < 0) + return 0; + + if (val) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_NORMAL; +} + +static int da9062_buck_get_status(struct regulator_dev *rdev) +{ + int ret = regulator_is_enabled_regmap(rdev); + + if (ret == 0) { + ret = REGULATOR_STATUS_OFF; + } else if (ret > 0) { + ret = da9062_buck_get_mode(rdev); + if (ret > 0) + ret = regulator_mode_to_status(ret); + else if (ret == 0) + ret = -EIO; + } + + return ret; +} + +static int da9062_ldo_get_status(struct regulator_dev *rdev) +{ + int ret = regulator_is_enabled_regmap(rdev); + + if (ret == 0) { + ret = REGULATOR_STATUS_OFF; + } else if (ret > 0) { + ret = da9062_ldo_get_mode(rdev); + if (ret > 0) + ret = regulator_mode_to_status(ret); + else if (ret == 0) + ret = -EIO; + } + + return ret; +} + +static int da9062_set_suspend_voltage(struct regulator_dev *rdev, int uv) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + const struct da9062_regulator_info *rinfo = regl->info; + int ret, sel; + + sel = regulator_map_voltage_linear(rdev, uv, uv); + if (sel < 0) + return sel; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + + ret = regmap_update_bits(regl->hw->regmap, rinfo->suspend_vsel_reg, + rdev->desc->vsel_mask, sel); + + return ret; +} + +static int da9062_suspend_enable(struct regulator_dev *rdev) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + + return regmap_field_write(regl->suspend, 1); +} + +static int da9062_suspend_disable(struct regulator_dev *rdev) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + + return regmap_field_write(regl->suspend, 0); +} + +static int da9062_buck_set_suspend_mode(struct regulator_dev *rdev, + unsigned mode) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = DA9063_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = DA9063_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = DA9063_BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->mode, val); +} + +static int da9062_ldo_set_suspend_mode(struct regulator_dev *rdev, + unsigned mode) +{ + struct da9062_regulator *regl = rdev_get_drvdata(rdev); + unsigned val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_STANDBY: + val = 1; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->suspend_sleep, val); +} + +static const struct regulator_ops da9062_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_mode = da9062_buck_set_mode, + .get_mode = da9062_buck_get_mode, + .get_status = da9062_buck_get_status, + .set_suspend_voltage = da9062_set_suspend_voltage, + .set_suspend_enable = da9062_suspend_enable, + .set_suspend_disable = da9062_suspend_disable, + .set_suspend_mode = da9062_buck_set_suspend_mode, +}; + +static const struct regulator_ops da9062_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_mode = da9062_ldo_set_mode, + .get_mode = da9062_ldo_get_mode, + .get_status = da9062_ldo_get_status, + .set_suspend_voltage = da9062_set_suspend_voltage, + .set_suspend_enable = da9062_suspend_enable, + .set_suspend_disable = da9062_suspend_disable, + .set_suspend_mode = da9062_ldo_set_suspend_mode, +}; + +/* DA9061 Regulator information */ +static const struct da9062_regulator_info local_da9061_regulator_info[] = { + { + .desc.id = DA9061_ID_BUCK1, + .desc.name = "DA9061 BUCK1", + .desc.of_match = of_match_ptr("buck1"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (300) * 1000, + .desc.uV_step = (10) * 1000, + .desc.n_voltages = ((1570) - (300))/(10) + 1, + .desc.curr_table = da9062_buck_a_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_C, + .desc.csel_mask = DA9062AA_BUCK1_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK1_CONT, + .desc.enable_mask = DA9062AA_BUCK1_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK1_A, + .desc.vsel_mask = DA9062AA_VBUCK1_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK1_A, + __builtin_ffs((int)DA9062AA_BUCK1_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B, + __builtin_ffs((int)DA9062AA_BUCK1_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK1_B, + .mode = REG_FIELD(DA9062AA_BUCK1_CFG, + __builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK1_CONT, + __builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1), + }, + { + .desc.id = DA9061_ID_BUCK2, + .desc.name = "DA9061 BUCK2", + .desc.of_match = of_match_ptr("buck2"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (800) * 1000, + .desc.uV_step = (20) * 1000, + .desc.n_voltages = ((3340) - (800))/(20) + 1, + .desc.curr_table = da9062_buck_b_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_b_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_A, + .desc.csel_mask = DA9062AA_BUCK3_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK3_CONT, + .desc.enable_mask = DA9062AA_BUCK3_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK3_A, + .desc.vsel_mask = DA9062AA_VBUCK3_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK3_A, + __builtin_ffs((int)DA9062AA_BUCK3_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK3_B, + __builtin_ffs((int)DA9062AA_BUCK3_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK3_B, + .mode = REG_FIELD(DA9062AA_BUCK3_CFG, + __builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK3_CONT, + __builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1), + }, + { + .desc.id = DA9061_ID_BUCK3, + .desc.name = "DA9061 BUCK3", + .desc.of_match = of_match_ptr("buck3"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (530) * 1000, + .desc.uV_step = (10) * 1000, + .desc.n_voltages = ((1800) - (530))/(10) + 1, + .desc.curr_table = da9062_buck_a_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_B, + .desc.csel_mask = DA9062AA_BUCK4_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK4_CONT, + .desc.enable_mask = DA9062AA_BUCK4_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK4_A, + .desc.vsel_mask = DA9062AA_VBUCK4_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK4_A, + __builtin_ffs((int)DA9062AA_BUCK4_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK4_B, + __builtin_ffs((int)DA9062AA_BUCK4_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK4_B, + .mode = REG_FIELD(DA9062AA_BUCK4_CFG, + __builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK4_CONT, + __builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1), + }, + { + .desc.id = DA9061_ID_LDO1, + .desc.name = "DA9061 LDO1", + .desc.of_match = of_match_ptr("ldo1"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO1_CONT, + .desc.enable_mask = DA9062AA_LDO1_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO1_A, + .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO1_A, + __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO1_B, + __builtin_ffs((int)DA9062AA_LDO1_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO1_B, + .suspend = REG_FIELD(DA9062AA_LDO1_CONT, + __builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9061_ID_LDO2, + .desc.name = "DA9061 LDO2", + .desc.of_match = of_match_ptr("ldo2"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO2_CONT, + .desc.enable_mask = DA9062AA_LDO2_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO2_A, + .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO2_A, + __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO2_B, + __builtin_ffs((int)DA9062AA_LDO2_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO2_B, + .suspend = REG_FIELD(DA9062AA_LDO2_CONT, + __builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9061_ID_LDO3, + .desc.name = "DA9061 LDO3", + .desc.of_match = of_match_ptr("ldo3"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO3_CONT, + .desc.enable_mask = DA9062AA_LDO3_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO3_A, + .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO3_A, + __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO3_B, + __builtin_ffs((int)DA9062AA_LDO3_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO3_B, + .suspend = REG_FIELD(DA9062AA_LDO3_CONT, + __builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9061_ID_LDO4, + .desc.name = "DA9061 LDO4", + .desc.of_match = of_match_ptr("ldo4"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO4_CONT, + .desc.enable_mask = DA9062AA_LDO4_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO4_A, + .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO4_A, + __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO4_B, + __builtin_ffs((int)DA9062AA_LDO4_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO4_B, + .suspend = REG_FIELD(DA9062AA_LDO4_CONT, + __builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_ILIM_MASK)) - 1), + }, +}; + +/* DA9062 Regulator information */ +static const struct da9062_regulator_info local_da9062_regulator_info[] = { + { + .desc.id = DA9062_ID_BUCK1, + .desc.name = "DA9062 BUCK1", + .desc.of_match = of_match_ptr("buck1"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (300) * 1000, + .desc.uV_step = (10) * 1000, + .desc.n_voltages = ((1570) - (300))/(10) + 1, + .desc.curr_table = da9062_buck_a_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_C, + .desc.csel_mask = DA9062AA_BUCK1_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK1_CONT, + .desc.enable_mask = DA9062AA_BUCK1_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK1_A, + .desc.vsel_mask = DA9062AA_VBUCK1_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK1_A, + __builtin_ffs((int)DA9062AA_BUCK1_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B, + __builtin_ffs((int)DA9062AA_BUCK1_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK1_B, + .mode = REG_FIELD(DA9062AA_BUCK1_CFG, + __builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK1_CONT, + __builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1), + }, + { + .desc.id = DA9062_ID_BUCK2, + .desc.name = "DA9062 BUCK2", + .desc.of_match = of_match_ptr("buck2"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (300) * 1000, + .desc.uV_step = (10) * 1000, + .desc.n_voltages = ((1570) - (300))/(10) + 1, + .desc.curr_table = da9062_buck_a_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_C, + .desc.csel_mask = DA9062AA_BUCK2_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK2_CONT, + .desc.enable_mask = DA9062AA_BUCK2_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK2_A, + .desc.vsel_mask = DA9062AA_VBUCK2_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK2_A, + __builtin_ffs((int)DA9062AA_BUCK2_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK2_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK2_B, + __builtin_ffs((int)DA9062AA_BUCK2_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK2_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK2_B, + .mode = REG_FIELD(DA9062AA_BUCK2_CFG, + __builtin_ffs((int)DA9062AA_BUCK2_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK2_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK2_CONT, + __builtin_ffs((int)DA9062AA_BUCK2_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK2_CONF_MASK) - 1), + }, + { + .desc.id = DA9062_ID_BUCK3, + .desc.name = "DA9062 BUCK3", + .desc.of_match = of_match_ptr("buck3"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (800) * 1000, + .desc.uV_step = (20) * 1000, + .desc.n_voltages = ((3340) - (800))/(20) + 1, + .desc.curr_table = da9062_buck_b_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_b_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_A, + .desc.csel_mask = DA9062AA_BUCK3_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK3_CONT, + .desc.enable_mask = DA9062AA_BUCK3_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK3_A, + .desc.vsel_mask = DA9062AA_VBUCK3_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK3_A, + __builtin_ffs((int)DA9062AA_BUCK3_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK3_B, + __builtin_ffs((int)DA9062AA_BUCK3_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK3_B, + .mode = REG_FIELD(DA9062AA_BUCK3_CFG, + __builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK3_CONT, + __builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1), + }, + { + .desc.id = DA9062_ID_BUCK4, + .desc.name = "DA9062 BUCK4", + .desc.of_match = of_match_ptr("buck4"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_buck_ops, + .desc.min_uV = (530) * 1000, + .desc.uV_step = (10) * 1000, + .desc.n_voltages = ((1800) - (530))/(10) + 1, + .desc.curr_table = da9062_buck_a_limits, + .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), + .desc.csel_reg = DA9062AA_BUCK_ILIM_B, + .desc.csel_mask = DA9062AA_BUCK4_ILIM_MASK, + .desc.enable_reg = DA9062AA_BUCK4_CONT, + .desc.enable_mask = DA9062AA_BUCK4_EN_MASK, + .desc.vsel_reg = DA9062AA_VBUCK4_A, + .desc.vsel_mask = DA9062AA_VBUCK4_A_MASK, + .desc.linear_min_sel = 0, + .desc.of_map_mode = da9062_map_buck_mode, + .sleep = REG_FIELD(DA9062AA_VBUCK4_A, + __builtin_ffs((int)DA9062AA_BUCK4_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VBUCK4_B, + __builtin_ffs((int)DA9062AA_BUCK4_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VBUCK4_B, + .mode = REG_FIELD(DA9062AA_BUCK4_CFG, + __builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1), + .suspend = REG_FIELD(DA9062AA_BUCK4_CONT, + __builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1), + }, + { + .desc.id = DA9062_ID_LDO1, + .desc.name = "DA9062 LDO1", + .desc.of_match = of_match_ptr("ldo1"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO1_CONT, + .desc.enable_mask = DA9062AA_LDO1_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO1_A, + .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO1_A, + __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO1_B, + __builtin_ffs((int)DA9062AA_LDO1_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO1_B, + .suspend = REG_FIELD(DA9062AA_LDO1_CONT, + __builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO1_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9062_ID_LDO2, + .desc.name = "DA9062 LDO2", + .desc.of_match = of_match_ptr("ldo2"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO2_CONT, + .desc.enable_mask = DA9062AA_LDO2_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO2_A, + .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO2_A, + __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO2_B, + __builtin_ffs((int)DA9062AA_LDO2_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO2_B, + .suspend = REG_FIELD(DA9062AA_LDO2_CONT, + __builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO2_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9062_ID_LDO3, + .desc.name = "DA9062 LDO3", + .desc.of_match = of_match_ptr("ldo3"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO3_CONT, + .desc.enable_mask = DA9062AA_LDO3_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO3_A, + .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO3_A, + __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO3_B, + __builtin_ffs((int)DA9062AA_LDO3_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO3_B, + .suspend = REG_FIELD(DA9062AA_LDO3_CONT, + __builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO3_ILIM_MASK)) - 1), + }, + { + .desc.id = DA9062_ID_LDO4, + .desc.name = "DA9062 LDO4", + .desc.of_match = of_match_ptr("ldo4"), + .desc.regulators_node = of_match_ptr("regulators"), + .desc.ops = &da9062_ldo_ops, + .desc.min_uV = (900) * 1000, + .desc.uV_step = (50) * 1000, + .desc.n_voltages = ((3600) - (900))/(50) + 1 + + DA9062AA_VLDO_A_MIN_SEL, + .desc.enable_reg = DA9062AA_LDO4_CONT, + .desc.enable_mask = DA9062AA_LDO4_EN_MASK, + .desc.vsel_reg = DA9062AA_VLDO4_A, + .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, + .sleep = REG_FIELD(DA9062AA_VLDO4_A, + __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_SL_A_MASK)) - 1), + .suspend_sleep = REG_FIELD(DA9062AA_VLDO4_B, + __builtin_ffs((int)DA9062AA_LDO4_SL_B_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1), + .suspend_vsel_reg = DA9062AA_VLDO4_B, + .suspend = REG_FIELD(DA9062AA_LDO4_CONT, + __builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1), + .oc_event = REG_FIELD(DA9062AA_STATUS_D, + __builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1, + sizeof(unsigned int) * 8 - + __builtin_clz((DA9062AA_LDO4_ILIM_MASK)) - 1), + }, +}; + +/* Regulator interrupt handlers */ +static irqreturn_t da9062_ldo_lim_event(int irq, void *data) +{ + struct da9062_regulators *regulators = data; + struct da9062 *hw = regulators->regulator[0].hw; + struct da9062_regulator *regl; + int handled = IRQ_NONE; + int bits, i, ret; + + ret = regmap_read(hw->regmap, DA9062AA_STATUS_D, &bits); + if (ret < 0) { + dev_err(hw->dev, + "Failed to read LDO overcurrent indicator\n"); + goto ldo_lim_error; + } + + for (i = regulators->n_regulators - 1; i >= 0; i--) { + regl = ®ulators->regulator[i]; + if (regl->info->oc_event.reg != DA9062AA_STATUS_D) + continue; + + if (BIT(regl->info->oc_event.lsb) & bits) { + regulator_notifier_call_chain(regl->rdev, + REGULATOR_EVENT_OVER_CURRENT, NULL); + handled = IRQ_HANDLED; + } + } + +ldo_lim_error: + return handled; +} + +static int da9062_regulator_probe(struct platform_device *pdev) +{ + struct da9062 *chip = dev_get_drvdata(pdev->dev.parent); + struct da9062_regulators *regulators; + struct da9062_regulator *regl; + struct regulator_config config = { }; + const struct da9062_regulator_info *rinfo; + int n, ret; + int max_regulators; + + switch (chip->chip_type) { + case COMPAT_TYPE_DA9061: + max_regulators = DA9061_MAX_REGULATORS; + rinfo = local_da9061_regulator_info; + break; + case COMPAT_TYPE_DA9062: + max_regulators = DA9062_MAX_REGULATORS; + rinfo = local_da9062_regulator_info; + break; + default: + dev_err(chip->dev, "Unrecognised chip type\n"); + return -ENODEV; + } + + /* Allocate memory required by usable regulators */ + regulators = devm_kzalloc(&pdev->dev, struct_size(regulators, regulator, + max_regulators), GFP_KERNEL); + if (!regulators) + return -ENOMEM; + + regulators->n_regulators = max_regulators; + platform_set_drvdata(pdev, regulators); + + for (n = 0; n < regulators->n_regulators; n++) { + /* Initialise regulator structure */ + regl = ®ulators->regulator[n]; + regl->hw = chip; + regl->info = &rinfo[n]; + regl->desc = regl->info->desc; + regl->desc.type = REGULATOR_VOLTAGE; + regl->desc.owner = THIS_MODULE; + + if (regl->info->mode.reg) { + regl->mode = devm_regmap_field_alloc( + &pdev->dev, + chip->regmap, + regl->info->mode); + if (IS_ERR(regl->mode)) + return PTR_ERR(regl->mode); + } + + if (regl->info->suspend.reg) { + regl->suspend = devm_regmap_field_alloc( + &pdev->dev, + chip->regmap, + regl->info->suspend); + if (IS_ERR(regl->suspend)) + return PTR_ERR(regl->suspend); + } + + if (regl->info->sleep.reg) { + regl->sleep = devm_regmap_field_alloc( + &pdev->dev, + chip->regmap, + regl->info->sleep); + if (IS_ERR(regl->sleep)) + return PTR_ERR(regl->sleep); + } + + if (regl->info->suspend_sleep.reg) { + regl->suspend_sleep = devm_regmap_field_alloc( + &pdev->dev, + chip->regmap, + regl->info->suspend_sleep); + if (IS_ERR(regl->suspend_sleep)) + return PTR_ERR(regl->suspend_sleep); + } + + /* Register regulator */ + memset(&config, 0, sizeof(config)); + config.dev = chip->dev; + config.driver_data = regl; + config.regmap = chip->regmap; + + regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc, + &config); + if (IS_ERR(regl->rdev)) { + dev_err(&pdev->dev, + "Failed to register %s regulator\n", + regl->desc.name); + return PTR_ERR(regl->rdev); + } + } + + /* LDOs overcurrent event support */ + regulators->irq_ldo_lim = platform_get_irq_byname_optional(pdev, "LDO_LIM"); + if (regulators->irq_ldo_lim < 0) + return 0; + + ret = devm_request_threaded_irq(&pdev->dev, regulators->irq_ldo_lim, + NULL, da9062_ldo_lim_event, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "LDO_LIM", regulators); + if (ret) { + dev_warn(&pdev->dev, + "Failed to request LDO_LIM IRQ.\n"); + regulators->irq_ldo_lim = -ENXIO; + } + + return 0; +} + +static struct platform_driver da9062_regulator_driver = { + .driver = { + .name = "da9062-regulators", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = da9062_regulator_probe, +}; + +static int __init da9062_regulator_init(void) +{ + return platform_driver_register(&da9062_regulator_driver); +} +subsys_initcall(da9062_regulator_init); + +static void __exit da9062_regulator_cleanup(void) +{ + platform_driver_unregister(&da9062_regulator_driver); +} +module_exit(da9062_regulator_cleanup); + +/* Module information */ +MODULE_AUTHOR("S Twiss "); +MODULE_DESCRIPTION("REGULATOR device driver for Dialog DA9062 and DA9061"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:da9062-regulators"); diff --git a/drivers/regulator/da9063-regulator.c b/drivers/regulator/da9063-regulator.c new file mode 100644 index 000000000..bf34ea440 --- /dev/null +++ b/drivers/regulator/da9063-regulator.c @@ -0,0 +1,1085 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Regulator driver for DA9063 PMIC series +// +// Copyright 2012 Dialog Semiconductors Ltd. +// Copyright 2013 Philipp Zabel, Pengutronix +// +// Author: Krystian Garbaciak + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Definition for registering regmap bit fields using a mask */ +#define BFIELD(_reg, _mask) \ + REG_FIELD(_reg, __builtin_ffs((int)_mask) - 1, \ + sizeof(unsigned int) * 8 - __builtin_clz((_mask)) - 1) + +/* DA9063 and DA9063L regulator IDs */ +enum { + /* BUCKs */ + DA9063_ID_BCORE1, + DA9063_ID_BCORE2, + DA9063_ID_BPRO, + DA9063_ID_BMEM, + DA9063_ID_BIO, + DA9063_ID_BPERI, + + /* BCORE1 and BCORE2 in merged mode */ + DA9063_ID_BCORES_MERGED, + /* BMEM and BIO in merged mode */ + DA9063_ID_BMEM_BIO_MERGED, + /* When two BUCKs are merged, they cannot be reused separately */ + + /* LDOs on both DA9063 and DA9063L */ + DA9063_ID_LDO3, + DA9063_ID_LDO7, + DA9063_ID_LDO8, + DA9063_ID_LDO9, + DA9063_ID_LDO11, + + /* DA9063-only LDOs */ + DA9063_ID_LDO1, + DA9063_ID_LDO2, + DA9063_ID_LDO4, + DA9063_ID_LDO5, + DA9063_ID_LDO6, + DA9063_ID_LDO10, +}; + +/* Old regulator platform data */ +struct da9063_regulator_data { + int id; + struct regulator_init_data *initdata; +}; + +struct da9063_regulators_pdata { + unsigned int n_regulators; + struct da9063_regulator_data regulator_data[] __counted_by(n_regulators); +}; + +/* Regulator capabilities and registers description */ +struct da9063_regulator_info { + struct regulator_desc desc; + + /* DA9063 main register fields */ + struct reg_field mode; /* buck mode of operation */ + struct reg_field suspend; + struct reg_field sleep; + struct reg_field suspend_sleep; + unsigned int suspend_vsel_reg; + + /* DA9063 event detection bit */ + struct reg_field oc_event; + + /* DA9063 voltage monitor bit */ + struct reg_field vmon; +}; + +/* Macros for LDO */ +#define DA9063_LDO(chip, regl_name, min_mV, step_mV, max_mV) \ + .desc.id = chip##_ID_##regl_name, \ + .desc.name = __stringify(chip##_##regl_name), \ + .desc.ops = &da9063_ldo_ops, \ + .desc.min_uV = (min_mV) * 1000, \ + .desc.uV_step = (step_mV) * 1000, \ + .desc.n_voltages = (((max_mV) - (min_mV))/(step_mV) + 1 \ + + (DA9063_V##regl_name##_BIAS)), \ + .desc.enable_reg = DA9063_REG_##regl_name##_CONT, \ + .desc.enable_mask = DA9063_LDO_EN, \ + .desc.vsel_reg = DA9063_REG_V##regl_name##_A, \ + .desc.vsel_mask = DA9063_V##regl_name##_MASK, \ + .desc.linear_min_sel = DA9063_V##regl_name##_BIAS, \ + .sleep = BFIELD(DA9063_REG_V##regl_name##_A, DA9063_LDO_SL), \ + .suspend = BFIELD(DA9063_REG_##regl_name##_CONT, DA9063_LDO_CONF), \ + .suspend_sleep = BFIELD(DA9063_REG_V##regl_name##_B, DA9063_LDO_SL), \ + .suspend_vsel_reg = DA9063_REG_V##regl_name##_B + +/* Macros for voltage DC/DC converters (BUCKs) */ +#define DA9063_BUCK(chip, regl_name, min_mV, step_mV, max_mV, limits_array, \ + creg, cmask) \ + .desc.id = chip##_ID_##regl_name, \ + .desc.name = __stringify(chip##_##regl_name), \ + .desc.ops = &da9063_buck_ops, \ + .desc.min_uV = (min_mV) * 1000, \ + .desc.uV_step = (step_mV) * 1000, \ + .desc.n_voltages = ((max_mV) - (min_mV))/(step_mV) + 1, \ + .desc.csel_reg = (creg), \ + .desc.csel_mask = (cmask), \ + .desc.curr_table = limits_array, \ + .desc.n_current_limits = ARRAY_SIZE(limits_array) + +#define DA9063_BUCK_COMMON_FIELDS(regl_name) \ + .desc.enable_reg = DA9063_REG_##regl_name##_CONT, \ + .desc.enable_mask = DA9063_BUCK_EN, \ + .desc.vsel_reg = DA9063_REG_V##regl_name##_A, \ + .desc.vsel_mask = DA9063_VBUCK_MASK, \ + .desc.linear_min_sel = DA9063_VBUCK_BIAS, \ + .sleep = BFIELD(DA9063_REG_V##regl_name##_A, DA9063_BUCK_SL), \ + .suspend = BFIELD(DA9063_REG_##regl_name##_CONT, DA9063_BUCK_CONF), \ + .suspend_sleep = BFIELD(DA9063_REG_V##regl_name##_B, DA9063_BUCK_SL), \ + .suspend_vsel_reg = DA9063_REG_V##regl_name##_B, \ + .mode = BFIELD(DA9063_REG_##regl_name##_CFG, DA9063_BUCK_MODE_MASK) + +/* Defines assignment of regulators info table to chip model */ +struct da9063_dev_model { + const struct da9063_regulator_info *regulator_info; + unsigned int n_regulators; + enum da9063_type type; +}; + +/* Single regulator settings */ +struct da9063_regulator { + struct regulator_desc desc; + struct regulator_dev *rdev; + struct da9063 *hw; + const struct da9063_regulator_info *info; + + struct regmap_field *mode; + struct regmap_field *suspend; + struct regmap_field *sleep; + struct regmap_field *suspend_sleep; + struct regmap_field *vmon; +}; + +/* Encapsulates all information for the regulators driver */ +struct da9063_regulators { + unsigned int n_regulators; + /* Array size to be defined during init. Keep at end. */ + struct da9063_regulator regulator[] __counted_by(n_regulators); +}; + +/* BUCK modes for DA9063 */ +enum { + BUCK_MODE_MANUAL, /* 0 */ + BUCK_MODE_SLEEP, /* 1 */ + BUCK_MODE_SYNC, /* 2 */ + BUCK_MODE_AUTO /* 3 */ +}; + +/* Regulator operations */ + +/* + * Current limits array (in uA) for BCORE1, BCORE2, BPRO. + * Entry indexes corresponds to register values. + */ +static const unsigned int da9063_buck_a_limits[] = { + 500000, 600000, 700000, 800000, 900000, 1000000, 1100000, 1200000, + 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1900000, 2000000 +}; + +/* + * Current limits array (in uA) for BMEM, BIO, BPERI. + * Entry indexes corresponds to register values. + */ +static const unsigned int da9063_buck_b_limits[] = { + 1500000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000, + 2300000, 2400000, 2500000, 2600000, 2700000, 2800000, 2900000, 3000000 +}; + +/* + * Current limits array (in uA) for merged BCORE1 and BCORE2. + * Entry indexes corresponds to register values. + */ +static const unsigned int da9063_bcores_merged_limits[] = { + 1000000, 1200000, 1400000, 1600000, 1800000, 2000000, 2200000, 2400000, + 2600000, 2800000, 3000000, 3200000, 3400000, 3600000, 3800000, 4000000 +}; + +/* + * Current limits array (in uA) for merged BMEM and BIO. + * Entry indexes corresponds to register values. + */ +static const unsigned int da9063_bmem_bio_merged_limits[] = { + 3000000, 3200000, 3400000, 3600000, 3800000, 4000000, 4200000, 4400000, + 4600000, 4800000, 5000000, 5200000, 5400000, 5600000, 5800000, 6000000 +}; + +static int da9063_set_xvp(struct regulator_dev *rdev, int lim_uV, int severity, bool enable) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + struct device *dev = regl->hw->dev; + + dev_dbg(dev, "%s: lim: %d, sev: %d, en: %d\n", regl->desc.name, lim_uV, severity, enable); + + /* + * only support enable and disable. + * the da9063 offers a GPIO (GP_FB2) which is unasserted if an XV happens. + * therefore ignore severity here, as there might be handlers in hardware. + */ + if (lim_uV) + return -EINVAL; + + return regmap_field_write(regl->vmon, enable ? 1 : 0); +} + +static int da9063_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->mode, val); +} + +/* + * Bucks use single mode register field for normal operation + * and suspend state. + * There are 3 modes to map to: FAST, NORMAL, and STANDBY. + */ + +static unsigned int da9063_buck_get_mode(struct regulator_dev *rdev) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_field_read(regl->mode, &val); + if (ret < 0) + return ret; + + switch (val) { + default: + case BUCK_MODE_MANUAL: + /* Sleep flag bit decides the mode */ + break; + case BUCK_MODE_SLEEP: + return REGULATOR_MODE_STANDBY; + case BUCK_MODE_SYNC: + return REGULATOR_MODE_FAST; + case BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + } + + ret = regmap_field_read(regl->sleep, &val); + if (ret < 0) + return 0; + + if (val) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_FAST; +} + +/* + * LDOs use sleep flags - one for normal and one for suspend state. + * There are 2 modes to map to: NORMAL and STANDBY (sleep) for each state. + */ + +static int da9063_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_STANDBY: + val = 1; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->sleep, val); +} + +static unsigned int da9063_ldo_get_mode(struct regulator_dev *rdev) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + int ret, val; + + ret = regmap_field_read(regl->sleep, &val); + if (ret < 0) + return 0; + + if (val) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_NORMAL; +} + +static int da9063_buck_get_status(struct regulator_dev *rdev) +{ + int ret = regulator_is_enabled_regmap(rdev); + + if (ret == 0) { + ret = REGULATOR_STATUS_OFF; + } else if (ret > 0) { + ret = da9063_buck_get_mode(rdev); + if (ret > 0) + ret = regulator_mode_to_status(ret); + else if (ret == 0) + ret = -EIO; + } + + return ret; +} + +static int da9063_ldo_get_status(struct regulator_dev *rdev) +{ + int ret = regulator_is_enabled_regmap(rdev); + + if (ret == 0) { + ret = REGULATOR_STATUS_OFF; + } else if (ret > 0) { + ret = da9063_ldo_get_mode(rdev); + if (ret > 0) + ret = regulator_mode_to_status(ret); + else if (ret == 0) + ret = -EIO; + } + + return ret; +} + +static int da9063_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + const struct da9063_regulator_info *rinfo = regl->info; + int ret, sel; + + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + + ret = regmap_update_bits(regl->hw->regmap, rinfo->suspend_vsel_reg, + rdev->desc->vsel_mask, sel); + + return ret; +} + +static int da9063_suspend_enable(struct regulator_dev *rdev) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + + return regmap_field_write(regl->suspend, 1); +} + +static int da9063_suspend_disable(struct regulator_dev *rdev) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + + return regmap_field_write(regl->suspend, 0); +} + +static int da9063_buck_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->mode, val); +} + +static int da9063_ldo_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_STANDBY: + val = 1; + break; + default: + return -EINVAL; + } + + return regmap_field_write(regl->suspend_sleep, val); +} + +static unsigned int da9063_get_overdrive_mask(const struct regulator_desc *desc) +{ + switch (desc->id) { + case DA9063_ID_BCORES_MERGED: + case DA9063_ID_BCORE1: + return DA9063_BCORE1_OD; + case DA9063_ID_BCORE2: + return DA9063_BCORE2_OD; + case DA9063_ID_BPRO: + return DA9063_BPRO_OD; + default: + return 0; + } +} + +static int da9063_buck_set_limit_set_overdrive(struct regulator_dev *rdev, + int min_uA, int max_uA, + unsigned int overdrive_mask) +{ + /* + * When enabling overdrive, do it before changing the current limit to + * ensure sufficient supply throughout the switch. + */ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + int ret; + unsigned int orig_overdrive; + + ret = regmap_read(regl->hw->regmap, DA9063_REG_CONFIG_H, + &orig_overdrive); + if (ret < 0) + return ret; + orig_overdrive &= overdrive_mask; + + if (orig_overdrive == 0) { + ret = regmap_set_bits(regl->hw->regmap, DA9063_REG_CONFIG_H, + overdrive_mask); + if (ret < 0) + return ret; + } + + ret = regulator_set_current_limit_regmap(rdev, min_uA / 2, max_uA / 2); + if (ret < 0 && orig_overdrive == 0) + /* + * regulator_set_current_limit_regmap may have rejected the + * change because of unusable min_uA and/or max_uA inputs. + * Attempt to restore original overdrive state, ignore failure- + * on-failure. + */ + regmap_clear_bits(regl->hw->regmap, DA9063_REG_CONFIG_H, + overdrive_mask); + + return ret; +} + +static int da9063_buck_set_limit_clear_overdrive(struct regulator_dev *rdev, + int min_uA, int max_uA, + unsigned int overdrive_mask) +{ + /* + * When disabling overdrive, do it after changing the current limit to + * ensure sufficient supply throughout the switch. + */ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + int ret, orig_limit; + + ret = regmap_read(rdev->regmap, rdev->desc->csel_reg, &orig_limit); + if (ret < 0) + return ret; + + ret = regulator_set_current_limit_regmap(rdev, min_uA, max_uA); + if (ret < 0) + return ret; + + ret = regmap_clear_bits(regl->hw->regmap, DA9063_REG_CONFIG_H, + overdrive_mask); + if (ret < 0) + /* + * Attempt to restore original current limit, ignore failure- + * on-failure. + */ + regmap_write(rdev->regmap, rdev->desc->csel_reg, orig_limit); + + return ret; +} + +static int da9063_buck_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + unsigned int overdrive_mask, n_currents; + + overdrive_mask = da9063_get_overdrive_mask(rdev->desc); + if (overdrive_mask) { + n_currents = rdev->desc->n_current_limits; + if (n_currents == 0) + return -EINVAL; + + if (max_uA > rdev->desc->curr_table[n_currents - 1]) + return da9063_buck_set_limit_set_overdrive(rdev, min_uA, + max_uA, + overdrive_mask); + + return da9063_buck_set_limit_clear_overdrive(rdev, min_uA, + max_uA, + overdrive_mask); + } + return regulator_set_current_limit_regmap(rdev, min_uA, max_uA); +} + +static int da9063_buck_get_current_limit(struct regulator_dev *rdev) +{ + struct da9063_regulator *regl = rdev_get_drvdata(rdev); + int val, ret, limit; + unsigned int mask; + + limit = regulator_get_current_limit_regmap(rdev); + if (limit < 0) + return limit; + mask = da9063_get_overdrive_mask(rdev->desc); + if (mask) { + ret = regmap_read(regl->hw->regmap, DA9063_REG_CONFIG_H, &val); + if (ret < 0) + return ret; + if (val & mask) + limit *= 2; + } + return limit; +} + +static const struct regulator_ops da9063_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = da9063_buck_set_current_limit, + .get_current_limit = da9063_buck_get_current_limit, + .set_mode = da9063_buck_set_mode, + .get_mode = da9063_buck_get_mode, + .get_status = da9063_buck_get_status, + .set_suspend_voltage = da9063_set_suspend_voltage, + .set_suspend_enable = da9063_suspend_enable, + .set_suspend_disable = da9063_suspend_disable, + .set_suspend_mode = da9063_buck_set_suspend_mode, + .set_over_voltage_protection = da9063_set_xvp, + .set_under_voltage_protection = da9063_set_xvp, +}; + +static const struct regulator_ops da9063_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_mode = da9063_ldo_set_mode, + .get_mode = da9063_ldo_get_mode, + .get_status = da9063_ldo_get_status, + .set_suspend_voltage = da9063_set_suspend_voltage, + .set_suspend_enable = da9063_suspend_enable, + .set_suspend_disable = da9063_suspend_disable, + .set_suspend_mode = da9063_ldo_set_suspend_mode, + .set_over_voltage_protection = da9063_set_xvp, + .set_under_voltage_protection = da9063_set_xvp, +}; + +/* Info of regulators for DA9063 */ +static const struct da9063_regulator_info da9063_regulator_info[] = { + { + DA9063_BUCK(DA9063, BCORE1, 300, 10, 1570, + da9063_buck_a_limits, + DA9063_REG_BUCK_ILIM_C, DA9063_BCORE1_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BCORE1), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BCORE1_MON_EN), + }, + { + DA9063_BUCK(DA9063, BCORE2, 300, 10, 1570, + da9063_buck_a_limits, + DA9063_REG_BUCK_ILIM_C, DA9063_BCORE2_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BCORE2), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BCORE2_MON_EN), + }, + { + DA9063_BUCK(DA9063, BPRO, 530, 10, 1800, + da9063_buck_a_limits, + DA9063_REG_BUCK_ILIM_B, DA9063_BPRO_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BPRO), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BPRO_MON_EN), + }, + { + DA9063_BUCK(DA9063, BMEM, 800, 20, 3340, + da9063_buck_b_limits, + DA9063_REG_BUCK_ILIM_A, DA9063_BMEM_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BMEM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BMEM_MON_EN), + }, + { + DA9063_BUCK(DA9063, BIO, 800, 20, 3340, + da9063_buck_b_limits, + DA9063_REG_BUCK_ILIM_A, DA9063_BIO_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BIO), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BIO_MON_EN), + }, + { + DA9063_BUCK(DA9063, BPERI, 800, 20, 3340, + da9063_buck_b_limits, + DA9063_REG_BUCK_ILIM_B, DA9063_BPERI_ILIM_MASK), + DA9063_BUCK_COMMON_FIELDS(BPERI), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BPERI_MON_EN), + }, + { + DA9063_BUCK(DA9063, BCORES_MERGED, 300, 10, 1570, + da9063_bcores_merged_limits, + DA9063_REG_BUCK_ILIM_C, DA9063_BCORE1_ILIM_MASK), + /* BCORES_MERGED uses the same register fields as BCORE1 */ + DA9063_BUCK_COMMON_FIELDS(BCORE1), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BCORE1_MON_EN), + }, + { + DA9063_BUCK(DA9063, BMEM_BIO_MERGED, 800, 20, 3340, + da9063_bmem_bio_merged_limits, + DA9063_REG_BUCK_ILIM_A, DA9063_BMEM_ILIM_MASK), + /* BMEM_BIO_MERGED uses the same register fields as BMEM */ + DA9063_BUCK_COMMON_FIELDS(BMEM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_4, DA9063_BMEM_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO3, 900, 20, 3440), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO3_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO7, 900, 50, 3600), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO7_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO8, 900, 50, 3600), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO8_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO9, 950, 50, 3600), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_3, DA9063_LDO9_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO11, 900, 50, 3600), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_3, DA9063_LDO11_MON_EN), + }, + + /* The following LDOs are present only on DA9063, not on DA9063L */ + { + DA9063_LDO(DA9063, LDO1, 600, 20, 1860), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO1_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO2, 600, 20, 1860), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO2_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO4, 900, 20, 3440), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO4_LIM), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO4_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO5, 900, 50, 3600), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO5_MON_EN), + }, + { + DA9063_LDO(DA9063, LDO6, 900, 50, 3600), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_2, DA9063_LDO6_MON_EN), + }, + + { + DA9063_LDO(DA9063, LDO10, 900, 50, 3600), + .vmon = BFIELD(DA9063_BB_REG_MON_REG_3, DA9063_LDO10_MON_EN), + }, +}; + +/* Link chip model with regulators info table */ +static const struct da9063_dev_model regulators_models[] = { + { + .regulator_info = da9063_regulator_info, + .n_regulators = ARRAY_SIZE(da9063_regulator_info), + .type = PMIC_TYPE_DA9063, + }, + { + .regulator_info = da9063_regulator_info, + .n_regulators = ARRAY_SIZE(da9063_regulator_info) - 6, + .type = PMIC_TYPE_DA9063L, + }, + { } +}; + +/* Regulator interrupt handlers */ +static irqreturn_t da9063_ldo_lim_event(int irq, void *data) +{ + struct da9063_regulators *regulators = data; + struct da9063 *hw = regulators->regulator[0].hw; + struct da9063_regulator *regl; + int bits, i, ret; + + ret = regmap_read(hw->regmap, DA9063_REG_STATUS_D, &bits); + if (ret < 0) + return IRQ_NONE; + + for (i = regulators->n_regulators - 1; i >= 0; i--) { + regl = ®ulators->regulator[i]; + if (regl->info->oc_event.reg != DA9063_REG_STATUS_D) + continue; + + if (BIT(regl->info->oc_event.lsb) & bits) { + regulator_notifier_call_chain(regl->rdev, + REGULATOR_EVENT_OVER_CURRENT, NULL); + } + } + + return IRQ_HANDLED; +} + +/* + * Probing and Initialisation functions + */ +static const struct regulator_init_data *da9063_get_regulator_initdata( + const struct da9063_regulators_pdata *regl_pdata, int id) +{ + int i; + + for (i = 0; i < regl_pdata->n_regulators; i++) { + if (id == regl_pdata->regulator_data[i].id) + return regl_pdata->regulator_data[i].initdata; + } + + return NULL; +} + +static int da9063_check_xvp_constraints(struct regulator_config *config) +{ + struct da9063_regulator *regl = config->driver_data; + const struct regulation_constraints *constr = &config->init_data->constraints; + const struct notification_limit *uv_l = &constr->under_voltage_limits; + const struct notification_limit *ov_l = &constr->over_voltage_limits; + + /* make sure that only one severity is used to clarify if unchanged, enabled or disabled */ + if ((!!uv_l->prot + !!uv_l->err + !!uv_l->warn) > 1) { + dev_err(config->dev, "%s: at most one voltage monitoring severity allowed!\n", + regl->desc.name); + return -EINVAL; + } + + /* make sure that UV and OV monitoring is set to the same severity and value */ + if (uv_l->prot != ov_l->prot) { + dev_err(config->dev, + "%s: protection-microvolt: value must be equal for uv and ov!\n", + regl->desc.name); + return -EINVAL; + } + if (uv_l->err != ov_l->err) { + dev_err(config->dev, "%s: error-microvolt: value must be equal for uv and ov!\n", + regl->desc.name); + return -EINVAL; + } + if (uv_l->warn != ov_l->warn) { + dev_err(config->dev, "%s: warn-microvolt: value must be equal for uv and ov!\n", + regl->desc.name); + return -EINVAL; + } + + return 0; +} + +static struct of_regulator_match da9063_matches[] = { + [DA9063_ID_BCORE1] = { .name = "bcore1" }, + [DA9063_ID_BCORE2] = { .name = "bcore2" }, + [DA9063_ID_BPRO] = { .name = "bpro", }, + [DA9063_ID_BMEM] = { .name = "bmem", }, + [DA9063_ID_BIO] = { .name = "bio", }, + [DA9063_ID_BPERI] = { .name = "bperi", }, + [DA9063_ID_BCORES_MERGED] = { .name = "bcores-merged" }, + [DA9063_ID_BMEM_BIO_MERGED] = { .name = "bmem-bio-merged", }, + [DA9063_ID_LDO3] = { .name = "ldo3", }, + [DA9063_ID_LDO7] = { .name = "ldo7", }, + [DA9063_ID_LDO8] = { .name = "ldo8", }, + [DA9063_ID_LDO9] = { .name = "ldo9", }, + [DA9063_ID_LDO11] = { .name = "ldo11", }, + /* The following LDOs are present only on DA9063, not on DA9063L */ + [DA9063_ID_LDO1] = { .name = "ldo1", }, + [DA9063_ID_LDO2] = { .name = "ldo2", }, + [DA9063_ID_LDO4] = { .name = "ldo4", }, + [DA9063_ID_LDO5] = { .name = "ldo5", }, + [DA9063_ID_LDO6] = { .name = "ldo6", }, + [DA9063_ID_LDO10] = { .name = "ldo10", }, +}; + +static struct da9063_regulators_pdata *da9063_parse_regulators_dt( + struct platform_device *pdev, + struct of_regulator_match **da9063_reg_matches) +{ + struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent); + struct da9063_regulators_pdata *pdata; + struct da9063_regulator_data *rdata; + struct device_node *node; + int da9063_matches_len = ARRAY_SIZE(da9063_matches); + int i, n, num; + + if (da9063->type == PMIC_TYPE_DA9063L) + da9063_matches_len -= 6; + + node = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); + if (!node) { + dev_err(&pdev->dev, "Regulators device node not found\n"); + return ERR_PTR(-ENODEV); + } + + num = of_regulator_match(&pdev->dev, node, da9063_matches, + da9063_matches_len); + of_node_put(node); + if (num < 0) { + dev_err(&pdev->dev, "Failed to match regulators\n"); + return ERR_PTR(-EINVAL); + } + + pdata = devm_kzalloc(&pdev->dev, struct_size(pdata, regulator_data, num), GFP_KERNEL); + if (!pdata) + return ERR_PTR(-ENOMEM); + + pdata->n_regulators = num; + + n = 0; + for (i = 0; i < da9063_matches_len; i++) { + if (!da9063_matches[i].init_data) + continue; + + rdata = &pdata->regulator_data[n]; + rdata->id = i; + rdata->initdata = da9063_matches[i].init_data; + + n++; + } + + *da9063_reg_matches = da9063_matches; + return pdata; +} + +static int da9063_regulator_probe(struct platform_device *pdev) +{ + struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent); + struct of_regulator_match *da9063_reg_matches = NULL; + struct da9063_regulators_pdata *regl_pdata; + const struct da9063_dev_model *model; + struct da9063_regulators *regulators; + struct da9063_regulator *regl; + struct regulator_config config; + bool bcores_merged, bmem_bio_merged; + int id, irq, n, n_regulators, ret, val; + + regl_pdata = da9063_parse_regulators_dt(pdev, &da9063_reg_matches); + + if (IS_ERR(regl_pdata) || regl_pdata->n_regulators == 0) { + dev_err(&pdev->dev, + "No regulators defined for the platform\n"); + return -ENODEV; + } + + /* Find regulators set for particular device model */ + for (model = regulators_models; model->regulator_info; model++) { + if (model->type == da9063->type) + break; + } + if (!model->regulator_info) { + dev_err(&pdev->dev, "Chip model not recognised (%u)\n", + da9063->type); + return -ENODEV; + } + + ret = regmap_read(da9063->regmap, DA9063_REG_CONFIG_H, &val); + if (ret < 0) { + dev_err(&pdev->dev, + "Error while reading BUCKs configuration\n"); + return ret; + } + bcores_merged = val & DA9063_BCORE_MERGE; + bmem_bio_merged = val & DA9063_BUCK_MERGE; + + n_regulators = model->n_regulators; + if (bcores_merged) + n_regulators -= 2; /* remove BCORE1, BCORE2 */ + else + n_regulators--; /* remove BCORES_MERGED */ + if (bmem_bio_merged) + n_regulators -= 2; /* remove BMEM, BIO */ + else + n_regulators--; /* remove BMEM_BIO_MERGED */ + + /* Allocate memory required by usable regulators */ + regulators = devm_kzalloc(&pdev->dev, struct_size(regulators, + regulator, n_regulators), GFP_KERNEL); + if (!regulators) + return -ENOMEM; + + regulators->n_regulators = n_regulators; + platform_set_drvdata(pdev, regulators); + + /* Register all regulators declared in platform information */ + n = 0; + id = 0; + while (n < regulators->n_regulators) { + /* Skip regulator IDs depending on merge mode configuration */ + switch (id) { + case DA9063_ID_BCORE1: + case DA9063_ID_BCORE2: + if (bcores_merged) { + id++; + continue; + } + break; + case DA9063_ID_BMEM: + case DA9063_ID_BIO: + if (bmem_bio_merged) { + id++; + continue; + } + break; + case DA9063_ID_BCORES_MERGED: + if (!bcores_merged) { + id++; + continue; + } + break; + case DA9063_ID_BMEM_BIO_MERGED: + if (!bmem_bio_merged) { + id++; + continue; + } + break; + } + + /* Initialise regulator structure */ + regl = ®ulators->regulator[n]; + regl->hw = da9063; + regl->info = &model->regulator_info[id]; + regl->desc = regl->info->desc; + regl->desc.type = REGULATOR_VOLTAGE; + regl->desc.owner = THIS_MODULE; + + if (regl->info->mode.reg) { + regl->mode = devm_regmap_field_alloc(&pdev->dev, + da9063->regmap, regl->info->mode); + if (IS_ERR(regl->mode)) + return PTR_ERR(regl->mode); + } + + if (regl->info->suspend.reg) { + regl->suspend = devm_regmap_field_alloc(&pdev->dev, + da9063->regmap, regl->info->suspend); + if (IS_ERR(regl->suspend)) + return PTR_ERR(regl->suspend); + } + + if (regl->info->sleep.reg) { + regl->sleep = devm_regmap_field_alloc(&pdev->dev, + da9063->regmap, regl->info->sleep); + if (IS_ERR(regl->sleep)) + return PTR_ERR(regl->sleep); + } + + if (regl->info->suspend_sleep.reg) { + regl->suspend_sleep = devm_regmap_field_alloc(&pdev->dev, + da9063->regmap, regl->info->suspend_sleep); + if (IS_ERR(regl->suspend_sleep)) + return PTR_ERR(regl->suspend_sleep); + } + if (regl->info->vmon.reg) { + regl->vmon = devm_regmap_field_alloc(&pdev->dev, + da9063->regmap, regl->info->vmon); + if (IS_ERR(regl->vmon)) + return PTR_ERR(regl->vmon); + } + + /* Register regulator */ + memset(&config, 0, sizeof(config)); + config.dev = &pdev->dev; + config.init_data = da9063_get_regulator_initdata(regl_pdata, id); + config.driver_data = regl; + if (da9063_reg_matches) + config.of_node = da9063_reg_matches[id].of_node; + config.regmap = da9063->regmap; + + /* Checking constraints requires init_data from DT. */ + if (config.init_data) { + ret = da9063_check_xvp_constraints(&config); + if (ret) + return ret; + } + + regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc, + &config); + if (IS_ERR(regl->rdev)) { + dev_err(&pdev->dev, + "Failed to register %s regulator\n", + regl->desc.name); + return PTR_ERR(regl->rdev); + } + id++; + n++; + } + + /* LDOs overcurrent event support */ + irq = platform_get_irq_byname(pdev, "LDO_LIM"); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(&pdev->dev, irq, + NULL, da9063_ldo_lim_event, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "LDO_LIM", regulators); + if (ret) + dev_err(&pdev->dev, "Failed to request LDO_LIM IRQ.\n"); + + return ret; +} + +static struct platform_driver da9063_regulator_driver = { + .driver = { + .name = DA9063_DRVNAME_REGULATORS, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = da9063_regulator_probe, +}; + +static int __init da9063_regulator_init(void) +{ + return platform_driver_register(&da9063_regulator_driver); +} +subsys_initcall(da9063_regulator_init); + +static void __exit da9063_regulator_cleanup(void) +{ + platform_driver_unregister(&da9063_regulator_driver); +} +module_exit(da9063_regulator_cleanup); + + +/* Module information */ +MODULE_AUTHOR("Krystian Garbaciak "); +MODULE_DESCRIPTION("DA9063 regulators driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DA9063_DRVNAME_REGULATORS); diff --git a/drivers/regulator/da9121-regulator.c b/drivers/regulator/da9121-regulator.c new file mode 100644 index 000000000..f501cf815 --- /dev/null +++ b/drivers/regulator/da9121-regulator.c @@ -0,0 +1,1225 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// DA9121 Single-channel dual-phase 10A buck converter +// +// Copyright (C) 2020 Axis Communications AB +// +// DA9130 Single-channel dual-phase 10A buck converter (Automotive) +// DA9217 Single-channel dual-phase 6A buck converter +// DA9122 Dual-channel single-phase 5A buck converter +// DA9131 Dual-channel single-phase 5A buck converter (Automotive) +// DA9220 Dual-channel single-phase 3A buck converter +// DA9132 Dual-channel single-phase 3A buck converter (Automotive) +// +// Copyright (C) 2020 Dialog Semiconductor + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "da9121-regulator.h" + +/* Chip data */ +struct da9121 { + struct device *dev; + struct delayed_work work; + struct da9121_pdata *pdata; + struct regmap *regmap; + struct regulator_dev *rdev[DA9121_IDX_MAX]; + unsigned int persistent[2]; + unsigned int passive_delay; + int chip_irq; + int variant_id; + int subvariant_id; +}; + +/* Define ranges for different variants, enabling translation to/from + * registers. Maximums give scope to allow for transients. + */ +struct da9121_range { + int val_min; + int val_max; + int val_stp; + int reg_min; + int reg_max; +}; + +static const struct da9121_range da9121_10A_2phase_current = { + .val_min = 7000000, + .val_max = 20000000, + .val_stp = 1000000, + .reg_min = 1, + .reg_max = 14, +}; + +static const struct da9121_range da9121_6A_2phase_current = { + .val_min = 7000000, + .val_max = 12000000, + .val_stp = 1000000, + .reg_min = 1, + .reg_max = 6, +}; + +static const struct da9121_range da9121_5A_1phase_current = { + .val_min = 3500000, + .val_max = 10000000, + .val_stp = 500000, + .reg_min = 1, + .reg_max = 14, +}; + +static const struct da9121_range da9121_3A_1phase_current = { + .val_min = 3500000, + .val_max = 6000000, + .val_stp = 500000, + .reg_min = 1, + .reg_max = 6, +}; + +static const struct da9121_range da914x_40A_4phase_current = { + .val_min = 26000000, + .val_max = 78000000, + .val_stp = 4000000, + .reg_min = 1, + .reg_max = 14, +}; + +static const struct da9121_range da914x_20A_2phase_current = { + .val_min = 13000000, + .val_max = 39000000, + .val_stp = 2000000, + .reg_min = 1, + .reg_max = 14, +}; + +struct da9121_variant_info { + int num_bucks; + int num_phases; + const struct da9121_range *current_range; +}; + +static const struct da9121_variant_info variant_parameters[] = { + { 1, 2, &da9121_10A_2phase_current }, //DA9121_TYPE_DA9121_DA9130 + { 2, 1, &da9121_3A_1phase_current }, //DA9121_TYPE_DA9220_DA9132 + { 2, 1, &da9121_5A_1phase_current }, //DA9121_TYPE_DA9122_DA9131 + { 1, 2, &da9121_6A_2phase_current }, //DA9121_TYPE_DA9217 + { 1, 4, &da914x_40A_4phase_current }, //DA9121_TYPE_DA9141 + { 1, 2, &da914x_20A_2phase_current }, //DA9121_TYPE_DA9142 +}; + +struct da9121_field { + unsigned int reg; + unsigned int msk; +}; + +static const struct da9121_field da9121_current_field[2] = { + { DA9121_REG_BUCK_BUCK1_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM }, + { DA9xxx_REG_BUCK_BUCK2_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM }, +}; + +static const struct da9121_field da9121_mode_field[2] = { + { DA9121_REG_BUCK_BUCK1_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE }, + { DA9xxx_REG_BUCK_BUCK2_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE }, +}; + +struct status_event_data { + int buck_id; /* 0=core, 1/2-buck */ + int reg_index; /* index for status/event/mask register selection */ + int status_bit; /* bit masks... */ + int event_bit; + int mask_bit; + unsigned long notification; /* Notification for status inception */ + char *warn; /* if NULL, notify - otherwise dev_warn this string */ +}; + +#define DA9121_STATUS(id, bank, name, notification, warning) \ + { id, bank, \ + DA9121_MASK_SYS_STATUS_##bank##_##name, \ + DA9121_MASK_SYS_EVENT_##bank##_E_##name, \ + DA9121_MASK_SYS_MASK_##bank##_M_##name, \ + notification, warning } + +/* For second buck related event bits that are specific to DA9122, DA9220 variants */ +#define DA9xxx_STATUS(id, bank, name, notification, warning) \ + { id, bank, \ + DA9xxx_MASK_SYS_STATUS_##bank##_##name, \ + DA9xxx_MASK_SYS_EVENT_##bank##_E_##name, \ + DA9xxx_MASK_SYS_MASK_##bank##_M_##name, \ + notification, warning } + +/* The status signals that may need servicing, depending on device variant. + * After assertion, they persist; so event is notified, the IRQ disabled, + * and status polled until clear again and IRQ is reenabled. + * + * SG/PG1/PG2 should be set when device first powers up and should never + * re-occur. When this driver starts, it is expected that these will have + * self-cleared for when the IRQs are enabled, so these should never be seen. + * If seen, the implication is that the device has reset. + * + * GPIO0/1/2 are not configured for use by default, so should not be seen. + */ +static const struct status_event_data status_event_handling[] = { + DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"), + DA9121_STATUS(0, 0, TEMP_CRIT, (REGULATOR_EVENT_OVER_TEMP|REGULATOR_EVENT_DISABLE), NULL), + DA9121_STATUS(0, 0, TEMP_WARN, REGULATOR_EVENT_OVER_TEMP, NULL), + DA9121_STATUS(1, 1, PG1, 0, "Handled E_PG1\n"), + DA9121_STATUS(1, 1, OV1, REGULATOR_EVENT_REGULATION_OUT, NULL), + DA9121_STATUS(1, 1, UV1, REGULATOR_EVENT_UNDER_VOLTAGE, NULL), + DA9121_STATUS(1, 1, OC1, REGULATOR_EVENT_OVER_CURRENT, NULL), + DA9xxx_STATUS(2, 1, PG2, 0, "Handled E_PG2\n"), + DA9xxx_STATUS(2, 1, OV2, REGULATOR_EVENT_REGULATION_OUT, NULL), + DA9xxx_STATUS(2, 1, UV2, REGULATOR_EVENT_UNDER_VOLTAGE, NULL), + DA9xxx_STATUS(2, 1, OC2, REGULATOR_EVENT_OVER_CURRENT, NULL), + DA9121_STATUS(0, 2, GPIO0, 0, "Handled E_GPIO0\n"), + DA9121_STATUS(0, 2, GPIO1, 0, "Handled E_GPIO1\n"), + DA9121_STATUS(0, 2, GPIO2, 0, "Handled E_GPIO2\n"), +}; + +static int da9121_get_current_limit(struct regulator_dev *rdev) +{ + struct da9121 *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + const struct da9121_range *range = + variant_parameters[chip->variant_id].current_range; + unsigned int val = 0; + int ret = 0; + + ret = regmap_read(chip->regmap, da9121_current_field[id].reg, &val); + if (ret < 0) { + dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret); + goto error; + } + + if (val < range->reg_min) { + ret = -EACCES; + goto error; + } + + if (val > range->reg_max) { + ret = -EINVAL; + goto error; + } + + return range->val_min + (range->val_stp * (val - range->reg_min)); +error: + return ret; +} + +static int da9121_ceiling_selector(struct regulator_dev *rdev, + int min, int max, + unsigned int *selector) +{ + struct da9121 *chip = rdev_get_drvdata(rdev); + const struct da9121_range *range = + variant_parameters[chip->variant_id].current_range; + unsigned int level; + unsigned int i = 0; + unsigned int sel = 0; + int ret = 0; + + if (range->val_min > max || range->val_max < min) { + dev_err(chip->dev, + "Requested current out of regulator capability\n"); + ret = -EINVAL; + goto error; + } + + level = range->val_max; + for (i = range->reg_max; i >= range->reg_min; i--) { + if (level <= max) { + sel = i; + break; + } + level -= range->val_stp; + } + + if (level < min) { + dev_err(chip->dev, + "Best match falls below minimum requested current\n"); + ret = -EINVAL; + goto error; + } + + *selector = sel; +error: + return ret; +} + +static int da9121_set_current_limit(struct regulator_dev *rdev, + int min_ua, int max_ua) +{ + struct da9121 *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + const struct da9121_range *range = + variant_parameters[chip->variant_id].current_range; + unsigned int sel = 0; + int ret = 0; + + if (min_ua < range->val_min || + max_ua > range->val_max) { + ret = -EINVAL; + goto error; + } + + if (rdev->desc->ops->is_enabled(rdev)) { + ret = -EBUSY; + goto error; + } + + ret = da9121_ceiling_selector(rdev, min_ua, max_ua, &sel); + if (ret < 0) + goto error; + + ret = regmap_update_bits(chip->regmap, + da9121_current_field[id].reg, + da9121_current_field[id].msk, + (unsigned int)sel); + if (ret < 0) + dev_err(chip->dev, "Cannot update BUCK current limit, err: %d\n", ret); + +error: + return ret; +} + +static unsigned int da9121_map_mode(unsigned int mode) +{ + switch (mode) { + case DA9121_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case DA9121_BUCK_MODE_FORCE_PWM_SHEDDING: + return REGULATOR_MODE_NORMAL; + case DA9121_BUCK_MODE_AUTO: + return REGULATOR_MODE_IDLE; + case DA9121_BUCK_MODE_FORCE_PFM: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int da9121_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct da9121 *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = DA9121_BUCK_MODE_FORCE_PWM; + break; + case REGULATOR_MODE_NORMAL: + val = DA9121_BUCK_MODE_FORCE_PWM_SHEDDING; + break; + case REGULATOR_MODE_IDLE: + val = DA9121_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = DA9121_BUCK_MODE_FORCE_PFM; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(chip->regmap, + da9121_mode_field[id].reg, + da9121_mode_field[id].msk, + val); +} + +static unsigned int da9121_buck_get_mode(struct regulator_dev *rdev) +{ + struct da9121 *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + unsigned int val, mode; + int ret = 0; + + ret = regmap_read(chip->regmap, da9121_mode_field[id].reg, &val); + if (ret < 0) { + dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret); + return -EINVAL; + } + + mode = da9121_map_mode(val & da9121_mode_field[id].msk); + if (mode == REGULATOR_MODE_INVALID) + return -EINVAL; + + return mode; +} + +static const struct regulator_ops da9121_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_current_limit = da9121_get_current_limit, + .set_current_limit = da9121_set_current_limit, + .set_mode = da9121_buck_set_mode, + .get_mode = da9121_buck_get_mode, +}; + +static struct of_regulator_match da9121_matches[] = { + [DA9121_IDX_BUCK1] = { .name = "buck1" }, + [DA9121_IDX_BUCK2] = { .name = "buck2" }, +}; + +static int da9121_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct da9121 *chip = config->driver_data; + struct da9121_pdata *pdata; + struct gpio_desc *ena_gpiod; + + if (chip->pdata == NULL) { + pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + } else { + pdata = chip->pdata; + } + + pdata->num_buck++; + + if (pdata->num_buck > variant_parameters[chip->variant_id].num_bucks) { + dev_err(chip->dev, "Error: excessive regulators for device\n"); + return -ENODEV; + } + + ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0, + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE, + "da9121-enable"); + if (!IS_ERR(ena_gpiod)) { + if (of_property_read_bool(chip->dev->of_node, "dlg,no-gpio-control")) { + gpiod_put(ena_gpiod); + dev_err(chip->dev, "dlg,no-gpio-control conflicts with enable-gpios\n"); + return -EINVAL; + } + config->ena_gpiod = ena_gpiod; + } + + if (variant_parameters[chip->variant_id].num_bucks == 2) { + uint32_t ripple_cancel; + uint32_t ripple_reg; + int ret; + + if (of_property_read_u32(da9121_matches[pdata->num_buck-1].of_node, + "dlg,ripple-cancel", &ripple_cancel)) { + if (pdata->num_buck > 1) + ripple_reg = DA9xxx_REG_BUCK_BUCK2_7; + else + ripple_reg = DA9121_REG_BUCK_BUCK1_7; + + ret = regmap_update_bits(chip->regmap, ripple_reg, + DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL, + ripple_cancel); + if (ret < 0) + dev_err(chip->dev, "Cannot set ripple mode, err: %d\n", ret); + } + } + + return 0; +} + +#define DA9121_MIN_MV 300 +#define DA9121_MAX_MV 1900 +#define DA9121_STEP_MV 10 +#define DA9121_MIN_SEL (DA9121_MIN_MV / DA9121_STEP_MV) +#define DA9121_N_VOLTAGES (((DA9121_MAX_MV - DA9121_MIN_MV) / DA9121_STEP_MV) \ + + 1 + DA9121_MIN_SEL) + +static const struct regulator_desc da9121_reg = { + .id = DA9121_IDX_BUCK1, + .name = "da9121", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + /* Default value of BUCK_BUCK1_0.CH1_SRC_DVC_UP */ + .ramp_delay = 20000, + /* tBUCK_EN */ + .enable_time = 20, +}; + +static const struct regulator_desc da9220_reg[2] = { + { + .id = DA9121_IDX_BUCK1, + .name = "DA9220/DA9132 BUCK1", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + }, + { + .id = DA9121_IDX_BUCK2, + .name = "DA9220/DA9132 BUCK2", + .of_match = "buck2", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .enable_reg = DA9xxx_REG_BUCK_BUCK2_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + } +}; + +static const struct regulator_desc da9122_reg[2] = { + { + .id = DA9121_IDX_BUCK1, + .name = "DA9122/DA9131 BUCK1", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + }, + { + .id = DA9121_IDX_BUCK2, + .name = "DA9122/DA9131 BUCK2", + .of_match = "buck2", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .enable_reg = DA9xxx_REG_BUCK_BUCK2_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + } +}; + +static const struct regulator_desc da9217_reg = { + .id = DA9121_IDX_BUCK1, + .name = "DA9217 BUCK1", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA9121_N_VOLTAGES, + .min_uV = DA9121_MIN_MV * 1000, + .uV_step = DA9121_STEP_MV * 1000, + .linear_min_sel = DA9121_MIN_SEL, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, +}; + +#define DA914X_MIN_MV 500 +#define DA914X_MAX_MV 1300 +#define DA914X_STEP_MV 10 +#define DA914X_MIN_SEL (DA914X_MIN_MV / DA914X_STEP_MV) +#define DA914X_N_VOLTAGES (((DA914X_MAX_MV - DA914X_MIN_MV) / DA914X_STEP_MV) \ + + 1 + DA914X_MIN_SEL) + +static const struct regulator_desc da9141_reg = { + .id = DA9121_IDX_BUCK1, + .name = "DA9141", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA914X_N_VOLTAGES, + .min_uV = DA914X_MIN_MV * 1000, + .uV_step = DA914X_STEP_MV * 1000, + .linear_min_sel = DA914X_MIN_SEL, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, +}; + +static const struct regulator_desc da9142_reg = { + .id = DA9121_IDX_BUCK1, + .name = "DA9142 BUCK1", + .of_match = "buck1", + .of_parse_cb = da9121_of_parse_cb, + .owner = THIS_MODULE, + .regulators_node = "regulators", + .of_map_mode = da9121_map_mode, + .ops = &da9121_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = DA914X_N_VOLTAGES, + .min_uV = DA914X_MIN_MV * 1000, + .uV_step = DA914X_STEP_MV * 1000, + .linear_min_sel = DA914X_MIN_SEL, + .enable_reg = DA9121_REG_BUCK_BUCK1_0, + .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN, + .vsel_reg = DA9121_REG_BUCK_BUCK1_5, + .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT, +}; + + +static const struct regulator_desc *local_da9121_regulators[][DA9121_IDX_MAX] = { + [DA9121_TYPE_DA9121_DA9130] = { &da9121_reg, NULL }, + [DA9121_TYPE_DA9220_DA9132] = { &da9220_reg[0], &da9220_reg[1] }, + [DA9121_TYPE_DA9122_DA9131] = { &da9122_reg[0], &da9122_reg[1] }, + [DA9121_TYPE_DA9217] = { &da9217_reg, NULL }, + [DA9121_TYPE_DA9141] = { &da9141_reg, NULL }, + [DA9121_TYPE_DA9142] = { &da9142_reg, NULL }, +}; + +static void da9121_status_poll_on(struct work_struct *work) +{ + struct da9121 *chip = container_of(work, struct da9121, work.work); + int status[3] = {0}; + int clear[3] = {0}; + unsigned long delay; + int i; + int ret; + + ret = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_STATUS_0, status, 2); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read STATUS registers: %d\n", ret); + goto error; + } + + /* Possible events are tested to be within range for the variant, potentially + * masked by the IRQ handler (not just warned about), as having been masked, + * and the respective state cleared - then flagged to unmask for next IRQ. + */ + for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) { + const struct status_event_data *item = &status_event_handling[i]; + int reg_idx = item->reg_index; + bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks); + bool supported = (item->warn == NULL); + bool persisting = (chip->persistent[reg_idx] & item->event_bit); + bool now_cleared = !(status[reg_idx] & item->status_bit); + + if (relevant && supported && persisting && now_cleared) { + clear[reg_idx] |= item->mask_bit; + chip->persistent[reg_idx] &= ~item->event_bit; + } + } + + for (i = 0; i < 2; i++) { + if (clear[i]) { + unsigned int reg = DA9121_REG_SYS_MASK_0 + i; + unsigned int mbit = clear[i]; + + ret = regmap_update_bits(chip->regmap, reg, mbit, 0); + if (ret < 0) { + dev_err(chip->dev, + "Failed to unmask 0x%02x %d\n", + reg, ret); + goto error; + } + } + } + + if (chip->persistent[0] | chip->persistent[1]) { + delay = msecs_to_jiffies(chip->passive_delay); + queue_delayed_work(system_freezable_wq, &chip->work, delay); + } + +error: + return; +} + +static irqreturn_t da9121_irq_handler(int irq, void *data) +{ + struct da9121 *chip = data; + struct regulator_dev *rdev; + int event[3] = {0}; + int handled[3] = {0}; + int mask[3] = {0}; + int ret = IRQ_NONE; + int i; + int err; + + err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_EVENT_0, event, 3); + if (err < 0) { + dev_err(chip->dev, "Failed to read EVENT registers %d\n", err); + ret = IRQ_NONE; + goto error; + } + + err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_MASK_0, mask, 3); + if (err < 0) { + dev_err(chip->dev, + "Failed to read MASK registers: %d\n", ret); + ret = IRQ_NONE; + goto error; + } + + rdev = chip->rdev[DA9121_IDX_BUCK1]; + + /* Possible events are tested to be within range for the variant, currently + * enabled, and having triggered this IRQ. The event may then be notified, + * or a warning given for unexpected events - those from device POR, and + * currently unsupported GPIO configurations. + */ + for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) { + const struct status_event_data *item = &status_event_handling[i]; + int reg_idx = item->reg_index; + bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks); + bool enabled = !(mask[reg_idx] & item->mask_bit); + bool active = (event[reg_idx] & item->event_bit); + bool notify = (item->warn == NULL); + + if (relevant && enabled && active) { + if (notify) { + chip->persistent[reg_idx] |= item->event_bit; + regulator_notifier_call_chain(rdev, item->notification, NULL); + } else { + dev_warn(chip->dev, item->warn); + handled[reg_idx] |= item->event_bit; + ret = IRQ_HANDLED; + } + } + } + + for (i = 0; i < 3; i++) { + if (event[i] != handled[i]) { + dev_warn(chip->dev, + "Unhandled event(s) in bank%d 0x%02x\n", i, + event[i] ^ handled[i]); + } + } + + /* Mask the interrupts for persistent events OV, OC, UV, WARN, CRIT */ + for (i = 0; i < 2; i++) { + if (handled[i]) { + unsigned int reg = DA9121_REG_SYS_MASK_0 + i; + unsigned int mbit = handled[i]; + + err = regmap_update_bits(chip->regmap, reg, mbit, mbit); + if (err < 0) { + dev_err(chip->dev, + "Failed to mask 0x%02x interrupt %d\n", + reg, err); + ret = IRQ_NONE; + goto error; + } + } + } + + /* clear the events */ + if (handled[0] | handled[1] | handled[2]) { + err = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_EVENT_0, handled, 3); + if (err < 0) { + dev_err(chip->dev, "Fail to write EVENTs %d\n", err); + ret = IRQ_NONE; + goto error; + } + } + + queue_delayed_work(system_freezable_wq, &chip->work, 0); +error: + return ret; +} + +static int da9121_set_regulator_config(struct da9121 *chip) +{ + struct regulator_config config = { }; + unsigned int max_matches = variant_parameters[chip->variant_id].num_bucks; + int ret = 0; + int i; + + for (i = 0; i < max_matches; i++) { + const struct regulator_desc *regl_desc = + local_da9121_regulators[chip->variant_id][i]; + + config.dev = chip->dev; + config.driver_data = chip; + config.regmap = chip->regmap; + + chip->rdev[i] = devm_regulator_register(chip->dev, + regl_desc, &config); + if (IS_ERR(chip->rdev[i])) { + dev_err(chip->dev, "Failed to register regulator %s, %d/%d\n", + regl_desc->name, (i+1), max_matches); + ret = PTR_ERR(chip->rdev[i]); + goto error; + } + } + +error: + return ret; +} + +/* DA9121 chip register model */ +static const struct regmap_range da9121_1ch_readable_ranges[] = { + regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3), + regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6), + regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID), +}; + +static const struct regmap_access_table da9121_1ch_readable_table = { + .yes_ranges = da9121_1ch_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9121_1ch_readable_ranges), +}; + +static const struct regmap_range da9121_2ch_readable_ranges[] = { + regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3), + regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_7), + regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_7), + regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID), +}; + +static const struct regmap_access_table da9121_2ch_readable_table = { + .yes_ranges = da9121_2ch_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9121_2ch_readable_ranges), +}; + +static const struct regmap_range da9121_1ch_writeable_ranges[] = { + regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3), + regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_6), +}; + +static const struct regmap_access_table da9121_1ch_writeable_table = { + .yes_ranges = da9121_1ch_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9121_1ch_writeable_ranges), +}; + +static const struct regmap_range da9121_2ch_writeable_ranges[] = { + regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3), + regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_7), + regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_2), + regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_4, DA9xxx_REG_BUCK_BUCK2_7), +}; + +static const struct regmap_access_table da9121_2ch_writeable_table = { + .yes_ranges = da9121_2ch_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9121_2ch_writeable_ranges), +}; + + +static const struct regmap_range da9121_volatile_ranges[] = { + regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), + regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6), +}; + +static const struct regmap_access_table da9121_volatile_table = { + .yes_ranges = da9121_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges), +}; + +/* + * When GPIO functions DVC/RELOAD/EN are not used, the registers in the range + * DA9121_REG_BUCK_BUCK1_0 to DA9121_REG_BUCK_BUCK1_6 need not be volatile + * because register writes to these registers can only be performed via I2C. + */ +static const struct regmap_range da9121_volatile_ranges_no_gpio_ctrl[] = { + regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2), + regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1), +}; + +static const struct regmap_access_table da9121_volatile_table_no_gpio_ctrl = { + .yes_ranges = da9121_volatile_ranges_no_gpio_ctrl, + .n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges_no_gpio_ctrl), +}; + +/* DA9121 regmap config for 1 channel variants */ +static const struct regmap_config da9121_1ch_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = DA9121_REG_OTP_CONFIG_ID, + .rd_table = &da9121_1ch_readable_table, + .wr_table = &da9121_1ch_writeable_table, + .volatile_table = &da9121_volatile_table, + .cache_type = REGCACHE_MAPLE, +}; + +/* DA9121 regmap config for 2 channel variants */ +static const struct regmap_config da9121_2ch_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = DA9121_REG_OTP_CONFIG_ID, + .rd_table = &da9121_2ch_readable_table, + .wr_table = &da9121_2ch_writeable_table, + .volatile_table = &da9121_volatile_table, + .cache_type = REGCACHE_MAPLE, +}; + +static int da9121_check_device_type(struct i2c_client *i2c, struct da9121 *chip) +{ + u32 device_id; + u32 variant_id; + u8 variant_mrc, variant_vrc; + char *type; + bool config_match = false; + int ret = 0; + + ret = regmap_read(chip->regmap, DA9121_REG_OTP_DEVICE_ID, &device_id); + if (ret < 0) { + dev_err(chip->dev, "Cannot read device ID: %d\n", ret); + goto error; + } + + ret = regmap_read(chip->regmap, DA9121_REG_OTP_VARIANT_ID, &variant_id); + if (ret < 0) { + dev_err(chip->dev, "Cannot read variant ID: %d\n", ret); + goto error; + } + + if ((device_id != DA9121_DEVICE_ID) && (device_id != DA914x_DEVICE_ID)) { + dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id); + ret = -ENODEV; + goto error; + } + + variant_vrc = variant_id & DA9121_MASK_OTP_VARIANT_ID_VRC; + + switch (chip->subvariant_id) { + case DA9121_SUBTYPE_DA9121: + type = "DA9121"; + config_match = (variant_vrc == DA9121_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9130: + type = "DA9130"; + config_match = (variant_vrc == DA9130_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9220: + type = "DA9220"; + config_match = (variant_vrc == DA9220_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9132: + type = "DA9132"; + config_match = (variant_vrc == DA9132_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9122: + type = "DA9122"; + config_match = (variant_vrc == DA9122_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9131: + type = "DA9131"; + config_match = (variant_vrc == DA9131_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9217: + type = "DA9217"; + config_match = (variant_vrc == DA9217_VARIANT_VRC); + break; + default: + type = "Unknown"; + break; + } + + if (device_id == DA914x_DEVICE_ID) { + switch (chip->subvariant_id) { + case DA9121_SUBTYPE_DA9141: + type = "DA9141"; + config_match = (variant_vrc == DA9141_VARIANT_VRC); + break; + case DA9121_SUBTYPE_DA9142: + type = "DA9142"; + config_match = (variant_vrc == DA9142_VARIANT_VRC); + break; + default: + type = "Unknown"; + break; + } + } + + dev_info(chip->dev, + "Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n", + device_id, variant_id, type); + + if (!config_match) { + dev_err(chip->dev, "Device tree configuration does not match detected device.\n"); + ret = -EINVAL; + goto error; + } + + variant_mrc = (variant_id & DA9121_MASK_OTP_VARIANT_ID_MRC) + >> DA9121_SHIFT_OTP_VARIANT_ID_MRC; + + if (((device_id == DA9121_DEVICE_ID) && + (variant_mrc < DA9121_VARIANT_MRC_BASE)) || + ((device_id == DA914x_DEVICE_ID) && + (variant_mrc != DA914x_VARIANT_MRC_BASE))) { + dev_err(chip->dev, + "Cannot support variant MRC: 0x%02X\n", variant_mrc); + ret = -EINVAL; + } +error: + return ret; +} + +static int da9121_assign_chip_model(struct i2c_client *i2c, + struct da9121 *chip) +{ + const struct regmap_config *regmap; + struct regmap_config regmap_config_1ch = da9121_1ch_regmap_config; + struct regmap_config regmap_config_2ch = da9121_2ch_regmap_config; + + int ret = 0; + + chip->dev = &i2c->dev; + + if (of_property_read_bool(i2c->dev.of_node, "dlg,no-gpio-control")) { + regmap_config_1ch.volatile_table = &da9121_volatile_table_no_gpio_ctrl; + regmap_config_2ch.volatile_table = &da9121_volatile_table_no_gpio_ctrl; + } + + /* Use configured subtype to select the regulator descriptor index and + * register map, common to both consumer and automotive grade variants + */ + switch (chip->subvariant_id) { + case DA9121_SUBTYPE_DA9121: + case DA9121_SUBTYPE_DA9130: + chip->variant_id = DA9121_TYPE_DA9121_DA9130; + regmap = ®map_config_1ch; + break; + case DA9121_SUBTYPE_DA9217: + chip->variant_id = DA9121_TYPE_DA9217; + regmap = ®map_config_1ch; + break; + case DA9121_SUBTYPE_DA9122: + case DA9121_SUBTYPE_DA9131: + chip->variant_id = DA9121_TYPE_DA9122_DA9131; + regmap = ®map_config_2ch; + break; + case DA9121_SUBTYPE_DA9220: + case DA9121_SUBTYPE_DA9132: + chip->variant_id = DA9121_TYPE_DA9220_DA9132; + regmap = ®map_config_2ch; + break; + case DA9121_SUBTYPE_DA9141: + chip->variant_id = DA9121_TYPE_DA9141; + regmap = ®map_config_1ch; + break; + case DA9121_SUBTYPE_DA9142: + chip->variant_id = DA9121_TYPE_DA9142; + regmap = ®map_config_2ch; + break; + default: + return -EINVAL; + } + + /* Set these up for of_regulator_match call which may want .of_map_modes */ + da9121_matches[0].desc = local_da9121_regulators[chip->variant_id][0]; + da9121_matches[1].desc = local_da9121_regulators[chip->variant_id][1]; + + chip->regmap = devm_regmap_init_i2c(i2c, regmap); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to configure a register map: %d\n", + ret); + return ret; + } + + ret = da9121_check_device_type(i2c, chip); + + return ret; +} + +static int da9121_config_irq(struct i2c_client *i2c, + struct da9121 *chip) +{ + unsigned int p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS; + const int mask_all[4] = { 0, 0, 0xFF, 0xFF }; + int ret = 0; + + chip->chip_irq = i2c->irq; + + if (chip->chip_irq != 0) { + if (!of_property_read_u32(chip->dev->of_node, + "dlg,irq-polling-delay-passive-ms", + &p_delay)) { + if (p_delay < DA9121_MIN_POLLING_PERIOD_MS || + p_delay > DA9121_MAX_POLLING_PERIOD_MS) { + dev_warn(chip->dev, + "Out-of-range polling period %d ms\n", + p_delay); + p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS; + } + } + + chip->passive_delay = p_delay; + + ret = request_threaded_irq(chip->chip_irq, NULL, + da9121_irq_handler, + IRQF_TRIGGER_LOW|IRQF_ONESHOT, + "da9121", chip); + if (ret != 0) { + dev_err(chip->dev, "Failed IRQ request: %d\n", + chip->chip_irq); + goto error; + } + + ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4); + if (ret != 0) { + dev_err(chip->dev, "Failed to set IRQ masks: %d\n", + ret); + goto regmap_error; + } + + INIT_DELAYED_WORK(&chip->work, da9121_status_poll_on); + dev_info(chip->dev, "Interrupt polling period set at %d ms\n", + chip->passive_delay); + } +error: + return ret; +regmap_error: + free_irq(chip->chip_irq, chip); + return ret; +} + +static const struct of_device_id da9121_dt_ids[] = { + { .compatible = "dlg,da9121", .data = (void *) DA9121_SUBTYPE_DA9121 }, + { .compatible = "dlg,da9130", .data = (void *) DA9121_SUBTYPE_DA9130 }, + { .compatible = "dlg,da9217", .data = (void *) DA9121_SUBTYPE_DA9217 }, + { .compatible = "dlg,da9122", .data = (void *) DA9121_SUBTYPE_DA9122 }, + { .compatible = "dlg,da9131", .data = (void *) DA9121_SUBTYPE_DA9131 }, + { .compatible = "dlg,da9220", .data = (void *) DA9121_SUBTYPE_DA9220 }, + { .compatible = "dlg,da9132", .data = (void *) DA9121_SUBTYPE_DA9132 }, + { .compatible = "dlg,da9141", .data = (void *) DA9121_SUBTYPE_DA9141 }, + { .compatible = "dlg,da9142", .data = (void *) DA9121_SUBTYPE_DA9142 }, + { } +}; +MODULE_DEVICE_TABLE(of, da9121_dt_ids); + +static int da9121_i2c_probe(struct i2c_client *i2c) +{ + struct da9121 *chip; + const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF }; + int ret = 0; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct da9121), GFP_KERNEL); + if (!chip) { + ret = -ENOMEM; + goto error; + } + + chip->pdata = i2c->dev.platform_data; + chip->subvariant_id = (kernel_ulong_t)i2c_get_match_data(i2c); + + ret = da9121_assign_chip_model(i2c, chip); + if (ret < 0) + goto error; + + ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4); + if (ret != 0) { + dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret); + goto error; + } + + ret = da9121_set_regulator_config(chip); + if (ret < 0) + goto error; + + ret = da9121_config_irq(i2c, chip); + +error: + return ret; +} + +static void da9121_i2c_remove(struct i2c_client *i2c) +{ + struct da9121 *chip = i2c_get_clientdata(i2c); + const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF }; + int ret; + + free_irq(chip->chip_irq, chip); + cancel_delayed_work_sync(&chip->work); + + ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4); + if (ret != 0) + dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret); +} + +static const struct i2c_device_id da9121_i2c_id[] = { + { .name = "da9121", .driver_data = DA9121_SUBTYPE_DA9121 }, + { .name = "da9130", .driver_data = DA9121_SUBTYPE_DA9130 }, + { .name = "da9217", .driver_data = DA9121_SUBTYPE_DA9217 }, + { .name = "da9122", .driver_data = DA9121_SUBTYPE_DA9122 }, + { .name = "da9131", .driver_data = DA9121_SUBTYPE_DA9131 }, + { .name = "da9220", .driver_data = DA9121_SUBTYPE_DA9220 }, + { .name = "da9132", .driver_data = DA9121_SUBTYPE_DA9132 }, + { .name = "da9141", .driver_data = DA9121_SUBTYPE_DA9141 }, + { .name = "da9142", .driver_data = DA9121_SUBTYPE_DA9142 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, da9121_i2c_id); + +static struct i2c_driver da9121_regulator_driver = { + .driver = { + .name = "da9121", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = da9121_dt_ids, + }, + .probe = da9121_i2c_probe, + .remove = da9121_i2c_remove, + .id_table = da9121_i2c_id, +}; + +module_i2c_driver(da9121_regulator_driver); + +MODULE_DESCRIPTION("Dialog Semiconductor DA9121/DA9122/DA9220/DA9217/DA9130/DA9131/DA9132 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/da9121-regulator.h b/drivers/regulator/da9121-regulator.h new file mode 100644 index 000000000..a328a0bdf --- /dev/null +++ b/drivers/regulator/da9121-regulator.h @@ -0,0 +1,321 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * DA9121 Single-channel dual-phase 10A buck converter + * DA9130 Single-channel dual-phase 10A buck converter (Automotive) + * DA9217 Single-channel dual-phase 6A buck converter + * DA9122 Dual-channel single-phase 5A buck converter + * DA9131 Dual-channel single-phase 5A buck converter (Automotive) + * DA9220 Dual-channel single-phase 3A buck converter + * DA9132 Dual-channel single-phase 3A buck converter (Automotive) + * + * Copyright (C) 2020 Dialog Semiconductor + * + * Authors: Steve Twiss, Dialog Semiconductor + * Adam Ward, Dialog Semiconductor + */ + +#ifndef __DA9121_REGISTERS_H__ +#define __DA9121_REGISTERS_H__ + +/* Values for: DA9121_REG_BUCK_BUCKx_4 registers, fields CHx_y_MODE + * DA9121_REG_BUCK_BUCKx_7 registers, fields CHx_RIPPLE_CANCEL + */ +#include + +enum da9121_variant { + DA9121_TYPE_DA9121_DA9130, + DA9121_TYPE_DA9220_DA9132, + DA9121_TYPE_DA9122_DA9131, + DA9121_TYPE_DA9217, + DA9121_TYPE_DA9141, + DA9121_TYPE_DA9142 +}; + +enum da9121_subvariant { + DA9121_SUBTYPE_DA9121, + DA9121_SUBTYPE_DA9130, + DA9121_SUBTYPE_DA9220, + DA9121_SUBTYPE_DA9132, + DA9121_SUBTYPE_DA9122, + DA9121_SUBTYPE_DA9131, + DA9121_SUBTYPE_DA9217, + DA9121_SUBTYPE_DA9141, + DA9121_SUBTYPE_DA9142 +}; + +/* Minimum, maximum and default polling millisecond periods are provided + * here as an example. It is expected that any final implementation will + * include a modification of these settings to match the required + * application. + */ +#define DA9121_DEFAULT_POLLING_PERIOD_MS 3000 +#define DA9121_MAX_POLLING_PERIOD_MS 10000 +#define DA9121_MIN_POLLING_PERIOD_MS 1000 + +/* Registers */ + +#define DA9121_REG_SYS_STATUS_0 0x01 +#define DA9121_REG_SYS_STATUS_1 0x02 +#define DA9121_REG_SYS_STATUS_2 0x03 +#define DA9121_REG_SYS_EVENT_0 0x04 +#define DA9121_REG_SYS_EVENT_1 0x05 +#define DA9121_REG_SYS_EVENT_2 0x06 +#define DA9121_REG_SYS_MASK_0 0x07 +#define DA9121_REG_SYS_MASK_1 0x08 +#define DA9121_REG_SYS_MASK_2 0x09 +#define DA9121_REG_SYS_MASK_3 0x0A +#define DA9121_REG_SYS_CONFIG_0 0x0B +#define DA9121_REG_SYS_CONFIG_1 0x0C +#define DA9121_REG_SYS_CONFIG_2 0x0D +#define DA9121_REG_SYS_CONFIG_3 0x0E +#define DA9121_REG_SYS_GPIO0_0 0x10 +#define DA9121_REG_SYS_GPIO0_1 0x11 +#define DA9121_REG_SYS_GPIO1_0 0x12 +#define DA9121_REG_SYS_GPIO1_1 0x13 +#define DA9121_REG_SYS_GPIO2_0 0x14 +#define DA9121_REG_SYS_GPIO2_1 0x15 +#define DA914x_REG_SYS_GPIO3_0 0x16 +#define DA914x_REG_SYS_GPIO3_1 0x17 +#define DA914x_REG_SYS_GPIO4_0 0x18 +#define DA914x_REG_SYS_GPIO4_1 0x19 +#define DA914x_REG_SYS_ADMUX1_0 0x1A +#define DA914x_REG_SYS_ADMUX1_1 0x1B +#define DA914x_REG_SYS_ADMUX2_0 0x1C +#define DA914x_REG_SYS_ADMUX2_1 0x1D +#define DA9121_REG_BUCK_BUCK1_0 0x20 +#define DA9121_REG_BUCK_BUCK1_1 0x21 +#define DA9121_REG_BUCK_BUCK1_2 0x22 +#define DA9121_REG_BUCK_BUCK1_3 0x23 +#define DA9121_REG_BUCK_BUCK1_4 0x24 +#define DA9121_REG_BUCK_BUCK1_5 0x25 +#define DA9121_REG_BUCK_BUCK1_6 0x26 +#define DA9121_REG_BUCK_BUCK1_7 0x27 +#define DA9xxx_REG_BUCK_BUCK2_0 0x28 +#define DA9xxx_REG_BUCK_BUCK2_1 0x29 +#define DA9xxx_REG_BUCK_BUCK2_2 0x2A +#define DA9xxx_REG_BUCK_BUCK2_3 0x2B +#define DA9xxx_REG_BUCK_BUCK2_4 0x2C +#define DA9xxx_REG_BUCK_BUCK2_5 0x2D +#define DA9xxx_REG_BUCK_BUCK2_6 0x2E +#define DA9xxx_REG_BUCK_BUCK2_7 0x2F +#define DA9121_REG_OTP_DEVICE_ID 0x48 +#define DA9121_REG_OTP_VARIANT_ID 0x49 +#define DA9121_REG_OTP_CUSTOMER_ID 0x4A +#define DA9121_REG_OTP_CONFIG_ID 0x4B + +/* Register bits */ + +/* DA9121_REG_SYS_STATUS_0 */ + +#define DA9xxx_MASK_SYS_STATUS_0_SG BIT(2) +#define DA9121_MASK_SYS_STATUS_0_TEMP_CRIT BIT(1) +#define DA9121_MASK_SYS_STATUS_0_TEMP_WARN BIT(0) + +/* DA9121_REG_SYS_STATUS_1 */ + +#define DA9xxx_MASK_SYS_STATUS_1_PG2 BIT(7) +#define DA9xxx_MASK_SYS_STATUS_1_OV2 BIT(6) +#define DA9xxx_MASK_SYS_STATUS_1_UV2 BIT(5) +#define DA9xxx_MASK_SYS_STATUS_1_OC2 BIT(4) +#define DA9121_MASK_SYS_STATUS_1_PG1 BIT(3) +#define DA9121_MASK_SYS_STATUS_1_OV1 BIT(2) +#define DA9121_MASK_SYS_STATUS_1_UV1 BIT(1) +#define DA9121_MASK_SYS_STATUS_1_OC1 BIT(0) + +/* DA9121_REG_SYS_STATUS_2 */ + +#define DA9121_MASK_SYS_STATUS_2_GPIO2 BIT(2) +#define DA9121_MASK_SYS_STATUS_2_GPIO1 BIT(1) +#define DA9121_MASK_SYS_STATUS_2_GPIO0 BIT(0) + +/* DA9121_REG_SYS_EVENT_0 */ + +#define DA9xxx_MASK_SYS_EVENT_0_E_SG BIT(2) +#define DA9121_MASK_SYS_EVENT_0_E_TEMP_CRIT BIT(1) +#define DA9121_MASK_SYS_EVENT_0_E_TEMP_WARN BIT(0) + +/* DA9121_REG_SYS_EVENT_1 */ + +#define DA9xxx_MASK_SYS_EVENT_1_E_PG2 BIT(7) +#define DA9xxx_MASK_SYS_EVENT_1_E_OV2 BIT(6) +#define DA9xxx_MASK_SYS_EVENT_1_E_UV2 BIT(5) +#define DA9xxx_MASK_SYS_EVENT_1_E_OC2 BIT(4) +#define DA9121_MASK_SYS_EVENT_1_E_PG1 BIT(3) +#define DA9121_MASK_SYS_EVENT_1_E_OV1 BIT(2) +#define DA9121_MASK_SYS_EVENT_1_E_UV1 BIT(1) +#define DA9121_MASK_SYS_EVENT_1_E_OC1 BIT(0) + +/* DA9121_REG_SYS_EVENT_2 */ + +#define DA9121_MASK_SYS_EVENT_2_E_GPIO2 BIT(2) +#define DA9121_MASK_SYS_EVENT_2_E_GPIO1 BIT(1) +#define DA9121_MASK_SYS_EVENT_2_E_GPIO0 BIT(0) + +/* DA9121_REG_SYS_MASK_0 */ + +#define DA9xxx_MASK_SYS_MASK_0_M_SG BIT(2) +#define DA9121_MASK_SYS_MASK_0_M_TEMP_CRIT BIT(1) +#define DA9121_MASK_SYS_MASK_0_M_TEMP_WARN BIT(0) + +/* DA9121_REG_SYS_MASK_1 */ + +#define DA9xxx_MASK_SYS_MASK_1_M_PG2 BIT(7) +#define DA9xxx_MASK_SYS_MASK_1_M_OV2 BIT(6) +#define DA9xxx_MASK_SYS_MASK_1_M_UV2 BIT(5) +#define DA9xxx_MASK_SYS_MASK_1_M_OC2 BIT(4) +#define DA9121_MASK_SYS_MASK_1_M_PG1 BIT(3) +#define DA9121_MASK_SYS_MASK_1_M_OV1 BIT(2) +#define DA9121_MASK_SYS_MASK_1_M_UV1 BIT(1) +#define DA9121_MASK_SYS_MASK_1_M_OC1 BIT(0) + +/* DA9121_REG_SYS_MASK_2 */ + +#define DA9121_MASK_SYS_MASK_2_M_GPIO2 BIT(2) +#define DA9121_MASK_SYS_MASK_2_M_GPIO1 BIT(1) +#define DA9121_MASK_SYS_MASK_2_M_GPIO0 BIT(0) + +/* DA9122_REG_SYS_MASK_3 */ + +#define DA9121_MASK_SYS_MASK_3_M_VR_HOT BIT(3) +#define DA9xxx_MASK_SYS_MASK_3_M_SG_STAT BIT(2) +#define DA9xxx_MASK_SYS_MASK_3_M_PG2_STAT BIT(1) +#define DA9121_MASK_SYS_MASK_3_M_PG1_STAT BIT(0) + +/* DA9121_REG_SYS_CONFIG_0 */ + +#define DA9121_MASK_SYS_CONFIG_0_CH1_DIS_DLY 0xF0 +#define DA9121_MASK_SYS_CONFIG_0_CH1_EN_DLY 0x0F + +/* DA9xxx_REG_SYS_CONFIG_1 */ + +#define DA9xxx_MASK_SYS_CONFIG_1_CH2_DIS_DLY 0xF0 +#define DA9xxx_MASK_SYS_CONFIG_1_CH2_EN_DLY 0x0F + +/* DA9121_REG_SYS_CONFIG_2 */ + +#define DA9121_MASK_SYS_CONFIG_2_OC_LATCHOFF 0x60 +#define DA9121_MASK_SYS_CONFIG_2_OC_DVC_MASK BIT(4) +#define DA9121_MASK_SYS_CONFIG_2_PG_DVC_MASK 0x0C + +/* DA9121_REG_SYS_CONFIG_3 */ + +#define DA9121_MASK_SYS_CONFIG_3_OSC_TUNE 0X70 +#define DA9121_MASK_SYS_CONFIG_3_I2C_TIMEOUT BIT(1) + +/* DA9121_REG_SYS_GPIO0_0 */ + +#define DA9121_MASK_SYS_GPIO0_0_GPIO0_MODE 0X1E +#define DA9121_MASK_SYS_GPIO0_0_GPIO0_OBUF BIT(0) + +/* DA9121_REG_SYS_GPIO0_1 */ + +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_FALL BIT(7) +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_RISE BIT(6) +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB 0x30 +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_PUPD BIT(3) +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_POL BIT(2) +#define DA9121_MASK_SYS_GPIO0_1_GPIO0_TRIG 0x03 + +/* DA9121_REG_SYS_GPIO1_0 */ + +#define DA9121_MASK_SYS_GPIO1_0_GPIO1_MODE 0x1E +#define DA9121_MASK_SYS_GPIO1_0_GPIO1_OBUF BIT(0) + +/* DA9121_REG_SYS_GPIO1_1 */ + +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_FALL BIT(7) +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_RISE BIT(6) +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB 0x30 +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_PUPD BIT(3) +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_POL BIT(2) +#define DA9121_MASK_SYS_GPIO1_1_GPIO1_TRIG 0x03 + +/* DA9121_REG_SYS_GPIO2_0 */ + +#define DA9121_MASK_SYS_GPIO2_0_GPIO2_MODE 0x1E +#define DA9121_MASK_SYS_GPIO2_0_GPIO2_OBUF BIT(0) + +/* DA9121_REG_SYS_GPIO2_1 */ + +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_FALL BIT(7) +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_RISE BIT(6) +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB 0x30 +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_PUPD BIT(3) +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_POL BIT(2) +#define DA9121_MASK_SYS_GPIO2_1_GPIO2_TRIG 0x03 + +/* DA9121_REG_BUCK_BUCK1_0 / DA9xxx_REG_BUCK_BUCK2_0 */ + +#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_DWN 0x70 +#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_UP 0x0E +#define DA9121_MASK_BUCK_BUCKx_0_CHx_EN BIT(0) + +/* DA9121_REG_BUCK_BUCK1_1 / DA9xxx_REG_BUCK_BUCK2_1 */ + +#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_SHDN 0x70 +#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_STARTUP 0x0E +#define DA9121_MASK_BUCK_BUCKx_1_CHx_PD_DIS BIT(0) + +/* DA9121_REG_BUCK_BUCK1_2 / DA9xxx_REG_BUCK_BUCK2_2 */ + +#define DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM 0x0F + +/* DA9121_REG_BUCK_BUCK1_3 / DA9xxx_REG_BUCK_BUCK2_3 */ + +#define DA9121_MASK_BUCK_BUCKx_3_CHx_VMAX 0xFF + +/* DA9121_REG_BUCK_BUCK1_4 / DA9xxx_REG_BUCK_BUCK2_4 */ + +#define DA9121_MASK_BUCK_BUCKx_4_CHx_VSEL BIT(4) +#define DA9121_MASK_BUCK_BUCKx_4_CHx_B_MODE 0x0C +#define DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE 0x03 + +/* DA9121_REG_BUCK_BUCK1_5 / DA9xxx_REG_BUCK_BUCK2_5 */ + +#define DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT 0xFF + +/* DA9121_REG_BUCK_BUCK1_6 / DA9xxx_REG_BUCK_BUCK2_6 */ + +#define DA9121_MASK_BUCK_BUCKx_6_CHx_B_VOUT 0xFF + +/* DA9121_REG_BUCK_BUCK1_7 / DA9xxx_REG_BUCK_BUCK2_7 */ + +#define DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL 0x03 + + +/* DA9121_REG_OTP_DEVICE_ID */ + +#define DA9121_MASK_OTP_DEVICE_ID_DEV_ID 0xFF + +#define DA9121_DEVICE_ID 0x05 +#define DA914x_DEVICE_ID 0x26 + +/* DA9121_REG_OTP_VARIANT_ID */ + +#define DA9121_SHIFT_OTP_VARIANT_ID_MRC 4 +#define DA9121_MASK_OTP_VARIANT_ID_MRC 0xF0 +#define DA9121_SHIFT_OTP_VARIANT_ID_VRC 0 +#define DA9121_MASK_OTP_VARIANT_ID_VRC 0x0F + +#define DA9121_VARIANT_MRC_BASE 0x2 +#define DA9121_VARIANT_VRC 0x1 +#define DA9220_VARIANT_VRC 0x0 +#define DA9122_VARIANT_VRC 0x2 +#define DA9217_VARIANT_VRC 0x7 +#define DA9130_VARIANT_VRC 0x0 +#define DA9131_VARIANT_VRC 0x1 +#define DA9132_VARIANT_VRC 0x2 + +#define DA914x_VARIANT_MRC_BASE 0x0 +#define DA9141_VARIANT_VRC 0x1 +#define DA9142_VARIANT_VRC 0x2 + +/* DA9121_REG_OTP_CUSTOMER_ID */ + +#define DA9121_MASK_OTP_CUSTOMER_ID_CUST_ID 0xFF + +/* DA9121_REG_OTP_CONFIG_ID */ + +#define DA9121_MASK_OTP_CONFIG_ID_CONFIG_REV 0xFF + +#endif /* __DA9121_REGISTERS_H__ */ diff --git a/drivers/regulator/da9210-regulator.c b/drivers/regulator/da9210-regulator.c new file mode 100644 index 000000000..9154e32bd --- /dev/null +++ b/drivers/regulator/da9210-regulator.c @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// da9210-regulator.c - Regulator device driver for DA9210 +// Copyright (C) 2013 Dialog Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "da9210-regulator.h" + +struct da9210 { + struct regulator_dev *rdev; + struct regmap *regmap; +}; + +static const struct regmap_config da9210_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct regulator_ops da9210_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +/* Default limits measured in millivolts and milliamps */ +#define DA9210_MIN_MV 300 +#define DA9210_MAX_MV 1570 +#define DA9210_STEP_MV 10 + +/* Current limits for buck (uA) indices corresponds with register values */ +static const unsigned int da9210_buck_limits[] = { + 1600000, 1800000, 2000000, 2200000, 2400000, 2600000, 2800000, 3000000, + 3200000, 3400000, 3600000, 3800000, 4000000, 4200000, 4400000, 4600000 +}; + +static const struct regulator_desc da9210_reg = { + .name = "DA9210", + .id = 0, + .ops = &da9210_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = ((DA9210_MAX_MV - DA9210_MIN_MV) / DA9210_STEP_MV) + 1, + .min_uV = (DA9210_MIN_MV * 1000), + .uV_step = (DA9210_STEP_MV * 1000), + .vsel_reg = DA9210_REG_VBUCK_A, + .vsel_mask = DA9210_VBUCK_MASK, + .enable_reg = DA9210_REG_BUCK_CONT, + .enable_mask = DA9210_BUCK_EN, + .owner = THIS_MODULE, + .curr_table = da9210_buck_limits, + .n_current_limits = ARRAY_SIZE(da9210_buck_limits), + .csel_reg = DA9210_REG_BUCK_ILIM, + .csel_mask = DA9210_BUCK_ILIM_MASK, +}; + +static irqreturn_t da9210_irq_handler(int irq, void *data) +{ + struct da9210 *chip = data; + unsigned int val, handled = 0; + int error, ret = IRQ_NONE; + + error = regmap_read(chip->regmap, DA9210_REG_EVENT_B, &val); + if (error < 0) + goto error_i2c; + + if (val & DA9210_E_OVCURR) { + regulator_notifier_call_chain(chip->rdev, + REGULATOR_EVENT_OVER_CURRENT, + NULL); + handled |= DA9210_E_OVCURR; + } + if (val & DA9210_E_NPWRGOOD) { + regulator_notifier_call_chain(chip->rdev, + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + handled |= DA9210_E_NPWRGOOD; + } + if (val & (DA9210_E_TEMP_WARN | DA9210_E_TEMP_CRIT)) { + regulator_notifier_call_chain(chip->rdev, + REGULATOR_EVENT_OVER_TEMP, NULL); + handled |= val & (DA9210_E_TEMP_WARN | DA9210_E_TEMP_CRIT); + } + if (val & DA9210_E_VMAX) { + regulator_notifier_call_chain(chip->rdev, + REGULATOR_EVENT_REGULATION_OUT, + NULL); + handled |= DA9210_E_VMAX; + } + + if (handled) { + /* Clear handled events */ + error = regmap_write(chip->regmap, DA9210_REG_EVENT_B, handled); + if (error < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + return ret; + +error_i2c: + dev_err(regmap_get_device(chip->regmap), "I2C error : %d\n", error); + return ret; +} + +/* + * I2C driver interface functions + */ + +static const struct of_device_id __maybe_unused da9210_dt_ids[] = { + { .compatible = "dlg,da9210", }, + { } +}; +MODULE_DEVICE_TABLE(of, da9210_dt_ids); + +static int da9210_i2c_probe(struct i2c_client *i2c) +{ + struct da9210 *chip; + struct device *dev = &i2c->dev; + struct da9210_pdata *pdata = dev_get_platdata(dev); + struct regulator_dev *rdev = NULL; + struct regulator_config config = { }; + int error; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct da9210), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->regmap = devm_regmap_init_i2c(i2c, &da9210_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + config.dev = &i2c->dev; + config.init_data = pdata ? &pdata->da9210_constraints : + of_get_regulator_init_data(dev, dev->of_node, &da9210_reg); + config.driver_data = chip; + config.regmap = chip->regmap; + config.of_node = dev->of_node; + + /* Mask all interrupt sources to deassert interrupt line */ + error = regmap_write(chip->regmap, DA9210_REG_MASK_A, ~0); + if (!error) + error = regmap_write(chip->regmap, DA9210_REG_MASK_B, ~0); + if (error) { + dev_err(&i2c->dev, "Failed to write to mask reg: %d\n", error); + return error; + } + + rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register DA9210 regulator\n"); + return PTR_ERR(rdev); + } + + chip->rdev = rdev; + if (i2c->irq) { + error = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + da9210_irq_handler, + IRQF_TRIGGER_LOW | + IRQF_ONESHOT | IRQF_SHARED, + "da9210", chip); + if (error) { + dev_err(&i2c->dev, "Failed to request IRQ%u: %d\n", + i2c->irq, error); + return error; + } + + error = regmap_update_bits(chip->regmap, DA9210_REG_MASK_B, + DA9210_M_OVCURR | DA9210_M_NPWRGOOD | + DA9210_M_TEMP_WARN | + DA9210_M_TEMP_CRIT | DA9210_M_VMAX, 0); + if (error < 0) { + dev_err(&i2c->dev, "Failed to update mask reg: %d\n", + error); + return error; + } + } else { + dev_warn(&i2c->dev, "No IRQ configured\n"); + } + + i2c_set_clientdata(i2c, chip); + + return 0; +} + +static const struct i2c_device_id da9210_i2c_id[] = { + { .name = "da9210" }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, da9210_i2c_id); + +static struct i2c_driver da9210_regulator_driver = { + .driver = { + .name = "da9210", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(da9210_dt_ids), + }, + .probe = da9210_i2c_probe, + .id_table = da9210_i2c_id, +}; + +module_i2c_driver(da9210_regulator_driver); + +MODULE_AUTHOR("S Twiss "); +MODULE_DESCRIPTION("Regulator device driver for Dialog DA9210"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/da9210-regulator.h b/drivers/regulator/da9210-regulator.h new file mode 100644 index 000000000..b1f1a607c --- /dev/null +++ b/drivers/regulator/da9210-regulator.h @@ -0,0 +1,273 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * da9210-regulator.h - Regulator definitions for DA9210 + * Copyright (C) 2013 Dialog Semiconductor Ltd. + */ + +#ifndef __DA9210_REGISTERS_H__ +#define __DA9210_REGISTERS_H__ + +struct da9210_pdata { + struct regulator_init_data da9210_constraints; +}; + +/* Page selection */ +#define DA9210_REG_PAGE_CON 0x00 + +/* System Control and Event Registers */ +#define DA9210_REG_STATUS_A 0x50 +#define DA9210_REG_STATUS_B 0x51 +#define DA9210_REG_EVENT_A 0x52 +#define DA9210_REG_EVENT_B 0x53 +#define DA9210_REG_MASK_A 0x54 +#define DA9210_REG_MASK_B 0x55 +#define DA9210_REG_CONTROL_A 0x56 + +/* GPIO Control Registers */ +#define DA9210_REG_GPIO_0_1 0x58 +#define DA9210_REG_GPIO_2_3 0x59 +#define DA9210_REG_GPIO_4_5 0x5A +#define DA9210_REG_GPIO_6 0x5B + +/* Regulator Registers */ +#define DA9210_REG_BUCK_CONT 0x5D +#define DA9210_REG_BUCK_ILIM 0xD0 +#define DA9210_REG_BUCK_CONF1 0xD1 +#define DA9210_REG_BUCK_CONF2 0xD2 +#define DA9210_REG_VBACK_AUTO 0xD4 +#define DA9210_REG_VBACK_BASE 0xD5 +#define DA9210_REG_VBACK_MAX_DVC_IF 0xD6 +#define DA9210_REG_VBACK_DVC 0xD7 +#define DA9210_REG_VBUCK_A 0xD8 +#define DA9210_REG_VBUCK_B 0xD9 + +/* I2C Interface Settings */ +#define DA9210_REG_INTERFACE 0x105 + +/* OTP */ +#define DA9210_REG_OPT_COUNT 0x140 +#define DA9210_REG_OPT_ADDR 0x141 +#define DA9210_REG_OPT_DATA 0x142 + +/* Customer Trim and Configuration */ +#define DA9210_REG_CONFIG_A 0x143 +#define DA9210_REG_CONFIG_B 0x144 +#define DA9210_REG_CONFIG_C 0x145 +#define DA9210_REG_CONFIG_D 0x146 +#define DA9210_REG_CONFIG_E 0x147 + + +/* + * Registers bits + */ +/* DA9210_REG_PAGE_CON (addr=0x00) */ +#define DA9210_PEG_PAGE_SHIFT 0 +#define DA9210_REG_PAGE_MASK 0x0F +/* On I2C registers 0x00 - 0xFF */ +#define DA9210_REG_PAGE0 0 +/* On I2C registers 0x100 - 0x1FF */ +#define DA9210_REG_PAGE2 2 +#define DA9210_PAGE_WRITE_MODE 0x00 +#define DA9210_REPEAT_WRITE_MODE 0x40 +#define DA9210_PAGE_REVERT 0x80 + +/* DA9210_REG_STATUS_A (addr=0x50) */ +#define DA9210_GPI0 0x01 +#define DA9210_GPI1 0x02 +#define DA9210_GPI2 0x04 +#define DA9210_GPI3 0x08 +#define DA9210_GPI4 0x10 +#define DA9210_GPI5 0x20 +#define DA9210_GPI6 0x40 + +/* DA9210_REG_EVENT_A (addr=0x52) */ +#define DA9210_E_GPI0 0x01 +#define DA9210_E_GPI1 0x02 +#define DA9210_E_GPI2 0x04 +#define DA9210_E_GPI3 0x08 +#define DA9210_E_GPI4 0x10 +#define DA9210_E_GPI5 0x20 +#define DA9210_E_GPI6 0x40 + +/* DA9210_REG_EVENT_B (addr=0x53) */ +#define DA9210_E_OVCURR 0x01 +#define DA9210_E_NPWRGOOD 0x02 +#define DA9210_E_TEMP_WARN 0x04 +#define DA9210_E_TEMP_CRIT 0x08 +#define DA9210_E_VMAX 0x10 + +/* DA9210_REG_MASK_A (addr=0x54) */ +#define DA9210_M_GPI0 0x01 +#define DA9210_M_GPI1 0x02 +#define DA9210_M_GPI2 0x04 +#define DA9210_M_GPI3 0x08 +#define DA9210_M_GPI4 0x10 +#define DA9210_M_GPI5 0x20 +#define DA9210_M_GPI6 0x40 + +/* DA9210_REG_MASK_B (addr=0x55) */ +#define DA9210_M_OVCURR 0x01 +#define DA9210_M_NPWRGOOD 0x02 +#define DA9210_M_TEMP_WARN 0x04 +#define DA9210_M_TEMP_CRIT 0x08 +#define DA9210_M_VMAX 0x10 + +/* DA9210_REG_CONTROL_A (addr=0x56) */ +#define DA9210_DEBOUNCING_SHIFT 0 +#define DA9210_DEBOUNCING_MASK 0x07 +#define DA9210_SLEW_RATE_SHIFT 3 +#define DA9210_SLEW_RATE_MASK 0x18 +#define DA9210_V_LOCK 0x20 + +/* DA9210_REG_GPIO_0_1 (addr=0x58) */ +#define DA9210_GPIO0_PIN_SHIFT 0 +#define DA9210_GPIO0_PIN_MASK 0x03 +#define DA9210_GPIO0_PIN_GPI 0x00 +#define DA9210_GPIO0_PIN_GPO_OD 0x02 +#define DA9210_GPIO0_PIN_GPO 0x03 +#define DA9210_GPIO0_TYPE 0x04 +#define DA9210_GPIO0_TYPE_GPI 0x00 +#define DA9210_GPIO0_TYPE_GPO 0x04 +#define DA9210_GPIO0_MODE 0x08 +#define DA9210_GPIO1_PIN_SHIFT 4 +#define DA9210_GPIO1_PIN_MASK 0x30 +#define DA9210_GPIO1_PIN_GPI 0x00 +#define DA9210_GPIO1_PIN_VERROR 0x10 +#define DA9210_GPIO1_PIN_GPO_OD 0x20 +#define DA9210_GPIO1_PIN_GPO 0x30 +#define DA9210_GPIO1_TYPE_SHIFT 0x40 +#define DA9210_GPIO1_TYPE_GPI 0x00 +#define DA9210_GPIO1_TYPE_GPO 0x40 +#define DA9210_GPIO1_MODE 0x80 + +/* DA9210_REG_GPIO_2_3 (addr=0x59) */ +#define DA9210_GPIO2_PIN_SHIFT 0 +#define DA9210_GPIO2_PIN_MASK 0x03 +#define DA9210_GPIO2_PIN_GPI 0x00 +#define DA9210_GPIO5_PIN_BUCK_CLK 0x10 +#define DA9210_GPIO2_PIN_GPO_OD 0x02 +#define DA9210_GPIO2_PIN_GPO 0x03 +#define DA9210_GPIO2_TYPE 0x04 +#define DA9210_GPIO2_TYPE_GPI 0x00 +#define DA9210_GPIO2_TYPE_GPO 0x04 +#define DA9210_GPIO2_MODE 0x08 +#define DA9210_GPIO3_PIN_SHIFT 4 +#define DA9210_GPIO3_PIN_MASK 0x30 +#define DA9210_GPIO3_PIN_GPI 0x00 +#define DA9210_GPIO3_PIN_IERROR 0x10 +#define DA9210_GPIO3_PIN_GPO_OD 0x20 +#define DA9210_GPIO3_PIN_GPO 0x30 +#define DA9210_GPIO3_TYPE_SHIFT 0x40 +#define DA9210_GPIO3_TYPE_GPI 0x00 +#define DA9210_GPIO3_TYPE_GPO 0x40 +#define DA9210_GPIO3_MODE 0x80 + +/* DA9210_REG_GPIO_4_5 (addr=0x5A) */ +#define DA9210_GPIO4_PIN_SHIFT 0 +#define DA9210_GPIO4_PIN_MASK 0x03 +#define DA9210_GPIO4_PIN_GPI 0x00 +#define DA9210_GPIO4_PIN_GPO_OD 0x02 +#define DA9210_GPIO4_PIN_GPO 0x03 +#define DA9210_GPIO4_TYPE 0x04 +#define DA9210_GPIO4_TYPE_GPI 0x00 +#define DA9210_GPIO4_TYPE_GPO 0x04 +#define DA9210_GPIO4_MODE 0x08 +#define DA9210_GPIO5_PIN_SHIFT 4 +#define DA9210_GPIO5_PIN_MASK 0x30 +#define DA9210_GPIO5_PIN_GPI 0x00 +#define DA9210_GPIO5_PIN_INTERFACE 0x01 +#define DA9210_GPIO5_PIN_GPO_OD 0x20 +#define DA9210_GPIO5_PIN_GPO 0x30 +#define DA9210_GPIO5_TYPE_SHIFT 0x40 +#define DA9210_GPIO5_TYPE_GPI 0x00 +#define DA9210_GPIO5_TYPE_GPO 0x40 +#define DA9210_GPIO5_MODE 0x80 + +/* DA9210_REG_GPIO_6 (addr=0x5B) */ +#define DA9210_GPIO6_PIN_SHIFT 0 +#define DA9210_GPIO6_PIN_MASK 0x03 +#define DA9210_GPIO6_PIN_GPI 0x00 +#define DA9210_GPIO6_PIN_INTERFACE 0x01 +#define DA9210_GPIO6_PIN_GPO_OD 0x02 +#define DA9210_GPIO6_PIN_GPO 0x03 +#define DA9210_GPIO6_TYPE 0x04 +#define DA9210_GPIO6_TYPE_GPI 0x00 +#define DA9210_GPIO6_TYPE_GPO 0x04 +#define DA9210_GPIO6_MODE 0x08 + +/* DA9210_REG_BUCK_CONT (addr=0x5D) */ +#define DA9210_BUCK_EN 0x01 +#define DA9210_BUCK_GPI_SHIFT 1 +#define DA9210_BUCK_GPI_MASK 0x06 +#define DA9210_BUCK_GPI_OFF 0x00 +#define DA9210_BUCK_GPI_GPIO0 0x02 +#define DA9210_BUCK_GPI_GPIO3 0x04 +#define DA9210_BUCK_GPI_GPIO4 0x06 +#define DA9210_BUCK_PD_DIS 0x08 +#define DA9210_VBUCK_SEL 0x10 +#define DA9210_VBUCK_SEL_A 0x00 +#define DA9210_VBUCK_SEL_B 0x10 +#define DA9210_VBUCK_GPI_SHIFT 5 +#define DA9210_VBUCK_GPI_MASK 0x60 +#define DA9210_VBUCK_GPI_OFF 0x00 +#define DA9210_VBUCK_GPI_GPIO0 0x20 +#define DA9210_VBUCK_GPI_GPIO3 0x40 +#define DA9210_VBUCK_GPI_GPIO4 0x60 +#define DA9210_DVC_CTRL_EN 0x80 + +/* DA9210_REG_BUCK_ILIM (addr=0xD0) */ +#define DA9210_BUCK_ILIM_SHIFT 0 +#define DA9210_BUCK_ILIM_MASK 0x0F +#define DA9210_BUCK_IALARM 0x10 + +/* DA9210_REG_BUCK_CONF1 (addr=0xD1) */ +#define DA9210_BUCK_MODE_SHIFT 0 +#define DA9210_BUCK_MODE_MASK 0x03 +#define DA9210_BUCK_MODE_MANUAL 0x00 +#define DA9210_BUCK_MODE_SLEEP 0x01 +#define DA9210_BUCK_MODE_SYNC 0x02 +#define DA9210_BUCK_MODE_AUTO 0x03 +#define DA9210_STARTUP_CTRL_SHIFT 2 +#define DA9210_STARTUP_CTRL_MASK 0x1C +#define DA9210_PWR_DOWN_CTRL_SHIFT 5 +#define DA9210_PWR_DOWN_CTRL_MASK 0xE0 + +/* DA9210_REG_BUCK_CONF2 (addr=0xD2) */ +#define DA9210_PHASE_SEL_SHIFT 0 +#define DA9210_PHASE_SEL_MASK 0x03 +#define DA9210_FREQ_SEL 0x40 + +/* DA9210_REG_BUCK_AUTO (addr=0xD4) */ +#define DA9210_VBUCK_AUTO_SHIFT 0 +#define DA9210_VBUCK_AUTO_MASK 0x7F + +/* DA9210_REG_BUCK_BASE (addr=0xD5) */ +#define DA9210_VBUCK_BASE_SHIFT 0 +#define DA9210_VBUCK_BASE_MASK 0x7F + +/* DA9210_REG_VBUCK_MAX_DVC_IF (addr=0xD6) */ +#define DA9210_VBUCK_MAX_SHIFT 0 +#define DA9210_VBUCK_MAX_MASK 0x7F +#define DA9210_DVC_STEP_SIZE 0x80 +#define DA9210_DVC_STEP_SIZE_10MV 0x00 +#define DA9210_DVC_STEP_SIZE_20MV 0x80 + +/* DA9210_REG_VBUCK_DVC (addr=0xD7) */ +#define DA9210_VBUCK_DVC_SHIFT 0 +#define DA9210_VBUCK_DVC_MASK 0x7F + +/* DA9210_REG_VBUCK_A/B (addr=0xD8/0xD9) */ +#define DA9210_VBUCK_SHIFT 0 +#define DA9210_VBUCK_MASK 0x7F +#define DA9210_VBUCK_BIAS 0 +#define DA9210_BUCK_SL 0x80 + +/* DA9210_REG_INTERFACE (addr=0x105) */ +#define DA9210_IF_BASE_ADDR_SHIFT 4 +#define DA9210_IF_BASE_ADDR_MASK 0xF0 + +/* DA9210_REG_CONFIG_E (addr=0x147) */ +#define DA9210_STAND_ALONE 0x01 + +#endif /* __DA9210_REGISTERS_H__ */ + diff --git a/drivers/regulator/da9211-regulator.c b/drivers/regulator/da9211-regulator.c new file mode 100644 index 000000000..9cf713755 --- /dev/null +++ b/drivers/regulator/da9211-regulator.c @@ -0,0 +1,566 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// da9211-regulator.c - Regulator device driver for DA9211/DA9212 +// /DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 +// Copyright (C) 2015 Dialog Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "da9211-regulator.h" + +/* DEVICE IDs */ +#define DA9211_DEVICE_ID 0x22 +#define DA9213_DEVICE_ID 0x23 +#define DA9215_DEVICE_ID 0x24 + +/* DA9211 REGULATOR IDs */ +#define DA9211_ID_BUCKA 0 +#define DA9211_ID_BUCKB 1 + +struct da9211 { + struct device *dev; + struct regmap *regmap; + struct da9211_pdata *pdata; + struct regulator_dev *rdev[DA9211_MAX_REGULATORS]; + int num_regulator; + int chip_irq; + int chip_id; +}; + +static const struct regmap_range_cfg da9211_regmap_range[] = { + { + .selector_reg = DA9211_REG_PAGE_CON, + .selector_mask = DA9211_REG_PAGE_MASK, + .selector_shift = DA9211_REG_PAGE_SHIFT, + .window_start = 0, + .window_len = 256, + .range_min = 0, + .range_max = 5*128, + }, +}; + +static bool da9211_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case DA9211_REG_STATUS_A: + case DA9211_REG_STATUS_B: + case DA9211_REG_EVENT_A: + case DA9211_REG_EVENT_B: + return true; + } + return false; +} + +static const struct regmap_config da9211_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 5 * 128, + .volatile_reg = da9211_volatile_reg, + .cache_type = REGCACHE_MAPLE, + .ranges = da9211_regmap_range, + .num_ranges = ARRAY_SIZE(da9211_regmap_range), +}; + +/* Default limits measured in millivolts and milliamps */ +#define DA9211_MIN_MV 300 +#define DA9211_MAX_MV 1570 +#define DA9211_STEP_MV 10 + +/* Current limits for DA9211 buck (uA) indices + * corresponds with register values + */ +static const int da9211_current_limits[] = { + 2000000, 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, + 3600000, 3800000, 4000000, 4200000, 4400000, 4600000, 4800000, 5000000 +}; +/* Current limits for DA9213 buck (uA) indices + * corresponds with register values + */ +static const int da9213_current_limits[] = { + 3000000, 3200000, 3400000, 3600000, 3800000, 4000000, 4200000, 4400000, + 4600000, 4800000, 5000000, 5200000, 5400000, 5600000, 5800000, 6000000 +}; +/* Current limits for DA9215 buck (uA) indices + * corresponds with register values + */ +static const int da9215_current_limits[] = { + 4000000, 4200000, 4400000, 4600000, 4800000, 5000000, 5200000, 5400000, + 5600000, 5800000, 6000000, 6200000, 6400000, 6600000, 6800000, 7000000 +}; + +static unsigned int da9211_map_buck_mode(unsigned int mode) +{ + switch (mode) { + case DA9211_BUCK_MODE_SLEEP: + return REGULATOR_MODE_STANDBY; + case DA9211_BUCK_MODE_SYNC: + return REGULATOR_MODE_FAST; + case DA9211_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int da9211_buck_get_mode(struct regulator_dev *rdev) +{ + int id = rdev_get_id(rdev); + struct da9211 *chip = rdev_get_drvdata(rdev); + unsigned int data; + int ret, mode = 0; + + ret = regmap_read(chip->regmap, DA9211_REG_BUCKA_CONF+id, &data); + if (ret < 0) + return ret; + + switch (data & 0x03) { + case DA9211_BUCK_MODE_SYNC: + mode = REGULATOR_MODE_FAST; + break; + case DA9211_BUCK_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case DA9211_BUCK_MODE_SLEEP: + mode = REGULATOR_MODE_STANDBY; + break; + } + + return mode; +} + +static int da9211_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + int id = rdev_get_id(rdev); + struct da9211 *chip = rdev_get_drvdata(rdev); + int val = 0; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = DA9211_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = DA9211_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = DA9211_BUCK_MODE_SLEEP; + break; + } + + return regmap_update_bits(chip->regmap, DA9211_REG_BUCKA_CONF+id, + 0x03, val); +} + +static int da9211_set_current_limit(struct regulator_dev *rdev, int min, + int max) +{ + int id = rdev_get_id(rdev); + struct da9211 *chip = rdev_get_drvdata(rdev); + int i, max_size; + const int *current_limits; + + switch (chip->chip_id) { + case DA9211: + current_limits = da9211_current_limits; + max_size = ARRAY_SIZE(da9211_current_limits)-1; + break; + case DA9213: + current_limits = da9213_current_limits; + max_size = ARRAY_SIZE(da9213_current_limits)-1; + break; + case DA9215: + current_limits = da9215_current_limits; + max_size = ARRAY_SIZE(da9215_current_limits)-1; + break; + default: + return -EINVAL; + } + + /* search for closest to maximum */ + for (i = max_size; i >= 0; i--) { + if (min <= current_limits[i] && + max >= current_limits[i]) { + return regmap_update_bits(chip->regmap, + DA9211_REG_BUCK_ILIM, + (0x0F << id*4), (i << id*4)); + } + } + + return -EINVAL; +} + +static int da9211_get_current_limit(struct regulator_dev *rdev) +{ + int id = rdev_get_id(rdev); + struct da9211 *chip = rdev_get_drvdata(rdev); + unsigned int data; + int ret; + const int *current_limits; + + switch (chip->chip_id) { + case DA9211: + current_limits = da9211_current_limits; + break; + case DA9213: + current_limits = da9213_current_limits; + break; + case DA9215: + current_limits = da9215_current_limits; + break; + default: + return -EINVAL; + } + + ret = regmap_read(chip->regmap, DA9211_REG_BUCK_ILIM, &data); + if (ret < 0) + return ret; + + /* select one of 16 values: 0000 (2000mA or 3000mA) + * to 1111 (5000mA or 6000mA). + */ + data = (data >> id*4) & 0x0F; + return current_limits[data]; +} + +static const struct regulator_ops da9211_buck_ops = { + .get_mode = da9211_buck_get_mode, + .set_mode = da9211_buck_set_mode, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = da9211_set_current_limit, + .get_current_limit = da9211_get_current_limit, +}; + +#define DA9211_BUCK(_id) \ +{\ + .name = #_id,\ + .ops = &da9211_buck_ops,\ + .type = REGULATOR_VOLTAGE,\ + .id = DA9211_ID_##_id,\ + .n_voltages = (DA9211_MAX_MV - DA9211_MIN_MV) / DA9211_STEP_MV + 1,\ + .min_uV = (DA9211_MIN_MV * 1000),\ + .uV_step = (DA9211_STEP_MV * 1000),\ + .enable_reg = DA9211_REG_BUCKA_CONT + DA9211_ID_##_id,\ + .enable_mask = DA9211_BUCKA_EN,\ + .vsel_reg = DA9211_REG_VBUCKA_A + DA9211_ID_##_id * 2,\ + .vsel_mask = DA9211_VBUCK_MASK,\ + .owner = THIS_MODULE,\ + .of_map_mode = da9211_map_buck_mode,\ +} + +static const struct regulator_desc da9211_regulators[] = { + DA9211_BUCK(BUCKA), + DA9211_BUCK(BUCKB), +}; + +#ifdef CONFIG_OF +static struct of_regulator_match da9211_matches[] = { + [DA9211_ID_BUCKA] = { + .name = "BUCKA", + .desc = &da9211_regulators[DA9211_ID_BUCKA], + }, + [DA9211_ID_BUCKB] = { + .name = "BUCKB", + .desc = &da9211_regulators[DA9211_ID_BUCKB], + }, + }; + +static struct da9211_pdata *da9211_parse_regulators_dt( + struct device *dev) +{ + struct da9211_pdata *pdata; + struct device_node *node; + int i, num, n; + + node = of_get_child_by_name(dev->of_node, "regulators"); + if (!node) { + dev_err(dev, "regulators node not found\n"); + return ERR_PTR(-ENODEV); + } + + num = of_regulator_match(dev, node, da9211_matches, + ARRAY_SIZE(da9211_matches)); + of_node_put(node); + if (num < 0) { + dev_err(dev, "Failed to match regulators\n"); + return ERR_PTR(-EINVAL); + } + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return ERR_PTR(-ENOMEM); + + pdata->num_buck = num; + + n = 0; + for (i = 0; i < ARRAY_SIZE(da9211_matches); i++) { + if (!da9211_matches[i].init_data) + continue; + + pdata->init_data[n] = da9211_matches[i].init_data; + pdata->reg_node[n] = da9211_matches[i].of_node; + pdata->gpiod_ren[n] = devm_fwnode_gpiod_get(dev, + of_fwnode_handle(pdata->reg_node[n]), + "enable", + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE, + "da9211-enable"); + if (IS_ERR(pdata->gpiod_ren[n])) + pdata->gpiod_ren[n] = NULL; + n++; + } + + return pdata; +} +#else +static struct da9211_pdata *da9211_parse_regulators_dt( + struct device *dev) +{ + return ERR_PTR(-ENODEV); +} +#endif + +static irqreturn_t da9211_irq_handler(int irq, void *data) +{ + struct da9211 *chip = data; + int reg_val, err, ret = IRQ_NONE; + + err = regmap_read(chip->regmap, DA9211_REG_EVENT_B, ®_val); + if (err < 0) + goto error_i2c; + + if (reg_val & DA9211_E_OV_CURR_A) { + regulator_notifier_call_chain(chip->rdev[0], + REGULATOR_EVENT_OVER_CURRENT, NULL); + + err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, + DA9211_E_OV_CURR_A); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + if (reg_val & DA9211_E_OV_CURR_B) { + regulator_notifier_call_chain(chip->rdev[1], + REGULATOR_EVENT_OVER_CURRENT, NULL); + + err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, + DA9211_E_OV_CURR_B); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + return ret; + +error_i2c: + dev_err(chip->dev, "I2C error : %d\n", err); + return IRQ_NONE; +} + +static int da9211_regulator_init(struct da9211 *chip) +{ + struct regulator_config config = { }; + int i, ret; + unsigned int data; + + ret = regmap_read(chip->regmap, DA9211_REG_CONFIG_E, &data); + if (ret < 0) { + dev_err(chip->dev, "Failed to read CONFIG_E reg: %d\n", ret); + return ret; + } + + data &= DA9211_SLAVE_SEL; + /* If configuration for 1/2 bucks is different between platform data + * and the register, driver should exit. + */ + if (chip->pdata->num_buck == 1 && data == 0x00) + chip->num_regulator = 1; + else if (chip->pdata->num_buck == 2 && data != 0x00) + chip->num_regulator = 2; + else { + dev_err(chip->dev, "Configuration is mismatched\n"); + return -EINVAL; + } + + for (i = 0; i < chip->num_regulator; i++) { + config.init_data = chip->pdata->init_data[i]; + config.dev = chip->dev; + config.driver_data = chip; + config.regmap = chip->regmap; + config.of_node = chip->pdata->reg_node[i]; + + if (chip->pdata->gpiod_ren[i]) + config.ena_gpiod = chip->pdata->gpiod_ren[i]; + else + config.ena_gpiod = NULL; + + /* + * Hand the GPIO descriptor management over to the regulator + * core, remove it from GPIO devres management. + */ + if (config.ena_gpiod) + devm_gpiod_unhinge(chip->dev, config.ena_gpiod); + chip->rdev[i] = devm_regulator_register(chip->dev, + &da9211_regulators[i], &config); + if (IS_ERR(chip->rdev[i])) { + dev_err(chip->dev, + "Failed to register DA9211 regulator\n"); + return PTR_ERR(chip->rdev[i]); + } + + if (chip->chip_irq != 0) { + ret = regmap_update_bits(chip->regmap, + DA9211_REG_MASK_B, DA9211_M_OV_CURR_A << i, 0); + if (ret < 0) { + dev_err(chip->dev, + "Failed to update mask reg: %d\n", ret); + return ret; + } + } + } + + return 0; +} + +/* + * I2C driver interface functions + */ +static int da9211_i2c_probe(struct i2c_client *i2c) +{ + struct da9211 *chip; + int error, ret; + unsigned int data; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct da9211), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &i2c->dev; + chip->regmap = devm_regmap_init_i2c(i2c, &da9211_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + i2c_set_clientdata(i2c, chip); + + chip->pdata = i2c->dev.platform_data; + + ret = regmap_read(chip->regmap, DA9211_REG_DEVICE_ID, &data); + if (ret < 0) { + dev_err(chip->dev, "Failed to read DEVICE_ID reg: %d\n", ret); + return ret; + } + + switch (data) { + case DA9211_DEVICE_ID: + chip->chip_id = DA9211; + break; + case DA9213_DEVICE_ID: + chip->chip_id = DA9213; + break; + case DA9215_DEVICE_ID: + chip->chip_id = DA9215; + break; + default: + dev_err(chip->dev, "Unsupported device id = 0x%x.\n", data); + return -ENODEV; + } + + if (!chip->pdata) + chip->pdata = da9211_parse_regulators_dt(chip->dev); + + if (IS_ERR(chip->pdata)) { + dev_err(chip->dev, "No regulators defined for the platform\n"); + return PTR_ERR(chip->pdata); + } + + chip->chip_irq = i2c->irq; + + ret = da9211_regulator_init(chip); + if (ret < 0) { + dev_err(chip->dev, "Failed to initialize regulator: %d\n", ret); + return ret; + } + + if (chip->chip_irq != 0) { + ret = devm_request_threaded_irq(chip->dev, chip->chip_irq, NULL, + da9211_irq_handler, + IRQF_TRIGGER_LOW|IRQF_ONESHOT, + "da9211", chip); + if (ret != 0) { + dev_err(chip->dev, "Failed to request IRQ: %d\n", + chip->chip_irq); + return ret; + } + } else { + dev_warn(chip->dev, "No IRQ configured\n"); + } + + return ret; +} + +static const struct i2c_device_id da9211_i2c_id[] = { + { .name = "da9211", .driver_data = DA9211 }, + { .name = "da9212", .driver_data = DA9212 }, + { .name = "da9213", .driver_data = DA9213 }, + { .name = "da9223", .driver_data = DA9223 }, + { .name = "da9214", .driver_data = DA9214 }, + { .name = "da9224", .driver_data = DA9224 }, + { .name = "da9215", .driver_data = DA9215 }, + { .name = "da9225", .driver_data = DA9225 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, da9211_i2c_id); + +#ifdef CONFIG_OF +static const struct of_device_id da9211_dt_ids[] = { + { .compatible = "dlg,da9211", .data = &da9211_i2c_id[0] }, + { .compatible = "dlg,da9212", .data = &da9211_i2c_id[1] }, + { .compatible = "dlg,da9213", .data = &da9211_i2c_id[2] }, + { .compatible = "dlg,da9223", .data = &da9211_i2c_id[3] }, + { .compatible = "dlg,da9214", .data = &da9211_i2c_id[4] }, + { .compatible = "dlg,da9224", .data = &da9211_i2c_id[5] }, + { .compatible = "dlg,da9215", .data = &da9211_i2c_id[6] }, + { .compatible = "dlg,da9225", .data = &da9211_i2c_id[7] }, + {}, +}; +MODULE_DEVICE_TABLE(of, da9211_dt_ids); +#endif + +static struct i2c_driver da9211_regulator_driver = { + .driver = { + .name = "da9211", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(da9211_dt_ids), + }, + .probe = da9211_i2c_probe, + .id_table = da9211_i2c_id, +}; + +module_i2c_driver(da9211_regulator_driver); + +MODULE_AUTHOR("James Ban "); +MODULE_DESCRIPTION("DA9211/DA9212/DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/da9211-regulator.h b/drivers/regulator/da9211-regulator.h new file mode 100644 index 000000000..1201e7cc0 --- /dev/null +++ b/drivers/regulator/da9211-regulator.h @@ -0,0 +1,266 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * da9211-regulator.h - Regulator definitions for DA9211/DA9212 + * /DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 + * Copyright (C) 2015 Dialog Semiconductor Ltd. + */ + +#ifndef __DA9211_REGISTERS_H__ +#define __DA9211_REGISTERS_H__ + +/* Page selection */ +#define DA9211_REG_PAGE_CON 0x00 + +/* System Control and Event Registers */ +#define DA9211_REG_STATUS_A 0x50 +#define DA9211_REG_STATUS_B 0x51 +#define DA9211_REG_EVENT_A 0x52 +#define DA9211_REG_EVENT_B 0x53 +#define DA9211_REG_MASK_A 0x54 +#define DA9211_REG_MASK_B 0x55 +#define DA9211_REG_CONTROL_A 0x56 + +/* GPIO Control Registers */ +#define DA9211_REG_GPIO_0_1 0x58 +#define DA9211_REG_GPIO_2_3 0x59 +#define DA9211_REG_GPIO_4 0x5A + +/* Regulator Registers */ +#define DA9211_REG_BUCKA_CONT 0x5D +#define DA9211_REG_BUCKB_CONT 0x5E +#define DA9211_REG_BUCK_ILIM 0xD0 +#define DA9211_REG_BUCKA_CONF 0xD1 +#define DA9211_REG_BUCKB_CONF 0xD2 +#define DA9211_REG_BUCK_CONF 0xD3 +#define DA9211_REG_VBACKA_MAX 0xD5 +#define DA9211_REG_VBACKB_MAX 0xD6 +#define DA9211_REG_VBUCKA_A 0xD7 +#define DA9211_REG_VBUCKA_B 0xD8 +#define DA9211_REG_VBUCKB_A 0xD9 +#define DA9211_REG_VBUCKB_B 0xDA + +/* I2C Interface Settings */ +#define DA9211_REG_INTERFACE 0x105 + +/* BUCK Phase Selection*/ +#define DA9211_REG_CONFIG_E 0x147 + +/* Device ID */ +#define DA9211_REG_DEVICE_ID 0x201 + +/* + * Registers bits + */ +/* DA9211_REG_PAGE_CON (addr=0x00) */ +#define DA9211_REG_PAGE_SHIFT 1 +#define DA9211_REG_PAGE_MASK 0x06 +/* On I2C registers 0x00 - 0xFF */ +#define DA9211_REG_PAGE0 0 +/* On I2C registers 0x100 - 0x1FF */ +#define DA9211_REG_PAGE2 2 +#define DA9211_PAGE_WRITE_MODE 0x00 +#define DA9211_REPEAT_WRITE_MODE 0x40 +#define DA9211_PAGE_REVERT 0x80 + +/* DA9211_REG_STATUS_A (addr=0x50) */ +#define DA9211_GPI0 0x01 +#define DA9211_GPI1 0x02 +#define DA9211_GPI2 0x04 +#define DA9211_GPI3 0x08 +#define DA9211_GPI4 0x10 + +/* DA9211_REG_EVENT_A (addr=0x52) */ +#define DA9211_E_GPI0 0x01 +#define DA9211_E_GPI1 0x02 +#define DA9211_E_GPI2 0x04 +#define DA9211_E_GPI3 0x08 +#define DA9211_E_GPI4 0x10 +#define DA9211_E_UVLO_IO 0x40 + +/* DA9211_REG_EVENT_B (addr=0x53) */ +#define DA9211_E_PWRGOOD_A 0x01 +#define DA9211_E_PWRGOOD_B 0x02 +#define DA9211_E_TEMP_WARN 0x04 +#define DA9211_E_TEMP_CRIT 0x08 +#define DA9211_E_OV_CURR_A 0x10 +#define DA9211_E_OV_CURR_B 0x20 + +/* DA9211_REG_MASK_A (addr=0x54) */ +#define DA9211_M_GPI0 0x01 +#define DA9211_M_GPI1 0x02 +#define DA9211_M_GPI2 0x04 +#define DA9211_M_GPI3 0x08 +#define DA9211_M_GPI4 0x10 +#define DA9211_M_UVLO_IO 0x40 + +/* DA9211_REG_MASK_B (addr=0x55) */ +#define DA9211_M_PWRGOOD_A 0x01 +#define DA9211_M_PWRGOOD_B 0x02 +#define DA9211_M_TEMP_WARN 0x04 +#define DA9211_M_TEMP_CRIT 0x08 +#define DA9211_M_OV_CURR_A 0x10 +#define DA9211_M_OV_CURR_B 0x20 + +/* DA9211_REG_CONTROL_A (addr=0x56) */ +#define DA9211_DEBOUNCING_SHIFT 0 +#define DA9211_DEBOUNCING_MASK 0x07 +#define DA9211_SLEW_RATE_SHIFT 3 +#define DA9211_SLEW_RATE_A_MASK 0x18 +#define DA9211_SLEW_RATE_B_SHIFT 5 +#define DA9211_SLEW_RATE_B_MASK 0x60 +#define DA9211_V_LOCK 0x80 + +/* DA9211_REG_GPIO_0_1 (addr=0x58) */ +#define DA9211_GPIO0_PIN_SHIFT 0 +#define DA9211_GPIO0_PIN_MASK 0x03 +#define DA9211_GPIO0_PIN_GPI 0x00 +#define DA9211_GPIO0_PIN_GPO_OD 0x02 +#define DA9211_GPIO0_PIN_GPO 0x03 +#define DA9211_GPIO0_TYPE 0x04 +#define DA9211_GPIO0_TYPE_GPI 0x00 +#define DA9211_GPIO0_TYPE_GPO 0x04 +#define DA9211_GPIO0_MODE 0x08 +#define DA9211_GPIO1_PIN_SHIFT 4 +#define DA9211_GPIO1_PIN_MASK 0x30 +#define DA9211_GPIO1_PIN_GPI 0x00 +#define DA9211_GPIO1_PIN_VERROR 0x10 +#define DA9211_GPIO1_PIN_GPO_OD 0x20 +#define DA9211_GPIO1_PIN_GPO 0x30 +#define DA9211_GPIO1_TYPE_SHIFT 0x40 +#define DA9211_GPIO1_TYPE_GPI 0x00 +#define DA9211_GPIO1_TYPE_GPO 0x40 +#define DA9211_GPIO1_MODE 0x80 + +/* DA9211_REG_GPIO_2_3 (addr=0x59) */ +#define DA9211_GPIO2_PIN_SHIFT 0 +#define DA9211_GPIO2_PIN_MASK 0x03 +#define DA9211_GPIO2_PIN_GPI 0x00 +#define DA9211_GPIO5_PIN_BUCK_CLK 0x10 +#define DA9211_GPIO2_PIN_GPO_OD 0x02 +#define DA9211_GPIO2_PIN_GPO 0x03 +#define DA9211_GPIO2_TYPE 0x04 +#define DA9211_GPIO2_TYPE_GPI 0x00 +#define DA9211_GPIO2_TYPE_GPO 0x04 +#define DA9211_GPIO2_MODE 0x08 +#define DA9211_GPIO3_PIN_SHIFT 4 +#define DA9211_GPIO3_PIN_MASK 0x30 +#define DA9211_GPIO3_PIN_GPI 0x00 +#define DA9211_GPIO3_PIN_IERROR 0x10 +#define DA9211_GPIO3_PIN_GPO_OD 0x20 +#define DA9211_GPIO3_PIN_GPO 0x30 +#define DA9211_GPIO3_TYPE_SHIFT 0x40 +#define DA9211_GPIO3_TYPE_GPI 0x00 +#define DA9211_GPIO3_TYPE_GPO 0x40 +#define DA9211_GPIO3_MODE 0x80 + +/* DA9211_REG_GPIO_4 (addr=0x5A) */ +#define DA9211_GPIO4_PIN_SHIFT 0 +#define DA9211_GPIO4_PIN_MASK 0x03 +#define DA9211_GPIO4_PIN_GPI 0x00 +#define DA9211_GPIO4_PIN_GPO_OD 0x02 +#define DA9211_GPIO4_PIN_GPO 0x03 +#define DA9211_GPIO4_TYPE 0x04 +#define DA9211_GPIO4_TYPE_GPI 0x00 +#define DA9211_GPIO4_TYPE_GPO 0x04 +#define DA9211_GPIO4_MODE 0x08 + +/* DA9211_REG_BUCKA_CONT (addr=0x5D) */ +#define DA9211_BUCKA_EN 0x01 +#define DA9211_BUCKA_GPI_SHIFT 1 +#define DA9211_BUCKA_GPI_MASK 0x06 +#define DA9211_BUCKA_GPI_OFF 0x00 +#define DA9211_BUCKA_GPI_GPIO0 0x02 +#define DA9211_BUCKA_GPI_GPIO1 0x04 +#define DA9211_BUCKA_GPI_GPIO3 0x06 +#define DA9211_BUCKA_PD_DIS 0x08 +#define DA9211_VBUCKA_SEL 0x10 +#define DA9211_VBUCKA_SEL_A 0x00 +#define DA9211_VBUCKA_SEL_B 0x10 +#define DA9211_VBUCKA_GPI_SHIFT 5 +#define DA9211_VBUCKA_GPI_MASK 0x60 +#define DA9211_VBUCKA_GPI_OFF 0x00 +#define DA9211_VBUCKA_GPI_GPIO1 0x20 +#define DA9211_VBUCKA_GPI_GPIO2 0x40 +#define DA9211_VBUCKA_GPI_GPIO4 0x60 + +/* DA9211_REG_BUCKB_CONT (addr=0x5E) */ +#define DA9211_BUCKB_EN 0x01 +#define DA9211_BUCKB_GPI_SHIFT 1 +#define DA9211_BUCKB_GPI_MASK 0x06 +#define DA9211_BUCKB_GPI_OFF 0x00 +#define DA9211_BUCKB_GPI_GPIO0 0x02 +#define DA9211_BUCKB_GPI_GPIO1 0x04 +#define DA9211_BUCKB_GPI_GPIO3 0x06 +#define DA9211_BUCKB_PD_DIS 0x08 +#define DA9211_VBUCKB_SEL 0x10 +#define DA9211_VBUCKB_SEL_A 0x00 +#define DA9211_VBUCKB_SEL_B 0x10 +#define DA9211_VBUCKB_GPI_SHIFT 5 +#define DA9211_VBUCKB_GPI_MASK 0x60 +#define DA9211_VBUCKB_GPI_OFF 0x00 +#define DA9211_VBUCKB_GPI_GPIO1 0x20 +#define DA9211_VBUCKB_GPI_GPIO2 0x40 +#define DA9211_VBUCKB_GPI_GPIO4 0x60 + +/* DA9211_REG_BUCK_ILIM (addr=0xD0) */ +#define DA9211_BUCKA_ILIM_SHIFT 0 +#define DA9211_BUCKA_ILIM_MASK 0x0F +#define DA9211_BUCKB_ILIM_SHIFT 4 +#define DA9211_BUCKB_ILIM_MASK 0xF0 + +/* DA9211_REG_BUCKA_CONF (addr=0xD1) */ +#define DA9211_BUCKA_MODE_SHIFT 0 +#define DA9211_BUCKA_MODE_MASK 0x03 +#define DA9211_BUCKA_MODE_MANUAL 0x00 +#define DA9211_BUCKA_MODE_SLEEP 0x01 +#define DA9211_BUCKA_MODE_SYNC 0x02 +#define DA9211_BUCKA_MODE_AUTO 0x03 +#define DA9211_BUCKA_UP_CTRL_SHIFT 2 +#define DA9211_BUCKA_UP_CTRL_MASK 0x1C +#define DA9211_BUCKA_DOWN_CTRL_SHIFT 5 +#define DA9211_BUCKA_DOWN_CTRL_MASK 0xE0 + +/* DA9211_REG_BUCKB_CONF (addr=0xD2) */ +#define DA9211_BUCKB_MODE_SHIFT 0 +#define DA9211_BUCKB_MODE_MASK 0x03 +#define DA9211_BUCKB_MODE_MANUAL 0x00 +#define DA9211_BUCKB_MODE_SLEEP 0x01 +#define DA9211_BUCKB_MODE_SYNC 0x02 +#define DA9211_BUCKB_MODE_AUTO 0x03 +#define DA9211_BUCKB_UP_CTRL_SHIFT 2 +#define DA9211_BUCKB_UP_CTRL_MASK 0x1C +#define DA9211_BUCKB_DOWN_CTRL_SHIFT 5 +#define DA9211_BUCKB_DOWN_CTRL_MASK 0xE0 + +/* DA9211_REG_BUCK_CONF (addr=0xD3) */ +#define DA9211_PHASE_SEL_A_SHIFT 0 +#define DA9211_PHASE_SEL_A_MASK 0x03 +#define DA9211_PHASE_SEL_B_SHIFT 2 +#define DA9211_PHASE_SEL_B_MASK 0x04 +#define DA9211_PH_SH_EN_A_SHIFT 3 +#define DA9211_PH_SH_EN_A_MASK 0x08 +#define DA9211_PH_SH_EN_B_SHIFT 4 +#define DA9211_PH_SH_EN_B_MASK 0x10 + +/* DA9211_REG_VBUCKA_MAX (addr=0xD5) */ +#define DA9211_VBUCKA_BASE_SHIFT 0 +#define DA9211_VBUCKA_BASE_MASK 0x7F + +/* DA9211_REG_VBUCKB_MAX (addr=0xD6) */ +#define DA9211_VBUCKB_BASE_SHIFT 0 +#define DA9211_VBUCKB_BASE_MASK 0x7F + +/* DA9211_REG_VBUCKA/B_A/B (addr=0xD7/0xD8/0xD9/0xDA) */ +#define DA9211_VBUCK_SHIFT 0 +#define DA9211_VBUCK_MASK 0x7F +#define DA9211_VBUCK_BIAS 0 +#define DA9211_BUCK_SL 0x80 + +/* DA9211_REG_INTERFACE (addr=0x105) */ +#define DA9211_IF_BASE_ADDR_SHIFT 4 +#define DA9211_IF_BASE_ADDR_MASK 0xF0 + +/* DA9211_REG_CONFIG_E (addr=0x147) */ +#define DA9211_SLAVE_SEL 0x40 + +#endif /* __DA9211_REGISTERS_H__ */ diff --git a/drivers/regulator/db8500-prcmu.c b/drivers/regulator/db8500-prcmu.c new file mode 100644 index 000000000..751fe3658 --- /dev/null +++ b/drivers/regulator/db8500-prcmu.c @@ -0,0 +1,501 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Authors: Sundar Iyer for ST-Ericsson + * Bengt Jonsson for ST-Ericsson + * + * Power domain regulators on DB8500 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "dbx500-prcmu.h" + +static int db8500_regulator_enable(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), "regulator-%s-enable\n", + info->desc.name); + + if (!info->is_enabled) { + info->is_enabled = true; + if (!info->exclude_from_power_state) + power_state_active_enable(); + } + + return 0; +} + +static int db8500_regulator_disable(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + int ret = 0; + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), "regulator-%s-disable\n", + info->desc.name); + + if (info->is_enabled) { + info->is_enabled = false; + if (!info->exclude_from_power_state) + ret = power_state_active_disable(); + } + + return ret; +} + +static int db8500_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), "regulator-%s-is_enabled (is_enabled):" + " %i\n", info->desc.name, info->is_enabled); + + return info->is_enabled; +} + +/* db8500 regulator operations */ +static const struct regulator_ops db8500_regulator_ops = { + .enable = db8500_regulator_enable, + .disable = db8500_regulator_disable, + .is_enabled = db8500_regulator_is_enabled, +}; + +/* + * EPOD control + */ +static bool epod_on[NUM_EPOD_ID]; +static bool epod_ramret[NUM_EPOD_ID]; + +static int enable_epod(u16 epod_id, bool ramret) +{ + int ret; + + if (ramret) { + if (!epod_on[epod_id]) { + ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_RAMRET); + if (ret < 0) + return ret; + } + epod_ramret[epod_id] = true; + } else { + ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_ON); + if (ret < 0) + return ret; + epod_on[epod_id] = true; + } + + return 0; +} + +static int disable_epod(u16 epod_id, bool ramret) +{ + int ret; + + if (ramret) { + if (!epod_on[epod_id]) { + ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_OFF); + if (ret < 0) + return ret; + } + epod_ramret[epod_id] = false; + } else { + if (epod_ramret[epod_id]) { + ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_RAMRET); + if (ret < 0) + return ret; + } else { + ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_OFF); + if (ret < 0) + return ret; + } + epod_on[epod_id] = false; + } + + return 0; +} + +/* + * Regulator switch + */ +static int db8500_regulator_switch_enable(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-enable\n", + info->desc.name); + + ret = enable_epod(info->epod_id, info->is_ramret); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "regulator-switch-%s-enable: prcmu call failed\n", + info->desc.name); + goto out; + } + + info->is_enabled = true; +out: + return ret; +} + +static int db8500_regulator_switch_disable(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-disable\n", + info->desc.name); + + ret = disable_epod(info->epod_id, info->is_ramret); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), + "regulator_switch-%s-disable: prcmu call failed\n", + info->desc.name); + goto out; + } + + info->is_enabled = false; +out: + return ret; +} + +static int db8500_regulator_switch_is_enabled(struct regulator_dev *rdev) +{ + struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); + + if (info == NULL) + return -EINVAL; + + dev_vdbg(rdev_get_dev(rdev), + "regulator-switch-%s-is_enabled (is_enabled): %i\n", + info->desc.name, info->is_enabled); + + return info->is_enabled; +} + +static const struct regulator_ops db8500_regulator_switch_ops = { + .enable = db8500_regulator_switch_enable, + .disable = db8500_regulator_switch_disable, + .is_enabled = db8500_regulator_switch_is_enabled, +}; + +/* + * Regulator information + */ +static struct dbx500_regulator_info +dbx500_regulator_info[DB8500_NUM_REGULATORS] = { + [DB8500_REGULATOR_VAPE] = { + .desc = { + .name = "db8500-vape", + .of_match = of_match_ptr("db8500_vape"), + .id = DB8500_REGULATOR_VAPE, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VARM] = { + .desc = { + .name = "db8500-varm", + .of_match = of_match_ptr("db8500_varm"), + .id = DB8500_REGULATOR_VARM, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VMODEM] = { + .desc = { + .name = "db8500-vmodem", + .of_match = of_match_ptr("db8500_vmodem"), + .id = DB8500_REGULATOR_VMODEM, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VPLL] = { + .desc = { + .name = "db8500-vpll", + .of_match = of_match_ptr("db8500_vpll"), + .id = DB8500_REGULATOR_VPLL, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VSMPS1] = { + .desc = { + .name = "db8500-vsmps1", + .of_match = of_match_ptr("db8500_vsmps1"), + .id = DB8500_REGULATOR_VSMPS1, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VSMPS2] = { + .desc = { + .name = "db8500-vsmps2", + .of_match = of_match_ptr("db8500_vsmps2"), + .id = DB8500_REGULATOR_VSMPS2, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .fixed_uV = 1800000, + .n_voltages = 1, + }, + .exclude_from_power_state = true, + }, + [DB8500_REGULATOR_VSMPS3] = { + .desc = { + .name = "db8500-vsmps3", + .of_match = of_match_ptr("db8500_vsmps3"), + .id = DB8500_REGULATOR_VSMPS3, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_VRF1] = { + .desc = { + .name = "db8500-vrf1", + .of_match = of_match_ptr("db8500_vrf1"), + .id = DB8500_REGULATOR_VRF1, + .ops = &db8500_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + }, + [DB8500_REGULATOR_SWITCH_SVAMMDSP] = { + .desc = { + .name = "db8500-sva-mmdsp", + .of_match = of_match_ptr("db8500_sva_mmdsp"), + .id = DB8500_REGULATOR_SWITCH_SVAMMDSP, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SVAMMDSP, + }, + [DB8500_REGULATOR_SWITCH_SVAMMDSPRET] = { + .desc = { + .name = "db8500-sva-mmdsp-ret", + .of_match = of_match_ptr("db8500_sva_mmdsp_ret"), + .id = DB8500_REGULATOR_SWITCH_SVAMMDSPRET, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SVAMMDSP, + .is_ramret = true, + }, + [DB8500_REGULATOR_SWITCH_SVAPIPE] = { + .desc = { + .name = "db8500-sva-pipe", + .of_match = of_match_ptr("db8500_sva_pipe"), + .id = DB8500_REGULATOR_SWITCH_SVAPIPE, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SVAPIPE, + }, + [DB8500_REGULATOR_SWITCH_SIAMMDSP] = { + .desc = { + .name = "db8500-sia-mmdsp", + .of_match = of_match_ptr("db8500_sia_mmdsp"), + .id = DB8500_REGULATOR_SWITCH_SIAMMDSP, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SIAMMDSP, + }, + [DB8500_REGULATOR_SWITCH_SIAMMDSPRET] = { + .desc = { + .name = "db8500-sia-mmdsp-ret", + .of_match = of_match_ptr("db8500_sia_mmdsp_ret"), + .id = DB8500_REGULATOR_SWITCH_SIAMMDSPRET, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SIAMMDSP, + .is_ramret = true, + }, + [DB8500_REGULATOR_SWITCH_SIAPIPE] = { + .desc = { + .name = "db8500-sia-pipe", + .of_match = of_match_ptr("db8500_sia_pipe"), + .id = DB8500_REGULATOR_SWITCH_SIAPIPE, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SIAPIPE, + }, + [DB8500_REGULATOR_SWITCH_SGA] = { + .desc = { + .name = "db8500-sga", + .of_match = of_match_ptr("db8500_sga"), + .id = DB8500_REGULATOR_SWITCH_SGA, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_SGA, + }, + [DB8500_REGULATOR_SWITCH_B2R2_MCDE] = { + .desc = { + .name = "db8500-b2r2-mcde", + .of_match = of_match_ptr("db8500_b2r2_mcde"), + .id = DB8500_REGULATOR_SWITCH_B2R2_MCDE, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_B2R2_MCDE, + }, + [DB8500_REGULATOR_SWITCH_ESRAM12] = { + .desc = { + .name = "db8500-esram12", + .of_match = of_match_ptr("db8500_esram12"), + .id = DB8500_REGULATOR_SWITCH_ESRAM12, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_ESRAM12, + .is_enabled = true, + }, + [DB8500_REGULATOR_SWITCH_ESRAM12RET] = { + .desc = { + .name = "db8500-esram12-ret", + .of_match = of_match_ptr("db8500_esram12_ret"), + .id = DB8500_REGULATOR_SWITCH_ESRAM12RET, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_ESRAM12, + .is_ramret = true, + }, + [DB8500_REGULATOR_SWITCH_ESRAM34] = { + .desc = { + .name = "db8500-esram34", + .of_match = of_match_ptr("db8500_esram34"), + .id = DB8500_REGULATOR_SWITCH_ESRAM34, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_ESRAM34, + .is_enabled = true, + }, + [DB8500_REGULATOR_SWITCH_ESRAM34RET] = { + .desc = { + .name = "db8500-esram34-ret", + .of_match = of_match_ptr("db8500_esram34_ret"), + .id = DB8500_REGULATOR_SWITCH_ESRAM34RET, + .ops = &db8500_regulator_switch_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .epod_id = EPOD_ID_ESRAM34, + .is_ramret = true, + }, +}; + +static int db8500_regulator_probe(struct platform_device *pdev) +{ + struct regulator_init_data *db8500_init_data; + struct dbx500_regulator_info *info; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int err, i; + + db8500_init_data = dev_get_platdata(&pdev->dev); + + for (i = 0; i < ARRAY_SIZE(dbx500_regulator_info); i++) { + /* assign per-regulator data */ + info = &dbx500_regulator_info[i]; + + config.driver_data = info; + config.dev = &pdev->dev; + if (db8500_init_data) + config.init_data = &db8500_init_data[i]; + + rdev = devm_regulator_register(&pdev->dev, &info->desc, + &config); + if (IS_ERR(rdev)) { + err = PTR_ERR(rdev); + dev_err(&pdev->dev, "failed to register %s: err %i\n", + info->desc.name, err); + return err; + } + dev_dbg(&pdev->dev, "regulator-%s-probed\n", info->desc.name); + } + + ux500_regulator_debug_init(pdev, dbx500_regulator_info, + ARRAY_SIZE(dbx500_regulator_info)); + return 0; +} + +static void db8500_regulator_remove(struct platform_device *pdev) +{ + ux500_regulator_debug_exit(); +} + +static struct platform_driver db8500_regulator_driver = { + .driver = { + .name = "db8500-prcmu-regulators", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = db8500_regulator_probe, + .remove = db8500_regulator_remove, +}; + +static int __init db8500_regulator_init(void) +{ + return platform_driver_register(&db8500_regulator_driver); +} + +static void __exit db8500_regulator_exit(void) +{ + platform_driver_unregister(&db8500_regulator_driver); +} + +arch_initcall(db8500_regulator_init); +module_exit(db8500_regulator_exit); + +MODULE_AUTHOR("STMicroelectronics/ST-Ericsson"); +MODULE_DESCRIPTION("DB8500 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/dbx500-prcmu.c b/drivers/regulator/dbx500-prcmu.c new file mode 100644 index 000000000..a45c1e1ac --- /dev/null +++ b/drivers/regulator/dbx500-prcmu.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Authors: Sundar Iyer for ST-Ericsson + * Bengt Jonsson for ST-Ericsson + * + * UX500 common part of Power domain regulators + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "dbx500-prcmu.h" + +/* + * power state reference count + */ +static int power_state_active_cnt; /* will initialize to zero */ +static DEFINE_SPINLOCK(power_state_active_lock); + +void power_state_active_enable(void) +{ + unsigned long flags; + + spin_lock_irqsave(&power_state_active_lock, flags); + power_state_active_cnt++; + spin_unlock_irqrestore(&power_state_active_lock, flags); +} + +int power_state_active_disable(void) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&power_state_active_lock, flags); + if (power_state_active_cnt <= 0) { + pr_err("power state: unbalanced enable/disable calls\n"); + ret = -EINVAL; + goto out; + } + + power_state_active_cnt--; +out: + spin_unlock_irqrestore(&power_state_active_lock, flags); + return ret; +} + +#ifdef CONFIG_REGULATOR_DEBUG + +static int power_state_active_get(void) +{ + unsigned long flags; + int cnt; + + spin_lock_irqsave(&power_state_active_lock, flags); + cnt = power_state_active_cnt; + spin_unlock_irqrestore(&power_state_active_lock, flags); + + return cnt; +} + +static struct ux500_regulator_debug { + struct dentry *dir; + struct dbx500_regulator_info *regulator_array; + int num_regulators; + u8 *state_before_suspend; + u8 *state_after_suspend; +} rdebug; + +static int ux500_regulator_power_state_cnt_show(struct seq_file *s, void *p) +{ + /* print power state count */ + seq_printf(s, "ux500-regulator power state count: %i\n", + power_state_active_get()); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(ux500_regulator_power_state_cnt); + +static int ux500_regulator_status_show(struct seq_file *s, void *p) +{ + int i; + + /* print dump header */ + seq_puts(s, "ux500-regulator status:\n"); + seq_printf(s, "%31s : %8s : %8s\n", "current", "before", "after"); + + for (i = 0; i < rdebug.num_regulators; i++) { + struct dbx500_regulator_info *info; + /* Access per-regulator data */ + info = &rdebug.regulator_array[i]; + + /* print status */ + seq_printf(s, "%20s : %8s : %8s : %8s\n", + info->desc.name, + info->is_enabled ? "enabled" : "disabled", + rdebug.state_before_suspend[i] ? "enabled" : "disabled", + rdebug.state_after_suspend[i] ? "enabled" : "disabled"); + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(ux500_regulator_status); + +int +ux500_regulator_debug_init(struct platform_device *pdev, + struct dbx500_regulator_info *regulator_info, + int num_regulators) +{ + /* create directory */ + rdebug.dir = debugfs_create_dir("ux500-regulator", NULL); + + /* create "status" file */ + debugfs_create_file("status", 0444, rdebug.dir, &pdev->dev, + &ux500_regulator_status_fops); + + /* create "power-state-count" file */ + debugfs_create_file("power-state-count", 0444, rdebug.dir, + &pdev->dev, &ux500_regulator_power_state_cnt_fops); + + rdebug.regulator_array = regulator_info; + rdebug.num_regulators = num_regulators; + + rdebug.state_before_suspend = kzalloc(num_regulators, GFP_KERNEL); + if (!rdebug.state_before_suspend) + goto exit_destroy_power_state; + + rdebug.state_after_suspend = kzalloc(num_regulators, GFP_KERNEL); + if (!rdebug.state_after_suspend) + goto exit_free; + + return 0; + +exit_free: + kfree(rdebug.state_before_suspend); +exit_destroy_power_state: + debugfs_remove_recursive(rdebug.dir); + return -ENOMEM; +} + +int ux500_regulator_debug_exit(void) +{ + debugfs_remove_recursive(rdebug.dir); + kfree(rdebug.state_after_suspend); + kfree(rdebug.state_before_suspend); + + return 0; +} +#endif diff --git a/drivers/regulator/dbx500-prcmu.h b/drivers/regulator/dbx500-prcmu.h new file mode 100644 index 000000000..2fb3aaef9 --- /dev/null +++ b/drivers/regulator/dbx500-prcmu.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Author: Bengt Jonsson for ST-Ericsson, + * Jonas Aaberg for ST-Ericsson + */ + +#ifndef DBX500_REGULATOR_H +#define DBX500_REGULATOR_H + +#include + +/** + * struct dbx500_regulator_info - dbx500 regulator information + * @desc: regulator description + * @is_enabled: status of the regulator + * @epod_id: id for EPOD (power domain) + * @is_ramret: RAM retention switch for EPOD (power domain) + * + */ +struct dbx500_regulator_info { + struct regulator_desc desc; + bool is_enabled; + u16 epod_id; + bool is_ramret; + bool exclude_from_power_state; +}; + +void power_state_active_enable(void); +int power_state_active_disable(void); + + +#ifdef CONFIG_REGULATOR_DEBUG +int ux500_regulator_debug_init(struct platform_device *pdev, + struct dbx500_regulator_info *regulator_info, + int num_regulators); + +int ux500_regulator_debug_exit(void); +#else + +static inline int ux500_regulator_debug_init(struct platform_device *pdev, + struct dbx500_regulator_info *regulator_info, + int num_regulators) +{ + return 0; +} + +static inline int ux500_regulator_debug_exit(void) +{ + return 0; +} + +#endif +#endif diff --git a/drivers/regulator/devres.c b/drivers/regulator/devres.c new file mode 100644 index 000000000..615deba5d --- /dev/null +++ b/drivers/regulator/devres.c @@ -0,0 +1,806 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * devres.c -- Voltage/Current Regulator framework devres implementation. + * + * Copyright 2013 Linaro Ltd + */ + +#include +#include +#include +#include +#include +#include + +#include "internal.h" + +static void devm_regulator_release(struct device *dev, void *res) +{ + regulator_put(*(struct regulator **)res); +} + +static struct regulator *_devm_regulator_get(struct device *dev, const char *id, + enum regulator_get_type get_type) +{ + struct regulator **ptr, *regulator; + + ptr = devres_alloc(devm_regulator_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + regulator = _regulator_get(dev, id, get_type); + if (!IS_ERR(regulator)) { + *ptr = regulator; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return regulator; +} + +/** + * devm_regulator_get - Resource managed regulator_get() + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Managed regulator_get(). Regulators returned from this function are + * automatically regulator_put() on driver detach. See regulator_get() for more + * information. + */ +struct regulator *devm_regulator_get(struct device *dev, const char *id) +{ + return _devm_regulator_get(dev, id, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_get); + +/** + * devm_regulator_get_exclusive - Resource managed regulator_get_exclusive() + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Managed regulator_get_exclusive(). Regulators returned from this function + * are automatically regulator_put() on driver detach. See regulator_get() for + * more information. + */ +struct regulator *devm_regulator_get_exclusive(struct device *dev, + const char *id) +{ + return _devm_regulator_get(dev, id, EXCLUSIVE_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_get_exclusive); + +static void regulator_action_disable(void *d) +{ + struct regulator *r = (struct regulator *)d; + + regulator_disable(r); +} + +static int _devm_regulator_get_enable(struct device *dev, const char *id, + enum regulator_get_type get_type) +{ + struct regulator *r; + int ret; + + r = _devm_regulator_get(dev, id, get_type); + if (IS_ERR(r)) + return PTR_ERR(r); + + ret = regulator_enable(r); + if (!ret) + ret = devm_add_action_or_reset(dev, ®ulator_action_disable, r); + + if (ret) + devm_regulator_put(r); + + return ret; +} + +/** + * devm_regulator_get_enable_optional - Resource managed regulator get and enable + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Get and enable regulator for duration of the device life-time. + * regulator_disable() and regulator_put() are automatically called on driver + * detach. See regulator_get_optional() and regulator_enable() for more + * information. + */ +int devm_regulator_get_enable_optional(struct device *dev, const char *id) +{ + return _devm_regulator_get_enable(dev, id, OPTIONAL_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_get_enable_optional); + +/** + * devm_regulator_get_enable - Resource managed regulator get and enable + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Get and enable regulator for duration of the device life-time. + * regulator_disable() and regulator_put() are automatically called on driver + * detach. See regulator_get() and regulator_enable() for more + * information. + */ +int devm_regulator_get_enable(struct device *dev, const char *id) +{ + return _devm_regulator_get_enable(dev, id, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_get_enable); + +/** + * devm_regulator_get_optional - Resource managed regulator_get_optional() + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Managed regulator_get_optional(). Regulators returned from this + * function are automatically regulator_put() on driver detach. See + * regulator_get_optional() for more information. + */ +struct regulator *devm_regulator_get_optional(struct device *dev, + const char *id) +{ + return _devm_regulator_get(dev, id, OPTIONAL_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_get_optional); + +/** + * devm_regulator_get_enable_read_voltage - Resource managed regulator get and + * enable that returns the voltage + * @dev: device to supply + * @id: supply name or regulator ID. + * + * Get and enable regulator for duration of the device life-time. + * regulator_disable() and regulator_put() are automatically called on driver + * detach. See regulator_get_optional(), regulator_enable(), and + * regulator_get_voltage() for more information. + * + * This is a convenience function for supplies that provide a reference voltage + * where the consumer driver just needs to know the voltage and keep the + * regulator enabled. + * + * In cases where the supply is not strictly required, callers can check for + * -ENODEV error and handle it accordingly. + * + * Returns: voltage in microvolts on success, or an negative error number on failure. + */ +int devm_regulator_get_enable_read_voltage(struct device *dev, const char *id) +{ + struct regulator *r; + int ret; + + /* + * Since we need a real voltage, we use devm_regulator_get_optional() + * rather than getting a dummy regulator with devm_regulator_get() and + * then letting regulator_get_voltage() fail with -EINVAL. This way, the + * caller can handle the -ENODEV negative error number if needed instead + * of the ambiguous -EINVAL. + */ + r = devm_regulator_get_optional(dev, id); + if (IS_ERR(r)) + return PTR_ERR(r); + + ret = regulator_enable(r); + if (ret) + goto err_regulator_put; + + ret = devm_add_action_or_reset(dev, regulator_action_disable, r); + if (ret) + goto err_regulator_put; + + ret = regulator_get_voltage(r); + if (ret < 0) + goto err_release_action; + + return ret; + +err_release_action: + devm_release_action(dev, regulator_action_disable, r); +err_regulator_put: + devm_regulator_put(r); + + return ret; +} +EXPORT_SYMBOL_GPL(devm_regulator_get_enable_read_voltage); + +static int devm_regulator_match(struct device *dev, void *res, void *data) +{ + struct regulator **r = res; + if (!r || !*r) { + WARN_ON(!r || !*r); + return 0; + } + return *r == data; +} + +/** + * devm_regulator_put - Resource managed regulator_put() + * @regulator: regulator to free + * + * Deallocate a regulator allocated with devm_regulator_get(). Normally + * this function will not need to be called and the resource management + * code will ensure that the resource is freed. + */ +void devm_regulator_put(struct regulator *regulator) +{ + int rc; + + rc = devres_release(regulator->dev, devm_regulator_release, + devm_regulator_match, regulator); + if (rc != 0) + WARN_ON(rc); +} +EXPORT_SYMBOL_GPL(devm_regulator_put); + +struct regulator_bulk_devres { + struct regulator_bulk_data *consumers; + int num_consumers; +}; + +static void devm_regulator_bulk_release(struct device *dev, void *res) +{ + struct regulator_bulk_devres *devres = res; + + regulator_bulk_free(devres->num_consumers, devres->consumers); +} + +static int _devm_regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers, + enum regulator_get_type get_type) +{ + struct regulator_bulk_devres *devres; + int ret; + + devres = devres_alloc(devm_regulator_bulk_release, + sizeof(*devres), GFP_KERNEL); + if (!devres) + return -ENOMEM; + + ret = _regulator_bulk_get(dev, num_consumers, consumers, get_type); + if (!ret) { + devres->consumers = consumers; + devres->num_consumers = num_consumers; + devres_add(dev, devres); + } else { + devres_free(devres); + } + + return ret; +} + +/** + * devm_regulator_bulk_get - managed get multiple regulator consumers + * + * @dev: device to supply + * @num_consumers: number of consumers to register + * @consumers: configuration of consumers; clients are stored here. + * + * @return 0 on success, a negative error number on failure. + * + * This helper function allows drivers to get several regulator + * consumers in one operation with management, the regulators will + * automatically be freed when the device is unbound. If any of the + * regulators cannot be acquired then any regulators that were + * allocated will be freed before returning to the caller. + */ +int devm_regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers) +{ + return _devm_regulator_bulk_get(dev, num_consumers, consumers, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_get); + +/** + * devm_regulator_bulk_get_exclusive - managed exclusive get of multiple + * regulator consumers + * + * @dev: device to supply + * @num_consumers: number of consumers to register + * @consumers: configuration of consumers; clients are stored here. + * + * @return 0 on success, a negative error number on failure. + * + * This helper function allows drivers to exclusively get several + * regulator consumers in one operation with management, the regulators + * will automatically be freed when the device is unbound. If any of + * the regulators cannot be acquired then any regulators that were + * allocated will be freed before returning to the caller. + */ +int devm_regulator_bulk_get_exclusive(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers) +{ + return _devm_regulator_bulk_get(dev, num_consumers, consumers, EXCLUSIVE_GET); +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_exclusive); + +/** + * devm_regulator_bulk_get_const - devm_regulator_bulk_get() w/ const data + * + * @dev: device to supply + * @num_consumers: number of consumers to register + * @in_consumers: const configuration of consumers + * @out_consumers: in_consumers is copied here and this is passed to + * devm_regulator_bulk_get(). + * + * This is a convenience function to allow bulk regulator configuration + * to be stored "static const" in files. + * + * Return: 0 on success, a negative error number on failure. + */ +int devm_regulator_bulk_get_const(struct device *dev, int num_consumers, + const struct regulator_bulk_data *in_consumers, + struct regulator_bulk_data **out_consumers) +{ + *out_consumers = devm_kmemdup_array(dev, in_consumers, num_consumers, + sizeof(*in_consumers), GFP_KERNEL); + if (*out_consumers == NULL) + return -ENOMEM; + + return devm_regulator_bulk_get(dev, num_consumers, *out_consumers); +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_const); + +static int devm_regulator_bulk_match(struct device *dev, void *res, + void *data) +{ + struct regulator_bulk_devres *match = res; + struct regulator_bulk_data *target = data; + + /* + * We check the put uses same consumer list as the get did. + * We _could_ scan all entries in consumer array and check the + * regulators match but ATM I don't see the need. We can change this + * later if needed. + */ + return match->consumers == target; +} + +/** + * devm_regulator_bulk_put - Resource managed regulator_bulk_put() + * @consumers: consumers to free + * + * Deallocate regulators allocated with devm_regulator_bulk_get(). Normally + * this function will not need to be called and the resource management + * code will ensure that the resource is freed. + */ +void devm_regulator_bulk_put(struct regulator_bulk_data *consumers) +{ + int rc; + struct regulator *regulator = consumers[0].consumer; + + rc = devres_release(regulator->dev, devm_regulator_bulk_release, + devm_regulator_bulk_match, consumers); + if (rc != 0) + WARN_ON(rc); +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_put); + +static void devm_regulator_bulk_disable(void *res) +{ + struct regulator_bulk_devres *devres = res; + int i; + + for (i = 0; i < devres->num_consumers; i++) + regulator_disable(devres->consumers[i].consumer); +} + +/** + * devm_regulator_bulk_get_enable - managed get'n enable multiple regulators + * + * @dev: device to supply + * @num_consumers: number of consumers to register + * @id: list of supply names or regulator IDs + * + * @return 0 on success, a negative error number on failure. + * + * This helper function allows drivers to get several regulator + * consumers in one operation with management, the regulators will + * automatically be freed when the device is unbound. If any of the + * regulators cannot be acquired then any regulators that were + * allocated will be freed before returning to the caller. + */ +int devm_regulator_bulk_get_enable(struct device *dev, int num_consumers, + const char * const *id) +{ + struct regulator_bulk_devres *devres; + struct regulator_bulk_data *consumers; + int i, ret; + + devres = devm_kmalloc(dev, sizeof(*devres), GFP_KERNEL); + if (!devres) + return -ENOMEM; + + devres->consumers = devm_kcalloc(dev, num_consumers, sizeof(*consumers), + GFP_KERNEL); + consumers = devres->consumers; + if (!consumers) + return -ENOMEM; + + devres->num_consumers = num_consumers; + + for (i = 0; i < num_consumers; i++) + consumers[i].supply = id[i]; + + ret = devm_regulator_bulk_get(dev, num_consumers, consumers); + if (ret) + return ret; + + for (i = 0; i < num_consumers; i++) { + ret = regulator_enable(consumers[i].consumer); + if (ret) + goto unwind; + } + + ret = devm_add_action(dev, devm_regulator_bulk_disable, devres); + if (!ret) + return 0; + +unwind: + while (--i >= 0) + regulator_disable(consumers[i].consumer); + + devm_regulator_bulk_put(consumers); + + return ret; +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_enable); + +static void devm_rdev_release(struct device *dev, void *res) +{ + regulator_unregister(*(struct regulator_dev **)res); +} + +/** + * devm_regulator_register - Resource managed regulator_register() + * @dev: device to supply + * @regulator_desc: regulator to register + * @config: runtime configuration for regulator + * + * Called by regulator drivers to register a regulator. Returns a + * valid pointer to struct regulator_dev on success or an ERR_PTR() on + * error. The regulator will automatically be released when the device + * is unbound. + */ +struct regulator_dev *devm_regulator_register(struct device *dev, + const struct regulator_desc *regulator_desc, + const struct regulator_config *config) +{ + struct regulator_dev **ptr, *rdev; + + ptr = devres_alloc(devm_rdev_release, sizeof(*ptr), + GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + rdev = regulator_register(dev, regulator_desc, config); + if (!IS_ERR(rdev)) { + *ptr = rdev; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return rdev; +} +EXPORT_SYMBOL_GPL(devm_regulator_register); + +struct regulator_supply_alias_match { + struct device *dev; + const char *id; +}; + +static int devm_regulator_match_supply_alias(struct device *dev, void *res, + void *data) +{ + struct regulator_supply_alias_match *match = res; + struct regulator_supply_alias_match *target = data; + + return match->dev == target->dev && strcmp(match->id, target->id) == 0; +} + +static void devm_regulator_destroy_supply_alias(struct device *dev, void *res) +{ + struct regulator_supply_alias_match *match = res; + + regulator_unregister_supply_alias(match->dev, match->id); +} + +/** + * devm_regulator_register_supply_alias - Resource managed + * regulator_register_supply_alias() + * + * @dev: device to supply + * @id: supply name or regulator ID + * @alias_dev: device that should be used to lookup the supply + * @alias_id: supply name or regulator ID that should be used to lookup the + * supply + * + * The supply alias will automatically be unregistered when the source + * device is unbound. + */ +int devm_regulator_register_supply_alias(struct device *dev, const char *id, + struct device *alias_dev, + const char *alias_id) +{ + struct regulator_supply_alias_match *match; + int ret; + + match = devres_alloc(devm_regulator_destroy_supply_alias, + sizeof(struct regulator_supply_alias_match), + GFP_KERNEL); + if (!match) + return -ENOMEM; + + match->dev = dev; + match->id = id; + + ret = regulator_register_supply_alias(dev, id, alias_dev, alias_id); + if (ret < 0) { + devres_free(match); + return ret; + } + + devres_add(dev, match); + + return 0; +} +EXPORT_SYMBOL_GPL(devm_regulator_register_supply_alias); + +static void devm_regulator_unregister_supply_alias(struct device *dev, + const char *id) +{ + struct regulator_supply_alias_match match; + int rc; + + match.dev = dev; + match.id = id; + + rc = devres_release(dev, devm_regulator_destroy_supply_alias, + devm_regulator_match_supply_alias, &match); + if (rc != 0) + WARN_ON(rc); +} + +/** + * devm_regulator_bulk_register_supply_alias - Managed register + * multiple aliases + * + * @dev: device to supply + * @id: list of supply names or regulator IDs + * @alias_dev: device that should be used to lookup the supply + * @alias_id: list of supply names or regulator IDs that should be used to + * lookup the supply + * @num_id: number of aliases to register + * + * @return 0 on success, a negative error number on failure. + * + * This helper function allows drivers to register several supply + * aliases in one operation, the aliases will be automatically + * unregisters when the source device is unbound. If any of the + * aliases cannot be registered any aliases that were registered + * will be removed before returning to the caller. + */ +int devm_regulator_bulk_register_supply_alias(struct device *dev, + const char *const *id, + struct device *alias_dev, + const char *const *alias_id, + int num_id) +{ + int i; + int ret; + + for (i = 0; i < num_id; ++i) { + ret = devm_regulator_register_supply_alias(dev, id[i], + alias_dev, + alias_id[i]); + if (ret < 0) + goto err; + } + + return 0; + +err: + dev_err(dev, + "Failed to create supply alias %s,%s -> %s,%s\n", + id[i], dev_name(dev), alias_id[i], dev_name(alias_dev)); + + while (--i >= 0) + devm_regulator_unregister_supply_alias(dev, id[i]); + + return ret; +} +EXPORT_SYMBOL_GPL(devm_regulator_bulk_register_supply_alias); + +struct regulator_notifier_match { + struct regulator *regulator; + struct notifier_block *nb; +}; + +static int devm_regulator_match_notifier(struct device *dev, void *res, + void *data) +{ + struct regulator_notifier_match *match = res; + struct regulator_notifier_match *target = data; + + return match->regulator == target->regulator && match->nb == target->nb; +} + +static void devm_regulator_destroy_notifier(struct device *dev, void *res) +{ + struct regulator_notifier_match *match = res; + + regulator_unregister_notifier(match->regulator, match->nb); +} + +/** + * devm_regulator_register_notifier - Resource managed + * regulator_register_notifier + * + * @regulator: regulator source + * @nb: notifier block + * + * The notifier will be registers under the consumer device and be + * automatically be unregistered when the source device is unbound. + */ +int devm_regulator_register_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + struct regulator_notifier_match *match; + int ret; + + match = devres_alloc(devm_regulator_destroy_notifier, + sizeof(struct regulator_notifier_match), + GFP_KERNEL); + if (!match) + return -ENOMEM; + + match->regulator = regulator; + match->nb = nb; + + ret = regulator_register_notifier(regulator, nb); + if (ret < 0) { + devres_free(match); + return ret; + } + + devres_add(regulator->dev, match); + + return 0; +} +EXPORT_SYMBOL_GPL(devm_regulator_register_notifier); + +/** + * devm_regulator_unregister_notifier - Resource managed + * regulator_unregister_notifier() + * + * @regulator: regulator source + * @nb: notifier block + * + * Unregister a notifier registered with devm_regulator_register_notifier(). + * Normally this function will not need to be called and the resource + * management code will ensure that the resource is freed. + */ +void devm_regulator_unregister_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + struct regulator_notifier_match match; + int rc; + + match.regulator = regulator; + match.nb = nb; + + rc = devres_release(regulator->dev, devm_regulator_destroy_notifier, + devm_regulator_match_notifier, &match); + if (rc != 0) + WARN_ON(rc); +} +EXPORT_SYMBOL_GPL(devm_regulator_unregister_notifier); + +static void regulator_irq_helper_drop(void *res) +{ + regulator_irq_helper_cancel(&res); +} + +/** + * devm_regulator_irq_helper - resource managed registration of IRQ based + * regulator event/error notifier + * + * @dev: device to which lifetime the helper's lifetime is + * bound. + * @d: IRQ helper descriptor. + * @irq: IRQ used to inform events/errors to be notified. + * @irq_flags: Extra IRQ flags to be OR'ed with the default + * IRQF_ONESHOT when requesting the (threaded) irq. + * @common_errs: Errors which can be flagged by this IRQ for all rdevs. + * When IRQ is re-enabled these errors will be cleared + * from all associated regulators + * @per_rdev_errs: Optional error flag array describing errors specific + * for only some of the regulators. These errors will be + * or'ed with common errors. If this is given the array + * should contain rdev_amount flags. Can be set to NULL + * if there is no regulator specific error flags for this + * IRQ. + * @rdev: Array of pointers to regulators associated with this + * IRQ. + * @rdev_amount: Amount of regulators associated with this IRQ. + * + * Return: handle to irq_helper or an ERR_PTR() encoded negative error number. + */ +void *devm_regulator_irq_helper(struct device *dev, + const struct regulator_irq_desc *d, int irq, + int irq_flags, int common_errs, + int *per_rdev_errs, + struct regulator_dev **rdev, int rdev_amount) +{ + void *ptr; + int ret; + + ptr = regulator_irq_helper(dev, d, irq, irq_flags, common_errs, + per_rdev_errs, rdev, rdev_amount); + if (IS_ERR(ptr)) + return ptr; + + ret = devm_add_action_or_reset(dev, regulator_irq_helper_drop, ptr); + if (ret) + return ERR_PTR(ret); + + return ptr; +} +EXPORT_SYMBOL_GPL(devm_regulator_irq_helper); + +#if IS_ENABLED(CONFIG_OF) +static struct regulator *_devm_of_regulator_get(struct device *dev, struct device_node *node, + const char *id, enum regulator_get_type get_type) +{ + struct regulator **ptr, *regulator; + + ptr = devres_alloc(devm_regulator_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + regulator = _of_regulator_get(dev, node, id, get_type); + if (!IS_ERR(regulator)) { + *ptr = regulator; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return regulator; +} + +/** + * devm_of_regulator_get - Resource managed of_regulator_get() + * @dev: device used for dev_printk() messages and resource lifetime management + * @node: device node for regulator "consumer" + * @id: supply name or regulator ID. + * + * Managed of_regulator_get(). Regulators returned from this + * function are automatically regulator_put() on driver detach. See + * of_regulator_get() for more information. + */ +struct regulator *devm_of_regulator_get(struct device *dev, struct device_node *node, + const char *id) +{ + return _devm_of_regulator_get(dev, node, id, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(devm_of_regulator_get); + +/** + * devm_of_regulator_get_optional - Resource managed of_regulator_get_optional() + * @dev: device used for dev_printk() messages and resource lifetime management + * @node: device node for regulator "consumer" + * @id: supply name or regulator ID. + * + * Managed regulator_get_optional(). Regulators returned from this + * function are automatically regulator_put() on driver detach. See + * of_regulator_get_optional() for more information. + */ +struct regulator *devm_of_regulator_get_optional(struct device *dev, struct device_node *node, + const char *id) +{ + return _devm_of_regulator_get(dev, node, id, OPTIONAL_GET); +} +EXPORT_SYMBOL_GPL(devm_of_regulator_get_optional); +#endif diff --git a/drivers/regulator/dummy.c b/drivers/regulator/dummy.c new file mode 100644 index 000000000..c3e416fd3 --- /dev/null +++ b/drivers/regulator/dummy.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * dummy.c + * + * Copyright 2010 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + * + * This is useful for systems with mixed controllable and + * non-controllable regulators, as well as for allowing testing on + * systems with no controllable regulators. + */ + +#include +#include +#include +#include +#include + +#include "dummy.h" + +struct regulator_dev *dummy_regulator_rdev; + +static const struct regulator_init_data dummy_initdata = { + .constraints = { + .always_on = 1, + }, +}; + +static const struct regulator_ops dummy_ops; + +static const struct regulator_desc dummy_desc = { + .name = "regulator-dummy", + .id = -1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &dummy_ops, +}; + +static int dummy_regulator_probe(struct faux_device *fdev) +{ + struct regulator_config config = { }; + int ret; + + config.dev = &fdev->dev; + config.init_data = &dummy_initdata; + + dummy_regulator_rdev = devm_regulator_register(&fdev->dev, &dummy_desc, + &config); + if (IS_ERR(dummy_regulator_rdev)) { + ret = PTR_ERR(dummy_regulator_rdev); + pr_err("Failed to register regulator: %d\n", ret); + return ret; + } + + return 0; +} + +static struct faux_device_ops dummy_regulator_driver = { + .probe = dummy_regulator_probe, +}; + +static struct faux_device *dummy_fdev; + +void __init regulator_dummy_init(void) +{ + dummy_fdev = faux_device_create("reg-dummy", NULL, &dummy_regulator_driver); + if (!dummy_fdev) { + pr_err("Failed to allocate dummy regulator device\n"); + return; + } +} diff --git a/drivers/regulator/dummy.h b/drivers/regulator/dummy.h new file mode 100644 index 000000000..c79e28209 --- /dev/null +++ b/drivers/regulator/dummy.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * dummy.h + * + * Copyright 2010 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + * + * This is useful for systems with mixed controllable and + * non-controllable regulators, as well as for allowing testing on + * systems with no controllable regulators. + */ + +#ifndef _DUMMY_H +#define _DUMMY_H + +struct regulator_dev; + +extern struct regulator_dev *dummy_regulator_rdev; + +void __init regulator_dummy_init(void); + +#endif diff --git a/drivers/regulator/event.c b/drivers/regulator/event.c new file mode 100644 index 000000000..ea3bd4954 --- /dev/null +++ b/drivers/regulator/event.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regulator event over netlink + * + * Author: Naresh Solanki + */ + +#include +#include +#include +#include + +#include "regnl.h" + +static atomic_t reg_event_seqnum = ATOMIC_INIT(0); + +static const struct genl_multicast_group reg_event_mcgrps[] = { + { .name = REG_GENL_MCAST_GROUP_NAME, }, +}; + +static struct genl_family reg_event_genl_family __ro_after_init = { + .module = THIS_MODULE, + .name = REG_GENL_FAMILY_NAME, + .version = REG_GENL_VERSION, + .maxattr = REG_GENL_ATTR_MAX, + .mcgrps = reg_event_mcgrps, + .n_mcgrps = ARRAY_SIZE(reg_event_mcgrps), +}; + +int reg_generate_netlink_event(const char *reg_name, u64 event) +{ + struct sk_buff *skb; + struct nlattr *attr; + struct reg_genl_event *edata; + void *msg_header; + int size; + + /* allocate memory */ + size = nla_total_size(sizeof(struct reg_genl_event)) + + nla_total_size(0); + + skb = genlmsg_new(size, GFP_ATOMIC); + if (!skb) + return -ENOMEM; + + /* add the genetlink message header */ + msg_header = genlmsg_put(skb, 0, atomic_inc_return(®_event_seqnum), + ®_event_genl_family, 0, REG_GENL_CMD_EVENT); + if (!msg_header) { + nlmsg_free(skb); + return -ENOMEM; + } + + /* fill the data */ + attr = nla_reserve(skb, REG_GENL_ATTR_EVENT, sizeof(struct reg_genl_event)); + if (!attr) { + nlmsg_free(skb); + return -EINVAL; + } + + edata = nla_data(attr); + memset(edata, 0, sizeof(struct reg_genl_event)); + + strscpy(edata->reg_name, reg_name, sizeof(edata->reg_name)); + edata->event = event; + + /* send multicast genetlink message */ + genlmsg_end(skb, msg_header); + size = genlmsg_multicast(®_event_genl_family, skb, 0, 0, GFP_ATOMIC); + + return size; +} + +static int __init reg_event_genetlink_init(void) +{ + return genl_register_family(®_event_genl_family); +} + +static int __init reg_event_init(void) +{ + int error; + + /* create genetlink for acpi event */ + error = reg_event_genetlink_init(); + if (error) + pr_warn("Failed to create genetlink family for reg event\n"); + + return 0; +} + +fs_initcall(reg_event_init); diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c new file mode 100644 index 000000000..6557d8cbe --- /dev/null +++ b/drivers/regulator/fan53555.c @@ -0,0 +1,828 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// FAN53555 Fairchild Digitally Programmable TinyBuck Regulator Driver. +// +// Supported Part Numbers: +// FAN53555UC00X/01X/03X/04X/05X +// +// Copyright (c) 2012 Marvell Technology Ltd. +// Yunfan Zhang + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Voltage setting */ +#define FAN53555_VSEL0 0x00 +#define FAN53555_VSEL1 0x01 + +#define RK8602_VSEL0 0x06 +#define RK8602_VSEL1 0x07 + +#define TCS4525_VSEL0 0x11 +#define TCS4525_VSEL1 0x10 +#define TCS4525_TIME 0x13 +#define TCS4525_COMMAND 0x14 + +/* Control register */ +#define FAN53555_CONTROL 0x02 +/* IC Type */ +#define FAN53555_ID1 0x03 +/* IC mask version */ +#define FAN53555_ID2 0x04 +/* Monitor register */ +#define FAN53555_MONITOR 0x05 + +/* VSEL bit definitions */ +#define VSEL_BUCK_EN BIT(7) +#define VSEL_MODE BIT(6) +/* Chip ID and Version */ +#define DIE_ID 0x0F /* ID1 */ +#define DIE_REV 0x0F /* ID2 */ +/* Control bit definitions */ +#define CTL_OUTPUT_DISCHG BIT(7) +#define CTL_SLEW_MASK GENMASK(6, 4) +#define CTL_RESET BIT(2) +#define CTL_MODE_VSEL0_MODE BIT(0) +#define CTL_MODE_VSEL1_MODE BIT(1) + +#define FAN53555_NVOLTAGES 64 /* Numbers of voltages */ +#define FAN53526_NVOLTAGES 128 +#define RK8602_NVOLTAGES 160 + +#define TCS_VSEL0_MODE BIT(7) +#define TCS_VSEL1_MODE BIT(6) + +#define TCS_SLEW_MASK GENMASK(4, 3) + +enum fan53555_vendor { + FAN53526_VENDOR_FAIRCHILD = 0, + FAN53555_VENDOR_FAIRCHILD, + FAN53555_VENDOR_ROCKCHIP, /* RK8600, RK8601 */ + RK8602_VENDOR_ROCKCHIP, /* RK8602, RK8603 */ + FAN53555_VENDOR_SILERGY, + FAN53526_VENDOR_TCS, +}; + +enum { + FAN53526_CHIP_ID_01 = 1, +}; + +enum { + FAN53526_CHIP_REV_08 = 8, +}; + +/* IC Type */ +enum { + FAN53555_CHIP_ID_00 = 0, + FAN53555_CHIP_ID_01, + FAN53555_CHIP_ID_02, + FAN53555_CHIP_ID_03, + FAN53555_CHIP_ID_04, + FAN53555_CHIP_ID_05, + FAN53555_CHIP_ID_08 = 8, +}; + +enum { + RK8600_CHIP_ID_08 = 8, /* RK8600, RK8601 */ +}; + +enum { + RK8602_CHIP_ID_10 = 10, /* RK8602, RK8603 */ +}; + +enum { + TCS4525_CHIP_ID_12 = 12, +}; + +enum { + TCS4526_CHIP_ID_00 = 0, +}; + +/* IC mask revision */ +enum { + FAN53555_CHIP_REV_00 = 0x3, + FAN53555_CHIP_REV_13 = 0xf, + FAN53555_CHIP_REV_23 = 0xc, +}; + +enum { + SILERGY_SYR82X = 8, + SILERGY_SYR83X = 9, +}; + +struct fan53555_device_info { + enum fan53555_vendor vendor; + struct device *dev; + struct regulator_desc desc; + struct regulator_init_data *regulator; + /* IC Type and Rev */ + int chip_id; + int chip_rev; + /* Voltage setting register */ + unsigned int vol_reg; + unsigned int sleep_reg; + unsigned int en_reg; + unsigned int sleep_en_reg; + /* Voltage range and step(linear) */ + unsigned int vsel_min; + unsigned int vsel_step; + unsigned int vsel_count; + /* Mode */ + unsigned int mode_reg; + unsigned int mode_mask; + /* Sleep voltage cache */ + unsigned int sleep_vol_cache; + /* Slew rate */ + unsigned int slew_reg; + unsigned int slew_mask; + const unsigned int *ramp_delay_table; + unsigned int n_ramp_values; + unsigned int enable_time; + unsigned int slew_rate; +}; + +static int fan53555_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct fan53555_device_info *di = rdev_get_drvdata(rdev); + int ret; + + if (di->sleep_vol_cache == uV) + return 0; + ret = regulator_map_voltage_linear(rdev, uV, uV); + if (ret < 0) + return ret; + ret = regmap_update_bits(rdev->regmap, di->sleep_reg, + di->desc.vsel_mask, ret); + if (ret < 0) + return ret; + /* Cache the sleep voltage setting. + * Might not be the real voltage which is rounded */ + di->sleep_vol_cache = uV; + + return 0; +} + +static int fan53555_set_suspend_enable(struct regulator_dev *rdev) +{ + struct fan53555_device_info *di = rdev_get_drvdata(rdev); + + return regmap_update_bits(rdev->regmap, di->sleep_en_reg, + VSEL_BUCK_EN, VSEL_BUCK_EN); +} + +static int fan53555_set_suspend_disable(struct regulator_dev *rdev) +{ + struct fan53555_device_info *di = rdev_get_drvdata(rdev); + + return regmap_update_bits(rdev->regmap, di->sleep_en_reg, + VSEL_BUCK_EN, 0); +} + +static int fan53555_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct fan53555_device_info *di = rdev_get_drvdata(rdev); + + switch (mode) { + case REGULATOR_MODE_FAST: + regmap_update_bits(rdev->regmap, di->mode_reg, + di->mode_mask, di->mode_mask); + break; + case REGULATOR_MODE_NORMAL: + regmap_update_bits(rdev->regmap, di->vol_reg, di->mode_mask, 0); + break; + default: + return -EINVAL; + } + return 0; +} + +static unsigned int fan53555_get_mode(struct regulator_dev *rdev) +{ + struct fan53555_device_info *di = rdev_get_drvdata(rdev); + unsigned int val; + int ret = 0; + + ret = regmap_read(rdev->regmap, di->mode_reg, &val); + if (ret < 0) + return ret; + if (val & di->mode_mask) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static const unsigned int slew_rates[] = { + 64000, + 32000, + 16000, + 8000, + 4000, + 2000, + 1000, + 500, +}; + +static const unsigned int tcs_slew_rates[] = { + 18700, + 9300, + 4600, + 2300, +}; + +static const struct regulator_ops fan53555_regulator_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .set_suspend_voltage = fan53555_set_suspend_voltage, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = fan53555_set_mode, + .get_mode = fan53555_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_enable = fan53555_set_suspend_enable, + .set_suspend_disable = fan53555_set_suspend_disable, +}; + +static int fan53526_voltages_setup_fairchild(struct fan53555_device_info *di) +{ + /* Init voltage range and step */ + switch (di->chip_id) { + case FAN53526_CHIP_ID_01: + switch (di->chip_rev) { + case FAN53526_CHIP_REV_08: + di->vsel_min = 600000; + di->vsel_step = 6250; + break; + default: + dev_err(di->dev, + "Chip ID %d with rev %d not supported!\n", + di->chip_id, di->chip_rev); + return -EINVAL; + } + break; + default: + dev_err(di->dev, + "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + + di->slew_reg = FAN53555_CONTROL; + di->slew_mask = CTL_SLEW_MASK; + di->ramp_delay_table = slew_rates; + di->n_ramp_values = ARRAY_SIZE(slew_rates); + di->enable_time = 250; + di->vsel_count = FAN53526_NVOLTAGES; + + return 0; +} + +static int fan53555_voltages_setup_fairchild(struct fan53555_device_info *di) +{ + /* Init voltage range and step */ + switch (di->chip_id) { + case FAN53555_CHIP_ID_00: + switch (di->chip_rev) { + case FAN53555_CHIP_REV_00: + di->vsel_min = 600000; + di->vsel_step = 10000; + di->enable_time = 400; + break; + case FAN53555_CHIP_REV_13: + di->vsel_min = 800000; + di->vsel_step = 10000; + di->enable_time = 400; + break; + case FAN53555_CHIP_REV_23: + di->vsel_min = 600000; + di->vsel_step = 12500; + di->enable_time = 400; + break; + default: + dev_err(di->dev, + "Chip ID %d with rev %d not supported!\n", + di->chip_id, di->chip_rev); + return -EINVAL; + } + break; + case FAN53555_CHIP_ID_01: + case FAN53555_CHIP_ID_03: + case FAN53555_CHIP_ID_05: + di->vsel_min = 600000; + di->vsel_step = 10000; + di->enable_time = 400; + break; + case FAN53555_CHIP_ID_08: + di->vsel_min = 600000; + di->vsel_step = 10000; + di->enable_time = 175; + break; + case FAN53555_CHIP_ID_04: + di->vsel_min = 603000; + di->vsel_step = 12826; + di->enable_time = 400; + break; + default: + dev_err(di->dev, + "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + di->slew_reg = FAN53555_CONTROL; + di->slew_mask = CTL_SLEW_MASK; + di->ramp_delay_table = slew_rates; + di->n_ramp_values = ARRAY_SIZE(slew_rates); + di->vsel_count = FAN53555_NVOLTAGES; + + return 0; +} + +static int fan53555_voltages_setup_rockchip(struct fan53555_device_info *di) +{ + /* Init voltage range and step */ + switch (di->chip_id) { + case RK8600_CHIP_ID_08: + di->vsel_min = 712500; + di->vsel_step = 12500; + break; + default: + dev_err(di->dev, + "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + di->slew_reg = FAN53555_CONTROL; + di->slew_mask = CTL_SLEW_MASK; + di->ramp_delay_table = slew_rates; + di->n_ramp_values = ARRAY_SIZE(slew_rates); + di->enable_time = 360; + di->vsel_count = FAN53555_NVOLTAGES; + + return 0; +} + +static int rk8602_voltages_setup_rockchip(struct fan53555_device_info *di) +{ + /* Init voltage range and step */ + switch (di->chip_id) { + case RK8602_CHIP_ID_10: + di->vsel_min = 500000; + di->vsel_step = 6250; + break; + default: + dev_err(di->dev, + "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + di->slew_reg = FAN53555_CONTROL; + di->slew_mask = CTL_SLEW_MASK; + di->ramp_delay_table = slew_rates; + di->n_ramp_values = ARRAY_SIZE(slew_rates); + di->enable_time = 360; + di->vsel_count = RK8602_NVOLTAGES; + + return 0; +} + +static inline unsigned int fan53555_map_mode(unsigned int mode) +{ + switch (mode) { + case FAN53555_REGULATOR_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case FAN53555_REGULATOR_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int fan53555_voltages_setup_silergy(struct fan53555_device_info *di) +{ + /* Init voltage range and step */ + switch (di->chip_id) { + case SILERGY_SYR82X: + case SILERGY_SYR83X: + di->vsel_min = 712500; + di->vsel_step = 12500; + break; + default: + dev_err(di->dev, + "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + di->slew_reg = FAN53555_CONTROL; + di->slew_mask = CTL_SLEW_MASK; + di->ramp_delay_table = slew_rates; + di->n_ramp_values = ARRAY_SIZE(slew_rates); + di->enable_time = 400; + di->vsel_count = FAN53555_NVOLTAGES; + + return 0; +} + +static int fan53526_voltages_setup_tcs(struct fan53555_device_info *di) +{ + switch (di->chip_id) { + case TCS4525_CHIP_ID_12: + case TCS4526_CHIP_ID_00: + di->slew_reg = TCS4525_TIME; + di->slew_mask = TCS_SLEW_MASK; + di->ramp_delay_table = tcs_slew_rates; + di->n_ramp_values = ARRAY_SIZE(tcs_slew_rates); + + /* Init voltage range and step */ + di->vsel_min = 600000; + di->vsel_step = 6250; + di->vsel_count = FAN53526_NVOLTAGES; + break; + default: + dev_err(di->dev, "Chip ID %d not supported!\n", di->chip_id); + return -EINVAL; + } + + return 0; +} + +/* For 00,01,03,05 options: + * VOUT = 0.60V + NSELx * 10mV, from 0.60 to 1.23V. + * For 04 option: + * VOUT = 0.603V + NSELx * 12.826mV, from 0.603 to 1.411V. + * */ +static int fan53555_device_setup(struct fan53555_device_info *di, + struct fan53555_platform_data *pdata) +{ + int ret = 0; + + /* Setup voltage control register */ + switch (di->vendor) { + case FAN53526_VENDOR_FAIRCHILD: + case FAN53555_VENDOR_FAIRCHILD: + case FAN53555_VENDOR_ROCKCHIP: + case FAN53555_VENDOR_SILERGY: + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->sleep_reg = FAN53555_VSEL0; + di->vol_reg = FAN53555_VSEL1; + break; + case FAN53555_VSEL_ID_1: + di->sleep_reg = FAN53555_VSEL1; + di->vol_reg = FAN53555_VSEL0; + break; + default: + dev_err(di->dev, "Invalid VSEL ID!\n"); + return -EINVAL; + } + di->sleep_en_reg = di->sleep_reg; + di->en_reg = di->vol_reg; + break; + case RK8602_VENDOR_ROCKCHIP: + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->sleep_reg = RK8602_VSEL0; + di->vol_reg = RK8602_VSEL1; + di->sleep_en_reg = FAN53555_VSEL0; + di->en_reg = FAN53555_VSEL1; + break; + case FAN53555_VSEL_ID_1: + di->sleep_reg = RK8602_VSEL1; + di->vol_reg = RK8602_VSEL0; + di->sleep_en_reg = FAN53555_VSEL1; + di->en_reg = FAN53555_VSEL0; + break; + default: + dev_err(di->dev, "Invalid VSEL ID!\n"); + return -EINVAL; + } + break; + case FAN53526_VENDOR_TCS: + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->sleep_reg = TCS4525_VSEL0; + di->vol_reg = TCS4525_VSEL1; + break; + case FAN53555_VSEL_ID_1: + di->sleep_reg = TCS4525_VSEL1; + di->vol_reg = TCS4525_VSEL0; + break; + default: + dev_err(di->dev, "Invalid VSEL ID!\n"); + return -EINVAL; + } + di->sleep_en_reg = di->sleep_reg; + di->en_reg = di->vol_reg; + break; + default: + dev_err(di->dev, "vendor %d not supported!\n", di->vendor); + return -EINVAL; + } + + /* Setup mode control register */ + switch (di->vendor) { + case FAN53526_VENDOR_FAIRCHILD: + di->mode_reg = FAN53555_CONTROL; + + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->mode_mask = CTL_MODE_VSEL1_MODE; + break; + case FAN53555_VSEL_ID_1: + di->mode_mask = CTL_MODE_VSEL0_MODE; + break; + } + break; + case FAN53555_VENDOR_FAIRCHILD: + case FAN53555_VENDOR_ROCKCHIP: + case FAN53555_VENDOR_SILERGY: + di->mode_reg = di->vol_reg; + di->mode_mask = VSEL_MODE; + break; + case RK8602_VENDOR_ROCKCHIP: + di->mode_mask = VSEL_MODE; + + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->mode_reg = FAN53555_VSEL1; + break; + case FAN53555_VSEL_ID_1: + di->mode_reg = FAN53555_VSEL0; + break; + } + break; + case FAN53526_VENDOR_TCS: + di->mode_reg = TCS4525_COMMAND; + + switch (pdata->sleep_vsel_id) { + case FAN53555_VSEL_ID_0: + di->mode_mask = TCS_VSEL1_MODE; + break; + case FAN53555_VSEL_ID_1: + di->mode_mask = TCS_VSEL0_MODE; + break; + } + break; + default: + dev_err(di->dev, "vendor %d not supported!\n", di->vendor); + return -EINVAL; + } + + /* Setup voltage range */ + switch (di->vendor) { + case FAN53526_VENDOR_FAIRCHILD: + ret = fan53526_voltages_setup_fairchild(di); + break; + case FAN53555_VENDOR_FAIRCHILD: + ret = fan53555_voltages_setup_fairchild(di); + break; + case FAN53555_VENDOR_ROCKCHIP: + ret = fan53555_voltages_setup_rockchip(di); + break; + case RK8602_VENDOR_ROCKCHIP: + ret = rk8602_voltages_setup_rockchip(di); + break; + case FAN53555_VENDOR_SILERGY: + ret = fan53555_voltages_setup_silergy(di); + break; + case FAN53526_VENDOR_TCS: + ret = fan53526_voltages_setup_tcs(di); + break; + default: + dev_err(di->dev, "vendor %d not supported!\n", di->vendor); + return -EINVAL; + } + + return ret; +} + +static void fan53555_device_mode_map_setup(struct fan53555_device_info *di) +{ + switch (di->vendor) { + case FAN53555_VENDOR_SILERGY: + di->desc.of_map_mode = fan53555_map_mode; + break; + default: + break; + } +} + +static int fan53555_regulator_register(struct fan53555_device_info *di, + struct regulator_config *config) +{ + struct regulator_desc *rdesc = &di->desc; + struct regulator_dev *rdev; + + rdesc->name = "fan53555-reg"; + rdesc->supply_name = "vin"; + rdesc->ops = &fan53555_regulator_ops; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->n_voltages = di->vsel_count; + rdesc->enable_reg = di->en_reg; + rdesc->enable_mask = VSEL_BUCK_EN; + rdesc->min_uV = di->vsel_min; + rdesc->uV_step = di->vsel_step; + rdesc->vsel_reg = di->vol_reg; + rdesc->vsel_mask = BIT(fls(di->vsel_count - 1)) - 1; + rdesc->ramp_reg = di->slew_reg; + rdesc->ramp_mask = di->slew_mask; + rdesc->ramp_delay_table = di->ramp_delay_table; + rdesc->n_ramp_values = di->n_ramp_values; + rdesc->enable_time = di->enable_time; + rdesc->owner = THIS_MODULE; + + rdev = devm_regulator_register(di->dev, &di->desc, config); + return PTR_ERR_OR_ZERO(rdev); +} + +static const struct regmap_config fan53555_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static struct fan53555_platform_data *fan53555_parse_dt(struct device *dev, + struct device_node *np, + const struct regulator_desc *desc) +{ + struct fan53555_platform_data *pdata; + int ret; + u32 tmp; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + pdata->regulator = of_get_regulator_init_data(dev, np, desc); + + ret = of_property_read_u32(np, "fcs,suspend-voltage-selector", + &tmp); + if (!ret) + pdata->sleep_vsel_id = tmp; + + return pdata; +} + +static const struct of_device_id __maybe_unused fan53555_dt_ids[] = { + { + .compatible = "fcs,fan53526", + .data = (void *)FAN53526_VENDOR_FAIRCHILD, + }, { + .compatible = "fcs,fan53555", + .data = (void *)FAN53555_VENDOR_FAIRCHILD + }, { + .compatible = "rockchip,rk8600", + .data = (void *)FAN53555_VENDOR_ROCKCHIP + }, { + .compatible = "rockchip,rk8602", + .data = (void *)RK8602_VENDOR_ROCKCHIP + }, { + .compatible = "silergy,syr827", + .data = (void *)FAN53555_VENDOR_SILERGY, + }, { + .compatible = "silergy,syr828", + .data = (void *)FAN53555_VENDOR_SILERGY, + }, { + .compatible = "tcs,tcs4525", + .data = (void *)FAN53526_VENDOR_TCS + }, { + .compatible = "tcs,tcs4526", + .data = (void *)FAN53526_VENDOR_TCS + }, + { } +}; +MODULE_DEVICE_TABLE(of, fan53555_dt_ids); + +static int fan53555_regulator_probe(struct i2c_client *client) +{ + struct device_node *np = client->dev.of_node; + struct fan53555_device_info *di; + struct fan53555_platform_data *pdata; + struct regulator_config config = { }; + struct regmap *regmap; + unsigned int val; + int ret; + + di = devm_kzalloc(&client->dev, sizeof(struct fan53555_device_info), + GFP_KERNEL); + if (!di) + return -ENOMEM; + + di->vendor = (uintptr_t)i2c_get_match_data(client); + + fan53555_device_mode_map_setup(di); + + pdata = dev_get_platdata(&client->dev); + if (!pdata) + pdata = fan53555_parse_dt(&client->dev, np, &di->desc); + + if (!pdata || !pdata->regulator) + return dev_err_probe(&client->dev, -ENODEV, + "Platform data not found!\n"); + + di->regulator = pdata->regulator; + if (!dev_fwnode(&client->dev)) { + /* if no ramp constraint set, get the pdata ramp_delay */ + if (!di->regulator->constraints.ramp_delay) { + if (pdata->slew_rate >= ARRAY_SIZE(slew_rates)) + return dev_err_probe(&client->dev, -EINVAL, + "Invalid slew_rate\n"); + + di->regulator->constraints.ramp_delay + = slew_rates[pdata->slew_rate]; + } + } + + regmap = devm_regmap_init_i2c(client, &fan53555_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(&client->dev, PTR_ERR(regmap), + "Failed to allocate regmap!\n"); + + di->dev = &client->dev; + i2c_set_clientdata(client, di); + /* Get chip ID */ + ret = regmap_read(regmap, FAN53555_ID1, &val); + if (ret < 0) + return dev_err_probe(&client->dev, ret, "Failed to get chip ID!\n"); + + di->chip_id = val & DIE_ID; + /* Get chip revision */ + ret = regmap_read(regmap, FAN53555_ID2, &val); + if (ret < 0) + return dev_err_probe(&client->dev, ret, "Failed to get chip Rev!\n"); + + di->chip_rev = val & DIE_REV; + dev_info(&client->dev, "FAN53555 Option[%d] Rev[%d] Detected!\n", + di->chip_id, di->chip_rev); + /* Device init */ + ret = fan53555_device_setup(di, pdata); + if (ret < 0) + return dev_err_probe(&client->dev, ret, "Failed to setup device!\n"); + + /* Register regulator */ + config.dev = di->dev; + config.init_data = di->regulator; + config.regmap = regmap; + config.driver_data = di; + config.of_node = np; + + ret = fan53555_regulator_register(di, &config); + if (ret < 0) + dev_err_probe(&client->dev, ret, "Failed to register regulator!\n"); + + return ret; +} + +static const struct i2c_device_id fan53555_id[] = { + { + .name = "fan53526", + .driver_data = FAN53526_VENDOR_FAIRCHILD + }, { + .name = "fan53555", + .driver_data = FAN53555_VENDOR_FAIRCHILD + }, { + .name = "rk8600", + .driver_data = FAN53555_VENDOR_ROCKCHIP + }, { + .name = "rk8602", + .driver_data = RK8602_VENDOR_ROCKCHIP + }, { + .name = "syr827", + .driver_data = FAN53555_VENDOR_SILERGY + }, { + .name = "syr828", + .driver_data = FAN53555_VENDOR_SILERGY + }, { + .name = "tcs4525", + .driver_data = FAN53526_VENDOR_TCS + }, { + .name = "tcs4526", + .driver_data = FAN53526_VENDOR_TCS + }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, fan53555_id); + +static struct i2c_driver fan53555_regulator_driver = { + .driver = { + .name = "fan53555-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(fan53555_dt_ids), + }, + .probe = fan53555_regulator_probe, + .id_table = fan53555_id, +}; + +module_i2c_driver(fan53555_regulator_driver); + +MODULE_AUTHOR("Yunfan Zhang "); +MODULE_DESCRIPTION("FAN53555 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/fan53880.c b/drivers/regulator/fan53880.c new file mode 100644 index 000000000..79ba705ec --- /dev/null +++ b/drivers/regulator/fan53880.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include +#include +#include +#include + +enum fan53880_regulator_ids { + FAN53880_LDO1, + FAN53880_LDO2, + FAN53880_LDO3, + FAN53880_LDO4, + FAN53880_BUCK, + FAN53880_BOOST, +}; + +enum fan53880_registers { + FAN53880_PRODUCT_ID = 0x00, + FAN53880_SILICON_REV, + FAN53880_BUCKVOUT, + FAN53880_BOOSTVOUT, + FAN53880_LDO1VOUT, + FAN53880_LDO2VOUT, + FAN53880_LDO3VOUT, + FAN53880_LDO4VOUT, + FAN53880_IOUT, + FAN53880_ENABLE, + FAN53880_ENABLE_BOOST, +}; + +#define FAN53880_ID 0x01 + +static const struct regulator_ops fan53880_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define FAN53880_LDO(_num, _supply, _default) \ + [FAN53880_LDO ## _num] = { \ + .name = "LDO"#_num, \ + .of_match = "LDO"#_num, \ + .regulators_node = "regulators", \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .linear_ranges = (struct linear_range[]) { \ + REGULATOR_LINEAR_RANGE(_default, 0x0, 0x0, 0), \ + REGULATOR_LINEAR_RANGE(800000, 0xf, 0x73, 25000), \ + }, \ + .n_linear_ranges = 2, \ + .n_voltages = 0x74, \ + .vsel_reg = FAN53880_LDO ## _num ## VOUT, \ + .vsel_mask = 0x7f, \ + .enable_reg = FAN53880_ENABLE, \ + .enable_mask = BIT(_num - 1), \ + .enable_time = 150, \ + .supply_name = _supply, \ + .ops = &fan53880_ops, \ + } + +static const struct regulator_desc fan53880_regulators[] = { + FAN53880_LDO(1, "VIN12", 2800000), + FAN53880_LDO(2, "VIN12", 2800000), + FAN53880_LDO(3, "VIN3", 1800000), + FAN53880_LDO(4, "VIN4", 1800000), + [FAN53880_BUCK] = { + .name = "BUCK", + .of_match = "BUCK", + .regulators_node = "regulators", + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1100000, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(600000, 0x1f, 0xf7, 12500), + }, + .n_linear_ranges = 2, + .n_voltages = 0xf8, + .vsel_reg = FAN53880_BUCKVOUT, + .vsel_mask = 0xff, + .enable_reg = FAN53880_ENABLE, + .enable_mask = 0x10, + .enable_time = 480, + .supply_name = "PVIN", + .ops = &fan53880_ops, + }, + [FAN53880_BOOST] = { + .name = "BOOST", + .of_match = "BOOST", + .regulators_node = "regulators", + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(5000000, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(3000000, 0x4, 0x70, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 0x71, + .vsel_reg = FAN53880_BOOSTVOUT, + .vsel_mask = 0x7f, + .enable_reg = FAN53880_ENABLE_BOOST, + .enable_mask = 0xff, + .enable_time = 580, + .supply_name = "PVIN", + .ops = &fan53880_ops, + }, +}; + +static const struct regmap_config fan53880_regmap = { + .reg_bits = 8, + .val_bits = 8, + .max_register = FAN53880_ENABLE_BOOST, +}; + +static int fan53880_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + int i, ret; + unsigned int data; + + regmap = devm_regmap_init_i2c(i2c, &fan53880_regmap); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); + return ret; + } + + ret = regmap_read(regmap, FAN53880_PRODUCT_ID, &data); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read PRODUCT_ID: %d\n", ret); + return ret; + } + if (data != FAN53880_ID) { + dev_err(&i2c->dev, "Unsupported device id: 0x%x.\n", data); + return -ENODEV; + } + + config.dev = &i2c->dev; + config.init_data = NULL; + + for (i = 0; i < ARRAY_SIZE(fan53880_regulators); i++) { + rdev = devm_regulator_register(&i2c->dev, + &fan53880_regulators[i], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&i2c->dev, "Failed to register %s: %d\n", + fan53880_regulators[i].name, ret); + return ret; + } + } + + return 0; +} + +static const struct of_device_id fan53880_dt_ids[] = { + { .compatible = "onnn,fan53880", }, + {} +}; +MODULE_DEVICE_TABLE(of, fan53880_dt_ids); + +static const struct i2c_device_id fan53880_i2c_id[] = { + { .name = "fan53880" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, fan53880_i2c_id); + +static struct i2c_driver fan53880_regulator_driver = { + .driver = { + .name = "fan53880", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = fan53880_dt_ids, + }, + .probe = fan53880_i2c_probe, + .id_table = fan53880_i2c_id, +}; +module_i2c_driver(fan53880_regulator_driver); + +MODULE_DESCRIPTION("FAN53880 PMIC voltage regulator driver"); +MODULE_AUTHOR("Christoph Fritz "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/fixed-helper.c b/drivers/regulator/fixed-helper.c new file mode 100644 index 000000000..ba5551ac0 --- /dev/null +++ b/drivers/regulator/fixed-helper.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include + +struct fixed_regulator_data { + struct fixed_voltage_config cfg; + struct regulator_init_data init_data; + struct platform_device pdev; +}; + +static void regulator_fixed_release(struct device *dev) +{ + struct fixed_regulator_data *data = container_of(dev, + struct fixed_regulator_data, pdev.dev); + kfree_const(data->cfg.supply_name); + kfree(data); +} + +/** + * regulator_register_always_on - register an always-on regulator with a fixed name + * @id: platform device id + * @name: name to be used for the regulator + * @supplies: consumers for this regulator + * @num_supplies: number of consumers + * @uv: voltage in microvolts + * + * Return: Pointer to registered platform device, or %NULL if memory allocation fails. + */ +struct platform_device *regulator_register_always_on(int id, const char *name, + struct regulator_consumer_supply *supplies, int num_supplies, int uv) +{ + struct fixed_regulator_data *data; + + data = kzalloc_obj(*data); + if (!data) + return NULL; + + data->cfg.supply_name = kstrdup_const(name, GFP_KERNEL); + if (!data->cfg.supply_name) { + kfree(data); + return NULL; + } + + data->cfg.microvolts = uv; + data->cfg.enabled_at_boot = 1; + data->cfg.init_data = &data->init_data; + + data->init_data.constraints.always_on = 1; + data->init_data.consumer_supplies = supplies; + data->init_data.num_consumer_supplies = num_supplies; + + data->pdev.name = "reg-fixed-voltage"; + data->pdev.id = id; + data->pdev.dev.platform_data = &data->cfg; + data->pdev.dev.release = regulator_fixed_release; + + platform_device_register(&data->pdev); + + return &data->pdev; +} diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c new file mode 100644 index 000000000..417d282dd --- /dev/null +++ b/drivers/regulator/fixed.c @@ -0,0 +1,402 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * fixed.c + * + * Copyright 2008 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + * + * Copyright (c) 2009 Nokia Corporation + * Roger Quadros + * + * This is useful for systems with mixed controllable and + * non-controllable regulators, as well as for allowing testing on + * systems with no controllable regulators. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct fixed_voltage_data { + struct regulator_desc desc; + struct regulator_dev *dev; + + struct clk *enable_clock; + unsigned int enable_counter; + int performance_state; +}; + +struct fixed_dev_type { + bool has_enable_clock; + bool has_performance_state; +}; + +static int reg_clock_enable(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + int ret = 0; + + ret = clk_prepare_enable(priv->enable_clock); + if (ret) + return ret; + + priv->enable_counter++; + + return ret; +} + +static int reg_clock_disable(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + + clk_disable_unprepare(priv->enable_clock); + priv->enable_counter--; + + return 0; +} + +static int reg_domain_enable(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + struct device *dev = rdev->dev.parent; + int ret; + + ret = dev_pm_genpd_set_performance_state(dev, priv->performance_state); + if (ret) + return ret; + + priv->enable_counter++; + + return ret; +} + +static int reg_domain_disable(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + struct device *dev = rdev->dev.parent; + int ret; + + ret = dev_pm_genpd_set_performance_state(dev, 0); + if (ret) + return ret; + + priv->enable_counter--; + + return 0; +} + +static int reg_is_enabled(struct regulator_dev *rdev) +{ + struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); + + return priv->enable_counter > 0; +} + +static irqreturn_t reg_fixed_under_voltage_irq_handler(int irq, void *data) +{ + struct fixed_voltage_data *priv = data; + struct regulator_dev *rdev = priv->dev; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + + return IRQ_HANDLED; +} + +/** + * reg_fixed_get_irqs - Get and register the optional IRQ for fixed voltage + * regulator. + * @dev: Pointer to the device structure. + * @priv: Pointer to fixed_voltage_data structure containing private data. + * + * This function tries to get the IRQ from the device firmware node. + * If it's an optional IRQ and not found, it returns 0. + * Otherwise, it attempts to request the threaded IRQ. + * + * Return: 0 on success, or a negative error number on failure. + */ +static int reg_fixed_get_irqs(struct device *dev, + struct fixed_voltage_data *priv) +{ + int ret; + + ret = fwnode_irq_get(dev_fwnode(dev), 0); + /* This is optional IRQ. If not found we will get -EINVAL */ + if (ret == -EINVAL) + return 0; + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get IRQ\n"); + + ret = devm_request_threaded_irq(dev, ret, NULL, + reg_fixed_under_voltage_irq_handler, + IRQF_ONESHOT, "under-voltage", priv); + if (ret) + return dev_err_probe(dev, ret, "Failed to request IRQ\n"); + + return 0; +} + +/** + * of_get_fixed_voltage_config - extract fixed_voltage_config structure info + * @dev: device requesting for fixed_voltage_config + * @desc: regulator description + * + * Populates fixed_voltage_config structure by extracting data from device + * tree node. + * + * Return: Pointer to a populated &struct fixed_voltage_config or %NULL if + * memory allocation fails. + */ +static struct fixed_voltage_config * +of_get_fixed_voltage_config(struct device *dev, + const struct regulator_desc *desc) +{ + struct fixed_voltage_config *config; + struct device_node *np = dev->of_node; + struct regulator_init_data *init_data; + + config = devm_kzalloc(dev, sizeof(struct fixed_voltage_config), + GFP_KERNEL); + if (!config) + return ERR_PTR(-ENOMEM); + + config->init_data = of_get_regulator_init_data(dev, dev->of_node, desc); + if (!config->init_data) + return ERR_PTR(-EINVAL); + + init_data = config->init_data; + init_data->constraints.apply_uV = 0; + + config->supply_name = init_data->constraints.name; + if (init_data->constraints.min_uV == init_data->constraints.max_uV) { + config->microvolts = init_data->constraints.min_uV; + } else { + dev_err(dev, + "Fixed regulator specified with variable voltages\n"); + return ERR_PTR(-EINVAL); + } + + if (init_data->constraints.boot_on) + config->enabled_at_boot = true; + + of_property_read_u32(np, "startup-delay-us", &config->startup_delay); + of_property_read_u32(np, "off-on-delay-us", &config->off_on_delay); + + if (of_property_present(np, "vin-supply")) + config->input_supply = "vin"; + + return config; +} + +static const struct regulator_ops fixed_voltage_ops = { +}; + +static const struct regulator_ops fixed_voltage_clkenabled_ops = { + .enable = reg_clock_enable, + .disable = reg_clock_disable, + .is_enabled = reg_is_enabled, +}; + +static const struct regulator_ops fixed_voltage_domain_ops = { + .enable = reg_domain_enable, + .disable = reg_domain_disable, + .is_enabled = reg_is_enabled, +}; + +static int reg_fixed_voltage_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct fixed_voltage_config *config; + struct fixed_voltage_data *drvdata; + const struct fixed_dev_type *drvtype = of_device_get_match_data(dev); + struct regulator_config cfg = { }; + enum gpiod_flags gflags; + int ret; + + drvdata = devm_kzalloc(&pdev->dev, sizeof(struct fixed_voltage_data), + GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + if (pdev->dev.of_node) { + config = of_get_fixed_voltage_config(&pdev->dev, + &drvdata->desc); + if (IS_ERR(config)) + return PTR_ERR(config); + } else { + config = dev_get_platdata(&pdev->dev); + } + + if (!config) + return -ENOMEM; + + drvdata->desc.name = devm_kstrdup(&pdev->dev, + config->supply_name, + GFP_KERNEL); + if (drvdata->desc.name == NULL) { + dev_err(&pdev->dev, "Failed to allocate supply name\n"); + return -ENOMEM; + } + drvdata->desc.type = REGULATOR_VOLTAGE; + drvdata->desc.owner = THIS_MODULE; + + if (drvtype && drvtype->has_enable_clock) { + drvdata->desc.ops = &fixed_voltage_clkenabled_ops; + + drvdata->enable_clock = devm_clk_get(dev, NULL); + if (IS_ERR(drvdata->enable_clock)) { + dev_err(dev, "Can't get enable-clock from devicetree\n"); + return PTR_ERR(drvdata->enable_clock); + } + } else if (drvtype && drvtype->has_performance_state) { + drvdata->desc.ops = &fixed_voltage_domain_ops; + + drvdata->performance_state = of_get_required_opp_performance_state(dev->of_node, 0); + if (drvdata->performance_state < 0) { + dev_err(dev, "Can't get performance state from devicetree\n"); + return drvdata->performance_state; + } + } else { + drvdata->desc.ops = &fixed_voltage_ops; + } + + drvdata->desc.enable_time = config->startup_delay; + drvdata->desc.off_on_delay = config->off_on_delay; + + if (config->input_supply) { + drvdata->desc.supply_name = devm_kstrdup(&pdev->dev, + config->input_supply, + GFP_KERNEL); + if (!drvdata->desc.supply_name) + return -ENOMEM; + } + + if (config->microvolts) + drvdata->desc.n_voltages = 1; + + drvdata->desc.fixed_uV = config->microvolts; + + /* + * The signal will be inverted by the GPIO core if flagged so in the + * descriptor. + */ + if (config->enabled_at_boot) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_LOW; + + /* + * Some fixed regulators share the enable line between two + * regulators which makes it necessary to get a handle on the + * same descriptor for two different consumers. This will get + * the GPIO descriptor, but only the first call will initialize + * it so any flags such as inversion or open drain will only + * be set up by the first caller and assumed identical on the + * next caller. + * + * FIXME: find a better way to deal with this. + */ + gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE; + + /* + * Do not use devm* here: the regulator core takes over the + * lifecycle management of the GPIO descriptor. + */ + cfg.ena_gpiod = gpiod_get_optional(&pdev->dev, NULL, gflags); + if (IS_ERR(cfg.ena_gpiod)) + return dev_err_probe(&pdev->dev, PTR_ERR(cfg.ena_gpiod), + "can't get GPIO\n"); + + cfg.dev = &pdev->dev; + cfg.init_data = config->init_data; + cfg.driver_data = drvdata; + cfg.of_node = pdev->dev.of_node; + + drvdata->dev = devm_regulator_register(&pdev->dev, &drvdata->desc, + &cfg); + if (IS_ERR(drvdata->dev)) + return dev_err_probe(&pdev->dev, PTR_ERR(drvdata->dev), + "Failed to register regulator: %ld\n", + PTR_ERR(drvdata->dev)); + + platform_set_drvdata(pdev, drvdata); + + dev_dbg(&pdev->dev, "%s supplying %duV\n", drvdata->desc.name, + drvdata->desc.fixed_uV); + + ret = reg_fixed_get_irqs(dev, drvdata); + if (ret) + return ret; + + return 0; +} + +#if defined(CONFIG_OF) +static const struct fixed_dev_type fixed_voltage_data = { + .has_enable_clock = false, +}; + +static const struct fixed_dev_type fixed_clkenable_data = { + .has_enable_clock = true, +}; + +static const struct fixed_dev_type fixed_domain_data = { + .has_performance_state = true, +}; + +static const struct of_device_id fixed_of_match[] = { + { + .compatible = "regulator-fixed", + .data = &fixed_voltage_data, + }, + { + .compatible = "regulator-fixed-clock", + .data = &fixed_clkenable_data, + }, + { + .compatible = "regulator-fixed-domain", + .data = &fixed_domain_data, + }, + { + }, +}; +MODULE_DEVICE_TABLE(of, fixed_of_match); +#endif + +static struct platform_driver regulator_fixed_voltage_driver = { + .probe = reg_fixed_voltage_probe, + .driver = { + .name = "reg-fixed-voltage", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(fixed_of_match), + }, +}; + +static int __init regulator_fixed_voltage_init(void) +{ + return platform_driver_register(®ulator_fixed_voltage_driver); +} +subsys_initcall(regulator_fixed_voltage_init); + +static void __exit regulator_fixed_voltage_exit(void) +{ + platform_driver_unregister(®ulator_fixed_voltage_driver); +} +module_exit(regulator_fixed_voltage_exit); + +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("Fixed voltage regulator"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:reg-fixed-voltage"); diff --git a/drivers/regulator/fp9931.c b/drivers/regulator/fp9931.c new file mode 100644 index 000000000..ff743a8b0 --- /dev/null +++ b/drivers/regulator/fp9931.c @@ -0,0 +1,526 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (C) 2025 Andreas Kemnade + +/* Datasheet: https://www.fitipower.com/dl/file/flXa6hIchVeu0W3K */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define FP9931_REG_TMST_VALUE 0 +#define FP9931_REG_VCOM_SETTING 1 +#define FP9931_REG_VPOSNEG_SETTING 2 +#define FP9931_REG_PWRON_DELAY 3 +#define FP9931_REG_CONTROL_REG1 11 + +#define PGOOD_TIMEOUT_MSECS 200 + +struct fp9931_data { + struct device *dev; + struct regmap *regmap; + struct regulator *vin_reg; + struct gpio_desc *pgood_gpio; + struct gpio_desc *en_gpio; + struct gpio_desc *en_ts_gpio; + struct completion pgood_completion; + int pgood_irq; +}; + +static const unsigned int VPOSNEG_table[] = { + 7040000, 7040000, 7040000, 7040000, 7040000, /* 00h-04h */ + 7260000, 7490000, 7710000, 7930000, 8150000, 8380000, /* 05h-0Ah */ + 8600000, 8820000, 9040000, 9270000, 9490000, 9710000, /* 0Bh-10h */ + 9940000, 10160000, 10380000, 10600000, 10830000, 11050000, /* 11h-16h */ + 11270000, 11490000, 11720000, 11940000, 12160000, 12380000, /* 17h-1Ch */ + 12610000, 12830000, 13050000, 13280000, 13500000, 13720000, /* 1Dh-22h */ + 13940000, 14170000, 14390000, 14610000, 14830000, 15060000, /* 23h-28h */ + /* 29h-3Fh: clamped to 15.06V per datasheet */ + 15060000, 15060000, 15060000, 15060000, 15060000, 15060000, + 15060000, 15060000, 15060000, 15060000, 15060000, 15060000, + 15060000, 15060000, 15060000, 15060000, 15060000, 15060000, + 15060000, 15060000, 15060000, 15060000, 15060000, +}; + +static const struct hwmon_channel_info *fp9931_info[] = { + HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), + NULL +}; + +static int setup_timings(struct fp9931_data *data) +{ + u32 tdly[4]; + u8 tdlys = 0; + int i; + int ret; + + ret = device_property_count_u32(data->dev, "fitipower,tdly-ms"); + if (ret == -EINVAL) /* property is optional */ + return 0; + + if (ret < 0) + return ret; + + if (ret != ARRAY_SIZE(tdly)) { + dev_err(data->dev, "invalid delay specification"); + return -EINVAL; + } + + ret = device_property_read_u32_array(data->dev, "fitipower,tdly-ms", + tdly, ARRAY_SIZE(tdly)); + if (ret) + return ret; + + for (i = ARRAY_SIZE(tdly) - 1; i >= 0; i--) { + if (tdly[i] > 4 || tdly[i] == 3) + return -EINVAL; + + if (tdly[i] == 4) /* convert from ms */ + tdly[i] = 3; + + tdlys <<= 2; + tdlys |= tdly[i]; + } + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + ret = regmap_write(data->regmap, FP9931_REG_PWRON_DELAY, tdlys); + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static int fp9931_hwmon_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *temp) +{ + struct fp9931_data *data = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + ret = regmap_read(data->regmap, FP9931_REG_TMST_VALUE, &val); + if (!ret) + *temp = (s8)val * 1000; + + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static umode_t fp9931_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static const struct hwmon_ops fp9931_hwmon_ops = { + .is_visible = fp9931_hwmon_is_visible, + .read = fp9931_hwmon_read, +}; + +static const struct hwmon_chip_info fp9931_chip_info = { + .ops = &fp9931_hwmon_ops, + .info = fp9931_info, +}; + +static int fp9931_runtime_suspend(struct device *dev) +{ + int ret = 0; + struct fp9931_data *data = dev_get_drvdata(dev); + + if (data->en_ts_gpio) + gpiod_set_value_cansleep(data->en_ts_gpio, 0); + + if (data->vin_reg) { + ret = regulator_disable(data->vin_reg); + regcache_mark_dirty(data->regmap); + } + + return ret; +} + +static int fp9931_runtime_resume(struct device *dev) +{ + int ret = 0; + struct fp9931_data *data = dev_get_drvdata(dev); + + if (data->vin_reg) + ret = regulator_enable(data->vin_reg); + + if (ret) + return ret; + + if (data->en_ts_gpio) { + gpiod_set_value_cansleep(data->en_ts_gpio, 1); + /* wait for one ADC conversion to have sane temperature */ + usleep_range(10000, 15000); + } + + ret = regcache_sync(data->regmap); + + return ret; +} + +static bool fp9931_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == FP9931_REG_TMST_VALUE; +} + +static const struct reg_default fp9931_reg_default = { + .reg = FP9931_REG_VCOM_SETTING, + .def = 0x80, +}; + +static const struct regmap_config regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 12, + .cache_type = REGCACHE_FLAT, + .volatile_reg = fp9931_volatile_reg, + .reg_defaults = &fp9931_reg_default, + .num_reg_defaults = 1, +}; + +static void disable_nopm(void *d) +{ + struct fp9931_data *data = d; + + fp9931_runtime_suspend(data->dev); +} + +static int fp9931_v3p3_enable(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + ret = regulator_enable_regmap(rdev); + if (ret < 0) + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static int fp9931_v3p3_disable(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_disable_regmap(rdev); + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static int fp9931_v3p3_is_enabled(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + if (pm_runtime_status_suspended(data->dev)) + return 0; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return 0; + + ret = regulator_is_enabled_regmap(rdev); + + pm_runtime_put_autosuspend(data->dev); + return ret; +} + +static const struct regulator_ops fp9931_v3p3ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = fp9931_v3p3_enable, + .disable = fp9931_v3p3_disable, + .is_enabled = fp9931_v3p3_is_enabled, +}; + +static int fp9931_check_powergood(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + + if (pm_runtime_status_suspended(data->dev)) + return 0; + + return gpiod_get_value_cansleep(data->pgood_gpio); +} + +static int fp9931_get_voltage_sel(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + ret = regulator_get_voltage_sel_regmap(rdev); + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static int fp9931_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + ret = regulator_set_voltage_sel_regmap(rdev, selector); + pm_runtime_put_autosuspend(data->dev); + + return ret; +} + +static irqreturn_t pgood_handler(int irq, void *dev_id) +{ + struct fp9931_data *data = dev_id; + + complete(&data->pgood_completion); + + return IRQ_HANDLED; +} + +static int fp9931_set_enable(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = pm_runtime_resume_and_get(data->dev); + if (ret < 0) + return ret; + + reinit_completion(&data->pgood_completion); + gpiod_set_value_cansleep(data->en_gpio, 1); + dev_dbg(data->dev, "turning on..."); + wait_for_completion_timeout(&data->pgood_completion, + msecs_to_jiffies(PGOOD_TIMEOUT_MSECS)); + dev_dbg(data->dev, "turned on"); + if (gpiod_get_value_cansleep(data->pgood_gpio) != 1) { + pm_runtime_put_autosuspend(data->dev); + return -ETIMEDOUT; + } + + return 0; +} + +static int fp9931_clear_enable(struct regulator_dev *rdev) +{ + struct fp9931_data *data = rdev_get_drvdata(rdev); + + gpiod_set_value_cansleep(data->en_gpio, 0); + pm_runtime_put_autosuspend(data->dev); + return 0; +} + +static const struct regulator_ops fp9931_vcom_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = fp9931_set_enable, + .disable = fp9931_clear_enable, + .is_enabled = fp9931_check_powergood, + .set_voltage_sel = fp9931_set_voltage_sel, + .get_voltage_sel = fp9931_get_voltage_sel, +}; + +static const struct regulator_ops fp9931_vposneg_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + /* gets enabled by enabling vcom, too */ + .is_enabled = fp9931_check_powergood, + .set_voltage_sel = fp9931_set_voltage_sel, + .get_voltage_sel = fp9931_get_voltage_sel, +}; + +static const struct regulator_desc regulators[] = { + { + .name = "v3p3", + .of_match = of_match_ptr("v3p3"), + .regulators_node = of_match_ptr("regulators"), + .id = 0, + .ops = &fp9931_v3p3ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = FP9931_REG_CONTROL_REG1, + .enable_mask = BIT(1), + .n_voltages = 1, + .min_uV = 3300000 + }, + { + .name = "vposneg", + .of_match = of_match_ptr("vposneg"), + .regulators_node = of_match_ptr("regulators"), + .id = 1, + .ops = &fp9931_vposneg_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(VPOSNEG_table), + .vsel_reg = FP9931_REG_VPOSNEG_SETTING, + .vsel_mask = 0x3F, + .volt_table = VPOSNEG_table, + }, + { + .name = "vcom", + .of_match = of_match_ptr("vcom"), + .regulators_node = of_match_ptr("regulators"), + .id = 2, + .ops = &fp9931_vcom_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 255, + .min_uV = 0, + .uV_step = 5000000 / 255, + .vsel_reg = FP9931_REG_VCOM_SETTING, + .vsel_mask = 0xFF + }, +}; + +static int fp9931_probe(struct i2c_client *client) +{ + struct fp9931_data *data; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int ret = 0; + int i; + + data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = devm_regmap_init_i2c(client, ®map_config); + if (IS_ERR(data->regmap)) + return dev_err_probe(&client->dev, PTR_ERR(data->regmap), + "failed to allocate regmap!\n"); + + data->vin_reg = devm_regulator_get(&client->dev, "vin"); + if (IS_ERR(data->vin_reg)) + return dev_err_probe(&client->dev, PTR_ERR(data->vin_reg), + "failed to get vin regulator\n"); + + data->pgood_gpio = devm_gpiod_get(&client->dev, "pg", GPIOD_IN); + if (IS_ERR(data->pgood_gpio)) + return dev_err_probe(&client->dev, + PTR_ERR(data->pgood_gpio), + "failed to get power good gpio\n"); + + data->pgood_irq = gpiod_to_irq(data->pgood_gpio); + if (data->pgood_irq < 0) + return data->pgood_irq; + + data->en_gpio = devm_gpiod_get(&client->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(data->en_gpio)) + return dev_err_probe(&client->dev, PTR_ERR(data->en_gpio), + "failed to get en gpio\n"); + + data->en_ts_gpio = devm_gpiod_get_optional(&client->dev, "en-ts", GPIOD_OUT_LOW); + if (IS_ERR(data->en_ts_gpio)) + return dev_err_probe(&client->dev, + PTR_ERR(data->en_ts_gpio), + "failed to get en gpio\n"); + + data->dev = &client->dev; + i2c_set_clientdata(client, data); + + init_completion(&data->pgood_completion); + + ret = devm_request_threaded_irq(&client->dev, data->pgood_irq, NULL, + pgood_handler, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "PGOOD", data); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to request irq\n"); + + if (IS_ENABLED(CONFIG_PM)) { + devm_pm_runtime_enable(&client->dev); + pm_runtime_set_autosuspend_delay(&client->dev, 4000); + pm_runtime_use_autosuspend(&client->dev); + } else { + ret = fp9931_runtime_resume(&client->dev); + if (ret < 0) + return ret; + + devm_add_action_or_reset(&client->dev, disable_nopm, data); + } + + ret = setup_timings(data); + if (ret) + return dev_err_probe(&client->dev, ret, "failed to setup timings\n"); + + config.driver_data = data; + config.dev = &client->dev; + config.regmap = data->regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&client->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(&client->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + regulators[i].name); + } + + if (IS_REACHABLE(CONFIG_HWMON)) { + struct device *hwmon_dev; + + hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, "fp9931", data, + &fp9931_chip_info, NULL); + if (IS_ERR(hwmon_dev)) + dev_notice(&client->dev, "failed to register hwmon\n"); + } + + return 0; +} + +static const struct dev_pm_ops fp9931_pm_ops = { + SET_RUNTIME_PM_OPS(fp9931_runtime_suspend, fp9931_runtime_resume, NULL) +}; + +static const struct of_device_id fp9931_dt_ids[] = { + { + .compatible = "fitipower,fp9931", + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, fp9931_dt_ids); + +static struct i2c_driver fp9931_i2c_driver = { + .driver = { + .name = "fp9931", + .of_match_table = fp9931_dt_ids, + .pm = &fp9931_pm_ops, + }, + .probe = fp9931_probe, +}; + +module_i2c_driver(fp9931_i2c_driver); + +/* Module information */ +MODULE_DESCRIPTION("FP9931 regulator driver"); +MODULE_LICENSE("GPL"); + diff --git a/drivers/regulator/gpio-regulator.c b/drivers/regulator/gpio-regulator.c new file mode 100644 index 000000000..6351ceefd --- /dev/null +++ b/drivers/regulator/gpio-regulator.c @@ -0,0 +1,389 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * gpio-regulator.c + * + * Copyright 2011 Heiko Stuebner + * + * based on fixed.c + * + * Copyright 2008 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + * + * Copyright (c) 2009 Nokia Corporation + * Roger Quadros + * + * This is useful for systems with mixed controllable and + * non-controllable regulators, as well as for allowing testing on + * systems with no controllable regulators. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct gpio_regulator_data { + struct regulator_desc desc; + + struct gpio_desc **gpiods; + int nr_gpios; + + struct gpio_regulator_state *states; + int nr_states; + + int state; +}; + +static int gpio_regulator_get_value(struct regulator_dev *dev) +{ + struct gpio_regulator_data *data = rdev_get_drvdata(dev); + int ptr; + + for (ptr = 0; ptr < data->nr_states; ptr++) + if (data->states[ptr].gpios == data->state) + return data->states[ptr].value; + + return -EINVAL; +} + +static int gpio_regulator_set_voltage(struct regulator_dev *dev, + int min_uV, int max_uV, + unsigned *selector) +{ + struct gpio_regulator_data *data = rdev_get_drvdata(dev); + int ptr, target = 0, state, best_val = INT_MAX; + + for (ptr = 0; ptr < data->nr_states; ptr++) + if (data->states[ptr].value < best_val && + data->states[ptr].value >= min_uV && + data->states[ptr].value <= max_uV) { + target = data->states[ptr].gpios; + best_val = data->states[ptr].value; + if (selector) + *selector = ptr; + } + + if (best_val == INT_MAX) + return -EINVAL; + + for (ptr = 0; ptr < data->nr_gpios; ptr++) { + state = (target & (1 << ptr)) >> ptr; + gpiod_set_value_cansleep(data->gpiods[ptr], state); + } + data->state = target; + + return 0; +} + +static int gpio_regulator_list_voltage(struct regulator_dev *dev, + unsigned selector) +{ + struct gpio_regulator_data *data = rdev_get_drvdata(dev); + + if (selector >= data->nr_states) + return -EINVAL; + + return data->states[selector].value; +} + +static int gpio_regulator_set_current_limit(struct regulator_dev *dev, + int min_uA, int max_uA) +{ + struct gpio_regulator_data *data = rdev_get_drvdata(dev); + int ptr, target = 0, state, best_val = 0; + + for (ptr = 0; ptr < data->nr_states; ptr++) + if (data->states[ptr].value > best_val && + data->states[ptr].value >= min_uA && + data->states[ptr].value <= max_uA) { + target = data->states[ptr].gpios; + best_val = data->states[ptr].value; + } + + if (best_val == 0) + return -EINVAL; + + for (ptr = 0; ptr < data->nr_gpios; ptr++) { + state = (target & (1 << ptr)) >> ptr; + gpiod_set_value_cansleep(data->gpiods[ptr], state); + } + data->state = target; + + return 0; +} + +static const struct regulator_ops gpio_regulator_voltage_ops = { + .get_voltage = gpio_regulator_get_value, + .set_voltage = gpio_regulator_set_voltage, + .list_voltage = gpio_regulator_list_voltage, +}; + +static struct gpio_regulator_config * +of_get_gpio_regulator_config(struct device *dev, struct device_node *np, + const struct regulator_desc *desc) +{ + struct gpio_regulator_config *config; + const char *regtype; + int proplen, i; + int ngpios; + int ret; + + config = devm_kzalloc(dev, + sizeof(struct gpio_regulator_config), + GFP_KERNEL); + if (!config) + return ERR_PTR(-ENOMEM); + + config->init_data = of_get_regulator_init_data(dev, np, desc); + if (!config->init_data) + return ERR_PTR(-EINVAL); + + config->supply_name = config->init_data->constraints.name; + + if (config->init_data->constraints.boot_on) + config->enabled_at_boot = true; + + /* + * Do not use: undocumented device tree property. + * This is kept around solely for device tree ABI stability. + */ + if (of_property_read_bool(np, "enable-at-boot")) + config->enabled_at_boot = true; + + of_property_read_u32(np, "startup-delay-us", &config->startup_delay); + + /* Fetch GPIO init levels */ + ngpios = gpiod_count(dev, NULL); + if (ngpios > 0) { + config->gflags = devm_kzalloc(dev, + sizeof(enum gpiod_flags) + * ngpios, + GFP_KERNEL); + if (!config->gflags) + return ERR_PTR(-ENOMEM); + + for (i = 0; i < ngpios; i++) { + u32 val; + + ret = of_property_read_u32_index(np, "gpios-states", i, + &val); + + /* Default to high per specification */ + if (ret) + config->gflags[i] = GPIOD_OUT_HIGH; + else + config->gflags[i] = + val ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + } + } + config->ngpios = ngpios; + + /* Fetch states. */ + proplen = of_property_count_u32_elems(np, "states"); + if (proplen < 0) { + dev_err(dev, "No 'states' property found\n"); + return ERR_PTR(-EINVAL); + } + + config->states = devm_kcalloc(dev, + proplen / 2, + sizeof(struct gpio_regulator_state), + GFP_KERNEL); + if (!config->states) + return ERR_PTR(-ENOMEM); + + for (i = 0; i < proplen / 2; i++) { + of_property_read_u32_index(np, "states", i * 2, + &config->states[i].value); + of_property_read_u32_index(np, "states", i * 2 + 1, + &config->states[i].gpios); + } + config->nr_states = i; + + config->type = REGULATOR_VOLTAGE; + ret = of_property_read_string(np, "regulator-type", ®type); + if (ret >= 0) { + if (!strncmp("voltage", regtype, 7)) + config->type = REGULATOR_VOLTAGE; + else if (!strncmp("current", regtype, 7)) + config->type = REGULATOR_CURRENT; + else + dev_warn(dev, "Unknown regulator-type '%s'\n", + regtype); + } + + if (of_property_present(np, "vin-supply")) + config->input_supply = "vin"; + + return config; +} + +static const struct regulator_ops gpio_regulator_current_ops = { + .get_current_limit = gpio_regulator_get_value, + .set_current_limit = gpio_regulator_set_current_limit, +}; + +static int gpio_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct gpio_regulator_config *config = dev_get_platdata(dev); + struct device_node *np = dev->of_node; + struct gpio_regulator_data *drvdata; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + enum gpiod_flags gflags; + int ptr, state, i; + + drvdata = devm_kzalloc(dev, sizeof(struct gpio_regulator_data), + GFP_KERNEL); + if (drvdata == NULL) + return -ENOMEM; + + if (np) { + config = of_get_gpio_regulator_config(dev, np, + &drvdata->desc); + if (IS_ERR(config)) + return PTR_ERR(config); + } + + drvdata->desc.name = devm_kstrdup(dev, config->supply_name, GFP_KERNEL); + if (drvdata->desc.name == NULL) { + dev_err(dev, "Failed to allocate supply name\n"); + return -ENOMEM; + } + + drvdata->gpiods = devm_kcalloc(dev, config->ngpios, + sizeof(struct gpio_desc *), GFP_KERNEL); + if (!drvdata->gpiods) + return -ENOMEM; + + if (config->input_supply) { + drvdata->desc.supply_name = devm_kstrdup(&pdev->dev, + config->input_supply, + GFP_KERNEL); + if (!drvdata->desc.supply_name) { + dev_err(&pdev->dev, + "Failed to allocate input supply\n"); + return -ENOMEM; + } + } + + for (i = 0; i < config->ngpios; i++) { + drvdata->gpiods[i] = devm_gpiod_get_index(dev, + NULL, + i, + config->gflags[i]); + if (IS_ERR(drvdata->gpiods[i])) + return PTR_ERR(drvdata->gpiods[i]); + /* This is good to know */ + gpiod_set_consumer_name(drvdata->gpiods[i], drvdata->desc.name); + } + drvdata->nr_gpios = config->ngpios; + + drvdata->states = devm_kmemdup(dev, + config->states, + config->nr_states * + sizeof(struct gpio_regulator_state), + GFP_KERNEL); + if (drvdata->states == NULL) { + dev_err(dev, "Failed to allocate state data\n"); + return -ENOMEM; + } + drvdata->nr_states = config->nr_states; + + drvdata->desc.owner = THIS_MODULE; + drvdata->desc.enable_time = config->startup_delay; + + /* handle regulator type*/ + switch (config->type) { + case REGULATOR_VOLTAGE: + drvdata->desc.type = REGULATOR_VOLTAGE; + drvdata->desc.ops = &gpio_regulator_voltage_ops; + drvdata->desc.n_voltages = config->nr_states; + break; + case REGULATOR_CURRENT: + drvdata->desc.type = REGULATOR_CURRENT; + drvdata->desc.ops = &gpio_regulator_current_ops; + break; + default: + dev_err(dev, "No regulator type set\n"); + return -EINVAL; + } + + /* build initial state from gpio init data. */ + state = 0; + for (ptr = 0; ptr < drvdata->nr_gpios; ptr++) { + if (config->gflags[ptr] == GPIOD_OUT_HIGH) + state |= (1 << ptr); + } + drvdata->state = state; + + cfg.dev = dev; + cfg.init_data = config->init_data; + cfg.driver_data = drvdata; + cfg.of_node = np; + + /* + * The signal will be inverted by the GPIO core if flagged so in the + * descriptor. + */ + if (config->enabled_at_boot) + gflags = GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE; + else + gflags = GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE; + + cfg.ena_gpiod = gpiod_get_optional(dev, "enable", gflags); + if (IS_ERR(cfg.ena_gpiod)) + return PTR_ERR(cfg.ena_gpiod); + + rdev = devm_regulator_register(dev, &drvdata->desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register regulator\n"); + + platform_set_drvdata(pdev, drvdata); + + return 0; +} + +#if defined(CONFIG_OF) +static const struct of_device_id regulator_gpio_of_match[] = { + { .compatible = "regulator-gpio", }, + {}, +}; +MODULE_DEVICE_TABLE(of, regulator_gpio_of_match); +#endif + +static struct platform_driver gpio_regulator_driver = { + .probe = gpio_regulator_probe, + .driver = { + .name = "gpio-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(regulator_gpio_of_match), + }, +}; + +static int __init gpio_regulator_init(void) +{ + return platform_driver_register(&gpio_regulator_driver); +} +subsys_initcall(gpio_regulator_init); + +static void __exit gpio_regulator_exit(void) +{ + platform_driver_unregister(&gpio_regulator_driver); +} +module_exit(gpio_regulator_exit); + +MODULE_AUTHOR("Heiko Stuebner "); +MODULE_DESCRIPTION("gpio voltage regulator"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:gpio-regulator"); diff --git a/drivers/regulator/helpers.c b/drivers/regulator/helpers.c new file mode 100644 index 000000000..0def82eb8 --- /dev/null +++ b/drivers/regulator/helpers.c @@ -0,0 +1,1003 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// helpers.c -- Voltage/Current Regulator framework helper functions. +// +// Copyright 2007, 2008 Wolfson Microelectronics PLC. +// Copyright 2008 SlimLogic Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "internal.h" + +/** + * regulator_is_enabled_regmap - standard is_enabled() for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * enable_reg and enable_mask fields in their descriptor and then use + * this as their is_enabled operation, saving some code. + */ +int regulator_is_enabled_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); + if (ret != 0) + return ret; + + val &= rdev->desc->enable_mask; + + if (rdev->desc->enable_is_inverted) { + if (rdev->desc->enable_val) + return val != rdev->desc->enable_val; + return val == 0; + } else { + if (rdev->desc->enable_val) + return val == rdev->desc->enable_val; + return val != 0; + } +} +EXPORT_SYMBOL_GPL(regulator_is_enabled_regmap); + +/** + * regulator_enable_regmap - standard enable() for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * enable_reg and enable_mask fields in their descriptor and then use + * this as their enable() operation, saving some code. + */ +int regulator_enable_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + + if (rdev->desc->enable_is_inverted) { + val = rdev->desc->disable_val; + } else { + val = rdev->desc->enable_val; + if (!val) + val = rdev->desc->enable_mask; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_enable_regmap); + +/** + * regulator_disable_regmap - standard disable() for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * enable_reg and enable_mask fields in their descriptor and then use + * this as their disable() operation, saving some code. + */ +int regulator_disable_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + + if (rdev->desc->enable_is_inverted) { + val = rdev->desc->enable_val; + if (!val) + val = rdev->desc->enable_mask; + } else { + val = rdev->desc->disable_val; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_disable_regmap); + +static int regulator_range_selector_to_index(struct regulator_dev *rdev, + unsigned int rval) +{ + int i; + + if (!rdev->desc->linear_range_selectors_bitfield) + return -EINVAL; + + rval &= rdev->desc->vsel_range_mask; + rval >>= ffs(rdev->desc->vsel_range_mask) - 1; + + for (i = 0; i < rdev->desc->n_linear_ranges; i++) { + if (rdev->desc->linear_range_selectors_bitfield[i] == rval) + return i; + } + return -EINVAL; +} + +/** + * regulator_get_voltage_sel_pickable_regmap - pickable range get_voltage_sel + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O and use pickable + * ranges can set the vsel_reg, vsel_mask, vsel_range_reg and vsel_range_mask + * fields in their descriptor and then use this as their get_voltage_sel + * operation, saving some code. + */ +int regulator_get_voltage_sel_pickable_regmap(struct regulator_dev *rdev) +{ + unsigned int r_val; + int range; + unsigned int val; + int ret; + unsigned int voltages = 0; + const struct linear_range *r = rdev->desc->linear_ranges; + + if (!r) + return -EINVAL; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret != 0) + return ret; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_range_reg, &r_val); + if (ret != 0) + return ret; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + range = regulator_range_selector_to_index(rdev, r_val); + if (range < 0) + return -EINVAL; + + voltages = linear_range_values_in_range_array(r, range); + + return val + voltages; +} +EXPORT_SYMBOL_GPL(regulator_get_voltage_sel_pickable_regmap); + +static int write_separate_vsel_and_range(struct regulator_dev *rdev, + unsigned int sel, unsigned int range) +{ + bool range_updated; + int ret; + + ret = regmap_update_bits_base(rdev->regmap, rdev->desc->vsel_range_reg, + rdev->desc->vsel_range_mask, + range, &range_updated, false, false); + if (ret) + return ret; + + /* + * Some PMICs treat the vsel_reg same as apply-bit. Force it to be + * written if the range changed, even if the old selector was same as + * the new one + */ + if (rdev->desc->range_applied_by_vsel && range_updated) + return regmap_write_bits(rdev->regmap, + rdev->desc->vsel_reg, + rdev->desc->vsel_mask, sel); + + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + rdev->desc->vsel_mask, sel); +} + +/** + * regulator_set_voltage_sel_pickable_regmap - pickable range set_voltage_sel + * + * @rdev: regulator to operate on + * @sel: Selector to set + * + * Regulators that use regmap for their register I/O and use pickable + * ranges can set the vsel_reg, vsel_mask, vsel_range_reg and vsel_range_mask + * fields in their descriptor and then use this as their set_voltage_sel + * operation, saving some code. + */ +int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, + unsigned int sel) +{ + unsigned int range; + int ret, i; + unsigned int voltages_in_range = 0; + + for (i = 0; i < rdev->desc->n_linear_ranges; i++) { + const struct linear_range *r; + + r = &rdev->desc->linear_ranges[i]; + voltages_in_range = linear_range_values_in_range(r); + + if (sel < voltages_in_range) + break; + sel -= voltages_in_range; + } + + if (i == rdev->desc->n_linear_ranges) + return -EINVAL; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + sel += rdev->desc->linear_ranges[i].min_sel; + + range = rdev->desc->linear_range_selectors_bitfield[i]; + range <<= ffs(rdev->desc->vsel_range_mask) - 1; + + if (rdev->desc->vsel_reg == rdev->desc->vsel_range_reg) + ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + rdev->desc->vsel_range_mask | + rdev->desc->vsel_mask, sel | range); + else + ret = write_separate_vsel_and_range(rdev, sel, range); + + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_voltage_sel_pickable_regmap); + +/** + * regulator_get_voltage_sel_regmap - standard get_voltage_sel for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * vsel_reg and vsel_mask fields in their descriptor and then use this + * as their get_voltage_sel operation, saving some code. + */ +int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret != 0) + return ret; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} +EXPORT_SYMBOL_GPL(regulator_get_voltage_sel_regmap); + +/** + * regulator_set_voltage_sel_regmap - standard set_voltage_sel for regmap users + * + * @rdev: regulator to operate on + * @sel: Selector to set + * + * Regulators that use regmap for their register I/O can set the + * vsel_reg and vsel_mask fields in their descriptor and then use this + * as their set_voltage_sel operation, saving some code. + */ +int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel) +{ + int ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + + ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + rdev->desc->vsel_mask, sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + return ret; +} +EXPORT_SYMBOL_GPL(regulator_set_voltage_sel_regmap); + +/** + * regulator_map_voltage_iterate - map_voltage() based on list_voltage() + * + * @rdev: Regulator to operate on + * @min_uV: Lower bound for voltage + * @max_uV: Upper bound for voltage + * + * Drivers implementing set_voltage_sel() and list_voltage() can use + * this as their map_voltage() operation. It will find a suitable + * voltage by calling list_voltage() until it gets something in bounds + * for the requested voltages. + */ +int regulator_map_voltage_iterate(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + int best_val = INT_MAX; + int selector = 0; + int i, ret; + + /* Find the smallest voltage that falls within the specified + * range. + */ + for (i = 0; i < rdev->desc->n_voltages; i++) { + ret = rdev->desc->ops->list_voltage(rdev, i); + if (ret < 0) + continue; + + if (ret < best_val && ret >= min_uV && ret <= max_uV) { + best_val = ret; + selector = i; + } + } + + if (best_val != INT_MAX) + return selector; + else + return -EINVAL; +} +EXPORT_SYMBOL_GPL(regulator_map_voltage_iterate); + +/** + * regulator_map_voltage_ascend - map_voltage() for ascendant voltage list + * + * @rdev: Regulator to operate on + * @min_uV: Lower bound for voltage + * @max_uV: Upper bound for voltage + * + * Drivers that have ascendant voltage list can use this as their + * map_voltage() operation. + */ +int regulator_map_voltage_ascend(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + int i, ret; + + for (i = 0; i < rdev->desc->n_voltages; i++) { + ret = rdev->desc->ops->list_voltage(rdev, i); + if (ret < 0) + continue; + + if (ret > max_uV) + break; + + if (ret >= min_uV && ret <= max_uV) + return i; + } + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(regulator_map_voltage_ascend); + +/** + * regulator_map_voltage_linear - map_voltage() for simple linear mappings + * + * @rdev: Regulator to operate on + * @min_uV: Lower bound for voltage + * @max_uV: Upper bound for voltage + * + * Drivers providing min_uV and uV_step in their regulator_desc can + * use this as their map_voltage() operation. + */ +int regulator_map_voltage_linear(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + int ret, voltage; + + /* Allow uV_step to be 0 for fixed voltage */ + if (rdev->desc->n_voltages == 1 && rdev->desc->uV_step == 0) { + if (min_uV <= rdev->desc->min_uV && rdev->desc->min_uV <= max_uV) + return 0; + else + return -EINVAL; + } + + if (!rdev->desc->uV_step) { + BUG_ON(!rdev->desc->uV_step); + return -EINVAL; + } + + if (min_uV < rdev->desc->min_uV) + min_uV = rdev->desc->min_uV; + + ret = DIV_ROUND_UP(min_uV - rdev->desc->min_uV, rdev->desc->uV_step); + if (ret < 0) + return ret; + + ret += rdev->desc->linear_min_sel; + + /* Map back into a voltage to verify we're still in bounds */ + voltage = rdev->desc->ops->list_voltage(rdev, ret); + if (voltage < min_uV || voltage > max_uV) + return -EINVAL; + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_map_voltage_linear); + +/** + * regulator_map_voltage_linear_range - map_voltage() for multiple linear ranges + * + * @rdev: Regulator to operate on + * @min_uV: Lower bound for voltage + * @max_uV: Upper bound for voltage + * + * Drivers providing linear_ranges in their descriptor can use this as + * their map_voltage() callback. + */ +int regulator_map_voltage_linear_range(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + const struct linear_range *range; + int ret = -EINVAL; + unsigned int sel; + bool found; + int voltage, i; + + if (!rdev->desc->n_linear_ranges) { + BUG_ON(!rdev->desc->n_linear_ranges); + return -EINVAL; + } + + for (i = 0; i < rdev->desc->n_linear_ranges; i++) { + range = &rdev->desc->linear_ranges[i]; + + ret = linear_range_get_selector_high(range, min_uV, &sel, + &found); + if (ret) + continue; + ret = sel; + + /* + * Map back into a voltage to verify we're still in bounds. + * If we are not, then continue checking rest of the ranges. + */ + voltage = rdev->desc->ops->list_voltage(rdev, sel); + if (voltage >= min_uV && voltage <= max_uV) + break; + } + + if (i == rdev->desc->n_linear_ranges) + return -EINVAL; + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_map_voltage_linear_range); + +/** + * regulator_map_voltage_pickable_linear_range - map_voltage, pickable ranges + * + * @rdev: Regulator to operate on + * @min_uV: Lower bound for voltage + * @max_uV: Upper bound for voltage + * + * Drivers providing pickable linear_ranges in their descriptor can use + * this as their map_voltage() callback. + */ +int regulator_map_voltage_pickable_linear_range(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + const struct linear_range *range; + int ret = -EINVAL; + int voltage, i; + unsigned int selector = 0; + + if (!rdev->desc->n_linear_ranges) { + BUG_ON(!rdev->desc->n_linear_ranges); + return -EINVAL; + } + + for (i = 0; i < rdev->desc->n_linear_ranges; i++) { + int linear_max_uV; + bool found; + unsigned int sel; + + range = &rdev->desc->linear_ranges[i]; + linear_max_uV = linear_range_get_max_value(range); + + if (!(min_uV <= linear_max_uV && max_uV >= range->min)) { + selector += linear_range_values_in_range(range); + continue; + } + + ret = linear_range_get_selector_high(range, min_uV, &sel, + &found); + if (ret) { + selector += linear_range_values_in_range(range); + continue; + } + + ret = selector + sel - range->min_sel; + + voltage = rdev->desc->ops->list_voltage(rdev, ret); + + /* + * Map back into a voltage to verify we're still in bounds. + * We may have overlapping voltage ranges. Hence we don't + * exit but retry until we have checked all ranges. + */ + if (voltage < min_uV || voltage > max_uV) + selector += linear_range_values_in_range(range); + else + break; + } + + if (i == rdev->desc->n_linear_ranges) + return -EINVAL; + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_map_voltage_pickable_linear_range); + +/** + * regulator_desc_list_voltage_linear - List voltages with simple calculation + * + * @desc: Regulator desc for regulator which volatges are to be listed + * @selector: Selector to convert into a voltage + * + * Regulators with a simple linear mapping between voltages and + * selectors can set min_uV and uV_step in the regulator descriptor + * and then use this function prior regulator registration to list + * the voltages. This is useful when voltages need to be listed during + * device-tree parsing. + */ +int regulator_desc_list_voltage_linear(const struct regulator_desc *desc, + unsigned int selector) +{ + if (selector >= desc->n_voltages) + return -EINVAL; + + if (selector < desc->linear_min_sel) + return 0; + + selector -= desc->linear_min_sel; + + return desc->min_uV + (desc->uV_step * selector); +} +EXPORT_SYMBOL_GPL(regulator_desc_list_voltage_linear); + +/** + * regulator_list_voltage_linear - List voltages with simple calculation + * + * @rdev: Regulator device + * @selector: Selector to convert into a voltage + * + * Regulators with a simple linear mapping between voltages and + * selectors can set min_uV and uV_step in the regulator descriptor + * and then use this function as their list_voltage() operation, + */ +int regulator_list_voltage_linear(struct regulator_dev *rdev, + unsigned int selector) +{ + return regulator_desc_list_voltage_linear(rdev->desc, selector); +} +EXPORT_SYMBOL_GPL(regulator_list_voltage_linear); + +/** + * regulator_list_voltage_pickable_linear_range - pickable range list voltages + * + * @rdev: Regulator device + * @selector: Selector to convert into a voltage + * + * list_voltage() operation, intended to be used by drivers utilizing pickable + * ranges helpers. + */ +int regulator_list_voltage_pickable_linear_range(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct linear_range *range; + int i; + unsigned int all_sels = 0; + + if (!rdev->desc->n_linear_ranges) { + BUG_ON(!rdev->desc->n_linear_ranges); + return -EINVAL; + } + + for (i = 0; i < rdev->desc->n_linear_ranges; i++) { + unsigned int sel_indexes; + + range = &rdev->desc->linear_ranges[i]; + + sel_indexes = linear_range_values_in_range(range) - 1; + + if (all_sels + sel_indexes >= selector) { + selector -= all_sels; + /* + * As we see here, pickable ranges work only as + * long as the first selector for each pickable + * range is 0, and the each subsequent range for + * this 'pick' follow immediately at next unused + * selector (Eg. there is no gaps between ranges). + * I think this is fine but it probably should be + * documented. OTOH, whole pickable range stuff + * might benefit from some documentation + */ + return range->min + (range->step * selector); + } + + all_sels += (sel_indexes + 1); + } + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(regulator_list_voltage_pickable_linear_range); + +/** + * regulator_desc_list_voltage_linear_range - List voltages for linear ranges + * + * @desc: Regulator desc for regulator which volatges are to be listed + * @selector: Selector to convert into a voltage + * + * Regulators with a series of simple linear mappings between voltages + * and selectors who have set linear_ranges in the regulator descriptor + * can use this function prior regulator registration to list voltages. + * This is useful when voltages need to be listed during device-tree + * parsing. + */ +int regulator_desc_list_voltage_linear_range(const struct regulator_desc *desc, + unsigned int selector) +{ + unsigned int val; + int ret; + + BUG_ON(!desc->n_linear_ranges); + + ret = linear_range_get_value_array(desc->linear_ranges, + desc->n_linear_ranges, selector, + &val); + if (ret) + return ret; + + return val; +} +EXPORT_SYMBOL_GPL(regulator_desc_list_voltage_linear_range); + +/** + * regulator_list_voltage_linear_range - List voltages for linear ranges + * + * @rdev: Regulator device + * @selector: Selector to convert into a voltage + * + * Regulators with a series of simple linear mappings between voltages + * and selectors can set linear_ranges in the regulator descriptor and + * then use this function as their list_voltage() operation, + */ +int regulator_list_voltage_linear_range(struct regulator_dev *rdev, + unsigned int selector) +{ + return regulator_desc_list_voltage_linear_range(rdev->desc, selector); +} +EXPORT_SYMBOL_GPL(regulator_list_voltage_linear_range); + +/** + * regulator_list_voltage_table - List voltages with table based mapping + * + * @rdev: Regulator device + * @selector: Selector to convert into a voltage + * + * Regulators with table based mapping between voltages and + * selectors can set volt_table in the regulator descriptor + * and then use this function as their list_voltage() operation. + */ +int regulator_list_voltage_table(struct regulator_dev *rdev, + unsigned int selector) +{ + if (!rdev->desc->volt_table) { + BUG_ON(!rdev->desc->volt_table); + return -EINVAL; + } + + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + if (selector < rdev->desc->linear_min_sel) + return 0; + + return rdev->desc->volt_table[selector]; +} +EXPORT_SYMBOL_GPL(regulator_list_voltage_table); + +/** + * regulator_set_bypass_regmap - Default set_bypass() using regmap + * + * @rdev: device to operate on. + * @enable: state to set. + */ +int regulator_set_bypass_regmap(struct regulator_dev *rdev, bool enable) +{ + unsigned int val; + + if (enable) { + val = rdev->desc->bypass_val_on; + if (!val) + val = rdev->desc->bypass_mask; + } else { + val = rdev->desc->bypass_val_off; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->bypass_reg, + rdev->desc->bypass_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_set_bypass_regmap); + +/** + * regulator_set_soft_start_regmap - Default set_soft_start() using regmap + * + * @rdev: device to operate on. + */ +int regulator_set_soft_start_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + + val = rdev->desc->soft_start_val_on; + if (!val) + val = rdev->desc->soft_start_mask; + + return regmap_update_bits(rdev->regmap, rdev->desc->soft_start_reg, + rdev->desc->soft_start_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_set_soft_start_regmap); + +/** + * regulator_set_pull_down_regmap - Default set_pull_down() using regmap + * + * @rdev: device to operate on. + */ +int regulator_set_pull_down_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + + val = rdev->desc->pull_down_val_on; + if (!val) + val = rdev->desc->pull_down_mask; + + return regmap_update_bits(rdev->regmap, rdev->desc->pull_down_reg, + rdev->desc->pull_down_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_set_pull_down_regmap); + +/** + * regulator_get_bypass_regmap - Default get_bypass() using regmap + * + * @rdev: device to operate on. + * @enable: current state. + */ +int regulator_get_bypass_regmap(struct regulator_dev *rdev, bool *enable) +{ + unsigned int val; + unsigned int val_on = rdev->desc->bypass_val_on; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->bypass_reg, &val); + if (ret != 0) + return ret; + + if (!val_on) + val_on = rdev->desc->bypass_mask; + + *enable = (val & rdev->desc->bypass_mask) == val_on; + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_get_bypass_regmap); + +/** + * regulator_set_active_discharge_regmap - Default set_active_discharge() + * using regmap + * + * @rdev: device to operate on. + * @enable: state to set, 0 to disable and 1 to enable. + */ +int regulator_set_active_discharge_regmap(struct regulator_dev *rdev, + bool enable) +{ + unsigned int val; + + if (enable) + val = rdev->desc->active_discharge_on; + else + val = rdev->desc->active_discharge_off; + + return regmap_update_bits(rdev->regmap, + rdev->desc->active_discharge_reg, + rdev->desc->active_discharge_mask, val); +} +EXPORT_SYMBOL_GPL(regulator_set_active_discharge_regmap); + +/** + * regulator_set_current_limit_regmap - set_current_limit for regmap users + * + * @rdev: regulator to operate on + * @min_uA: Lower bound for current limit + * @max_uA: Upper bound for current limit + * + * Regulators that use regmap for their register I/O can set curr_table, + * csel_reg and csel_mask fields in their descriptor and then use this + * as their set_current_limit operation, saving some code. + */ +int regulator_set_current_limit_regmap(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + unsigned int n_currents = rdev->desc->n_current_limits; + int i, sel = -1; + + if (n_currents == 0) + return -EINVAL; + + if (rdev->desc->curr_table) { + const unsigned int *curr_table = rdev->desc->curr_table; + bool ascend = curr_table[n_currents - 1] > curr_table[0]; + + /* search for closest to maximum */ + if (ascend) { + for (i = n_currents - 1; i >= 0; i--) { + if (min_uA <= curr_table[i] && + curr_table[i] <= max_uA) { + sel = i; + break; + } + } + } else { + for (i = 0; i < n_currents; i++) { + if (min_uA <= curr_table[i] && + curr_table[i] <= max_uA) { + sel = i; + break; + } + } + } + } + + if (sel < 0) + return -EINVAL; + + sel <<= ffs(rdev->desc->csel_mask) - 1; + + return regmap_update_bits(rdev->regmap, rdev->desc->csel_reg, + rdev->desc->csel_mask, sel); +} +EXPORT_SYMBOL_GPL(regulator_set_current_limit_regmap); + +/** + * regulator_get_current_limit_regmap - get_current_limit for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * csel_reg and csel_mask fields in their descriptor and then use this + * as their get_current_limit operation, saving some code. + */ +int regulator_get_current_limit_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->csel_reg, &val); + if (ret != 0) + return ret; + + val &= rdev->desc->csel_mask; + val >>= ffs(rdev->desc->csel_mask) - 1; + + if (rdev->desc->curr_table) { + if (val >= rdev->desc->n_current_limits) + return -EINVAL; + + return rdev->desc->curr_table[val]; + } + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(regulator_get_current_limit_regmap); + +/** + * regulator_bulk_set_supply_names - initialize the 'supply' fields in an array + * of regulator_bulk_data structs + * + * @consumers: array of regulator_bulk_data entries to initialize + * @supply_names: array of supply name strings + * @num_supplies: number of supply names to initialize + * + * Note: the 'consumers' array must be the size of 'num_supplies'. + */ +void regulator_bulk_set_supply_names(struct regulator_bulk_data *consumers, + const char *const *supply_names, + unsigned int num_supplies) +{ + unsigned int i; + + for (i = 0; i < num_supplies; i++) + consumers[i].supply = supply_names[i]; +} +EXPORT_SYMBOL_GPL(regulator_bulk_set_supply_names); + +/** + * regulator_is_equal - test whether two regulators are the same + * + * @reg1: first regulator to operate on + * @reg2: second regulator to operate on + */ +bool regulator_is_equal(struct regulator *reg1, struct regulator *reg2) +{ + return reg1->rdev == reg2->rdev; +} +EXPORT_SYMBOL_GPL(regulator_is_equal); + +/** + * regulator_find_closest_bigger - helper to find offset in ramp delay table + * + * @target: targeted ramp_delay + * @table: table with supported ramp delays + * @num_sel: number of entries in the table + * @sel: Pointer to store table offset + * + * This is the internal helper used by regulator_set_ramp_delay_regmap to + * map ramp delay to register value. It should only be used directly if + * regulator_set_ramp_delay_regmap cannot handle a specific device setup + * (e.g. because the value is split over multiple registers). + */ +int regulator_find_closest_bigger(unsigned int target, const unsigned int *table, + unsigned int num_sel, unsigned int *sel) +{ + unsigned int s, tmp, max, maxsel = 0; + bool found = false; + + max = table[0]; + + for (s = 0; s < num_sel; s++) { + if (table[s] > max) { + max = table[s]; + maxsel = s; + } + if (table[s] >= target) { + if (!found || table[s] - target < tmp - target) { + tmp = table[s]; + *sel = s; + found = true; + if (tmp == target) + break; + } + } + } + + if (!found) { + *sel = maxsel; + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_find_closest_bigger); + +/** + * regulator_set_ramp_delay_regmap - set_ramp_delay() helper + * + * @rdev: regulator to operate on + * @ramp_delay: ramp-rate value given in units V/S (uV/uS) + * + * Regulators that use regmap for their register I/O can set the ramp_reg + * and ramp_mask fields in their descriptor and then use this as their + * set_ramp_delay operation, saving some code. + */ +int regulator_set_ramp_delay_regmap(struct regulator_dev *rdev, int ramp_delay) +{ + int ret; + unsigned int sel; + + if (WARN_ON(!rdev->desc->n_ramp_values || !rdev->desc->ramp_delay_table)) + return -EINVAL; + + ret = regulator_find_closest_bigger(ramp_delay, rdev->desc->ramp_delay_table, + rdev->desc->n_ramp_values, &sel); + + if (ret) { + dev_warn(rdev_get_dev(rdev), + "Can't set ramp-delay %u, setting %u\n", ramp_delay, + rdev->desc->ramp_delay_table[sel]); + } + + sel <<= ffs(rdev->desc->ramp_mask) - 1; + + return regmap_update_bits(rdev->regmap, rdev->desc->ramp_reg, + rdev->desc->ramp_mask, sel); +} +EXPORT_SYMBOL_GPL(regulator_set_ramp_delay_regmap); diff --git a/drivers/regulator/hi6421-regulator.c b/drivers/regulator/hi6421-regulator.c new file mode 100644 index 000000000..3373c4fdb --- /dev/null +++ b/drivers/regulator/hi6421-regulator.c @@ -0,0 +1,590 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Device driver for regulators in Hi6421 IC +// +// Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd. +// http://www.hisilicon.com +// Copyright (c) <2013-2014> Linaro Ltd. +// https://www.linaro.org +// +// Author: Guodong Xu + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * struct hi6421_regulator_pdata - Hi6421 regulator data of platform device + * @lock: mutex to serialize regulator enable + */ +struct hi6421_regulator_pdata { + struct mutex lock; +}; + +/* + * struct hi6421_regulator_info - hi6421 regulator information + * @desc: regulator description + * @mode_mask: ECO mode bitmask of LDOs; for BUCKs, this masks sleep + * @eco_microamp: eco mode load upper limit (in uA), valid for LDOs only + */ +struct hi6421_regulator_info { + struct regulator_desc desc; + u8 mode_mask; + u32 eco_microamp; +}; + +/* HI6421 regulators */ +enum hi6421_regulator_id { + HI6421_LDO0, + HI6421_LDO1, + HI6421_LDO2, + HI6421_LDO3, + HI6421_LDO4, + HI6421_LDO5, + HI6421_LDO6, + HI6421_LDO7, + HI6421_LDO8, + HI6421_LDO9, + HI6421_LDO10, + HI6421_LDO11, + HI6421_LDO12, + HI6421_LDO13, + HI6421_LDO14, + HI6421_LDO15, + HI6421_LDO16, + HI6421_LDO17, + HI6421_LDO18, + HI6421_LDO19, + HI6421_LDO20, + HI6421_LDOAUDIO, + HI6421_BUCK0, + HI6421_BUCK1, + HI6421_BUCK2, + HI6421_BUCK3, + HI6421_BUCK4, + HI6421_BUCK5, + HI6421_NUM_REGULATORS, +}; + +/* LDO 0, 4~7, 9~14, 16~20 have same voltage table. */ +static const unsigned int ldo_0_voltages[] = { + 1500000, 1800000, 2400000, 2500000, + 2600000, 2700000, 2850000, 3000000, +}; + +/* LDO 8, 15 have same voltage table. */ +static const unsigned int ldo_8_voltages[] = { + 1500000, 1800000, 2400000, 2600000, + 2700000, 2850000, 3000000, 3300000, +}; + +/* Ranges are sorted in ascending order. */ +static const struct linear_range ldo_audio_volt_range[] = { + REGULATOR_LINEAR_RANGE(2800000, 0, 3, 50000), + REGULATOR_LINEAR_RANGE(3000000, 4, 7, 100000), +}; + +static const unsigned int buck_3_voltages[] = { + 950000, 1050000, 1100000, 1117000, + 1134000, 1150000, 1167000, 1200000, +}; + +static const unsigned int buck_4_voltages[] = { + 1150000, 1200000, 1250000, 1350000, + 1700000, 1800000, 1900000, 2000000, +}; + +static const unsigned int buck_5_voltages[] = { + 1150000, 1200000, 1250000, 1350000, + 1600000, 1700000, 1800000, 1900000, +}; + +static const struct regulator_ops hi6421_ldo_ops; +static const struct regulator_ops hi6421_ldo_linear_ops; +static const struct regulator_ops hi6421_ldo_linear_range_ops; +static const struct regulator_ops hi6421_buck012_ops; +static const struct regulator_ops hi6421_buck345_ops; + +#define HI6421_LDO_ENABLE_TIME (350) +/* + * _id - LDO id name string + * _match - of match name string + * v_table - voltage table + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * ecomask - eco mode mask + * ecoamp - eco mode load uppler limit in uA + */ +#define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ + odelay, ecomask, ecoamp) \ + [HI6421_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = #_match, \ + .regulators_node = "regulators", \ + .ops = &hi6421_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421_##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(v_table), \ + .volt_table = v_table, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = ecomask, \ + .eco_microamp = ecoamp, \ + } + +/* HI6421 LDO1~3 are linear voltage regulators at fixed uV_step + * + * _id - LDO id name string + * _match - of match name string + * _min_uV - minimum voltage supported in uV + * n_volt - number of votages available + * vstep - voltage increase in each linear step in uV + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * ecomask - eco mode mask + * ecoamp - eco mode load uppler limit in uA + */ +#define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ + ereg, emask, odelay, ecomask, ecoamp) \ + [HI6421_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = #_match, \ + .regulators_node = "regulators", \ + .ops = &hi6421_ldo_linear_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421_##_id, \ + .owner = THIS_MODULE, \ + .min_uV = _min_uV, \ + .n_voltages = n_volt, \ + .uV_step = vstep, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = ecomask, \ + .eco_microamp = ecoamp, \ + } + +/* HI6421 LDOAUDIO is a linear voltage regulator with two 4-step ranges + * + * _id - LDO id name string + * _match - of match name string + * n_volt - number of votages available + * volt_ranges - array of linear_range + * vstep - voltage increase in each linear step in uV + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * ecomask - eco mode mask + * ecoamp - eco mode load uppler limit in uA + */ +#define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ + ereg, emask, odelay, ecomask, ecoamp) \ + [HI6421_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = #_match, \ + .regulators_node = "regulators", \ + .ops = &hi6421_ldo_linear_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421_##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = n_volt, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = ecomask, \ + .eco_microamp = ecoamp, \ + } + +/* HI6421 BUCK0/1/2 are linear voltage regulators at fixed uV_step + * + * _id - BUCK0/1/2 id name string + * _match - of match name string + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * sleepmask - mask of sleep mode + * etime - enable time + * odelay - off/on delay time in uS + */ +#define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ + etime, odelay) \ + [HI6421_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = #_match, \ + .regulators_node = "regulators", \ + .ops = &hi6421_buck012_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421_##_id, \ + .owner = THIS_MODULE, \ + .min_uV = 700000, \ + .n_voltages = 128, \ + .uV_step = 7086, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = etime, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = sleepmask, \ + } + +/* HI6421 BUCK3/4/5 share similar configurations as LDOs, with exception + * that it supports SLEEP mode, so has different .ops. + * + * _id - LDO id name string + * _match - of match name string + * v_table - voltage table + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * sleepmask - mask of sleep mode + */ +#define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ + odelay, sleepmask) \ + [HI6421_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = #_match, \ + .regulators_node = "regulators", \ + .ops = &hi6421_buck345_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421_##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(v_table), \ + .volt_table = v_table, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = sleepmask, \ + } + +/* HI6421 regulator information */ +static const struct hi6421_regulator_info + hi6421_regulator_info[HI6421_NUM_REGULATORS] = { + HI6421_LDO(LDO0, hi6421_vout0, ldo_0_voltages, 0x20, 0x07, 0x20, 0x10, + 10000, 0x20, 8000), + HI6421_LDO_LINEAR(LDO1, hi6421_vout1, 1700000, 4, 100000, 0x21, 0x03, + 0x21, 0x10, 10000, 0x20, 5000), + HI6421_LDO_LINEAR(LDO2, hi6421_vout2, 1050000, 8, 50000, 0x22, 0x07, + 0x22, 0x10, 20000, 0x20, 8000), + HI6421_LDO_LINEAR(LDO3, hi6421_vout3, 1050000, 8, 50000, 0x23, 0x07, + 0x23, 0x10, 20000, 0x20, 8000), + HI6421_LDO(LDO4, hi6421_vout4, ldo_0_voltages, 0x24, 0x07, 0x24, 0x10, + 20000, 0x20, 8000), + HI6421_LDO(LDO5, hi6421_vout5, ldo_0_voltages, 0x25, 0x07, 0x25, 0x10, + 20000, 0x20, 8000), + HI6421_LDO(LDO6, hi6421_vout6, ldo_0_voltages, 0x26, 0x07, 0x26, 0x10, + 20000, 0x20, 8000), + HI6421_LDO(LDO7, hi6421_vout7, ldo_0_voltages, 0x27, 0x07, 0x27, 0x10, + 20000, 0x20, 5000), + HI6421_LDO(LDO8, hi6421_vout8, ldo_8_voltages, 0x28, 0x07, 0x28, 0x10, + 20000, 0x20, 8000), + HI6421_LDO(LDO9, hi6421_vout9, ldo_0_voltages, 0x29, 0x07, 0x29, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO10, hi6421_vout10, ldo_0_voltages, 0x2a, 0x07, 0x2a, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO11, hi6421_vout11, ldo_0_voltages, 0x2b, 0x07, 0x2b, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO12, hi6421_vout12, ldo_0_voltages, 0x2c, 0x07, 0x2c, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO13, hi6421_vout13, ldo_0_voltages, 0x2d, 0x07, 0x2d, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO14, hi6421_vout14, ldo_0_voltages, 0x2e, 0x07, 0x2e, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO15, hi6421_vout15, ldo_8_voltages, 0x2f, 0x07, 0x2f, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO16, hi6421_vout16, ldo_0_voltages, 0x30, 0x07, 0x30, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO17, hi6421_vout17, ldo_0_voltages, 0x31, 0x07, 0x31, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO18, hi6421_vout18, ldo_0_voltages, 0x32, 0x07, 0x32, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO19, hi6421_vout19, ldo_0_voltages, 0x33, 0x07, 0x33, 0x10, + 40000, 0x20, 8000), + HI6421_LDO(LDO20, hi6421_vout20, ldo_0_voltages, 0x34, 0x07, 0x34, 0x10, + 40000, 0x20, 8000), + HI6421_LDO_LINEAR_RANGE(LDOAUDIO, hi6421_vout_audio, 8, + ldo_audio_volt_range, 0x36, 0x70, 0x36, 0x01, + 40000, 0x02, 5000), + HI6421_BUCK012(BUCK0, hi6421_buck0, 0x0d, 0x7f, 0x0c, 0x01, 0x10, 400, + 20000), + HI6421_BUCK012(BUCK1, hi6421_buck1, 0x0f, 0x7f, 0x0e, 0x01, 0x10, 400, + 20000), + HI6421_BUCK012(BUCK2, hi6421_buck2, 0x11, 0x7f, 0x10, 0x01, 0x10, 350, + 100), + HI6421_BUCK345(BUCK3, hi6421_buck3, buck_3_voltages, 0x13, 0x07, 0x12, + 0x01, 20000, 0x10), + HI6421_BUCK345(BUCK4, hi6421_buck4, buck_4_voltages, 0x15, 0x07, 0x14, + 0x01, 20000, 0x10), + HI6421_BUCK345(BUCK5, hi6421_buck5, buck_5_voltages, 0x17, 0x07, 0x16, + 0x01, 20000, 0x10), +}; + +static int hi6421_regulator_enable(struct regulator_dev *rdev) +{ + struct hi6421_regulator_pdata *pdata = rdev_get_drvdata(rdev); + + /* hi6421 spec requires regulator enablement must be serialized: + * - Because when BUCK, LDO switching from off to on, it will have + * a huge instantaneous current; so you can not turn on two or + * more LDO or BUCKs simultaneously, or it may burn the chip. + */ + mutex_lock(&pdata->lock); + + /* call regulator regmap helper */ + regulator_enable_regmap(rdev); + + mutex_unlock(&pdata->lock); + return 0; +} + +static unsigned int hi6421_regulator_ldo_get_mode(struct regulator_dev *rdev) +{ + const struct hi6421_regulator_info *info; + unsigned int reg_val; + + info = container_of_const(rdev->desc, struct hi6421_regulator_info, desc); + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + if (reg_val & info->mode_mask) + return REGULATOR_MODE_IDLE; + + return REGULATOR_MODE_NORMAL; +} + +static unsigned int hi6421_regulator_buck_get_mode(struct regulator_dev *rdev) +{ + const struct hi6421_regulator_info *info; + unsigned int reg_val; + + info = container_of_const(rdev->desc, struct hi6421_regulator_info, desc); + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + if (reg_val & info->mode_mask) + return REGULATOR_MODE_STANDBY; + + return REGULATOR_MODE_NORMAL; +} + +static int hi6421_regulator_ldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct hi6421_regulator_info *info; + unsigned int new_mode; + + info = container_of_const(rdev->desc, struct hi6421_regulator_info, desc); + switch (mode) { + case REGULATOR_MODE_NORMAL: + new_mode = 0; + break; + case REGULATOR_MODE_IDLE: + new_mode = info->mode_mask; + break; + default: + return -EINVAL; + } + + /* set mode */ + regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + info->mode_mask, new_mode); + + return 0; +} + +static int hi6421_regulator_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct hi6421_regulator_info *info; + unsigned int new_mode; + + info = container_of_const(rdev->desc, struct hi6421_regulator_info, desc); + switch (mode) { + case REGULATOR_MODE_NORMAL: + new_mode = 0; + break; + case REGULATOR_MODE_STANDBY: + new_mode = info->mode_mask; + break; + default: + return -EINVAL; + } + + /* set mode */ + regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + info->mode_mask, new_mode); + + return 0; +} + +static unsigned int +hi6421_regulator_ldo_get_optimum_mode(struct regulator_dev *rdev, + int input_uV, int output_uV, int load_uA) +{ + const struct hi6421_regulator_info *info; + + info = container_of_const(rdev->desc, struct hi6421_regulator_info, desc); + + if (load_uA > info->eco_microamp) + return REGULATOR_MODE_NORMAL; + + return REGULATOR_MODE_IDLE; +} + +static const struct regulator_ops hi6421_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_regulator_ldo_get_mode, + .set_mode = hi6421_regulator_ldo_set_mode, + .get_optimum_mode = hi6421_regulator_ldo_get_optimum_mode, +}; + +static const struct regulator_ops hi6421_ldo_linear_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_regulator_ldo_get_mode, + .set_mode = hi6421_regulator_ldo_set_mode, + .get_optimum_mode = hi6421_regulator_ldo_get_optimum_mode, +}; + +static const struct regulator_ops hi6421_ldo_linear_range_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_regulator_ldo_get_mode, + .set_mode = hi6421_regulator_ldo_set_mode, + .get_optimum_mode = hi6421_regulator_ldo_get_optimum_mode, +}; + +static const struct regulator_ops hi6421_buck012_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_regulator_buck_get_mode, + .set_mode = hi6421_regulator_buck_set_mode, +}; + +static const struct regulator_ops hi6421_buck345_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_regulator_buck_get_mode, + .set_mode = hi6421_regulator_buck_set_mode, +}; + +static int hi6421_regulator_probe(struct platform_device *pdev) +{ + struct hi6421_pmic *pmic = dev_get_drvdata(pdev->dev.parent); + struct hi6421_regulator_pdata *pdata; + const struct hi6421_regulator_info *info; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + mutex_init(&pdata->lock); + + for (i = 0; i < ARRAY_SIZE(hi6421_regulator_info); i++) { + /* assign per-regulator data */ + info = &hi6421_regulator_info[i]; + + config.dev = pdev->dev.parent; + config.driver_data = pdata; + config.regmap = pmic->regmap; + + rdev = devm_regulator_register(&pdev->dev, &info->desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id hi6421_regulator_table[] = { + { .name = "hi6421-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, hi6421_regulator_table); + +static struct platform_driver hi6421_regulator_driver = { + .id_table = hi6421_regulator_table, + .driver = { + .name = "hi6421-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = hi6421_regulator_probe, +}; +module_platform_driver(hi6421_regulator_driver); + +MODULE_AUTHOR("Guodong Xu "); +MODULE_DESCRIPTION("Hi6421 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/hi6421v530-regulator.c b/drivers/regulator/hi6421v530-regulator.c new file mode 100644 index 000000000..7f4fc7175 --- /dev/null +++ b/drivers/regulator/hi6421v530-regulator.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Device driver for regulators in Hi6421V530 IC +// +// Copyright (c) <2017> HiSilicon Technologies Co., Ltd. +// http://www.hisilicon.com +// Copyright (c) <2017> Linaro Ltd. +// https://www.linaro.org +// +// Author: Wang Xiaoyin +// Guodong Xu + +#include +#include +#include +#include +#include +#include + +/* + * struct hi6421v530_regulator_info - hi6421v530 regulator information + * @desc: regulator description + * @mode_mask: ECO mode bitmask of LDOs; for BUCKs, this masks sleep + */ +struct hi6421v530_regulator_info { + struct regulator_desc rdesc; + u8 mode_mask; +}; + +/* HI6421v530 regulators */ +enum hi6421v530_regulator_id { + HI6421V530_LDO3, + HI6421V530_LDO9, + HI6421V530_LDO11, + HI6421V530_LDO15, + HI6421V530_LDO16, +}; + +static const unsigned int ldo_3_voltages[] = { + 1800000, 1825000, 1850000, 1875000, + 1900000, 1925000, 1950000, 1975000, + 2000000, 2025000, 2050000, 2075000, + 2100000, 2125000, 2150000, 2200000, +}; + +static const unsigned int ldo_9_11_voltages[] = { + 1750000, 1800000, 1825000, 2800000, + 2850000, 2950000, 3000000, 3300000, +}; + +static const unsigned int ldo_15_16_voltages[] = { + 1750000, 1800000, 2400000, 2600000, + 2700000, 2850000, 2950000, 3000000, +}; + +static const struct regulator_ops hi6421v530_ldo_ops; + +#define HI6421V530_LDO_ENABLE_TIME (350) + +/* + * _id - LDO id name string + * v_table - voltage table + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * ecomask - eco mode mask + */ +#define HI6421V530_LDO(_ID, v_table, vreg, vmask, ereg, emask, \ + odelay, ecomask) { \ + .rdesc = { \ + .name = #_ID, \ + .of_match = of_match_ptr(#_ID), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &hi6421v530_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421V530_##_ID, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(v_table), \ + .volt_table = v_table, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421V530_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = ecomask, \ +} + +/* HI6421V530 regulator information */ + +static const struct hi6421v530_regulator_info hi6421v530_regulator_info[] = { + HI6421V530_LDO(LDO3, ldo_3_voltages, 0x061, 0xf, 0x060, 0x2, + 20000, 0x6), + HI6421V530_LDO(LDO9, ldo_9_11_voltages, 0x06b, 0x7, 0x06a, 0x2, + 40000, 0x6), + HI6421V530_LDO(LDO11, ldo_9_11_voltages, 0x06f, 0x7, 0x06e, 0x2, + 40000, 0x6), + HI6421V530_LDO(LDO15, ldo_15_16_voltages, 0x077, 0x7, 0x076, 0x2, + 40000, 0x6), + HI6421V530_LDO(LDO16, ldo_15_16_voltages, 0x079, 0x7, 0x078, 0x2, + 40000, 0x6), +}; + +static unsigned int hi6421v530_regulator_ldo_get_mode( + struct regulator_dev *rdev) +{ + const struct hi6421v530_regulator_info *info; + unsigned int reg_val; + + info = container_of_const(rdev->desc, struct hi6421v530_regulator_info, rdesc); + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + + if (reg_val & (info->mode_mask)) + return REGULATOR_MODE_IDLE; + + return REGULATOR_MODE_NORMAL; +} + +static int hi6421v530_regulator_ldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct hi6421v530_regulator_info *info; + unsigned int new_mode; + + info = container_of_const(rdev->desc, struct hi6421v530_regulator_info, rdesc); + switch (mode) { + case REGULATOR_MODE_NORMAL: + new_mode = 0; + break; + case REGULATOR_MODE_IDLE: + new_mode = info->mode_mask; + break; + default: + return -EINVAL; + } + + regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + info->mode_mask, new_mode); + + return 0; +} + + +static const struct regulator_ops hi6421v530_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421v530_regulator_ldo_get_mode, + .set_mode = hi6421v530_regulator_ldo_set_mode, +}; + +static int hi6421v530_regulator_probe(struct platform_device *pdev) +{ + struct hi6421_pmic *pmic; + struct regulator_dev *rdev; + struct regulator_config config = { }; + unsigned int i; + + pmic = dev_get_drvdata(pdev->dev.parent); + if (!pmic) { + dev_err(&pdev->dev, "no pmic in the regulator parent node\n"); + return -ENODEV; + } + + for (i = 0; i < ARRAY_SIZE(hi6421v530_regulator_info); i++) { + config.dev = pdev->dev.parent; + config.regmap = pmic->regmap; + + rdev = devm_regulator_register(&pdev->dev, + &hi6421v530_regulator_info[i].rdesc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + hi6421v530_regulator_info[i].rdesc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id hi6421v530_regulator_table[] = { + { .name = "hi6421v530-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, hi6421v530_regulator_table); + +static struct platform_driver hi6421v530_regulator_driver = { + .id_table = hi6421v530_regulator_table, + .driver = { + .name = "hi6421v530-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = hi6421v530_regulator_probe, +}; +module_platform_driver(hi6421v530_regulator_driver); + +MODULE_AUTHOR("Wang Xiaoyin "); +MODULE_DESCRIPTION("Hi6421v530 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/hi6421v600-regulator.c b/drivers/regulator/hi6421v600-regulator.c new file mode 100644 index 000000000..c42858c93 --- /dev/null +++ b/drivers/regulator/hi6421v600-regulator.c @@ -0,0 +1,295 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Device driver for regulators in Hisi IC +// +// Copyright (c) 2013 Linaro Ltd. +// Copyright (c) 2011 HiSilicon Ltd. +// Copyright (c) 2020-2021 Huawei Technologies Co., Ltd. +// +// Guodong Xu + +#include +#include +#include +#include +#include +#include +#include + +struct hi6421_spmi_reg_priv { + /* Serialize regulator enable logic */ + struct mutex enable_mutex; +}; + +struct hi6421_spmi_reg_info { + struct regulator_desc desc; + u8 eco_mode_mask; + u32 eco_uA; +}; + +static const unsigned int range_1v5_to_2v0[] = { + 1500000, 1550000, 1600000, 1650000, + 1700000, 1725000, 1750000, 1775000, + 1800000, 1825000, 1850000, 1875000, + 1900000, 1925000, 1950000, 2000000 +}; + +static const unsigned int range_1v725_to_1v9[] = { + 1725000, 1750000, 1775000, 1800000, + 1825000, 1850000, 1875000, 1900000 +}; + +static const unsigned int range_1v75_to_3v3[] = { + 1750000, 1800000, 1825000, 2800000, + 2850000, 2950000, 3000000, 3300000 +}; + +static const unsigned int range_1v8_to_3v0[] = { + 1800000, 1850000, 2400000, 2600000, + 2700000, 2850000, 2950000, 3000000 +}; + +static const unsigned int range_2v5_to_3v3[] = { + 2500000, 2600000, 2700000, 2800000, + 3000000, 3100000, 3200000, 3300000 +}; + +static const unsigned int range_2v6_to_3v3[] = { + 2600000, 2700000, 2800000, 2900000, + 3000000, 3100000, 3200000, 3300000 +}; + +/** + * HI6421V600_LDO() - specify a LDO power line + * @_id: LDO id name string + * @vtable: voltage table + * @ereg: enable register + * @emask: enable mask + * @vreg: voltage select register + * @odelay: off/on delay time in uS + * @etime: enable time in uS + * @ecomask: eco mode mask + * @ecoamp: eco mode load uppler limit in uA + */ +#define HI6421V600_LDO(_id, vtable, ereg, emask, vreg, \ + odelay, etime, ecomask, ecoamp) \ + [hi6421v600_##_id] = { \ + .desc = { \ + .name = #_id, \ + .of_match = of_match_ptr(#_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &hi6421_spmi_ldo_rops, \ + .type = REGULATOR_VOLTAGE, \ + .id = hi6421v600_##_id, \ + .owner = THIS_MODULE, \ + .volt_table = vtable, \ + .n_voltages = ARRAY_SIZE(vtable), \ + .vsel_mask = ARRAY_SIZE(vtable) - 1, \ + .vsel_reg = vreg, \ + .enable_reg = ereg, \ + .enable_mask = emask, \ + .enable_time = etime, \ + .ramp_delay = etime, \ + .off_on_delay = odelay, \ + }, \ + .eco_mode_mask = ecomask, \ + .eco_uA = ecoamp, \ + } + +static int hi6421_spmi_regulator_enable(struct regulator_dev *rdev) +{ + struct hi6421_spmi_reg_priv *priv = rdev_get_drvdata(rdev); + int ret; + + /* cannot enable more than one regulator at one time */ + mutex_lock(&priv->enable_mutex); + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + rdev->desc->enable_mask); + + /* Avoid powering up multiple devices at the same time */ + usleep_range(rdev->desc->off_on_delay, rdev->desc->off_on_delay + 60); + + mutex_unlock(&priv->enable_mutex); + + return ret; +} + +static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev) +{ + const struct hi6421_spmi_reg_info *sreg; + unsigned int reg_val; + + sreg = container_of_const(rdev->desc, struct hi6421_spmi_reg_info, desc); + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + + if (reg_val & sreg->eco_mode_mask) + return REGULATOR_MODE_IDLE; + + return REGULATOR_MODE_NORMAL; +} + +static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct hi6421_spmi_reg_info *sreg; + unsigned int val; + + sreg = container_of_const(rdev->desc, struct hi6421_spmi_reg_info, desc); + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_IDLE: + if (!sreg->eco_mode_mask) + return -EINVAL; + + val = sreg->eco_mode_mask; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + sreg->eco_mode_mask, val); +} + +static unsigned int +hi6421_spmi_regulator_get_optimum_mode(struct regulator_dev *rdev, + int input_uV, int output_uV, + int load_uA) +{ + const struct hi6421_spmi_reg_info *sreg; + + sreg = container_of_const(rdev->desc, struct hi6421_spmi_reg_info, desc); + + if (!sreg->eco_uA || ((unsigned int)load_uA > sreg->eco_uA)) + return REGULATOR_MODE_NORMAL; + + return REGULATOR_MODE_IDLE; +} + +static const struct regulator_ops hi6421_spmi_ldo_rops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = hi6421_spmi_regulator_enable, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = hi6421_spmi_regulator_get_mode, + .set_mode = hi6421_spmi_regulator_set_mode, + .get_optimum_mode = hi6421_spmi_regulator_get_optimum_mode, +}; + +/* HI6421v600 regulators with known registers */ +enum hi6421_spmi_regulator_id { + hi6421v600_ldo3, + hi6421v600_ldo4, + hi6421v600_ldo9, + hi6421v600_ldo15, + hi6421v600_ldo16, + hi6421v600_ldo17, + hi6421v600_ldo33, + hi6421v600_ldo34, +}; + +static const struct hi6421_spmi_reg_info regulator_info[] = { + HI6421V600_LDO(ldo3, range_1v5_to_2v0, + 0x16, 0x01, 0x51, + 20000, 120, + 0, 0), + HI6421V600_LDO(ldo4, range_1v725_to_1v9, + 0x17, 0x01, 0x52, + 20000, 120, + 0x10, 10000), + HI6421V600_LDO(ldo9, range_1v75_to_3v3, + 0x1c, 0x01, 0x57, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(ldo15, range_1v8_to_3v0, + 0x21, 0x01, 0x5c, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(ldo16, range_1v8_to_3v0, + 0x22, 0x01, 0x5d, + 20000, 360, + 0x10, 10000), + HI6421V600_LDO(ldo17, range_2v5_to_3v3, + 0x23, 0x01, 0x5e, + 20000, 120, + 0x10, 10000), + HI6421V600_LDO(ldo33, range_2v5_to_3v3, + 0x32, 0x01, 0x6d, + 20000, 120, + 0, 0), + HI6421V600_LDO(ldo34, range_2v6_to_3v3, + 0x33, 0x01, 0x6e, + 20000, 120, + 0, 0), +}; + +static int hi6421_spmi_regulator_probe(struct platform_device *pdev) +{ + struct device *pmic_dev = pdev->dev.parent; + struct regulator_config config = { }; + struct hi6421_spmi_reg_priv *priv; + const struct hi6421_spmi_reg_info *info; + struct device *dev = &pdev->dev; + struct regmap *regmap; + struct regulator_dev *rdev; + int i; + + /* + * This driver is meant to be called by hi6421-spmi-core, + * which should first set drvdata. If this doesn't happen, hit + * a warn on and return. + */ + regmap = dev_get_drvdata(pmic_dev); + if (WARN_ON(!regmap)) + return -ENODEV; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->enable_mutex); + + for (i = 0; i < ARRAY_SIZE(regulator_info); i++) { + info = ®ulator_info[i]; + + config.dev = pdev->dev.parent; + config.driver_data = priv; + config.regmap = regmap; + + rdev = devm_regulator_register(dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "failed to register %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id hi6421_spmi_regulator_table[] = { + { .name = "hi6421v600-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, hi6421_spmi_regulator_table); + +static struct platform_driver hi6421_spmi_regulator_driver = { + .id_table = hi6421_spmi_regulator_table, + .driver = { + .name = "hi6421v600-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = hi6421_spmi_regulator_probe, +}; +module_platform_driver(hi6421_spmi_regulator_driver); + +MODULE_DESCRIPTION("Hi6421v600 SPMI regulator driver"); +MODULE_LICENSE("GPL v2"); + diff --git a/drivers/regulator/hi655x-regulator.c b/drivers/regulator/hi655x-regulator.c new file mode 100644 index 000000000..b2b454b6a --- /dev/null +++ b/drivers/regulator/hi655x-regulator.c @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Device driver for regulators in Hi655x IC +// +// Copyright (c) 2016 HiSilicon Ltd. +// +// Authors: +// Chen Feng +// Fei Wang + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct hi655x_regulator { + unsigned int disable_reg; + unsigned int status_reg; + struct regulator_desc rdesc; +}; + +/* LDO7 & LDO10 */ +static const unsigned int ldo7_voltages[] = { + 1800000, 1850000, 2850000, 2900000, + 3000000, 3100000, 3200000, 3300000, +}; + +static const unsigned int ldo19_voltages[] = { + 1800000, 1850000, 1900000, 1750000, + 2800000, 2850000, 2900000, 3000000, +}; + +static const unsigned int ldo22_voltages[] = { + 900000, 1000000, 1050000, 1100000, + 1150000, 1175000, 1185000, 1200000, +}; + +enum hi655x_regulator_id { + HI655X_LDO0, + HI655X_LDO1, + HI655X_LDO2, + HI655X_LDO3, + HI655X_LDO4, + HI655X_LDO5, + HI655X_LDO6, + HI655X_LDO7, + HI655X_LDO8, + HI655X_LDO9, + HI655X_LDO10, + HI655X_LDO11, + HI655X_LDO12, + HI655X_LDO13, + HI655X_LDO14, + HI655X_LDO15, + HI655X_LDO16, + HI655X_LDO17, + HI655X_LDO18, + HI655X_LDO19, + HI655X_LDO20, + HI655X_LDO21, + HI655X_LDO22, +}; + +static int hi655x_is_enabled(struct regulator_dev *rdev) +{ + unsigned int value = 0; + const struct hi655x_regulator *regulator = rdev_get_drvdata(rdev); + + regmap_read(rdev->regmap, regulator->status_reg, &value); + return (value & rdev->desc->enable_mask); +} + +static int hi655x_disable(struct regulator_dev *rdev) +{ + const struct hi655x_regulator *regulator = rdev_get_drvdata(rdev); + + return regmap_write(rdev->regmap, regulator->disable_reg, + rdev->desc->enable_mask); +} + +static const struct regulator_ops hi655x_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = hi655x_disable, + .is_enabled = hi655x_is_enabled, + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops hi655x_ldo_linear_ops = { + .enable = regulator_enable_regmap, + .disable = hi655x_disable, + .is_enabled = hi655x_is_enabled, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +#define HI655X_LDO(_ID, vreg, vmask, ereg, dreg, \ + sreg, cmask, vtable) { \ + .rdesc = { \ + .name = #_ID, \ + .of_match = of_match_ptr(#_ID), \ + .ops = &hi655x_regulator_ops, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = HI655X_##_ID, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(vtable), \ + .volt_table = vtable, \ + .vsel_reg = HI655X_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI655X_BUS_ADDR(ereg), \ + .enable_mask = BIT(cmask), \ + }, \ + .disable_reg = HI655X_BUS_ADDR(dreg), \ + .status_reg = HI655X_BUS_ADDR(sreg), \ +} + +#define HI655X_LDO_LINEAR(_ID, vreg, vmask, ereg, dreg, \ + sreg, cmask, minv, nvolt, vstep) { \ + .rdesc = { \ + .name = #_ID, \ + .of_match = of_match_ptr(#_ID), \ + .ops = &hi655x_ldo_linear_ops, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = HI655X_##_ID, \ + .owner = THIS_MODULE, \ + .min_uV = minv, \ + .n_voltages = nvolt, \ + .uV_step = vstep, \ + .vsel_reg = HI655X_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI655X_BUS_ADDR(ereg), \ + .enable_mask = BIT(cmask), \ + }, \ + .disable_reg = HI655X_BUS_ADDR(dreg), \ + .status_reg = HI655X_BUS_ADDR(sreg), \ +} + +static const struct hi655x_regulator regulators[] = { + HI655X_LDO_LINEAR(LDO2, 0x72, 0x07, 0x29, 0x2a, 0x2b, 0x01, + 2500000, 8, 100000), + HI655X_LDO(LDO7, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x06, ldo7_voltages), + HI655X_LDO(LDO10, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x01, ldo7_voltages), + HI655X_LDO_LINEAR(LDO13, 0x7e, 0x07, 0x2c, 0x2d, 0x2e, 0x04, + 1600000, 8, 50000), + HI655X_LDO_LINEAR(LDO14, 0x7f, 0x07, 0x2c, 0x2d, 0x2e, 0x05, + 2500000, 8, 100000), + HI655X_LDO_LINEAR(LDO15, 0x80, 0x07, 0x2c, 0x2d, 0x2e, 0x06, + 1600000, 8, 50000), + HI655X_LDO_LINEAR(LDO17, 0x82, 0x07, 0x2f, 0x30, 0x31, 0x00, + 2500000, 8, 100000), + HI655X_LDO(LDO19, 0x84, 0x07, 0x2f, 0x30, 0x31, 0x02, ldo19_voltages), + HI655X_LDO_LINEAR(LDO21, 0x86, 0x07, 0x2f, 0x30, 0x31, 0x04, + 1650000, 8, 50000), + HI655X_LDO(LDO22, 0x87, 0x07, 0x2f, 0x30, 0x31, 0x05, ldo22_voltages), +}; + +static int hi655x_regulator_probe(struct platform_device *pdev) +{ + unsigned int i; + struct hi655x_pmic *pmic; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + pmic = dev_get_drvdata(pdev->dev.parent); + if (!pmic) { + dev_err(&pdev->dev, "no pmic in the regulator parent node\n"); + return -ENODEV; + } + + config.dev = pdev->dev.parent; + config.regmap = pmic->regmap; + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + config.driver_data = (void *) ®ulators[i]; + + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i].rdesc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + regulators[i].rdesc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id hi655x_regulator_table[] = { + { .name = "hi655x-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, hi655x_regulator_table); + +static struct platform_driver hi655x_regulator_driver = { + .id_table = hi655x_regulator_table, + .driver = { + .name = "hi655x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = hi655x_regulator_probe, +}; +module_platform_driver(hi655x_regulator_driver); + +MODULE_AUTHOR("Chen Feng "); +MODULE_DESCRIPTION("Hisilicon Hi655x regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/internal.h b/drivers/regulator/internal.h new file mode 100644 index 000000000..b3d48dc38 --- /dev/null +++ b/drivers/regulator/internal.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * internal.h -- Voltage/Current Regulator framework internal code + * + * Copyright 2007, 2008 Wolfson Microelectronics PLC. + * Copyright 2008 SlimLogic Ltd. + * + * Author: Liam Girdwood + */ + +#ifndef __REGULATOR_INTERNAL_H +#define __REGULATOR_INTERNAL_H + +#include + +#define REGULATOR_STATES_NUM (PM_SUSPEND_MAX + 1) + +#define rdev_crit(rdev, fmt, ...) \ + pr_crit("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) +#define rdev_err(rdev, fmt, ...) \ + pr_err("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) +#define rdev_warn(rdev, fmt, ...) \ + pr_warn("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) +#define rdev_info(rdev, fmt, ...) \ + pr_info("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) +#define rdev_dbg(rdev, fmt, ...) \ + pr_debug("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) + +struct regulator_voltage { + int min_uV; + int max_uV; +}; + +/* + * struct regulator + * + * One for each consumer device. + * @voltage - a voltage array for each state of runtime, i.e.: + * PM_SUSPEND_ON + * PM_SUSPEND_TO_IDLE + * PM_SUSPEND_STANDBY + * PM_SUSPEND_MEM + * PM_SUSPEND_MAX + */ +struct regulator { + struct device *dev; + struct list_head list; + unsigned int always_on:1; + unsigned int bypass:1; + unsigned int device_link:1; + int uA_load; + unsigned int enable_count; + unsigned int deferred_disables; + struct regulator_voltage voltage[REGULATOR_STATES_NUM]; + const char *supply_name; + struct device_attribute dev_attr; + struct regulator_dev *rdev; + struct dentry *debugfs; +}; + +extern const struct class regulator_class; + +static inline struct regulator_dev *dev_to_rdev(struct device *dev) +{ + return container_of(dev, struct regulator_dev, dev); +} + +enum regulator_get_type { + NORMAL_GET, + EXCLUSIVE_GET, + OPTIONAL_GET, + MAX_GET_TYPE +}; + +#ifdef CONFIG_OF +struct regulator_dev *of_regulator_dev_lookup(struct device *dev, + struct device_node *np, + const char *supply); +struct regulator_init_data *regulator_of_get_init_data(struct device *dev, + const struct regulator_desc *desc, + struct regulator_config *config, + struct device_node **node); + +struct regulator *_of_regulator_get(struct device *dev, struct device_node *node, + const char *id, enum regulator_get_type get_type); + +struct regulator_dev *of_parse_coupled_regulator(struct regulator_dev *rdev, + int index); + +int of_get_n_coupled(struct regulator_dev *rdev); + +bool of_check_coupling_data(struct regulator_dev *rdev); + +#else +static inline struct regulator_dev *of_regulator_dev_lookup(struct device *dev, + struct device_node *np, + const char *supply) +{ + return ERR_PTR(-ENODEV); +} + +static inline struct regulator_init_data * +regulator_of_get_init_data(struct device *dev, + const struct regulator_desc *desc, + struct regulator_config *config, + struct device_node **node) +{ + return NULL; +} + +static inline struct regulator_dev * +of_parse_coupled_regulator(struct regulator_dev *rdev, + int index) +{ + return NULL; +} + +static inline int of_get_n_coupled(struct regulator_dev *rdev) +{ + return 0; +} + +static inline bool of_check_coupling_data(struct regulator_dev *rdev) +{ + return false; +} + +#endif + +int _regulator_get_common_check(struct device *dev, const char *id, + enum regulator_get_type get_type); +struct regulator *_regulator_get_common(struct regulator_dev *rdev, struct device *dev, + const char *id, enum regulator_get_type get_type); +struct regulator *_regulator_get(struct device *dev, const char *id, + enum regulator_get_type get_type); +int _regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers, enum regulator_get_type get_type); +#endif diff --git a/drivers/regulator/irq_helpers.c b/drivers/regulator/irq_helpers.c new file mode 100644 index 000000000..5b3cfac28 --- /dev/null +++ b/drivers/regulator/irq_helpers.c @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2021 ROHM Semiconductors +// regulator IRQ based event notification helpers +// +// Logic has been partially adapted from qcom-labibb driver. +// +// Author: Matti Vaittinen + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "internal.h" + +#define REGULATOR_FORCED_SAFETY_SHUTDOWN_WAIT_MS 10000 + +struct regulator_irq { + struct regulator_irq_data rdata; + struct regulator_irq_desc desc; + int irq; + int retry_cnt; + struct delayed_work isr_work; +}; + +/* + * Should only be called from threaded handler to prevent potential deadlock + */ +static void rdev_flag_err(struct regulator_dev *rdev, int err) +{ + spin_lock(&rdev->err_lock); + rdev->cached_err |= err; + spin_unlock(&rdev->err_lock); +} + +static void rdev_clear_err(struct regulator_dev *rdev, int err) +{ + spin_lock(&rdev->err_lock); + rdev->cached_err &= ~err; + spin_unlock(&rdev->err_lock); +} + +static void regulator_notifier_isr_work(struct work_struct *work) +{ + struct regulator_irq *h; + struct regulator_irq_desc *d; + struct regulator_irq_data *rid; + int ret = 0; + int tmo, i; + int num_rdevs; + + h = container_of(work, struct regulator_irq, + isr_work.work); + d = &h->desc; + rid = &h->rdata; + num_rdevs = rid->num_states; + +reread: + if (d->fatal_cnt && h->retry_cnt > d->fatal_cnt) { + if (!d->die) + return hw_protection_trigger("Regulator HW failure? - no IC recovery", + REGULATOR_FORCED_SAFETY_SHUTDOWN_WAIT_MS); + ret = d->die(rid); + /* + * If the 'last resort' IC recovery failed we will have + * nothing else left to do... + */ + if (ret) + return hw_protection_trigger("Regulator HW failure. IC recovery failed", + REGULATOR_FORCED_SAFETY_SHUTDOWN_WAIT_MS); + + /* + * If h->die() was implemented we assume recovery has been + * attempted (probably regulator was shut down) and we + * just enable IRQ and bail-out. + */ + goto enable_out; + } + if (d->renable) { + ret = d->renable(rid); + + if (ret == REGULATOR_FAILED_RETRY) { + /* Driver could not get current status */ + h->retry_cnt++; + if (!d->reread_ms) + goto reread; + + tmo = d->reread_ms; + goto reschedule; + } + + if (ret) { + /* + * IC status reading succeeded. update error info + * just in case the renable changed it. + */ + for (i = 0; i < num_rdevs; i++) { + struct regulator_err_state *stat; + struct regulator_dev *rdev; + + stat = &rid->states[i]; + rdev = stat->rdev; + rdev_clear_err(rdev, (~stat->errors) & + stat->possible_errs); + } + h->retry_cnt++; + /* + * The IC indicated problem is still ON - no point in + * re-enabling the IRQ. Retry later. + */ + tmo = d->irq_off_ms; + goto reschedule; + } + } + + /* + * Either IC reported problem cleared or no status checker was provided. + * If problems are gone - good. If not - then the IRQ will fire again + * and we'll have a new nice loop. In any case we should clear error + * flags here and re-enable IRQs. + */ + for (i = 0; i < num_rdevs; i++) { + struct regulator_err_state *stat; + struct regulator_dev *rdev; + + stat = &rid->states[i]; + rdev = stat->rdev; + rdev_clear_err(rdev, stat->possible_errs); + } + + /* + * Things have been seemingly successful => zero retry-counter. + */ + h->retry_cnt = 0; + +enable_out: + enable_irq(h->irq); + + return; + +reschedule: + if (!d->high_prio) + mod_delayed_work(system_dfl_wq, &h->isr_work, + msecs_to_jiffies(tmo)); + else + mod_delayed_work(system_highpri_wq, &h->isr_work, + msecs_to_jiffies(tmo)); +} + +static irqreturn_t regulator_notifier_isr(int irq, void *data) +{ + struct regulator_irq *h = data; + struct regulator_irq_desc *d; + struct regulator_irq_data *rid; + unsigned long rdev_map = 0; + int num_rdevs; + int ret, i; + + d = &h->desc; + rid = &h->rdata; + num_rdevs = rid->num_states; + + if (d->fatal_cnt) + h->retry_cnt++; + + /* + * we spare a few cycles by not clearing statuses prior to this call. + * The IC driver must initialize the status buffers for rdevs + * which it indicates having active events via rdev_map. + * + * Maybe we should just to be on a safer side(?) + */ + ret = d->map_event(irq, rid, &rdev_map); + + /* + * If status reading fails (which is unlikely) we don't ack/disable + * IRQ but just increase fail count and retry when IRQ fires again. + * If retry_count exceeds the given safety limit we call IC specific die + * handler which can try disabling regulator(s). + * + * If no die handler is given we will just power-off as a last resort. + * + * We could try disabling all associated rdevs - but we might shoot + * ourselves in the head and leave the problematic regulator enabled. So + * if IC has no die-handler populated we just assume the regulator + * can't be disabled. + */ + if (unlikely(ret == REGULATOR_FAILED_RETRY)) + goto fail_out; + + h->retry_cnt = 0; + /* + * Let's not disable IRQ if there were no status bits for us. We'd + * better leave spurious IRQ handling to genirq + */ + if (ret || !rdev_map) + return IRQ_NONE; + + /* + * Some events are bogus if the regulator is disabled. Skip such events + * if all relevant regulators are disabled + */ + if (d->skip_off) { + for_each_set_bit(i, &rdev_map, num_rdevs) { + struct regulator_dev *rdev; + const struct regulator_ops *ops; + + rdev = rid->states[i].rdev; + ops = rdev->desc->ops; + + /* + * If any of the flagged regulators is enabled we do + * handle this + */ + if (ops->is_enabled(rdev)) + break; + } + if (i == num_rdevs) + return IRQ_NONE; + } + + /* Disable IRQ if HW keeps line asserted */ + if (d->irq_off_ms) + disable_irq_nosync(irq); + + /* + * IRQ seems to be for us. Let's fire correct notifiers / store error + * flags + */ + for_each_set_bit(i, &rdev_map, num_rdevs) { + struct regulator_err_state *stat; + struct regulator_dev *rdev; + + stat = &rid->states[i]; + rdev = stat->rdev; + + rdev_dbg(rdev, "Sending regulator notification EVT 0x%lx\n", + stat->notifs); + + regulator_notifier_call_chain(rdev, stat->notifs, NULL); + rdev_flag_err(rdev, stat->errors); + } + + if (d->irq_off_ms) { + if (!d->high_prio) + schedule_delayed_work(&h->isr_work, + msecs_to_jiffies(d->irq_off_ms)); + else + mod_delayed_work(system_highpri_wq, + &h->isr_work, + msecs_to_jiffies(d->irq_off_ms)); + } + + return IRQ_HANDLED; + +fail_out: + if (d->fatal_cnt && h->retry_cnt > d->fatal_cnt) { + /* If we have no recovery, just try shut down straight away */ + if (!d->die) { + hw_protection_trigger("Regulator failure. Retry count exceeded", + REGULATOR_FORCED_SAFETY_SHUTDOWN_WAIT_MS); + } else { + ret = d->die(rid); + /* If die() failed shut down as a last attempt to save the HW */ + if (ret) + hw_protection_trigger("Regulator failure. Recovery failed", + REGULATOR_FORCED_SAFETY_SHUTDOWN_WAIT_MS); + } + } + + return IRQ_NONE; +} + +static int init_rdev_state(struct device *dev, struct regulator_irq *h, + struct regulator_dev **rdev, int common_err, + int *rdev_err, int rdev_amount) +{ + int i; + + h->rdata.states = devm_kzalloc(dev, sizeof(*h->rdata.states) * + rdev_amount, GFP_KERNEL); + if (!h->rdata.states) + return -ENOMEM; + + h->rdata.num_states = rdev_amount; + h->rdata.data = h->desc.data; + + for (i = 0; i < rdev_amount; i++) { + h->rdata.states[i].possible_errs = common_err; + if (rdev_err) + h->rdata.states[i].possible_errs |= *rdev_err++; + h->rdata.states[i].rdev = *rdev++; + } + + return 0; +} + +static void init_rdev_errors(struct regulator_irq *h) +{ + int i; + + for (i = 0; i < h->rdata.num_states; i++) + if (h->rdata.states[i].possible_errs) + h->rdata.states[i].rdev->use_cached_err = true; +} + +/** + * regulator_irq_helper - register IRQ based regulator event/error notifier + * + * @dev: device providing the IRQs + * @d: IRQ helper descriptor. + * @irq: IRQ used to inform events/errors to be notified. + * @irq_flags: Extra IRQ flags to be OR'ed with the default + * IRQF_ONESHOT when requesting the (threaded) irq. + * @common_errs: Errors which can be flagged by this IRQ for all rdevs. + * When IRQ is re-enabled these errors will be cleared + * from all associated regulators. Use this instead of the + * per_rdev_errs if you use + * regulator_irq_map_event_simple() for event mapping. + * @per_rdev_errs: Optional error flag array describing errors specific + * for only some of the regulators. These errors will be + * or'ed with common errors. If this is given the array + * should contain rdev_amount flags. Can be set to NULL + * if there is no regulator specific error flags for this + * IRQ. + * @rdev: Array of pointers to regulators associated with this + * IRQ. + * @rdev_amount: Amount of regulators associated with this IRQ. + * + * Return: handle to irq_helper or an ERR_PTR() encoded negative error number. + */ +void *regulator_irq_helper(struct device *dev, + const struct regulator_irq_desc *d, int irq, + int irq_flags, int common_errs, int *per_rdev_errs, + struct regulator_dev **rdev, int rdev_amount) +{ + struct regulator_irq *h; + int ret; + + if (!rdev_amount || !d || !d->map_event || !d->name) + return ERR_PTR(-EINVAL); + + h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); + if (!h) + return ERR_PTR(-ENOMEM); + + h->irq = irq; + h->desc = *d; + h->desc.name = devm_kstrdup(dev, d->name, GFP_KERNEL); + if (!h->desc.name) + return ERR_PTR(-ENOMEM); + + ret = init_rdev_state(dev, h, rdev, common_errs, per_rdev_errs, + rdev_amount); + if (ret) + return ERR_PTR(ret); + + init_rdev_errors(h); + + if (h->desc.irq_off_ms) + INIT_DELAYED_WORK(&h->isr_work, regulator_notifier_isr_work); + + ret = request_threaded_irq(h->irq, NULL, regulator_notifier_isr, + IRQF_ONESHOT | irq_flags, h->desc.name, h); + if (ret) { + dev_err(dev, "Failed to request IRQ %d\n", irq); + + return ERR_PTR(ret); + } + + return h; +} +EXPORT_SYMBOL_GPL(regulator_irq_helper); + +/** + * regulator_irq_helper_cancel - drop IRQ based regulator event/error notifier + * + * @handle: Pointer to handle returned by a successful call to + * regulator_irq_helper(). Will be NULLed upon return. + * + * The associated IRQ is released and work is cancelled when the function + * returns. + */ +void regulator_irq_helper_cancel(void **handle) +{ + if (handle && *handle) { + struct regulator_irq *h = *handle; + + free_irq(h->irq, h); + if (h->desc.irq_off_ms) + cancel_delayed_work_sync(&h->isr_work); + + h = NULL; + } +} +EXPORT_SYMBOL_GPL(regulator_irq_helper_cancel); + +/** + * regulator_irq_map_event_simple - regulator IRQ notification for trivial IRQs + * + * @irq: Number of IRQ that occurred. + * @rid: Information about the event IRQ indicates. + * The function fills in the ®ulator_err_state->notifs + * and ®ulator_err_state->errors fields of + * ®ulator_irq_data->states as output. + * @dev_mask: mask indicating the regulator originating the IRQ. + * + * Regulators whose IRQ has single, well defined purpose (always indicate + * exactly one event, and are relevant to exactly one regulator device) can + * use this function as their map_event callback for their regulator IRQ + * notification helper. Exactly one rdev and exactly one error (in + * "common_errs"-field) can be given at IRQ helper registration for + * regulator_irq_map_event_simple() to be viable. + * + * Return: 0. + */ +int regulator_irq_map_event_simple(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int err = rid->states[0].possible_errs; + + *dev_mask = 1; + /* + * This helper should only be used in a situation where the IRQ + * can indicate only one type of problem for one specific rdev. + * Something fishy is going on if we are having multiple rdevs or ERROR + * flags here. + */ + if (WARN_ON(rid->num_states != 1 || hweight32(err) != 1)) + return 0; + + rid->states[0].errors = err; + rid->states[0].notifs = regulator_err2notif(err); + + return 0; +} +EXPORT_SYMBOL_GPL(regulator_irq_map_event_simple); + diff --git a/drivers/regulator/isl6271a-regulator.c b/drivers/regulator/isl6271a-regulator.c new file mode 100644 index 000000000..868f2b823 --- /dev/null +++ b/drivers/regulator/isl6271a-regulator.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * isl6271a-regulator.c + * + * Support for Intersil ISL6271A voltage regulator + * + * Copyright (C) 2010 Marek Vasut + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define ISL6271A_VOLTAGE_MIN 850000 +#define ISL6271A_VOLTAGE_MAX 1600000 +#define ISL6271A_VOLTAGE_STEP 50000 + +/* PMIC details */ +struct isl_pmic { + struct i2c_client *client; + struct mutex mtx; +}; + +static int isl6271a_get_voltage_sel(struct regulator_dev *dev) +{ + struct isl_pmic *pmic = rdev_get_drvdata(dev); + int idx; + + mutex_lock(&pmic->mtx); + + idx = i2c_smbus_read_byte(pmic->client); + if (idx < 0) + dev_err(&pmic->client->dev, "Error getting voltage\n"); + + mutex_unlock(&pmic->mtx); + return idx; +} + +static int isl6271a_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct isl_pmic *pmic = rdev_get_drvdata(dev); + int err; + + mutex_lock(&pmic->mtx); + + err = i2c_smbus_write_byte(pmic->client, selector); + if (err < 0) + dev_err(&pmic->client->dev, "Error setting voltage\n"); + + mutex_unlock(&pmic->mtx); + return err; +} + +static const struct regulator_ops isl_core_ops = { + .get_voltage_sel = isl6271a_get_voltage_sel, + .set_voltage_sel = isl6271a_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops isl_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_desc isl_rd[] = { + { + .name = "Core Buck", + .id = 0, + .n_voltages = 16, + .ops = &isl_core_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = ISL6271A_VOLTAGE_MIN, + .uV_step = ISL6271A_VOLTAGE_STEP, + }, { + .name = "LDO1", + .id = 1, + .n_voltages = 1, + .ops = &isl_fixed_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 1100000, + }, { + .name = "LDO2", + .id = 2, + .n_voltages = 1, + .ops = &isl_fixed_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 1300000, + }, +}; + +static int isl6271a_probe(struct i2c_client *i2c) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(i2c); + struct regulator_dev *rdev; + struct regulator_config config = { }; + struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev); + struct isl_pmic *pmic; + int i; + + if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -EIO; + + pmic = devm_kzalloc(&i2c->dev, sizeof(struct isl_pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + pmic->client = i2c; + + mutex_init(&pmic->mtx); + + for (i = 0; i < 3; i++) { + config.dev = &i2c->dev; + if (i == 0) + config.init_data = init_data; + else + config.init_data = NULL; + config.driver_data = pmic; + + rdev = devm_regulator_register(&i2c->dev, &isl_rd[i], &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "failed to register %s\n", id->name); + return PTR_ERR(rdev); + } + } + + i2c_set_clientdata(i2c, pmic); + + return 0; +} + +static const struct i2c_device_id isl6271a_id[] = { + { .name = "isl6271a" }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, isl6271a_id); + +static struct i2c_driver isl6271a_i2c_driver = { + .driver = { + .name = "isl6271a", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = isl6271a_probe, + .id_table = isl6271a_id, +}; + +static int __init isl6271a_init(void) +{ + return i2c_add_driver(&isl6271a_i2c_driver); +} + +static void __exit isl6271a_cleanup(void) +{ + i2c_del_driver(&isl6271a_i2c_driver); +} + +subsys_initcall(isl6271a_init); +module_exit(isl6271a_cleanup); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("Intersil ISL6271A voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/isl9305.c b/drivers/regulator/isl9305.c new file mode 100644 index 000000000..ec6bd6bb9 --- /dev/null +++ b/drivers/regulator/isl9305.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * isl9305 - Intersil ISL9305 DCDC regulator + * + * Copyright 2014 Linaro Ltd + * + * Author: Mark Brown + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Registers + */ +#define ISL9305_DCD1OUT 0x0 +#define ISL9305_DCD2OUT 0x1 +#define ISL9305_LDO1OUT 0x2 +#define ISL9305_LDO2OUT 0x3 +#define ISL9305_DCD_PARAMETER 0x4 +#define ISL9305_SYSTEM_PARAMETER 0x5 +#define ISL9305_DCD_SRCTL 0x6 + +#define ISL9305_MAX_REG ISL9305_DCD_SRCTL + +/* + * DCD_PARAMETER + */ +#define ISL9305_DCD_PHASE 0x40 +#define ISL9305_DCD2_ULTRA 0x20 +#define ISL9305_DCD1_ULTRA 0x10 +#define ISL9305_DCD2_BLD 0x08 +#define ISL9305_DCD1_BLD 0x04 +#define ISL9305_DCD2_MODE 0x02 +#define ISL9305_DCD1_MODE 0x01 + +/* + * SYSTEM_PARAMETER + */ +#define ISL9305_I2C_EN 0x40 +#define ISL9305_DCDPOR_MASK 0x30 +#define ISL9305_LDO2_EN 0x08 +#define ISL9305_LDO1_EN 0x04 +#define ISL9305_DCD2_EN 0x02 +#define ISL9305_DCD1_EN 0x01 + +/* + * DCD_SRCTL + */ +#define ISL9305_DCD2SR_MASK 0xc0 +#define ISL9305_DCD1SR_MASK 0x07 + +static const struct regulator_ops isl9305_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc isl9305_regulators[] = { + [ISL9305_DCD1] = { + .name = "DCD1", + .of_match = of_match_ptr("dcd1"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x70, + .min_uV = 825000, + .uV_step = 25000, + .vsel_reg = ISL9305_DCD1OUT, + .vsel_mask = 0x7f, + .enable_reg = ISL9305_SYSTEM_PARAMETER, + .enable_mask = ISL9305_DCD1_EN, + .supply_name = "VINDCD1", + .ops = &isl9305_ops, + .owner = THIS_MODULE, + }, + [ISL9305_DCD2] = { + .name = "DCD2", + .of_match = of_match_ptr("dcd2"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x70, + .min_uV = 825000, + .uV_step = 25000, + .vsel_reg = ISL9305_DCD2OUT, + .vsel_mask = 0x7f, + .enable_reg = ISL9305_SYSTEM_PARAMETER, + .enable_mask = ISL9305_DCD2_EN, + .supply_name = "VINDCD2", + .ops = &isl9305_ops, + .owner = THIS_MODULE, + }, + [ISL9305_LDO1] = { + .name = "LDO1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x37, + .min_uV = 900000, + .uV_step = 50000, + .vsel_reg = ISL9305_LDO1OUT, + .vsel_mask = 0x3f, + .enable_reg = ISL9305_SYSTEM_PARAMETER, + .enable_mask = ISL9305_LDO1_EN, + .supply_name = "VINLDO1", + .ops = &isl9305_ops, + .owner = THIS_MODULE, + }, + [ISL9305_LDO2] = { + .name = "LDO2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x37, + .min_uV = 900000, + .uV_step = 50000, + .vsel_reg = ISL9305_LDO2OUT, + .vsel_mask = 0x3f, + .enable_reg = ISL9305_SYSTEM_PARAMETER, + .enable_mask = ISL9305_LDO2_EN, + .supply_name = "VINLDO2", + .ops = &isl9305_ops, + .owner = THIS_MODULE, + }, +}; + +static const struct regmap_config isl9305_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = ISL9305_MAX_REG, + .cache_type = REGCACHE_MAPLE, +}; + +static int isl9305_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_config config = { }; + struct isl9305_pdata *pdata = i2c->dev.platform_data; + struct regulator_dev *rdev; + struct regmap *regmap; + int i, ret; + + regmap = devm_regmap_init_i2c(i2c, &isl9305_regmap); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); + return ret; + } + + config.dev = &i2c->dev; + + for (i = 0; i < ARRAY_SIZE(isl9305_regulators); i++) { + if (pdata) + config.init_data = pdata->init_data[i]; + else + config.init_data = NULL; + + rdev = devm_regulator_register(&i2c->dev, + &isl9305_regulators[i], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&i2c->dev, "Failed to register %s: %d\n", + isl9305_regulators[i].name, ret); + return ret; + } + } + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id isl9305_dt_ids[] = { + { .compatible = "isl,isl9305" }, /* for backward compat., don't use */ + { .compatible = "isil,isl9305" }, + { .compatible = "isl,isl9305h" }, /* for backward compat., don't use */ + { .compatible = "isil,isl9305h" }, + {}, +}; +MODULE_DEVICE_TABLE(of, isl9305_dt_ids); +#endif + +static const struct i2c_device_id isl9305_i2c_id[] = { + { .name = "isl9305" }, + { .name = "isl9305h" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, isl9305_i2c_id); + +static struct i2c_driver isl9305_regulator_driver = { + .driver = { + .name = "isl9305", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(isl9305_dt_ids), + }, + .probe = isl9305_i2c_probe, + .id_table = isl9305_i2c_id, +}; + +module_i2c_driver(isl9305_regulator_driver); + +MODULE_AUTHOR("Mark Brown"); +MODULE_DESCRIPTION("Intersil ISL9305 DCDC regulator"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/lm363x-regulator.c b/drivers/regulator/lm363x-regulator.c new file mode 100644 index 000000000..7531b2c37 --- /dev/null +++ b/drivers/regulator/lm363x-regulator.c @@ -0,0 +1,367 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * TI LM363X Regulator Driver + * + * Copyright 2015 Texas Instruments + * + * Author: Milo Kim + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* LM3631 */ +#define LM3631_BOOST_VSEL_MAX 0x25 +#define LM3631_LDO_VSEL_MAX 0x28 +#define LM3631_CONT_VSEL_MAX 0x03 +#define LM3631_VBOOST_MIN 4500000 +#define LM3631_VCONT_MIN 1800000 +#define LM3631_VLDO_MIN 4000000 +#define ENABLE_TIME_USEC 1000 + +/* LM3632 */ +#define LM3632_BOOST_VSEL_MAX 0x26 +#define LM3632_LDO_VSEL_MAX 0x28 +#define LM3632_VBOOST_MIN 4500000 +#define LM3632_VLDO_MIN 4000000 + +/* LM36274 */ +#define LM36274_BOOST_VSEL_MAX 0x3f +#define LM36274_LDO_VSEL_MAX 0x32 +#define LM36274_VOLTAGE_MIN 4000000 + +/* Common */ +#define LM363X_STEP_50mV 50000 +#define LM363X_STEP_500mV 500000 + +static const int ldo_cont_enable_time[] = { + 0, 2000, 5000, 10000, 20000, 50000, 100000, 200000, +}; + +static int lm363x_regulator_enable_time(struct regulator_dev *rdev) +{ + enum lm363x_regulator_id id = rdev_get_id(rdev); + unsigned int val, addr, mask; + + switch (id) { + case LM3631_LDO_CONT: + addr = LM3631_REG_ENTIME_VCONT; + mask = LM3631_ENTIME_CONT_MASK; + break; + case LM3631_LDO_OREF: + addr = LM3631_REG_ENTIME_VOREF; + mask = LM3631_ENTIME_MASK; + break; + case LM3631_LDO_POS: + addr = LM3631_REG_ENTIME_VPOS; + mask = LM3631_ENTIME_MASK; + break; + case LM3631_LDO_NEG: + addr = LM3631_REG_ENTIME_VNEG; + mask = LM3631_ENTIME_MASK; + break; + default: + return 0; + } + + if (regmap_read(rdev->regmap, addr, &val)) + return -EINVAL; + + val = (val & mask) >> LM3631_ENTIME_SHIFT; + + if (id == LM3631_LDO_CONT) + return ldo_cont_enable_time[val]; + else + return ENABLE_TIME_USEC * val; +} + +static const struct regulator_ops lm363x_boost_voltage_table_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops lm363x_regulator_voltage_table_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lm363x_regulator_enable_time, +}; + +static const struct regulator_desc lm363x_regulator_desc[] = { + /* LM3631 */ + { + .name = "vboost", + .of_match = "vboost", + .id = LM3631_BOOST, + .ops = &lm363x_boost_voltage_table_ops, + .n_voltages = LM3631_BOOST_VSEL_MAX + 1, + .min_uV = LM3631_VBOOST_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3631_REG_VOUT_BOOST, + .vsel_mask = LM3631_VOUT_MASK, + }, + { + .name = "ldo_cont", + .of_match = "vcont", + .id = LM3631_LDO_CONT, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3631_CONT_VSEL_MAX + 1, + .min_uV = LM3631_VCONT_MIN, + .uV_step = LM363X_STEP_500mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3631_REG_VOUT_CONT, + .vsel_mask = LM3631_VOUT_CONT_MASK, + .enable_reg = LM3631_REG_LDO_CTRL2, + .enable_mask = LM3631_EN_CONT_MASK, + }, + { + .name = "ldo_oref", + .of_match = "voref", + .id = LM3631_LDO_OREF, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3631_LDO_VSEL_MAX + 1, + .min_uV = LM3631_VLDO_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3631_REG_VOUT_OREF, + .vsel_mask = LM3631_VOUT_MASK, + .enable_reg = LM3631_REG_LDO_CTRL1, + .enable_mask = LM3631_EN_OREF_MASK, + }, + { + .name = "ldo_vpos", + .of_match = "vpos", + .id = LM3631_LDO_POS, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3631_LDO_VSEL_MAX + 1, + .min_uV = LM3631_VLDO_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3631_REG_VOUT_POS, + .vsel_mask = LM3631_VOUT_MASK, + .enable_reg = LM3631_REG_LDO_CTRL1, + .enable_mask = LM3631_EN_VPOS_MASK, + }, + { + .name = "ldo_vneg", + .of_match = "vneg", + .id = LM3631_LDO_NEG, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3631_LDO_VSEL_MAX + 1, + .min_uV = LM3631_VLDO_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3631_REG_VOUT_NEG, + .vsel_mask = LM3631_VOUT_MASK, + .enable_reg = LM3631_REG_LDO_CTRL1, + .enable_mask = LM3631_EN_VNEG_MASK, + }, + /* LM3632 */ + { + .name = "vboost", + .of_match = "vboost", + .id = LM3632_BOOST, + .ops = &lm363x_boost_voltage_table_ops, + .n_voltages = LM3632_BOOST_VSEL_MAX + 1, + .min_uV = LM3632_VBOOST_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3632_REG_VOUT_BOOST, + .vsel_mask = LM3632_VOUT_MASK, + }, + { + .name = "ldo_vpos", + .of_match = "vpos", + .id = LM3632_LDO_POS, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3632_LDO_VSEL_MAX + 1, + .min_uV = LM3632_VLDO_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3632_REG_VOUT_POS, + .vsel_mask = LM3632_VOUT_MASK, + .enable_reg = LM3632_REG_BIAS_CONFIG, + .enable_mask = LM3632_EN_VPOS_MASK, + }, + { + .name = "ldo_vneg", + .of_match = "vneg", + .id = LM3632_LDO_NEG, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM3632_LDO_VSEL_MAX + 1, + .min_uV = LM3632_VLDO_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM3632_REG_VOUT_NEG, + .vsel_mask = LM3632_VOUT_MASK, + .enable_reg = LM3632_REG_BIAS_CONFIG, + .enable_mask = LM3632_EN_VNEG_MASK, + }, + + /* LM36274 */ + { + .name = "vboost", + .of_match = "vboost", + .id = LM36274_BOOST, + .ops = &lm363x_boost_voltage_table_ops, + .n_voltages = LM36274_BOOST_VSEL_MAX + 1, + .min_uV = LM36274_VOLTAGE_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM36274_REG_VOUT_BOOST, + .vsel_mask = LM36274_VOUT_MASK, + }, + { + .name = "ldo_vpos", + .of_match = "vpos", + .id = LM36274_LDO_POS, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM36274_LDO_VSEL_MAX + 1, + .min_uV = LM36274_VOLTAGE_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM36274_REG_VOUT_POS, + .vsel_mask = LM36274_VOUT_MASK, + .enable_reg = LM36274_REG_BIAS_CONFIG_1, + .enable_mask = LM36274_EN_VPOS_MASK, + }, + { + .name = "ldo_vneg", + .of_match = "vneg", + .id = LM36274_LDO_NEG, + .ops = &lm363x_regulator_voltage_table_ops, + .n_voltages = LM36274_LDO_VSEL_MAX + 1, + .min_uV = LM36274_VOLTAGE_MIN, + .uV_step = LM363X_STEP_50mV, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LM36274_REG_VOUT_NEG, + .vsel_mask = LM36274_VOUT_MASK, + .enable_reg = LM36274_REG_BIAS_CONFIG_1, + .enable_mask = LM36274_EN_VNEG_MASK, + }, +}; + +static struct gpio_desc *lm363x_regulator_of_get_enable_gpio(struct device *dev, int id) +{ + /* + * Check LCM_EN1/2_GPIO is configured. + * Those pins are used for enabling VPOS/VNEG LDOs. + * Do not use devm* here: the regulator core takes over the + * lifecycle management of the GPIO descriptor. + */ + switch (id) { + case LM3632_LDO_POS: + case LM36274_LDO_POS: + return gpiod_get_index_optional(dev, "enable", 0, + GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE); + case LM3632_LDO_NEG: + case LM36274_LDO_NEG: + return gpiod_get_index_optional(dev, "enable", 1, + GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE); + default: + return NULL; + } +} + +static int lm363x_regulator_set_ext_en(struct regmap *regmap, int id) +{ + int ext_en_mask = 0; + + switch (id) { + case LM3632_LDO_POS: + case LM3632_LDO_NEG: + ext_en_mask = LM3632_EXT_EN_MASK; + break; + case LM36274_LDO_POS: + case LM36274_LDO_NEG: + ext_en_mask = LM36274_EXT_EN_MASK; + break; + default: + return -ENODEV; + } + + return regmap_update_bits(regmap, lm363x_regulator_desc[id].enable_reg, + ext_en_mask, ext_en_mask); +} + +static int lm363x_regulator_probe(struct platform_device *pdev) +{ + struct ti_lmu *lmu = dev_get_drvdata(pdev->dev.parent); + struct regmap *regmap = lmu->regmap; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + struct device *dev = &pdev->dev; + int id = pdev->id; + struct gpio_desc *gpiod; + int ret; + + cfg.dev = dev; + cfg.regmap = regmap; + + /* + * LM3632 LDOs can be controlled by external pin. + * Register update is required if the pin is used. + */ + gpiod = lm363x_regulator_of_get_enable_gpio(dev, id); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + + if (gpiod) { + cfg.ena_gpiod = gpiod; + ret = lm363x_regulator_set_ext_en(regmap, id); + if (ret) { + gpiod_put(gpiod); + dev_err(dev, "External pin err: %d\n", ret); + return ret; + } + } + + rdev = devm_regulator_register(dev, &lm363x_regulator_desc[id], &cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "[%d] regulator register err: %d\n", id, ret); + return ret; + } + + return 0; +} + +static struct platform_driver lm363x_regulator_driver = { + .probe = lm363x_regulator_probe, + .driver = { + .name = "lm363x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +module_platform_driver(lm363x_regulator_driver); + +MODULE_DESCRIPTION("TI LM363X Regulator Driver"); +MODULE_AUTHOR("Milo Kim"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:lm363x-regulator"); diff --git a/drivers/regulator/lochnagar-regulator.c b/drivers/regulator/lochnagar-regulator.c new file mode 100644 index 000000000..e53911c80 --- /dev/null +++ b/drivers/regulator/lochnagar-regulator.c @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Lochnagar regulator driver +// +// Copyright (c) 2017-2018 Cirrus Logic, Inc. and +// Cirrus Logic International Semiconductor Ltd. +// +// Author: Charles Keepax + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static const struct regulator_ops lochnagar_micvdd_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct linear_range lochnagar_micvdd_ranges[] = { + REGULATOR_LINEAR_RANGE(1000000, 0, 0xC, 50000), + REGULATOR_LINEAR_RANGE(1700000, 0xD, 0x1F, 100000), +}; + +static int lochnagar_micbias_enable(struct regulator_dev *rdev) +{ + struct lochnagar *lochnagar = rdev_get_drvdata(rdev); + int ret; + + mutex_lock(&lochnagar->analogue_config_lock); + + ret = regulator_enable_regmap(rdev); + if (ret < 0) + goto err; + + ret = lochnagar_update_config(lochnagar); + +err: + mutex_unlock(&lochnagar->analogue_config_lock); + + return ret; +} + +static int lochnagar_micbias_disable(struct regulator_dev *rdev) +{ + struct lochnagar *lochnagar = rdev_get_drvdata(rdev); + int ret; + + mutex_lock(&lochnagar->analogue_config_lock); + + ret = regulator_disable_regmap(rdev); + if (ret < 0) + goto err; + + ret = lochnagar_update_config(lochnagar); + +err: + mutex_unlock(&lochnagar->analogue_config_lock); + + return ret; +} + +static const struct regulator_ops lochnagar_micbias_ops = { + .enable = lochnagar_micbias_enable, + .disable = lochnagar_micbias_disable, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops lochnagar_vddcore_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct linear_range lochnagar_vddcore_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0), + REGULATOR_LINEAR_RANGE(600000, 0x8, 0x41, 12500), +}; + +enum lochnagar_regulators { + LOCHNAGAR_MICVDD, + LOCHNAGAR_MIC1VDD, + LOCHNAGAR_MIC2VDD, + LOCHNAGAR_VDDCORE, +}; + +static int lochnagar_micbias_of_parse(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct lochnagar *lochnagar = config->driver_data; + int shift = (desc->id - LOCHNAGAR_MIC1VDD) * + LOCHNAGAR2_P2_MICBIAS_SRC_SHIFT; + int mask = LOCHNAGAR2_P1_MICBIAS_SRC_MASK << shift; + unsigned int val; + int ret; + + ret = of_property_read_u32(np, "cirrus,micbias-input", &val); + if (ret >= 0) { + mutex_lock(&lochnagar->analogue_config_lock); + ret = regmap_update_bits(lochnagar->regmap, + LOCHNAGAR2_ANALOGUE_PATH_CTRL2, + mask, val << shift); + mutex_unlock(&lochnagar->analogue_config_lock); + if (ret < 0) { + dev_err(lochnagar->dev, + "Failed to update micbias source: %d\n", ret); + return ret; + } + } + + return 0; +} + +static const struct regulator_desc lochnagar_regulators[] = { + [LOCHNAGAR_MICVDD] = { + .name = "MICVDD", + .supply_name = "SYSVDD", + .type = REGULATOR_VOLTAGE, + .n_voltages = 32, + .ops = &lochnagar_micvdd_ops, + + .id = LOCHNAGAR_MICVDD, + .of_match = of_match_ptr("MICVDD"), + + .enable_reg = LOCHNAGAR2_MICVDD_CTRL1, + .enable_mask = LOCHNAGAR2_MICVDD_REG_ENA_MASK, + .vsel_reg = LOCHNAGAR2_MICVDD_CTRL2, + .vsel_mask = LOCHNAGAR2_MICVDD_VSEL_MASK, + + .linear_ranges = lochnagar_micvdd_ranges, + .n_linear_ranges = ARRAY_SIZE(lochnagar_micvdd_ranges), + + .enable_time = 3000, + .ramp_delay = 1000, + + .owner = THIS_MODULE, + }, + [LOCHNAGAR_MIC1VDD] = { + .name = "MIC1VDD", + .supply_name = "MICBIAS1", + .type = REGULATOR_VOLTAGE, + .ops = &lochnagar_micbias_ops, + + .id = LOCHNAGAR_MIC1VDD, + .of_match = of_match_ptr("MIC1VDD"), + .of_parse_cb = lochnagar_micbias_of_parse, + + .enable_reg = LOCHNAGAR2_ANALOGUE_PATH_CTRL2, + .enable_mask = LOCHNAGAR2_P1_INPUT_BIAS_ENA_MASK, + + .owner = THIS_MODULE, + }, + [LOCHNAGAR_MIC2VDD] = { + .name = "MIC2VDD", + .supply_name = "MICBIAS2", + .type = REGULATOR_VOLTAGE, + .ops = &lochnagar_micbias_ops, + + .id = LOCHNAGAR_MIC2VDD, + .of_match = of_match_ptr("MIC2VDD"), + .of_parse_cb = lochnagar_micbias_of_parse, + + .enable_reg = LOCHNAGAR2_ANALOGUE_PATH_CTRL2, + .enable_mask = LOCHNAGAR2_P2_INPUT_BIAS_ENA_MASK, + + .owner = THIS_MODULE, + }, + [LOCHNAGAR_VDDCORE] = { + .name = "VDDCORE", + .supply_name = "SYSVDD", + .type = REGULATOR_VOLTAGE, + .n_voltages = 66, + .ops = &lochnagar_vddcore_ops, + + .id = LOCHNAGAR_VDDCORE, + .of_match = of_match_ptr("VDDCORE"), + + .enable_reg = LOCHNAGAR2_VDDCORE_CDC_CTRL1, + .enable_mask = LOCHNAGAR2_VDDCORE_CDC_REG_ENA_MASK, + .vsel_reg = LOCHNAGAR2_VDDCORE_CDC_CTRL2, + .vsel_mask = LOCHNAGAR2_VDDCORE_CDC_VSEL_MASK, + + .linear_ranges = lochnagar_vddcore_ranges, + .n_linear_ranges = ARRAY_SIZE(lochnagar_vddcore_ranges), + + .enable_time = 3000, + .ramp_delay = 1000, + .off_on_delay = 15000, + + .owner = THIS_MODULE, + }, +}; + +static const struct of_device_id lochnagar_of_match[] = { + { + .compatible = "cirrus,lochnagar2-micvdd", + .data = &lochnagar_regulators[LOCHNAGAR_MICVDD], + }, + { + .compatible = "cirrus,lochnagar2-mic1vdd", + .data = &lochnagar_regulators[LOCHNAGAR_MIC1VDD], + }, + { + .compatible = "cirrus,lochnagar2-mic2vdd", + .data = &lochnagar_regulators[LOCHNAGAR_MIC2VDD], + }, + { + .compatible = "cirrus,lochnagar2-vddcore", + .data = &lochnagar_regulators[LOCHNAGAR_VDDCORE], + }, + {} +}; +MODULE_DEVICE_TABLE(of, lochnagar_of_match); + +static int lochnagar_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct lochnagar *lochnagar = dev_get_drvdata(dev->parent); + struct regulator_config config = { }; + const struct regulator_desc *desc; + struct regulator_dev *rdev; + int ret; + + config.dev = dev; + config.regmap = lochnagar->regmap; + config.driver_data = lochnagar; + + desc = device_get_match_data(dev); + if (!desc) + return -EINVAL; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "Failed to register %s regulator: %d\n", + desc->name, ret); + return ret; + } + + return 0; +} + +static struct platform_driver lochnagar_regulator_driver = { + .driver = { + .name = "lochnagar-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(lochnagar_of_match), + }, + + .probe = lochnagar_regulator_probe, +}; +module_platform_driver(lochnagar_regulator_driver); + +MODULE_AUTHOR("Charles Keepax "); +MODULE_DESCRIPTION("Regulator driver for Cirrus Logic Lochnagar Board"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:lochnagar-regulator"); diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c new file mode 100644 index 000000000..6f830ae1b --- /dev/null +++ b/drivers/regulator/lp3971.c @@ -0,0 +1,460 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for National Semiconductors LP3971 PMIC chip + * + * Copyright (C) 2009 Samsung Electronics + * Author: Marek Szyprowski + * + * Based on wm8350.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct lp3971 { + struct device *dev; + struct mutex io_lock; + struct i2c_client *i2c; +}; + +static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg); +static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val); + +#define LP3971_SYS_CONTROL1_REG 0x07 + +/* System control register 1 initial value, + bits 4 and 5 are EPROM programmable */ +#define SYS_CONTROL1_INIT_VAL 0x40 +#define SYS_CONTROL1_INIT_MASK 0xCF + +#define LP3971_BUCK_VOL_ENABLE_REG 0x10 +#define LP3971_BUCK_VOL_CHANGE_REG 0x20 + +/* Voltage control registers shift: + LP3971_BUCK1 -> 0 + LP3971_BUCK2 -> 4 + LP3971_BUCK3 -> 6 +*/ +#define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) +#define BUCK_VOL_CHANGE_FLAG_GO 0x01 +#define BUCK_VOL_CHANGE_FLAG_TARGET 0x02 +#define BUCK_VOL_CHANGE_FLAG_MASK 0x03 + +#define LP3971_BUCK1_BASE 0x23 +#define LP3971_BUCK2_BASE 0x29 +#define LP3971_BUCK3_BASE 0x32 + +static const int buck_base_addr[] = { + LP3971_BUCK1_BASE, + LP3971_BUCK2_BASE, + LP3971_BUCK3_BASE, +}; + +#define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) +#define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) + +static const unsigned int buck_voltage_map[] = { + 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, + 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, + 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, + 3000000, 3300000, +}; + +#define BUCK_TARGET_VOL_MASK 0x3f + +#define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) + +#define LP3971_LDO_ENABLE_REG 0x12 +#define LP3971_LDO_VOL_CONTR_BASE 0x39 + +/* Voltage control registers: + LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0 + LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0 + LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1 + LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1 + LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2 +*/ +#define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) + +/* Voltage control registers shift: + LP3971_LDO1 -> 0, LP3971_LDO2 -> 4 + LP3971_LDO3 -> 0, LP3971_LDO4 -> 4 + LP3971_LDO5 -> 0 +*/ +#define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) +#define LDO_VOL_CONTR_MASK 0x0f + +static const unsigned int ldo45_voltage_map[] = { + 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, + 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo123_voltage_map[] = { + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, +}; + +#define LDO_VOL_MIN_IDX 0x00 +#define LDO_VOL_MAX_IDX 0x0f + +static int lp3971_ldo_is_enabled(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3971_LDO1; + u16 mask = 1 << (1 + ldo); + u16 val; + + val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG); + return (val & mask) != 0; +} + +static int lp3971_ldo_enable(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3971_LDO1; + u16 mask = 1 << (1 + ldo); + + return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask); +} + +static int lp3971_ldo_disable(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3971_LDO1; + u16 mask = 1 << (1 + ldo); + + return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0); +} + +static int lp3971_ldo_get_voltage_sel(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3971_LDO1; + u16 val, reg; + + reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo)); + val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK; + + return val; +} + +static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev, + unsigned int selector) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3971_LDO1; + + return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), + LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo), + selector << LDO_VOL_CONTR_SHIFT(ldo)); +} + +static const struct regulator_ops lp3971_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .is_enabled = lp3971_ldo_is_enabled, + .enable = lp3971_ldo_enable, + .disable = lp3971_ldo_disable, + .get_voltage_sel = lp3971_ldo_get_voltage_sel, + .set_voltage_sel = lp3971_ldo_set_voltage_sel, +}; + +static int lp3971_dcdc_is_enabled(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3971_DCDC1; + u16 mask = 1 << (buck * 2); + u16 val; + + val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG); + return (val & mask) != 0; +} + +static int lp3971_dcdc_enable(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3971_DCDC1; + u16 mask = 1 << (buck * 2); + + return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask); +} + +static int lp3971_dcdc_disable(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3971_DCDC1; + u16 mask = 1 << (buck * 2); + + return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0); +} + +static int lp3971_dcdc_get_voltage_sel(struct regulator_dev *dev) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3971_DCDC1; + u16 reg; + + reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck)); + reg &= BUCK_TARGET_VOL_MASK; + + return reg; +} + +static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev, + unsigned int selector) +{ + struct lp3971 *lp3971 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3971_DCDC1; + int ret; + + ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), + BUCK_TARGET_VOL_MASK, selector); + if (ret) + return ret; + + ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, + BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), + BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck)); + if (ret) + return ret; + + return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, + BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), + 0 << BUCK_VOL_CHANGE_SHIFT(buck)); +} + +static const struct regulator_ops lp3971_dcdc_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .is_enabled = lp3971_dcdc_is_enabled, + .enable = lp3971_dcdc_enable, + .disable = lp3971_dcdc_disable, + .get_voltage_sel = lp3971_dcdc_get_voltage_sel, + .set_voltage_sel = lp3971_dcdc_set_voltage_sel, +}; + +static const struct regulator_desc regulators[] = { + { + .name = "LDO1", + .id = LP3971_LDO1, + .ops = &lp3971_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo123_voltage_map), + .volt_table = ldo123_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = LP3971_LDO2, + .ops = &lp3971_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo123_voltage_map), + .volt_table = ldo123_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO3", + .id = LP3971_LDO3, + .ops = &lp3971_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo123_voltage_map), + .volt_table = ldo123_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO4", + .id = LP3971_LDO4, + .ops = &lp3971_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo45_voltage_map), + .volt_table = ldo45_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO5", + .id = LP3971_LDO5, + .ops = &lp3971_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo45_voltage_map), + .volt_table = ldo45_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC1", + .id = LP3971_DCDC1, + .ops = &lp3971_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck_voltage_map), + .volt_table = buck_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC2", + .id = LP3971_DCDC2, + .ops = &lp3971_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck_voltage_map), + .volt_table = buck_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC3", + .id = LP3971_DCDC3, + .ops = &lp3971_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck_voltage_map), + .volt_table = buck_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, +}; + +static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count, + u16 *dest) +{ + int ret; + + if (count != 1) + return -EIO; + ret = i2c_smbus_read_byte_data(i2c, reg); + if (ret < 0) + return ret; + + *dest = ret; + return 0; +} + +static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count, + const u16 *src) +{ + if (count != 1) + return -EIO; + return i2c_smbus_write_byte_data(i2c, reg, *src); +} + +static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg) +{ + u16 val = 0; + + mutex_lock(&lp3971->io_lock); + + lp3971_i2c_read(lp3971->i2c, reg, 1, &val); + + dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, + (unsigned)val&0xff); + + mutex_unlock(&lp3971->io_lock); + + return val & 0xff; +} + +static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val) +{ + u16 tmp; + int ret; + + mutex_lock(&lp3971->io_lock); + + ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp); + if (ret == 0) { + tmp = (tmp & ~mask) | val; + ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp); + dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, + (unsigned)val&0xff); + } + mutex_unlock(&lp3971->io_lock); + + return ret; +} + +static int setup_regulators(struct lp3971 *lp3971, + struct lp3971_platform_data *pdata) +{ + int i, err; + + /* Instantiate the regulators */ + for (i = 0; i < pdata->num_regulators; i++) { + struct regulator_config config = { }; + struct lp3971_regulator_subdev *reg = &pdata->regulators[i]; + struct regulator_dev *rdev; + + config.dev = lp3971->dev; + config.init_data = reg->initdata; + config.driver_data = lp3971; + + rdev = devm_regulator_register(lp3971->dev, + ®ulators[reg->id], &config); + if (IS_ERR(rdev)) { + err = PTR_ERR(rdev); + dev_err(lp3971->dev, "regulator init failed: %d\n", + err); + return err; + } + } + + return 0; +} + +static int lp3971_i2c_probe(struct i2c_client *i2c) +{ + struct lp3971 *lp3971; + struct lp3971_platform_data *pdata = dev_get_platdata(&i2c->dev); + int ret; + u16 val; + + if (!pdata) { + dev_dbg(&i2c->dev, "No platform init data supplied\n"); + return -ENODEV; + } + + lp3971 = devm_kzalloc(&i2c->dev, sizeof(struct lp3971), GFP_KERNEL); + if (lp3971 == NULL) + return -ENOMEM; + + lp3971->i2c = i2c; + lp3971->dev = &i2c->dev; + + mutex_init(&lp3971->io_lock); + + /* Detect LP3971 */ + ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val); + if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) + ret = -ENODEV; + if (ret < 0) { + dev_err(&i2c->dev, "failed to detect device\n"); + return ret; + } + + ret = setup_regulators(lp3971, pdata); + if (ret < 0) + return ret; + + i2c_set_clientdata(i2c, lp3971); + return 0; +} + +static const struct i2c_device_id lp3971_i2c_id[] = { + { .name = "lp3971" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id); + +static struct i2c_driver lp3971_i2c_driver = { + .driver = { + .name = "LP3971", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = lp3971_i2c_probe, + .id_table = lp3971_i2c_id, +}; + +module_i2c_driver(lp3971_i2c_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Marek Szyprowski "); +MODULE_DESCRIPTION("LP3971 PMIC driver"); diff --git a/drivers/regulator/lp3972.c b/drivers/regulator/lp3972.c new file mode 100644 index 000000000..235c640ba --- /dev/null +++ b/drivers/regulator/lp3972.c @@ -0,0 +1,568 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for National Semiconductors LP3972 PMIC chip + * + * Based on lp3971.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct lp3972 { + struct device *dev; + struct mutex io_lock; + struct i2c_client *i2c; +}; + +/* LP3972 Control Registers */ +#define LP3972_SCR_REG 0x07 +#define LP3972_OVER1_REG 0x10 +#define LP3972_OVSR1_REG 0x11 +#define LP3972_OVER2_REG 0x12 +#define LP3972_OVSR2_REG 0x13 +#define LP3972_VCC1_REG 0x20 +#define LP3972_ADTV1_REG 0x23 +#define LP3972_ADTV2_REG 0x24 +#define LP3972_AVRC_REG 0x25 +#define LP3972_CDTC1_REG 0x26 +#define LP3972_CDTC2_REG 0x27 +#define LP3972_SDTV1_REG 0x29 +#define LP3972_SDTV2_REG 0x2A +#define LP3972_MDTV1_REG 0x32 +#define LP3972_MDTV2_REG 0x33 +#define LP3972_L2VCR_REG 0x39 +#define LP3972_L34VCR_REG 0x3A +#define LP3972_SCR1_REG 0x80 +#define LP3972_SCR2_REG 0x81 +#define LP3972_OEN3_REG 0x82 +#define LP3972_OSR3_REG 0x83 +#define LP3972_LOER4_REG 0x84 +#define LP3972_B2TV_REG 0x85 +#define LP3972_B3TV_REG 0x86 +#define LP3972_B32RC_REG 0x87 +#define LP3972_ISRA_REG 0x88 +#define LP3972_BCCR_REG 0x89 +#define LP3972_II1RR_REG 0x8E +#define LP3972_II2RR_REG 0x8F + +#define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG +/* System control register 1 initial value, + * bits 5, 6 and 7 are EPROM programmable */ +#define SYS_CONTROL1_INIT_VAL 0x02 +#define SYS_CONTROL1_INIT_MASK 0x1F + +#define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG +#define LP3972_VOL_CHANGE_FLAG_GO 0x01 +#define LP3972_VOL_CHANGE_FLAG_MASK 0x03 + +/* LDO output enable mask */ +#define LP3972_OEN3_L1EN BIT(0) +#define LP3972_OVER2_LDO2_EN BIT(2) +#define LP3972_OVER2_LDO3_EN BIT(3) +#define LP3972_OVER2_LDO4_EN BIT(4) +#define LP3972_OVER1_S_EN BIT(2) + +static const unsigned int ldo1_voltage_map[] = { + 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000, + 1900000, 1925000, 1950000, 1975000, 2000000, +}; + +static const unsigned int ldo23_voltage_map[] = { + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, +}; + +static const unsigned int ldo4_voltage_map[] = { + 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, + 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo5_voltage_map[] = { + 0, 0, 0, 0, 0, 850000, 875000, 900000, + 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, + 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, + 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, +}; + +static const unsigned int buck1_voltage_map[] = { + 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000, + 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, + 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, + 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, +}; + +static const unsigned int buck23_voltage_map[] = { + 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, + 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, + 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, + 3000000, 3300000, +}; + +static const int ldo_output_enable_mask[] = { + LP3972_OEN3_L1EN, + LP3972_OVER2_LDO2_EN, + LP3972_OVER2_LDO3_EN, + LP3972_OVER2_LDO4_EN, + LP3972_OVER1_S_EN, +}; + +static const int ldo_output_enable_addr[] = { + LP3972_OEN3_REG, + LP3972_OVER2_REG, + LP3972_OVER2_REG, + LP3972_OVER2_REG, + LP3972_OVER1_REG, +}; + +static const int ldo_vol_ctl_addr[] = { + LP3972_MDTV1_REG, + LP3972_L2VCR_REG, + LP3972_L34VCR_REG, + LP3972_L34VCR_REG, + LP3972_SDTV1_REG, +}; + +static const int buck_vol_enable_addr[] = { + LP3972_OVER1_REG, + LP3972_OEN3_REG, + LP3972_OEN3_REG, +}; + +static const int buck_base_addr[] = { + LP3972_ADTV1_REG, + LP3972_B2TV_REG, + LP3972_B3TV_REG, +}; + +#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x]) +#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x]) + +/* LDO voltage control registers shift: + LP3972_LDO1 -> 0, LP3972_LDO2 -> 4 + LP3972_LDO3 -> 0, LP3972_LDO4 -> 4 + LP3972_LDO5 -> 0 +*/ +#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2) +#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x]) +#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6) + +#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f) +#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00) +#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c) + +#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x]) +#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x]) +#define LP3972_BUCK_VOL_MASK 0x1f + +static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count, + u16 *dest) +{ + int ret; + + if (count != 1) + return -EIO; + ret = i2c_smbus_read_byte_data(i2c, reg); + if (ret < 0) + return ret; + + *dest = ret; + return 0; +} + +static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count, + const u16 *src) +{ + if (count != 1) + return -EIO; + return i2c_smbus_write_byte_data(i2c, reg, *src); +} + +static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg) +{ + u16 val = 0; + + mutex_lock(&lp3972->io_lock); + + lp3972_i2c_read(lp3972->i2c, reg, 1, &val); + + dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, + (unsigned)val & 0xff); + + mutex_unlock(&lp3972->io_lock); + + return val & 0xff; +} + +static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) +{ + u16 tmp; + int ret; + + mutex_lock(&lp3972->io_lock); + + ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp); + if (ret == 0) { + tmp = (tmp & ~mask) | val; + ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp); + dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, + (unsigned)val & 0xff); + } + mutex_unlock(&lp3972->io_lock); + + return ret; +} + +static int lp3972_ldo_is_enabled(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3972_LDO1; + u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); + u16 val; + + val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo)); + return !!(val & mask); +} + +static int lp3972_ldo_enable(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3972_LDO1; + u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); + + return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), + mask, mask); +} + +static int lp3972_ldo_disable(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3972_LDO1; + u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); + + return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), + mask, 0); +} + +static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3972_LDO1; + u16 mask = LP3972_LDO_VOL_MASK(ldo); + u16 val, reg; + + reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo)); + val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask; + + return val; +} + +static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev, + unsigned int selector) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int ldo = rdev_get_id(dev) - LP3972_LDO1; + int shift, ret; + + shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo); + ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo), + LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift); + + if (ret) + return ret; + + /* + * LDO1 and LDO5 support voltage control by either target voltage1 + * or target voltage2 register. + * We use target voltage1 register for LDO1 and LDO5 in this driver. + * We need to update voltage change control register(0x20) to enable + * LDO1 and LDO5 to change to their programmed target values. + */ + switch (ldo) { + case LP3972_LDO1: + case LP3972_LDO5: + shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo); + ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, + LP3972_VOL_CHANGE_FLAG_MASK << shift, + LP3972_VOL_CHANGE_FLAG_GO << shift); + if (ret) + return ret; + + ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, + LP3972_VOL_CHANGE_FLAG_MASK << shift, 0); + break; + } + + return ret; +} + +static const struct regulator_ops lp3972_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .is_enabled = lp3972_ldo_is_enabled, + .enable = lp3972_ldo_enable, + .disable = lp3972_ldo_disable, + .get_voltage_sel = lp3972_ldo_get_voltage_sel, + .set_voltage_sel = lp3972_ldo_set_voltage_sel, +}; + +static int lp3972_dcdc_is_enabled(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3972_DCDC1; + u16 mask = 1 << (buck * 2); + u16 val; + + val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck)); + return !!(val & mask); +} + +static int lp3972_dcdc_enable(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3972_DCDC1; + u16 mask = 1 << (buck * 2); + u16 val; + + val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), + mask, mask); + return val; +} + +static int lp3972_dcdc_disable(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3972_DCDC1; + u16 mask = 1 << (buck * 2); + u16 val; + + val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), + mask, 0); + return val; +} + +static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3972_DCDC1; + u16 reg; + + reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck)); + reg &= LP3972_BUCK_VOL_MASK; + + return reg; +} + +static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev, + unsigned int selector) +{ + struct lp3972 *lp3972 = rdev_get_drvdata(dev); + int buck = rdev_get_id(dev) - LP3972_DCDC1; + int ret; + + ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck), + LP3972_BUCK_VOL_MASK, selector); + if (ret) + return ret; + + if (buck != 0) + return ret; + + ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, + LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO); + if (ret) + return ret; + + return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, + LP3972_VOL_CHANGE_FLAG_MASK, 0); +} + +static const struct regulator_ops lp3972_dcdc_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .is_enabled = lp3972_dcdc_is_enabled, + .enable = lp3972_dcdc_enable, + .disable = lp3972_dcdc_disable, + .get_voltage_sel = lp3972_dcdc_get_voltage_sel, + .set_voltage_sel = lp3972_dcdc_set_voltage_sel, +}; + +static const struct regulator_desc regulators[] = { + { + .name = "LDO1", + .id = LP3972_LDO1, + .ops = &lp3972_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo1_voltage_map), + .volt_table = ldo1_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = LP3972_LDO2, + .ops = &lp3972_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo23_voltage_map), + .volt_table = ldo23_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO3", + .id = LP3972_LDO3, + .ops = &lp3972_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo23_voltage_map), + .volt_table = ldo23_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO4", + .id = LP3972_LDO4, + .ops = &lp3972_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo4_voltage_map), + .volt_table = ldo4_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO5", + .id = LP3972_LDO5, + .ops = &lp3972_ldo_ops, + .n_voltages = ARRAY_SIZE(ldo5_voltage_map), + .volt_table = ldo5_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC1", + .id = LP3972_DCDC1, + .ops = &lp3972_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck1_voltage_map), + .volt_table = buck1_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC2", + .id = LP3972_DCDC2, + .ops = &lp3972_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck23_voltage_map), + .volt_table = buck23_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC3", + .id = LP3972_DCDC3, + .ops = &lp3972_dcdc_ops, + .n_voltages = ARRAY_SIZE(buck23_voltage_map), + .volt_table = buck23_voltage_map, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, +}; + +static int setup_regulators(struct lp3972 *lp3972, + struct lp3972_platform_data *pdata) +{ + int i, err; + + /* Instantiate the regulators */ + for (i = 0; i < pdata->num_regulators; i++) { + struct lp3972_regulator_subdev *reg = &pdata->regulators[i]; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = lp3972->dev; + config.init_data = reg->initdata; + config.driver_data = lp3972; + + rdev = devm_regulator_register(lp3972->dev, + ®ulators[reg->id], &config); + if (IS_ERR(rdev)) { + err = PTR_ERR(rdev); + dev_err(lp3972->dev, "regulator init failed: %d\n", + err); + return err; + } + } + + return 0; +} + +static int lp3972_i2c_probe(struct i2c_client *i2c) +{ + struct lp3972 *lp3972; + struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev); + int ret; + u16 val; + + if (!pdata) { + dev_dbg(&i2c->dev, "No platform init data supplied\n"); + return -ENODEV; + } + + lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL); + if (!lp3972) + return -ENOMEM; + + lp3972->i2c = i2c; + lp3972->dev = &i2c->dev; + + mutex_init(&lp3972->io_lock); + + /* Detect LP3972 */ + ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val); + if (ret == 0 && + (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) { + ret = -ENODEV; + dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val); + } + if (ret < 0) { + dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret); + return ret; + } + + ret = setup_regulators(lp3972, pdata); + if (ret < 0) + return ret; + + i2c_set_clientdata(i2c, lp3972); + return 0; +} + +static const struct i2c_device_id lp3972_i2c_id[] = { + { .name = "lp3972" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id); + +static struct i2c_driver lp3972_i2c_driver = { + .driver = { + .name = "lp3972", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = lp3972_i2c_probe, + .id_table = lp3972_i2c_id, +}; + +static int __init lp3972_module_init(void) +{ + return i2c_add_driver(&lp3972_i2c_driver); +} +subsys_initcall(lp3972_module_init); + +static void __exit lp3972_module_exit(void) +{ + i2c_del_driver(&lp3972_i2c_driver); +} +module_exit(lp3972_module_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Axel Lin "); +MODULE_DESCRIPTION("LP3972 PMIC driver"); diff --git a/drivers/regulator/lp872x.c b/drivers/regulator/lp872x.c new file mode 100644 index 000000000..5b2faddd8 --- /dev/null +++ b/drivers/regulator/lp872x.c @@ -0,0 +1,958 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2012 Texas Instruments + * + * Author: Milo(Woogyom) Kim + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Registers : LP8720/8725 shared */ +#define LP872X_GENERAL_CFG 0x00 +#define LP872X_LDO1_VOUT 0x01 +#define LP872X_LDO2_VOUT 0x02 +#define LP872X_LDO3_VOUT 0x03 +#define LP872X_LDO4_VOUT 0x04 +#define LP872X_LDO5_VOUT 0x05 + +/* Registers : LP8720 */ +#define LP8720_BUCK_VOUT1 0x06 +#define LP8720_BUCK_VOUT2 0x07 +#define LP8720_ENABLE 0x08 + +/* Registers : LP8725 */ +#define LP8725_LILO1_VOUT 0x06 +#define LP8725_LILO2_VOUT 0x07 +#define LP8725_BUCK1_VOUT1 0x08 +#define LP8725_BUCK1_VOUT2 0x09 +#define LP8725_BUCK2_VOUT1 0x0A +#define LP8725_BUCK2_VOUT2 0x0B +#define LP8725_BUCK_CTRL 0x0C +#define LP8725_LDO_CTRL 0x0D + +/* Mask/shift : LP8720/LP8725 shared */ +#define LP872X_VOUT_M 0x1F +#define LP872X_START_DELAY_M 0xE0 +#define LP872X_START_DELAY_S 5 +#define LP872X_EN_LDO1_M BIT(0) +#define LP872X_EN_LDO2_M BIT(1) +#define LP872X_EN_LDO3_M BIT(2) +#define LP872X_EN_LDO4_M BIT(3) +#define LP872X_EN_LDO5_M BIT(4) + +/* Mask/shift : LP8720 */ +#define LP8720_TIMESTEP_S 0 /* Addr 00h */ +#define LP8720_TIMESTEP_M BIT(0) +#define LP8720_EXT_DVS_M BIT(2) +#define LP8720_BUCK_FPWM_S 5 /* Addr 07h */ +#define LP8720_BUCK_FPWM_M BIT(5) +#define LP8720_EN_BUCK_M BIT(5) /* Addr 08h */ +#define LP8720_DVS_SEL_M BIT(7) + +/* Mask/shift : LP8725 */ +#define LP8725_TIMESTEP_M 0xC0 /* Addr 00h */ +#define LP8725_TIMESTEP_S 6 +#define LP8725_BUCK1_EN_M BIT(0) +#define LP8725_DVS1_M BIT(2) +#define LP8725_DVS2_M BIT(3) +#define LP8725_BUCK2_EN_M BIT(4) +#define LP8725_BUCK_CL_M 0xC0 /* Addr 09h, 0Bh */ +#define LP8725_BUCK_CL_S 6 +#define LP8725_BUCK1_FPWM_S 1 /* Addr 0Ch */ +#define LP8725_BUCK1_FPWM_M BIT(1) +#define LP8725_BUCK2_FPWM_S 5 +#define LP8725_BUCK2_FPWM_M BIT(5) +#define LP8725_EN_LILO1_M BIT(5) /* Addr 0Dh */ +#define LP8725_EN_LILO2_M BIT(6) + +/* PWM mode */ +#define LP872X_FORCE_PWM 1 +#define LP872X_AUTO_PWM 0 + +#define LP8720_NUM_REGULATORS 6 +#define LP8725_NUM_REGULATORS 9 +#define EXTERN_DVS_USED 0 +#define MAX_DELAY 6 + +/* Default DVS Mode */ +#define LP8720_DEFAULT_DVS 0 +#define LP8725_DEFAULT_DVS BIT(2) + +/* dump registers in regmap-debugfs */ +#define MAX_REGISTERS 0x0F + +enum lp872x_id { + LP8720, + LP8725, +}; + +struct lp872x { + struct regmap *regmap; + struct device *dev; + enum lp872x_id chipid; + struct lp872x_platform_data *pdata; + int num_regulators; + enum gpiod_flags dvs_pin; +}; + +/* LP8720/LP8725 shared voltage table for LDOs */ +static const unsigned int lp872x_ldo_vtbl[] = { + 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000, + 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 2000000, + 2100000, 2200000, 2300000, 2400000, 2500000, 2600000, 2650000, 2700000, + 2750000, 2800000, 2850000, 2900000, 2950000, 3000000, 3100000, 3300000, +}; + +/* LP8720 LDO4 voltage table */ +static const unsigned int lp8720_ldo4_vtbl[] = { + 800000, 850000, 900000, 1000000, 1100000, 1200000, 1250000, 1300000, + 1350000, 1400000, 1450000, 1500000, 1550000, 1600000, 1650000, 1700000, + 1750000, 1800000, 1850000, 1900000, 2000000, 2100000, 2200000, 2300000, + 2400000, 2500000, 2600000, 2650000, 2700000, 2750000, 2800000, 2850000, +}; + +/* LP8725 LILO(Low Input Low Output) voltage table */ +static const unsigned int lp8725_lilo_vtbl[] = { + 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000, + 1200000, 1250000, 1300000, 1350000, 1400000, 1500000, 1600000, 1700000, + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000, +}; + +/* LP8720 BUCK voltage table */ +#define EXT_R 0 /* external resistor divider */ +static const unsigned int lp8720_buck_vtbl[] = { + EXT_R, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, + 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, + 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, + 1950000, 2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000, +}; + +/* LP8725 BUCK voltage table */ +static const unsigned int lp8725_buck_vtbl[] = { + 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000, + 1200000, 1250000, 1300000, 1350000, 1400000, 1500000, 1600000, 1700000, + 1750000, 1800000, 1850000, 1900000, 2000000, 2100000, 2200000, 2300000, + 2400000, 2500000, 2600000, 2700000, 2800000, 2850000, 2900000, 3000000, +}; + +/* LP8725 BUCK current limit */ +static const unsigned int lp8725_buck_uA[] = { + 460000, 780000, 1050000, 1370000, +}; + +static int lp872x_read_byte(struct lp872x *lp, u8 addr, u8 *data) +{ + int ret; + unsigned int val; + + ret = regmap_read(lp->regmap, addr, &val); + if (ret < 0) { + dev_err(lp->dev, "failed to read 0x%.2x\n", addr); + return ret; + } + + *data = (u8)val; + return 0; +} + +static inline int lp872x_write_byte(struct lp872x *lp, u8 addr, u8 data) +{ + return regmap_write(lp->regmap, addr, data); +} + +static inline int lp872x_update_bits(struct lp872x *lp, u8 addr, + unsigned int mask, u8 data) +{ + return regmap_update_bits(lp->regmap, addr, mask, data); +} + +static int lp872x_get_timestep_usec(struct lp872x *lp) +{ + enum lp872x_id chip = lp->chipid; + u8 val, mask, shift; + int *time_usec, size, ret; + int lp8720_time_usec[] = { 25, 50 }; + int lp8725_time_usec[] = { 32, 64, 128, 256 }; + + switch (chip) { + case LP8720: + mask = LP8720_TIMESTEP_M; + shift = LP8720_TIMESTEP_S; + time_usec = &lp8720_time_usec[0]; + size = ARRAY_SIZE(lp8720_time_usec); + break; + case LP8725: + mask = LP8725_TIMESTEP_M; + shift = LP8725_TIMESTEP_S; + time_usec = &lp8725_time_usec[0]; + size = ARRAY_SIZE(lp8725_time_usec); + break; + default: + return -EINVAL; + } + + ret = lp872x_read_byte(lp, LP872X_GENERAL_CFG, &val); + if (ret) + return ret; + + val = (val & mask) >> shift; + if (val >= size) + return -EINVAL; + + return *(time_usec + val); +} + +static int lp872x_regulator_enable_time(struct regulator_dev *rdev) +{ + struct lp872x *lp = rdev_get_drvdata(rdev); + enum lp872x_regulator_id rid = rdev_get_id(rdev); + int time_step_us = lp872x_get_timestep_usec(lp); + int ret; + u8 addr, val; + + if (time_step_us < 0) + return time_step_us; + + switch (rid) { + case LP8720_ID_LDO1 ... LP8720_ID_BUCK: + addr = LP872X_LDO1_VOUT + rid; + break; + case LP8725_ID_LDO1 ... LP8725_ID_BUCK1: + addr = LP872X_LDO1_VOUT + rid - LP8725_ID_BASE; + break; + case LP8725_ID_BUCK2: + addr = LP8725_BUCK2_VOUT1; + break; + default: + return -EINVAL; + } + + ret = lp872x_read_byte(lp, addr, &val); + if (ret) + return ret; + + val = (val & LP872X_START_DELAY_M) >> LP872X_START_DELAY_S; + + return val > MAX_DELAY ? 0 : val * time_step_us; +} + +static void lp872x_set_dvs(struct lp872x *lp, enum lp872x_dvs_sel dvs_sel, + struct gpio_desc *gpio) +{ + enum gpiod_flags state; + + state = dvs_sel == SEL_V1 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + gpiod_set_value(gpio, state); + lp->dvs_pin = state; +} + +static u8 lp872x_select_buck_vout_addr(struct lp872x *lp, + enum lp872x_regulator_id buck) +{ + u8 val, addr; + + if (lp872x_read_byte(lp, LP872X_GENERAL_CFG, &val)) + return 0; + + switch (buck) { + case LP8720_ID_BUCK: + if (val & LP8720_EXT_DVS_M) { + addr = (lp->dvs_pin == GPIOD_OUT_HIGH) ? + LP8720_BUCK_VOUT1 : LP8720_BUCK_VOUT2; + } else { + if (lp872x_read_byte(lp, LP8720_ENABLE, &val)) + return 0; + + addr = val & LP8720_DVS_SEL_M ? + LP8720_BUCK_VOUT1 : LP8720_BUCK_VOUT2; + } + break; + case LP8725_ID_BUCK1: + if (val & LP8725_DVS1_M) + addr = LP8725_BUCK1_VOUT1; + else + addr = (lp->dvs_pin == GPIOD_OUT_HIGH) ? + LP8725_BUCK1_VOUT1 : LP8725_BUCK1_VOUT2; + break; + case LP8725_ID_BUCK2: + addr = val & LP8725_DVS2_M ? + LP8725_BUCK2_VOUT1 : LP8725_BUCK2_VOUT2; + break; + default: + return 0; + } + + return addr; +} + +static bool lp872x_is_valid_buck_addr(u8 addr) +{ + switch (addr) { + case LP8720_BUCK_VOUT1: + case LP8720_BUCK_VOUT2: + case LP8725_BUCK1_VOUT1: + case LP8725_BUCK1_VOUT2: + case LP8725_BUCK2_VOUT1: + case LP8725_BUCK2_VOUT2: + return true; + default: + return false; + } +} + +static int lp872x_buck_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct lp872x *lp = rdev_get_drvdata(rdev); + enum lp872x_regulator_id buck = rdev_get_id(rdev); + u8 addr, mask = LP872X_VOUT_M; + struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL; + + if (dvs && dvs->gpio) + lp872x_set_dvs(lp, dvs->vsel, dvs->gpio); + + addr = lp872x_select_buck_vout_addr(lp, buck); + if (!lp872x_is_valid_buck_addr(addr)) + return -EINVAL; + + return lp872x_update_bits(lp, addr, mask, selector); +} + +static int lp872x_buck_get_voltage_sel(struct regulator_dev *rdev) +{ + struct lp872x *lp = rdev_get_drvdata(rdev); + enum lp872x_regulator_id buck = rdev_get_id(rdev); + u8 addr, val; + int ret; + + addr = lp872x_select_buck_vout_addr(lp, buck); + if (!lp872x_is_valid_buck_addr(addr)) + return -EINVAL; + + ret = lp872x_read_byte(lp, addr, &val); + if (ret) + return ret; + + return val & LP872X_VOUT_M; +} + +static int lp872x_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct lp872x *lp = rdev_get_drvdata(rdev); + enum lp872x_regulator_id buck = rdev_get_id(rdev); + u8 addr, mask, shift, val; + + switch (buck) { + case LP8720_ID_BUCK: + addr = LP8720_BUCK_VOUT2; + mask = LP8720_BUCK_FPWM_M; + shift = LP8720_BUCK_FPWM_S; + break; + case LP8725_ID_BUCK1: + addr = LP8725_BUCK_CTRL; + mask = LP8725_BUCK1_FPWM_M; + shift = LP8725_BUCK1_FPWM_S; + break; + case LP8725_ID_BUCK2: + addr = LP8725_BUCK_CTRL; + mask = LP8725_BUCK2_FPWM_M; + shift = LP8725_BUCK2_FPWM_S; + break; + default: + return -EINVAL; + } + + if (mode == REGULATOR_MODE_FAST) + val = LP872X_FORCE_PWM << shift; + else if (mode == REGULATOR_MODE_NORMAL) + val = LP872X_AUTO_PWM << shift; + else + return -EINVAL; + + return lp872x_update_bits(lp, addr, mask, val); +} + +static unsigned int lp872x_buck_get_mode(struct regulator_dev *rdev) +{ + struct lp872x *lp = rdev_get_drvdata(rdev); + enum lp872x_regulator_id buck = rdev_get_id(rdev); + u8 addr, mask, val; + int ret; + + switch (buck) { + case LP8720_ID_BUCK: + addr = LP8720_BUCK_VOUT2; + mask = LP8720_BUCK_FPWM_M; + break; + case LP8725_ID_BUCK1: + addr = LP8725_BUCK_CTRL; + mask = LP8725_BUCK1_FPWM_M; + break; + case LP8725_ID_BUCK2: + addr = LP8725_BUCK_CTRL; + mask = LP8725_BUCK2_FPWM_M; + break; + default: + return -EINVAL; + } + + ret = lp872x_read_byte(lp, addr, &val); + if (ret) + return ret; + + return val & mask ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops lp872x_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp872x_regulator_enable_time, +}; + +static const struct regulator_ops lp8720_buck_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = lp872x_buck_set_voltage_sel, + .get_voltage_sel = lp872x_buck_get_voltage_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp872x_regulator_enable_time, + .set_mode = lp872x_buck_set_mode, + .get_mode = lp872x_buck_get_mode, +}; + +static const struct regulator_ops lp8725_buck_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = lp872x_buck_set_voltage_sel, + .get_voltage_sel = lp872x_buck_get_voltage_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp872x_regulator_enable_time, + .set_mode = lp872x_buck_set_mode, + .get_mode = lp872x_buck_get_mode, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static const struct regulator_desc lp8720_regulator_desc[] = { + { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .id = LP8720_ID_LDO1, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO1_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP872X_EN_LDO1_M, + }, + { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .id = LP8720_ID_LDO2, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO2_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP872X_EN_LDO2_M, + }, + { + .name = "ldo3", + .of_match = of_match_ptr("ldo3"), + .id = LP8720_ID_LDO3, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO3_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP872X_EN_LDO3_M, + }, + { + .name = "ldo4", + .of_match = of_match_ptr("ldo4"), + .id = LP8720_ID_LDO4, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp8720_ldo4_vtbl), + .volt_table = lp8720_ldo4_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO4_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP872X_EN_LDO4_M, + }, + { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .id = LP8720_ID_LDO5, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO5_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP872X_EN_LDO5_M, + }, + { + .name = "buck", + .of_match = of_match_ptr("buck"), + .id = LP8720_ID_BUCK, + .ops = &lp8720_buck_ops, + .n_voltages = ARRAY_SIZE(lp8720_buck_vtbl), + .volt_table = lp8720_buck_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8720_ENABLE, + .enable_mask = LP8720_EN_BUCK_M, + }, +}; + +static const struct regulator_desc lp8725_regulator_desc[] = { + { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .id = LP8725_ID_LDO1, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO1_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP872X_EN_LDO1_M, + }, + { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .id = LP8725_ID_LDO2, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO2_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP872X_EN_LDO2_M, + }, + { + .name = "ldo3", + .of_match = of_match_ptr("ldo3"), + .id = LP8725_ID_LDO3, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO3_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP872X_EN_LDO3_M, + }, + { + .name = "ldo4", + .of_match = of_match_ptr("ldo4"), + .id = LP8725_ID_LDO4, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO4_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP872X_EN_LDO4_M, + }, + { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .id = LP8725_ID_LDO5, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl), + .volt_table = lp872x_ldo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP872X_LDO5_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP872X_EN_LDO5_M, + }, + { + .name = "lilo1", + .of_match = of_match_ptr("lilo1"), + .id = LP8725_ID_LILO1, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp8725_lilo_vtbl), + .volt_table = lp8725_lilo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8725_LILO1_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP8725_EN_LILO1_M, + }, + { + .name = "lilo2", + .of_match = of_match_ptr("lilo2"), + .id = LP8725_ID_LILO2, + .ops = &lp872x_ldo_ops, + .n_voltages = ARRAY_SIZE(lp8725_lilo_vtbl), + .volt_table = lp8725_lilo_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8725_LILO2_VOUT, + .vsel_mask = LP872X_VOUT_M, + .enable_reg = LP8725_LDO_CTRL, + .enable_mask = LP8725_EN_LILO2_M, + }, + { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .id = LP8725_ID_BUCK1, + .ops = &lp8725_buck_ops, + .n_voltages = ARRAY_SIZE(lp8725_buck_vtbl), + .volt_table = lp8725_buck_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP872X_GENERAL_CFG, + .enable_mask = LP8725_BUCK1_EN_M, + .curr_table = lp8725_buck_uA, + .n_current_limits = ARRAY_SIZE(lp8725_buck_uA), + .csel_reg = LP8725_BUCK1_VOUT2, + .csel_mask = LP8725_BUCK_CL_M, + }, + { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .id = LP8725_ID_BUCK2, + .ops = &lp8725_buck_ops, + .n_voltages = ARRAY_SIZE(lp8725_buck_vtbl), + .volt_table = lp8725_buck_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP872X_GENERAL_CFG, + .enable_mask = LP8725_BUCK2_EN_M, + .curr_table = lp8725_buck_uA, + .n_current_limits = ARRAY_SIZE(lp8725_buck_uA), + .csel_reg = LP8725_BUCK2_VOUT2, + .csel_mask = LP8725_BUCK_CL_M, + }, +}; + +static int lp872x_init_dvs(struct lp872x *lp) +{ + struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL; + enum gpiod_flags pinstate; + u8 mask[] = { LP8720_EXT_DVS_M, LP8725_DVS1_M | LP8725_DVS2_M }; + u8 default_dvs_mode[] = { LP8720_DEFAULT_DVS, LP8725_DEFAULT_DVS }; + + if (!dvs) + goto set_default_dvs_mode; + + if (!dvs->gpio) + goto set_default_dvs_mode; + + pinstate = dvs->init_state; + dvs->gpio = devm_gpiod_get_optional(lp->dev, "ti,dvs", pinstate); + + if (IS_ERR(dvs->gpio)) { + dev_err(lp->dev, "gpio request err: %ld\n", PTR_ERR(dvs->gpio)); + return PTR_ERR(dvs->gpio); + } + + lp->dvs_pin = pinstate; + + return 0; + +set_default_dvs_mode: + return lp872x_update_bits(lp, LP872X_GENERAL_CFG, mask[lp->chipid], + default_dvs_mode[lp->chipid]); +} + +static int lp872x_hw_enable(struct lp872x *lp) +{ + if (!lp->pdata) + return -EINVAL; + + if (!lp->pdata->enable_gpio) + return 0; + + /* Always set enable GPIO high. */ + lp->pdata->enable_gpio = devm_gpiod_get_optional(lp->dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(lp->pdata->enable_gpio)) { + dev_err(lp->dev, "gpio request err: %ld\n", PTR_ERR(lp->pdata->enable_gpio)); + return PTR_ERR(lp->pdata->enable_gpio); + } + + /* Each chip has a different enable delay. */ + if (lp->chipid == LP8720) + usleep_range(LP8720_ENABLE_DELAY, 1.5 * LP8720_ENABLE_DELAY); + else + usleep_range(LP8725_ENABLE_DELAY, 1.5 * LP8725_ENABLE_DELAY); + + return 0; +} + +static int lp872x_config(struct lp872x *lp) +{ + struct lp872x_platform_data *pdata = lp->pdata; + int ret; + + if (!pdata || !pdata->update_config) + goto init_dvs; + + ret = lp872x_write_byte(lp, LP872X_GENERAL_CFG, pdata->general_config); + if (ret) + return ret; + +init_dvs: + return lp872x_init_dvs(lp); +} + +static struct regulator_init_data +*lp872x_find_regulator_init_data(int id, struct lp872x *lp) +{ + struct lp872x_platform_data *pdata = lp->pdata; + int i; + + if (!pdata) + return NULL; + + for (i = 0; i < lp->num_regulators; i++) { + if (pdata->regulator_data[i].id == id) + return pdata->regulator_data[i].init_data; + } + + return NULL; +} + +static int lp872x_regulator_register(struct lp872x *lp) +{ + const struct regulator_desc *desc; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + int i; + + for (i = 0; i < lp->num_regulators; i++) { + desc = (lp->chipid == LP8720) ? &lp8720_regulator_desc[i] : + &lp8725_regulator_desc[i]; + + cfg.dev = lp->dev; + cfg.init_data = lp872x_find_regulator_init_data(desc->id, lp); + cfg.driver_data = lp; + cfg.regmap = lp->regmap; + + rdev = devm_regulator_register(lp->dev, desc, &cfg); + if (IS_ERR(rdev)) { + dev_err(lp->dev, "regulator register err"); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct regmap_config lp872x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX_REGISTERS, +}; + +#ifdef CONFIG_OF + +#define LP872X_VALID_OPMODE (REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL) + +static struct of_regulator_match lp8720_matches[] = { + { .name = "ldo1", .driver_data = (void *)LP8720_ID_LDO1, }, + { .name = "ldo2", .driver_data = (void *)LP8720_ID_LDO2, }, + { .name = "ldo3", .driver_data = (void *)LP8720_ID_LDO3, }, + { .name = "ldo4", .driver_data = (void *)LP8720_ID_LDO4, }, + { .name = "ldo5", .driver_data = (void *)LP8720_ID_LDO5, }, + { .name = "buck", .driver_data = (void *)LP8720_ID_BUCK, }, +}; + +static struct of_regulator_match lp8725_matches[] = { + { .name = "ldo1", .driver_data = (void *)LP8725_ID_LDO1, }, + { .name = "ldo2", .driver_data = (void *)LP8725_ID_LDO2, }, + { .name = "ldo3", .driver_data = (void *)LP8725_ID_LDO3, }, + { .name = "ldo4", .driver_data = (void *)LP8725_ID_LDO4, }, + { .name = "ldo5", .driver_data = (void *)LP8725_ID_LDO5, }, + { .name = "lilo1", .driver_data = (void *)LP8725_ID_LILO1, }, + { .name = "lilo2", .driver_data = (void *)LP8725_ID_LILO2, }, + { .name = "buck1", .driver_data = (void *)LP8725_ID_BUCK1, }, + { .name = "buck2", .driver_data = (void *)LP8725_ID_BUCK2, }, +}; + +static struct lp872x_platform_data +*lp872x_populate_pdata_from_dt(struct device *dev, enum lp872x_id which) +{ + struct device_node *np = dev->of_node; + struct lp872x_platform_data *pdata; + struct of_regulator_match *match; + int num_matches; + int count; + int i; + u8 dvs_state; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return ERR_PTR(-ENOMEM); + + of_property_read_u8(np, "ti,general-config", &pdata->general_config); + pdata->update_config = of_property_read_bool(np, "ti,update-config"); + + pdata->dvs = devm_kzalloc(dev, sizeof(struct lp872x_dvs), GFP_KERNEL); + if (!pdata->dvs) + return ERR_PTR(-ENOMEM); + + of_property_read_u8(np, "ti,dvs-vsel", (u8 *)&pdata->dvs->vsel); + of_property_read_u8(np, "ti,dvs-state", &dvs_state); + pdata->dvs->init_state = dvs_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + + if (of_get_child_count(np) == 0) + goto out; + + switch (which) { + case LP8720: + match = lp8720_matches; + num_matches = ARRAY_SIZE(lp8720_matches); + break; + case LP8725: + match = lp8725_matches; + num_matches = ARRAY_SIZE(lp8725_matches); + break; + default: + goto out; + } + + count = of_regulator_match(dev, np, match, num_matches); + if (count <= 0) + goto out; + + for (i = 0; i < num_matches; i++) { + pdata->regulator_data[i].id = + (uintptr_t)match[i].driver_data; + pdata->regulator_data[i].init_data = match[i].init_data; + } +out: + return pdata; +} +#else +static struct lp872x_platform_data +*lp872x_populate_pdata_from_dt(struct device *dev, enum lp872x_id which) +{ + return NULL; +} +#endif + +static int lp872x_probe(struct i2c_client *cl) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(cl); + struct lp872x *lp; + struct lp872x_platform_data *pdata; + int ret; + static const int lp872x_num_regulators[] = { + [LP8720] = LP8720_NUM_REGULATORS, + [LP8725] = LP8725_NUM_REGULATORS, + }; + + if (cl->dev.of_node) { + pdata = lp872x_populate_pdata_from_dt(&cl->dev, + (enum lp872x_id)id->driver_data); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + } else { + pdata = dev_get_platdata(&cl->dev); + } + + lp = devm_kzalloc(&cl->dev, sizeof(struct lp872x), GFP_KERNEL); + if (!lp) + return -ENOMEM; + + lp->num_regulators = lp872x_num_regulators[id->driver_data]; + + lp->regmap = devm_regmap_init_i2c(cl, &lp872x_regmap_config); + if (IS_ERR(lp->regmap)) { + ret = PTR_ERR(lp->regmap); + dev_err(&cl->dev, "regmap init i2c err: %d\n", ret); + return ret; + } + + lp->dev = &cl->dev; + lp->pdata = pdata; + lp->chipid = id->driver_data; + i2c_set_clientdata(cl, lp); + + ret = lp872x_hw_enable(lp); + if (ret) + return ret; + + ret = lp872x_config(lp); + if (ret) + return ret; + + return lp872x_regulator_register(lp); +} + +static const struct of_device_id lp872x_dt_ids[] __maybe_unused = { + { .compatible = "ti,lp8720", }, + { .compatible = "ti,lp8725", }, + { } +}; +MODULE_DEVICE_TABLE(of, lp872x_dt_ids); + +static const struct i2c_device_id lp872x_ids[] = { + { .name = "lp8720", .driver_data = LP8720 }, + { .name = "lp8725", .driver_data = LP8725 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, lp872x_ids); + +static struct i2c_driver lp872x_driver = { + .driver = { + .name = "lp872x", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(lp872x_dt_ids), + }, + .probe = lp872x_probe, + .id_table = lp872x_ids, +}; + +module_i2c_driver(lp872x_driver); + +MODULE_DESCRIPTION("TI/National Semiconductor LP872x PMU Regulator Driver"); +MODULE_AUTHOR("Milo Kim"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/lp873x-regulator.c b/drivers/regulator/lp873x-regulator.c new file mode 100644 index 000000000..7e837ddfa --- /dev/null +++ b/drivers/regulator/lp873x-regulator.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for LP873X PMIC + * + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include + +#include + +#define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ + _delay, _lr, _cr) \ + [_id] = { \ + .desc = { \ + .name = _name, \ + .supply_name = _of "-in", \ + .id = _id, \ + .of_match = of_match_ptr(_of), \ + .regulators_node = of_match_ptr("regulators"),\ + .ops = &_ops, \ + .n_voltages = _n, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .ramp_delay = _delay, \ + .linear_ranges = _lr, \ + .n_linear_ranges = ARRAY_SIZE(_lr), \ + .curr_table = lp873x_buck_uA, \ + .n_current_limits = ARRAY_SIZE(lp873x_buck_uA), \ + .csel_reg = (_cr), \ + .csel_mask = LP873X_BUCK0_CTRL_2_BUCK0_ILIM,\ + }, \ + .ctrl2_reg = _cr, \ + } + +struct lp873x_regulator { + struct regulator_desc desc; + unsigned int ctrl2_reg; +}; + +static const struct lp873x_regulator regulators[]; + +static const struct linear_range buck0_buck1_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x13, 0), + REGULATOR_LINEAR_RANGE(700000, 0x14, 0x17, 10000), + REGULATOR_LINEAR_RANGE(735000, 0x18, 0x9d, 5000), + REGULATOR_LINEAR_RANGE(1420000, 0x9e, 0xff, 20000), +}; + +static const struct linear_range ldo0_ldo1_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0x0, 0x19, 100000), +}; + +static const unsigned int lp873x_buck_ramp_delay[] = { + 30000, 15000, 10000, 7500, 3800, 1900, 940, 470 +}; + +/* LP873X BUCK current limit */ +static const unsigned int lp873x_buck_uA[] = { + 1500000, 2000000, 2500000, 3000000, 3500000, 4000000, +}; + +static int lp873x_buck_set_ramp_delay(struct regulator_dev *rdev, + int ramp_delay) +{ + int id = rdev_get_id(rdev); + struct lp873x *lp873 = rdev_get_drvdata(rdev); + unsigned int reg; + int ret; + + if (ramp_delay <= 470) + reg = 7; + else if (ramp_delay <= 940) + reg = 6; + else if (ramp_delay <= 1900) + reg = 5; + else if (ramp_delay <= 3800) + reg = 4; + else if (ramp_delay <= 7500) + reg = 3; + else if (ramp_delay <= 10000) + reg = 2; + else if (ramp_delay <= 15000) + reg = 1; + else + reg = 0; + + ret = regmap_update_bits(lp873->regmap, regulators[id].ctrl2_reg, + LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE, + FIELD_PREP(LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE, reg)); + if (ret) { + dev_err(lp873->dev, "SLEW RATE write failed: %d\n", ret); + return ret; + } + + rdev->constraints->ramp_delay = lp873x_buck_ramp_delay[reg]; + + return 0; +} + +/* Operations permitted on BUCK0, BUCK1 */ +static const struct regulator_ops lp873x_buck01_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = lp873x_buck_set_ramp_delay, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +/* Operations permitted on LDO0 and LDO1 */ +static const struct regulator_ops lp873x_ldo01_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct lp873x_regulator regulators[] = { + LP873X_REGULATOR("BUCK0", LP873X_BUCK_0, "buck0", lp873x_buck01_ops, + 256, LP873X_REG_BUCK0_VOUT, + LP873X_BUCK0_VOUT_BUCK0_VSET, LP873X_REG_BUCK0_CTRL_1, + LP873X_BUCK0_CTRL_1_BUCK0_EN, 10000, + buck0_buck1_ranges, LP873X_REG_BUCK0_CTRL_2), + LP873X_REGULATOR("BUCK1", LP873X_BUCK_1, "buck1", lp873x_buck01_ops, + 256, LP873X_REG_BUCK1_VOUT, + LP873X_BUCK1_VOUT_BUCK1_VSET, LP873X_REG_BUCK1_CTRL_1, + LP873X_BUCK1_CTRL_1_BUCK1_EN, 10000, + buck0_buck1_ranges, LP873X_REG_BUCK1_CTRL_2), + LP873X_REGULATOR("LDO0", LP873X_LDO_0, "ldo0", lp873x_ldo01_ops, 26, + LP873X_REG_LDO0_VOUT, LP873X_LDO0_VOUT_LDO0_VSET, + LP873X_REG_LDO0_CTRL, + LP873X_LDO0_CTRL_LDO0_EN, 0, ldo0_ldo1_ranges, 0xFF), + LP873X_REGULATOR("LDO1", LP873X_LDO_1, "ldo1", lp873x_ldo01_ops, 26, + LP873X_REG_LDO1_VOUT, LP873X_LDO1_VOUT_LDO1_VSET, + LP873X_REG_LDO1_CTRL, + LP873X_LDO1_CTRL_LDO1_EN, 0, ldo0_ldo1_ranges, 0xFF), +}; + +static int lp873x_regulator_probe(struct platform_device *pdev) +{ + struct lp873x *lp873 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + platform_set_drvdata(pdev, lp873); + + config.dev = &pdev->dev; + config.dev->of_node = lp873->dev->of_node; + config.driver_data = lp873; + config.regmap = lp873->regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(lp873->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id lp873x_regulator_id_table[] = { + { .name = "lp873x-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, lp873x_regulator_id_table); + +static struct platform_driver lp873x_regulator_driver = { + .driver = { + .name = "lp873x-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = lp873x_regulator_probe, + .id_table = lp873x_regulator_id_table, +}; +module_platform_driver(lp873x_regulator_driver); + +MODULE_AUTHOR("J Keerthy "); +MODULE_DESCRIPTION("LP873X voltage regulator driver"); +MODULE_ALIAS("platform:lp873x-pmic"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/lp8755.c b/drivers/regulator/lp8755.c new file mode 100644 index 000000000..632320ba1 --- /dev/null +++ b/drivers/regulator/lp8755.c @@ -0,0 +1,465 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * LP8755 High Performance Power Management Unit : System Interface Driver + * (based on rev. 0.26) + * Copyright 2012 Texas Instruments + * + * Author: Daniel(Geon Si) Jeong + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LP8755_REG_BUCK0 0x00 +#define LP8755_REG_BUCK1 0x03 +#define LP8755_REG_BUCK2 0x04 +#define LP8755_REG_BUCK3 0x01 +#define LP8755_REG_BUCK4 0x05 +#define LP8755_REG_BUCK5 0x02 +#define LP8755_REG_MAX 0xFF + +#define LP8755_BUCK_EN_M BIT(7) +#define LP8755_BUCK_LINEAR_OUT_MAX 0x76 +#define LP8755_BUCK_VOUT_M 0x7F + +struct lp8755_mphase { + int nreg; + int buck_num[LP8755_BUCK_MAX]; +}; + +struct lp8755_chip { + struct device *dev; + struct regmap *regmap; + struct lp8755_platform_data *pdata; + + int irq; + unsigned int irqmask; + + int mphase; + struct regulator_dev *rdev[LP8755_BUCK_MAX]; +}; + +static int lp8755_buck_enable_time(struct regulator_dev *rdev) +{ + int ret; + unsigned int regval; + enum lp8755_bucks id = rdev_get_id(rdev); + + ret = regmap_read(rdev->regmap, 0x12 + id, ®val); + if (ret < 0) { + dev_err(&rdev->dev, "i2c access error %s\n", __func__); + return ret; + } + return (regval & 0xff) * 100; +} + +static int lp8755_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + int ret; + unsigned int regbval = 0x0; + enum lp8755_bucks id = rdev_get_id(rdev); + struct lp8755_chip *pchip = rdev_get_drvdata(rdev); + + switch (mode) { + case REGULATOR_MODE_FAST: + /* forced pwm mode */ + regbval = (0x01 << id); + break; + case REGULATOR_MODE_NORMAL: + /* enable automatic pwm/pfm mode */ + ret = regmap_update_bits(rdev->regmap, 0x08 + id, 0x20, 0x00); + if (ret < 0) + goto err_i2c; + break; + case REGULATOR_MODE_IDLE: + /* enable automatic pwm/pfm/lppfm mode */ + ret = regmap_update_bits(rdev->regmap, 0x08 + id, 0x20, 0x20); + if (ret < 0) + goto err_i2c; + + ret = regmap_update_bits(rdev->regmap, 0x10, 0x01, 0x01); + if (ret < 0) + goto err_i2c; + break; + default: + dev_err(pchip->dev, "Not supported buck mode %s\n", __func__); + /* forced pwm mode */ + regbval = (0x01 << id); + } + + ret = regmap_update_bits(rdev->regmap, 0x06, 0x01 << id, regbval); + if (ret < 0) + goto err_i2c; + return ret; +err_i2c: + dev_err(&rdev->dev, "i2c access error %s\n", __func__); + return ret; +} + +static unsigned int lp8755_buck_get_mode(struct regulator_dev *rdev) +{ + int ret; + unsigned int regval; + enum lp8755_bucks id = rdev_get_id(rdev); + + ret = regmap_read(rdev->regmap, 0x06, ®val); + if (ret < 0) + goto err_i2c; + + /* mode fast means forced pwm mode */ + if (regval & (0x01 << id)) + return REGULATOR_MODE_FAST; + + ret = regmap_read(rdev->regmap, 0x08 + id, ®val); + if (ret < 0) + goto err_i2c; + + /* mode idle means automatic pwm/pfm/lppfm mode */ + if (regval & 0x20) + return REGULATOR_MODE_IDLE; + + /* mode normal means automatic pwm/pfm mode */ + return REGULATOR_MODE_NORMAL; + +err_i2c: + dev_err(&rdev->dev, "i2c access error %s\n", __func__); + return 0; +} + +static const unsigned int lp8755_buck_ramp_table[] = { + 30000, 15000, 7500, 3800, 1900, 940, 470, 230 +}; + +static const struct regulator_ops lp8755_buck_ops = { + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp8755_buck_enable_time, + .set_mode = lp8755_buck_set_mode, + .get_mode = lp8755_buck_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +#define lp8755_rail(_id) "lp8755_buck"#_id +#define lp8755_buck_init(_id)\ +{\ + .constraints = {\ + .name = lp8755_rail(_id),\ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,\ + .min_uV = 500000,\ + .max_uV = 1675000,\ + },\ +} + +static struct regulator_init_data lp8755_reg_default[LP8755_BUCK_MAX] = { + [LP8755_BUCK0] = lp8755_buck_init(0), + [LP8755_BUCK1] = lp8755_buck_init(1), + [LP8755_BUCK2] = lp8755_buck_init(2), + [LP8755_BUCK3] = lp8755_buck_init(3), + [LP8755_BUCK4] = lp8755_buck_init(4), + [LP8755_BUCK5] = lp8755_buck_init(5), +}; + +static const struct lp8755_mphase mphase_buck[MPHASE_CONF_MAX] = { + { 3, { LP8755_BUCK0, LP8755_BUCK3, LP8755_BUCK5 } }, + { 6, { LP8755_BUCK0, LP8755_BUCK1, LP8755_BUCK2, LP8755_BUCK3, + LP8755_BUCK4, LP8755_BUCK5 } }, + { 5, { LP8755_BUCK0, LP8755_BUCK2, LP8755_BUCK3, LP8755_BUCK4, + LP8755_BUCK5} }, + { 4, { LP8755_BUCK0, LP8755_BUCK3, LP8755_BUCK4, LP8755_BUCK5} }, + { 3, { LP8755_BUCK0, LP8755_BUCK4, LP8755_BUCK5} }, + { 2, { LP8755_BUCK0, LP8755_BUCK5} }, + { 1, { LP8755_BUCK0} }, + { 2, { LP8755_BUCK0, LP8755_BUCK3} }, + { 4, { LP8755_BUCK0, LP8755_BUCK2, LP8755_BUCK3, LP8755_BUCK5} }, +}; + +static int lp8755_init_data(struct lp8755_chip *pchip) +{ + unsigned int regval; + int ret, icnt, buck_num; + struct lp8755_platform_data *pdata = pchip->pdata; + + /* read back muti-phase configuration */ + ret = regmap_read(pchip->regmap, 0x3D, ®val); + if (ret < 0) + goto out_i2c_error; + pchip->mphase = regval & 0x0F; + + /* set default data based on multi-phase config */ + for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) { + buck_num = mphase_buck[pchip->mphase].buck_num[icnt]; + pdata->buck_data[buck_num] = &lp8755_reg_default[buck_num]; + } + return ret; + +out_i2c_error: + dev_err(pchip->dev, "i2c access error %s\n", __func__); + return ret; +} + +#define lp8755_buck_desc(_id)\ +{\ + .name = lp8755_rail(_id),\ + .id = LP8755_BUCK##_id,\ + .ops = &lp8755_buck_ops,\ + .n_voltages = LP8755_BUCK_LINEAR_OUT_MAX+1,\ + .uV_step = 10000,\ + .min_uV = 500000,\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .enable_reg = LP8755_REG_BUCK##_id,\ + .enable_mask = LP8755_BUCK_EN_M,\ + .vsel_reg = LP8755_REG_BUCK##_id,\ + .vsel_mask = LP8755_BUCK_VOUT_M,\ + .ramp_reg = (LP8755_BUCK##_id) + 0x7,\ + .ramp_mask = 0x7,\ + .ramp_delay_table = lp8755_buck_ramp_table,\ + .n_ramp_values = ARRAY_SIZE(lp8755_buck_ramp_table),\ +} + +static const struct regulator_desc lp8755_regulators[] = { + lp8755_buck_desc(0), + lp8755_buck_desc(1), + lp8755_buck_desc(2), + lp8755_buck_desc(3), + lp8755_buck_desc(4), + lp8755_buck_desc(5), +}; + +static int lp8755_regulator_init(struct lp8755_chip *pchip) +{ + int ret, icnt, buck_num; + struct lp8755_platform_data *pdata = pchip->pdata; + struct regulator_config rconfig = { }; + + rconfig.regmap = pchip->regmap; + rconfig.dev = pchip->dev; + rconfig.driver_data = pchip; + + for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) { + buck_num = mphase_buck[pchip->mphase].buck_num[icnt]; + rconfig.init_data = pdata->buck_data[buck_num]; + rconfig.of_node = pchip->dev->of_node; + pchip->rdev[buck_num] = + devm_regulator_register(pchip->dev, + &lp8755_regulators[buck_num], &rconfig); + if (IS_ERR(pchip->rdev[buck_num])) { + ret = PTR_ERR(pchip->rdev[buck_num]); + pchip->rdev[buck_num] = NULL; + dev_err(pchip->dev, "regulator init failed: buck %d\n", + buck_num); + return ret; + } + } + + return 0; +} + +static irqreturn_t lp8755_irq_handler(int irq, void *data) +{ + int ret, icnt; + unsigned int flag0, flag1; + struct lp8755_chip *pchip = data; + + /* read flag0 register */ + ret = regmap_read(pchip->regmap, 0x0D, &flag0); + if (ret < 0) + goto err_i2c; + /* clear flag register to pull up int. pin */ + ret = regmap_write(pchip->regmap, 0x0D, 0x00); + if (ret < 0) + goto err_i2c; + + /* sent power fault detection event to specific regulator */ + for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) + if ((flag0 & (0x4 << icnt)) + && (pchip->irqmask & (0x04 << icnt)) + && (pchip->rdev[icnt] != NULL)) { + regulator_notifier_call_chain(pchip->rdev[icnt], + LP8755_EVENT_PWR_FAULT, + NULL); + } + + /* read flag1 register */ + ret = regmap_read(pchip->regmap, 0x0E, &flag1); + if (ret < 0) + goto err_i2c; + /* clear flag register to pull up int. pin */ + ret = regmap_write(pchip->regmap, 0x0E, 0x00); + if (ret < 0) + goto err_i2c; + + /* send OCP event to all regulator devices */ + if ((flag1 & 0x01) && (pchip->irqmask & 0x01)) + for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) + if (pchip->rdev[icnt] != NULL) { + regulator_notifier_call_chain(pchip->rdev[icnt], + LP8755_EVENT_OCP, + NULL); + } + + /* send OVP event to all regulator devices */ + if ((flag1 & 0x02) && (pchip->irqmask & 0x02)) + for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) + if (pchip->rdev[icnt] != NULL) { + regulator_notifier_call_chain(pchip->rdev[icnt], + LP8755_EVENT_OVP, + NULL); + } + return IRQ_HANDLED; + +err_i2c: + dev_err(pchip->dev, "i2c access error %s\n", __func__); + return IRQ_NONE; +} + +static int lp8755_int_config(struct lp8755_chip *pchip) +{ + int ret; + unsigned int regval; + + if (pchip->irq == 0) { + dev_warn(pchip->dev, "not use interrupt : %s\n", __func__); + return 0; + } + + ret = regmap_read(pchip->regmap, 0x0F, ®val); + if (ret < 0) { + dev_err(pchip->dev, "i2c access error %s\n", __func__); + return ret; + } + + pchip->irqmask = regval; + return devm_request_threaded_irq(pchip->dev, pchip->irq, NULL, + lp8755_irq_handler, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + "lp8755-irq", pchip); +} + +static const struct regmap_config lp8755_regmap = { + .reg_bits = 8, + .val_bits = 8, + .max_register = LP8755_REG_MAX, +}; + +static int lp8755_probe(struct i2c_client *client) +{ + int ret, icnt; + struct lp8755_chip *pchip; + struct lp8755_platform_data *pdata = dev_get_platdata(&client->dev); + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + dev_err(&client->dev, "i2c functionality check fail.\n"); + return -EOPNOTSUPP; + } + + pchip = devm_kzalloc(&client->dev, + sizeof(struct lp8755_chip), GFP_KERNEL); + if (!pchip) + return -ENOMEM; + + pchip->dev = &client->dev; + pchip->regmap = devm_regmap_init_i2c(client, &lp8755_regmap); + if (IS_ERR(pchip->regmap)) { + ret = PTR_ERR(pchip->regmap); + dev_err(&client->dev, "fail to allocate regmap %d\n", ret); + return ret; + } + i2c_set_clientdata(client, pchip); + + if (pdata != NULL) { + pchip->pdata = pdata; + pchip->mphase = pdata->mphase; + } else { + pchip->pdata = devm_kzalloc(pchip->dev, + sizeof(struct lp8755_platform_data), + GFP_KERNEL); + if (!pchip->pdata) + return -ENOMEM; + ret = lp8755_init_data(pchip); + if (ret < 0) { + dev_err(&client->dev, "fail to initialize chip\n"); + return ret; + } + } + + ret = lp8755_regulator_init(pchip); + if (ret < 0) { + dev_err(&client->dev, "fail to initialize regulators\n"); + goto err; + } + + pchip->irq = client->irq; + ret = lp8755_int_config(pchip); + if (ret < 0) { + dev_err(&client->dev, "fail to irq config\n"); + goto err; + } + + return ret; + +err: + /* output disable */ + for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) + regmap_write(pchip->regmap, icnt, 0x00); + + return ret; +} + +static void lp8755_remove(struct i2c_client *client) +{ + int icnt; + struct lp8755_chip *pchip = i2c_get_clientdata(client); + + for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) + regmap_write(pchip->regmap, icnt, 0x00); +} + +static const struct i2c_device_id lp8755_id[] = { + { .name = LP8755_NAME }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, lp8755_id); + +static struct i2c_driver lp8755_i2c_driver = { + .driver = { + .name = LP8755_NAME, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = lp8755_probe, + .remove = lp8755_remove, + .id_table = lp8755_id, +}; + +static int __init lp8755_init(void) +{ + return i2c_add_driver(&lp8755_i2c_driver); +} + +subsys_initcall(lp8755_init); + +static void __exit lp8755_exit(void) +{ + i2c_del_driver(&lp8755_i2c_driver); +} + +module_exit(lp8755_exit); + +MODULE_DESCRIPTION("Texas Instruments lp8755 driver"); +MODULE_AUTHOR("Daniel Jeong "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c new file mode 100644 index 000000000..34e7a5d32 --- /dev/null +++ b/drivers/regulator/lp87565-regulator.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for LP87565 PMIC + * + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include + +#include + +enum LP87565_regulator_id { + /* BUCK's */ + LP87565_BUCK_0, + LP87565_BUCK_1, + LP87565_BUCK_2, + LP87565_BUCK_3, + LP87565_BUCK_10, + LP87565_BUCK_23, + LP87565_BUCK_3210, +}; + +#define LP87565_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, \ + _er, _em, _ev, _delay, _lr, _cr) \ + [_id] = { \ + .desc = { \ + .name = _name, \ + .supply_name = _of "-in", \ + .id = _id, \ + .of_match = _of, \ + .regulators_node = "regulators", \ + .ops = &_ops, \ + .n_voltages = _n, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .enable_val = _ev, \ + .ramp_delay = _delay, \ + .linear_ranges = _lr, \ + .n_linear_ranges = ARRAY_SIZE(_lr), \ + .curr_table = lp87565_buck_uA, \ + .n_current_limits = ARRAY_SIZE(lp87565_buck_uA),\ + .csel_reg = (_cr), \ + .csel_mask = LP87565_BUCK_CTRL_2_ILIM, \ + }, \ + .ctrl2_reg = _cr, \ + } + +struct lp87565_regulator { + struct regulator_desc desc; + unsigned int ctrl2_reg; +}; + +static const struct lp87565_regulator regulators[]; + +static const struct linear_range buck0_1_2_3_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0xA, 0x17, 10000), + REGULATOR_LINEAR_RANGE(735000, 0x18, 0x9d, 5000), + REGULATOR_LINEAR_RANGE(1420000, 0x9e, 0xff, 20000), +}; + +static const unsigned int lp87565_buck_ramp_delay[] = { + 30000, 15000, 10000, 7500, 3800, 1900, 940, 470 +}; + +/* LP87565 BUCK current limit */ +static const unsigned int lp87565_buck_uA[] = { + 1500000, 2000000, 2500000, 3000000, 3500000, 4000000, 4500000, 5000000, +}; + +static int lp87565_buck_set_ramp_delay(struct regulator_dev *rdev, + int ramp_delay) +{ + int id = rdev_get_id(rdev); + unsigned int reg; + int ret; + + if (ramp_delay <= 470) + reg = 7; + else if (ramp_delay <= 940) + reg = 6; + else if (ramp_delay <= 1900) + reg = 5; + else if (ramp_delay <= 3800) + reg = 4; + else if (ramp_delay <= 7500) + reg = 3; + else if (ramp_delay <= 10000) + reg = 2; + else if (ramp_delay <= 15000) + reg = 1; + else + reg = 0; + + ret = regmap_update_bits(rdev->regmap, regulators[id].ctrl2_reg, + LP87565_BUCK_CTRL_2_SLEW_RATE, + FIELD_PREP(LP87565_BUCK_CTRL_2_SLEW_RATE, reg)); + if (ret) { + dev_err(&rdev->dev, "SLEW RATE write failed: %d\n", ret); + return ret; + } + + rdev->constraints->ramp_delay = lp87565_buck_ramp_delay[reg]; + + /* Conservatively give a 15% margin */ + rdev->constraints->ramp_delay = + rdev->constraints->ramp_delay * 85 / 100; + + return 0; +} + +/* Operations permitted on BUCKs */ +static const struct regulator_ops lp87565_buck_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = lp87565_buck_set_ramp_delay, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static const struct lp87565_regulator regulators[] = { + LP87565_REGULATOR("BUCK0", LP87565_BUCK_0, "buck0", lp87565_buck_ops, + 256, LP87565_REG_BUCK0_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK0_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL, + LP87565_BUCK_CTRL_1_EN, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2), + LP87565_REGULATOR("BUCK1", LP87565_BUCK_1, "buck1", lp87565_buck_ops, + 256, LP87565_REG_BUCK1_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK1_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL, + LP87565_BUCK_CTRL_1_EN, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK1_CTRL_2), + LP87565_REGULATOR("BUCK2", LP87565_BUCK_2, "buck2", lp87565_buck_ops, + 256, LP87565_REG_BUCK2_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK2_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL, + LP87565_BUCK_CTRL_1_EN, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2), + LP87565_REGULATOR("BUCK3", LP87565_BUCK_3, "buck3", lp87565_buck_ops, + 256, LP87565_REG_BUCK3_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK3_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL, + LP87565_BUCK_CTRL_1_EN, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK3_CTRL_2), + LP87565_REGULATOR("BUCK10", LP87565_BUCK_10, "buck10", lp87565_buck_ops, + 256, LP87565_REG_BUCK0_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK0_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL | + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2), + LP87565_REGULATOR("BUCK23", LP87565_BUCK_23, "buck23", lp87565_buck_ops, + 256, LP87565_REG_BUCK2_VOUT, LP87565_BUCK_VSET, + LP87565_REG_BUCK2_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL, + LP87565_BUCK_CTRL_1_EN, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2), + LP87565_REGULATOR("BUCK3210", LP87565_BUCK_3210, "buck3210", + lp87565_buck_ops, 256, LP87565_REG_BUCK0_VOUT, + LP87565_BUCK_VSET, LP87565_REG_BUCK0_CTRL_1, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_EN_PIN_CTRL | + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, + LP87565_BUCK_CTRL_1_EN | + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230, + buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2), +}; + +static int lp87565_regulator_probe(struct platform_device *pdev) +{ + struct lp87565 *lp87565 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i, min_idx, max_idx; + + platform_set_drvdata(pdev, lp87565); + + config.dev = &pdev->dev; + config.dev->of_node = lp87565->dev->of_node; + config.driver_data = lp87565; + config.regmap = lp87565->regmap; + + switch (lp87565->dev_type) { + case LP87565_DEVICE_TYPE_LP87565_Q1: + min_idx = LP87565_BUCK_10; + max_idx = LP87565_BUCK_23; + break; + case LP87565_DEVICE_TYPE_LP87561_Q1: + min_idx = LP87565_BUCK_3210; + max_idx = LP87565_BUCK_3210; + break; + default: + min_idx = LP87565_BUCK_0; + max_idx = LP87565_BUCK_3; + break; + } + + for (i = min_idx; i <= max_idx; i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(lp87565->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id lp87565_regulator_id_table[] = { + { .name = "lp87565-regulator" }, + { .name = "lp87565-q1-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, lp87565_regulator_id_table); + +static struct platform_driver lp87565_regulator_driver = { + .driver = { + .name = "lp87565-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = lp87565_regulator_probe, + .id_table = lp87565_regulator_id_table, +}; +module_platform_driver(lp87565_regulator_driver); + +MODULE_AUTHOR("J Keerthy "); +MODULE_DESCRIPTION("LP87565 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/lp8788-buck.c b/drivers/regulator/lp8788-buck.c new file mode 100644 index 000000000..2ade249ab --- /dev/null +++ b/drivers/regulator/lp8788-buck.c @@ -0,0 +1,541 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * TI LP8788 MFD - buck regulator driver + * + * Copyright 2012 Texas Instruments + * + * Author: Milo(Woogyom) Kim + */ + +#include +#include +#include +#include +#include +#include +#include + +/* register address */ +#define LP8788_EN_BUCK 0x0C +#define LP8788_BUCK_DVS_SEL 0x1D +#define LP8788_BUCK1_VOUT0 0x1E +#define LP8788_BUCK1_VOUT1 0x1F +#define LP8788_BUCK1_VOUT2 0x20 +#define LP8788_BUCK1_VOUT3 0x21 +#define LP8788_BUCK2_VOUT0 0x22 +#define LP8788_BUCK2_VOUT1 0x23 +#define LP8788_BUCK2_VOUT2 0x24 +#define LP8788_BUCK2_VOUT3 0x25 +#define LP8788_BUCK3_VOUT 0x26 +#define LP8788_BUCK4_VOUT 0x27 +#define LP8788_BUCK1_TIMESTEP 0x28 +#define LP8788_BUCK_PWM 0x2D + +/* mask/shift bits */ +#define LP8788_EN_BUCK1_M BIT(0) /* Addr 0Ch */ +#define LP8788_EN_BUCK2_M BIT(1) +#define LP8788_EN_BUCK3_M BIT(2) +#define LP8788_EN_BUCK4_M BIT(3) +#define LP8788_BUCK1_DVS_SEL_M 0x04 /* Addr 1Dh */ +#define LP8788_BUCK1_DVS_M 0x03 +#define LP8788_BUCK1_DVS_S 0 +#define LP8788_BUCK2_DVS_SEL_M 0x40 +#define LP8788_BUCK2_DVS_M 0x30 +#define LP8788_BUCK2_DVS_S 4 +#define LP8788_BUCK1_DVS_I2C BIT(2) +#define LP8788_BUCK2_DVS_I2C BIT(6) +#define LP8788_BUCK1_DVS_PIN (0 << 2) +#define LP8788_BUCK2_DVS_PIN (0 << 6) +#define LP8788_VOUT_M 0x1F /* Addr 1Eh ~ 27h */ +#define LP8788_STARTUP_TIME_M 0xF8 /* Addr 28h ~ 2Bh */ +#define LP8788_STARTUP_TIME_S 3 +#define LP8788_FPWM_BUCK1_M BIT(0) /* Addr 2Dh */ +#define LP8788_FPWM_BUCK1_S 0 +#define LP8788_FPWM_BUCK2_M BIT(1) +#define LP8788_FPWM_BUCK2_S 1 +#define LP8788_FPWM_BUCK3_M BIT(2) +#define LP8788_FPWM_BUCK3_S 2 +#define LP8788_FPWM_BUCK4_M BIT(3) +#define LP8788_FPWM_BUCK4_S 3 + +#define INVALID_ADDR 0xFF +#define LP8788_FORCE_PWM 1 +#define LP8788_AUTO_PWM 0 +#define PIN_LOW 0 +#define PIN_HIGH 1 +#define ENABLE_TIME_USEC 32 + +#define BUCK_FPWM_MASK(x) (1 << (x)) +#define BUCK_FPWM_SHIFT(x) (x) + +enum lp8788_dvs_state { + DVS_LOW = 0, + DVS_HIGH = 1, +}; + +enum lp8788_dvs_mode { + REGISTER, + EXTPIN, +}; + +enum lp8788_buck_id { + BUCK1, + BUCK2, + BUCK3, + BUCK4, +}; + +struct lp8788_buck { + struct lp8788 *lp; + struct regulator_dev *regulator; + void *dvs; + struct gpio_desc *gpio1; + struct gpio_desc *gpio2; /* Only used on BUCK2 */ +}; + +/* BUCK 1 ~ 4 voltage ranges */ +static const struct linear_range buck_volt_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0, 0), + REGULATOR_LINEAR_RANGE(800000, 1, 25, 50000), +}; + +static void lp8788_buck1_set_dvs(struct lp8788_buck *buck) +{ + struct lp8788_buck1_dvs *dvs = (struct lp8788_buck1_dvs *)buck->dvs; + enum lp8788_dvs_state pinstate; + + if (!dvs) + return; + + pinstate = dvs->vsel == DVS_SEL_V0 ? DVS_LOW : DVS_HIGH; + gpiod_set_value(buck->gpio1, pinstate); +} + +static void lp8788_buck2_set_dvs(struct lp8788_buck *buck) +{ + struct lp8788_buck2_dvs *dvs = (struct lp8788_buck2_dvs *)buck->dvs; + enum lp8788_dvs_state pin1, pin2; + + if (!dvs) + return; + + switch (dvs->vsel) { + case DVS_SEL_V0: + pin1 = DVS_LOW; + pin2 = DVS_LOW; + break; + case DVS_SEL_V1: + pin1 = DVS_HIGH; + pin2 = DVS_LOW; + break; + case DVS_SEL_V2: + pin1 = DVS_LOW; + pin2 = DVS_HIGH; + break; + case DVS_SEL_V3: + pin1 = DVS_HIGH; + pin2 = DVS_HIGH; + break; + default: + return; + } + + gpiod_set_value(buck->gpio1, pin1); + gpiod_set_value(buck->gpio2, pin2); +} + +static void lp8788_set_dvs(struct lp8788_buck *buck, enum lp8788_buck_id id) +{ + switch (id) { + case BUCK1: + lp8788_buck1_set_dvs(buck); + break; + case BUCK2: + lp8788_buck2_set_dvs(buck); + break; + default: + break; + } +} + +static enum lp8788_dvs_mode +lp8788_get_buck_dvs_ctrl_mode(struct lp8788_buck *buck, enum lp8788_buck_id id) +{ + u8 val, mask; + + switch (id) { + case BUCK1: + mask = LP8788_BUCK1_DVS_SEL_M; + break; + case BUCK2: + mask = LP8788_BUCK2_DVS_SEL_M; + break; + default: + return REGISTER; + } + + lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val); + + return val & mask ? REGISTER : EXTPIN; +} + +static bool lp8788_is_valid_buck_addr(u8 addr) +{ + switch (addr) { + case LP8788_BUCK1_VOUT0: + case LP8788_BUCK1_VOUT1: + case LP8788_BUCK1_VOUT2: + case LP8788_BUCK1_VOUT3: + case LP8788_BUCK2_VOUT0: + case LP8788_BUCK2_VOUT1: + case LP8788_BUCK2_VOUT2: + case LP8788_BUCK2_VOUT3: + return true; + default: + return false; + } +} + +static u8 lp8788_select_buck_vout_addr(struct lp8788_buck *buck, + enum lp8788_buck_id id) +{ + enum lp8788_dvs_mode mode = lp8788_get_buck_dvs_ctrl_mode(buck, id); + u8 val, idx, addr; + int pin1, pin2; + + switch (id) { + case BUCK1: + if (mode == EXTPIN) { + idx = gpiod_get_value(buck->gpio1); + } else { + lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val); + idx = (val & LP8788_BUCK1_DVS_M) >> LP8788_BUCK1_DVS_S; + } + addr = LP8788_BUCK1_VOUT0 + idx; + break; + case BUCK2: + if (mode == EXTPIN) { + pin1 = gpiod_get_value(buck->gpio1); + pin2 = gpiod_get_value(buck->gpio2); + + if (pin1 == PIN_LOW && pin2 == PIN_LOW) + idx = 0; + else if (pin1 == PIN_LOW && pin2 == PIN_HIGH) + idx = 2; + else if (pin1 == PIN_HIGH && pin2 == PIN_LOW) + idx = 1; + else + idx = 3; + } else { + lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val); + idx = (val & LP8788_BUCK2_DVS_M) >> LP8788_BUCK2_DVS_S; + } + addr = LP8788_BUCK2_VOUT0 + idx; + break; + default: + goto err; + } + + return addr; +err: + return INVALID_ADDR; +} + +static int lp8788_buck12_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct lp8788_buck *buck = rdev_get_drvdata(rdev); + enum lp8788_buck_id id = rdev_get_id(rdev); + u8 addr; + + if (buck->dvs) + lp8788_set_dvs(buck, id); + + addr = lp8788_select_buck_vout_addr(buck, id); + if (!lp8788_is_valid_buck_addr(addr)) + return -EINVAL; + + return lp8788_update_bits(buck->lp, addr, LP8788_VOUT_M, selector); +} + +static int lp8788_buck12_get_voltage_sel(struct regulator_dev *rdev) +{ + struct lp8788_buck *buck = rdev_get_drvdata(rdev); + enum lp8788_buck_id id = rdev_get_id(rdev); + int ret; + u8 val, addr; + + addr = lp8788_select_buck_vout_addr(buck, id); + if (!lp8788_is_valid_buck_addr(addr)) + return -EINVAL; + + ret = lp8788_read_byte(buck->lp, addr, &val); + if (ret) + return ret; + + return val & LP8788_VOUT_M; +} + +static int lp8788_buck_enable_time(struct regulator_dev *rdev) +{ + struct lp8788_buck *buck = rdev_get_drvdata(rdev); + enum lp8788_buck_id id = rdev_get_id(rdev); + u8 val, addr = LP8788_BUCK1_TIMESTEP + id; + + if (lp8788_read_byte(buck->lp, addr, &val)) + return -EINVAL; + + val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; + + return ENABLE_TIME_USEC * val; +} + +static int lp8788_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct lp8788_buck *buck = rdev_get_drvdata(rdev); + enum lp8788_buck_id id = rdev_get_id(rdev); + u8 mask, val; + + mask = BUCK_FPWM_MASK(id); + switch (mode) { + case REGULATOR_MODE_FAST: + val = LP8788_FORCE_PWM << BUCK_FPWM_SHIFT(id); + break; + case REGULATOR_MODE_NORMAL: + val = LP8788_AUTO_PWM << BUCK_FPWM_SHIFT(id); + break; + default: + return -EINVAL; + } + + return lp8788_update_bits(buck->lp, LP8788_BUCK_PWM, mask, val); +} + +static unsigned int lp8788_buck_get_mode(struct regulator_dev *rdev) +{ + struct lp8788_buck *buck = rdev_get_drvdata(rdev); + enum lp8788_buck_id id = rdev_get_id(rdev); + u8 val; + int ret; + + ret = lp8788_read_byte(buck->lp, LP8788_BUCK_PWM, &val); + if (ret) + return ret; + + return val & BUCK_FPWM_MASK(id) ? + REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops lp8788_buck12_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = lp8788_buck12_set_voltage_sel, + .get_voltage_sel = lp8788_buck12_get_voltage_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp8788_buck_enable_time, + .set_mode = lp8788_buck_set_mode, + .get_mode = lp8788_buck_get_mode, +}; + +static const struct regulator_ops lp8788_buck34_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp8788_buck_enable_time, + .set_mode = lp8788_buck_set_mode, + .get_mode = lp8788_buck_get_mode, +}; + +static const struct regulator_desc lp8788_buck_desc[] = { + { + .name = "buck1", + .id = BUCK1, + .ops = &lp8788_buck12_ops, + .n_voltages = 26, + .linear_ranges = buck_volt_ranges, + .n_linear_ranges = ARRAY_SIZE(buck_volt_ranges), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_BUCK, + .enable_mask = LP8788_EN_BUCK1_M, + }, + { + .name = "buck2", + .id = BUCK2, + .ops = &lp8788_buck12_ops, + .n_voltages = 26, + .linear_ranges = buck_volt_ranges, + .n_linear_ranges = ARRAY_SIZE(buck_volt_ranges), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_BUCK, + .enable_mask = LP8788_EN_BUCK2_M, + }, + { + .name = "buck3", + .id = BUCK3, + .ops = &lp8788_buck34_ops, + .n_voltages = 26, + .linear_ranges = buck_volt_ranges, + .n_linear_ranges = ARRAY_SIZE(buck_volt_ranges), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_BUCK3_VOUT, + .vsel_mask = LP8788_VOUT_M, + .enable_reg = LP8788_EN_BUCK, + .enable_mask = LP8788_EN_BUCK3_M, + }, + { + .name = "buck4", + .id = BUCK4, + .ops = &lp8788_buck34_ops, + .n_voltages = 26, + .linear_ranges = buck_volt_ranges, + .n_linear_ranges = ARRAY_SIZE(buck_volt_ranges), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_BUCK4_VOUT, + .vsel_mask = LP8788_VOUT_M, + .enable_reg = LP8788_EN_BUCK, + .enable_mask = LP8788_EN_BUCK4_M, + }, +}; + +static int lp8788_dvs_gpio_request(struct platform_device *pdev, + struct lp8788_buck *buck, + enum lp8788_buck_id id) +{ + struct lp8788_platform_data *pdata = buck->lp->pdata; + struct device *dev = &pdev->dev; + + switch (id) { + case BUCK1: + buck->gpio1 = devm_gpiod_get(dev, "dvs", GPIOD_OUT_LOW); + if (IS_ERR(buck->gpio1)) + return PTR_ERR(buck->gpio1); + gpiod_set_consumer_name(buck->gpio1, "LP8788_B1_DVS"); + + buck->dvs = pdata->buck1_dvs; + break; + case BUCK2: + buck->gpio1 = devm_gpiod_get_index(dev, "dvs", 0, GPIOD_OUT_LOW); + if (IS_ERR(buck->gpio1)) + return PTR_ERR(buck->gpio1); + gpiod_set_consumer_name(buck->gpio1, "LP8788_B2_DVS1"); + + buck->gpio2 = devm_gpiod_get_index(dev, "dvs", 1, GPIOD_OUT_LOW); + if (IS_ERR(buck->gpio2)) + return PTR_ERR(buck->gpio2); + gpiod_set_consumer_name(buck->gpio2, "LP8788_B2_DVS2"); + + buck->dvs = pdata->buck2_dvs; + break; + default: + break; + } + + return 0; +} + +static int lp8788_init_dvs(struct platform_device *pdev, + struct lp8788_buck *buck, enum lp8788_buck_id id) +{ + struct lp8788_platform_data *pdata = buck->lp->pdata; + u8 mask[] = { LP8788_BUCK1_DVS_SEL_M, LP8788_BUCK2_DVS_SEL_M }; + u8 val[] = { LP8788_BUCK1_DVS_PIN, LP8788_BUCK2_DVS_PIN }; + u8 default_dvs_mode[] = { LP8788_BUCK1_DVS_I2C, LP8788_BUCK2_DVS_I2C }; + + /* no dvs for buck3, 4 */ + if (id > BUCK2) + return 0; + + /* no dvs platform data, then dvs will be selected by I2C registers */ + if (!pdata) + goto set_default_dvs_mode; + + if ((id == BUCK1 && !pdata->buck1_dvs) || + (id == BUCK2 && !pdata->buck2_dvs)) + goto set_default_dvs_mode; + + if (lp8788_dvs_gpio_request(pdev, buck, id)) + goto set_default_dvs_mode; + + return lp8788_update_bits(buck->lp, LP8788_BUCK_DVS_SEL, mask[id], + val[id]); + +set_default_dvs_mode: + return lp8788_update_bits(buck->lp, LP8788_BUCK_DVS_SEL, mask[id], + default_dvs_mode[id]); +} + +static int lp8788_buck_probe(struct platform_device *pdev) +{ + struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); + int id = pdev->id; + struct lp8788_buck *buck; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + int ret; + + if (id >= LP8788_NUM_BUCKS) + return -EINVAL; + + buck = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_buck), GFP_KERNEL); + if (!buck) + return -ENOMEM; + + buck->lp = lp; + + ret = lp8788_init_dvs(pdev, buck, id); + if (ret) + return ret; + + cfg.dev = pdev->dev.parent; + cfg.init_data = lp->pdata ? lp->pdata->buck_data[id] : NULL; + cfg.driver_data = buck; + cfg.regmap = lp->regmap; + + rdev = devm_regulator_register(&pdev->dev, &lp8788_buck_desc[id], &cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, "BUCK%d regulator register err = %d\n", + id + 1, ret); + return ret; + } + + buck->regulator = rdev; + platform_set_drvdata(pdev, buck); + + return 0; +} + +static struct platform_driver lp8788_buck_driver = { + .probe = lp8788_buck_probe, + .driver = { + .name = LP8788_DEV_BUCK, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init lp8788_buck_init(void) +{ + return platform_driver_register(&lp8788_buck_driver); +} +subsys_initcall(lp8788_buck_init); + +static void __exit lp8788_buck_exit(void) +{ + platform_driver_unregister(&lp8788_buck_driver); +} +module_exit(lp8788_buck_exit); + +MODULE_DESCRIPTION("TI LP8788 BUCK Driver"); +MODULE_AUTHOR("Milo Kim"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:lp8788-buck"); diff --git a/drivers/regulator/lp8788-ldo.c b/drivers/regulator/lp8788-ldo.c new file mode 100644 index 000000000..8e45b7b99 --- /dev/null +++ b/drivers/regulator/lp8788-ldo.c @@ -0,0 +1,640 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * TI LP8788 MFD - ldo regulator driver + * + * Copyright 2012 Texas Instruments + * + * Author: Milo(Woogyom) Kim + */ + +#include +#include +#include +#include +#include +#include +#include + +/* register address */ +#define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */ +#define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */ +#define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */ +#define LP8788_EN_SEL 0x10 +#define LP8788_DLDO1_VOUT 0x2E +#define LP8788_DLDO2_VOUT 0x2F +#define LP8788_DLDO3_VOUT 0x30 +#define LP8788_DLDO4_VOUT 0x31 +#define LP8788_DLDO5_VOUT 0x32 +#define LP8788_DLDO6_VOUT 0x33 +#define LP8788_DLDO7_VOUT 0x34 +#define LP8788_DLDO8_VOUT 0x35 +#define LP8788_DLDO9_VOUT 0x36 +#define LP8788_DLDO10_VOUT 0x37 +#define LP8788_DLDO11_VOUT 0x38 +#define LP8788_DLDO12_VOUT 0x39 +#define LP8788_ALDO1_VOUT 0x3A +#define LP8788_ALDO2_VOUT 0x3B +#define LP8788_ALDO3_VOUT 0x3C +#define LP8788_ALDO4_VOUT 0x3D +#define LP8788_ALDO5_VOUT 0x3E +#define LP8788_ALDO6_VOUT 0x3F +#define LP8788_ALDO7_VOUT 0x40 +#define LP8788_ALDO8_VOUT 0x41 +#define LP8788_ALDO9_VOUT 0x42 +#define LP8788_ALDO10_VOUT 0x43 +#define LP8788_DLDO1_TIMESTEP 0x44 + +/* mask/shift bits */ +#define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */ +#define LP8788_EN_DLDO2_M BIT(1) +#define LP8788_EN_DLDO3_M BIT(2) +#define LP8788_EN_DLDO4_M BIT(3) +#define LP8788_EN_DLDO5_M BIT(4) +#define LP8788_EN_DLDO6_M BIT(5) +#define LP8788_EN_DLDO7_M BIT(6) +#define LP8788_EN_DLDO8_M BIT(7) +#define LP8788_EN_DLDO9_M BIT(0) +#define LP8788_EN_DLDO10_M BIT(1) +#define LP8788_EN_DLDO11_M BIT(2) +#define LP8788_EN_DLDO12_M BIT(3) +#define LP8788_EN_ALDO1_M BIT(4) +#define LP8788_EN_ALDO2_M BIT(5) +#define LP8788_EN_ALDO3_M BIT(6) +#define LP8788_EN_ALDO4_M BIT(7) +#define LP8788_EN_ALDO5_M BIT(0) +#define LP8788_EN_ALDO6_M BIT(1) +#define LP8788_EN_ALDO7_M BIT(2) +#define LP8788_EN_ALDO8_M BIT(3) +#define LP8788_EN_ALDO9_M BIT(4) +#define LP8788_EN_ALDO10_M BIT(5) +#define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */ +#define LP8788_EN_SEL_DLDO7_M BIT(1) +#define LP8788_EN_SEL_ALDO7_M BIT(2) +#define LP8788_EN_SEL_ALDO5_M BIT(3) +#define LP8788_EN_SEL_ALDO234_M BIT(4) +#define LP8788_EN_SEL_ALDO1_M BIT(5) +#define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */ +#define LP8788_VOUT_4BIT_M 0x0F +#define LP8788_VOUT_3BIT_M 0x07 +#define LP8788_VOUT_1BIT_M 0x01 +#define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */ +#define LP8788_STARTUP_TIME_S 3 + +#define ENABLE_TIME_USEC 32 + +enum lp8788_ldo_id { + DLDO1, + DLDO2, + DLDO3, + DLDO4, + DLDO5, + DLDO6, + DLDO7, + DLDO8, + DLDO9, + DLDO10, + DLDO11, + DLDO12, + ALDO1, + ALDO2, + ALDO3, + ALDO4, + ALDO5, + ALDO6, + ALDO7, + ALDO8, + ALDO9, + ALDO10, +}; + +struct lp8788_ldo { + struct lp8788 *lp; + struct regulator_desc *desc; + struct regulator_dev *regulator; + struct gpio_desc *ena_gpiod; +}; + +/* DLDO 1, 2, 3, 9 voltage table */ +static const int lp8788_dldo1239_vtbl[] = { + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000, + 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, + 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, +}; + +/* DLDO 4 voltage table */ +static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 }; + +/* DLDO 5, 7, 8 and ALDO 6 voltage table */ +static const int lp8788_dldo578_aldo6_vtbl[] = { + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000, +}; + +/* DLDO 6 voltage table */ +static const int lp8788_dldo6_vtbl[] = { + 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000, +}; + +/* DLDO 10, 11 voltage table */ +static const int lp8788_dldo1011_vtbl[] = { + 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, + 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, +}; + +/* ALDO 1 voltage table */ +static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 }; + +/* ALDO 7 voltage table */ +static const int lp8788_aldo7_vtbl[] = { + 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, +}; + +static int lp8788_ldo_enable_time(struct regulator_dev *rdev) +{ + struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); + enum lp8788_ldo_id id = rdev_get_id(rdev); + u8 val, addr = LP8788_DLDO1_TIMESTEP + id; + + if (lp8788_read_byte(ldo->lp, addr, &val)) + return -EINVAL; + + val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; + + return ENABLE_TIME_USEC * val; +} + +static const struct regulator_ops lp8788_ldo_voltage_table_ops = { + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp8788_ldo_enable_time, +}; + +static const struct regulator_ops lp8788_ldo_voltage_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = lp8788_ldo_enable_time, +}; + +static const struct regulator_desc lp8788_dldo_desc[] = { + { + .name = "dldo1", + .id = DLDO1, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), + .volt_table = lp8788_dldo1239_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO1_VOUT, + .vsel_mask = LP8788_VOUT_5BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO1_M, + }, + { + .name = "dldo2", + .id = DLDO2, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), + .volt_table = lp8788_dldo1239_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO2_VOUT, + .vsel_mask = LP8788_VOUT_5BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO2_M, + }, + { + .name = "dldo3", + .id = DLDO3, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), + .volt_table = lp8788_dldo1239_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO3_VOUT, + .vsel_mask = LP8788_VOUT_5BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO3_M, + }, + { + .name = "dldo4", + .id = DLDO4, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl), + .volt_table = lp8788_dldo4_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO4_VOUT, + .vsel_mask = LP8788_VOUT_1BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO4_M, + }, + { + .name = "dldo5", + .id = DLDO5, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), + .volt_table = lp8788_dldo578_aldo6_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO5_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO5_M, + }, + { + .name = "dldo6", + .id = DLDO6, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl), + .volt_table = lp8788_dldo6_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO6_VOUT, + .vsel_mask = LP8788_VOUT_3BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO6_M, + }, + { + .name = "dldo7", + .id = DLDO7, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), + .volt_table = lp8788_dldo578_aldo6_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO7_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO7_M, + }, + { + .name = "dldo8", + .id = DLDO8, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), + .volt_table = lp8788_dldo578_aldo6_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO8_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_A, + .enable_mask = LP8788_EN_DLDO8_M, + }, + { + .name = "dldo9", + .id = DLDO9, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), + .volt_table = lp8788_dldo1239_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO9_VOUT, + .vsel_mask = LP8788_VOUT_5BIT_M, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_DLDO9_M, + }, + { + .name = "dldo10", + .id = DLDO10, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), + .volt_table = lp8788_dldo1011_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO10_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_DLDO10_M, + }, + { + .name = "dldo11", + .id = DLDO11, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), + .volt_table = lp8788_dldo1011_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_DLDO11_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_DLDO11_M, + }, + { + .name = "dldo12", + .id = DLDO12, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_DLDO12_M, + .min_uV = 2500000, + }, +}; + +static const struct regulator_desc lp8788_aldo_desc[] = { + { + .name = "aldo1", + .id = ALDO1, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl), + .volt_table = lp8788_aldo1_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_ALDO1_VOUT, + .vsel_mask = LP8788_VOUT_1BIT_M, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_ALDO1_M, + }, + { + .name = "aldo2", + .id = ALDO2, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_ALDO2_M, + .min_uV = 2850000, + }, + { + .name = "aldo3", + .id = ALDO3, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_ALDO3_M, + .min_uV = 2850000, + }, + { + .name = "aldo4", + .id = ALDO4, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_B, + .enable_mask = LP8788_EN_ALDO4_M, + .min_uV = 2850000, + }, + { + .name = "aldo5", + .id = ALDO5, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO5_M, + .min_uV = 2850000, + }, + { + .name = "aldo6", + .id = ALDO6, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), + .volt_table = lp8788_dldo578_aldo6_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_ALDO6_VOUT, + .vsel_mask = LP8788_VOUT_4BIT_M, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO6_M, + }, + { + .name = "aldo7", + .id = ALDO7, + .ops = &lp8788_ldo_voltage_table_ops, + .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl), + .volt_table = lp8788_aldo7_vtbl, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .vsel_reg = LP8788_ALDO7_VOUT, + .vsel_mask = LP8788_VOUT_3BIT_M, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO7_M, + }, + { + .name = "aldo8", + .id = ALDO8, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO8_M, + .min_uV = 2500000, + }, + { + .name = "aldo9", + .id = ALDO9, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO9_M, + .min_uV = 2500000, + }, + { + .name = "aldo10", + .id = ALDO10, + .ops = &lp8788_ldo_voltage_fixed_ops, + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = LP8788_EN_LDO_C, + .enable_mask = LP8788_EN_ALDO10_M, + .min_uV = 1100000, + }, +}; + +static int lp8788_config_ldo_enable_mode(struct platform_device *pdev, + struct lp8788_ldo *ldo, + enum lp8788_ldo_id id) +{ + struct lp8788 *lp = ldo->lp; + enum lp8788_ext_ldo_en_id enable_id; + static const u8 en_mask[] = { + [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M, + [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M, + [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M, + [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M, + [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M, + [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M, + }; + + switch (id) { + case DLDO7: + enable_id = EN_DLDO7; + break; + case DLDO9: + case DLDO11: + enable_id = EN_DLDO911; + break; + case ALDO1: + enable_id = EN_ALDO1; + break; + case ALDO2 ... ALDO4: + enable_id = EN_ALDO234; + break; + case ALDO5: + enable_id = EN_ALDO5; + break; + case ALDO7: + enable_id = EN_ALDO7; + break; + default: + return 0; + } + + /* + * Do not use devm* here: the regulator core takes over the + * lifecycle management of the GPIO descriptor. + * FIXME: check default mode for GPIO here: high or low? + */ + ldo->ena_gpiod = gpiod_get_index_optional(&pdev->dev, + "enable", + enable_id, + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(ldo->ena_gpiod)) + return PTR_ERR(ldo->ena_gpiod); + + /* if no GPIO for ldo pin, then set default enable mode */ + if (!ldo->ena_gpiod) + goto set_default_ldo_enable_mode; + + return 0; + +set_default_ldo_enable_mode: + return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0); +} + +static int lp8788_dldo_probe(struct platform_device *pdev) +{ + struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); + int id = pdev->id; + struct lp8788_ldo *ldo; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + int ret; + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->lp = lp; + ret = lp8788_config_ldo_enable_mode(pdev, ldo, id); + if (ret) + return ret; + + if (ldo->ena_gpiod) + cfg.ena_gpiod = ldo->ena_gpiod; + + cfg.dev = pdev->dev.parent; + cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; + cfg.driver_data = ldo; + cfg.regmap = lp->regmap; + + rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n", + id + 1, ret); + return ret; + } + + ldo->regulator = rdev; + platform_set_drvdata(pdev, ldo); + + return 0; +} + +static struct platform_driver lp8788_dldo_driver = { + .probe = lp8788_dldo_probe, + .driver = { + .name = LP8788_DEV_DLDO, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int lp8788_aldo_probe(struct platform_device *pdev) +{ + struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); + int id = pdev->id; + struct lp8788_ldo *ldo; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + int ret; + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->lp = lp; + ret = lp8788_config_ldo_enable_mode(pdev, ldo, id + ALDO1); + if (ret) + return ret; + + if (ldo->ena_gpiod) + cfg.ena_gpiod = ldo->ena_gpiod; + + cfg.dev = pdev->dev.parent; + cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; + cfg.driver_data = ldo; + cfg.regmap = lp->regmap; + + rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n", + id + 1, ret); + return ret; + } + + ldo->regulator = rdev; + platform_set_drvdata(pdev, ldo); + + return 0; +} + +static struct platform_driver lp8788_aldo_driver = { + .probe = lp8788_aldo_probe, + .driver = { + .name = LP8788_DEV_ALDO, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static struct platform_driver * const drivers[] = { + &lp8788_dldo_driver, + &lp8788_aldo_driver, +}; + +static int __init lp8788_ldo_init(void) +{ + return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); +} +subsys_initcall(lp8788_ldo_init); + +static void __exit lp8788_ldo_exit(void) +{ + platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); +} +module_exit(lp8788_ldo_exit); + +MODULE_DESCRIPTION("TI LP8788 LDO Driver"); +MODULE_AUTHOR("Milo Kim"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:lp8788-dldo"); +MODULE_ALIAS("platform:lp8788-aldo"); diff --git a/drivers/regulator/ltc3589.c b/drivers/regulator/ltc3589.c new file mode 100644 index 000000000..8bae5d8ae --- /dev/null +++ b/drivers/regulator/ltc3589.c @@ -0,0 +1,476 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Linear Technology LTC3589,LTC3589-1 regulator support +// +// Copyright (c) 2014 Philipp Zabel , Pengutronix + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "ltc3589" + +#define LTC3589_IRQSTAT 0x02 +#define LTC3589_SCR1 0x07 +#define LTC3589_OVEN 0x10 +#define LTC3589_SCR2 0x12 +#define LTC3589_PGSTAT 0x13 +#define LTC3589_VCCR 0x20 +#define LTC3589_CLIRQ 0x21 +#define LTC3589_B1DTV1 0x23 +#define LTC3589_B1DTV2 0x24 +#define LTC3589_VRRCR 0x25 +#define LTC3589_B2DTV1 0x26 +#define LTC3589_B2DTV2 0x27 +#define LTC3589_B3DTV1 0x29 +#define LTC3589_B3DTV2 0x2a +#define LTC3589_L2DTV1 0x32 +#define LTC3589_L2DTV2 0x33 + +#define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3) +#define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4) +#define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5) +#define LTC3589_IRQSTAT_THERMAL_WARN BIT(6) +#define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7) + +#define LTC3589_OVEN_SW1 BIT(0) +#define LTC3589_OVEN_SW2 BIT(1) +#define LTC3589_OVEN_SW3 BIT(2) +#define LTC3589_OVEN_BB_OUT BIT(3) +#define LTC3589_OVEN_LDO2 BIT(4) +#define LTC3589_OVEN_LDO3 BIT(5) +#define LTC3589_OVEN_LDO4 BIT(6) +#define LTC3589_OVEN_SW_CTRL BIT(7) + +#define LTC3589_VCCR_SW1_GO BIT(0) +#define LTC3589_VCCR_SW2_GO BIT(2) +#define LTC3589_VCCR_SW3_GO BIT(4) +#define LTC3589_VCCR_LDO2_GO BIT(6) + +#define LTC3589_VRRCR_SW1_RAMP_MASK GENMASK(1, 0) +#define LTC3589_VRRCR_SW2_RAMP_MASK GENMASK(3, 2) +#define LTC3589_VRRCR_SW3_RAMP_MASK GENMASK(5, 4) +#define LTC3589_VRRCR_LDO2_RAMP_MASK GENMASK(7, 6) + +enum ltc3589_reg { + LTC3589_SW1, + LTC3589_SW2, + LTC3589_SW3, + LTC3589_BB_OUT, + LTC3589_LDO1, + LTC3589_LDO2, + LTC3589_LDO3, + LTC3589_LDO4, + LTC3589_NUM_REGULATORS, +}; + +struct ltc3589_info { + const unsigned int *volt_table; + int fixed_uV; +}; + +struct ltc3589 { + struct regmap *regmap; + struct device *dev; + struct regulator_desc regulator_descs[LTC3589_NUM_REGULATORS]; + struct regulator_dev *regulators[LTC3589_NUM_REGULATORS]; +}; + +static const int ltc3589_ldo4[] = { + 2800000, 2500000, 1800000, 3300000, +}; + +static const int ltc3589_12_ldo4[] = { + 1200000, 1800000, 2500000, 3200000, +}; + +static const unsigned int ltc3589_ramp_table[] = { + 880, 1750, 3500, 7000 +}; + +static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); + int sel; + + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + /* DTV2 register follows right after the corresponding DTV1 register */ + return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1, + rdev->desc->vsel_mask, sel); +} + +static int ltc3589_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); + int mask, bit = 0; + + /* VCCR reference selects are right next to the VCCR go bits */ + mask = rdev->desc->apply_bit << 1; + + if (mode == REGULATOR_MODE_STANDBY) + bit = mask; /* Select DTV2 */ + + mask |= rdev->desc->apply_bit; + bit |= rdev->desc->apply_bit; + return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit); +} + +/* SW1, SW2, SW3, LDO2 */ +static const struct regulator_ops ltc3589_linear_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_voltage = ltc3589_set_suspend_voltage, + .set_suspend_mode = ltc3589_set_suspend_mode, +}; + +/* BB_OUT, LDO3 */ +static const struct regulator_ops ltc3589_fixed_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +/* LDO1 */ +static const struct regulator_ops ltc3589_fixed_standby_regulator_ops = { +}; + +/* LDO4 */ +static const struct regulator_ops ltc3589_table_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2) +{ + uint64_t tmp; + + if (uV == 0) + return 0; + + tmp = (uint64_t)uV * r1; + do_div(tmp, r2); + return uV + (unsigned int)tmp; +} + +static int ltc3589_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct ltc3589 *ltc3589 = config->driver_data; + struct regulator_desc *rdesc = <c3589->regulator_descs[desc->id]; + u32 r[2]; + int ret; + + /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */ + if (desc->id >= LTC3589_LDO3) + return 0; + + ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2); + if (ret) { + dev_err(ltc3589->dev, "Failed to parse voltage divider: %d\n", + ret); + return ret; + } + + if (!r[0] || !r[1]) + return 0; + + rdesc->min_uV = ltc3589_scale(desc->min_uV, r[0], r[1]); + rdesc->uV_step = ltc3589_scale(desc->uV_step, r[0], r[1]); + rdesc->fixed_uV = ltc3589_scale(desc->fixed_uV, r[0], r[1]); + + return 0; +} + +#define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask) \ + [LTC3589_ ## _name] = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_of_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = ltc3589_of_parse_cb, \ + .n_voltages = (dtv_mask) + 1, \ + .fixed_uV = (dtv_mask) ? 0 : 800000, \ + .ops = <c3589_ ## _ops ## _regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = LTC3589_ ## _name, \ + .owner = THIS_MODULE, \ + .vsel_reg = (dtv1_reg), \ + .vsel_mask = (dtv_mask), \ + .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \ + .enable_mask = (en_bit), \ + } + +#define LTC3589_LINEAR_REG(_name, _of_name, _dtv1) \ + [LTC3589_ ## _name] = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_of_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = ltc3589_of_parse_cb, \ + .n_voltages = 32, \ + .min_uV = 362500, \ + .uV_step = 12500, \ + .ramp_delay = 1750, \ + .ops = <c3589_linear_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = LTC3589_ ## _name, \ + .owner = THIS_MODULE, \ + .vsel_reg = LTC3589_ ## _dtv1, \ + .vsel_mask = 0x1f, \ + .apply_reg = LTC3589_VCCR, \ + .apply_bit = LTC3589_VCCR_ ## _name ## _GO, \ + .enable_reg = LTC3589_OVEN, \ + .enable_mask = (LTC3589_OVEN_ ## _name), \ + .ramp_reg = LTC3589_VRRCR, \ + .ramp_mask = LTC3589_VRRCR_ ## _name ## _RAMP_MASK, \ + .ramp_delay_table = ltc3589_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(ltc3589_ramp_table), \ + } + + +#define LTC3589_FIXED_REG(_name, _of_name) \ + LTC3589_REG(_name, _of_name, fixed, LTC3589_OVEN_ ## _name, 0, 0) + +static const struct regulator_desc ltc3589_regulators[] = { + LTC3589_LINEAR_REG(SW1, sw1, B1DTV1), + LTC3589_LINEAR_REG(SW2, sw2, B2DTV1), + LTC3589_LINEAR_REG(SW3, sw3, B3DTV1), + LTC3589_FIXED_REG(BB_OUT, bb-out), + LTC3589_REG(LDO1, ldo1, fixed_standby, 0, 0, 0), + LTC3589_LINEAR_REG(LDO2, ldo2, L2DTV1), + LTC3589_FIXED_REG(LDO3, ldo3), + LTC3589_REG(LDO4, ldo4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60), +}; + +static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case LTC3589_IRQSTAT: + case LTC3589_SCR1: + case LTC3589_OVEN: + case LTC3589_SCR2: + case LTC3589_VCCR: + case LTC3589_CLIRQ: + case LTC3589_B1DTV1: + case LTC3589_B1DTV2: + case LTC3589_VRRCR: + case LTC3589_B2DTV1: + case LTC3589_B2DTV2: + case LTC3589_B3DTV1: + case LTC3589_B3DTV2: + case LTC3589_L2DTV1: + case LTC3589_L2DTV2: + return true; + } + return false; +} + +static bool ltc3589_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case LTC3589_IRQSTAT: + case LTC3589_SCR1: + case LTC3589_OVEN: + case LTC3589_SCR2: + case LTC3589_PGSTAT: + case LTC3589_VCCR: + case LTC3589_B1DTV1: + case LTC3589_B1DTV2: + case LTC3589_VRRCR: + case LTC3589_B2DTV1: + case LTC3589_B2DTV2: + case LTC3589_B3DTV1: + case LTC3589_B3DTV2: + case LTC3589_L2DTV1: + case LTC3589_L2DTV2: + return true; + } + return false; +} + +static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case LTC3589_IRQSTAT: + case LTC3589_PGSTAT: + case LTC3589_VCCR: + return true; + } + return false; +} + +static const struct reg_default ltc3589_reg_defaults[] = { + { LTC3589_SCR1, 0x00 }, + { LTC3589_OVEN, 0x00 }, + { LTC3589_SCR2, 0x00 }, + { LTC3589_VCCR, 0x00 }, + { LTC3589_B1DTV1, 0x19 }, + { LTC3589_B1DTV2, 0x19 }, + { LTC3589_VRRCR, 0xff }, + { LTC3589_B2DTV1, 0x19 }, + { LTC3589_B2DTV2, 0x19 }, + { LTC3589_B3DTV1, 0x19 }, + { LTC3589_B3DTV2, 0x19 }, + { LTC3589_L2DTV1, 0x19 }, + { LTC3589_L2DTV2, 0x19 }, +}; + +static const struct regmap_config ltc3589_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = ltc3589_writeable_reg, + .readable_reg = ltc3589_readable_reg, + .volatile_reg = ltc3589_volatile_reg, + .max_register = LTC3589_L2DTV2, + .reg_defaults = ltc3589_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults), + .use_single_read = true, + .use_single_write = true, + .cache_type = REGCACHE_MAPLE, +}; + +static irqreturn_t ltc3589_isr(int irq, void *dev_id) +{ + struct ltc3589 *ltc3589 = dev_id; + unsigned int i, irqstat, event; + + regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat); + + if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) { + event = REGULATOR_EVENT_OVER_TEMP; + for (i = 0; i < LTC3589_NUM_REGULATORS; i++) + regulator_notifier_call_chain(ltc3589->regulators[i], + event, NULL); + } + + if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) { + event = REGULATOR_EVENT_UNDER_VOLTAGE; + for (i = 0; i < LTC3589_NUM_REGULATORS; i++) + regulator_notifier_call_chain(ltc3589->regulators[i], + event, NULL); + } + + /* Clear warning condition */ + regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0); + + return IRQ_HANDLED; +} + +static int ltc3589_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + const struct ltc3589_info *info; + struct regulator_desc *descs; + struct ltc3589 *ltc3589; + int i, ret; + + ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL); + if (!ltc3589) + return -ENOMEM; + + i2c_set_clientdata(client, ltc3589); + info = i2c_get_match_data(client); + ltc3589->dev = dev; + + descs = ltc3589->regulator_descs; + memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators)); + descs[LTC3589_LDO3].fixed_uV = info->fixed_uV; + descs[LTC3589_LDO4].volt_table = info->volt_table; + + ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config); + if (IS_ERR(ltc3589->regmap)) { + ret = PTR_ERR(ltc3589->regmap); + dev_err(dev, "failed to initialize regmap: %d\n", ret); + return ret; + } + + for (i = 0; i < LTC3589_NUM_REGULATORS; i++) { + struct regulator_desc *desc = <c3589->regulator_descs[i]; + struct regulator_config config = { }; + + config.dev = dev; + config.driver_data = ltc3589; + + ltc3589->regulators[i] = devm_regulator_register(dev, desc, + &config); + if (IS_ERR(ltc3589->regulators[i])) { + ret = PTR_ERR(ltc3589->regulators[i]); + dev_err(dev, "failed to register regulator %s: %d\n", + desc->name, ret); + return ret; + } + } + + if (client->irq) { + ret = devm_request_threaded_irq(dev, client->irq, NULL, + ltc3589_isr, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + client->name, ltc3589); + if (ret) { + dev_err(dev, "Failed to request IRQ: %d\n", ret); + return ret; + } + } + + return 0; +} + +static const struct ltc3589_info ltc3589_info = { + .fixed_uV = 1800000, + .volt_table = ltc3589_ldo4, +}; + +static const struct ltc3589_info ltc3589_12_info = { + .fixed_uV = 2800000, + .volt_table = ltc3589_12_ldo4, +}; + +static const struct i2c_device_id ltc3589_i2c_id[] = { + { .name = "ltc3589", .driver_data = (kernel_ulong_t)<c3589_info }, + { .name = "ltc3589-1", .driver_data = (kernel_ulong_t)<c3589_12_info }, + { .name = "ltc3589-2", .driver_data = (kernel_ulong_t)<c3589_12_info }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id); + +static const struct of_device_id __maybe_unused ltc3589_of_match[] = { + { .compatible = "lltc,ltc3589", .data = <c3589_info }, + { .compatible = "lltc,ltc3589-1", .data = <c3589_12_info }, + { .compatible = "lltc,ltc3589-2", .data = <c3589_12_info }, + { } +}; +MODULE_DEVICE_TABLE(of, ltc3589_of_match); + +static struct i2c_driver ltc3589_driver = { + .driver = { + .name = DRIVER_NAME, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(ltc3589_of_match), + }, + .probe = ltc3589_probe, + .id_table = ltc3589_i2c_id, +}; +module_i2c_driver(ltc3589_driver); + +MODULE_AUTHOR("Philipp Zabel "); +MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/ltc3676.c b/drivers/regulator/ltc3676.c new file mode 100644 index 000000000..307c6f7a1 --- /dev/null +++ b/drivers/regulator/ltc3676.c @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2016 Gateworks Corporation, Inc. All Rights Reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "ltc3676" + +/* LTC3676 Registers */ +#define LTC3676_BUCK1 0x01 +#define LTC3676_BUCK2 0x02 +#define LTC3676_BUCK3 0x03 +#define LTC3676_BUCK4 0x04 +#define LTC3676_LDOA 0x05 +#define LTC3676_LDOB 0x06 +#define LTC3676_SQD1 0x07 +#define LTC3676_SQD2 0x08 +#define LTC3676_CNTRL 0x09 +#define LTC3676_DVB1A 0x0A +#define LTC3676_DVB1B 0x0B +#define LTC3676_DVB2A 0x0C +#define LTC3676_DVB2B 0x0D +#define LTC3676_DVB3A 0x0E +#define LTC3676_DVB3B 0x0F +#define LTC3676_DVB4A 0x10 +#define LTC3676_DVB4B 0x11 +#define LTC3676_MSKIRQ 0x12 +#define LTC3676_MSKPG 0x13 +#define LTC3676_USER 0x14 +#define LTC3676_IRQSTAT 0x15 +#define LTC3676_PGSTATL 0x16 +#define LTC3676_PGSTATRT 0x17 +#define LTC3676_HRST 0x1E +#define LTC3676_CLIRQ 0x1F + +#define LTC3676_DVBxA_REF_SELECT BIT(5) +#define LTC3676_DVBxB_PGOOD_MASK BIT(5) + +#define LTC3676_IRQSTAT_PGOOD_TIMEOUT BIT(2) +#define LTC3676_IRQSTAT_UNDERVOLT_WARN BIT(3) +#define LTC3676_IRQSTAT_UNDERVOLT_FAULT BIT(4) +#define LTC3676_IRQSTAT_THERMAL_WARN BIT(5) +#define LTC3676_IRQSTAT_THERMAL_FAULT BIT(6) + +enum ltc3676_reg { + LTC3676_SW1, + LTC3676_SW2, + LTC3676_SW3, + LTC3676_SW4, + LTC3676_LDO1, + LTC3676_LDO2, + LTC3676_LDO3, + LTC3676_LDO4, + LTC3676_NUM_REGULATORS, +}; + +struct ltc3676 { + struct regmap *regmap; + struct device *dev; + struct regulator_desc regulator_descs[LTC3676_NUM_REGULATORS]; + struct regulator_dev *regulators[LTC3676_NUM_REGULATORS]; +}; + +static int ltc3676_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev); + struct device *dev = ltc3676->dev; + int dcdc = rdev_get_id(rdev); + int sel; + + dev_dbg(dev, "%s id=%d uV=%d\n", __func__, dcdc, uV); + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + /* DVBB register follows right after the corresponding DVBA register */ + return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1, + rdev->desc->vsel_mask, sel); +} + +static int ltc3676_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct ltc3676 *ltc3676= rdev_get_drvdata(rdev); + struct device *dev = ltc3676->dev; + int mask, val; + int dcdc = rdev_get_id(rdev); + + dev_dbg(dev, "%s id=%d mode=%d\n", __func__, dcdc, mode); + + mask = LTC3676_DVBxA_REF_SELECT; + switch (mode) { + case REGULATOR_MODE_STANDBY: + val = 0; /* select DVBxA */ + break; + case REGULATOR_MODE_NORMAL: + val = LTC3676_DVBxA_REF_SELECT; /* select DVBxB */ + break; + default: + dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", + rdev->desc->name, mode); + return -EINVAL; + } + + return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg, + mask, val); +} + +static int ltc3676_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) +{ + struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev); + struct device *dev = ltc3676->dev; + int ret, dcdc = rdev_get_id(rdev); + + dev_dbg(dev, "%s id=%d selector=%d\n", __func__, dcdc, selector); + + ret = regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1, + LTC3676_DVBxB_PGOOD_MASK, + LTC3676_DVBxB_PGOOD_MASK); + if (ret) + return ret; + + return regulator_set_voltage_sel_regmap(rdev, selector); +} + +static inline unsigned int ltc3676_scale(unsigned int uV, u32 r1, u32 r2) +{ + uint64_t tmp; + if (uV == 0) + return 0; + tmp = (uint64_t)uV * r1; + do_div(tmp, r2); + return uV + (unsigned int)tmp; +} + +static int ltc3676_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct ltc3676 *ltc3676 = config->driver_data; + struct regulator_desc *rdesc = <c3676->regulator_descs[desc->id]; + u32 r[2]; + int ret; + + /* LDO3 has a fixed output */ + if (desc->id == LTC3676_LDO3) + return 0; + + ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2); + if (ret) { + dev_err(ltc3676->dev, "Failed to parse voltage divider: %d\n", + ret); + return ret; + } + + rdesc->min_uV = ltc3676_scale(desc->min_uV, r[0], r[1]); + rdesc->uV_step = ltc3676_scale(desc->uV_step, r[0], r[1]); + rdesc->fixed_uV = ltc3676_scale(desc->fixed_uV, r[0], r[1]); + + return 0; +} + +/* SW1, SW2, SW3, SW4 linear 0.8V-3.3V with scalar via R1/R2 feeback res */ +static const struct regulator_ops ltc3676_linear_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = ltc3676_set_voltage_sel, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_suspend_voltage = ltc3676_set_suspend_voltage, + .set_suspend_mode = ltc3676_set_suspend_mode, +}; + +/* LDO1 always on fixed 0.8V-3.3V via scalar via R1/R2 feeback res */ +static const struct regulator_ops ltc3676_fixed_standby_regulator_ops = { +}; + +/* LDO2, LDO3 fixed (LDO2 has external scalar via R1/R2 feedback res) */ +static const struct regulator_ops ltc3676_fixed_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define LTC3676_REG(_id, _name, _ops, en_reg, en_bit, dvba_reg, dvb_mask) \ + [LTC3676_ ## _id] = { \ + .name = #_name, \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = ltc3676_of_parse_cb, \ + .n_voltages = (dvb_mask) + 1, \ + .min_uV = (dvba_reg) ? 412500 : 0, \ + .uV_step = (dvba_reg) ? 12500 : 0, \ + .ramp_delay = (dvba_reg) ? 800 : 0, \ + .fixed_uV = (dvb_mask) ? 0 : 725000, \ + .ops = <c3676_ ## _ops ## _regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = LTC3676_ ## _id, \ + .owner = THIS_MODULE, \ + .vsel_reg = (dvba_reg), \ + .vsel_mask = (dvb_mask), \ + .enable_reg = (en_reg), \ + .enable_mask = (1 << en_bit), \ + } + +#define LTC3676_LINEAR_REG(_id, _name, _en, _dvba) \ + LTC3676_REG(_id, _name, linear, \ + LTC3676_ ## _en, 7, \ + LTC3676_ ## _dvba, 0x1f) + +#define LTC3676_FIXED_REG(_id, _name, _en_reg, _en_bit) \ + LTC3676_REG(_id, _name, fixed, LTC3676_ ## _en_reg, _en_bit, 0, 0) + +static const struct regulator_desc ltc3676_regulators[LTC3676_NUM_REGULATORS] = { + LTC3676_LINEAR_REG(SW1, sw1, BUCK1, DVB1A), + LTC3676_LINEAR_REG(SW2, sw2, BUCK2, DVB2A), + LTC3676_LINEAR_REG(SW3, sw3, BUCK3, DVB3A), + LTC3676_LINEAR_REG(SW4, sw4, BUCK4, DVB4A), + LTC3676_REG(LDO1, ldo1, fixed_standby, 0, 0, 0, 0), + LTC3676_FIXED_REG(LDO2, ldo2, LDOA, 2), + LTC3676_FIXED_REG(LDO3, ldo3, LDOA, 5), + LTC3676_FIXED_REG(LDO4, ldo4, LDOB, 2), +}; + +static bool ltc3676_readable_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case LTC3676_BUCK1 ... LTC3676_IRQSTAT: + case LTC3676_HRST: + case LTC3676_CLIRQ: + return true; + } + return false; +} + +static bool ltc3676_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case LTC3676_IRQSTAT ... LTC3676_PGSTATRT: + return true; + } + return false; +} + +static const struct regmap_config ltc3676_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = ltc3676_readable_writeable_reg, + .readable_reg = ltc3676_readable_writeable_reg, + .volatile_reg = ltc3676_volatile_reg, + .max_register = LTC3676_CLIRQ, + .use_single_read = true, + .use_single_write = true, + .cache_type = REGCACHE_MAPLE, +}; + +static irqreturn_t ltc3676_isr(int irq, void *dev_id) +{ + struct ltc3676 *ltc3676 = dev_id; + struct device *dev = ltc3676->dev; + unsigned int i, irqstat, event; + + regmap_read(ltc3676->regmap, LTC3676_IRQSTAT, &irqstat); + + dev_dbg(dev, "irq%d irqstat=0x%02x\n", irq, irqstat); + if (irqstat & LTC3676_IRQSTAT_THERMAL_WARN) { + dev_warn(dev, "Over-temperature Warning\n"); + event = REGULATOR_EVENT_OVER_TEMP; + for (i = 0; i < LTC3676_NUM_REGULATORS; i++) + regulator_notifier_call_chain(ltc3676->regulators[i], + event, NULL); + } + + if (irqstat & LTC3676_IRQSTAT_UNDERVOLT_WARN) { + dev_info(dev, "Undervoltage Warning\n"); + event = REGULATOR_EVENT_UNDER_VOLTAGE; + for (i = 0; i < LTC3676_NUM_REGULATORS; i++) + regulator_notifier_call_chain(ltc3676->regulators[i], + event, NULL); + } + + /* Clear warning condition */ + regmap_write(ltc3676->regmap, LTC3676_CLIRQ, 0); + + return IRQ_HANDLED; +} + +static int ltc3676_regulator_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct regulator_init_data *init_data = dev_get_platdata(dev); + struct regulator_desc *descs; + struct ltc3676 *ltc3676; + int i, ret; + + ltc3676 = devm_kzalloc(dev, sizeof(*ltc3676), GFP_KERNEL); + if (!ltc3676) + return -ENOMEM; + + i2c_set_clientdata(client, ltc3676); + ltc3676->dev = dev; + + descs = ltc3676->regulator_descs; + memcpy(descs, ltc3676_regulators, sizeof(ltc3676_regulators)); + descs[LTC3676_LDO3].fixed_uV = 1800000; /* LDO3 is fixed 1.8V */ + + ltc3676->regmap = devm_regmap_init_i2c(client, <c3676_regmap_config); + if (IS_ERR(ltc3676->regmap)) { + ret = PTR_ERR(ltc3676->regmap); + dev_err(dev, "failed to initialize regmap: %d\n", ret); + return ret; + } + + for (i = 0; i < LTC3676_NUM_REGULATORS; i++) { + struct regulator_desc *desc = <c3676->regulator_descs[i]; + struct regulator_config config = { }; + + if (init_data) + config.init_data = &init_data[i]; + + config.dev = dev; + config.driver_data = ltc3676; + + ltc3676->regulators[i] = devm_regulator_register(dev, desc, + &config); + if (IS_ERR(ltc3676->regulators[i])) { + ret = PTR_ERR(ltc3676->regulators[i]); + dev_err(dev, "failed to register regulator %s: %d\n", + desc->name, ret); + return ret; + } + } + + regmap_write(ltc3676->regmap, LTC3676_CLIRQ, 0); + if (client->irq) { + ret = devm_request_threaded_irq(dev, client->irq, NULL, + ltc3676_isr, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + client->name, ltc3676); + if (ret) { + dev_err(dev, "Failed to request IRQ: %d\n", ret); + return ret; + } + } + + return 0; +} + +static const struct i2c_device_id ltc3676_i2c_id[] = { + { .name = "ltc3676" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ltc3676_i2c_id); + +static const struct of_device_id __maybe_unused ltc3676_of_match[] = { + { .compatible = "lltc,ltc3676" }, + { }, +}; +MODULE_DEVICE_TABLE(of, ltc3676_of_match); + +static struct i2c_driver ltc3676_driver = { + .driver = { + .name = DRIVER_NAME, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(ltc3676_of_match), + }, + .probe = ltc3676_regulator_probe, + .id_table = ltc3676_i2c_id, +}; +module_i2c_driver(ltc3676_driver); + +MODULE_AUTHOR("Tim Harvey "); +MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3676"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/max14577-regulator.c b/drivers/regulator/max14577-regulator.c new file mode 100644 index 000000000..cd592c5de --- /dev/null +++ b/drivers/regulator/max14577-regulator.c @@ -0,0 +1,370 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max14577.c - Regulator driver for the Maxim 14577/77836 +// +// Copyright (C) 2013,2014 Samsung Electronics +// Krzysztof Kozlowski + +#include +#include +#include +#include +#include +#include + +static int max14577_reg_is_enabled(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + struct regmap *rmap = rdev->regmap; + u8 reg_data; + + switch (rid) { + case MAX14577_CHARGER: + max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data); + if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) + return 0; + max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data); + if ((reg_data & STATUS3_CGMBC_MASK) == 0) + return 0; + /* MBCHOSTEN and CGMBC are on */ + return 1; + default: + return -EINVAL; + } +} + +static int max14577_reg_get_current_limit(struct regulator_dev *rdev) +{ + u8 reg_data; + struct regmap *rmap = rdev->regmap; + struct max14577 *max14577 = rdev_get_drvdata(rdev); + const struct maxim_charger_current *limits = + &maxim_charger_currents[max14577->dev_type]; + int ret; + + if (rdev_get_id(rdev) != MAX14577_CHARGER) + return -EINVAL; + + ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL4, ®_data); + if (ret < 0) + return ret; + + if ((reg_data & CHGCTRL4_MBCICHWRCL_MASK) == 0) + return limits->min; + + reg_data = ((reg_data & CHGCTRL4_MBCICHWRCH_MASK) >> + CHGCTRL4_MBCICHWRCH_SHIFT); + return limits->high_start + reg_data * limits->high_step; +} + +static int max14577_reg_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + u8 reg_data; + int ret; + struct max14577 *max14577 = rdev_get_drvdata(rdev); + const struct maxim_charger_current *limits = + &maxim_charger_currents[max14577->dev_type]; + + if (rdev_get_id(rdev) != MAX14577_CHARGER) + return -EINVAL; + + ret = maxim_charger_calc_reg_current(limits, min_uA, max_uA, ®_data); + if (ret) + return ret; + + return max14577_update_reg(rdev->regmap, MAX14577_CHG_REG_CHG_CTRL4, + CHGCTRL4_MBCICHWRCL_MASK | CHGCTRL4_MBCICHWRCH_MASK, + reg_data); +} + +static const struct regulator_ops max14577_safeout_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops max14577_charger_ops = { + .is_enabled = max14577_reg_is_enabled, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_current_limit = max14577_reg_get_current_limit, + .set_current_limit = max14577_reg_set_current_limit, +}; + +#define MAX14577_SAFEOUT_REG { \ + .name = "SAFEOUT", \ + .of_match = of_match_ptr("SAFEOUT"), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX14577_SAFEOUT, \ + .ops = &max14577_safeout_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .min_uV = MAX14577_REGULATOR_SAFEOUT_VOLTAGE, \ + .enable_reg = MAX14577_REG_CONTROL2, \ + .enable_mask = CTRL2_SFOUTORD_MASK, \ +} +#define MAX14577_CHARGER_REG { \ + .name = "CHARGER", \ + .of_match = of_match_ptr("CHARGER"), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX14577_CHARGER, \ + .ops = &max14577_charger_ops, \ + .type = REGULATOR_CURRENT, \ + .owner = THIS_MODULE, \ + .enable_reg = MAX14577_CHG_REG_CHG_CTRL2, \ + .enable_mask = CHGCTRL2_MBCHOSTEN_MASK, \ +} + +static const struct regulator_desc max14577_supported_regulators[] = { + [MAX14577_SAFEOUT] = MAX14577_SAFEOUT_REG, + [MAX14577_CHARGER] = MAX14577_CHARGER_REG, +}; + +struct max77836_ldo { + struct max14577 *max14577; + unsigned int mode; +}; + +static int max77836_ldo_enable(struct regulator_dev *rdev) +{ + struct max77836_ldo *ldo = rdev_get_drvdata(rdev); + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + MAX77836_CNFG1_LDO_PWRMD_MASK, ldo->mode); +} + +static int max77836_ldo_disable(struct regulator_dev *rdev) +{ + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + MAX77836_CNFG1_LDO_PWRMD_MASK, + MAX77836_CNFG1_LDO_PWRMD_OFF); +} + +static unsigned int max77836_ldo_get_mode(struct regulator_dev *rdev) +{ + struct max77836_ldo *ldo = rdev_get_drvdata(rdev); + + switch (ldo->mode) { + case MAX77836_CNFG1_LDO_PWRMD_LPM: + return REGULATOR_MODE_IDLE; + case MAX77836_CNFG1_LDO_PWRMD_NORMAL: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int max77836_ldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct max77836_ldo *ldo = rdev_get_drvdata(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = MAX77836_CNFG1_LDO_PWRMD_NORMAL; + break; + case REGULATOR_MODE_IDLE: + val = MAX77836_CNFG1_LDO_PWRMD_LPM; + break; + default: + return -EINVAL; + } + + ldo->mode = val; + + /* Only touch hardware if the regulator is already on */ + if (regulator_is_enabled_regmap(rdev)) + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + MAX77836_CNFG1_LDO_PWRMD_MASK, val); + + return 0; +} + +static unsigned int max77836_ldo_of_map_mode(unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_NORMAL: + case REGULATOR_MODE_IDLE: + return mode; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regulator_ops max77836_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = max77836_ldo_enable, + .disable = max77836_ldo_disable, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = max77836_ldo_get_mode, + .set_mode = max77836_ldo_set_mode, +}; + +#define MAX77836_LDO_REG(num) { \ + .name = "LDO" # num, \ + .of_match = of_match_ptr("LDO" # num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77836_LDO ## num, \ + .ops = &max77836_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = MAX77836_REGULATOR_LDO_VOLTAGE_STEPS_NUM, \ + .min_uV = MAX77836_REGULATOR_LDO_VOLTAGE_MIN, \ + .uV_step = MAX77836_REGULATOR_LDO_VOLTAGE_STEP, \ + .enable_reg = MAX77836_LDO_REG_CNFG1_LDO ## num, \ + .enable_mask = MAX77836_CNFG1_LDO_PWRMD_MASK, \ + .of_map_mode = max77836_ldo_of_map_mode, \ + .vsel_reg = MAX77836_LDO_REG_CNFG1_LDO ## num, \ + .vsel_mask = MAX77836_CNFG1_LDO_TV_MASK, \ +} + +static const struct regulator_desc max77836_supported_regulators[] = { + [MAX14577_SAFEOUT] = MAX14577_SAFEOUT_REG, + [MAX14577_CHARGER] = MAX14577_CHARGER_REG, + [MAX77836_LDO1] = MAX77836_LDO_REG(1), + [MAX77836_LDO2] = MAX77836_LDO_REG(2), +}; + +/* + * Registers for regulators of max77836 use different I2C slave addresses so + * different regmaps must be used for them. + * + * Returns proper regmap for accessing regulator passed by id. + */ +static struct regmap *max14577_get_regmap(struct max14577 *max14577, + int reg_id) +{ + switch (max14577->dev_type) { + case MAXIM_DEVICE_TYPE_MAX77836: + switch (reg_id) { + case MAX77836_SAFEOUT ... MAX77836_CHARGER: + return max14577->regmap; + default: + /* MAX77836_LDO1 ... MAX77836_LDO2 */ + return max14577->regmap_pmic; + } + + case MAXIM_DEVICE_TYPE_MAX14577: + default: + return max14577->regmap; + } +} + +static int max14577_regulator_probe(struct platform_device *pdev) +{ + struct max14577 *max14577 = dev_get_drvdata(pdev->dev.parent); + struct max14577_platform_data *pdata = dev_get_platdata(max14577->dev); + int i, ret = 0; + struct regulator_config config = {}; + const struct regulator_desc *supported_regulators; + unsigned int supported_regulators_size; + enum maxim_device_type dev_type = max14577->dev_type; + + switch (dev_type) { + case MAXIM_DEVICE_TYPE_MAX77836: + supported_regulators = max77836_supported_regulators; + supported_regulators_size = ARRAY_SIZE(max77836_supported_regulators); + break; + case MAXIM_DEVICE_TYPE_MAX14577: + default: + supported_regulators = max14577_supported_regulators; + supported_regulators_size = ARRAY_SIZE(max14577_supported_regulators); + } + + config.dev = max14577->dev; + + for (i = 0; i < supported_regulators_size; i++) { + struct regulator_dev *regulator; + /* + * Index of supported_regulators[] is also the id and must + * match index of pdata->regulators[]. + */ + if (pdata && pdata->regulators) { + config.init_data = pdata->regulators[i].initdata; + config.of_node = pdata->regulators[i].of_node; + } + + /* + * LDOs need per-regulator driver data to store their mode. + * The charger and safeout share the core MFD struct. + */ + if (dev_type == MAXIM_DEVICE_TYPE_MAX77836 && + (supported_regulators[i].id == MAX77836_LDO1 || + supported_regulators[i].id == MAX77836_LDO2)) { + struct max77836_ldo *ldo; + + ldo = devm_kzalloc(&pdev->dev, sizeof(*ldo), + GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->max14577 = max14577; + ldo->mode = MAX77836_CNFG1_LDO_PWRMD_NORMAL; + config.driver_data = ldo; + } else { + config.driver_data = max14577; + } + + config.regmap = max14577_get_regmap(max14577, + supported_regulators[i].id); + + regulator = devm_regulator_register(&pdev->dev, + &supported_regulators[i], &config); + if (IS_ERR(regulator)) { + ret = PTR_ERR(regulator); + dev_err(&pdev->dev, + "Regulator init failed for %d/%s with error: %d\n", + i, supported_regulators[i].name, ret); + return ret; + } + } + + return ret; +} + +static const struct platform_device_id max14577_regulator_id[] = { + { .name = "max14577-regulator", .driver_data = MAXIM_DEVICE_TYPE_MAX14577 }, + { .name = "max77836-regulator", .driver_data = MAXIM_DEVICE_TYPE_MAX77836 }, + { } +}; +MODULE_DEVICE_TABLE(platform, max14577_regulator_id); + +static struct platform_driver max14577_regulator_driver = { + .driver = { + .name = "max14577-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max14577_regulator_probe, + .id_table = max14577_regulator_id, +}; + +static int __init max14577_regulator_init(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(max14577_supported_regulators) != MAX14577_REGULATOR_NUM); + BUILD_BUG_ON(ARRAY_SIZE(max77836_supported_regulators) != MAX77836_REGULATOR_NUM); + + BUILD_BUG_ON(MAX77836_REGULATOR_LDO_VOLTAGE_MIN + + (MAX77836_REGULATOR_LDO_VOLTAGE_STEP * + (MAX77836_REGULATOR_LDO_VOLTAGE_STEPS_NUM - 1)) != + MAX77836_REGULATOR_LDO_VOLTAGE_MAX); + + return platform_driver_register(&max14577_regulator_driver); +} +subsys_initcall(max14577_regulator_init); + +static void __exit max14577_regulator_exit(void) +{ + platform_driver_unregister(&max14577_regulator_driver); +} +module_exit(max14577_regulator_exit); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("Maxim 14577/77836 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max1586.c b/drivers/regulator/max1586.c new file mode 100644 index 000000000..e5cbc09c2 --- /dev/null +++ b/drivers/regulator/max1586.c @@ -0,0 +1,309 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * max1586.c -- Voltage and current regulation for the Maxim 1586 + * + * Copyright (C) 2008 Robert Jarzmik + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX1586_V3_MAX_VSEL 31 +#define MAX1586_V6_MAX_VSEL 3 + +#define MAX1586_V3_MIN_UV 700000 +#define MAX1586_V3_MAX_UV 1475000 + +#define MAX1586_V6_MIN_UV 0 +#define MAX1586_V6_MAX_UV 3000000 + +#define I2C_V3_SELECT (0 << 5) +#define I2C_V6_SELECT (1 << 5) + +struct max1586_data { + struct i2c_client *client; + + /* min/max V3 voltage */ + unsigned int min_uV; + unsigned int max_uV; + + unsigned int v3_curr_sel; + unsigned int v6_curr_sel; +}; + +/* + * V6 voltage + * On I2C bus, sending a "x" byte to the max1586 means : + * set V6 to either 0V, 1.8V, 2.5V, 3V depending on (x & 0x3) + * As regulator framework doesn't accept voltages to be 0V, we use 1uV. + */ +static const unsigned int v6_voltages_uv[] = { 1, 1800000, 2500000, 3000000 }; + +/* + * V3 voltage + * On I2C bus, sending a "x" byte to the max1586 means : + * set V3 to 0.700V + (x & 0x1f) * 0.025V + * This voltage can be increased by external resistors + * R24 and R25=100kOhm as described in the data sheet. + * The gain is approximately: 1 + R24/R25 + R24/185.5kOhm + */ +static int max1586_v3_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max1586_data *max1586 = rdev_get_drvdata(rdev); + + return max1586->v3_curr_sel; +} + +static int max1586_v3_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct max1586_data *max1586 = rdev_get_drvdata(rdev); + struct i2c_client *client = max1586->client; + int ret; + u8 v3_prog; + + dev_dbg(&client->dev, "changing voltage v3 to %dmv\n", + regulator_list_voltage_linear(rdev, selector) / 1000); + + v3_prog = I2C_V3_SELECT | (u8) selector; + ret = i2c_smbus_write_byte(client, v3_prog); + if (ret) + return ret; + + max1586->v3_curr_sel = selector; + + return 0; +} + +static int max1586_v6_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max1586_data *max1586 = rdev_get_drvdata(rdev); + + return max1586->v6_curr_sel; +} + +static int max1586_v6_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max1586_data *max1586 = rdev_get_drvdata(rdev); + struct i2c_client *client = max1586->client; + u8 v6_prog; + int ret; + + dev_dbg(&client->dev, "changing voltage v6 to %dmv\n", + rdev->desc->volt_table[selector] / 1000); + + v6_prog = I2C_V6_SELECT | (u8) selector; + ret = i2c_smbus_write_byte(client, v6_prog); + if (ret) + return ret; + + max1586->v6_curr_sel = selector; + + return 0; +} + +/* + * The Maxim 1586 controls V3 and V6 voltages, but offers no way of reading back + * the set up value. + */ +static const struct regulator_ops max1586_v3_ops = { + .get_voltage_sel = max1586_v3_get_voltage_sel, + .set_voltage_sel = max1586_v3_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops max1586_v6_ops = { + .get_voltage_sel = max1586_v6_get_voltage_sel, + .set_voltage_sel = max1586_v6_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +}; + +static struct regulator_desc max1586_reg[] = { + { + .name = "Output_V3", + .id = MAX1586_V3, + .ops = &max1586_v3_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX1586_V3_MAX_VSEL + 1, + .owner = THIS_MODULE, + }, + { + .name = "Output_V6", + .id = MAX1586_V6, + .ops = &max1586_v6_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX1586_V6_MAX_VSEL + 1, + .volt_table = v6_voltages_uv, + .owner = THIS_MODULE, + }, +}; + +static int of_get_max1586_platform_data(struct device *dev, + struct max1586_platform_data *pdata) +{ + struct max1586_subdev_data *sub; + struct of_regulator_match rmatch[ARRAY_SIZE(max1586_reg)] = { }; + struct device_node *np = dev->of_node; + int i, matched; + + if (of_property_read_u32(np, "v3-gain", + &pdata->v3_gain) < 0) { + dev_err(dev, "%pOF has no 'v3-gain' property\n", np); + return -EINVAL; + } + + np = of_get_child_by_name(np, "regulators"); + if (!np) { + dev_err(dev, "missing 'regulators' subnode in DT\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(rmatch); i++) + rmatch[i].name = max1586_reg[i].name; + + matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch)); + of_node_put(np); + /* + * If matched is 0, ie. neither Output_V3 nor Output_V6 have been found, + * return 0, which signals the normal situation where no subregulator is + * available. This is normal because the max1586 doesn't provide any + * readback support, so the subregulators can't report any status + * anyway. If matched < 0, return the error. + */ + if (matched <= 0) + return matched; + + pdata->subdevs = devm_kcalloc(dev, + matched, + sizeof(struct max1586_subdev_data), + GFP_KERNEL); + if (!pdata->subdevs) + return -ENOMEM; + + pdata->num_subdevs = matched; + sub = pdata->subdevs; + + for (i = 0; i < matched; i++) { + sub->id = i; + sub->name = rmatch[i].of_node->name; + sub->platform_data = rmatch[i].init_data; + sub++; + } + + return 0; +} + +static const struct of_device_id __maybe_unused max1586_of_match[] = { + { .compatible = "maxim,max1586", }, + {}, +}; +MODULE_DEVICE_TABLE(of, max1586_of_match); + +static int max1586_pmic_probe(struct i2c_client *client) +{ + struct max1586_platform_data *pdata, pdata_of; + struct regulator_config config = { }; + struct max1586_data *max1586; + int i, id, ret; + + pdata = dev_get_platdata(&client->dev); + if (client->dev.of_node && !pdata) { + ret = of_get_max1586_platform_data(&client->dev, &pdata_of); + if (ret < 0) + return ret; + pdata = &pdata_of; + } + + max1586 = devm_kzalloc(&client->dev, sizeof(struct max1586_data), + GFP_KERNEL); + if (!max1586) + return -ENOMEM; + + max1586->client = client; + + if (!pdata->v3_gain) + return -EINVAL; + + max1586->min_uV = MAX1586_V3_MIN_UV / 1000 * pdata->v3_gain / 1000; + max1586->max_uV = MAX1586_V3_MAX_UV / 1000 * pdata->v3_gain / 1000; + + /* Set curr_sel to default voltage on power-up */ + max1586->v3_curr_sel = 24; /* 1.3V */ + max1586->v6_curr_sel = 0; + + for (i = 0; i < pdata->num_subdevs && i <= MAX1586_V6; i++) { + struct regulator_dev *rdev; + + id = pdata->subdevs[i].id; + if (!pdata->subdevs[i].platform_data) + continue; + if (id < MAX1586_V3 || id > MAX1586_V6) { + dev_err(&client->dev, "invalid regulator id %d\n", id); + return -EINVAL; + } + + if (id == MAX1586_V3) { + max1586_reg[id].min_uV = max1586->min_uV; + max1586_reg[id].uV_step = + (max1586->max_uV - max1586->min_uV) / + MAX1586_V3_MAX_VSEL; + } + + config.dev = &client->dev; + config.init_data = pdata->subdevs[i].platform_data; + config.driver_data = max1586; + + rdev = devm_regulator_register(&client->dev, + &max1586_reg[id], &config); + if (IS_ERR(rdev)) { + dev_err(&client->dev, "failed to register %s\n", + max1586_reg[id].name); + return PTR_ERR(rdev); + } + } + + i2c_set_clientdata(client, max1586); + dev_info(&client->dev, "Maxim 1586 regulator driver loaded\n"); + return 0; +} + +static const struct i2c_device_id max1586_id[] = { + { .name = "max1586" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max1586_id); + +static struct i2c_driver max1586_pmic_driver = { + .probe = max1586_pmic_probe, + .driver = { + .name = "max1586", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max1586_of_match), + }, + .id_table = max1586_id, +}; + +static int __init max1586_pmic_init(void) +{ + return i2c_add_driver(&max1586_pmic_driver); +} +subsys_initcall(max1586_pmic_init); + +static void __exit max1586_pmic_exit(void) +{ + i2c_del_driver(&max1586_pmic_driver); +} +module_exit(max1586_pmic_exit); + +/* Module information */ +MODULE_DESCRIPTION("MAXIM 1586 voltage regulator driver"); +MODULE_AUTHOR("Robert Jarzmik"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max20086-regulator.c b/drivers/regulator/max20086-regulator.c new file mode 100644 index 000000000..92594b291 --- /dev/null +++ b/drivers/regulator/max20086-regulator.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// max20086-regulator.c - MAX20086-MAX20089 camera power protector driver +// +// Copyright (C) 2022 Laurent Pinchart +// Copyright (C) 2018 Avnet, Inc. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register Offset */ +#define MAX20086_REG_MASK 0x00 +#define MAX20086_REG_CONFIG 0x01 +#define MAX20086_REG_ID 0x02 +#define MAX20086_REG_STAT1 0x03 +#define MAX20086_REG_STAT2_L 0x04 +#define MAX20086_REG_STAT2_H 0x05 +#define MAX20086_REG_ADC1 0x06 +#define MAX20086_REG_ADC2 0x07 +#define MAX20086_REG_ADC3 0x08 +#define MAX20086_REG_ADC4 0x09 + +/* DEVICE IDs */ +#define MAX20086_DEVICE_ID_MAX20086 0x30 +#define MAX20086_DEVICE_ID_MAX20087 0x20 +#define MAX20086_DEVICE_ID_MAX20088 0x10 +#define MAX20086_DEVICE_ID_MAX20089 0x00 +#define DEVICE_ID_MASK 0xf0 + +/* Register bits */ +#define MAX20086_EN_MASK 0x0f +#define MAX20086_EN_OUT1 0x01 +#define MAX20086_EN_OUT2 0x02 +#define MAX20086_EN_OUT3 0x04 +#define MAX20086_EN_OUT4 0x08 +#define MAX20086_INT_DISABLE_ALL 0x3f + +#define MAX20086_MAX_REGULATORS 4 + +struct max20086_chip_info { + u8 id; + unsigned int num_outputs; +}; + +struct max20086_regulator { + struct device_node *of_node; + struct regulator_init_data *init_data; + const struct regulator_desc *desc; + struct regulator_dev *rdev; +}; + +struct max20086 { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *ena_gpiod; + + const struct max20086_chip_info *info; + + struct max20086_regulator regulators[MAX20086_MAX_REGULATORS]; +}; + +static const struct regulator_ops max20086_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define MAX20086_REGULATOR_DESC(n) \ +{ \ + .name = "OUT"#n, \ + .supply_name = "in", \ + .id = (n) - 1, \ + .ops = &max20086_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .enable_reg = MAX20086_REG_CONFIG, \ + .enable_mask = 1 << ((n) - 1), \ + .enable_val = 1 << ((n) - 1), \ + .disable_val = 0, \ +} + +static const char * const max20086_output_names[] = { + "OUT1", + "OUT2", + "OUT3", + "OUT4", +}; + +static const struct regulator_desc max20086_regulators[] = { + MAX20086_REGULATOR_DESC(1), + MAX20086_REGULATOR_DESC(2), + MAX20086_REGULATOR_DESC(3), + MAX20086_REGULATOR_DESC(4), +}; + +static int max20086_regulators_register(struct max20086 *chip) +{ + unsigned int i; + + for (i = 0; i < chip->info->num_outputs; i++) { + struct max20086_regulator *reg = &chip->regulators[i]; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = chip->dev; + config.init_data = reg->init_data; + config.driver_data = chip; + config.of_node = reg->of_node; + config.regmap = chip->regmap; + config.ena_gpiod = chip->ena_gpiod; + + rdev = devm_regulator_register(chip->dev, reg->desc, &config); + if (IS_ERR(rdev)) { + dev_err(chip->dev, + "Failed to register regulator output %s\n", + reg->desc->name); + return PTR_ERR(rdev); + } + + reg->rdev = rdev; + } + + return 0; +} + +static int max20086_parse_regulators_dt(struct max20086 *chip, bool *boot_on) +{ + struct of_regulator_match *matches; + unsigned int i; + int ret; + + struct device_node *node __free(device_node) = + of_get_child_by_name(chip->dev->of_node, "regulators"); + if (!node) { + dev_err(chip->dev, "regulators node not found\n"); + return -ENODEV; + } + + matches = devm_kcalloc(chip->dev, chip->info->num_outputs, + sizeof(*matches), GFP_KERNEL); + if (!matches) + return -ENOMEM; + + for (i = 0; i < chip->info->num_outputs; ++i) + matches[i].name = max20086_output_names[i]; + + ret = of_regulator_match(chip->dev, node, matches, + chip->info->num_outputs); + if (ret < 0) { + dev_err(chip->dev, "Failed to match regulators\n"); + return -EINVAL; + } + + *boot_on = false; + + for (i = 0; i < chip->info->num_outputs; i++) { + struct max20086_regulator *reg = &chip->regulators[i]; + + reg->init_data = matches[i].init_data; + reg->of_node = matches[i].of_node; + reg->desc = &max20086_regulators[i]; + + if (reg->init_data) { + if (reg->init_data->constraints.always_on || + reg->init_data->constraints.boot_on) + *boot_on = true; + } + } + + return 0; +} + +static int max20086_detect(struct max20086 *chip) +{ + unsigned int data; + int ret; + + ret = regmap_read(chip->regmap, MAX20086_REG_ID, &data); + if (ret < 0) { + dev_err(chip->dev, "Failed to read DEVICE_ID reg: %d\n", ret); + return ret; + } + + if ((data & DEVICE_ID_MASK) != chip->info->id) { + dev_err(chip->dev, "Invalid device ID 0x%02x\n", data); + return -ENXIO; + } + + return 0; +} + +static bool max20086_gen_is_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX20086_REG_MASK: + case MAX20086_REG_CONFIG: + return true; + default: + return false; + } +} + +static const struct regmap_config max20086_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = max20086_gen_is_writeable_reg, + .max_register = 0x9, + .cache_type = REGCACHE_NONE, +}; + +static int max20086_i2c_probe(struct i2c_client *i2c) +{ + struct max20086 *chip; + enum gpiod_flags flags; + bool boot_on; + int ret; + + chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &i2c->dev; + chip->info = i2c_get_match_data(i2c); + + i2c_set_clientdata(i2c, chip); + + chip->regmap = devm_regmap_init_i2c(i2c, &max20086_regmap_config); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to allocate register map: %d\n", ret); + return ret; + } + + ret = max20086_parse_regulators_dt(chip, &boot_on); + if (ret < 0) + return ret; + + ret = max20086_detect(chip); + if (ret < 0) + return ret; + + /* Until IRQ support is added, just disable all interrupts. */ + ret = regmap_update_bits(chip->regmap, MAX20086_REG_MASK, + MAX20086_INT_DISABLE_ALL, + MAX20086_INT_DISABLE_ALL); + if (ret < 0) { + dev_err(chip->dev, "Failed to disable interrupts: %d\n", ret); + return ret; + } + + /* + * Get the enable GPIO. If any of the outputs is marked as being + * enabled at boot, request the GPIO with an initial high state to + * avoid disabling outputs that may have been turned on by the boot + * loader. Otherwise, request it with a low state to enter lower-power + * shutdown. + */ + flags = boot_on ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + chip->ena_gpiod = devm_gpiod_get_optional(chip->dev, "enable", flags); + if (IS_ERR(chip->ena_gpiod)) { + ret = PTR_ERR(chip->ena_gpiod); + dev_err(chip->dev, "Failed to get enable GPIO: %d\n", ret); + return ret; + } + + ret = max20086_regulators_register(chip); + if (ret < 0) { + dev_err(chip->dev, "Failed to register regulators: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct max20086_chip_info max20086_chip_info = { + .id = MAX20086_DEVICE_ID_MAX20086, + .num_outputs = 4, +}; + +static const struct max20086_chip_info max20087_chip_info = { + .id = MAX20086_DEVICE_ID_MAX20087, + .num_outputs = 4, +}; + +static const struct max20086_chip_info max20088_chip_info = { + .id = MAX20086_DEVICE_ID_MAX20088, + .num_outputs = 2, +}; + +static const struct max20086_chip_info max20089_chip_info = { + .id = MAX20086_DEVICE_ID_MAX20089, + .num_outputs = 2, +}; + +static const struct i2c_device_id max20086_i2c_id[] = { + { .name = "max20086", .driver_data = (kernel_ulong_t)&max20086_chip_info }, + { .name = "max20087", .driver_data = (kernel_ulong_t)&max20087_chip_info }, + { .name = "max20088", .driver_data = (kernel_ulong_t)&max20088_chip_info }, + { .name = "max20089", .driver_data = (kernel_ulong_t)&max20089_chip_info }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, max20086_i2c_id); + +static const struct of_device_id max20086_dt_ids[] __maybe_unused = { + { .compatible = "maxim,max20086", .data = &max20086_chip_info }, + { .compatible = "maxim,max20087", .data = &max20087_chip_info }, + { .compatible = "maxim,max20088", .data = &max20088_chip_info }, + { .compatible = "maxim,max20089", .data = &max20089_chip_info }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max20086_dt_ids); + +static struct i2c_driver max20086_regulator_driver = { + .driver = { + .name = "max20086", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max20086_dt_ids), + }, + .probe = max20086_i2c_probe, + .id_table = max20086_i2c_id, +}; + +module_i2c_driver(max20086_regulator_driver); + +MODULE_AUTHOR("Watson Chow "); +MODULE_DESCRIPTION("MAX20086-MAX20089 Camera Power Protector Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max20411-regulator.c b/drivers/regulator/max20411-regulator.c new file mode 100644 index 000000000..ac7a9aa01 --- /dev/null +++ b/drivers/regulator/max20411-regulator.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX20411_UV_STEP 6250 +#define MAX20411_BASE_UV 243750 +#define MAX20411_MIN_SEL 41 /* 0.5V */ +#define MAX20411_MAX_SEL 165 /* 1.275V */ +#define MAX20411_VID_OFFSET 0x7 +#define MAX20411_VID_MASK 0xff +#define MAX20411_SLEW_OFFSET 0x6 +#define MAX20411_SLEW_DVS_MASK 0xc +#define MAX20411_SLEW_SR_MASK 0x3 + +struct max20411 { + struct device *dev; + struct device_node *of_node; + struct regulator_desc desc; + struct regulator_dev *rdev; + struct regmap *regmap; +}; + +static const unsigned int max20411_slew_rates[] = { 13100, 6600, 3300, 1600 }; + +static int max20411_enable_time(struct regulator_dev *rdev) +{ + int voltage, rate, ret; + unsigned int val; + + /* get voltage */ + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret) + return ret; + + val &= rdev->desc->vsel_mask; + voltage = regulator_list_voltage_linear(rdev, val); + + /* get rate */ + ret = regmap_read(rdev->regmap, MAX20411_SLEW_OFFSET, &val); + if (ret) + return ret; + + val = FIELD_GET(MAX20411_SLEW_SR_MASK, val); + rate = max20411_slew_rates[val]; + + return DIV_ROUND_UP(voltage, rate); +} + +static const struct regmap_config max20411_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xe, +}; + +static const struct regulator_ops max20411_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .enable_time = max20411_enable_time, +}; + +static const struct regulator_desc max20411_desc = { + .ops = &max20411_ops, + .owner = THIS_MODULE, + .type = REGULATOR_VOLTAGE, + .supply_name = "vin", + .name = "max20411", + + /* + * voltage = 0.24375V + selector * 6.25mV + * with valid selector between 41 to 165 (0.5V to 1.275V) + */ + .min_uV = MAX20411_BASE_UV, + .uV_step = MAX20411_UV_STEP, + .linear_min_sel = MAX20411_MIN_SEL, + .n_voltages = MAX20411_MAX_SEL + 1, + + .vsel_reg = MAX20411_VID_OFFSET, + .vsel_mask = MAX20411_VID_MASK, + + .ramp_reg = MAX20411_SLEW_OFFSET, + .ramp_mask = MAX20411_SLEW_DVS_MASK, + .ramp_delay_table = max20411_slew_rates, + .n_ramp_values = ARRAY_SIZE(max20411_slew_rates), +}; + +static int max20411_probe(struct i2c_client *client) +{ + struct regulator_init_data *init_data; + struct device *dev = &client->dev; + struct regulator_config cfg = {}; + struct max20411 *max20411; + + max20411 = devm_kzalloc(dev, sizeof(*max20411), GFP_KERNEL); + if (!max20411) + return -ENOMEM; + + max20411->regmap = devm_regmap_init_i2c(client, &max20411_regmap_config); + if (IS_ERR(max20411->regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(max20411->regmap); + } + + max20411->dev = dev; + max20411->of_node = dev->of_node; + + max20411->desc = max20411_desc; + init_data = of_get_regulator_init_data(max20411->dev, max20411->of_node, &max20411->desc); + if (!init_data) + return -ENODATA; + + cfg.dev = max20411->dev; + cfg.init_data = init_data; + cfg.of_node = max20411->of_node; + cfg.driver_data = max20411; + + cfg.ena_gpiod = gpiod_get(max20411->dev, "enable", GPIOD_ASIS); + if (IS_ERR(cfg.ena_gpiod)) + return dev_err_probe(dev, PTR_ERR(cfg.ena_gpiod), + "unable to acquire enable gpio\n"); + + max20411->rdev = devm_regulator_register(max20411->dev, &max20411->desc, &cfg); + if (IS_ERR(max20411->rdev)) + dev_err(max20411->dev, "Failed to register regulator: %pe\n", max20411->rdev); + + return PTR_ERR_OR_ZERO(max20411->rdev); +} + +static const struct of_device_id of_max20411_match_tbl[] = { + { .compatible = "maxim,max20411", }, + { }, +}; +MODULE_DEVICE_TABLE(of, of_max20411_match_tbl); + +static const struct i2c_device_id max20411_id[] = { + { .name = "max20411" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max20411_id); + +static struct i2c_driver max20411_i2c_driver = { + .driver = { + .name = "max20411", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_max20411_match_tbl, + }, + .probe = max20411_probe, + .id_table = max20411_id, +}; +module_i2c_driver(max20411_i2c_driver); + +MODULE_DESCRIPTION("Maxim MAX20411 High-Efficiency Single Step-Down Converter driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max5970-regulator.c b/drivers/regulator/max5970-regulator.c new file mode 100644 index 000000000..fc14177dd --- /dev/null +++ b/drivers/regulator/max5970-regulator.c @@ -0,0 +1,642 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device driver for regulators in MAX5970 and MAX5978 IC + * + * Copyright (c) 2022 9elements GmbH + * + * Author: Patrick Rudolph + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct max5970_regulator { + int num_switches, mon_rng, irng, shunt_micro_ohms, lim_uA; + struct regmap *regmap; +}; + +enum max597x_regulator_id { + MAX597X_sw0, + MAX597X_sw1, +}; + +static int max5970_read_adc(struct regmap *regmap, int reg, long *val) +{ + u8 reg_data[2]; + int ret; + + ret = regmap_bulk_read(regmap, reg, ®_data[0], 2); + if (ret < 0) + return ret; + + *val = (reg_data[0] << 2) | (reg_data[1] & 3); + + return 0; +} + +static int max5970_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct regulator_dev **rdevs = dev_get_drvdata(dev); + struct max5970_regulator *ddata = rdev_get_drvdata(rdevs[channel]); + struct regmap *regmap = ddata->regmap; + int ret; + + switch (type) { + case hwmon_curr: + switch (attr) { + case hwmon_curr_input: + ret = max5970_read_adc(regmap, MAX5970_REG_CURRENT_H(channel), val); + if (ret < 0) + return ret; + /* + * Calculate current from ADC value, IRNG range & shunt resistor value. + * ddata->irng holds the voltage corresponding to the maximum value the + * 10-bit ADC can measure. + * To obtain the output, multiply the ADC value by the IRNG range (in + * millivolts) and then divide it by the maximum value of the 10-bit ADC. + */ + *val = (*val * ddata->irng) >> 10; + /* Convert the voltage measurement across shunt resistor to current */ + *val = (*val * 1000) / ddata->shunt_micro_ohms; + return 0; + default: + return -EOPNOTSUPP; + } + + case hwmon_in: + switch (attr) { + case hwmon_in_input: + ret = max5970_read_adc(regmap, MAX5970_REG_VOLTAGE_H(channel), val); + if (ret < 0) + return ret; + /* + * Calculate voltage from ADC value and MON range. + * ddata->mon_rng holds the voltage corresponding to the maximum value the + * 10-bit ADC can measure. + * To obtain the output, multiply the ADC value by the MON range (in + * microvolts) and then divide it by the maximum value of the 10-bit ADC. + */ + *val = mul_u64_u32_shr(*val, ddata->mon_rng, 10); + /* uV to mV */ + *val = *val / 1000; + return 0; + default: + return -EOPNOTSUPP; + } + default: + return -EOPNOTSUPP; + } +} + +static umode_t max5970_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + struct regulator_dev **rdevs = (struct regulator_dev **)data; + struct max5970_regulator *ddata; + + if (channel >= MAX5970_NUM_SWITCHES || !rdevs[channel]) + return 0; + + ddata = rdev_get_drvdata(rdevs[channel]); + + if (channel >= ddata->num_switches) + return 0; + + switch (type) { + case hwmon_in: + switch (attr) { + case hwmon_in_input: + return 0444; + default: + break; + } + break; + case hwmon_curr: + switch (attr) { + case hwmon_curr_input: + /* Current measurement requires knowledge of the shunt resistor value. */ + if (ddata->shunt_micro_ohms) + return 0444; + break; + default: + break; + } + break; + default: + break; + } + return 0; +} + +static const struct hwmon_ops max5970_hwmon_ops = { + .is_visible = max5970_is_visible, + .read = max5970_read, +}; + +static const struct hwmon_channel_info *max5970_info[] = { + HWMON_CHANNEL_INFO(in, HWMON_I_INPUT, HWMON_I_INPUT), + HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT, HWMON_C_INPUT), + NULL +}; + +static const struct hwmon_chip_info max5970_chip_info = { + .ops = &max5970_hwmon_ops, + .info = max5970_info, +}; + +static int max597x_uvp_ovp_check_mode(struct regulator_dev *rdev, int severity) +{ + int ret, reg; + + /* Status1 register contains the soft strap values sampled at POR */ + ret = regmap_read(rdev->regmap, MAX5970_REG_STATUS1, ®); + if (ret) + return ret; + + /* Check soft straps match requested mode */ + if (severity == REGULATOR_SEVERITY_PROT) { + if (STATUS1_PROT(reg) != STATUS1_PROT_SHUTDOWN) + return -EOPNOTSUPP; + + return 0; + } + if (STATUS1_PROT(reg) == STATUS1_PROT_SHUTDOWN) + return -EOPNOTSUPP; + + return 0; +} + +static int max597x_set_vp(struct regulator_dev *rdev, int lim_uV, int severity, + bool enable, bool overvoltage) +{ + int off_h, off_l, reg, ret; + struct max5970_regulator *data = rdev_get_drvdata(rdev); + int channel = rdev_get_id(rdev); + + if (overvoltage) { + if (severity == REGULATOR_SEVERITY_WARN) { + off_h = MAX5970_REG_CH_OV_WARN_H(channel); + off_l = MAX5970_REG_CH_OV_WARN_L(channel); + } else { + off_h = MAX5970_REG_CH_OV_CRIT_H(channel); + off_l = MAX5970_REG_CH_OV_CRIT_L(channel); + } + } else { + if (severity == REGULATOR_SEVERITY_WARN) { + off_h = MAX5970_REG_CH_UV_WARN_H(channel); + off_l = MAX5970_REG_CH_UV_WARN_L(channel); + } else { + off_h = MAX5970_REG_CH_UV_CRIT_H(channel); + off_l = MAX5970_REG_CH_UV_CRIT_L(channel); + } + } + + if (enable) + /* reg = ADC_MASK * (lim_uV / 1000000) / (data->mon_rng / 1000000) */ + reg = ADC_MASK * lim_uV / data->mon_rng; + else + reg = 0; + + ret = regmap_write(rdev->regmap, off_h, MAX5970_VAL2REG_H(reg)); + if (ret) + return ret; + + ret = regmap_write(rdev->regmap, off_l, MAX5970_VAL2REG_L(reg)); + if (ret) + return ret; + + return 0; +} + +static int max597x_set_uvp(struct regulator_dev *rdev, int lim_uV, int severity, + bool enable) +{ + int ret; + + /* + * MAX5970 has enable control as a special value in limit reg. Can't + * set limit but keep feature disabled or enable W/O given limit. + */ + if ((lim_uV && !enable) || (!lim_uV && enable)) + return -EINVAL; + + ret = max597x_uvp_ovp_check_mode(rdev, severity); + if (ret) + return ret; + + return max597x_set_vp(rdev, lim_uV, severity, enable, false); +} + +static int max597x_set_ovp(struct regulator_dev *rdev, int lim_uV, int severity, + bool enable) +{ + int ret; + + /* + * MAX5970 has enable control as a special value in limit reg. Can't + * set limit but keep feature disabled or enable W/O given limit. + */ + if ((lim_uV && !enable) || (!lim_uV && enable)) + return -EINVAL; + + ret = max597x_uvp_ovp_check_mode(rdev, severity); + if (ret) + return ret; + + return max597x_set_vp(rdev, lim_uV, severity, enable, true); +} + +static int max597x_set_ocp(struct regulator_dev *rdev, int lim_uA, + int severity, bool enable) +{ + int val, reg; + unsigned int vthst, vthfst; + + struct max5970_regulator *data = rdev_get_drvdata(rdev); + int rdev_id = rdev_get_id(rdev); + /* + * MAX5970 doesn't has enable control for ocp. + * If limit is specified but enable is not set then hold the value in + * variable & later use it when ocp needs to be enabled. + */ + if (lim_uA != 0 && lim_uA != data->lim_uA) + data->lim_uA = lim_uA; + + if (severity != REGULATOR_SEVERITY_PROT) + return -EINVAL; + + if (enable) { + + /* Calc Vtrip threshold in uV. */ + vthst = + div_u64(mul_u32_u32(data->shunt_micro_ohms, data->lim_uA), + 1000000); + + /* + * As recommended in datasheed, add 20% margin to avoid + * spurious event & passive component tolerance. + */ + vthst = div_u64(mul_u32_u32(vthst, 120), 100); + + /* Calc fast Vtrip threshold in uV */ + vthfst = vthst * (MAX5970_FAST2SLOW_RATIO / 100); + + if (vthfst > data->irng) { + dev_err(&rdev->dev, "Current limit out of range\n"); + return -EINVAL; + } + /* Fast trip threshold to be programmed */ + val = div_u64(mul_u32_u32(0xFF, vthfst), data->irng); + } else + /* + * Since there is no option to disable ocp, set limit to max + * value + */ + val = 0xFF; + + reg = MAX5970_REG_DAC_FAST(rdev_id); + + return regmap_write(rdev->regmap, reg, val); +} + +static int max597x_get_status(struct regulator_dev *rdev) +{ + int val, ret; + + ret = regmap_read(rdev->regmap, MAX5970_REG_STATUS3, &val); + if (ret) + return ret; + + if (val & MAX5970_STATUS3_ALERT) + return REGULATOR_STATUS_ERROR; + + ret = regulator_is_enabled_regmap(rdev); + if (ret < 0) + return ret; + + if (ret) + return REGULATOR_STATUS_ON; + + return REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops max597x_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = max597x_get_status, + .set_over_voltage_protection = max597x_set_ovp, + .set_under_voltage_protection = max597x_set_uvp, + .set_over_current_protection = max597x_set_ocp, +}; + +static int max597x_dt_parse(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct max5970_regulator *data = cfg->driver_data; + int ret = 0; + + ret = + of_property_read_u32(np, "shunt-resistor-micro-ohms", + &data->shunt_micro_ohms); + if (ret < 0) + dev_err(cfg->dev, + "property 'shunt-resistor-micro-ohms' not found, err %d\n", + ret); + return ret; + +} + +#define MAX597X_SWITCH(_ID, _ereg, _chan, _supply) { \ + .name = #_ID, \ + .of_match = of_match_ptr(#_ID), \ + .ops = &max597x_switch_ops, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = MAX597X_##_ID, \ + .owner = THIS_MODULE, \ + .supply_name = _supply, \ + .enable_reg = _ereg, \ + .enable_mask = CHXEN((_chan)), \ + .of_parse_cb = max597x_dt_parse, \ +} + +static const struct regulator_desc regulators[] = { + MAX597X_SWITCH(sw0, MAX5970_REG_CHXEN, 0, "vss1"), + MAX597X_SWITCH(sw1, MAX5970_REG_CHXEN, 1, "vss2"), +}; + +static int max597x_regmap_read_clear(struct regmap *map, unsigned int reg, + unsigned int *val) +{ + int ret; + + ret = regmap_read(map, reg, val); + if (ret) + return ret; + + if (*val) + return regmap_write(map, reg, 0); + + return 0; +} + +static int max597x_irq_handler(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + struct regulator_err_state *stat; + struct max5970_regulator *d = (struct max5970_regulator *)rid->data; + int val, ret, i; + + ret = max597x_regmap_read_clear(d->regmap, MAX5970_REG_FAULT0, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + *dev_mask = 0; + for (i = 0; i < d->num_switches; i++) { + stat = &rid->states[i]; + stat->notifs = 0; + stat->errors = 0; + } + + for (i = 0; i < d->num_switches; i++) { + stat = &rid->states[i]; + + if (val & UV_STATUS_CRIT(i)) { + *dev_mask |= 1 << i; + stat->notifs |= REGULATOR_EVENT_UNDER_VOLTAGE; + stat->errors |= REGULATOR_ERROR_UNDER_VOLTAGE; + } else if (val & UV_STATUS_WARN(i)) { + *dev_mask |= 1 << i; + stat->notifs |= REGULATOR_EVENT_UNDER_VOLTAGE_WARN; + stat->errors |= REGULATOR_ERROR_UNDER_VOLTAGE_WARN; + } + } + + ret = max597x_regmap_read_clear(d->regmap, MAX5970_REG_FAULT1, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + for (i = 0; i < d->num_switches; i++) { + stat = &rid->states[i]; + + if (val & OV_STATUS_CRIT(i)) { + *dev_mask |= 1 << i; + stat->notifs |= REGULATOR_EVENT_REGULATION_OUT; + stat->errors |= REGULATOR_ERROR_REGULATION_OUT; + } else if (val & OV_STATUS_WARN(i)) { + *dev_mask |= 1 << i; + stat->notifs |= REGULATOR_EVENT_OVER_VOLTAGE_WARN; + stat->errors |= REGULATOR_ERROR_OVER_VOLTAGE_WARN; + } + } + + ret = max597x_regmap_read_clear(d->regmap, MAX5970_REG_FAULT2, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + for (i = 0; i < d->num_switches; i++) { + stat = &rid->states[i]; + + if (val & OC_STATUS_WARN(i)) { + *dev_mask |= 1 << i; + stat->notifs |= REGULATOR_EVENT_OVER_CURRENT_WARN; + stat->errors |= REGULATOR_ERROR_OVER_CURRENT_WARN; + } + } + + ret = regmap_read(d->regmap, MAX5970_REG_STATUS0, &val); + if (ret) + return REGULATOR_FAILED_RETRY; + + for (i = 0; i < d->num_switches; i++) { + stat = &rid->states[i]; + + if ((val & MAX5970_CB_IFAULTF(i)) + || (val & MAX5970_CB_IFAULTS(i))) { + *dev_mask |= 1 << i; + stat->notifs |= + REGULATOR_EVENT_OVER_CURRENT | + REGULATOR_EVENT_DISABLE; + stat->errors |= + REGULATOR_ERROR_OVER_CURRENT | REGULATOR_ERROR_FAIL; + + /* Clear the sub-IRQ status */ + regulator_disable_regmap(stat->rdev); + } + } + return 0; +} + +static int max597x_adc_range(struct regmap *regmap, const int ch, + int *irng, int *mon_rng) +{ + unsigned int reg; + int ret; + + /* Decode current ADC range */ + ret = regmap_read(regmap, MAX5970_REG_STATUS2, ®); + if (ret) + return ret; + switch (MAX5970_IRNG(reg, ch)) { + case 0: + *irng = 100000; /* 100 mV */ + break; + case 1: + *irng = 50000; /* 50 mV */ + break; + case 2: + *irng = 25000; /* 25 mV */ + break; + default: + return -EINVAL; + } + + /* Decode current voltage monitor range */ + ret = regmap_read(regmap, MAX5970_REG_MON_RANGE, ®); + if (ret) + return ret; + + *mon_rng = MAX5970_MON_MAX_RANGE_UV >> MAX5970_MON(reg, ch); + + return 0; +} + +static int max597x_setup_irq(struct device *dev, + int irq, + struct regulator_dev *rdevs[MAX5970_NUM_SWITCHES], + int num_switches, struct max5970_regulator *data) +{ + struct regulator_irq_desc max597x_notif = { + .name = "max597x-irq", + .map_event = max597x_irq_handler, + .data = data, + }; + int errs = REGULATOR_ERROR_UNDER_VOLTAGE | + REGULATOR_ERROR_UNDER_VOLTAGE_WARN | + REGULATOR_ERROR_OVER_VOLTAGE_WARN | + REGULATOR_ERROR_REGULATION_OUT | + REGULATOR_ERROR_OVER_CURRENT | + REGULATOR_ERROR_OVER_CURRENT_WARN | REGULATOR_ERROR_FAIL; + void *irq_helper; + + /* Register notifiers - can fail if IRQ is not given */ + irq_helper = devm_regulator_irq_helper(dev, &max597x_notif, + irq, 0, errs, NULL, + &rdevs[0], num_switches); + if (IS_ERR(irq_helper)) { + if (PTR_ERR(irq_helper) == -EPROBE_DEFER) + return -EPROBE_DEFER; + + dev_warn(dev, "IRQ disabled %pe\n", irq_helper); + } + + return 0; +} + +static int max597x_regulator_probe(struct platform_device *pdev) +{ + struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL); + struct max5970_regulator *data; + struct i2c_client *i2c = to_i2c_client(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regulator_dev **rdevs = NULL; + struct device *hwmon_dev; + int num_switches; + int ret, i; + + if (!regmap) + return -EPROBE_DEFER; + + rdevs = devm_kcalloc(&i2c->dev, MAX5970_NUM_SWITCHES, sizeof(struct regulator_dev *), + GFP_KERNEL); + if (!rdevs) + return -ENOMEM; + + if (of_device_is_compatible(i2c->dev.of_node, "maxim,max5978")) + num_switches = MAX5978_NUM_SWITCHES; + else if (of_device_is_compatible(i2c->dev.of_node, "maxim,max5970")) + num_switches = MAX5970_NUM_SWITCHES; + else + return -ENODEV; + + for (i = 0; i < num_switches; i++) { + data = + devm_kzalloc(&i2c->dev, sizeof(struct max5970_regulator), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->num_switches = num_switches; + data->regmap = regmap; + + ret = max597x_adc_range(regmap, i, &data->irng, &data->mon_rng); + if (ret < 0) + return ret; + + config.dev = &i2c->dev; + config.driver_data = (void *)data; + config.regmap = data->regmap; + rdev = devm_regulator_register(&i2c->dev, + ®ulators[i], &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "failed to register regulator %s\n", + regulators[i].name); + return PTR_ERR(rdev); + } + rdevs[i] = rdev; + } + + if (IS_REACHABLE(CONFIG_HWMON)) { + hwmon_dev = devm_hwmon_device_register_with_info(&i2c->dev, "max5970", rdevs, + &max5970_chip_info, NULL); + if (IS_ERR(hwmon_dev)) { + return dev_err_probe(&i2c->dev, PTR_ERR(hwmon_dev), + "Unable to register hwmon device\n"); + } + } + + if (i2c->irq) { + ret = + max597x_setup_irq(&i2c->dev, i2c->irq, rdevs, num_switches, + data); + if (ret) { + dev_err(&i2c->dev, "IRQ setup failed"); + return ret; + } + } + + return ret; +} + +static struct platform_driver max597x_regulator_driver = { + .driver = { + .name = "max5970-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max597x_regulator_probe, +}; + +module_platform_driver(max597x_regulator_driver); + + +MODULE_AUTHOR("Patrick Rudolph "); +MODULE_DESCRIPTION("MAX5970_hot-swap controller driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/max77503-regulator.c b/drivers/regulator/max77503-regulator.c new file mode 100644 index 000000000..1cae846f9 --- /dev/null +++ b/drivers/regulator/max77503-regulator.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2023 Analog Devices, Inc. + * ADI regulator driver for MAX77503. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define MAX77503_REG_CFG 0x00 +#define MAX77503_REG_VOUT 0x01 + +#define MAX77503_BIT_EN BIT(0) +#define MAX77503_BIT_CURR_LIM BIT(3) +#define MAX77503_BIT_ADEN BIT(6) + +#define MAX77503_BITS_SOFT_START GENMASK(5, 4) +#define MAX77503_BITS_MX_VOUT GENMASK(7, 0) + +#define MAX77503_AD_ENABLED 0x1 +#define MAX77503_AD_DISABLED 0x0 + +static const struct regmap_config max77503_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x2, +}; + +static const struct regulator_ops max77503_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_ascend, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_soft_start = regulator_set_soft_start_regmap, +}; + +static const struct linear_range max77503_buck_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x54, 50000) +}; + +static const unsigned int max77503_current_limit_table[] = { + 500000, 2000000 +}; + +static const struct regulator_desc max77503_regulators_desc = { + .name = "max77503", + .enable_reg = MAX77503_REG_CFG, + .enable_mask = MAX77503_BIT_EN, + .ops = &max77503_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = max77503_buck_ranges, + .n_linear_ranges = ARRAY_SIZE(max77503_buck_ranges), + .vsel_reg = MAX77503_REG_VOUT, + .vsel_mask = MAX77503_BITS_MX_VOUT, + .soft_start_reg = MAX77503_REG_CFG, + .soft_start_mask = MAX77503_BITS_SOFT_START, + .active_discharge_reg = MAX77503_REG_CFG, + .active_discharge_mask = MAX77503_BIT_ADEN, + .active_discharge_off = MAX77503_AD_DISABLED, + .active_discharge_on = MAX77503_AD_ENABLED, + .csel_reg = MAX77503_REG_CFG, + .csel_mask = MAX77503_BIT_CURR_LIM, + .curr_table = max77503_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77503_current_limit_table), + .owner = THIS_MODULE, +}; + +static int max77503_regulator_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct regulator_config config = {}; + struct regulator_dev *rdev; + + config.dev = dev; + config.of_node = dev->of_node; + config.regmap = devm_regmap_init_i2c(client, &max77503_regmap_config); + if (IS_ERR(config.regmap)) { + dev_err(dev, "Failed to init regmap"); + return PTR_ERR(config.regmap); + } + + rdev = devm_regulator_register(dev, &max77503_regulators_desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator MAX77503"); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id of_max77503_match_tbl[] = { + { .compatible = "adi,max77503", }, + { } +}; + +MODULE_DEVICE_TABLE(of, of_max77503_match_tbl); + +static const struct i2c_device_id max77503_regulator_id[] = { + { .name = "max77503" }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, max77503_regulator_id); + +static struct i2c_driver max77503_regulator_driver = { + .driver = { + .name = "max77503", + .of_match_table = of_max77503_match_tbl + }, + .probe = max77503_regulator_probe, + .id_table = max77503_regulator_id, +}; + +module_i2c_driver(max77503_regulator_driver); + +MODULE_AUTHOR("Gokhan Celik "); +MODULE_DESCRIPTION("MAX77503 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77541-regulator.c b/drivers/regulator/max77541-regulator.c new file mode 100644 index 000000000..09094a270 --- /dev/null +++ b/drivers/regulator/max77541-regulator.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022 Analog Devices, Inc. + * ADI Regulator driver for the MAX77540 and MAX77541 + */ + +#include +#include +#include +#include + +static const struct regulator_ops max77541_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, +}; + +static const struct linear_range max77540_buck_ranges[] = { + /* Ranges when VOLT_SEL bits are 0x00 */ + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x8B, 5000), + REGULATOR_LINEAR_RANGE(1200000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x40 */ + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x8B, 10000), + REGULATOR_LINEAR_RANGE(2400000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x80 */ + REGULATOR_LINEAR_RANGE(2000000, 0x00, 0x9F, 20000), + REGULATOR_LINEAR_RANGE(5200000, 0xA0, 0xFF, 0), +}; + +static const struct linear_range max77541_buck_ranges[] = { + /* Ranges when VOLT_SEL bits are 0x00 */ + REGULATOR_LINEAR_RANGE(300000, 0x00, 0xB3, 5000), + REGULATOR_LINEAR_RANGE(1200000, 0xB4, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x40 */ + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x8B, 10000), + REGULATOR_LINEAR_RANGE(2400000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x80 */ + REGULATOR_LINEAR_RANGE(2000000, 0x00, 0x9F, 20000), + REGULATOR_LINEAR_RANGE(5200000, 0xA0, 0xFF, 0), +}; + +static const unsigned int max77541_buck_volt_range_sel[] = { + 0x0, 0x0, 0x1, 0x1, 0x2, 0x2, +}; + +enum max77541_regulators { + MAX77541_BUCK1 = 1, + MAX77541_BUCK2, +}; + +#define MAX77540_BUCK(_id, _ops) \ + { .id = MAX77541_BUCK ## _id, \ + .name = "buck"#_id, \ + .of_match = "buck"#_id, \ + .regulators_node = "regulators", \ + .enable_reg = MAX77541_REG_EN_CTRL, \ + .enable_mask = MAX77541_BIT_M ## _id ## _EN, \ + .ops = &(_ops), \ + .type = REGULATOR_VOLTAGE, \ + .linear_ranges = max77540_buck_ranges, \ + .n_linear_ranges = ARRAY_SIZE(max77540_buck_ranges), \ + .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \ + .vsel_mask = MAX77541_BITS_MX_VOUT, \ + .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ + .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ + .linear_range_selectors_bitfield = max77541_buck_volt_range_sel, \ + .owner = THIS_MODULE, \ + } + +#define MAX77541_BUCK(_id, _ops) \ + { .id = MAX77541_BUCK ## _id, \ + .name = "buck"#_id, \ + .of_match = "buck"#_id, \ + .regulators_node = "regulators", \ + .enable_reg = MAX77541_REG_EN_CTRL, \ + .enable_mask = MAX77541_BIT_M ## _id ## _EN, \ + .ops = &(_ops), \ + .type = REGULATOR_VOLTAGE, \ + .linear_ranges = max77541_buck_ranges, \ + .n_linear_ranges = ARRAY_SIZE(max77541_buck_ranges), \ + .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \ + .vsel_mask = MAX77541_BITS_MX_VOUT, \ + .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ + .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ + .linear_range_selectors_bitfield = max77541_buck_volt_range_sel, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc max77540_regulators_desc[] = { + MAX77540_BUCK(1, max77541_buck_ops), + MAX77540_BUCK(2, max77541_buck_ops), +}; + +static const struct regulator_desc max77541_regulators_desc[] = { + MAX77541_BUCK(1, max77541_buck_ops), + MAX77541_BUCK(2, max77541_buck_ops), +}; + +static int max77541_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = {}; + const struct regulator_desc *desc; + struct device *dev = &pdev->dev; + struct regulator_dev *rdev; + struct max77541 *max77541 = dev_get_drvdata(dev->parent); + unsigned int i; + + config.dev = dev->parent; + + switch (max77541->id) { + case MAX77540: + desc = max77540_regulators_desc; + break; + case MAX77541: + desc = max77541_regulators_desc; + break; + default: + return -EINVAL; + } + + for (i = 0; i < MAX77541_MAX_REGULATORS; i++) { + rdev = devm_regulator_register(dev, &desc[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register regulator\n"); + } + + return 0; +} + +static const struct platform_device_id max77541_regulator_platform_id[] = { + { .name = "max77540-regulator" }, + { .name = "max77541-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, max77541_regulator_platform_id); + +static struct platform_driver max77541_regulator_driver = { + .driver = { + .name = "max77541-regulator", + }, + .probe = max77541_regulator_probe, + .id_table = max77541_regulator_platform_id, +}; +module_platform_driver(max77541_regulator_driver); + +MODULE_AUTHOR("Okan Sahin "); +MODULE_DESCRIPTION("MAX77540/MAX77541 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77620-regulator.c b/drivers/regulator/max77620-regulator.c new file mode 100644 index 000000000..5099c372e --- /dev/null +++ b/drivers/regulator/max77620-regulator.c @@ -0,0 +1,927 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Maxim MAX77620 Regulator driver + * + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * + * Author: Mallikarjun Kasoju + * Laxman Dewangan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define max77620_rails(_name) "max77620-"#_name + +/* Power Mode */ +#define MAX77620_POWER_MODE_NORMAL 3 +#define MAX77620_POWER_MODE_LPM 2 +#define MAX77620_POWER_MODE_GLPM 1 +#define MAX77620_POWER_MODE_DISABLE 0 + +/* SD Slew Rate */ +#define MAX77620_SD_SR_13_75 0 +#define MAX77620_SD_SR_27_5 1 +#define MAX77620_SD_SR_55 2 +#define MAX77620_SD_SR_100 3 + +enum max77620_regulators { + MAX77620_REGULATOR_ID_SD0, + MAX77620_REGULATOR_ID_SD1, + MAX77620_REGULATOR_ID_SD2, + MAX77620_REGULATOR_ID_SD3, + MAX77620_REGULATOR_ID_SD4, + MAX77620_REGULATOR_ID_LDO0, + MAX77620_REGULATOR_ID_LDO1, + MAX77620_REGULATOR_ID_LDO2, + MAX77620_REGULATOR_ID_LDO3, + MAX77620_REGULATOR_ID_LDO4, + MAX77620_REGULATOR_ID_LDO5, + MAX77620_REGULATOR_ID_LDO6, + MAX77620_REGULATOR_ID_LDO7, + MAX77620_REGULATOR_ID_LDO8, + MAX77620_NUM_REGS, +}; + +/* Regulator types */ +enum max77620_regulator_type { + MAX77620_REGULATOR_TYPE_SD, + MAX77620_REGULATOR_TYPE_LDO_N, + MAX77620_REGULATOR_TYPE_LDO_P, +}; + +struct max77620_regulator_info { + u8 type; + u8 fps_addr; + u8 volt_addr; + u8 cfg_addr; + u8 power_mode_mask; + u8 power_mode_shift; + u8 remote_sense_addr; + u8 remote_sense_mask; + struct regulator_desc desc; +}; + +struct max77620_regulator_pdata { + int active_fps_src; + int active_fps_pd_slot; + int active_fps_pu_slot; + int suspend_fps_src; + int suspend_fps_pd_slot; + int suspend_fps_pu_slot; + int current_mode; + int power_ok; + int ramp_rate_setting; +}; + +struct max77620_regulator { + struct device *dev; + struct regmap *rmap; + struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS]; + struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS]; + int enable_power_mode[MAX77620_NUM_REGS]; + int current_power_mode[MAX77620_NUM_REGS]; + int active_fps_src[MAX77620_NUM_REGS]; +}; + +#define fps_src_name(fps_src) \ + (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \ + fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \ + fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE") + +static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic, + int id) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int val; + int ret; + + ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", + rinfo->fps_addr, ret); + return ret; + } + + return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; +} + +static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, + int fps_src, int id) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int val; + int ret; + + if (!rinfo) + return 0; + + switch (fps_src) { + case MAX77620_FPS_SRC_0: + case MAX77620_FPS_SRC_1: + case MAX77620_FPS_SRC_2: + case MAX77620_FPS_SRC_NONE: + break; + + case MAX77620_FPS_SRC_DEF: + ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", + rinfo->fps_addr, ret); + return ret; + } + ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; + pmic->active_fps_src[id] = ret; + return 0; + + default: + dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n", + fps_src, id); + return -EINVAL; + } + + ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, + MAX77620_FPS_SRC_MASK, + fps_src << MAX77620_FPS_SRC_SHIFT); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x update failed %d\n", + rinfo->fps_addr, ret); + return ret; + } + pmic->active_fps_src[id] = fps_src; + + return 0; +} + +static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic, + int id, bool is_suspend) +{ + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int val = 0; + unsigned int mask = 0; + int pu = rpdata->active_fps_pu_slot; + int pd = rpdata->active_fps_pd_slot; + int ret = 0; + + if (!rinfo) + return 0; + + if (is_suspend) { + pu = rpdata->suspend_fps_pu_slot; + pd = rpdata->suspend_fps_pd_slot; + } + + /* FPS power up period setting */ + if (pu >= 0) { + val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT); + mask |= MAX77620_FPS_PU_PERIOD_MASK; + } + + /* FPS power down period setting */ + if (pd >= 0) { + val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT); + mask |= MAX77620_FPS_PD_PERIOD_MASK; + } + + if (mask) { + ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, + mask, val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", + rinfo->fps_addr, ret); + return ret; + } + } + + return ret; +} + +static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic, + int power_mode, int id) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + u8 mask = rinfo->power_mode_mask; + u8 shift = rinfo->power_mode_shift; + u8 addr; + int ret; + + switch (rinfo->type) { + case MAX77620_REGULATOR_TYPE_SD: + addr = rinfo->cfg_addr; + break; + default: + addr = rinfo->volt_addr; + break; + } + + ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift); + if (ret < 0) { + dev_err(pmic->dev, "Regulator %d mode set failed: %d\n", + id, ret); + return ret; + } + pmic->current_power_mode[id] = power_mode; + + return ret; +} + +static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic, + int id) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int val, addr; + u8 mask = rinfo->power_mode_mask; + u8 shift = rinfo->power_mode_shift; + int ret; + + switch (rinfo->type) { + case MAX77620_REGULATOR_TYPE_SD: + addr = rinfo->cfg_addr; + break; + default: + addr = rinfo->volt_addr; + break; + } + + ret = regmap_read(pmic->rmap, addr, &val); + if (ret < 0) { + dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n", + id, addr, ret); + return ret; + } + + return (val & mask) >> shift; +} + +static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int rval; + int slew_rate; + int ret; + + ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval); + if (ret < 0) { + dev_err(pmic->dev, "Register 0x%02x read failed: %d\n", + rinfo->cfg_addr, ret); + return ret; + } + + switch (rinfo->type) { + case MAX77620_REGULATOR_TYPE_SD: + slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3; + switch (slew_rate) { + case 0: + slew_rate = 13750; + break; + case 1: + slew_rate = 27500; + break; + case 2: + slew_rate = 55000; + break; + case 3: + slew_rate = 100000; + break; + } + rinfo->desc.ramp_delay = slew_rate; + break; + default: + slew_rate = rval & 0x1; + switch (slew_rate) { + case 0: + slew_rate = 100000; + break; + case 1: + slew_rate = 5000; + break; + } + rinfo->desc.ramp_delay = slew_rate; + break; + } + + return 0; +} + +static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id, + int slew_rate) +{ + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + unsigned int val; + int ret; + u8 mask; + + if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { + if (slew_rate <= 13750) + val = 0; + else if (slew_rate <= 27500) + val = 1; + else if (slew_rate <= 55000) + val = 2; + else + val = 3; + val <<= MAX77620_SD_SR_SHIFT; + mask = MAX77620_SD_SR_MASK; + } else { + if (slew_rate <= 5000) + val = 1; + else + val = 0; + mask = MAX77620_LDO_SLEW_RATE_MASK; + } + + ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val); + if (ret < 0) { + dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n", + id, ret); + return ret; + } + + return 0; +} + +static int max77620_config_power_ok(struct max77620_regulator *pmic, int id) +{ + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent); + u8 val, mask; + int ret; + + switch (chip->chip_id) { + case MAX20024: + if (rpdata->power_ok >= 0) { + if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) + mask = MAX20024_SD_CFG1_MPOK_MASK; + else + mask = MAX20024_LDO_CFG2_MPOK_MASK; + + val = rpdata->power_ok ? mask : 0; + + ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, + mask, val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x update failed %d\n", + rinfo->cfg_addr, ret); + return ret; + } + } + break; + + default: + break; + } + + return 0; +} + +static int max77620_init_pmic(struct max77620_regulator *pmic, int id) +{ + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; + int ret; + + max77620_config_power_ok(pmic, id); + + /* Update power mode */ + ret = max77620_regulator_get_power_mode(pmic, id); + if (ret < 0) + return ret; + + pmic->current_power_mode[id] = ret; + pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; + + if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) { + ret = max77620_regulator_get_fps_src(pmic, id); + if (ret < 0) + return ret; + rpdata->active_fps_src = ret; + } + + /* If rails are externally control of FPS then enable it always. */ + if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) { + ret = max77620_regulator_set_power_mode(pmic, + pmic->enable_power_mode[id], id); + if (ret < 0) + return ret; + } else { + if (pmic->current_power_mode[id] != + pmic->enable_power_mode[id]) { + ret = max77620_regulator_set_power_mode(pmic, + pmic->enable_power_mode[id], id); + if (ret < 0) + return ret; + } + } + + ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id); + if (ret < 0) + return ret; + + ret = max77620_regulator_set_fps_slots(pmic, id, false); + if (ret < 0) + return ret; + + if (rpdata->ramp_rate_setting) { + ret = max77620_set_slew_rate(pmic, id, + rpdata->ramp_rate_setting); + if (ret < 0) + return ret; + } + + return 0; +} + +static int max77620_regulator_enable(struct regulator_dev *rdev) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) + return 0; + + return max77620_regulator_set_power_mode(pmic, + pmic->enable_power_mode[id], id); +} + +static int max77620_regulator_disable(struct regulator_dev *rdev) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) + return 0; + + return max77620_regulator_set_power_mode(pmic, + MAX77620_POWER_MODE_DISABLE, id); +} + +static int max77620_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + int ret; + + if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) + return 1; + + ret = max77620_regulator_get_power_mode(pmic, id); + if (ret < 0) + return ret; + + if (ret != MAX77620_POWER_MODE_DISABLE) + return 1; + + return 0; +} + +static int max77620_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; + bool fpwm = false; + int power_mode; + int ret; + u8 val; + + switch (mode) { + case REGULATOR_MODE_FAST: + fpwm = true; + power_mode = MAX77620_POWER_MODE_NORMAL; + break; + + case REGULATOR_MODE_NORMAL: + power_mode = MAX77620_POWER_MODE_NORMAL; + break; + + case REGULATOR_MODE_IDLE: + power_mode = MAX77620_POWER_MODE_LPM; + break; + + default: + dev_err(pmic->dev, "Regulator %d mode %d is invalid\n", + id, mode); + return -EINVAL; + } + + if (rinfo->type != MAX77620_REGULATOR_TYPE_SD) + goto skip_fpwm; + + val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0; + ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, + MAX77620_SD_FPWM_MASK, val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", + rinfo->cfg_addr, ret); + return ret; + } + rpdata->current_mode = mode; + +skip_fpwm: + ret = max77620_regulator_set_power_mode(pmic, power_mode, id); + if (ret < 0) + return ret; + + pmic->enable_power_mode[id] = power_mode; + + return 0; +} + +static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct max77620_regulator_info *rinfo = pmic->rinfo[id]; + int fpwm = 0; + int ret; + int pm_mode, reg_mode; + unsigned int val; + + ret = max77620_regulator_get_power_mode(pmic, id); + if (ret < 0) + return 0; + + pm_mode = ret; + + if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { + ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val); + if (ret < 0) { + dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n", + rinfo->cfg_addr, ret); + return ret; + } + fpwm = !!(val & MAX77620_SD_FPWM_MASK); + } + + switch (pm_mode) { + case MAX77620_POWER_MODE_NORMAL: + case MAX77620_POWER_MODE_DISABLE: + if (fpwm) + reg_mode = REGULATOR_MODE_FAST; + else + reg_mode = REGULATOR_MODE_NORMAL; + break; + case MAX77620_POWER_MODE_LPM: + case MAX77620_POWER_MODE_GLPM: + reg_mode = REGULATOR_MODE_IDLE; + break; + default: + return 0; + } + + return reg_mode; +} + +static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev, + int ramp_delay) +{ + struct max77620_regulator *pmic = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; + + /* Device specific ramp rate setting tells that platform has + * different ramp rate from advertised value. In this case, + * do not configure anything and just return success. + */ + if (rpdata->ramp_rate_setting) + return 0; + + return max77620_set_slew_rate(pmic, id, ramp_delay); +} + +static int max77620_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct max77620_regulator *pmic = config->driver_data; + struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id]; + u32 pval; + int ret; + + ret = of_property_read_u32(np, "maxim,active-fps-source", &pval); + rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF; + + ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval); + rpdata->active_fps_pu_slot = (!ret) ? pval : -1; + + ret = of_property_read_u32( + np, "maxim,active-fps-power-down-slot", &pval); + rpdata->active_fps_pd_slot = (!ret) ? pval : -1; + + ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval); + rpdata->suspend_fps_src = (!ret) ? pval : -1; + + ret = of_property_read_u32( + np, "maxim,suspend-fps-power-up-slot", &pval); + rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1; + + ret = of_property_read_u32( + np, "maxim,suspend-fps-power-down-slot", &pval); + rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1; + + ret = of_property_read_u32(np, "maxim,power-ok-control", &pval); + if (!ret) + rpdata->power_ok = pval; + else + rpdata->power_ok = -1; + + ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval); + rpdata->ramp_rate_setting = (!ret) ? pval : 0; + + return max77620_init_pmic(pmic, desc->id); +} + +static const struct regulator_ops max77620_regulator_ops = { + .is_enabled = max77620_regulator_is_enabled, + .enable = max77620_regulator_enable, + .disable = max77620_regulator_disable, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_mode = max77620_regulator_set_mode, + .get_mode = max77620_regulator_get_mode, + .set_ramp_delay = max77620_regulator_set_ramp_delay, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +#define MAX77620_SD_CNF2_ROVS_EN_NONE 0 +#define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \ + _step_uV, _rs_add, _rs_mask) \ + [MAX77620_REGULATOR_ID_##_id] = { \ + .type = MAX77620_REGULATOR_TYPE_SD, \ + .volt_addr = MAX77620_REG_##_id, \ + .cfg_addr = MAX77620_REG_##_id##_CFG, \ + .fps_addr = MAX77620_REG_FPS_##_id, \ + .remote_sense_addr = _rs_add, \ + .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \ + .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \ + .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \ + .desc = { \ + .name = max77620_rails(_name), \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = max77620_of_parse_cb, \ + .supply_name = _sname, \ + .id = MAX77620_REGULATOR_ID_##_id, \ + .ops = &max77620_regulator_ops, \ + .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ + .min_uV = _min_uV, \ + .uV_step = _step_uV, \ + .enable_time = 500, \ + .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \ + .vsel_reg = MAX77620_REG_##_id, \ + .active_discharge_off = 0, \ + .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \ + .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \ + .active_discharge_reg = MAX77620_REG_##_id##_CFG, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +#define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \ + [MAX77620_REGULATOR_ID_##_id] = { \ + .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \ + .volt_addr = MAX77620_REG_##_id##_CFG, \ + .cfg_addr = MAX77620_REG_##_id##_CFG2, \ + .fps_addr = MAX77620_REG_FPS_##_id, \ + .remote_sense_addr = 0xFF, \ + .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \ + .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \ + .desc = { \ + .name = max77620_rails(_name), \ + .of_match = of_match_ptr(#_name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = max77620_of_parse_cb, \ + .supply_name = _sname, \ + .id = MAX77620_REGULATOR_ID_##_id, \ + .ops = &max77620_regulator_ops, \ + .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ + .min_uV = _min_uV, \ + .uV_step = _step_uV, \ + .enable_time = 500, \ + .vsel_mask = MAX77620_LDO_VOLT_MASK, \ + .vsel_reg = MAX77620_REG_##_id##_CFG, \ + .active_discharge_off = 0, \ + .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \ + .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \ + .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = { + RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0), + RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1), + RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), + RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), + + RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), + RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), + RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), + RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), + RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), +}; + +static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = { + RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0), + RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1), + RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), + RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), + RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), + + RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), + RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), + RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), + RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), + RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), +}; + +static struct max77620_regulator_info max77663_regs_info[MAX77620_NUM_REGS] = { + RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE), + RAIL_SD(SD1, sd1, "in-sd1", SD1, 800000, 1587500, 12500, 0xFF, NONE), + RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), + RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), + RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), + + RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), + RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), + RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), + RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), + RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), + RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), + RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), +}; + +static int max77620_regulator_probe(struct platform_device *pdev) +{ + struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent); + struct max77620_regulator_info *rinfo; + struct device *dev = &pdev->dev; + struct regulator_config config = { }; + struct max77620_regulator *pmic; + int ret = 0; + int id; + + pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + platform_set_drvdata(pdev, pmic); + pmic->dev = dev; + pmic->rmap = max77620_chip->rmap; + + switch (max77620_chip->chip_id) { + case MAX77620: + rinfo = max77620_regs_info; + break; + case MAX20024: + rinfo = max20024_regs_info; + break; + case MAX77663: + rinfo = max77663_regs_info; + break; + default: + return -EINVAL; + } + + config.regmap = pmic->rmap; + config.dev = dev; + config.driver_data = pmic; + + /* + * Set of_node_reuse flag to prevent driver core from attempting to + * claim any pinmux resources already claimed by the parent device. + * Otherwise PMIC driver will fail to re-probe. + */ + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + for (id = 0; id < MAX77620_NUM_REGS; id++) { + struct regulator_dev *rdev; + struct regulator_desc *rdesc; + + if ((max77620_chip->chip_id == MAX77620) && + (id == MAX77620_REGULATOR_ID_SD4)) + continue; + + rdesc = &rinfo[id].desc; + pmic->rinfo[id] = &rinfo[id]; + pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; + pmic->reg_pdata[id].active_fps_src = -1; + pmic->reg_pdata[id].active_fps_pd_slot = -1; + pmic->reg_pdata[id].active_fps_pu_slot = -1; + pmic->reg_pdata[id].suspend_fps_src = -1; + pmic->reg_pdata[id].suspend_fps_pd_slot = -1; + pmic->reg_pdata[id].suspend_fps_pu_slot = -1; + pmic->reg_pdata[id].power_ok = -1; + pmic->reg_pdata[id].ramp_rate_setting = -1; + + ret = max77620_read_slew_rate(pmic, id); + if (ret < 0) + return ret; + + rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Regulator registration %s failed\n", + rdesc->name); + } + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int max77620_regulator_suspend(struct device *dev) +{ + struct max77620_regulator *pmic = dev_get_drvdata(dev); + struct max77620_regulator_pdata *reg_pdata; + int id; + + for (id = 0; id < MAX77620_NUM_REGS; id++) { + reg_pdata = &pmic->reg_pdata[id]; + + max77620_regulator_set_fps_slots(pmic, id, true); + if (reg_pdata->suspend_fps_src < 0) + continue; + + max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src, + id); + } + + return 0; +} + +static int max77620_regulator_resume(struct device *dev) +{ + struct max77620_regulator *pmic = dev_get_drvdata(dev); + struct max77620_regulator_pdata *reg_pdata; + int id; + + for (id = 0; id < MAX77620_NUM_REGS; id++) { + reg_pdata = &pmic->reg_pdata[id]; + + max77620_config_power_ok(pmic, id); + + max77620_regulator_set_fps_slots(pmic, id, false); + if (reg_pdata->active_fps_src < 0) + continue; + max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src, + id); + } + + return 0; +} +#endif + +static const struct dev_pm_ops max77620_regulator_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend, + max77620_regulator_resume) +}; + +static const struct platform_device_id max77620_regulator_devtype[] = { + { .name = "max77620-pmic" }, + { .name = "max20024-pmic" }, + { .name = "max77663-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype); + +static struct platform_driver max77620_regulator_driver = { + .probe = max77620_regulator_probe, + .id_table = max77620_regulator_devtype, + .driver = { + .name = "max77620-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .pm = &max77620_regulator_pm_ops, + }, +}; + +module_platform_driver(max77620_regulator_driver); + +MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver"); +MODULE_AUTHOR("Mallikarjun Kasoju "); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/max77650-regulator.c b/drivers/regulator/max77650-regulator.c new file mode 100644 index 000000000..11b04a13f --- /dev/null +++ b/drivers/regulator/max77650-regulator.c @@ -0,0 +1,405 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2018 BayLibre SAS +// Author: Bartosz Golaszewski +// +// Regulator driver for MAXIM 77650/77651 charger/power-supply. + +#include +#include +#include +#include +#include +#include + +#define MAX77650_REGULATOR_EN_CTRL_MASK GENMASK(3, 0) +#define MAX77650_REGULATOR_EN_CTRL_BITS(_reg) \ + ((_reg) & MAX77650_REGULATOR_EN_CTRL_MASK) +#define MAX77650_REGULATOR_ENABLED GENMASK(2, 1) +#define MAX77650_REGULATOR_DISABLED BIT(2) + +#define MAX77650_REGULATOR_V_LDO_MASK GENMASK(6, 0) +#define MAX77650_REGULATOR_V_SBB_MASK GENMASK(5, 0) +#define MAX77651_REGULATOR_V_SBB1_MASK GENMASK(5, 2) +#define MAX77651_REGULATOR_V_SBB1_RANGE_MASK GENMASK(1, 0) + +#define MAX77650_REGULATOR_AD_MASK BIT(3) +#define MAX77650_REGULATOR_AD_DISABLED 0x00 +#define MAX77650_REGULATOR_AD_ENABLED BIT(3) + +#define MAX77650_REGULATOR_CURR_LIM_MASK GENMASK(7, 6) + +enum { + MAX77650_REGULATOR_ID_LDO = 0, + MAX77650_REGULATOR_ID_SBB0, + MAX77650_REGULATOR_ID_SBB1, + MAX77650_REGULATOR_ID_SBB2, + MAX77650_REGULATOR_NUM_REGULATORS, +}; + +struct max77650_regulator_desc { + struct regulator_desc desc; + unsigned int regA; + unsigned int regB; +}; + +static const unsigned int max77651_sbb1_volt_range_sel[] = { + 0x0, 0x1, 0x2, 0x3 +}; + +static const struct linear_range max77651_sbb1_volt_ranges[] = { + /* range index 0 */ + REGULATOR_LINEAR_RANGE(2400000, 0x00, 0x0f, 50000), + /* range index 1 */ + REGULATOR_LINEAR_RANGE(3200000, 0x00, 0x0f, 50000), + /* range index 2 */ + REGULATOR_LINEAR_RANGE(4000000, 0x00, 0x0f, 50000), + /* range index 3 */ + REGULATOR_LINEAR_RANGE(4800000, 0x00, 0x09, 50000), +}; + +static const unsigned int max77650_current_limit_table[] = { + 1000000, 866000, 707000, 500000, +}; + +static int max77650_regulator_is_enabled(struct regulator_dev *rdev) +{ + const struct max77650_regulator_desc *rdesc; + struct regmap *map; + int val, rv, en; + + rdesc = container_of_const(rdev->desc, struct max77650_regulator_desc, desc); + map = rdev_get_regmap(rdev); + + rv = regmap_read(map, rdesc->regB, &val); + if (rv) + return rv; + + en = MAX77650_REGULATOR_EN_CTRL_BITS(val); + + return en != MAX77650_REGULATOR_DISABLED; +} + +static int max77650_regulator_enable(struct regulator_dev *rdev) +{ + const struct max77650_regulator_desc *rdesc; + struct regmap *map; + + rdesc = container_of_const(rdev->desc, struct max77650_regulator_desc, desc); + map = rdev_get_regmap(rdev); + + return regmap_update_bits(map, rdesc->regB, + MAX77650_REGULATOR_EN_CTRL_MASK, + MAX77650_REGULATOR_ENABLED); +} + +static int max77650_regulator_disable(struct regulator_dev *rdev) +{ + const struct max77650_regulator_desc *rdesc; + struct regmap *map; + + rdesc = container_of_const(rdev->desc, struct max77650_regulator_desc, desc); + map = rdev_get_regmap(rdev); + + return regmap_update_bits(map, rdesc->regB, + MAX77650_REGULATOR_EN_CTRL_MASK, + MAX77650_REGULATOR_DISABLED); +} + +static const struct regulator_ops max77650_regulator_LDO_ops = { + .is_enabled = max77650_regulator_is_enabled, + .enable = max77650_regulator_enable, + .disable = max77650_regulator_disable, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops max77650_regulator_SBB_ops = { + .is_enabled = max77650_regulator_is_enabled, + .enable = max77650_regulator_enable, + .disable = max77650_regulator_disable, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +/* Special case for max77651 SBB1 - pickable linear-range voltage mapping. */ +static const struct regulator_ops max77651_SBB1_regulator_ops = { + .is_enabled = max77650_regulator_is_enabled, + .enable = max77650_regulator_enable, + .disable = max77650_regulator_disable, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct max77650_regulator_desc max77650_LDO_desc = { + .desc = { + .name = "ldo", + .of_match = of_match_ptr("ldo"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-ldo", + .id = MAX77650_REGULATOR_ID_LDO, + .ops = &max77650_regulator_LDO_ops, + .min_uV = 1350000, + .uV_step = 12500, + .n_voltages = 128, + .vsel_step = 1, + .vsel_mask = MAX77650_REGULATOR_V_LDO_MASK, + .vsel_reg = MAX77650_REG_CNFG_LDO_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_LDO_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + .regA = MAX77650_REG_CNFG_LDO_A, + .regB = MAX77650_REG_CNFG_LDO_B, +}; + +static const struct max77650_regulator_desc max77650_SBB0_desc = { + .desc = { + .name = "sbb0", + .of_match = of_match_ptr("sbb0"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-sbb0", + .id = MAX77650_REGULATOR_ID_SBB0, + .ops = &max77650_regulator_SBB_ops, + .min_uV = 800000, + .uV_step = 25000, + .n_voltages = 64, + .vsel_step = 1, + .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, + .vsel_reg = MAX77650_REG_CNFG_SBB0_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_SBB0_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .csel_reg = MAX77650_REG_CNFG_SBB0_A, + .csel_mask = MAX77650_REGULATOR_CURR_LIM_MASK, + .curr_table = max77650_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77650_current_limit_table), + }, + .regA = MAX77650_REG_CNFG_SBB0_A, + .regB = MAX77650_REG_CNFG_SBB0_B, +}; + +static const struct max77650_regulator_desc max77650_SBB1_desc = { + .desc = { + .name = "sbb1", + .of_match = of_match_ptr("sbb1"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-sbb1", + .id = MAX77650_REGULATOR_ID_SBB1, + .ops = &max77650_regulator_SBB_ops, + .min_uV = 800000, + .uV_step = 12500, + .n_voltages = 64, + .vsel_step = 1, + .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, + .vsel_reg = MAX77650_REG_CNFG_SBB1_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_SBB1_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .csel_reg = MAX77650_REG_CNFG_SBB1_A, + .csel_mask = MAX77650_REGULATOR_CURR_LIM_MASK, + .curr_table = max77650_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77650_current_limit_table), + }, + .regA = MAX77650_REG_CNFG_SBB1_A, + .regB = MAX77650_REG_CNFG_SBB1_B, +}; + +static const struct max77650_regulator_desc max77651_SBB1_desc = { + .desc = { + .name = "sbb1", + .of_match = of_match_ptr("sbb1"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-sbb1", + .id = MAX77650_REGULATOR_ID_SBB1, + .ops = &max77651_SBB1_regulator_ops, + .linear_range_selectors_bitfield = max77651_sbb1_volt_range_sel, + .linear_ranges = max77651_sbb1_volt_ranges, + .n_linear_ranges = ARRAY_SIZE(max77651_sbb1_volt_ranges), + .n_voltages = 58, + .vsel_step = 1, + .vsel_range_mask = MAX77651_REGULATOR_V_SBB1_RANGE_MASK, + .vsel_range_reg = MAX77650_REG_CNFG_SBB1_A, + .vsel_mask = MAX77651_REGULATOR_V_SBB1_MASK, + .vsel_reg = MAX77650_REG_CNFG_SBB1_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_SBB1_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .csel_reg = MAX77650_REG_CNFG_SBB1_A, + .csel_mask = MAX77650_REGULATOR_CURR_LIM_MASK, + .curr_table = max77650_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77650_current_limit_table), + }, + .regA = MAX77650_REG_CNFG_SBB1_A, + .regB = MAX77650_REG_CNFG_SBB1_B, +}; + +static const struct max77650_regulator_desc max77650_SBB2_desc = { + .desc = { + .name = "sbb2", + .of_match = of_match_ptr("sbb2"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-sbb0", + .id = MAX77650_REGULATOR_ID_SBB2, + .ops = &max77650_regulator_SBB_ops, + .min_uV = 800000, + .uV_step = 50000, + .n_voltages = 64, + .vsel_step = 1, + .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, + .vsel_reg = MAX77650_REG_CNFG_SBB2_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_SBB2_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .csel_reg = MAX77650_REG_CNFG_SBB2_A, + .csel_mask = MAX77650_REGULATOR_CURR_LIM_MASK, + .curr_table = max77650_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77650_current_limit_table), + }, + .regA = MAX77650_REG_CNFG_SBB2_A, + .regB = MAX77650_REG_CNFG_SBB2_B, +}; + +static const struct max77650_regulator_desc max77651_SBB2_desc = { + .desc = { + .name = "sbb2", + .of_match = of_match_ptr("sbb2"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "in-sbb0", + .id = MAX77650_REGULATOR_ID_SBB2, + .ops = &max77650_regulator_SBB_ops, + .min_uV = 2400000, + .uV_step = 50000, + .n_voltages = 64, + .vsel_step = 1, + .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, + .vsel_reg = MAX77650_REG_CNFG_SBB2_A, + .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, + .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, + .active_discharge_mask = MAX77650_REGULATOR_AD_MASK, + .active_discharge_reg = MAX77650_REG_CNFG_SBB2_B, + .enable_time = 100, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .csel_reg = MAX77650_REG_CNFG_SBB2_A, + .csel_mask = MAX77650_REGULATOR_CURR_LIM_MASK, + .curr_table = max77650_current_limit_table, + .n_current_limits = ARRAY_SIZE(max77650_current_limit_table), + }, + .regA = MAX77650_REG_CNFG_SBB2_A, + .regB = MAX77650_REG_CNFG_SBB2_B, +}; + +static int max77650_regulator_probe(struct platform_device *pdev) +{ + const struct max77650_regulator_desc **rdescs; + const struct max77650_regulator_desc *rdesc; + struct regulator_config config = { }; + struct device *dev, *parent; + struct regulator_dev *rdev; + struct regmap *map; + unsigned int val; + int i, rv; + + dev = &pdev->dev; + parent = dev->parent; + + if (!dev->of_node) + device_set_of_node_from_dev(dev, parent); + + rdescs = devm_kcalloc(dev, MAX77650_REGULATOR_NUM_REGULATORS, + sizeof(*rdescs), GFP_KERNEL); + if (!rdescs) + return -ENOMEM; + + map = dev_get_regmap(parent, NULL); + if (!map) + return -ENODEV; + + rv = regmap_read(map, MAX77650_REG_CID, &val); + if (rv) + return rv; + + rdescs[MAX77650_REGULATOR_ID_LDO] = &max77650_LDO_desc; + rdescs[MAX77650_REGULATOR_ID_SBB0] = &max77650_SBB0_desc; + + switch (MAX77650_CID_BITS(val)) { + case MAX77650_CID_77650A: + case MAX77650_CID_77650C: + rdescs[MAX77650_REGULATOR_ID_SBB1] = &max77650_SBB1_desc; + rdescs[MAX77650_REGULATOR_ID_SBB2] = &max77650_SBB2_desc; + break; + case MAX77650_CID_77651A: + case MAX77650_CID_77651B: + rdescs[MAX77650_REGULATOR_ID_SBB1] = &max77651_SBB1_desc; + rdescs[MAX77650_REGULATOR_ID_SBB2] = &max77651_SBB2_desc; + break; + default: + return -ENODEV; + } + + config.dev = parent; + + for (i = 0; i < MAX77650_REGULATOR_NUM_REGULATORS; i++) { + rdesc = rdescs[i]; + + rdev = devm_regulator_register(dev, &rdesc->desc, &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id max77650_regulator_of_match[] = { + { .compatible = "maxim,max77650-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(of, max77650_regulator_of_match); + +static struct platform_driver max77650_regulator_driver = { + .driver = { + .name = "max77650-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = max77650_regulator_of_match, + }, + .probe = max77650_regulator_probe, +}; +module_platform_driver(max77650_regulator_driver); + +MODULE_DESCRIPTION("MAXIM 77650/77651 regulator driver"); +MODULE_AUTHOR("Bartosz Golaszewski "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:max77650-regulator"); diff --git a/drivers/regulator/max77675-regulator.c b/drivers/regulator/max77675-regulator.c new file mode 100644 index 000000000..23b54b44f --- /dev/null +++ b/drivers/regulator/max77675-regulator.c @@ -0,0 +1,1055 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2025 Analog Devices, Inc. + * ADI regulator driver for MAX77675. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register Addresses */ +#define MAX77675_REG_CNFG_GLBL_A 0x00 +#define MAX77675_REG_CNFG_GLBL_B 0x01 +#define MAX77675_REG_INT_GLBL 0x02 +#define MAX77675_REG_INTM_GLBL 0x03 +#define MAX77675_REG_STAT_GLBL 0x04 +#define MAX77675_REG_ERCF_GLBL 0x05 +#define MAX77675_REG_CID 0x06 +#define MAX77675_REG_CNFG_SBB_TOP_A 0x07 +#define MAX77675_REG_CNFG_SBB0_A 0x08 +#define MAX77675_REG_CNFG_SBB0_B 0x09 +#define MAX77675_REG_CNFG_SBB1_A 0x0A +#define MAX77675_REG_CNFG_SBB1_B 0x0B +#define MAX77675_REG_CNFG_SBB2_A 0x0C +#define MAX77675_REG_CNFG_SBB2_B 0x0D +#define MAX77675_REG_CNFG_SBB3_A 0x0E +#define MAX77675_REG_CNFG_SBB3_B 0x0F +#define MAX77675_REG_CNFG_SBB_TOP_B 0x10 + +/* CNFG_GLBL_A (0x00) bit masks and shifts */ +#define MAX77675_MRT_MASK GENMASK(7, 6) /* Manual Reset Time (bits 7:6) */ +#define MAX77675_MRT_SHIFT 6 +#define MAX77675_PU_DIS_BIT BIT(5) /* Pullup Disable (bit 5) */ +#define MAX77675_PU_DIS_SHIFT 5 +#define MAX77675_BIAS_LPM_BIT BIT(4) /* Bias Low Power Mode (bit 4) */ +#define MAX77675_BIAS_LPM_SHIFT 4 +#define MAX77675_SIMO_CH_DIS_BIT BIT(3) /* SIMO Internal Channel Disable (bit 3) */ +#define MAX77675_SIMO_CH_DIS_SHIFT 3 +#define MAX77675_EN_MODE_MASK GENMASK(2, 1) /* nEN Mode (bits 2:1) */ +#define MAX77675_EN_MODE_SHIFT 1 +#define MAX77675_DBEN_EN_BIT BIT(0) /* Debounce Enable (bit 0) */ +#define MAX77675_DBEN_EN_SHIFT 0 + +/* CNFG_GLBL_B (0x01) */ +#define MAX77675_SFT_CTRL_MASK GENMASK(2, 0) /* Soft Start Control */ +#define MAX77675_SFT_CTRL_SHIFT 0 + +/* INT_GLBL (0x02) bit bits and shifts */ +#define MAX77675_INT_SBB3_F_BIT BIT(7) +#define MAX77675_INT_SBB3_F_SHIFT 7 +#define MAX77675_INT_SBB2_F_BIT BIT(6) +#define MAX77675_INT_SBB2_F_SHIFT 6 +#define MAX77675_INT_SBB1_F_BIT BIT(5) +#define MAX77675_INT_SBB1_F_SHIFT 5 +#define MAX77675_INT_SBB0_F_BIT BIT(4) +#define MAX77675_INT_SBB0_F_SHIFT 4 +#define MAX77675_INT_TJAL2_R_BIT BIT(3) +#define MAX77675_INT_TJAL2_R_SHIFT 3 +#define MAX77675_INT_TJAL1_R_BIT BIT(2) +#define MAX77675_INT_TJAL1_R_SHIFT 2 +#define MAX77675_INT_EN_R_BIT BIT(1) +#define MAX77675_INT_EN_R_SHIFT 1 +#define MAX77675_INT_EN_F_BIT BIT(0) +#define MAX77675_INT_EN_F_SHIFT 0 + +/* INTM_GLBL (0x03) bits and shifts */ +#define MAX77675_INTM_SBB3_F_BIT BIT(7) +#define MAX77675_INTM_SBB3_F_SHIFT 7 +#define MAX77675_INTM_SBB2_F_BIT BIT(6) +#define MAX77675_INTM_SBB2_F_SHIFT 6 +#define MAX77675_INTM_SBB1_F_BIT BIT(5) +#define MAX77675_INTM_SBB1_F_SHIFT 5 +#define MAX77675_INTM_SBB0_F_BIT BIT(4) +#define MAX77675_INTM_SBB0_F_SHIFT 4 +#define MAX77675_INTM_TJAL2_R_BIT BIT(3) +#define MAX77675_INTM_TJAL2_R_SHIFT 3 +#define MAX77675_INTM_TJAL1_R_BIT BIT(2) +#define MAX77675_INTM_TJAL1_R_SHIFT 2 +#define MAX77675_INTM_EN_R_BIT BIT(1) +#define MAX77675_INTM_EN_R_SHIFT 1 +#define MAX77675_INTM_EN_F_BIT BIT(0) +#define MAX77675_INTM_EN_F_SHIFT 0 + +/* STAT_GLBL (0x04) bits and shifts */ +#define MAX77675_STAT_SBB3_S_BIT BIT(7) +#define MAX77675_STAT_SBB3_S_SHIFT 7 +#define MAX77675_STAT_SBB2_S_BIT BIT(6) +#define MAX77675_STAT_SBB2_S_SHIFT 6 +#define MAX77675_STAT_SBB1_S_BIT BIT(5) +#define MAX77675_STAT_SBB1_S_SHIFT 5 +#define MAX77675_STAT_SBB0_S_BIT BIT(4) +#define MAX77675_STAT_SBB0_S_SHIFT 4 +#define MAX77675_STAT_TJAL2_S_BIT BIT(2) +#define MAX77675_STAT_TJAL2_S_SHIFT 2 +#define MAX77675_STAT_TJAL1_S_BIT BIT(1) +#define MAX77675_STAT_TJAL1_S_SHIFT 1 +#define MAX77675_STAT_STAT_EN_BIT BIT(0) +#define MAX77675_STAT_STAT_EN_SHIFT 0 + +#define MAX77675_STAT_STAT_EN_BIT BIT(0) +#define MAX77675_STAT_STAT_EN_SHIFT 0 + +/* ERCFLAG (0x05) bits and shifts */ +#define MAX77675_SFT_CRST_F_BIT BIT(5) /* Software Cold Reset Flag */ +#define MAX77675_SFT_CRST_F_SHIFT 5 +#define MAX77675_SFT_OFF_F_BIT BIT(4) /* Software Off Flag */ +#define MAX77675_SFT_OFF_F_SHIFT 4 +#define MAX77675_MRST_BIT BIT(3) /* Manual Reset Timer Flag */ +#define MAX77675_MRST_SHIFT 3 +#define MAX77675_UVLO_BIT BIT(2) /* Undervoltage Lockout Flag */ +#define MAX77675_UVLO_SHIFT 2 +#define MAX77675_OVLO_BIT BIT(1) /* Overvoltage Lockout Flag */ +#define MAX77675_OVLO_SHIFT 1 +#define MAX77675_TOVLD_BIT BIT(0) /* Thermal Overload Flag */ +#define MAX77675_TOVLD_SHIFT 0 + +/* CID (0x06) bits and shifts */ +#define MAX77675_CID_MASK GENMASK(4, 0) /* Chip Identification Code mask */ +#define MAX77675_CID_SHIFT 0 /* Starts at bit 0 */ + +/* CNFG_SBB_TOP_A (0x07) bits and shifts */ +#define MAX77675_STEP_SZ_SBB3_BIT BIT(5) +#define MAX77675_STEP_SZ_SBB3_SHIFT 5 +#define MAX77675_STEP_SZ_SBB2_BIT BIT(4) +#define MAX77675_STEP_SZ_SBB2_SHIFT 4 +#define MAX77675_STEP_SZ_SBB1_BIT BIT(3) +#define MAX77675_STEP_SZ_SBB1_SHIFT 3 +#define MAX77675_STEP_SZ_SBB0_BIT BIT(2) +#define MAX77675_STEP_SZ_SBB0_SHIFT 2 +#define MAX77675_DRV_SBB_MASK GENMASK(1, 0) +#define MAX77675_DRV_SBB_SHIFT 0 + +/* CNFG_SBB0_A (0x08) bits and shifts */ +#define MAX77675_TV_SBB0_MASK GENMASK(7, 0) +#define MAX77675_TV_SBB0_SHIFT 0 + +/* CNFG_SBB0_B (0x09) bits and shifts */ +#define MAX77675_ADE_SBB0_BIT BIT(3) +#define MAX77675_ADE_SBB0_SHIFT 3 +#define MAX77675_EN_SBB0_MASK GENMASK(2, 0) +#define MAX77675_EN_SBB0_SHIFT 0 + +/* CNFG_SBB1_A (0x0A) bits and shifts */ +#define MAX77675_TV_SBB1_MASK GENMASK(7, 0) +#define MAX77675_TV_SBB1_SHIFT 0 + +/* CNFG_SBB1_B (0x0B) bits and shifts */ +#define MAX77675_ADE_SBB1_BIT BIT(3) +#define MAX77675_ADE_SBB1_SHIFT 3 +#define MAX77675_EN_SBB1_MASK GENMASK(2, 0) +#define MAX77675_EN_SBB1_SHIFT 0 + +/* CNFG_SBB2_A (0x0C) bits and shifts */ +#define MAX77675_TV_SBB2_MASK GENMASK(7, 0) +#define MAX77675_TV_SBB2_SHIFT 0 + +/* CNFG_SBB2_B (0x0D) bits and shifts */ +#define MAX77675_ADE_SBB2_BIT BIT(3) +#define MAX77675_ADE_SBB2_SHIFT 3 +#define MAX77675_EN_SBB2_MASK GENMASK(2, 0) +#define MAX77675_EN_SBB2_SHIFT 0 + +/* CNFG_SBB3_A (0x0E) bits and shifts */ +#define MAX77675_TV_SBB3_MASK GENMASK(7, 0) +#define MAX77675_TV_SBB3_SHIFT 0 + +/* CNFG_SBB3_B (0x0F) bits and shifts */ +#define MAX77675_ADE_SBB3_BIT BIT(3) +#define MAX77675_ADE_SBB3_SHIFT 3 +#define MAX77675_EN_SBB3_MASK GENMASK(2, 0) +#define MAX77675_EN_SBB3_SHIFT 0 + +#define MAX77675_EN_SBB_MASK GENMASK(2, 0) + +/* CNFG_SBB_TOP_B (0x10) bits and shifts */ +#define MAX77675_DVS_SLEW_BIT BIT(5) +#define MAX77675_DVS_SLEW_SHIFT 5 +#define MAX77675_LAT_MODE_BIT BIT(4) +#define MAX77675_LAT_MODE_SHIFT 4 +#define MAX77675_SR_SBB3_BIT BIT(3) +#define MAX77675_SR_SBB3_SHIFT 3 +#define MAX77675_SR_SBB2_BIT BIT(2) +#define MAX77675_SR_SBB2_SHIFT 2 +#define MAX77675_SR_SBB1_BIT BIT(1) +#define MAX77675_SR_SBB1_SHIFT 1 +#define MAX77675_SR_SBB0_BIT BIT(0) +#define MAX77675_SR_SBB0_SHIFT 0 + +#define MAX77675_MAX_REGISTER 0x10 + +/* Common minimum voltage (in microvolts) */ +#define MAX77675_MIN_UV 500000 // 500 mV + +/* Voltage step configuration for 25mV mode */ +#define MAX77675_STEP_25MV 25000 // Step size: 25 mV +#define MAX77675_MAX_UV_25MV 5500000 // Max voltage: 5.5 V +#define MAX77675_NUM_LEVELS_25MV 201 // levels = (5500mV - 500mV) / 25mV + 1 + +/* Voltage step configuration for 12.5mV mode */ +#define MAX77675_STEP_12_5MV 12500 // Step size: 12.5 mV +#define MAX77675_MAX_UV_12_5MV 3687500 // Max voltage: 3.6875 V +#define MAX77675_NUM_LEVELS_12_5MV 255 // levels = (3687.5mV - 500mV) / 12.5mV + 1 + +#define MAX77675_ENABLE_OFF 0x04 +#define MAX77675_ENABLE_ON 0x06 + +#define MAX77675_REGULATOR_AD_OFF 0x00 +#define MAX77675_REGULATOR_AD_ON BIT(3) + +/* FPS source */ +#define MAX77675_FPS_SLOT_0 0x0 +#define MAX77675_FPS_SLOT_1 0x1 +#define MAX77675_FPS_SLOT_2 0x2 +#define MAX77675_FPS_SLOT_3 0x3 +#define MAX77675_FPS_DEF 0x4 + +/* nEN Manual Reset Time Configuration (MRT) */ +#define MAX77675_MRT_4S 0x0 +#define MAX77675_MRT_8S 0x1 +#define MAX77675_MRT_12S 0x2 +#define MAX77675_MRT_16S 0x3 + +/* nEN Mode Configuration */ +#define MAX77675_EN_PUSH_BUTTON 0x0 +#define MAX77675_EN_SLIDE_SWITCH 0x1 +#define MAX77675_EN_LOGIC 0x2 + +/* Debounce Timer Enable (DBEN_nEN) */ +#define MAX77675_DBEN_100US 0x0 +#define MAX77675_DBEN_30000US 0x1 + +/* Rising slew rate control for SBB0 when ramping up */ +#define MAX77675_SR_2MV_PER_US 0x0 // 2 mV/us +#define MAX77675_SR_USE_DVS 0x1 // Use DVS slew rate setting (adi,dvs-slew-rate) + +/* Latency Mode */ +#define MAX77675_HIGH_LATENCY_MODE 0x0 // High latency, low quiescent current (~100us) +#define MAX77675_LOW_LATENCY_MODE 0x1 // Low latency, high quiescent current (~10us) + +/* Dynamic Voltage Scaling (DVS) Slew Rate */ +#define MAX77675_DVS_SLEW_5MV_PER_US 0x0 // 5 mV/us +#define MAX77675_DVS_SLEW_10MV_PER_US 0x1 // 10 mV/us + +/* SIMO Buck-Boost Drive Strength (All Channels) */ +#define MAX77675_DRV_SBB_STRENGTH_MAX 0x0 // Maximum drive strength (~0.6 ns transition time) +#define MAX77675_DRV_SBB_STRENGTH_HIGH 0x1 // High drive strength (~1.2 ns transition time) +#define MAX77675_DRV_SBB_STRENGTH_LOW 0x2 // Low drive strength (~1.8 ns transition time) +#define MAX77675_DRV_SBB_STRENGTH_MIN 0x3 // Minimum drive strength (~8 ns transition time) + +/* Regulator ID enumeration */ +enum max77675_regulator_id { + MAX77675_ID_SBB0 = 0, + MAX77675_ID_SBB1, + MAX77675_ID_SBB2, + MAX77675_ID_SBB3, + MAX77675_ID_NUM_MAX, +}; + +struct max77675_regulator_sbb_setting { + u8 fps_slot; + bool fixed_slew_rate; +}; + +struct max77675_config { + u8 en_mode; + u8 voltage_change_latency; + u8 drv_sbb_strength; + u8 dvs_slew_rate; + u8 debounce_time; + u8 manual_reset_time; + bool en_pullup_disable; + bool bias_low_power_request; + bool simo_ldo_always_on; +}; + +struct max77675_regulator { + struct device *dev; + struct regmap *regmap; + struct max77675_config config; + struct max77675_regulator_sbb_setting sbb_setting[MAX77675_ID_NUM_MAX]; +}; + +static int max77675_regulator_get_fps_src(struct max77675_regulator *maxreg, int id) +{ + unsigned int reg_addr; + unsigned int val; + int ret; + + switch (id) { + case MAX77675_ID_SBB0: + reg_addr = MAX77675_REG_CNFG_SBB0_B; + break; + case MAX77675_ID_SBB1: + reg_addr = MAX77675_REG_CNFG_SBB1_B; + break; + case MAX77675_ID_SBB2: + reg_addr = MAX77675_REG_CNFG_SBB2_B; + break; + case MAX77675_ID_SBB3: + reg_addr = MAX77675_REG_CNFG_SBB3_B; + break; + default: + dev_err(maxreg->dev, "Invalid regulator id: %d\n", id); + return -EINVAL; + } + + ret = regmap_read(maxreg->regmap, reg_addr, &val); + if (ret < 0) { + dev_err(maxreg->dev, "Failed to read FPS source (reg 0x%02x): %d\n", + reg_addr, ret); + return ret; + } + + return FIELD_GET(MAX77675_EN_SBB_MASK, val); +} + +static int max77675_regulator_set_fps_src(struct max77675_regulator *maxreg, int id, u8 fps_src) +{ + unsigned int reg_addr; + + switch (id) { + case MAX77675_ID_SBB0: + reg_addr = MAX77675_REG_CNFG_SBB0_B; + break; + case MAX77675_ID_SBB1: + reg_addr = MAX77675_REG_CNFG_SBB1_B; + break; + case MAX77675_ID_SBB2: + reg_addr = MAX77675_REG_CNFG_SBB2_B; + break; + case MAX77675_ID_SBB3: + reg_addr = MAX77675_REG_CNFG_SBB3_B; + break; + default: + dev_err(maxreg->dev, "Invalid regulator id: %d\n", id); + return -EINVAL; + } + + return regmap_update_bits(maxreg->regmap, reg_addr, MAX77675_EN_SBB_MASK, fps_src); +} + +static int max77675_set_sbb_slew_rate_fixed(struct max77675_regulator *maxreg, int id, bool fixed) +{ + u8 mask, value; + u8 slew_src_ctrl_bit = fixed ? 0 : 1; + + switch (id) { + case MAX77675_ID_SBB0: + mask = MAX77675_SR_SBB0_BIT; + value = FIELD_PREP(MAX77675_SR_SBB0_BIT, slew_src_ctrl_bit); + break; + + case MAX77675_ID_SBB1: + mask = MAX77675_SR_SBB1_BIT; + value = FIELD_PREP(MAX77675_SR_SBB1_BIT, slew_src_ctrl_bit); + break; + + case MAX77675_ID_SBB2: + mask = MAX77675_SR_SBB2_BIT; + value = FIELD_PREP(MAX77675_SR_SBB2_BIT, slew_src_ctrl_bit); + break; + + case MAX77675_ID_SBB3: + mask = MAX77675_SR_SBB3_BIT; + value = FIELD_PREP(MAX77675_SR_SBB3_BIT, slew_src_ctrl_bit); + break; + + default: + return -EINVAL; + } + + return regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B, mask, value); +} + +static int max77675_init_regulator(struct max77675_regulator *maxreg, int id) +{ + struct max77675_regulator_sbb_setting *sbb_setting = &maxreg->sbb_setting[id]; + int ret; + + if (sbb_setting->fps_slot == MAX77675_FPS_DEF) { + ret = max77675_regulator_get_fps_src(maxreg, id); + if (ret < 0) + return ret; + + sbb_setting->fps_slot = ret; + } else { + ret = max77675_regulator_set_fps_src(maxreg, id, sbb_setting->fps_slot); + if (ret < 0) + return ret; + } + + ret = max77675_set_sbb_slew_rate_fixed(maxreg, id, sbb_setting->fixed_slew_rate); + if (ret < 0) + return ret; + + return 0; +} + +static int max77675_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct max77675_regulator *maxreg = config->driver_data; + struct max77675_regulator_sbb_setting *sbb_setting = &maxreg->sbb_setting[desc->id]; + static const char * const fps_slots[] = { "slot0", "slot1", "slot2", "slot3", "default" }; + const char *fps_str; + int slot; + + /* Parse FPS slot from DT */ + if (of_property_read_string(np, "adi,fps-slot", &fps_str)) { + /* Property not set, use default */ + sbb_setting->fps_slot = MAX77675_FPS_DEF; + } else { + /* Match string to index */ + slot = match_string(fps_slots, ARRAY_SIZE(fps_slots), fps_str); + if (slot < 0) { + dev_dbg(maxreg->dev, "Invalid fps-slot '%s', using default\n", fps_str); + sbb_setting->fps_slot = MAX77675_FPS_DEF; + } else { + sbb_setting->fps_slot = slot; + } + } + + /* Parse slew rate control source */ + sbb_setting->fixed_slew_rate = of_property_read_bool(np, "adi,fixed-slew-rate"); + + /* Apply parsed configuration */ + return max77675_init_regulator(maxreg, desc->id); +} + +static int max77675_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + struct max77675_regulator *maxreg = rdev_get_drvdata(rdev); + unsigned int int_flags; + int id = rdev_get_id(rdev); + int ret; + + ret = regmap_read(maxreg->regmap, MAX77675_REG_INT_GLBL, &int_flags); + if (ret) { + dev_err(maxreg->dev, "Failed to read INT_GLBL: %d\n", ret); + return ret; + } + + *flags = 0; + + switch (id) { + case MAX77675_ID_SBB0: + if (int_flags & MAX77675_INT_SBB0_F_BIT) + *flags |= REGULATOR_ERROR_FAIL; + break; + case MAX77675_ID_SBB1: + if (int_flags & MAX77675_INT_SBB1_F_BIT) + *flags |= REGULATOR_ERROR_FAIL; + break; + case MAX77675_ID_SBB2: + if (int_flags & MAX77675_INT_SBB2_F_BIT) + *flags |= REGULATOR_ERROR_FAIL; + break; + case MAX77675_ID_SBB3: + if (int_flags & MAX77675_INT_SBB3_F_BIT) + *flags |= REGULATOR_ERROR_FAIL; + break; + default: + dev_warn(maxreg->dev, "Unsupported regulator ID: %d\n", id); + break; + } + + if (int_flags & MAX77675_INT_TJAL2_R_BIT) { + /* TJAL2 interrupt: Over-temperature condition (above 120 degree) */ + *flags |= REGULATOR_ERROR_OVER_TEMP; + } + + return 0; +} + +static const struct regulator_ops max77675_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = max77675_get_error_flags, +}; + +static struct regulator_desc max77675_regulators[MAX77675_ID_NUM_MAX] = { + { + .name = "sbb0", + .of_match = of_match_ptr("sbb0"), + .regulators_node = of_match_ptr("regulators"), + .of_parse_cb = max77675_of_parse_cb, + .id = MAX77675_ID_SBB0, + .ops = &max77675_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = MAX77675_NUM_LEVELS_25MV, + .min_uV = MAX77675_MIN_UV, + .uV_step = MAX77675_STEP_25MV, + .vsel_reg = MAX77675_REG_CNFG_SBB0_A, + .vsel_mask = MAX77675_TV_SBB0_MASK, + .enable_reg = MAX77675_REG_CNFG_SBB0_B, + .enable_mask = MAX77675_EN_SBB0_MASK, + .enable_val = MAX77675_ENABLE_ON, + .disable_val = MAX77675_ENABLE_OFF, + .active_discharge_off = MAX77675_REGULATOR_AD_OFF, + .active_discharge_on = MAX77675_REGULATOR_AD_ON, + .active_discharge_mask = MAX77675_ADE_SBB0_BIT, + .active_discharge_reg = MAX77675_REG_CNFG_SBB0_B, + }, + { + .name = "sbb1", + .of_match = of_match_ptr("sbb1"), + .regulators_node = of_match_ptr("regulators"), + .of_parse_cb = max77675_of_parse_cb, + .id = MAX77675_ID_SBB1, + .ops = &max77675_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = MAX77675_NUM_LEVELS_25MV, + .min_uV = MAX77675_MIN_UV, + .uV_step = MAX77675_STEP_25MV, + .vsel_reg = MAX77675_REG_CNFG_SBB1_A, + .vsel_mask = MAX77675_TV_SBB1_MASK, + .enable_reg = MAX77675_REG_CNFG_SBB1_B, + .enable_mask = MAX77675_EN_SBB1_MASK, + .enable_val = MAX77675_ENABLE_ON, + .disable_val = MAX77675_ENABLE_OFF, + .active_discharge_off = MAX77675_REGULATOR_AD_OFF, + .active_discharge_on = MAX77675_REGULATOR_AD_ON, + .active_discharge_mask = MAX77675_ADE_SBB1_BIT, + .active_discharge_reg = MAX77675_REG_CNFG_SBB1_B, + }, + { + .name = "sbb2", + .of_match = of_match_ptr("sbb2"), + .regulators_node = of_match_ptr("regulators"), + .of_parse_cb = max77675_of_parse_cb, + .id = MAX77675_ID_SBB2, + .ops = &max77675_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = MAX77675_NUM_LEVELS_25MV, + .min_uV = MAX77675_MIN_UV, + .uV_step = MAX77675_STEP_25MV, + .vsel_reg = MAX77675_REG_CNFG_SBB2_A, + .vsel_mask = MAX77675_TV_SBB2_MASK, + .enable_reg = MAX77675_REG_CNFG_SBB2_B, + .enable_mask = MAX77675_EN_SBB2_MASK, + .enable_val = MAX77675_ENABLE_ON, + .disable_val = MAX77675_ENABLE_OFF, + .active_discharge_off = MAX77675_REGULATOR_AD_OFF, + .active_discharge_on = MAX77675_REGULATOR_AD_ON, + .active_discharge_mask = MAX77675_ADE_SBB2_BIT, + .active_discharge_reg = MAX77675_REG_CNFG_SBB2_B, + }, + { + .name = "sbb3", + .of_match = of_match_ptr("sbb3"), + .regulators_node = of_match_ptr("regulators"), + .of_parse_cb = max77675_of_parse_cb, + .id = MAX77675_ID_SBB3, + .ops = &max77675_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = MAX77675_NUM_LEVELS_25MV, + .min_uV = MAX77675_MIN_UV, + .uV_step = MAX77675_STEP_25MV, + .vsel_reg = MAX77675_REG_CNFG_SBB3_A, + .vsel_mask = MAX77675_TV_SBB3_MASK, + .enable_reg = MAX77675_REG_CNFG_SBB3_B, + .enable_mask = MAX77675_EN_SBB3_MASK, + .enable_val = MAX77675_ENABLE_ON, + .disable_val = MAX77675_ENABLE_OFF, + .active_discharge_off = MAX77675_REGULATOR_AD_OFF, + .active_discharge_on = MAX77675_REGULATOR_AD_ON, + .active_discharge_mask = MAX77675_ADE_SBB3_BIT, + .active_discharge_reg = MAX77675_REG_CNFG_SBB3_B, + }, +}; + +static bool max77675_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX77675_REG_CNFG_GLBL_B: + /* This register can be updated by an internal state machine */ + case MAX77675_REG_INT_GLBL: + case MAX77675_REG_STAT_GLBL: + case MAX77675_REG_ERCF_GLBL: + return true; + default: + return false; + } +} + +static const struct regmap_config max77675_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77675_MAX_REGISTER, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = max77675_volatile_reg, +}; + +static int max77675_apply_config(struct max77675_regulator *maxreg) +{ + const struct max77675_config *cfg = &maxreg->config; + int ret; + + /* Set EN pin mode */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_EN_MODE_MASK, + FIELD_PREP(MAX77675_EN_MODE_MASK, cfg->en_mode)); + if (ret) { + dev_err(maxreg->dev, "Failed to set EN mode: %d\n", ret); + return ret; + } + + /* Set the latency between output voltage change and SBBx voltage ramp start */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B, + MAX77675_LAT_MODE_BIT, + FIELD_PREP(MAX77675_LAT_MODE_BIT, cfg->voltage_change_latency)); + if (ret) { + dev_err(maxreg->dev, "Failed to set latency mode: %d\n", ret); + return ret; + } + + /* Set drive strength */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_A, + MAX77675_DRV_SBB_MASK, + FIELD_PREP(MAX77675_DRV_SBB_MASK, cfg->drv_sbb_strength)); + if (ret) { + dev_err(maxreg->dev, "Failed to set drive strength: %d\n", ret); + return ret; + } + + /* Set DVS slew rate */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B, + MAX77675_DVS_SLEW_BIT, + FIELD_PREP(MAX77675_DVS_SLEW_BIT, cfg->dvs_slew_rate)); + if (ret) { + dev_err(maxreg->dev, "Failed to set DVS slew rate: %d\n", ret); + return ret; + } + + /* Set debounce time for EN pin */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_DBEN_EN_BIT, + FIELD_PREP(MAX77675_DBEN_EN_BIT, cfg->debounce_time)); + if (ret) { + dev_err(maxreg->dev, "Failed to set EN debounce time: %d\n", ret); + return ret; + } + + /* Set manual reset time (MRT) for EN pin */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_MRT_MASK, + FIELD_PREP(MAX77675_MRT_MASK, cfg->manual_reset_time)); + if (ret) { + dev_err(maxreg->dev, "Failed to set manual reset time: %d\n", ret); + return ret; + } + + /* Enable or disable internal pull-up resistor on EN pin */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_PU_DIS_BIT, + FIELD_PREP(MAX77675_PU_DIS_BIT, cfg->en_pullup_disable)); + if (ret) { + dev_err(maxreg->dev, "Failed to set EN pull-up disable: %d\n", ret); + return ret; + } + + /* Request main bias to enter low-power mode */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_BIAS_LPM_BIT, + FIELD_PREP(MAX77675_BIAS_LPM_BIT, cfg->bias_low_power_request)); + if (ret) { + dev_err(maxreg->dev, "Failed to set bias low-power request: %d\n", ret); + return ret; + } + + /* Force SIMO internal LDO to always supply 1.8V */ + ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A, + MAX77675_SIMO_CH_DIS_BIT, + FIELD_PREP(MAX77675_SIMO_CH_DIS_BIT, cfg->simo_ldo_always_on)); + if (ret) { + dev_err(maxreg->dev, "Failed to set SIMO internal LDO always-on: %d\n", ret); + return ret; + } + + return 0; +} + +static int max77675_parse_en_mode(struct device *dev, + struct device_node *np, + u8 *en_mode) +{ + static const char * const en_modes[] = {"push-button", "slide-switch", "logic"}; + const char *str; + int index; + + *en_mode = MAX77675_EN_SLIDE_SWITCH; + + if (of_property_read_string(np, "adi,en-mode", &str)) + return 0; + + index = match_string(en_modes, ARRAY_SIZE(en_modes), str); + if (index < 0) { + dev_err(dev, "Invalid 'adi,en-mode' value '%s'\n", str); + return -EINVAL; + } + + *en_mode = index; + + return 0; +} + +static int max77675_parse_voltage_change_latency(struct device *dev, + struct device_node *np, + u8 *latency_mode) +{ + u32 val; + + *latency_mode = MAX77675_HIGH_LATENCY_MODE; + + if (!of_property_read_u32(np, "adi,voltage-change-latency-us", &val)) { + switch (val) { + case 10: + *latency_mode = MAX77675_LOW_LATENCY_MODE; + break; + case 100: + *latency_mode = MAX77675_HIGH_LATENCY_MODE; + break; + default: + dev_err(dev, "Invalid voltage-change-latency-us value: %u\n", val); + return -EINVAL; + } + } + + return 0; +} + +static int max77675_parse_manual_reset_time(struct device *dev, + struct device_node *np, + u8 *reset_time) +{ + u32 val; + + *reset_time = MAX77675_MRT_4S; + + if (!of_property_read_u32(np, "reset-time-sec", &val)) { + switch (val) { + case 4: + *reset_time = MAX77675_MRT_4S; + break; + case 8: + *reset_time = MAX77675_MRT_8S; + break; + case 12: + *reset_time = MAX77675_MRT_12S; + break; + case 16: + *reset_time = MAX77675_MRT_16S; + break; + default: + dev_err(dev, "Invalid reset-time-sec value: %u\n", val); + return -EINVAL; + } + } + + return 0; +} + +static int max77675_parse_dvs_slew_rate(struct device *dev, struct device_node *np, u8 *slew_rate) +{ + u32 val; + + /* Set default: 5 mV/us */ + *slew_rate = MAX77675_DVS_SLEW_5MV_PER_US; + + if (!of_property_read_u32(np, "adi,dvs-slew-rate-mv-per-us", &val)) { + switch (val) { + case 5: + *slew_rate = MAX77675_DVS_SLEW_5MV_PER_US; + break; + case 10: + *slew_rate = MAX77675_DVS_SLEW_10MV_PER_US; + break; + default: + dev_err(dev, "Invalid dvs-slew-rate-mv-per-us value: %u\n", val); + return -EINVAL; + } + } + + return 0; +} + +static int max77675_parse_drv_sbb_strength(struct device *dev, struct device_node *np, u8 *strength) +{ + static const char * const strength_names[] = {"max", "high", "low", "min"}; + const char *str; + int index; + + /* Set default: maximum drive strength */ + *strength = MAX77675_DRV_SBB_STRENGTH_MAX; + + if (of_property_read_string(np, "adi,drv-sbb-strength", &str)) + return 0; + + index = match_string(strength_names, ARRAY_SIZE(strength_names), str); + if (index < 0) { + dev_err(dev, "Invalid 'adi,drv-sbb-strength' value: '%s'\n", str); + return -EINVAL; + } + + *strength = index; + + return 0; +} + +static int max77675_parse_debounce_time_us(struct device *dev, + struct device_node *np, + u8 *debounce_time) +{ + u32 val; + + *debounce_time = MAX77675_DBEN_100US; + + if (!of_property_read_u32(np, "input-debounce", &val)) { + switch (val) { + case 100: + *debounce_time = MAX77675_DBEN_100US; + break; + case 30000: + *debounce_time = MAX77675_DBEN_30000US; + break; + default: + dev_err(dev, "Invalid input-debounce value: %u\n", val); + return -EINVAL; + } + } + + return 0; +} + +static int max77675_parse_config(struct max77675_regulator *maxreg) +{ + struct device_node *np = maxreg->dev->of_node; + struct max77675_config *cfg = &maxreg->config; + int ret; + + /* EN pin mode */ + ret = max77675_parse_en_mode(maxreg->dev, np, &cfg->en_mode); + if (ret < 0) + return ret; + + /* voltage change latency */ + ret = max77675_parse_voltage_change_latency(maxreg->dev, np, &cfg->voltage_change_latency); + if (ret < 0) + return ret; + + /* drive strength */ + ret = max77675_parse_drv_sbb_strength(maxreg->dev, np, &cfg->drv_sbb_strength); + if (ret < 0) + return ret; + + /* dvs slew rate */ + ret = max77675_parse_dvs_slew_rate(maxreg->dev, np, &cfg->dvs_slew_rate); + if (ret < 0) + return ret; + + /* Debounce time for EN pin */ + ret = max77675_parse_debounce_time_us(maxreg->dev, np, &cfg->debounce_time); + if (ret < 0) + return ret; + + /* Manual reset time for EN pin */ + ret = max77675_parse_manual_reset_time(maxreg->dev, np, &cfg->manual_reset_time); + if (ret < 0) + return ret; + + /* Disable internal pull-up resistor on EN pin */ + cfg->en_pullup_disable = of_property_read_bool(np, "bias-disable"); + + /* Request low-power mode for main bias */ + cfg->bias_low_power_request = of_property_read_bool(np, "adi,bias-low-power-request"); + + /* Force internal LDO to always supply 1.8V */ + cfg->simo_ldo_always_on = of_property_read_bool(np, "adi,simo-ldo-always-on"); + + return ret; +} + +static int max77675_init_event(struct max77675_regulator *maxreg) +{ + unsigned int ercflag, int_glbl; + int ret; + + ret = regmap_read(maxreg->regmap, MAX77675_REG_ERCF_GLBL, &ercflag); + if (ret) { + dev_err(maxreg->dev, "Failed to read CID register: %d\n", ret); + return ret; + } + + ret = regmap_read(maxreg->regmap, MAX77675_REG_INT_GLBL, &int_glbl); + if (ret) { + dev_err(maxreg->dev, "Failed to read INT_GLBL register: %d\n", ret); + return ret; + } + + if (ercflag & MAX77675_SFT_CRST_F_BIT) + dev_dbg(maxreg->dev, "Software Cold Reset Flag is set\n"); + + if (ercflag & MAX77675_SFT_OFF_F_BIT) + dev_dbg(maxreg->dev, "Software Off Flag is set\n"); + + if (ercflag & MAX77675_MRST_BIT) + dev_dbg(maxreg->dev, "Manual Reset Timer Flag is set\n"); + + if (ercflag & MAX77675_UVLO_BIT) + dev_dbg(maxreg->dev, "Undervoltage Lockout Flag is set\n"); + + if (ercflag & MAX77675_OVLO_BIT) + dev_dbg(maxreg->dev, "Overvoltage Lockout Flag is set\n"); + + if (ercflag & MAX77675_TOVLD_BIT) + dev_dbg(maxreg->dev, "Thermal Overload Flag is set\n"); + + if (int_glbl & MAX77675_INT_SBB3_F_BIT) + dev_dbg(maxreg->dev, "SBB3 Channel Fault Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_SBB2_F_BIT) + dev_dbg(maxreg->dev, "SBB2 Channel Fault Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_SBB1_F_BIT) + dev_dbg(maxreg->dev, "SBB1 Channel Fault Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_SBB0_F_BIT) + dev_dbg(maxreg->dev, "SBB0 Channel Fault Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_TJAL2_R_BIT) + dev_dbg(maxreg->dev, "Thermal Alarm 2 Rising Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_TJAL1_R_BIT) + dev_dbg(maxreg->dev, "Thermal Alarm 1 Rising Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_EN_R_BIT) + dev_dbg(maxreg->dev, "nEN Rising Edge Interrupt occurred\n"); + + if (int_glbl & MAX77675_INT_EN_F_BIT) + dev_dbg(maxreg->dev, "nEN Falling Edge Interrupt occurred\n"); + + return 0; +} + +static int max77675_regulator_probe(struct i2c_client *client) +{ + struct max77675_regulator *maxreg; + struct regulator_config config = {}; + int i, ret; + + maxreg = devm_kzalloc(&client->dev, sizeof(*maxreg), GFP_KERNEL); + if (!maxreg) + return -ENOMEM; + + maxreg->dev = &client->dev; + + maxreg->regmap = devm_regmap_init_i2c(client, &max77675_regmap_config); + if (IS_ERR(maxreg->regmap)) + return dev_err_probe(maxreg->dev, + PTR_ERR(maxreg->regmap), + "Failed to init regmap\n"); + + ret = max77675_init_event(maxreg); + if (ret < 0) + return dev_err_probe(maxreg->dev, ret, "Failed to init event\n"); + + ret = max77675_parse_config(maxreg); + if (ret < 0) + return dev_err_probe(maxreg->dev, ret, "Failed to parse config\n"); + + ret = max77675_apply_config(maxreg); + if (ret < 0) + return dev_err_probe(maxreg->dev, ret, "Failed to apply config\n"); + + config.dev = &client->dev; + config.regmap = maxreg->regmap; + config.driver_data = maxreg; + + struct device_node *regulators_np __free(device_node) = + of_get_child_by_name(client->dev.of_node, "regulators"); + if (!regulators_np) { + dev_err(maxreg->dev, "No 'regulators' subnode found in DT\n"); + return -EINVAL; + } + + for (i = 0; i < MAX77675_ID_NUM_MAX; i++) { + const struct regulator_desc *desc = &max77675_regulators[i]; + struct regulator_dev *rdev; + + struct device_node *child_np __free(device_node) = + of_get_child_by_name(regulators_np, desc->name); + if (!child_np) { + dev_warn(maxreg->dev, "No DT node for regulator %s\n", desc->name); + continue; + } + + config.of_node = child_np; + + rdev = devm_regulator_register(&client->dev, desc, &config); + if (IS_ERR(rdev)) { + return dev_err_probe(maxreg->dev, PTR_ERR(rdev), + "Failed to register regulator %d (%s)\n", + i, desc->name); + } + } + + return 0; +} + +static const struct i2c_device_id max77675_i2c_id[] = { + { .name = "max77675" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max77675_i2c_id); + +static const struct of_device_id __maybe_unused max77675_of_match[] = { + { .compatible = "adi,max77675", }, + { } +}; +MODULE_DEVICE_TABLE(of, max77675_of_match); + +static struct i2c_driver max77675_regulator_driver = { + .driver = { + .name = "max77675", + .of_match_table = of_match_ptr(max77675_of_match), + }, + .probe = max77675_regulator_probe, + .id_table = max77675_i2c_id, +}; + +module_i2c_driver(max77675_regulator_driver); + +MODULE_DESCRIPTION("MAX77675 Regulator Driver"); +MODULE_AUTHOR("Joan Na "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77686-regulator.c b/drivers/regulator/max77686-regulator.c new file mode 100644 index 000000000..3a0156f4d --- /dev/null +++ b/drivers/regulator/max77686-regulator.c @@ -0,0 +1,538 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max77686.c - Regulator driver for the Maxim 77686 +// +// Copyright (C) 2012 Samsung Electronics +// Chiwoong Byun +// Jonghwa Lee +// +// This driver is based on max8997.c + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX77686_LDO_MINUV 800000 +#define MAX77686_LDO_UVSTEP 50000 +#define MAX77686_LDO_LOW_MINUV 800000 +#define MAX77686_LDO_LOW_UVSTEP 25000 +#define MAX77686_BUCK_MINUV 750000 +#define MAX77686_BUCK_UVSTEP 50000 +#define MAX77686_BUCK_ENABLE_TIME 40 /* us */ +#define MAX77686_DVS_ENABLE_TIME 22 /* us */ +#define MAX77686_RAMP_DELAY 100000 /* uV/us */ +#define MAX77686_DVS_RAMP_DELAY 27500 /* uV/us */ +#define MAX77686_DVS_MINUV 600000 +#define MAX77686_DVS_UVSTEP 12500 + +/* + * Value for configuring buck[89] and LDO{20,21,22} as GPIO control. + * It is the same as 'off' for other regulators. + */ +#define MAX77686_GPIO_CONTROL 0x0 +/* + * Values used for configuring LDOs and bucks. + * Forcing low power mode: LDO1, 3-5, 9, 13, 17-26 + */ +#define MAX77686_LDO_LOWPOWER 0x1 +/* + * On/off controlled by PWRREQ: + * - LDO2, 6-8, 10-12, 14-16 + * - buck[1234] + */ +#define MAX77686_OFF_PWRREQ 0x1 +/* Low power mode controlled by PWRREQ: All LDOs */ +#define MAX77686_LDO_LOWPOWER_PWRREQ 0x2 +/* Forcing low power mode: buck[234] */ +#define MAX77686_BUCK_LOWPOWER 0x2 +#define MAX77686_NORMAL 0x3 + +#define MAX77686_OPMODE_SHIFT 6 +#define MAX77686_OPMODE_BUCK234_SHIFT 4 +#define MAX77686_OPMODE_MASK 0x3 + +#define MAX77686_VSEL_MASK 0x3F +#define MAX77686_DVS_VSEL_MASK 0xFF + +#define MAX77686_RAMP_RATE_MASK 0xC0 + +#define MAX77686_REGULATORS MAX77686_REG_MAX +#define MAX77686_LDOS 26 + +struct max77686_data { + struct device *dev; + DECLARE_BITMAP(gpio_enabled, MAX77686_REGULATORS); + + /* Array indexed by regulator id */ + unsigned int opmode[MAX77686_REGULATORS]; +}; + +static unsigned int max77686_get_opmode_shift(int id) +{ + switch (id) { + case MAX77686_BUCK1: + case MAX77686_BUCK5 ... MAX77686_BUCK9: + return 0; + case MAX77686_BUCK2 ... MAX77686_BUCK4: + return MAX77686_OPMODE_BUCK234_SHIFT; + default: + /* all LDOs */ + return MAX77686_OPMODE_SHIFT; + } +} + +/* + * When regulator is configured for GPIO control then it + * replaces "normal" mode. Any change from low power mode to normal + * should actually change to GPIO control. + * Map normal mode to proper value for such regulators. + */ +static unsigned int max77686_map_normal_mode(struct max77686_data *max77686, + int id) +{ + switch (id) { + case MAX77686_BUCK8: + case MAX77686_BUCK9: + case MAX77686_LDO20 ... MAX77686_LDO22: + if (test_bit(id, max77686->gpio_enabled)) + return MAX77686_GPIO_CONTROL; + } + + return MAX77686_NORMAL; +} + +/* Some BUCKs and LDOs supports Normal[ON/OFF] mode during suspend */ +static int max77686_set_suspend_disable(struct regulator_dev *rdev) +{ + unsigned int val, shift; + struct max77686_data *max77686 = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + + shift = max77686_get_opmode_shift(id); + val = MAX77686_OFF_PWRREQ; + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val << shift); + if (ret) + return ret; + + max77686->opmode[id] = val; + return 0; +} + +/* Some LDOs supports [LPM/Normal]ON mode during suspend state */ +static int max77686_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct max77686_data *max77686 = rdev_get_drvdata(rdev); + unsigned int val; + int ret, id = rdev_get_id(rdev); + + /* BUCK[5-9] doesn't support this feature */ + if (id >= MAX77686_BUCK5) + return 0; + + switch (mode) { + case REGULATOR_MODE_IDLE: /* ON in LP Mode */ + val = MAX77686_LDO_LOWPOWER_PWRREQ; + break; + case REGULATOR_MODE_NORMAL: /* ON in Normal Mode */ + val = max77686_map_normal_mode(max77686, id); + break; + default: + pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n", + rdev->desc->name, mode); + return -EINVAL; + } + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + val << MAX77686_OPMODE_SHIFT); + if (ret) + return ret; + + max77686->opmode[id] = val; + return 0; +} + +/* Some LDOs supports LPM-ON/OFF/Normal-ON mode during suspend state */ +static int max77686_ldo_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + unsigned int val; + struct max77686_data *max77686 = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + + switch (mode) { + case REGULATOR_MODE_STANDBY: /* switch off */ + val = MAX77686_OFF_PWRREQ; + break; + case REGULATOR_MODE_IDLE: /* ON in LP Mode */ + val = MAX77686_LDO_LOWPOWER_PWRREQ; + break; + case REGULATOR_MODE_NORMAL: /* ON in Normal Mode */ + val = max77686_map_normal_mode(max77686, id); + break; + default: + pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n", + rdev->desc->name, mode); + return -EINVAL; + } + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + val << MAX77686_OPMODE_SHIFT); + if (ret) + return ret; + + max77686->opmode[id] = val; + return 0; +} + +static int max77686_enable(struct regulator_dev *rdev) +{ + struct max77686_data *max77686 = rdev_get_drvdata(rdev); + unsigned int shift; + int id = rdev_get_id(rdev); + + shift = max77686_get_opmode_shift(id); + + if (max77686->opmode[id] == MAX77686_OFF_PWRREQ) + max77686->opmode[id] = max77686_map_normal_mode(max77686, id); + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + max77686->opmode[id] << shift); +} + +static int max77686_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct max77686_data *max77686 = config->driver_data; + int ret; + + switch (desc->id) { + case MAX77686_BUCK8: + case MAX77686_BUCK9: + case MAX77686_LDO20 ... MAX77686_LDO22: + config->ena_gpiod = fwnode_gpiod_get_index( + of_fwnode_handle(np), + "maxim,ena", + 0, + GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, + "max77686-regulator"); + if (IS_ERR(config->ena_gpiod)) + config->ena_gpiod = NULL; + break; + default: + return 0; + } + + if (config->ena_gpiod) { + set_bit(desc->id, max77686->gpio_enabled); + + ret = regmap_update_bits(config->regmap, desc->enable_reg, + desc->enable_mask, + MAX77686_GPIO_CONTROL); + if (ret) { + gpiod_put(config->ena_gpiod); + config->ena_gpiod = NULL; + } + } + + return 0; +} + +static const unsigned int max77686_buck_dvs_ramp_table[] = { + 13750, 27500, 55000, 100000 +}; + +static const struct regulator_ops max77686_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77686_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_mode = max77686_set_suspend_mode, +}; + +static const struct regulator_ops max77686_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77686_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_mode = max77686_ldo_set_suspend_mode, + .set_suspend_disable = max77686_set_suspend_disable, +}; + +static const struct regulator_ops max77686_buck1_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77686_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = max77686_set_suspend_disable, +}; + +static const struct regulator_ops max77686_buck_dvs_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77686_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_disable = max77686_set_suspend_disable, +}; + +#define regulator_desc_ldo(num) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .of_parse_cb = max77686_of_parse_cb, \ + .id = MAX77686_LDO##num, \ + .ops = &max77686_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_LDO_MINUV, \ + .uV_step = MAX77686_LDO_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77686_OPMODE_MASK \ + << MAX77686_OPMODE_SHIFT, \ +} +#define regulator_desc_lpm_ldo(num) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .id = MAX77686_LDO##num, \ + .ops = &max77686_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_LDO_MINUV, \ + .uV_step = MAX77686_LDO_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77686_OPMODE_MASK \ + << MAX77686_OPMODE_SHIFT, \ +} +#define regulator_desc_ldo_low(num) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .id = MAX77686_LDO##num, \ + .ops = &max77686_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_LDO_LOW_MINUV, \ + .uV_step = MAX77686_LDO_LOW_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77686_OPMODE_MASK \ + << MAX77686_OPMODE_SHIFT, \ +} +#define regulator_desc_ldo1_low(num) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .id = MAX77686_LDO##num, \ + .ops = &max77686_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_LDO_LOW_MINUV, \ + .uV_step = MAX77686_LDO_LOW_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77686_OPMODE_MASK \ + << MAX77686_OPMODE_SHIFT, \ +} +#define regulator_desc_buck(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .of_parse_cb = max77686_of_parse_cb, \ + .id = MAX77686_BUCK##num, \ + .ops = &max77686_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_BUCK_MINUV, \ + .uV_step = MAX77686_BUCK_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .enable_time = MAX77686_BUCK_ENABLE_TIME, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_BUCK5OUT + (num - 5) * 2, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_BUCK5CTRL + (num - 5) * 2, \ + .enable_mask = MAX77686_OPMODE_MASK, \ +} +#define regulator_desc_buck1(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .id = MAX77686_BUCK##num, \ + .ops = &max77686_buck1_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_BUCK_MINUV, \ + .uV_step = MAX77686_BUCK_UVSTEP, \ + .ramp_delay = MAX77686_RAMP_DELAY, \ + .enable_time = MAX77686_BUCK_ENABLE_TIME, \ + .n_voltages = MAX77686_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_BUCK1OUT, \ + .vsel_mask = MAX77686_VSEL_MASK, \ + .enable_reg = MAX77686_REG_BUCK1CTRL, \ + .enable_mask = MAX77686_OPMODE_MASK, \ +} +#define regulator_desc_buck_dvs(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("voltage-regulators"), \ + .id = MAX77686_BUCK##num, \ + .ops = &max77686_buck_dvs_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MAX77686_DVS_MINUV, \ + .uV_step = MAX77686_DVS_UVSTEP, \ + .ramp_delay = MAX77686_DVS_RAMP_DELAY, \ + .enable_time = MAX77686_DVS_ENABLE_TIME, \ + .n_voltages = MAX77686_DVS_VSEL_MASK + 1, \ + .vsel_reg = MAX77686_REG_BUCK2DVS1 + (num - 2) * 10, \ + .vsel_mask = MAX77686_DVS_VSEL_MASK, \ + .enable_reg = MAX77686_REG_BUCK2CTRL1 + (num - 2) * 10, \ + .enable_mask = MAX77686_OPMODE_MASK \ + << MAX77686_OPMODE_BUCK234_SHIFT, \ + .ramp_reg = MAX77686_REG_BUCK2CTRL1 + (num - 2) * 10, \ + .ramp_mask = MAX77686_RAMP_RATE_MASK, \ + .ramp_delay_table = max77686_buck_dvs_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(max77686_buck_dvs_ramp_table), \ +} + +static const struct regulator_desc regulators[] = { + regulator_desc_ldo1_low(1), + regulator_desc_ldo_low(2), + regulator_desc_ldo(3), + regulator_desc_ldo(4), + regulator_desc_ldo(5), + regulator_desc_ldo_low(6), + regulator_desc_ldo_low(7), + regulator_desc_ldo_low(8), + regulator_desc_ldo(9), + regulator_desc_lpm_ldo(10), + regulator_desc_lpm_ldo(11), + regulator_desc_lpm_ldo(12), + regulator_desc_ldo(13), + regulator_desc_lpm_ldo(14), + regulator_desc_ldo_low(15), + regulator_desc_lpm_ldo(16), + regulator_desc_ldo(17), + regulator_desc_ldo(18), + regulator_desc_ldo(19), + regulator_desc_ldo(20), + regulator_desc_ldo(21), + regulator_desc_ldo(22), + regulator_desc_ldo(23), + regulator_desc_ldo(24), + regulator_desc_ldo(25), + regulator_desc_ldo(26), + regulator_desc_buck1(1), + regulator_desc_buck_dvs(2), + regulator_desc_buck_dvs(3), + regulator_desc_buck_dvs(4), + regulator_desc_buck(5), + regulator_desc_buck(6), + regulator_desc_buck(7), + regulator_desc_buck(8), + regulator_desc_buck(9), +}; + +static int max77686_pmic_probe(struct platform_device *pdev) +{ + struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct max77686_data *max77686; + int i; + struct regulator_config config = { }; + + dev_dbg(&pdev->dev, "%s\n", __func__); + + max77686 = devm_kzalloc(&pdev->dev, sizeof(struct max77686_data), + GFP_KERNEL); + if (!max77686) + return -ENOMEM; + + max77686->dev = &pdev->dev; + config.dev = iodev->dev; + config.regmap = iodev->regmap; + config.driver_data = max77686; + platform_set_drvdata(pdev, max77686); + + for (i = 0; i < MAX77686_REGULATORS; i++) { + struct regulator_dev *rdev; + int id = regulators[i].id; + + max77686->opmode[id] = MAX77686_NORMAL; + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(rdev)) { + int ret = PTR_ERR(rdev); + dev_err(&pdev->dev, + "regulator init failed for %d: %d\n", i, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id max77686_pmic_id[] = { + { .name = "max77686-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, max77686_pmic_id); + +static struct platform_driver max77686_pmic_driver = { + .driver = { + .name = "max77686-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max77686_pmic_probe, + .id_table = max77686_pmic_id, +}; + +module_platform_driver(max77686_pmic_driver); + +MODULE_DESCRIPTION("MAXIM 77686 Regulator Driver"); +MODULE_AUTHOR("Chiwoong Byun "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77693-regulator.c b/drivers/regulator/max77693-regulator.c new file mode 100644 index 000000000..a8b3a2058 --- /dev/null +++ b/drivers/regulator/max77693-regulator.c @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max77693.c - Regulator driver for the Maxim 77693 and 77843 +// +// Copyright (C) 2013-2015 Samsung Electronics +// Jonghwa Lee +// Krzysztof Kozlowski +// +// This driver is based on max77686.c + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * ID for MAX77843 regulators. + * There is no need for such for MAX77693. + */ +enum max77843_regulator_type { + MAX77843_SAFEOUT1 = 0, + MAX77843_SAFEOUT2, + MAX77843_CHARGER, + + MAX77843_NUM, +}; + +/* Register differences between chargers: MAX77693 and MAX77843 */ +struct chg_reg_data { + unsigned int linear_reg; + unsigned int linear_mask; + unsigned int uA_step; + unsigned int min_sel; +}; + +/* + * MAX77693 CHARGER regulator - Min : 20mA, Max : 2580mA, step : 20mA + * 0x00, 0x01, 0x2, 0x03 = 60 mA + * 0x04 ~ 0x7E = (60 + (X - 3) * 20) mA + * Actually for MAX77693 the driver manipulates the maximum input current, + * not the fast charge current (output). This should be fixed. + * + * On MAX77843 the calculation formula is the same (except values). + * Fortunately it properly manipulates the fast charge current. + */ +static int max77693_chg_get_current_limit(struct regulator_dev *rdev) +{ + const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); + unsigned int chg_min_uA = rdev->constraints->min_uA; + unsigned int chg_max_uA = rdev->constraints->max_uA; + unsigned int reg, sel; + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, reg_data->linear_reg, ®); + if (ret < 0) + return ret; + + sel = reg & reg_data->linear_mask; + + /* the first four codes for charger current are all 60mA */ + if (sel <= reg_data->min_sel) + sel = 0; + else + sel -= reg_data->min_sel; + + val = chg_min_uA + reg_data->uA_step * sel; + if (val > chg_max_uA) + return -EINVAL; + + return val; +} + +static int max77693_chg_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); + unsigned int chg_min_uA = rdev->constraints->min_uA; + int sel = 0; + + while (chg_min_uA + reg_data->uA_step * sel < min_uA) + sel++; + + if (chg_min_uA + reg_data->uA_step * sel > max_uA) + return -EINVAL; + + /* the first four codes for charger current are all 60mA */ + sel += reg_data->min_sel; + + return regmap_write(rdev->regmap, reg_data->linear_reg, sel); +} +/* end of CHARGER regulator ops */ + +/* Returns regmap suitable for given regulator on chosen device */ +static struct regmap *max77693_get_regmap(enum max77693_types type, + struct max77693_dev *max77693, + int reg_id) +{ + if (type == TYPE_MAX77693) + return max77693->regmap; + + /* Else: TYPE_MAX77843 */ + switch (reg_id) { + case MAX77843_SAFEOUT1: + case MAX77843_SAFEOUT2: + return max77693->regmap; + case MAX77843_CHARGER: + return max77693->regmap_chg; + default: + return max77693->regmap; + } +} + +static const unsigned int max77693_safeout_table[] = { + 4850000, + 4900000, + 4950000, + 3300000, +}; + +static const struct regulator_ops max77693_safeout_ops = { + .list_voltage = regulator_list_voltage_table, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops max77693_charger_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_current_limit = max77693_chg_get_current_limit, + .set_current_limit = max77693_chg_set_current_limit, +}; + +#define max77693_regulator_desc_esafeout(_num) { \ + .name = "ESAFEOUT"#_num, \ + .id = MAX77693_ESAFEOUT##_num, \ + .of_match = of_match_ptr("ESAFEOUT"#_num), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = 4, \ + .ops = &max77693_safeout_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .volt_table = max77693_safeout_table, \ + .vsel_reg = MAX77693_CHG_REG_SAFEOUT_CTRL, \ + .vsel_mask = SAFEOUT_CTRL_SAFEOUT##_num##_MASK, \ + .enable_reg = MAX77693_CHG_REG_SAFEOUT_CTRL, \ + .enable_mask = SAFEOUT_CTRL_ENSAFEOUT##_num##_MASK , \ +} + +static const struct regulator_desc max77693_supported_regulators[] = { + max77693_regulator_desc_esafeout(1), + max77693_regulator_desc_esafeout(2), + { + .name = "CHARGER", + .id = MAX77693_CHARGER, + .of_match = of_match_ptr("CHARGER"), + .regulators_node = of_match_ptr("regulators"), + .ops = &max77693_charger_ops, + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, + .enable_reg = MAX77693_CHG_REG_CHG_CNFG_00, + .enable_mask = CHG_CNFG_00_CHG_MASK | + CHG_CNFG_00_BUCK_MASK, + .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK, + }, +}; + +static const struct chg_reg_data max77693_chg_reg_data = { + .linear_reg = MAX77693_CHG_REG_CHG_CNFG_09, + .linear_mask = CHG_CNFG_09_CHGIN_ILIM_MASK, + .uA_step = 20000, + .min_sel = 3, +}; + +#define max77843_regulator_desc_esafeout(num) { \ + .name = "SAFEOUT" # num, \ + .id = MAX77843_SAFEOUT ## num, \ + .ops = &max77693_safeout_ops, \ + .of_match = of_match_ptr("SAFEOUT" # num), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(max77693_safeout_table), \ + .volt_table = max77693_safeout_table, \ + .enable_reg = MAX77843_SYS_REG_SAFEOUTCTRL, \ + .enable_mask = MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT ## num, \ + .vsel_reg = MAX77843_SYS_REG_SAFEOUTCTRL, \ + .vsel_mask = MAX77843_REG_SAFEOUTCTRL_SAFEOUT ## num ## _MASK, \ +} + +static const struct regulator_desc max77843_supported_regulators[] = { + [MAX77843_SAFEOUT1] = max77843_regulator_desc_esafeout(1), + [MAX77843_SAFEOUT2] = max77843_regulator_desc_esafeout(2), + [MAX77843_CHARGER] = { + .name = "CHARGER", + .id = MAX77843_CHARGER, + .ops = &max77693_charger_ops, + .of_match = of_match_ptr("CHARGER"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, + .enable_reg = MAX77843_CHG_REG_CHG_CNFG_00, + .enable_mask = MAX77843_CHG_MASK, + .enable_val = MAX77843_CHG_MASK, + }, +}; + +static const struct chg_reg_data max77843_chg_reg_data = { + .linear_reg = MAX77843_CHG_REG_CHG_CNFG_02, + .linear_mask = MAX77843_CHG_FAST_CHG_CURRENT_MASK, + .uA_step = MAX77843_CHG_FAST_CHG_CURRENT_STEP, + .min_sel = 2, +}; + +static int max77693_pmic_probe(struct platform_device *pdev) +{ + enum max77693_types type = platform_get_device_id(pdev)->driver_data; + struct max77693_dev *iodev = dev_get_drvdata(pdev->dev.parent); + const struct regulator_desc *regulators; + unsigned int regulators_size; + int i; + struct regulator_config config = { }; + + config.dev = iodev->dev; + + switch (type) { + case TYPE_MAX77693: + regulators = max77693_supported_regulators; + regulators_size = ARRAY_SIZE(max77693_supported_regulators); + config.driver_data = (void *)&max77693_chg_reg_data; + break; + case TYPE_MAX77843: + regulators = max77843_supported_regulators; + regulators_size = ARRAY_SIZE(max77843_supported_regulators); + config.driver_data = (void *)&max77843_chg_reg_data; + break; + default: + dev_err(&pdev->dev, "Unsupported device type: %u\n", type); + return -ENODEV; + } + + for (i = 0; i < regulators_size; i++) { + struct regulator_dev *rdev; + + config.regmap = max77693_get_regmap(type, iodev, + regulators[i].id); + + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "Failed to initialize regulator-%d\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id max77693_pmic_id[] = { + { .name = "max77693-pmic", .driver_data = TYPE_MAX77693 }, + { .name = "max77843-regulator", .driver_data = TYPE_MAX77843 }, + { } +}; + +MODULE_DEVICE_TABLE(platform, max77693_pmic_id); + +static struct platform_driver max77693_pmic_driver = { + .driver = { + .name = "max77693-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max77693_pmic_probe, + .id_table = max77693_pmic_id, +}; + +static int __init max77693_pmic_init(void) +{ + return platform_driver_register(&max77693_pmic_driver); +} +subsys_initcall(max77693_pmic_init); + +static void __exit max77693_pmic_cleanup(void) +{ + platform_driver_unregister(&max77693_pmic_driver); +} +module_exit(max77693_pmic_cleanup); + +MODULE_DESCRIPTION("MAXIM 77693/77843 regulator driver"); +MODULE_AUTHOR("Jonghwa Lee "); +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77802-regulator.c b/drivers/regulator/max77802-regulator.c new file mode 100644 index 000000000..4c05cc9c4 --- /dev/null +++ b/drivers/regulator/max77802-regulator.c @@ -0,0 +1,567 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max77802.c - Regulator driver for the Maxim 77802 +// +// Copyright (C) 2013-2014 Google, Inc +// Simon Glass +// +// Copyright (C) 2012 Samsung Electronics +// Chiwoong Byun +// Jonghwa Lee +// +// This driver is based on max8997.c + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Default ramp delay in case it is not manually set */ +#define MAX77802_RAMP_DELAY 100000 /* uV/us */ + +#define MAX77802_OPMODE_SHIFT_LDO 6 +#define MAX77802_OPMODE_BUCK234_SHIFT 4 +#define MAX77802_OPMODE_MASK 0x3 + +#define MAX77802_VSEL_MASK 0x3F +#define MAX77802_DVS_VSEL_MASK 0xFF + +#define MAX77802_RAMP_RATE_MASK_2BIT 0xC0 +#define MAX77802_RAMP_RATE_SHIFT_2BIT 6 +#define MAX77802_RAMP_RATE_MASK_4BIT 0xF0 +#define MAX77802_RAMP_RATE_SHIFT_4BIT 4 + +#define MAX77802_STATUS_OFF 0x0 +#define MAX77802_OFF_PWRREQ 0x1 +#define MAX77802_LP_PWRREQ 0x2 + +static const unsigned int max77802_buck234_ramp_table[] = { + 12500, + 25000, + 50000, + 100000, +}; + +static const unsigned int max77802_buck16_ramp_table[] = { + 1000, 2000, 3030, 4000, + 5000, 5880, 7140, 8330, + 9090, 10000, 11110, 12500, + 16670, 25000, 50000, 100000, +}; + +struct max77802_regulator_prv { + /* Array indexed by regulator id */ + unsigned int opmode[MAX77802_REG_MAX]; +}; + +static inline unsigned int max77802_map_mode(unsigned int mode) +{ + return mode == MAX77802_OPMODE_NORMAL ? + REGULATOR_MODE_NORMAL : REGULATOR_MODE_STANDBY; +} + +static int max77802_get_opmode_shift(int id) +{ + if (id == MAX77802_BUCK1 || (id >= MAX77802_BUCK5 && + id <= MAX77802_BUCK10)) + return 0; + + if (id >= MAX77802_BUCK2 && id <= MAX77802_BUCK4) + return MAX77802_OPMODE_BUCK234_SHIFT; + + if (id >= MAX77802_LDO1 && id <= MAX77802_LDO35) + return MAX77802_OPMODE_SHIFT_LDO; + + return -EINVAL; +} + +/** + * max77802_set_suspend_disable - Disable the regulator during system suspend + * @rdev: regulator to mark as disabled + * + * All regulators expect LDO 1, 3, 20 and 21 support OFF by PWRREQ. + * Configure the regulator so the PMIC will turn it OFF during system suspend. + */ +static int max77802_set_suspend_disable(struct regulator_dev *rdev) +{ + unsigned int val = MAX77802_OFF_PWRREQ; + struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); + unsigned int id = rdev_get_id(rdev); + int shift = max77802_get_opmode_shift(id); + + if (WARN_ON_ONCE(id >= ARRAY_SIZE(max77802->opmode))) + return -EINVAL; + max77802->opmode[id] = val; + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val << shift); +} + +/* + * Some LDOs support Low Power Mode while the system is running. + * + * LDOs 1, 3, 20, 21. + */ +static int max77802_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); + unsigned int id = rdev_get_id(rdev); + unsigned int val; + int shift = max77802_get_opmode_shift(id); + + switch (mode) { + case REGULATOR_MODE_STANDBY: + val = MAX77802_OPMODE_LP; /* ON in Low Power Mode */ + break; + case REGULATOR_MODE_NORMAL: + val = MAX77802_OPMODE_NORMAL; /* ON in Normal Mode */ + break; + default: + dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", + rdev->desc->name, mode); + return -EINVAL; + } + + if (WARN_ON_ONCE(id >= ARRAY_SIZE(max77802->opmode))) + return -EINVAL; + + max77802->opmode[id] = val; + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val << shift); +} + +static unsigned max77802_get_mode(struct regulator_dev *rdev) +{ + struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); + unsigned int id = rdev_get_id(rdev); + + if (WARN_ON_ONCE(id >= ARRAY_SIZE(max77802->opmode))) + return -EINVAL; + return max77802_map_mode(max77802->opmode[id]); +} + +/** + * max77802_set_suspend_mode - set regulator opmode when the system is suspended + * @rdev: regulator to change mode + * @mode: operating mode to be set + * + * Will set the operating mode for the regulators during system suspend. + * This function is valid for the three different enable control logics: + * + * Enable Control Logic1 by PWRREQ (BUCK 2-4 and LDOs 2, 4-19, 22-35) + * Enable Control Logic2 by PWRREQ (LDOs 1, 20, 21) + * Enable Control Logic3 by PWRREQ (LDO 3) + * + * If setting the regulator mode fails, the function only warns but does + * not return a negative error number to avoid the regulator core to stop + * setting the operating mode for the remaining regulators. + */ +static int max77802_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); + unsigned int id = rdev_get_id(rdev); + unsigned int val; + int shift = max77802_get_opmode_shift(id); + + if (WARN_ON_ONCE(id >= ARRAY_SIZE(max77802->opmode))) + return -EINVAL; + + /* + * If the regulator has been disabled for suspend + * then is invalid to try setting a suspend mode. + */ + if (max77802->opmode[id] == MAX77802_OFF_PWRREQ) { + dev_warn(&rdev->dev, "%s: is disabled, mode: 0x%x not set\n", + rdev->desc->name, mode); + return 0; + } + + switch (mode) { + case REGULATOR_MODE_STANDBY: + /* + * If the regulator opmode is normal then enable + * ON in Low Power Mode by PWRREQ. If the mode is + * already Low Power then no action is required. + */ + if (max77802->opmode[id] == MAX77802_OPMODE_NORMAL) + val = MAX77802_LP_PWRREQ; + else + return 0; + break; + case REGULATOR_MODE_NORMAL: + /* + * If the regulator operating mode is Low Power then + * normal is not a valid opmode in suspend. If the + * mode is already normal then no action is required. + */ + if (max77802->opmode[id] == MAX77802_OPMODE_LP) + dev_warn(&rdev->dev, "%s: in Low Power: 0x%x invalid\n", + rdev->desc->name, mode); + return 0; + default: + dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", + rdev->desc->name, mode); + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val << shift); +} + +static int max77802_enable(struct regulator_dev *rdev) +{ + struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); + unsigned int id = rdev_get_id(rdev); + int shift = max77802_get_opmode_shift(id); + + if (WARN_ON_ONCE(id >= ARRAY_SIZE(max77802->opmode))) + return -EINVAL; + if (max77802->opmode[id] == MAX77802_OFF_PWRREQ) + max77802->opmode[id] = MAX77802_OPMODE_NORMAL; + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + max77802->opmode[id] << shift); +} + +/* + * LDOs 2, 4-19, 22-35 + */ +static const struct regulator_ops max77802_ldo_ops_logic1 = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77802_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = max77802_set_suspend_disable, + .set_suspend_mode = max77802_set_suspend_mode, +}; + +/* + * LDOs 1, 20, 21, 3 + */ +static const struct regulator_ops max77802_ldo_ops_logic2 = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77802_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_mode = max77802_set_mode, + .get_mode = max77802_get_mode, + .set_suspend_mode = max77802_set_suspend_mode, +}; + +/* BUCKS 1, 6 */ +static const struct regulator_ops max77802_buck_16_dvs_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77802_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_disable = max77802_set_suspend_disable, +}; + +/* BUCKs 2-4 */ +static const struct regulator_ops max77802_buck_234_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77802_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_disable = max77802_set_suspend_disable, + .set_suspend_mode = max77802_set_suspend_mode, +}; + +/* BUCKs 5, 7-10 */ +static const struct regulator_ops max77802_buck_dvs_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = max77802_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = max77802_set_suspend_disable, +}; + +/* LDOs 3-7, 9-14, 18-26, 28, 29, 32-34 */ +#define regulator_77802_desc_p_ldo(num, supply, log) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_LDO##num, \ + .supply_name = "inl"#supply, \ + .ops = &max77802_ldo_ops_logic##log, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 800000, \ + .uV_step = 50000, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 1 << 6, \ + .vsel_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77802_VSEL_MASK, \ + .enable_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77802_OPMODE_MASK << MAX77802_OPMODE_SHIFT_LDO, \ + .of_map_mode = max77802_map_mode, \ +} + +/* LDOs 1, 2, 8, 15, 17, 27, 30, 35 */ +#define regulator_77802_desc_n_ldo(num, supply, log) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_LDO##num, \ + .supply_name = "inl"#supply, \ + .ops = &max77802_ldo_ops_logic##log, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 800000, \ + .uV_step = 25000, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 1 << 6, \ + .vsel_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \ + .vsel_mask = MAX77802_VSEL_MASK, \ + .enable_reg = MAX77802_REG_LDO1CTRL1 + num - 1, \ + .enable_mask = MAX77802_OPMODE_MASK << MAX77802_OPMODE_SHIFT_LDO, \ + .of_map_mode = max77802_map_mode, \ +} + +/* BUCKs 1, 6 */ +#define regulator_77802_desc_16_buck(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_BUCK##num, \ + .supply_name = "inb"#num, \ + .ops = &max77802_buck_16_dvs_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 612500, \ + .uV_step = 6250, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 1 << 8, \ + .vsel_reg = MAX77802_REG_BUCK ## num ## DVS1, \ + .vsel_mask = MAX77802_DVS_VSEL_MASK, \ + .enable_reg = MAX77802_REG_BUCK ## num ## CTRL, \ + .enable_mask = MAX77802_OPMODE_MASK, \ + .ramp_reg = MAX77802_REG_BUCK ## num ## CTRL, \ + .ramp_mask = MAX77802_RAMP_RATE_MASK_4BIT, \ + .ramp_delay_table = max77802_buck16_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(max77802_buck16_ramp_table), \ + .of_map_mode = max77802_map_mode, \ +} + +/* BUCKS 2-4 */ +#define regulator_77802_desc_234_buck(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_BUCK##num, \ + .supply_name = "inb"#num, \ + .ops = &max77802_buck_234_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 600000, \ + .uV_step = 6250, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 0x91, \ + .vsel_reg = MAX77802_REG_BUCK ## num ## DVS1, \ + .vsel_mask = MAX77802_DVS_VSEL_MASK, \ + .enable_reg = MAX77802_REG_BUCK ## num ## CTRL1, \ + .enable_mask = MAX77802_OPMODE_MASK << \ + MAX77802_OPMODE_BUCK234_SHIFT, \ + .ramp_reg = MAX77802_REG_BUCK ## num ## CTRL1, \ + .ramp_mask = MAX77802_RAMP_RATE_MASK_2BIT, \ + .ramp_delay_table = max77802_buck234_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(max77802_buck234_ramp_table), \ + .of_map_mode = max77802_map_mode, \ +} + +/* BUCK 5 */ +#define regulator_77802_desc_buck5(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_BUCK##num, \ + .supply_name = "inb"#num, \ + .ops = &max77802_buck_dvs_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 750000, \ + .uV_step = 50000, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 1 << 6, \ + .vsel_reg = MAX77802_REG_BUCK5OUT, \ + .vsel_mask = MAX77802_VSEL_MASK, \ + .enable_reg = MAX77802_REG_BUCK5CTRL, \ + .enable_mask = MAX77802_OPMODE_MASK, \ + .of_map_mode = max77802_map_mode, \ +} + +/* BUCKs 7-10 */ +#define regulator_77802_desc_buck7_10(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = MAX77802_BUCK##num, \ + .supply_name = "inb"#num, \ + .ops = &max77802_buck_dvs_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 750000, \ + .uV_step = 50000, \ + .ramp_delay = MAX77802_RAMP_DELAY, \ + .n_voltages = 1 << 6, \ + .vsel_reg = MAX77802_REG_BUCK7OUT + (num - 7) * 3, \ + .vsel_mask = MAX77802_VSEL_MASK, \ + .enable_reg = MAX77802_REG_BUCK7CTRL + (num - 7) * 3, \ + .enable_mask = MAX77802_OPMODE_MASK, \ + .of_map_mode = max77802_map_mode, \ +} + +static const struct regulator_desc regulators[] = { + regulator_77802_desc_16_buck(1), + regulator_77802_desc_234_buck(2), + regulator_77802_desc_234_buck(3), + regulator_77802_desc_234_buck(4), + regulator_77802_desc_buck5(5), + regulator_77802_desc_16_buck(6), + regulator_77802_desc_buck7_10(7), + regulator_77802_desc_buck7_10(8), + regulator_77802_desc_buck7_10(9), + regulator_77802_desc_buck7_10(10), + regulator_77802_desc_n_ldo(1, 10, 2), + regulator_77802_desc_n_ldo(2, 10, 1), + regulator_77802_desc_p_ldo(3, 3, 2), + regulator_77802_desc_p_ldo(4, 6, 1), + regulator_77802_desc_p_ldo(5, 3, 1), + regulator_77802_desc_p_ldo(6, 3, 1), + regulator_77802_desc_p_ldo(7, 3, 1), + regulator_77802_desc_n_ldo(8, 1, 1), + regulator_77802_desc_p_ldo(9, 5, 1), + regulator_77802_desc_p_ldo(10, 4, 1), + regulator_77802_desc_p_ldo(11, 4, 1), + regulator_77802_desc_p_ldo(12, 9, 1), + regulator_77802_desc_p_ldo(13, 4, 1), + regulator_77802_desc_p_ldo(14, 4, 1), + regulator_77802_desc_n_ldo(15, 1, 1), + regulator_77802_desc_n_ldo(17, 2, 1), + regulator_77802_desc_p_ldo(18, 7, 1), + regulator_77802_desc_p_ldo(19, 5, 1), + regulator_77802_desc_p_ldo(20, 7, 2), + regulator_77802_desc_p_ldo(21, 6, 2), + regulator_77802_desc_p_ldo(23, 9, 1), + regulator_77802_desc_p_ldo(24, 6, 1), + regulator_77802_desc_p_ldo(25, 9, 1), + regulator_77802_desc_p_ldo(26, 9, 1), + regulator_77802_desc_n_ldo(27, 2, 1), + regulator_77802_desc_p_ldo(28, 7, 1), + regulator_77802_desc_p_ldo(29, 7, 1), + regulator_77802_desc_n_ldo(30, 2, 1), + regulator_77802_desc_p_ldo(32, 9, 1), + regulator_77802_desc_p_ldo(33, 6, 1), + regulator_77802_desc_p_ldo(34, 9, 1), + regulator_77802_desc_n_ldo(35, 2, 1), +}; + +static int max77802_pmic_probe(struct platform_device *pdev) +{ + struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct max77802_regulator_prv *max77802; + int i, val; + struct regulator_config config = { }; + + max77802 = devm_kzalloc(&pdev->dev, + sizeof(struct max77802_regulator_prv), + GFP_KERNEL); + if (!max77802) + return -ENOMEM; + + config.dev = iodev->dev; + config.regmap = iodev->regmap; + config.driver_data = max77802; + platform_set_drvdata(pdev, max77802); + + for (i = 0; i < MAX77802_REG_MAX; i++) { + struct regulator_dev *rdev; + unsigned int id = regulators[i].id; + int shift = max77802_get_opmode_shift(id); + int ret; + + ret = regmap_read(iodev->regmap, regulators[i].enable_reg, &val); + if (ret < 0) { + dev_warn(&pdev->dev, + "cannot read current mode for %d\n", i); + val = MAX77802_OPMODE_NORMAL; + } else { + val = val >> shift & MAX77802_OPMODE_MASK; + } + + /* + * If the regulator is disabled and the system warm rebooted, + * the hardware reports OFF as the regulator operating mode. + * Default to operating mode NORMAL in that case. + */ + if (id < ARRAY_SIZE(max77802->opmode)) { + if (val == MAX77802_STATUS_OFF) + max77802->opmode[id] = MAX77802_OPMODE_NORMAL; + else + max77802->opmode[id] = val; + } + + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, + "regulator init failed for %d: %d\n", i, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id max77802_pmic_id[] = { + { .name = "max77802-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, max77802_pmic_id); + +static struct platform_driver max77802_pmic_driver = { + .driver = { + .name = "max77802-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max77802_pmic_probe, + .id_table = max77802_pmic_id, +}; + +module_platform_driver(max77802_pmic_driver); + +MODULE_DESCRIPTION("MAXIM 77802 Regulator Driver"); +MODULE_AUTHOR("Simon Glass "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77826-regulator.c b/drivers/regulator/max77826-regulator.c new file mode 100644 index 000000000..8b60a9fca --- /dev/null +++ b/drivers/regulator/max77826-regulator.c @@ -0,0 +1,299 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// max77826-regulator.c - regulator driver for Maxim MAX77826 +// +// Author: Iskren Chernev + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum max77826_registers { + MAX77826_REG_INT_SRC = 0x00, + MAX77826_REG_SYS_INT, + MAX77826_REG_INT1, + MAX77826_REG_INT2, + MAX77826_REG_BB_INT, + MAX77826_REG_INT_SRC_M, + MAX77826_REG_TOPSYS_INT_M, + MAX77826_REG_INT1_M, + MAX77826_REG_INT2_M, + MAX77826_REG_BB_INT_M, + MAX77826_REG_TOPSYS_STAT, + MAX77826_REG_STAT1, + MAX77826_REG_STAT2, + MAX77826_REG_BB_STAT, + /* 0x0E - 0x0F: Reserved */ + MAX77826_REG_LDO_OPMD1 = 0x10, + MAX77826_REG_LDO_OPMD2, + MAX77826_REG_LDO_OPMD3, + MAX77826_REG_LDO_OPMD4, + MAX77826_REG_B_BB_OPMD, + /* 0x15 - 0x1F: Reserved */ + MAX77826_REG_LDO1_CFG = 0x20, + MAX77826_REG_LDO2_CFG, + MAX77826_REG_LDO3_CFG, + MAX77826_REG_LDO4_CFG, + MAX77826_REG_LDO5_CFG, + MAX77826_REG_LDO6_CFG, + MAX77826_REG_LDO7_CFG, + MAX77826_REG_LDO8_CFG, + MAX77826_REG_LDO9_CFG, + MAX77826_REG_LDO10_CFG, + MAX77826_REG_LDO11_CFG, + MAX77826_REG_LDO12_CFG, + MAX77826_REG_LDO13_CFG, + MAX77826_REG_LDO14_CFG, + MAX77826_REG_LDO15_CFG, + /* 0x2F: Reserved */ + MAX77826_REG_BUCK_CFG = 0x30, + MAX77826_REG_BUCK_VOUT, + MAX77826_REG_BB_CFG, + MAX77826_REG_BB_VOUT, + /* 0x34 - 0x3F: Reserved */ + MAX77826_REG_BUCK_SS_FREQ = 0x40, + MAX77826_REG_UVLO_FALL, + /* 0x42 - 0xCE: Reserved */ + MAX77826_REG_DEVICE_ID = 0xCF, +}; + +enum max77826_regulators { + MAX77826_LDO1 = 0, + MAX77826_LDO2, + MAX77826_LDO3, + MAX77826_LDO4, + MAX77826_LDO5, + MAX77826_LDO6, + MAX77826_LDO7, + MAX77826_LDO8, + MAX77826_LDO9, + MAX77826_LDO10, + MAX77826_LDO11, + MAX77826_LDO12, + MAX77826_LDO13, + MAX77826_LDO14, + MAX77826_LDO15, + MAX77826_BUCK, + MAX77826_BUCKBOOST, + MAX77826_MAX_REGULATORS, +}; + +#define MAX77826_MASK_LDO 0x7f +#define MAX77826_MASK_BUCK 0xff +#define MAX77826_MASK_BUCKBOOST 0x7f +#define MAX77826_BUCK_RAMP_DELAY 12500 + +/* values in mV */ +/* for LDO1-3 */ +#define MAX77826_NMOS_LDO_VOLT_MIN 600000 +#define MAX77826_NMOS_LDO_VOLT_MAX 2187500 +#define MAX77826_NMOS_LDO_VOLT_STEP 12500 + +/* for LDO4-15 */ +#define MAX77826_PMOS_LDO_VOLT_MIN 800000 +#define MAX77826_PMOS_LDO_VOLT_MAX 3975000 +#define MAX77826_PMOS_LDO_VOLT_STEP 25000 + +/* for BUCK */ +#define MAX77826_BUCK_VOLT_MIN 500000 +#define MAX77826_BUCK_VOLT_MAX 1800000 +#define MAX77826_BUCK_VOLT_STEP 6250 + +/* for BUCKBOOST */ +#define MAX77826_BUCKBOOST_VOLT_MIN 2600000 +#define MAX77826_BUCKBOOST_VOLT_MAX 4187500 +#define MAX77826_BUCKBOOST_VOLT_STEP 12500 +#define MAX77826_VOLT_RANGE(_type) \ + ((MAX77826_ ## _type ## _VOLT_MAX - \ + MAX77826_ ## _type ## _VOLT_MIN) / \ + MAX77826_ ## _type ## _VOLT_STEP + 1) + +#define MAX77826_LDO(_id, _type) \ + [MAX77826_LDO ## _id] = { \ + .id = MAX77826_LDO ## _id, \ + .name = "LDO"#_id, \ + .of_match = of_match_ptr("LDO"#_id), \ + .regulators_node = "regulators", \ + .ops = &max77826_most_ops, \ + .min_uV = MAX77826_ ## _type ## _LDO_VOLT_MIN, \ + .uV_step = MAX77826_ ## _type ## _LDO_VOLT_STEP, \ + .n_voltages = MAX77826_VOLT_RANGE(_type ## _LDO), \ + .enable_reg = MAX77826_REG_LDO_OPMD1 + (_id - 1) / 4, \ + .enable_mask = BIT(((_id - 1) % 4) * 2 + 1), \ + .vsel_reg = MAX77826_REG_LDO1_CFG + (_id - 1), \ + .vsel_mask = MAX77826_MASK_LDO, \ + .owner = THIS_MODULE, \ + } + +#define MAX77826_BUCK(_idx, _id, _ops) \ + [MAX77826_ ## _id] = { \ + .id = MAX77826_ ## _id, \ + .name = #_id, \ + .of_match = of_match_ptr(#_id), \ + .regulators_node = "regulators", \ + .ops = &_ops, \ + .min_uV = MAX77826_ ## _id ## _VOLT_MIN, \ + .uV_step = MAX77826_ ## _id ## _VOLT_STEP, \ + .n_voltages = MAX77826_VOLT_RANGE(_id), \ + .enable_reg = MAX77826_REG_B_BB_OPMD, \ + .enable_mask = BIT(_idx * 2 + 1), \ + .vsel_reg = MAX77826_REG_BUCK_VOUT + _idx * 2, \ + .vsel_mask = MAX77826_MASK_ ## _id, \ + .owner = THIS_MODULE, \ + } + + + +struct max77826_regulator_info { + struct regmap *regmap; +}; + +static const struct regmap_config max77826_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77826_REG_DEVICE_ID, +}; + +static int max77826_set_voltage_time_sel(struct regulator_dev *, + unsigned int old_selector, + unsigned int new_selector); + +static const struct regulator_ops max77826_most_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops max77826_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = max77826_set_voltage_time_sel, +}; + +static const struct regulator_desc max77826_regulators_desc[] = { + MAX77826_LDO(1, NMOS), + MAX77826_LDO(2, NMOS), + MAX77826_LDO(3, NMOS), + MAX77826_LDO(4, PMOS), + MAX77826_LDO(5, PMOS), + MAX77826_LDO(6, PMOS), + MAX77826_LDO(7, PMOS), + MAX77826_LDO(8, PMOS), + MAX77826_LDO(9, PMOS), + MAX77826_LDO(10, PMOS), + MAX77826_LDO(11, PMOS), + MAX77826_LDO(12, PMOS), + MAX77826_LDO(13, PMOS), + MAX77826_LDO(14, PMOS), + MAX77826_LDO(15, PMOS), + MAX77826_BUCK(0, BUCK, max77826_buck_ops), + MAX77826_BUCK(1, BUCKBOOST, max77826_most_ops), +}; + +static int max77826_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + if (new_selector > old_selector) { + return DIV_ROUND_UP(MAX77826_BUCK_VOLT_STEP * + (new_selector - old_selector), + MAX77826_BUCK_RAMP_DELAY); + } + + return 0; +} + +static int max77826_read_device_id(struct regmap *regmap, struct device *dev) +{ + unsigned int device_id; + int res; + + res = regmap_read(regmap, MAX77826_REG_DEVICE_ID, &device_id); + if (!res) + dev_dbg(dev, "DEVICE_ID: 0x%x\n", device_id); + + return res; +} + +static int max77826_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct max77826_regulator_info *info; + struct regulator_config config = {}; + struct regulator_dev *rdev; + struct regmap *regmap; + int i; + + info = devm_kzalloc(dev, sizeof(struct max77826_regulator_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(client, &max77826_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + + info->regmap = regmap; + i2c_set_clientdata(client, info); + + config.dev = dev; + config.regmap = regmap; + config.driver_data = info; + + for (i = 0; i < MAX77826_MAX_REGULATORS; i++) { + rdev = devm_regulator_register(dev, + &max77826_regulators_desc[i], + &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator!\n"); + return PTR_ERR(rdev); + } + } + + return max77826_read_device_id(regmap, dev); +} + +static const struct of_device_id __maybe_unused max77826_of_match[] = { + { .compatible = "maxim,max77826" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max77826_of_match); + +static const struct i2c_device_id max77826_id[] = { + { .name = "max77826-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, max77826_id); + +static struct i2c_driver max77826_regulator_driver = { + .driver = { + .name = "max77826", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max77826_of_match), + }, + .probe = max77826_i2c_probe, + .id_table = max77826_id, +}; +module_i2c_driver(max77826_regulator_driver); + +MODULE_AUTHOR("Iskren Chernev "); +MODULE_DESCRIPTION("MAX77826 PMIC regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77838-regulator.c b/drivers/regulator/max77838-regulator.c new file mode 100644 index 000000000..765756fdc --- /dev/null +++ b/drivers/regulator/max77838-regulator.c @@ -0,0 +1,221 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// regulator driver for Maxim MAX77838 +// +// based on max77826-regulator.c +// +// Copyright (c) 2025, Ivaylo Ivanov + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum max77838_registers { + MAX77838_REG_DEVICE_ID = 0x00, + MAX77838_REG_TOPSYS_STAT, + MAX77838_REG_STAT, + MAX77838_REG_EN, + MAX77838_REG_GPIO_PD_CTRL, + MAX77838_REG_UVLO_CFG1, + /* 0x06 - 0x0B: reserved */ + MAX77838_REG_I2C_CFG = 0x0C, + /* 0x0D - 0x0F: reserved */ + MAX77838_REG_LDO1_CFG = 0x10, + MAX77838_REG_LDO2_CFG, + MAX77838_REG_LDO3_CFG, + MAX77838_REG_LDO4_CFG, + /* 0x14 - 0x1F: reserved */ + MAX77838_REG_BUCK_CFG1 = 0x20, + MAX77838_REG_BUCK_VOUT, +}; + +enum max77838_regulators { + MAX77838_LDO1 = 0, + MAX77838_LDO2, + MAX77838_LDO3, + MAX77838_LDO4, + MAX77838_BUCK, + MAX77838_MAX_REGULATORS, +}; + +#define MAX77838_MASK_LDO 0x7f +#define MAX77838_MASK_BUCK 0xff + +#define MAX77838_LDO1_EN BIT(0) +#define MAX77838_LDO2_EN BIT(1) +#define MAX77838_LDO3_EN BIT(2) +#define MAX77838_LDO4_EN BIT(3) +#define MAX77838_BUCK_EN BIT(4) + +#define MAX77838_BUCK_AD BIT(3) +#define MAX77838_LDO_AD BIT(7) + +#define MAX77838_LDO_VOLT_MIN 600000 +#define MAX77838_LDO_VOLT_MAX 3775000 +#define MAX77838_LDO_VOLT_STEP 25000 + +#define MAX77838_BUCK_VOLT_MIN 500000 +#define MAX77838_BUCK_VOLT_MAX 2093750 +#define MAX77838_BUCK_VOLT_STEP 6250 + +#define MAX77838_VOLT_RANGE(_type) \ + ((MAX77838_ ## _type ## _VOLT_MAX - \ + MAX77838_ ## _type ## _VOLT_MIN) / \ + MAX77838_ ## _type ## _VOLT_STEP + 1) + +#define MAX77838_LDO(_id) \ + [MAX77838_LDO ## _id] = { \ + .id = MAX77838_LDO ## _id, \ + .name = "ldo"#_id, \ + .of_match = of_match_ptr("ldo"#_id), \ + .regulators_node = "regulators", \ + .ops = &max77838_regulator_ops, \ + .min_uV = MAX77838_LDO_VOLT_MIN, \ + .uV_step = MAX77838_LDO_VOLT_STEP, \ + .n_voltages = MAX77838_VOLT_RANGE(LDO), \ + .enable_reg = MAX77838_REG_EN, \ + .enable_mask = MAX77838_LDO ## _id ## _EN, \ + .vsel_reg = MAX77838_REG_LDO ## _id ## _CFG, \ + .vsel_mask = MAX77838_MASK_LDO, \ + .active_discharge_off = 0, \ + .active_discharge_on = MAX77838_LDO_AD, \ + .active_discharge_mask = MAX77838_LDO_AD, \ + .active_discharge_reg = MAX77838_REG_LDO ## _id ## _CFG, \ + .owner = THIS_MODULE, \ + } + +#define MAX77838_BUCK_DESC \ + [MAX77838_BUCK] = { \ + .id = MAX77838_BUCK, \ + .name = "buck", \ + .of_match = of_match_ptr("buck"), \ + .regulators_node = "regulators", \ + .ops = &max77838_regulator_ops, \ + .min_uV = MAX77838_BUCK_VOLT_MIN, \ + .uV_step = MAX77838_BUCK_VOLT_STEP, \ + .n_voltages = MAX77838_VOLT_RANGE(BUCK), \ + .enable_reg = MAX77838_REG_EN, \ + .enable_mask = MAX77838_BUCK_EN, \ + .vsel_reg = MAX77838_REG_BUCK_VOUT, \ + .vsel_mask = MAX77838_MASK_BUCK, \ + .active_discharge_off = 0, \ + .active_discharge_on = MAX77838_BUCK_AD, \ + .active_discharge_mask = MAX77838_BUCK_AD, \ + .active_discharge_reg = MAX77838_REG_BUCK_CFG1, \ + .owner = THIS_MODULE, \ + } + +struct max77838_regulator_info { + struct regmap *regmap; +}; + +static const struct regmap_config max77838_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77838_REG_BUCK_VOUT, +}; + +static const struct regulator_ops max77838_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_desc max77838_regulators_desc[] = { + MAX77838_LDO(1), + MAX77838_LDO(2), + MAX77838_LDO(3), + MAX77838_LDO(4), + MAX77838_BUCK_DESC, +}; + +static int max77838_read_device_id(struct regmap *regmap, struct device *dev) +{ + unsigned int device_id; + int ret; + + ret = regmap_read(regmap, MAX77838_REG_DEVICE_ID, &device_id); + if (!ret) + dev_dbg(dev, "DEVICE_ID: 0x%x\n", device_id); + + return ret; +} + +static int max77838_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct max77838_regulator_info *info; + struct regulator_config config = {}; + struct regulator_dev *rdev; + struct regmap *regmap; + int i; + + info = devm_kzalloc(dev, sizeof(struct max77838_regulator_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(client, &max77838_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + + info->regmap = regmap; + i2c_set_clientdata(client, info); + + config.dev = dev; + config.regmap = regmap; + config.driver_data = info; + + for (i = 0; i < MAX77838_MAX_REGULATORS; i++) { + rdev = devm_regulator_register(dev, + &max77838_regulators_desc[i], + &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator!\n"); + return PTR_ERR(rdev); + } + } + + return max77838_read_device_id(regmap, dev); +} + +static const struct of_device_id __maybe_unused max77838_of_match[] = { + { .compatible = "maxim,max77838" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max77838_of_match); + +static const struct i2c_device_id max77838_id[] = { + { .name = "max77838-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, max77838_id); + +static struct i2c_driver max77838_regulator_driver = { + .driver = { + .name = "max77838", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max77838_of_match), + }, + .probe = max77838_i2c_probe, + .id_table = max77838_id, +}; +module_i2c_driver(max77838_regulator_driver); + +MODULE_AUTHOR("Ivaylo Ivanov "); +MODULE_DESCRIPTION("MAX77838 PMIC regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c new file mode 100644 index 000000000..f1410f845 --- /dev/null +++ b/drivers/regulator/max77857-regulator.c @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Analog Devices, Inc. + * ADI Regulator driver for the MAX77857 + * MAX77859 and MAX77831. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX77857_REG_INT_SRC 0x10 +#define MAX77857_REG_INT_MASK 0x11 +#define MAX77857_REG_CONT1 0x12 +#define MAX77857_REG_CONT2 0x13 +#define MAX77857_REG_CONT3 0x14 + +#define MAX77857_INT_SRC_OCP BIT(0) +#define MAX77857_INT_SRC_THS BIT(1) +#define MAX77857_INT_SRC_HARDSHORT BIT(2) +#define MAX77857_INT_SRC_OVP BIT(3) +#define MAX77857_INT_SRC_POK BIT(4) + +#define MAX77857_ILIM_MASK GENMASK(2, 0) +#define MAX77857_CONT1_FREQ GENMASK(4, 3) +#define MAX77857_CONT3_FPWM BIT(5) + +#define MAX77859_REG_INT_SRC 0x11 +#define MAX77859_REG_CONT1 0x13 +#define MAX77859_REG_CONT2 0x14 +#define MAX77859_REG_CONT3 0x15 +#define MAX77859_REG_CONT5 0x17 +#define MAX77859_CONT2_FPWM BIT(2) +#define MAX77859_CONT2_INTB BIT(3) +#define MAX77859_CONT3_DVS_START BIT(2) +#define MAX77859_VOLTAGE_SEL_MASK GENMASK(9, 0) + +#define MAX77859_CURRENT_MIN 1000000 +#define MAX77859_CURRENT_MAX 5000000 +#define MAX77859_CURRENT_STEP 50000 + +enum max77857_id { + ID_MAX77831 = 1, + ID_MAX77857, + ID_MAX77859, + ID_MAX77859A, +}; + +static bool max77857_volatile_reg(struct device *dev, unsigned int reg) +{ + enum max77857_id id = (uintptr_t)dev_get_drvdata(dev); + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + return reg == MAX77857_REG_INT_SRC; + case ID_MAX77859: + case ID_MAX77859A: + return reg == MAX77859_REG_INT_SRC; + default: + return true; + } +} + +static const struct regmap_config max77857_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = max77857_volatile_reg, +}; + +static int max77857_get_status(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MAX77857_REG_INT_SRC, &val); + if (ret) + return ret; + + if (FIELD_GET(MAX77857_INT_SRC_POK, val)) + return REGULATOR_STATUS_ON; + + return REGULATOR_STATUS_ERROR; +} + +static unsigned int max77857_get_mode(struct regulator_dev *rdev) +{ + enum max77857_id id = (uintptr_t)rdev_get_drvdata(rdev); + unsigned int regval; + int ret; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + ret = regmap_read(rdev->regmap, MAX77857_REG_CONT3, ®val); + if (ret) + return ret; + + if (FIELD_GET(MAX77857_CONT3_FPWM, regval)) + return REGULATOR_MODE_FAST; + + break; + case ID_MAX77859: + case ID_MAX77859A: + ret = regmap_read(rdev->regmap, MAX77859_REG_CONT2, ®val); + if (ret) + return ret; + + if (FIELD_GET(MAX77859_CONT2_FPWM, regval)) + return REGULATOR_MODE_FAST; + + break; + default: + return -EINVAL; + } + + return REGULATOR_MODE_NORMAL; +} + +static int max77857_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + enum max77857_id id = (uintptr_t)rdev_get_drvdata(rdev); + unsigned int reg, val; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + reg = MAX77857_REG_CONT3; + val = MAX77857_CONT3_FPWM; + break; + case ID_MAX77859: + case ID_MAX77859A: + reg = MAX77859_REG_CONT2; + val = MAX77859_CONT2_FPWM; + break; + default: + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_set_bits(rdev->regmap, reg, val); + case REGULATOR_MODE_NORMAL: + return regmap_clear_bits(rdev->regmap, reg, val); + default: + return -EINVAL; + } +} + +static int max77857_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MAX77857_REG_INT_SRC, &val); + if (ret) + return ret; + + *flags = 0; + + if (FIELD_GET(MAX77857_INT_SRC_OVP, val)) + *flags |= REGULATOR_ERROR_OVER_VOLTAGE_WARN; + + if (FIELD_GET(MAX77857_INT_SRC_OCP, val) || + FIELD_GET(MAX77857_INT_SRC_HARDSHORT, val)) + *flags |= REGULATOR_ERROR_OVER_CURRENT; + + if (FIELD_GET(MAX77857_INT_SRC_THS, val)) + *flags |= REGULATOR_ERROR_OVER_TEMP; + + if (!FIELD_GET(MAX77857_INT_SRC_POK, val)) + *flags |= REGULATOR_ERROR_FAIL; + + return 0; +} + +static struct linear_range max77859_lin_ranges[] = { + REGULATOR_LINEAR_RANGE(3200000, 0x0A0, 0x320, 20000) +}; + +static const unsigned int max77859_ramp_table[4] = { + 1000, 500, 250, 125 +}; + +static int max77859_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + __be16 reg; + int ret; + + reg = cpu_to_be16(sel); + + ret = regmap_bulk_write(rdev->regmap, MAX77859_REG_CONT3, ®, 2); + if (ret) + return ret; + + /* actually apply new voltage */ + return regmap_set_bits(rdev->regmap, MAX77859_REG_CONT3, + MAX77859_CONT3_DVS_START); +} + +static int max77859_get_voltage_sel(struct regulator_dev *rdev) +{ + __be16 reg; + int ret; + + ret = regmap_bulk_read(rdev->regmap, MAX77859_REG_CONT3, ®, 2); + if (ret) + return ret; + + return FIELD_GET(MAX77859_VOLTAGE_SEL_MASK, __be16_to_cpu(reg)); +} + +static int max77859_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) +{ + u32 selector; + + if (max_uA < MAX77859_CURRENT_MIN) + return -EINVAL; + + selector = 0x12 + (max_uA - MAX77859_CURRENT_MIN) / MAX77859_CURRENT_STEP; + + selector = clamp_val(selector, 0x00, 0x7F); + + return regmap_write(rdev->regmap, MAX77859_REG_CONT5, selector); +} + +static int max77859_get_current_limit(struct regulator_dev *rdev) +{ + u32 selector; + int ret; + + ret = regmap_read(rdev->regmap, MAX77859_REG_CONT5, &selector); + if (ret) + return ret; + + if (selector <= 0x12) + return MAX77859_CURRENT_MIN; + + if (selector >= 0x64) + return MAX77859_CURRENT_MAX; + + return MAX77859_CURRENT_MIN + (selector - 0x12) * MAX77859_CURRENT_STEP; +} + +static const struct regulator_ops max77859_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = max77859_set_voltage_sel, + .get_voltage_sel = max77859_get_voltage_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static const struct regulator_ops max77859a_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = max77859_set_voltage_sel, + .get_voltage_sel = max77859_get_voltage_sel, + .set_current_limit = max77859_set_current_limit, + .get_current_limit = max77859_get_current_limit, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static const struct regulator_ops max77857_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static struct linear_range max77857_lin_ranges[] = { + REGULATOR_LINEAR_RANGE(4485000, 0x3D, 0xCC, 73500) +}; + +static const unsigned int max77857_switch_freq[] = { + 1200000, 1500000, 1800000, 2100000 +}; + +#define RAMAP_DELAY_INIT_VAL 1333 + +static const unsigned int max77857_ramp_table[2][4] = { + { RAMAP_DELAY_INIT_VAL, 667, 333, 227 }, /* when switch freq is 1.8MHz or 2.1MHz */ + { 1166, 667, 333, 167 }, /* when switch freq is 1.2MHz or 1.5MHz */ +}; + +static struct regulator_desc max77857_regulator_desc = { + .ops = &max77857_regulator_ops, + .name = "max77857", + .linear_ranges = max77857_lin_ranges, + .n_linear_ranges = ARRAY_SIZE(max77857_lin_ranges), + .vsel_mask = 0xFF, + .vsel_reg = MAX77857_REG_CONT2, + .ramp_delay_table = max77857_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(max77857_ramp_table[0]), + .ramp_reg = MAX77857_REG_CONT3, + .ramp_mask = GENMASK(1, 0), + .ramp_delay = RAMAP_DELAY_INIT_VAL, + .owner = THIS_MODULE, +}; + +static void max77857_calc_range(struct device *dev, enum max77857_id id) +{ + struct linear_range *range; + unsigned long vref_step; + u32 rtop = 0; + u32 rbot = 0; + + device_property_read_u32(dev, "adi,rtop-ohms", &rtop); + device_property_read_u32(dev, "adi,rbot-ohms", &rbot); + + if (!rbot || !rtop) + return; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + range = max77857_lin_ranges; + vref_step = 4900UL; + break; + case ID_MAX77859: + case ID_MAX77859A: + range = max77859_lin_ranges; + vref_step = 1250UL; + break; + } + + range->step = DIV_ROUND_CLOSEST(vref_step * (rbot + rtop), rbot); + range->min = range->step * range->min_sel; +} + +static int max77857_probe(struct i2c_client *client) +{ + const struct i2c_device_id *i2c_id; + struct device *dev = &client->dev; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + enum max77857_id id; + u32 switch_freq = 0; + int ret; + + i2c_id = i2c_client_get_device_id(client); + if (!i2c_id) + return -EINVAL; + + id = i2c_id->driver_data; + + dev_set_drvdata(dev, (void *)id); + + if (id == ID_MAX77859 || id == ID_MAX77859A) { + max77857_regulator_desc.ops = &max77859_regulator_ops; + max77857_regulator_desc.linear_ranges = max77859_lin_ranges; + max77857_regulator_desc.ramp_delay_table = max77859_ramp_table; + max77857_regulator_desc.ramp_delay = max77859_ramp_table[0]; + } + + if (id == ID_MAX77859A) + max77857_regulator_desc.ops = &max77859a_regulator_ops; + + max77857_calc_range(dev, id); + + regmap = devm_regmap_init_i2c(client, &max77857_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "cannot initialize regmap\n"); + + device_property_read_u32(dev, "adi,switch-frequency-hz", &switch_freq); + if (switch_freq) { + switch_freq = find_closest(switch_freq, max77857_switch_freq, + ARRAY_SIZE(max77857_switch_freq)); + + if (id == ID_MAX77831 && switch_freq == 3) + switch_freq = 2; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + ret = regmap_update_bits(regmap, MAX77857_REG_CONT1, + MAX77857_CONT1_FREQ, switch_freq); + + if (switch_freq >= 2) + break; + + max77857_regulator_desc.ramp_delay_table = max77857_ramp_table[1]; + max77857_regulator_desc.ramp_delay = max77857_ramp_table[1][0]; + break; + case ID_MAX77859: + case ID_MAX77859A: + ret = regmap_update_bits(regmap, MAX77859_REG_CONT1, + MAX77857_CONT1_FREQ, switch_freq); + break; + } + if (ret) + return ret; + } + + cfg.dev = dev; + cfg.driver_data = (void *)id; + cfg.regmap = regmap; + cfg.init_data = of_get_regulator_init_data(dev, dev->of_node, + &max77857_regulator_desc); + if (!cfg.init_data) + return -ENOMEM; + + rdev = devm_regulator_register(dev, &max77857_regulator_desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "cannot register regulator\n"); + + return 0; +} + +static const struct i2c_device_id max77857_id[] = { + { .name = "max77831", .driver_data = ID_MAX77831 }, + { .name = "max77857", .driver_data = ID_MAX77857 }, + { .name = "max77859", .driver_data = ID_MAX77859 }, + { .name = "max77859a", .driver_data = ID_MAX77859A }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max77857_id); + +static const struct of_device_id max77857_of_id[] = { + { .compatible = "adi,max77831", .data = (void *)ID_MAX77831 }, + { .compatible = "adi,max77857", .data = (void *)ID_MAX77857 }, + { .compatible = "adi,max77859", .data = (void *)ID_MAX77859 }, + { .compatible = "adi,max77859a", .data = (void *)ID_MAX77859A }, + { } +}; +MODULE_DEVICE_TABLE(of, max77857_of_id); + +static struct i2c_driver max77857_driver = { + .driver = { + .name = "max77857", + .of_match_table = max77857_of_id, + }, + .id_table = max77857_id, + .probe = max77857_probe, +}; +module_i2c_driver(max77857_driver); + +MODULE_DESCRIPTION("Analog Devices MAX77857 Buck-Boost Converter Driver"); +MODULE_AUTHOR("Ibrahim Tilki "); +MODULE_AUTHOR("Okan Sahin "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max8649.c b/drivers/regulator/max8649.c new file mode 100644 index 000000000..2d1740524 --- /dev/null +++ b/drivers/regulator/max8649.c @@ -0,0 +1,272 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulators driver for Maxim max8649 + * + * Copyright (C) 2009-2010 Marvell International Ltd. + * Haojian Zhuang + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX8649_DCDC_VMIN 750000 /* uV */ +#define MAX8649_DCDC_VMAX 1380000 /* uV */ +#define MAX8649_DCDC_STEP 10000 /* uV */ +#define MAX8649_VOL_MASK 0x3f + +/* Registers */ +#define MAX8649_MODE0 0x00 +#define MAX8649_MODE1 0x01 +#define MAX8649_MODE2 0x02 +#define MAX8649_MODE3 0x03 +#define MAX8649_CONTROL 0x04 +#define MAX8649_SYNC 0x05 +#define MAX8649_RAMP 0x06 +#define MAX8649_CHIP_ID1 0x08 +#define MAX8649_CHIP_ID2 0x09 + +/* Bits */ +#define MAX8649_EN_PD (1 << 7) +#define MAX8649_VID0_PD (1 << 6) +#define MAX8649_VID1_PD (1 << 5) +#define MAX8649_VID_MASK (3 << 5) + +#define MAX8649_FORCE_PWM (1 << 7) +#define MAX8649_SYNC_EXTCLK (1 << 6) + +#define MAX8649_EXT_MASK (3 << 6) + +#define MAX8649_RAMP_MASK (7 << 5) +#define MAX8649_RAMP_DOWN (1 << 1) + +struct max8649_regulator_info { + struct device *dev; + struct regmap *regmap; + + unsigned mode:2; /* bit[1:0] = VID1, VID0 */ + unsigned extclk_freq:2; + unsigned extclk:1; + unsigned ramp_timing:3; + unsigned ramp_down:1; +}; + +static int max8649_enable_time(struct regulator_dev *rdev) +{ + struct max8649_regulator_info *info = rdev_get_drvdata(rdev); + int voltage, rate, ret; + unsigned int val; + + /* get voltage */ + ret = regmap_read(info->regmap, rdev->desc->vsel_reg, &val); + if (ret != 0) + return ret; + val &= MAX8649_VOL_MASK; + voltage = regulator_list_voltage_linear(rdev, (unsigned char)val); + + /* get rate */ + ret = regmap_read(info->regmap, MAX8649_RAMP, &val); + if (ret != 0) + return ret; + ret = (val & MAX8649_RAMP_MASK) >> 5; + rate = (32 * 1000) >> ret; /* uV/uS */ + + return DIV_ROUND_UP(voltage, rate); +} + +static int max8649_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct max8649_regulator_info *info = rdev_get_drvdata(rdev); + + switch (mode) { + case REGULATOR_MODE_FAST: + regmap_update_bits(info->regmap, rdev->desc->vsel_reg, + MAX8649_FORCE_PWM, MAX8649_FORCE_PWM); + break; + case REGULATOR_MODE_NORMAL: + regmap_update_bits(info->regmap, rdev->desc->vsel_reg, + MAX8649_FORCE_PWM, 0); + break; + default: + return -EINVAL; + } + return 0; +} + +static unsigned int max8649_get_mode(struct regulator_dev *rdev) +{ + struct max8649_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_read(info->regmap, rdev->desc->vsel_reg, &val); + if (ret != 0) + return ret; + if (val & MAX8649_FORCE_PWM) + return REGULATOR_MODE_FAST; + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops max8649_dcdc_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .enable_time = max8649_enable_time, + .set_mode = max8649_set_mode, + .get_mode = max8649_get_mode, + +}; + +static struct regulator_desc dcdc_desc = { + .name = "max8649", + .ops = &max8649_dcdc_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1 << 6, + .owner = THIS_MODULE, + .vsel_mask = MAX8649_VOL_MASK, + .min_uV = MAX8649_DCDC_VMIN, + .uV_step = MAX8649_DCDC_STEP, + .enable_reg = MAX8649_CONTROL, + .enable_mask = MAX8649_EN_PD, + .enable_is_inverted = true, +}; + +static const struct regmap_config max8649_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int max8649_regulator_probe(struct i2c_client *client) +{ + struct max8649_platform_data *pdata = dev_get_platdata(&client->dev); + struct max8649_regulator_info *info = NULL; + struct regulator_dev *regulator; + struct regulator_config config = { }; + unsigned int val; + unsigned char data; + int ret; + + info = devm_kzalloc(&client->dev, sizeof(struct max8649_regulator_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->regmap = devm_regmap_init_i2c(client, &max8649_regmap_config); + if (IS_ERR(info->regmap)) { + ret = PTR_ERR(info->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", ret); + return ret; + } + + info->dev = &client->dev; + i2c_set_clientdata(client, info); + + info->mode = pdata->mode; + switch (info->mode) { + case 0: + dcdc_desc.vsel_reg = MAX8649_MODE0; + break; + case 1: + dcdc_desc.vsel_reg = MAX8649_MODE1; + break; + case 2: + dcdc_desc.vsel_reg = MAX8649_MODE2; + break; + case 3: + dcdc_desc.vsel_reg = MAX8649_MODE3; + break; + default: + break; + } + + ret = regmap_read(info->regmap, MAX8649_CHIP_ID1, &val); + if (ret != 0) { + dev_err(info->dev, "Failed to detect ID of MAX8649:%d\n", + ret); + return ret; + } + dev_info(info->dev, "Detected MAX8649 (ID:%x)\n", val); + + /* enable VID0 & VID1 */ + regmap_update_bits(info->regmap, MAX8649_CONTROL, MAX8649_VID_MASK, 0); + + /* enable/disable external clock synchronization */ + info->extclk = pdata->extclk; + data = (info->extclk) ? MAX8649_SYNC_EXTCLK : 0; + regmap_update_bits(info->regmap, dcdc_desc.vsel_reg, + MAX8649_SYNC_EXTCLK, data); + if (info->extclk) { + /* set external clock frequency */ + info->extclk_freq = pdata->extclk_freq; + regmap_update_bits(info->regmap, MAX8649_SYNC, MAX8649_EXT_MASK, + info->extclk_freq << 6); + } + + if (pdata->ramp_timing) { + info->ramp_timing = pdata->ramp_timing; + regmap_update_bits(info->regmap, MAX8649_RAMP, MAX8649_RAMP_MASK, + info->ramp_timing << 5); + } + + info->ramp_down = pdata->ramp_down; + if (info->ramp_down) { + regmap_update_bits(info->regmap, MAX8649_RAMP, MAX8649_RAMP_DOWN, + MAX8649_RAMP_DOWN); + } + + config.dev = &client->dev; + config.init_data = pdata->regulator; + config.driver_data = info; + config.regmap = info->regmap; + + regulator = devm_regulator_register(&client->dev, &dcdc_desc, + &config); + if (IS_ERR(regulator)) { + dev_err(info->dev, "failed to register regulator %s\n", + dcdc_desc.name); + return PTR_ERR(regulator); + } + + return 0; +} + +static const struct i2c_device_id max8649_id[] = { + { .name = "max8649" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max8649_id); + +static struct i2c_driver max8649_driver = { + .probe = max8649_regulator_probe, + .driver = { + .name = "max8649", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = max8649_id, +}; + +static int __init max8649_init(void) +{ + return i2c_add_driver(&max8649_driver); +} +subsys_initcall(max8649_init); + +static void __exit max8649_exit(void) +{ + i2c_del_driver(&max8649_driver); +} +module_exit(max8649_exit); + +/* Module information */ +MODULE_DESCRIPTION("MAXIM 8649 voltage regulator driver"); +MODULE_AUTHOR("Haojian Zhuang "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c new file mode 100644 index 000000000..ede17099b --- /dev/null +++ b/drivers/regulator/max8660.c @@ -0,0 +1,529 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * max8660.c -- Voltage regulation for the Maxim 8660/8661 + * + * based on max1586.c and wm8400-regulator.c + * + * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K. + * + * Some info: + * + * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf + * + * This chip is a bit nasty because it is a write-only device. Thus, the driver + * uses shadow registers to keep track of its values. The main problem appears + * to be the initialization: When Linux boots up, we cannot know if the chip is + * in the default state or not, so we would have to pass such information in + * platform_data. As this adds a bit of complexity to the driver, this is left + * out for now until it is really needed. + * + * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2. + * + * If the driver is feature complete, it might be worth to check if one set of + * functions for V3-V7 is sufficient. For maximum flexibility during + * development, they are separated for now. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX8660_DCDC_MIN_UV 725000 +#define MAX8660_DCDC_MAX_UV 1800000 +#define MAX8660_DCDC_STEP 25000 +#define MAX8660_DCDC_MAX_SEL 0x2b + +#define MAX8660_LDO5_MIN_UV 1700000 +#define MAX8660_LDO5_MAX_UV 2000000 +#define MAX8660_LDO5_STEP 25000 +#define MAX8660_LDO5_MAX_SEL 0x0c + +#define MAX8660_LDO67_MIN_UV 1800000 +#define MAX8660_LDO67_MAX_UV 3300000 +#define MAX8660_LDO67_STEP 100000 +#define MAX8660_LDO67_MAX_SEL 0x0f + +enum { + MAX8660_OVER1, + MAX8660_OVER2, + MAX8660_VCC1, + MAX8660_ADTV1, + MAX8660_ADTV2, + MAX8660_SDTV1, + MAX8660_SDTV2, + MAX8660_MDTV1, + MAX8660_MDTV2, + MAX8660_L12VCR, + MAX8660_FPWM, + MAX8660_N_REGS, /* not a real register */ +}; + +struct max8660 { + struct i2c_client *client; + u8 shadow_regs[MAX8660_N_REGS]; /* as chip is write only */ +}; + +static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val) +{ + static const u8 max8660_addresses[MAX8660_N_REGS] = { + 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80 + }; + + int ret; + u8 reg_val = (max8660->shadow_regs[reg] & mask) | val; + + dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n", + max8660_addresses[reg], reg_val); + + ret = i2c_smbus_write_byte_data(max8660->client, + max8660_addresses[reg], reg_val); + if (ret == 0) + max8660->shadow_regs[reg] = reg_val; + + return ret; +} + + +/* + * DCDC functions + */ + +static int max8660_dcdc_is_enabled(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 val = max8660->shadow_regs[MAX8660_OVER1]; + u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; + + return !!(val & mask); +} + +static int max8660_dcdc_enable(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; + + return max8660_write(max8660, MAX8660_OVER1, 0xff, bit); +} + +static int max8660_dcdc_disable(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4; + + return max8660_write(max8660, MAX8660_OVER1, mask, 0); +} + +static int max8660_dcdc_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; + u8 selector = max8660->shadow_regs[reg]; + + return selector; +} + +static int max8660_dcdc_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 reg, bits; + int ret; + + reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; + ret = max8660_write(max8660, reg, 0, selector); + if (ret) + return ret; + + /* Select target voltage register and activate regulation */ + bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30; + return max8660_write(max8660, MAX8660_VCC1, 0xff, bits); +} + +static struct regulator_ops max8660_dcdc_ops = { + .is_enabled = max8660_dcdc_is_enabled, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = max8660_dcdc_set_voltage_sel, + .get_voltage_sel = max8660_dcdc_get_voltage_sel, +}; + + +/* + * LDO5 functions + */ + +static int max8660_ldo5_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + + u8 selector = max8660->shadow_regs[MAX8660_MDTV2]; + return selector; +} + +static int max8660_ldo5_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + int ret; + + ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector); + if (ret) + return ret; + + /* Select target voltage register and activate regulation */ + return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0); +} + +static const struct regulator_ops max8660_ldo5_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = max8660_ldo5_set_voltage_sel, + .get_voltage_sel = max8660_ldo5_get_voltage_sel, +}; + + +/* + * LDO67 functions + */ + +static int max8660_ldo67_is_enabled(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 val = max8660->shadow_regs[MAX8660_OVER2]; + u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; + + return !!(val & mask); +} + +static int max8660_ldo67_enable(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; + + return max8660_write(max8660, MAX8660_OVER2, 0xff, bit); +} + +static int max8660_ldo67_disable(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4; + + return max8660_write(max8660, MAX8660_OVER2, mask, 0); +} + +static int max8660_ldo67_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4; + u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf; + + return selector; +} + +static int max8660_ldo67_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max8660 *max8660 = rdev_get_drvdata(rdev); + + if (rdev_get_id(rdev) == MAX8660_V6) + return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector); + else + return max8660_write(max8660, MAX8660_L12VCR, 0x0f, + selector << 4); +} + +static const struct regulator_ops max8660_ldo67_ops = { + .is_enabled = max8660_ldo67_is_enabled, + .enable = max8660_ldo67_enable, + .disable = max8660_ldo67_disable, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = max8660_ldo67_get_voltage_sel, + .set_voltage_sel = max8660_ldo67_set_voltage_sel, +}; + +static const struct regulator_desc max8660_reg[] = { + { + .name = "V3(DCDC)", + .id = MAX8660_V3, + .ops = &max8660_dcdc_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX8660_DCDC_MAX_SEL + 1, + .owner = THIS_MODULE, + .min_uV = MAX8660_DCDC_MIN_UV, + .uV_step = MAX8660_DCDC_STEP, + }, + { + .name = "V4(DCDC)", + .id = MAX8660_V4, + .ops = &max8660_dcdc_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX8660_DCDC_MAX_SEL + 1, + .owner = THIS_MODULE, + .min_uV = MAX8660_DCDC_MIN_UV, + .uV_step = MAX8660_DCDC_STEP, + }, + { + .name = "V5(LDO)", + .id = MAX8660_V5, + .ops = &max8660_ldo5_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX8660_LDO5_MAX_SEL + 1, + .owner = THIS_MODULE, + .min_uV = MAX8660_LDO5_MIN_UV, + .uV_step = MAX8660_LDO5_STEP, + }, + { + .name = "V6(LDO)", + .id = MAX8660_V6, + .ops = &max8660_ldo67_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX8660_LDO67_MAX_SEL + 1, + .owner = THIS_MODULE, + .min_uV = MAX8660_LDO67_MIN_UV, + .uV_step = MAX8660_LDO67_STEP, + }, + { + .name = "V7(LDO)", + .id = MAX8660_V7, + .ops = &max8660_ldo67_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = MAX8660_LDO67_MAX_SEL + 1, + .owner = THIS_MODULE, + .min_uV = MAX8660_LDO67_MIN_UV, + .uV_step = MAX8660_LDO67_STEP, + }, +}; + +enum { + MAX8660 = 0, + MAX8661 = 1, +}; + +#ifdef CONFIG_OF +static const struct of_device_id max8660_dt_ids[] = { + { .compatible = "maxim,max8660", .data = (void *) MAX8660 }, + { .compatible = "maxim,max8661", .data = (void *) MAX8661 }, + { } +}; +MODULE_DEVICE_TABLE(of, max8660_dt_ids); + +static int max8660_pdata_from_dt(struct device *dev, + struct device_node **of_node, + struct max8660_platform_data *pdata) +{ + int matched, i; + struct device_node *np; + struct max8660_subdev_data *sub; + struct of_regulator_match rmatch[ARRAY_SIZE(max8660_reg)] = { }; + + np = of_get_child_by_name(dev->of_node, "regulators"); + if (!np) { + dev_err(dev, "missing 'regulators' subnode in DT\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(rmatch); i++) + rmatch[i].name = max8660_reg[i].name; + + matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch)); + of_node_put(np); + if (matched <= 0) + return matched; + + pdata->subdevs = devm_kcalloc(dev, + matched, + sizeof(struct max8660_subdev_data), + GFP_KERNEL); + if (!pdata->subdevs) + return -ENOMEM; + + pdata->num_subdevs = matched; + sub = pdata->subdevs; + + for (i = 0; i < matched; i++) { + sub->id = i; + sub->name = rmatch[i].name; + sub->platform_data = rmatch[i].init_data; + of_node[i] = rmatch[i].of_node; + sub++; + } + + return 0; +} +#else +static inline int max8660_pdata_from_dt(struct device *dev, + struct device_node **of_node, + struct max8660_platform_data *pdata) +{ + return 0; +} +#endif + +static int max8660_probe(struct i2c_client *client) +{ + const struct i2c_device_id *i2c_id = i2c_client_get_device_id(client); + struct device *dev = &client->dev; + struct max8660_platform_data pdata_of, *pdata = dev_get_platdata(dev); + struct regulator_config config = { }; + struct max8660 *max8660; + int boot_on, i, id, ret = -EINVAL; + struct device_node *of_node[MAX8660_V_END]; + unsigned long type; + + if (dev->of_node && !pdata) { + const struct of_device_id *id; + + id = of_match_device(of_match_ptr(max8660_dt_ids), dev); + if (!id) + return -ENODEV; + + ret = max8660_pdata_from_dt(dev, of_node, &pdata_of); + if (ret < 0) + return ret; + + pdata = &pdata_of; + type = (unsigned long) id->data; + } else { + type = i2c_id->driver_data; + memset(of_node, 0, sizeof(of_node)); + } + + if (pdata->num_subdevs > MAX8660_V_END) { + dev_err(dev, "Too many regulators found!\n"); + return -EINVAL; + } + + max8660 = devm_kzalloc(dev, sizeof(struct max8660), GFP_KERNEL); + if (!max8660) + return -ENOMEM; + + max8660->client = client; + + if (pdata->en34_is_high) { + /* Simulate always on */ + max8660->shadow_regs[MAX8660_OVER1] = 5; + } else { + /* Otherwise devices can be toggled via software */ + max8660_dcdc_ops.enable = max8660_dcdc_enable; + max8660_dcdc_ops.disable = max8660_dcdc_disable; + } + + /* + * First, set up shadow registers to prevent glitches. As some + * registers are shared between regulators, everything must be properly + * set up for all regulators in advance. + */ + max8660->shadow_regs[MAX8660_ADTV1] = + max8660->shadow_regs[MAX8660_ADTV2] = + max8660->shadow_regs[MAX8660_SDTV1] = + max8660->shadow_regs[MAX8660_SDTV2] = 0x1b; + max8660->shadow_regs[MAX8660_MDTV1] = + max8660->shadow_regs[MAX8660_MDTV2] = 0x04; + + for (i = 0; i < pdata->num_subdevs; i++) { + + if (!pdata->subdevs[i].platform_data) + boot_on = false; + else + boot_on = pdata->subdevs[i].platform_data->constraints.boot_on; + + switch (pdata->subdevs[i].id) { + case MAX8660_V3: + if (boot_on) + max8660->shadow_regs[MAX8660_OVER1] |= 1; + break; + + case MAX8660_V4: + if (boot_on) + max8660->shadow_regs[MAX8660_OVER1] |= 4; + break; + + case MAX8660_V5: + break; + + case MAX8660_V6: + if (boot_on) + max8660->shadow_regs[MAX8660_OVER2] |= 2; + break; + + case MAX8660_V7: + if (type == MAX8661) { + dev_err(dev, "Regulator not on this chip!\n"); + return -EINVAL; + } + + if (boot_on) + max8660->shadow_regs[MAX8660_OVER2] |= 4; + break; + + default: + dev_err(dev, "invalid regulator %s\n", + pdata->subdevs[i].name); + return ret; + } + } + + /* Finally register devices */ + for (i = 0; i < pdata->num_subdevs; i++) { + struct regulator_dev *rdev; + + id = pdata->subdevs[i].id; + + config.dev = dev; + config.init_data = pdata->subdevs[i].platform_data; + config.of_node = of_node[i]; + config.driver_data = max8660; + + rdev = devm_regulator_register(&client->dev, + &max8660_reg[id], &config); + if (IS_ERR(rdev)) { + dev_err(&client->dev, "failed to register %s\n", + max8660_reg[id].name); + return PTR_ERR(rdev); + } + } + + i2c_set_clientdata(client, max8660); + return 0; +} + +static const struct i2c_device_id max8660_id[] = { + { .name = "max8660", .driver_data = MAX8660 }, + { .name = "max8661", .driver_data = MAX8661 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max8660_id); + +static struct i2c_driver max8660_driver = { + .probe = max8660_probe, + .driver = { + .name = "max8660", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = max8660_id, +}; + +static int __init max8660_init(void) +{ + return i2c_add_driver(&max8660_driver); +} +subsys_initcall(max8660_init); + +static void __exit max8660_exit(void) +{ + i2c_del_driver(&max8660_driver); +} +module_exit(max8660_exit); + +/* Module information */ +MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver"); +MODULE_AUTHOR("Wolfram Sang"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/max8893.c b/drivers/regulator/max8893.c new file mode 100644 index 000000000..7a0e44a16 --- /dev/null +++ b/drivers/regulator/max8893.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include +#include +#include +#include +#include + +static const struct regulator_ops max8893_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_desc max8893_regulators[] = { + { + .name = "BUCK", + .supply_name = "in-buck", + .of_match = of_match_ptr("buck"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x11, + .id = 6, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 800000, + .uV_step = 100000, + .vsel_reg = 0x4, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(7), + }, + { + .name = "LDO1", + .supply_name = "in-ldo1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x12, + .id = 1, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 1600000, + .uV_step = 100000, + .vsel_reg = 0x5, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(5), + }, + { + .name = "LDO2", + .supply_name = "in-ldo2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x16, + .id = 2, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 1200000, + .uV_step = 100000, + .vsel_reg = 0x6, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(4), + }, + { + .name = "LDO3", + .supply_name = "in-ldo3", + .of_match = of_match_ptr("ldo3"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x12, + .id = 3, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 1600000, + .uV_step = 100000, + .vsel_reg = 0x7, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(3), + }, + { + .name = "LDO4", + .supply_name = "in-ldo4", + .of_match = of_match_ptr("ldo4"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x1a, + .id = 4, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 800000, + .uV_step = 100000, + .vsel_reg = 0x8, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(2), + }, + { + .name = "LDO5", + .supply_name = "in-ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .n_voltages = 0x1a, + .id = 5, + .ops = &max8893_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .min_uV = 800000, + .uV_step = 100000, + .vsel_reg = 0x9, + .vsel_mask = 0x1f, + .enable_reg = 0x0, + .enable_mask = BIT(1), + } +}; + +static const struct regmap_config max8893_regmap = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int max8893_probe(struct i2c_client *i2c) +{ + int id, ret; + struct regulator_config config = {.dev = &i2c->dev}; + struct regmap *regmap = devm_regmap_init_i2c(i2c, &max8893_regmap); + + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); + return ret; + } + + for (id = 0; id < ARRAY_SIZE(max8893_regulators); id++) { + struct regulator_dev *rdev; + rdev = devm_regulator_register(&i2c->dev, + &max8893_regulators[id], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&i2c->dev, "failed to register %s: %d\n", + max8893_regulators[id].name, ret); + return ret; + } + } + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id max8893_dt_match[] = { + { .compatible = "maxim,max8893" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, max8893_dt_match); +#endif + +static const struct i2c_device_id max8893_ids[] = { + { .name = "max8893" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max8893_ids); + +static struct i2c_driver max8893_driver = { + .probe = max8893_probe, + .driver = { + .name = "max8893", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max8893_dt_match), + }, + .id_table = max8893_ids, +}; + +module_i2c_driver(max8893_driver); + +MODULE_DESCRIPTION("Maxim MAX8893 PMIC driver"); +MODULE_AUTHOR("Sergey Larin "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max8907-regulator.c b/drivers/regulator/max8907-regulator.c new file mode 100644 index 000000000..e59aa7a3e --- /dev/null +++ b/drivers/regulator/max8907-regulator.c @@ -0,0 +1,397 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * max8907-regulator.c -- support regulators in max8907 + * + * Copyright (C) 2010 Gyungoh Yoo + * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * + * Portions based on drivers/regulator/tps65910-regulator.c, + * Copyright 2010 Texas Instruments Inc. + * Author: Graeme Gregory + * Author: Jorge Eduardo Candelaria + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX8907_II2RR_VERSION_MASK 0xF0 +#define MAX8907_II2RR_VERSION_REV_A 0x00 +#define MAX8907_II2RR_VERSION_REV_B 0x10 +#define MAX8907_II2RR_VERSION_REV_C 0x30 + +struct max8907_regulator { + struct regulator_desc desc[MAX8907_NUM_REGULATORS]; +}; + +#define REG_MBATT() \ + [MAX8907_MBATT] = { \ + .name = "MBATT", \ + .supply_name = "mbatt", \ + .id = MAX8907_MBATT, \ + .ops = &max8907_mbatt_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +#define REG_LDO(ids, supply, base, min, max, step) \ + [MAX8907_##ids] = { \ + .name = #ids, \ + .supply_name = supply, \ + .id = MAX8907_##ids, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &max8907_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base) + MAX8907_VOUT, \ + .vsel_mask = 0x3f, \ + .enable_reg = (base) + MAX8907_CTL, \ + .enable_mask = MAX8907_MASK_LDO_EN, \ + } + +#define REG_FIXED(ids, supply, voltage) \ + [MAX8907_##ids] = { \ + .name = #ids, \ + .supply_name = supply, \ + .id = MAX8907_##ids, \ + .n_voltages = 1, \ + .ops = &max8907_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = (voltage), \ + } + +#define REG_OUT5V(ids, supply, base, voltage) \ + [MAX8907_##ids] = { \ + .name = #ids, \ + .supply_name = supply, \ + .id = MAX8907_##ids, \ + .n_voltages = 1, \ + .ops = &max8907_out5v_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = (voltage), \ + .enable_reg = (base), \ + .enable_mask = MAX8907_MASK_OUT5V_EN, \ + } + +#define REG_BBAT(ids, supply, base, min, max, step) \ + [MAX8907_##ids] = { \ + .name = #ids, \ + .supply_name = supply, \ + .id = MAX8907_##ids, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &max8907_bbat_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base), \ + .vsel_mask = MAX8907_MASK_VBBATTCV, \ + } + +#define LDO_750_50(id, supply, base) REG_LDO(id, supply, (base), \ + 750000, 3900000, 50000) +#define LDO_650_25(id, supply, base) REG_LDO(id, supply, (base), \ + 650000, 2225000, 25000) + +static const struct regulator_ops max8907_mbatt_ops = { +}; + +static const struct regulator_ops max8907_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops max8907_ldo_hwctl_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops max8907_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops max8907_out5v_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops max8907_out5v_hwctl_ops = { + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops max8907_bbat_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_desc max8907_regulators[] = { + REG_MBATT(), + REG_LDO(SD1, "in-v1", MAX8907_REG_SDCTL1, 650000, 2225000, 25000), + REG_LDO(SD2, "in-v2", MAX8907_REG_SDCTL2, 637500, 1425000, 12500), + REG_LDO(SD3, "in-v3", MAX8907_REG_SDCTL3, 750000, 3900000, 50000), + LDO_750_50(LDO1, "in1", MAX8907_REG_LDOCTL1), + LDO_650_25(LDO2, "in2", MAX8907_REG_LDOCTL2), + LDO_650_25(LDO3, "in3", MAX8907_REG_LDOCTL3), + LDO_750_50(LDO4, "in4", MAX8907_REG_LDOCTL4), + LDO_750_50(LDO5, "in5", MAX8907_REG_LDOCTL5), + LDO_750_50(LDO6, "in6", MAX8907_REG_LDOCTL6), + LDO_750_50(LDO7, "in7", MAX8907_REG_LDOCTL7), + LDO_750_50(LDO8, "in8", MAX8907_REG_LDOCTL8), + LDO_750_50(LDO9, "in9", MAX8907_REG_LDOCTL9), + LDO_750_50(LDO10, "in10", MAX8907_REG_LDOCTL10), + LDO_750_50(LDO11, "in11", MAX8907_REG_LDOCTL11), + LDO_750_50(LDO12, "in12", MAX8907_REG_LDOCTL12), + LDO_750_50(LDO13, "in13", MAX8907_REG_LDOCTL13), + LDO_750_50(LDO14, "in14", MAX8907_REG_LDOCTL14), + LDO_750_50(LDO15, "in15", MAX8907_REG_LDOCTL15), + LDO_750_50(LDO16, "in16", MAX8907_REG_LDOCTL16), + LDO_650_25(LDO17, "in17", MAX8907_REG_LDOCTL17), + LDO_650_25(LDO18, "in18", MAX8907_REG_LDOCTL18), + LDO_750_50(LDO19, "in19", MAX8907_REG_LDOCTL19), + LDO_750_50(LDO20, "in20", MAX8907_REG_LDOCTL20), + REG_OUT5V(OUT5V, "mbatt", MAX8907_REG_OUT5VEN, 5000000), + REG_OUT5V(OUT33V, "mbatt", MAX8907_REG_OUT33VEN, 3300000), + REG_BBAT(BBAT, "MBATT", MAX8907_REG_BBAT_CNFG, + 2400000, 3000000, 200000), + REG_FIXED(SDBY, "MBATT", 1200000), + REG_FIXED(VRTC, "MBATT", 3300000), +}; + +#ifdef CONFIG_OF + +#define MATCH(_name, _id) \ + [MAX8907_##_id] = { \ + .name = #_name, \ + .driver_data = (void *)&max8907_regulators[MAX8907_##_id], \ + } + +static struct of_regulator_match max8907_matches[] = { + MATCH(mbatt, MBATT), + MATCH(sd1, SD1), + MATCH(sd2, SD2), + MATCH(sd3, SD3), + MATCH(ldo1, LDO1), + MATCH(ldo2, LDO2), + MATCH(ldo3, LDO3), + MATCH(ldo4, LDO4), + MATCH(ldo5, LDO5), + MATCH(ldo6, LDO6), + MATCH(ldo7, LDO7), + MATCH(ldo8, LDO8), + MATCH(ldo9, LDO9), + MATCH(ldo10, LDO10), + MATCH(ldo11, LDO11), + MATCH(ldo12, LDO12), + MATCH(ldo13, LDO13), + MATCH(ldo14, LDO14), + MATCH(ldo15, LDO15), + MATCH(ldo16, LDO16), + MATCH(ldo17, LDO17), + MATCH(ldo18, LDO18), + MATCH(ldo19, LDO19), + MATCH(ldo20, LDO20), + MATCH(out5v, OUT5V), + MATCH(out33v, OUT33V), + MATCH(bbat, BBAT), + MATCH(sdby, SDBY), + MATCH(vrtc, VRTC), +}; + +static int max8907_regulator_parse_dt(struct platform_device *pdev) +{ + struct device_node *np, *regulators; + int ret; + + np = pdev->dev.parent->of_node; + if (!np) + return 0; + + regulators = of_get_child_by_name(np, "regulators"); + if (!regulators) { + dev_err(&pdev->dev, "regulators node not found\n"); + return -EINVAL; + } + + ret = of_regulator_match(&pdev->dev, regulators, max8907_matches, + ARRAY_SIZE(max8907_matches)); + of_node_put(regulators); + if (ret < 0) { + dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", + ret); + return ret; + } + + return 0; +} + +static inline struct regulator_init_data *match_init_data(int index) +{ + return max8907_matches[index].init_data; +} + +static inline struct device_node *match_of_node(int index) +{ + return max8907_matches[index].of_node; +} +#else +static int max8907_regulator_parse_dt(struct platform_device *pdev) +{ + return 0; +} + +static inline struct regulator_init_data *match_init_data(int index) +{ + return NULL; +} + +static inline struct device_node *match_of_node(int index) +{ + return NULL; +} +#endif + +static int max8907_regulator_probe(struct platform_device *pdev) +{ + struct max8907 *max8907 = dev_get_drvdata(pdev->dev.parent); + struct max8907_platform_data *pdata = dev_get_platdata(max8907->dev); + int ret; + struct max8907_regulator *pmic; + unsigned int val; + int i; + struct regulator_config config = {}; + struct regulator_init_data *idata; + const char *mbatt_rail_name = NULL; + + ret = max8907_regulator_parse_dt(pdev); + if (ret) + return ret; + + pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + platform_set_drvdata(pdev, pmic); + + memcpy(pmic->desc, max8907_regulators, sizeof(pmic->desc)); + + /* Backwards compatibility with MAX8907B; SD1 uses different voltages */ + ret = regmap_read(max8907->regmap_gen, MAX8907_REG_II2RR, &val); + if (ret) + return ret; + + if ((val & MAX8907_II2RR_VERSION_MASK) == + MAX8907_II2RR_VERSION_REV_B) { + pmic->desc[MAX8907_SD1].min_uV = 637500; + pmic->desc[MAX8907_SD1].uV_step = 12500; + pmic->desc[MAX8907_SD1].n_voltages = + (1425000 - 637500) / 12500 + 1; + } + + for (i = 0; i < MAX8907_NUM_REGULATORS; i++) { + struct regulator_dev *rdev; + + config.dev = pdev->dev.parent; + if (pdata) + idata = pdata->init_data[i]; + else + idata = match_init_data(i); + config.init_data = idata; + config.driver_data = pmic; + config.regmap = max8907->regmap_gen; + config.of_node = match_of_node(i); + + switch (pmic->desc[i].id) { + case MAX8907_MBATT: + if (idata && idata->constraints.name) + mbatt_rail_name = idata->constraints.name; + else + mbatt_rail_name = pmic->desc[i].name; + break; + case MAX8907_BBAT: + case MAX8907_SDBY: + case MAX8907_VRTC: + idata->supply_regulator = mbatt_rail_name; + break; + } + + if (pmic->desc[i].ops == &max8907_ldo_ops) { + ret = regmap_read(config.regmap, pmic->desc[i].enable_reg, + &val); + if (ret) + return ret; + + if ((val & MAX8907_MASK_LDO_SEQ) != + MAX8907_MASK_LDO_SEQ) + pmic->desc[i].ops = &max8907_ldo_hwctl_ops; + } else if (pmic->desc[i].ops == &max8907_out5v_ops) { + ret = regmap_read(config.regmap, pmic->desc[i].enable_reg, + &val); + if (ret) + return ret; + + if ((val & (MAX8907_MASK_OUT5V_VINEN | + MAX8907_MASK_OUT5V_ENSRC)) != + MAX8907_MASK_OUT5V_ENSRC) + pmic->desc[i].ops = &max8907_out5v_hwctl_ops; + } + + rdev = devm_regulator_register(&pdev->dev, + &pmic->desc[i], &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator\n", + pmic->desc[i].name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver max8907_regulator_driver = { + .driver = { + .name = "max8907-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max8907_regulator_probe, +}; + +static int __init max8907_regulator_init(void) +{ + return platform_driver_register(&max8907_regulator_driver); +} + +subsys_initcall(max8907_regulator_init); + +static void __exit max8907_reg_exit(void) +{ + platform_driver_unregister(&max8907_regulator_driver); +} + +module_exit(max8907_reg_exit); + +MODULE_DESCRIPTION("MAX8907 regulator driver"); +MODULE_AUTHOR("Gyungoh Yoo "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:max8907-regulator"); diff --git a/drivers/regulator/max8925-regulator.c b/drivers/regulator/max8925-regulator.c new file mode 100644 index 000000000..c1532db0a --- /dev/null +++ b/drivers/regulator/max8925-regulator.c @@ -0,0 +1,286 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulators driver for Maxim max8925 + * + * Copyright (C) 2009 Marvell International Ltd. + * Haojian Zhuang + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SD1_DVM_VMIN 850000 +#define SD1_DVM_VMAX 1000000 +#define SD1_DVM_STEP 50000 +#define SD1_DVM_SHIFT 5 /* SDCTL1 bit5 */ +#define SD1_DVM_EN 6 /* SDV1 bit 6 */ + +/* bit definitions in LDO control registers */ +#define LDO_SEQ_I2C 0x7 /* Power U/D by i2c */ +#define LDO_SEQ_MASK 0x7 /* Power U/D sequence mask */ +#define LDO_SEQ_SHIFT 2 /* Power U/D sequence offset */ +#define LDO_I2C_EN 0x1 /* Enable by i2c */ +#define LDO_I2C_EN_MASK 0x1 /* Enable mask by i2c */ +#define LDO_I2C_EN_SHIFT 0 /* Enable offset by i2c */ + +struct max8925_regulator_info { + struct regulator_desc desc; + struct i2c_client *i2c; + + int vol_reg; + int enable_reg; +}; + +static int max8925_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + unsigned char mask = rdev->desc->n_voltages - 1; + + return max8925_set_bits(info->i2c, info->vol_reg, mask, selector); +} + +static int max8925_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + unsigned char data, mask; + int ret; + + ret = max8925_reg_read(info->i2c, info->vol_reg); + if (ret < 0) + return ret; + mask = rdev->desc->n_voltages - 1; + data = ret & mask; + + return data; +} + +static int max8925_enable(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + + return max8925_set_bits(info->i2c, info->enable_reg, + LDO_SEQ_MASK << LDO_SEQ_SHIFT | + LDO_I2C_EN_MASK << LDO_I2C_EN_SHIFT, + LDO_SEQ_I2C << LDO_SEQ_SHIFT | + LDO_I2C_EN << LDO_I2C_EN_SHIFT); +} + +static int max8925_disable(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + + return max8925_set_bits(info->i2c, info->enable_reg, + LDO_SEQ_MASK << LDO_SEQ_SHIFT | + LDO_I2C_EN_MASK << LDO_I2C_EN_SHIFT, + LDO_SEQ_I2C << LDO_SEQ_SHIFT); +} + +static int max8925_is_enabled(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + int ldo_seq, ret; + + ret = max8925_reg_read(info->i2c, info->enable_reg); + if (ret < 0) + return ret; + ldo_seq = (ret >> LDO_SEQ_SHIFT) & LDO_SEQ_MASK; + if (ldo_seq != LDO_SEQ_I2C) + return 1; + else + return ret & (LDO_I2C_EN_MASK << LDO_I2C_EN_SHIFT); +} + +static int max8925_set_dvm_voltage(struct regulator_dev *rdev, int uV) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + unsigned char data, mask; + + if (uV < SD1_DVM_VMIN || uV > SD1_DVM_VMAX) + return -EINVAL; + + data = DIV_ROUND_UP(uV - SD1_DVM_VMIN, SD1_DVM_STEP); + data <<= SD1_DVM_SHIFT; + mask = 3 << SD1_DVM_SHIFT; + + return max8925_set_bits(info->i2c, info->enable_reg, mask, data); +} + +static int max8925_set_dvm_enable(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + + return max8925_set_bits(info->i2c, info->vol_reg, 1 << SD1_DVM_EN, + 1 << SD1_DVM_EN); +} + +static int max8925_set_dvm_disable(struct regulator_dev *rdev) +{ + struct max8925_regulator_info *info = rdev_get_drvdata(rdev); + + return max8925_set_bits(info->i2c, info->vol_reg, 1 << SD1_DVM_EN, 0); +} + +static const struct regulator_ops max8925_regulator_sdv_ops = { + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = max8925_set_voltage_sel, + .get_voltage_sel = max8925_get_voltage_sel, + .enable = max8925_enable, + .disable = max8925_disable, + .is_enabled = max8925_is_enabled, + .set_suspend_voltage = max8925_set_dvm_voltage, + .set_suspend_enable = max8925_set_dvm_enable, + .set_suspend_disable = max8925_set_dvm_disable, +}; + +static const struct regulator_ops max8925_regulator_ldo_ops = { + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = max8925_set_voltage_sel, + .get_voltage_sel = max8925_get_voltage_sel, + .enable = max8925_enable, + .disable = max8925_disable, + .is_enabled = max8925_is_enabled, +}; + +#define MAX8925_SDV(_id, min, max, step) \ +{ \ + .desc = { \ + .name = "SDV" #_id, \ + .of_match = of_match_ptr("SDV" #_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &max8925_regulator_sdv_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MAX8925_ID_SD##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = 64, \ + .min_uV = min * 1000, \ + .uV_step = step * 1000, \ + }, \ + .vol_reg = MAX8925_SDV##_id, \ + .enable_reg = MAX8925_SDCTL##_id, \ +} + +#define MAX8925_LDO(_id, min, max, step) \ +{ \ + .desc = { \ + .name = "LDO" #_id, \ + .of_match = of_match_ptr("LDO" #_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &max8925_regulator_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MAX8925_ID_LDO##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = 64, \ + .min_uV = min * 1000, \ + .uV_step = step * 1000, \ + }, \ + .vol_reg = MAX8925_LDOVOUT##_id, \ + .enable_reg = MAX8925_LDOCTL##_id, \ +} + +static struct max8925_regulator_info max8925_regulator_info[] = { + MAX8925_SDV(1, 637.5, 1425, 12.5), + MAX8925_SDV(2, 650, 2225, 25), + MAX8925_SDV(3, 750, 3900, 50), + + MAX8925_LDO(1, 750, 3900, 50), + MAX8925_LDO(2, 650, 2250, 25), + MAX8925_LDO(3, 650, 2250, 25), + MAX8925_LDO(4, 750, 3900, 50), + MAX8925_LDO(5, 750, 3900, 50), + MAX8925_LDO(6, 750, 3900, 50), + MAX8925_LDO(7, 750, 3900, 50), + MAX8925_LDO(8, 750, 3900, 50), + MAX8925_LDO(9, 750, 3900, 50), + MAX8925_LDO(10, 750, 3900, 50), + MAX8925_LDO(11, 750, 3900, 50), + MAX8925_LDO(12, 750, 3900, 50), + MAX8925_LDO(13, 750, 3900, 50), + MAX8925_LDO(14, 750, 3900, 50), + MAX8925_LDO(15, 750, 3900, 50), + MAX8925_LDO(16, 750, 3900, 50), + MAX8925_LDO(17, 650, 2250, 25), + MAX8925_LDO(18, 650, 2250, 25), + MAX8925_LDO(19, 750, 3900, 50), + MAX8925_LDO(20, 750, 3900, 50), +}; + +static int max8925_regulator_probe(struct platform_device *pdev) +{ + struct max8925_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct regulator_init_data *pdata = dev_get_platdata(&pdev->dev); + struct regulator_config config = { }; + struct max8925_regulator_info *ri; + struct resource *res; + struct regulator_dev *rdev; + int i; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (!res) { + dev_err(&pdev->dev, "No REG resource!\n"); + return -EINVAL; + } + for (i = 0; i < ARRAY_SIZE(max8925_regulator_info); i++) { + ri = &max8925_regulator_info[i]; + if (ri->vol_reg == res->start) + break; + } + + if (i == ARRAY_SIZE(max8925_regulator_info)) { + dev_err(&pdev->dev, "Failed to find regulator %llu\n", + (unsigned long long)res->start); + return -EINVAL; + } + ri->i2c = chip->i2c; + + config.dev = chip->dev; + config.driver_data = ri; + + if (pdata) + config.init_data = pdata; + + rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + ri->desc.name); + return PTR_ERR(rdev); + } + + platform_set_drvdata(pdev, rdev); + return 0; +} + +static struct platform_driver max8925_regulator_driver = { + .driver = { + .name = "max8925-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max8925_regulator_probe, +}; + +static int __init max8925_regulator_init(void) +{ + return platform_driver_register(&max8925_regulator_driver); +} +subsys_initcall(max8925_regulator_init); + +static void __exit max8925_regulator_exit(void) +{ + platform_driver_unregister(&max8925_regulator_driver); +} +module_exit(max8925_regulator_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Haojian Zhuang "); +MODULE_DESCRIPTION("Regulator Driver for Maxim 8925 PMIC"); +MODULE_ALIAS("platform:max8925-regulator"); diff --git a/drivers/regulator/max8952.c b/drivers/regulator/max8952.c new file mode 100644 index 000000000..f8b91a570 --- /dev/null +++ b/drivers/regulator/max8952.c @@ -0,0 +1,339 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * max8952.c - Voltage and current regulation for the Maxim 8952 + * + * Copyright (C) 2010 Samsung Electronics + * MyungJoo Ham + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Registers */ +enum { + MAX8952_REG_MODE0, + MAX8952_REG_MODE1, + MAX8952_REG_MODE2, + MAX8952_REG_MODE3, + MAX8952_REG_CONTROL, + MAX8952_REG_SYNC, + MAX8952_REG_RAMP, + MAX8952_REG_CHIP_ID1, + MAX8952_REG_CHIP_ID2, +}; + +struct max8952_data { + struct i2c_client *client; + struct max8952_platform_data *pdata; + struct gpio_desc *vid0_gpiod; + struct gpio_desc *vid1_gpiod; + bool vid0; + bool vid1; +}; + +static int max8952_read_reg(struct max8952_data *max8952, u8 reg) +{ + int ret = i2c_smbus_read_byte_data(max8952->client, reg); + + if (ret > 0) + ret &= 0xff; + + return ret; +} + +static int max8952_write_reg(struct max8952_data *max8952, + u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(max8952->client, reg, value); +} + +static int max8952_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct max8952_data *max8952 = rdev_get_drvdata(rdev); + + if (rdev_get_id(rdev) != 0) + return -EINVAL; + + return (max8952->pdata->dvs_mode[selector] * 10 + 770) * 1000; +} + +static int max8952_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8952_data *max8952 = rdev_get_drvdata(rdev); + u8 vid = 0; + + if (max8952->vid0) + vid += 1; + if (max8952->vid1) + vid += 2; + + return vid; +} + +static int max8952_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct max8952_data *max8952 = rdev_get_drvdata(rdev); + + if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { + /* DVS not supported */ + return -EPERM; + } + + max8952->vid0 = selector & 0x1; + max8952->vid1 = (selector >> 1) & 0x1; + gpiod_set_value(max8952->vid0_gpiod, max8952->vid0); + gpiod_set_value(max8952->vid1_gpiod, max8952->vid1); + + return 0; +} + +static const struct regulator_ops max8952_ops = { + .list_voltage = max8952_list_voltage, + .get_voltage_sel = max8952_get_voltage_sel, + .set_voltage_sel = max8952_set_voltage_sel, +}; + +static const struct regulator_desc regulator = { + .name = "MAX8952_VOUT", + .id = 0, + .n_voltages = MAX8952_NUM_DVS_MODE, + .ops = &max8952_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}; + +#ifdef CONFIG_OF +static const struct of_device_id max8952_dt_match[] = { + { .compatible = "maxim,max8952" }, + {}, +}; +MODULE_DEVICE_TABLE(of, max8952_dt_match); + +static struct max8952_platform_data *max8952_parse_dt(struct device *dev) +{ + struct max8952_platform_data *pd; + struct device_node *np = dev->of_node; + int ret; + int i; + + pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); + if (!pd) + return NULL; + + if (of_property_read_u32(np, "max8952,default-mode", &pd->default_mode)) + dev_warn(dev, "Default mode not specified, assuming 0\n"); + + ret = of_property_read_u32_array(np, "max8952,dvs-mode-microvolt", + pd->dvs_mode, ARRAY_SIZE(pd->dvs_mode)); + if (ret) { + dev_err(dev, "max8952,dvs-mode-microvolt property not specified"); + return NULL; + } + + for (i = 0; i < ARRAY_SIZE(pd->dvs_mode); ++i) { + if (pd->dvs_mode[i] < 770000 || pd->dvs_mode[i] > 1400000) { + dev_err(dev, "DVS voltage %d out of range\n", i); + return NULL; + } + pd->dvs_mode[i] = (pd->dvs_mode[i] - 770000) / 10000; + } + + if (of_property_read_u32(np, "max8952,sync-freq", &pd->sync_freq)) + dev_warn(dev, "max8952,sync-freq property not specified, defaulting to 26MHz\n"); + + if (of_property_read_u32(np, "max8952,ramp-speed", &pd->ramp_speed)) + dev_warn(dev, "max8952,ramp-speed property not specified, defaulting to 32mV/us\n"); + + pd->reg_data = of_get_regulator_init_data(dev, np, ®ulator); + if (!pd->reg_data) { + dev_err(dev, "Failed to parse regulator init data\n"); + return NULL; + } + + return pd; +} +#else +static struct max8952_platform_data *max8952_parse_dt(struct device *dev) +{ + return NULL; +} +#endif + +static int max8952_pmic_probe(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + struct max8952_platform_data *pdata = dev_get_platdata(&client->dev); + struct regulator_config config = { }; + struct max8952_data *max8952; + struct regulator_dev *rdev; + struct gpio_desc *gpiod; + enum gpiod_flags gflags; + + int ret = 0; + + if (client->dev.of_node) + pdata = max8952_parse_dt(&client->dev); + + if (!pdata) { + dev_err(&client->dev, "Require the platform data\n"); + return -EINVAL; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) + return -EIO; + + max8952 = devm_kzalloc(&client->dev, sizeof(struct max8952_data), + GFP_KERNEL); + if (!max8952) + return -ENOMEM; + + max8952->client = client; + max8952->pdata = pdata; + + config.dev = &client->dev; + config.init_data = pdata->reg_data; + config.driver_data = max8952; + config.of_node = client->dev.of_node; + + if (pdata->reg_data->constraints.boot_on) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_LOW; + gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE; + /* + * Do not use devm* here: the regulator core takes over the + * lifecycle management of the GPIO descriptor. + */ + gpiod = gpiod_get_optional(&client->dev, + "max8952,en", + gflags); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + if (gpiod) + config.ena_gpiod = gpiod; + + rdev = devm_regulator_register(&client->dev, ®ulator, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&client->dev, "regulator init failed (%d)\n", ret); + return ret; + } + + max8952->vid0 = pdata->default_mode & 0x1; + max8952->vid1 = (pdata->default_mode >> 1) & 0x1; + + /* Fetch vid0 and vid1 GPIOs if available */ + gflags = max8952->vid0 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + max8952->vid0_gpiod = devm_gpiod_get_index_optional(&client->dev, + "max8952,vid", + 0, gflags); + if (IS_ERR(max8952->vid0_gpiod)) + return PTR_ERR(max8952->vid0_gpiod); + gflags = max8952->vid1 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + max8952->vid1_gpiod = devm_gpiod_get_index_optional(&client->dev, + "max8952,vid", + 1, gflags); + if (IS_ERR(max8952->vid1_gpiod)) + return PTR_ERR(max8952->vid1_gpiod); + + /* If either VID GPIO is missing just disable this */ + if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { + dev_warn(&client->dev, "VID0/1 gpio invalid: " + "DVS not available.\n"); + max8952->vid0 = 0; + max8952->vid1 = 0; + /* Make sure if we have any descriptors they get set to low */ + if (max8952->vid0_gpiod) + gpiod_set_value(max8952->vid0_gpiod, 0); + if (max8952->vid1_gpiod) + gpiod_set_value(max8952->vid1_gpiod, 0); + + /* Disable Pulldown of EN only */ + max8952_write_reg(max8952, MAX8952_REG_CONTROL, 0x60); + + dev_err(&client->dev, "DVS modes disabled because VID0 and VID1" + " do not have proper controls.\n"); + } else { + /* + * Disable Pulldown on EN, VID0, VID1 to reduce + * leakage current of MAX8952 assuming that MAX8952 + * is turned on (EN==1). Note that without having VID0/1 + * properly connected, turning pulldown off can be + * problematic. Thus, turn this off only when they are + * controllable by GPIO. + */ + max8952_write_reg(max8952, MAX8952_REG_CONTROL, 0x0); + } + + max8952_write_reg(max8952, MAX8952_REG_MODE0, + (max8952_read_reg(max8952, + MAX8952_REG_MODE0) & 0xC0) | + (pdata->dvs_mode[0] & 0x3F)); + max8952_write_reg(max8952, MAX8952_REG_MODE1, + (max8952_read_reg(max8952, + MAX8952_REG_MODE1) & 0xC0) | + (pdata->dvs_mode[1] & 0x3F)); + max8952_write_reg(max8952, MAX8952_REG_MODE2, + (max8952_read_reg(max8952, + MAX8952_REG_MODE2) & 0xC0) | + (pdata->dvs_mode[2] & 0x3F)); + max8952_write_reg(max8952, MAX8952_REG_MODE3, + (max8952_read_reg(max8952, + MAX8952_REG_MODE3) & 0xC0) | + (pdata->dvs_mode[3] & 0x3F)); + + max8952_write_reg(max8952, MAX8952_REG_SYNC, + (max8952_read_reg(max8952, MAX8952_REG_SYNC) & 0x3F) | + ((pdata->sync_freq & 0x3) << 6)); + max8952_write_reg(max8952, MAX8952_REG_RAMP, + (max8952_read_reg(max8952, MAX8952_REG_RAMP) & 0x1F) | + ((pdata->ramp_speed & 0x7) << 5)); + + i2c_set_clientdata(client, max8952); + + return 0; +} + +static const struct i2c_device_id max8952_ids[] = { + { .name = "max8952" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max8952_ids); + +static struct i2c_driver max8952_pmic_driver = { + .probe = max8952_pmic_probe, + .driver = { + .name = "max8952", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(max8952_dt_match), + }, + .id_table = max8952_ids, +}; + +static int __init max8952_pmic_init(void) +{ + return i2c_add_driver(&max8952_pmic_driver); +} +subsys_initcall(max8952_pmic_init); + +static void __exit max8952_pmic_exit(void) +{ + i2c_del_driver(&max8952_pmic_driver); +} +module_exit(max8952_pmic_exit); + +MODULE_DESCRIPTION("MAXIM 8952 voltage regulator driver"); +MODULE_AUTHOR("MyungJoo Ham "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max8973-regulator.c b/drivers/regulator/max8973-regulator.c new file mode 100644 index 000000000..95062032d --- /dev/null +++ b/drivers/regulator/max8973-regulator.c @@ -0,0 +1,813 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * max8973-regulator.c -- Maxim max8973A + * + * Regulator driver for MAXIM 8973A DC-DC step-down switching regulator. + * + * Copyright (c) 2012, NVIDIA Corporation. + * + * Author: Laxman Dewangan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register definitions */ +#define MAX8973_VOUT 0x0 +#define MAX8973_VOUT_DVS 0x1 +#define MAX8973_CONTROL1 0x2 +#define MAX8973_CONTROL2 0x3 +#define MAX8973_CHIPID1 0x4 +#define MAX8973_CHIPID2 0x5 + +#define MAX8973_MAX_VOUT_REG 2 + +/* MAX8973_VOUT */ +#define MAX8973_VOUT_ENABLE BIT(7) +#define MAX8973_VOUT_MASK 0x7F + +/* MAX8973_VOUT_DVS */ +#define MAX8973_DVS_VOUT_MASK 0x7F + +/* MAX8973_CONTROL1 */ +#define MAX8973_SNS_ENABLE BIT(7) +#define MAX8973_FPWM_EN_M BIT(6) +#define MAX8973_NFSR_ENABLE BIT(5) +#define MAX8973_AD_ENABLE BIT(4) +#define MAX8973_BIAS_ENABLE BIT(3) +#define MAX8973_FREQSHIFT_9PER BIT(2) + +#define MAX8973_RAMP_12mV_PER_US 0x0 +#define MAX8973_RAMP_25mV_PER_US 0x1 +#define MAX8973_RAMP_50mV_PER_US 0x2 +#define MAX8973_RAMP_200mV_PER_US 0x3 +#define MAX8973_RAMP_MASK 0x3 + +/* MAX8973_CONTROL2 */ +#define MAX8973_WDTMR_ENABLE BIT(6) +#define MAX8973_DISCH_ENBABLE BIT(5) +#define MAX8973_FT_ENABLE BIT(4) +#define MAX77621_T_JUNCTION_120 BIT(7) + +#define MAX8973_CKKADV_TRIP_MASK 0xC +#define MAX8973_CKKADV_TRIP_DISABLE 0xC +#define MAX8973_CKKADV_TRIP_75mV_PER_US 0x0 +#define MAX8973_CKKADV_TRIP_150mV_PER_US 0x4 +#define MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8 +#define MAX8973_CONTROL_CLKADV_TRIP_MASK 0x00030000 + +#define MAX8973_INDUCTOR_MIN_30_PER 0x0 +#define MAX8973_INDUCTOR_NOMINAL 0x1 +#define MAX8973_INDUCTOR_PLUS_30_PER 0x2 +#define MAX8973_INDUCTOR_PLUS_60_PER 0x3 +#define MAX8973_CONTROL_INDUCTOR_VALUE_MASK 0x00300000 + +#define MAX8973_MIN_VOLATGE 606250 +#define MAX8973_MAX_VOLATGE 1400000 +#define MAX8973_VOLATGE_STEP 6250 +#define MAX8973_BUCK_N_VOLTAGE 0x80 + +#define MAX77621_CHIPID_TJINT_S BIT(0) + +#define MAX77621_NORMAL_OPERATING_TEMP 100000 +#define MAX77621_TJINT_WARNING_TEMP_120 120000 +#define MAX77621_TJINT_WARNING_TEMP_140 140000 + +enum device_id { + MAX8973, + MAX77621 +}; + +/* Maxim 8973 chip information */ +struct max8973_chip { + struct device *dev; + struct regulator_desc desc; + struct regmap *regmap; + bool enable_external_control; + struct gpio_desc *dvs_gpiod; + int lru_index[MAX8973_MAX_VOUT_REG]; + int curr_vout_val[MAX8973_MAX_VOUT_REG]; + int curr_vout_reg; + int curr_gpio_val; + struct regulator_ops ops; + enum device_id id; + int junction_temp_warning; + int irq; + struct thermal_zone_device *tz_device; +}; + +/* + * find_voltage_set_register: Find new voltage configuration register (VOUT). + * The finding of the new VOUT register will be based on the LRU mechanism. + * Each VOUT register will have different voltage configured . This + * Function will look if any of the VOUT register have requested voltage set + * or not. + * - If it is already there then it will make that register as most + * recently used and return as found so that caller need not to set + * the VOUT register but need to set the proper gpios to select this + * VOUT register. + * - If requested voltage is not found then it will use the least + * recently mechanism to get new VOUT register for new configuration + * and will return not_found so that caller need to set new VOUT + * register and then gpios (both). + */ +static bool find_voltage_set_register(struct max8973_chip *tps, + int req_vsel, int *vout_reg, int *gpio_val) +{ + int i; + bool found = false; + int new_vout_reg = tps->lru_index[MAX8973_MAX_VOUT_REG - 1]; + int found_index = MAX8973_MAX_VOUT_REG - 1; + + for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i) { + if (tps->curr_vout_val[tps->lru_index[i]] == req_vsel) { + new_vout_reg = tps->lru_index[i]; + found_index = i; + found = true; + goto update_lru_index; + } + } + +update_lru_index: + for (i = found_index; i > 0; i--) + tps->lru_index[i] = tps->lru_index[i - 1]; + + tps->lru_index[0] = new_vout_reg; + *gpio_val = new_vout_reg; + *vout_reg = MAX8973_VOUT + new_vout_reg; + return found; +} + +static int max8973_dcdc_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + unsigned int data; + int ret; + + ret = regmap_read(max->regmap, max->curr_vout_reg, &data); + if (ret < 0) { + dev_err(max->dev, "register %d read failed, err = %d\n", + max->curr_vout_reg, ret); + return ret; + } + return data & MAX8973_VOUT_MASK; +} + +static int max8973_dcdc_set_voltage_sel(struct regulator_dev *rdev, + unsigned vsel) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + int ret; + bool found = false; + int vout_reg = max->curr_vout_reg; + int gpio_val = max->curr_gpio_val; + + /* + * If gpios are available to select the VOUT register then least + * recently used register for new configuration. + */ + if (max->dvs_gpiod) + found = find_voltage_set_register(max, vsel, + &vout_reg, &gpio_val); + + if (!found) { + ret = regmap_update_bits(max->regmap, vout_reg, + MAX8973_VOUT_MASK, vsel); + if (ret < 0) { + dev_err(max->dev, "register %d update failed, err %d\n", + vout_reg, ret); + return ret; + } + max->curr_vout_reg = vout_reg; + max->curr_vout_val[gpio_val] = vsel; + } + + /* Select proper VOUT register vio gpios */ + if (max->dvs_gpiod) { + gpiod_set_value_cansleep(max->dvs_gpiod, gpio_val & 0x1); + max->curr_gpio_val = gpio_val; + } + return 0; +} + +static int max8973_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + int ret; + int pwm; + + /* Enable force PWM mode in FAST mode only. */ + switch (mode) { + case REGULATOR_MODE_FAST: + pwm = MAX8973_FPWM_EN_M; + break; + + case REGULATOR_MODE_NORMAL: + pwm = 0; + break; + + default: + return -EINVAL; + } + + ret = regmap_update_bits(max->regmap, MAX8973_CONTROL1, + MAX8973_FPWM_EN_M, pwm); + if (ret < 0) + dev_err(max->dev, "register %d update failed, err %d\n", + MAX8973_CONTROL1, ret); + return ret; +} + +static unsigned int max8973_dcdc_get_mode(struct regulator_dev *rdev) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + unsigned int data; + int ret; + + ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data); + if (ret < 0) { + dev_err(max->dev, "register %d read failed, err %d\n", + MAX8973_CONTROL1, ret); + return ret; + } + return (data & MAX8973_FPWM_EN_M) ? + REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static int max8973_set_current_limit(struct regulator_dev *rdev, + int min_ua, int max_ua) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + if (max_ua <= 9000000) + val = MAX8973_CKKADV_TRIP_75mV_PER_US; + else if (max_ua <= 12000000) + val = MAX8973_CKKADV_TRIP_150mV_PER_US; + else + val = MAX8973_CKKADV_TRIP_DISABLE; + + ret = regmap_update_bits(max->regmap, MAX8973_CONTROL2, + MAX8973_CKKADV_TRIP_MASK, val); + if (ret < 0) { + dev_err(max->dev, "register %d update failed: %d\n", + MAX8973_CONTROL2, ret); + return ret; + } + return 0; +} + +static int max8973_get_current_limit(struct regulator_dev *rdev) +{ + struct max8973_chip *max = rdev_get_drvdata(rdev); + unsigned int control2; + int ret; + + ret = regmap_read(max->regmap, MAX8973_CONTROL2, &control2); + if (ret < 0) { + dev_err(max->dev, "register %d read failed: %d\n", + MAX8973_CONTROL2, ret); + return ret; + } + switch (control2 & MAX8973_CKKADV_TRIP_MASK) { + case MAX8973_CKKADV_TRIP_DISABLE: + return 15000000; + case MAX8973_CKKADV_TRIP_150mV_PER_US: + return 12000000; + case MAX8973_CKKADV_TRIP_75mV_PER_US: + return 9000000; + default: + break; + } + return 9000000; +} + +static const unsigned int max8973_buck_ramp_table[] = { + 12000, 25000, 50000, 200000 +}; + +static const struct regulator_ops max8973_dcdc_ops = { + .get_voltage_sel = max8973_dcdc_get_voltage_sel, + .set_voltage_sel = max8973_dcdc_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .set_mode = max8973_dcdc_set_mode, + .get_mode = max8973_dcdc_get_mode, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static int max8973_init_dcdc(struct max8973_chip *max, + struct max8973_regulator_platform_data *pdata) +{ + int ret; + uint8_t control1 = 0; + uint8_t control2 = 0; + unsigned int data; + + ret = regmap_read(max->regmap, MAX8973_CONTROL1, &data); + if (ret < 0) { + dev_err(max->dev, "register %d read failed, err = %d", + MAX8973_CONTROL1, ret); + return ret; + } + control1 = data & MAX8973_RAMP_MASK; + switch (control1) { + case MAX8973_RAMP_12mV_PER_US: + max->desc.ramp_delay = 12000; + break; + case MAX8973_RAMP_25mV_PER_US: + max->desc.ramp_delay = 25000; + break; + case MAX8973_RAMP_50mV_PER_US: + max->desc.ramp_delay = 50000; + break; + case MAX8973_RAMP_200mV_PER_US: + max->desc.ramp_delay = 200000; + break; + } + + if (pdata->control_flags & MAX8973_CONTROL_REMOTE_SENSE_ENABLE) + control1 |= MAX8973_SNS_ENABLE; + + if (!(pdata->control_flags & MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE)) + control1 |= MAX8973_NFSR_ENABLE; + + if (pdata->control_flags & MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE) + control1 |= MAX8973_AD_ENABLE; + + if (pdata->control_flags & MAX8973_CONTROL_BIAS_ENABLE) { + control1 |= MAX8973_BIAS_ENABLE; + max->desc.enable_time = 20; + } else { + max->desc.enable_time = 240; + } + + if (pdata->control_flags & MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE) + control1 |= MAX8973_FREQSHIFT_9PER; + + if ((pdata->junction_temp_warning == MAX77621_TJINT_WARNING_TEMP_120) && + (max->id == MAX77621)) + control2 |= MAX77621_T_JUNCTION_120; + + if (!(pdata->control_flags & MAX8973_CONTROL_PULL_DOWN_ENABLE)) + control2 |= MAX8973_DISCH_ENBABLE; + + /* Clock advance trip configuration */ + switch (pdata->control_flags & MAX8973_CONTROL_CLKADV_TRIP_MASK) { + case MAX8973_CONTROL_CLKADV_TRIP_DISABLED: + control2 |= MAX8973_CKKADV_TRIP_DISABLE; + break; + + case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US: + control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US; + break; + + case MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US: + control2 |= MAX8973_CKKADV_TRIP_150mV_PER_US; + break; + + case MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US_HIST_DIS: + control2 |= MAX8973_CKKADV_TRIP_75mV_PER_US_HIST_DIS; + break; + } + + /* Configure inductor value */ + switch (pdata->control_flags & MAX8973_CONTROL_INDUCTOR_VALUE_MASK) { + case MAX8973_CONTROL_INDUCTOR_VALUE_NOMINAL: + control2 |= MAX8973_INDUCTOR_NOMINAL; + break; + + case MAX8973_CONTROL_INDUCTOR_VALUE_MINUS_30_PER: + control2 |= MAX8973_INDUCTOR_MIN_30_PER; + break; + + case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_30_PER: + control2 |= MAX8973_INDUCTOR_PLUS_30_PER; + break; + + case MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_60_PER: + control2 |= MAX8973_INDUCTOR_PLUS_60_PER; + break; + } + + ret = regmap_write(max->regmap, MAX8973_CONTROL1, control1); + if (ret < 0) { + dev_err(max->dev, "register %d write failed, err = %d", + MAX8973_CONTROL1, ret); + return ret; + } + + ret = regmap_write(max->regmap, MAX8973_CONTROL2, control2); + if (ret < 0) { + dev_err(max->dev, "register %d write failed, err = %d", + MAX8973_CONTROL2, ret); + return ret; + } + + /* If external control is enabled then disable EN bit */ + if (max->enable_external_control && (max->id == MAX8973)) { + ret = regmap_update_bits(max->regmap, MAX8973_VOUT, + MAX8973_VOUT_ENABLE, 0); + if (ret < 0) + dev_err(max->dev, "register %d update failed, err = %d", + MAX8973_VOUT, ret); + } + return ret; +} + +static int max8973_thermal_read_temp(struct thermal_zone_device *tz, int *temp) +{ + struct max8973_chip *mchip = thermal_zone_device_priv(tz); + unsigned int val; + int ret; + + ret = regmap_read(mchip->regmap, MAX8973_CHIPID1, &val); + if (ret < 0) { + dev_err(mchip->dev, "Failed to read register CHIPID1, %d", ret); + return ret; + } + + /* +1 degC to trigger cool device */ + if (val & MAX77621_CHIPID_TJINT_S) + *temp = mchip->junction_temp_warning + 1000; + else + *temp = MAX77621_NORMAL_OPERATING_TEMP; + + return 0; +} + +static irqreturn_t max8973_thermal_irq(int irq, void *data) +{ + struct max8973_chip *mchip = data; + + thermal_zone_device_update(mchip->tz_device, + THERMAL_EVENT_UNSPECIFIED); + + return IRQ_HANDLED; +} + +static const struct thermal_zone_device_ops max77621_tz_ops = { + .get_temp = max8973_thermal_read_temp, +}; + +static int max8973_thermal_init(struct max8973_chip *mchip) +{ + struct thermal_zone_device *tzd; + unsigned long irq_flags; + int ret; + + if (mchip->id != MAX77621) + return 0; + + tzd = devm_thermal_of_zone_register(mchip->dev, 0, mchip, + &max77621_tz_ops); + if (IS_ERR(tzd)) { + ret = PTR_ERR(tzd); + dev_err(mchip->dev, "Failed to register thermal sensor: %d\n", + ret); + return ret; + } + + if (mchip->irq <= 0) + return 0; + + irq_flags = irq_get_trigger_type(mchip->irq); + + ret = devm_request_threaded_irq(mchip->dev, mchip->irq, NULL, + max8973_thermal_irq, + IRQF_ONESHOT | IRQF_SHARED | irq_flags, + dev_name(mchip->dev), mchip); + if (ret < 0) { + dev_err(mchip->dev, "Failed to request irq %d, %d\n", + mchip->irq, ret); + return ret; + } + + return 0; +} + +static const struct regmap_config max8973_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX8973_CHIPID2, + .cache_type = REGCACHE_MAPLE, +}; + +static struct max8973_regulator_platform_data *max8973_parse_dt( + struct device *dev) +{ + struct max8973_regulator_platform_data *pdata; + struct device_node *np = dev->of_node; + int ret; + u32 pval; + bool etr_enable; + bool etr_sensitivity_high; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + pdata->enable_ext_control = of_property_read_bool(np, + "maxim,externally-enable"); + + ret = of_property_read_u32(np, "maxim,dvs-default-state", &pval); + if (!ret) + pdata->dvs_def_state = pval; + + if (of_property_read_bool(np, "maxim,enable-remote-sense")) + pdata->control_flags |= MAX8973_CONTROL_REMOTE_SENSE_ENABLE; + + if (of_property_read_bool(np, "maxim,enable-falling-slew-rate")) + pdata->control_flags |= + MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE; + + if (of_property_read_bool(np, "maxim,enable-active-discharge")) + pdata->control_flags |= + MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE; + + if (of_property_read_bool(np, "maxim,enable-frequency-shift")) + pdata->control_flags |= MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE; + + if (of_property_read_bool(np, "maxim,enable-bias-control")) + pdata->control_flags |= MAX8973_CONTROL_BIAS_ENABLE; + + etr_enable = of_property_read_bool(np, "maxim,enable-etr"); + etr_sensitivity_high = of_property_read_bool(np, + "maxim,enable-high-etr-sensitivity"); + if (etr_sensitivity_high) + etr_enable = true; + + if (etr_enable) { + if (etr_sensitivity_high) + pdata->control_flags |= + MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US; + else + pdata->control_flags |= + MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US; + } else { + pdata->control_flags |= MAX8973_CONTROL_CLKADV_TRIP_DISABLED; + } + + pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_140; + ret = of_property_read_u32(np, "junction-warn-millicelsius", &pval); + if (!ret && (pval <= MAX77621_TJINT_WARNING_TEMP_120)) + pdata->junction_temp_warning = MAX77621_TJINT_WARNING_TEMP_120; + + return pdata; +} + +static const struct of_device_id of_max8973_match_tbl[] = { + { .compatible = "maxim,max8973", .data = (void *)MAX8973, }, + { .compatible = "maxim,max77621", .data = (void *)MAX77621, }, + { }, +}; +MODULE_DEVICE_TABLE(of, of_max8973_match_tbl); + +static int max8973_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct max8973_regulator_platform_data *pdata; + struct regulator_init_data *ridata; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct max8973_chip *max; + bool pdata_from_dt = false; + unsigned int chip_id; + struct gpio_desc *gpiod; + enum gpiod_flags gflags; + int ret; + + pdata = dev_get_platdata(&client->dev); + + if (!pdata && client->dev.of_node) { + pdata = max8973_parse_dt(&client->dev); + pdata_from_dt = true; + } + + if (!pdata) { + dev_err(&client->dev, "No Platform data"); + return -EIO; + } + + max = devm_kzalloc(&client->dev, sizeof(*max), GFP_KERNEL); + if (!max) + return -ENOMEM; + + max->dvs_gpiod = devm_gpiod_get_optional(&client->dev, "maxim,dvs", + (pdata->dvs_def_state) ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); + if (IS_ERR(max->dvs_gpiod)) + return dev_err_probe(&client->dev, PTR_ERR(max->dvs_gpiod), + "failed to obtain dvs gpio\n"); + gpiod_set_consumer_name(max->dvs_gpiod, "max8973-dvs"); + + max->regmap = devm_regmap_init_i2c(client, &max8973_regmap_config); + if (IS_ERR(max->regmap)) { + ret = PTR_ERR(max->regmap); + dev_err(&client->dev, "regmap init failed, err %d\n", ret); + return ret; + } + + if (client->dev.of_node) { + const struct of_device_id *match; + + match = of_match_device(of_match_ptr(of_max8973_match_tbl), + &client->dev); + if (!match) + return -ENODATA; + max->id = (u32)((uintptr_t)match->data); + } else { + max->id = id->driver_data; + } + + ret = regmap_read(max->regmap, MAX8973_CHIPID1, &chip_id); + if (ret < 0) { + dev_err(&client->dev, "register CHIPID1 read failed, %d", ret); + return ret; + } + + dev_info(&client->dev, "CHIP-ID OTP: 0x%02x ID_M: 0x%02x\n", + (chip_id >> 4) & 0xF, (chip_id >> 1) & 0x7); + + i2c_set_clientdata(client, max); + max->ops = max8973_dcdc_ops; + max->dev = &client->dev; + max->desc.name = id->name; + max->desc.id = 0; + max->desc.ops = &max->ops; + max->desc.type = REGULATOR_VOLTAGE; + max->desc.owner = THIS_MODULE; + max->desc.min_uV = MAX8973_MIN_VOLATGE; + max->desc.uV_step = MAX8973_VOLATGE_STEP; + max->desc.n_voltages = MAX8973_BUCK_N_VOLTAGE; + max->desc.ramp_reg = MAX8973_CONTROL1; + max->desc.ramp_mask = MAX8973_RAMP_MASK; + max->desc.ramp_delay_table = max8973_buck_ramp_table; + max->desc.n_ramp_values = ARRAY_SIZE(max8973_buck_ramp_table); + + max->enable_external_control = pdata->enable_ext_control; + max->curr_gpio_val = pdata->dvs_def_state; + max->curr_vout_reg = MAX8973_VOUT + pdata->dvs_def_state; + max->junction_temp_warning = pdata->junction_temp_warning; + + max->lru_index[0] = max->curr_vout_reg; + + if (max->dvs_gpiod) { + int i; + + /* + * Initialize the lru index with vout_reg id + * The index 0 will be most recently used and + * set with the max->curr_vout_reg */ + for (i = 0; i < MAX8973_MAX_VOUT_REG; ++i) + max->lru_index[i] = i; + max->lru_index[0] = max->curr_vout_reg; + max->lru_index[max->curr_vout_reg] = 0; + } else { + /* + * If there is no DVS GPIO, the VOUT register + * address is fixed. + */ + max->ops.set_voltage_sel = regulator_set_voltage_sel_regmap; + max->ops.get_voltage_sel = regulator_get_voltage_sel_regmap; + max->desc.vsel_reg = max->curr_vout_reg; + max->desc.vsel_mask = MAX8973_VOUT_MASK; + } + + if (pdata_from_dt) + pdata->reg_init_data = of_get_regulator_init_data(&client->dev, + client->dev.of_node, &max->desc); + + ridata = pdata->reg_init_data; + switch (max->id) { + case MAX8973: + if (!pdata->enable_ext_control) { + max->desc.enable_reg = MAX8973_VOUT; + max->desc.enable_mask = MAX8973_VOUT_ENABLE; + max->ops.enable = regulator_enable_regmap; + max->ops.disable = regulator_disable_regmap; + max->ops.is_enabled = regulator_is_enabled_regmap; + break; + } + + if (ridata && (ridata->constraints.always_on || + ridata->constraints.boot_on)) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_LOW; + gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE; + gpiod = devm_gpiod_get_optional(&client->dev, + "maxim,enable", + gflags); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + if (gpiod) { + config.ena_gpiod = gpiod; + max->enable_external_control = true; + } + + break; + + case MAX77621: + /* + * We do not let the core switch this regulator on/off, + * we just leave it on. + */ + gpiod = devm_gpiod_get_optional(&client->dev, + "maxim,enable", + GPIOD_OUT_HIGH); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + if (gpiod) + max->enable_external_control = true; + + max->desc.enable_reg = MAX8973_VOUT; + max->desc.enable_mask = MAX8973_VOUT_ENABLE; + max->ops.enable = regulator_enable_regmap; + max->ops.disable = regulator_disable_regmap; + max->ops.is_enabled = regulator_is_enabled_regmap; + max->ops.set_current_limit = max8973_set_current_limit; + max->ops.get_current_limit = max8973_get_current_limit; + break; + default: + break; + } + + ret = max8973_init_dcdc(max, pdata); + if (ret < 0) { + dev_err(max->dev, "Max8973 Init failed, err = %d\n", ret); + return ret; + } + + config.dev = &client->dev; + config.init_data = pdata->reg_init_data; + config.driver_data = max; + config.of_node = client->dev.of_node; + config.regmap = max->regmap; + + /* + * Register the regulators + * Turn the GPIO descriptor over to the regulator core for + * lifecycle management if we pass an ena_gpiod. + */ + if (config.ena_gpiod) + devm_gpiod_unhinge(&client->dev, config.ena_gpiod); + rdev = devm_regulator_register(&client->dev, &max->desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(max->dev, "regulator register failed, err %d\n", ret); + return ret; + } + + max8973_thermal_init(max); + return 0; +} + +static const struct i2c_device_id max8973_id[] = { + { .name = "max8973", .driver_data = MAX8973 }, + { .name = "max77621", .driver_data = MAX77621 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max8973_id); + +static struct i2c_driver max8973_i2c_driver = { + .driver = { + .name = "max8973", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_max8973_match_tbl, + }, + .probe = max8973_probe, + .id_table = max8973_id, +}; + +static int __init max8973_init(void) +{ + return i2c_add_driver(&max8973_i2c_driver); +} +subsys_initcall(max8973_init); + +static void __exit max8973_cleanup(void) +{ + i2c_del_driver(&max8973_i2c_driver); +} +module_exit(max8973_cleanup); + +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_DESCRIPTION("MAX8973 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/max8997-regulator.c b/drivers/regulator/max8997-regulator.c new file mode 100644 index 000000000..e48ba694a --- /dev/null +++ b/drivers/regulator/max8997-regulator.c @@ -0,0 +1,1183 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max8997.c - Regulator driver for the Maxim 8997/8966 +// +// Copyright (C) 2011 Samsung Electronics +// MyungJoo Ham +// +// This driver is based on max8998.c + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct max8997_data { + struct device *dev; + struct max8997_dev *iodev; + int num_regulators; + int ramp_delay; /* in mV/us */ + + bool buck1_gpiodvs; + bool buck2_gpiodvs; + bool buck5_gpiodvs; + u8 buck1_vol[8]; + u8 buck2_vol[8]; + u8 buck5_vol[8]; + struct gpio_desc *buck125_gpiods[3]; + int buck125_gpioindex; + bool ignore_gpiodvs_side_effect; + + u8 saved_states[MAX8997_REG_MAX]; +}; + +static const unsigned int safeoutvolt[] = { + 4850000, + 4900000, + 4950000, + 3300000, +}; + +static inline void max8997_set_gpio(struct max8997_data *max8997) +{ + int set3 = (max8997->buck125_gpioindex) & 0x1; + int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1; + int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1; + + gpiod_set_value(max8997->buck125_gpiods[0], set1); + gpiod_set_value(max8997->buck125_gpiods[1], set2); + gpiod_set_value(max8997->buck125_gpiods[2], set3); +} + +struct voltage_map_desc { + int min; + int max; + int step; +}; + +/* Voltage maps in uV */ +static const struct voltage_map_desc ldo_voltage_map_desc = { + .min = 800000, .max = 3950000, .step = 50000, +}; /* LDO1 ~ 18, 21 all */ + +static const struct voltage_map_desc buck1245_voltage_map_desc = { + .min = 650000, .max = 2225000, .step = 25000, +}; /* Buck1, 2, 4, 5 */ + +static const struct voltage_map_desc buck37_voltage_map_desc = { + .min = 750000, .max = 3900000, .step = 50000, +}; /* Buck3, 7 */ + +/* current map in uA */ +static const struct voltage_map_desc charger_current_map_desc = { + .min = 200000, .max = 950000, .step = 50000, +}; + +static const struct voltage_map_desc topoff_current_map_desc = { + .min = 50000, .max = 200000, .step = 10000, +}; + +static const struct voltage_map_desc *reg_voltage_map[] = { + [MAX8997_LDO1] = &ldo_voltage_map_desc, + [MAX8997_LDO2] = &ldo_voltage_map_desc, + [MAX8997_LDO3] = &ldo_voltage_map_desc, + [MAX8997_LDO4] = &ldo_voltage_map_desc, + [MAX8997_LDO5] = &ldo_voltage_map_desc, + [MAX8997_LDO6] = &ldo_voltage_map_desc, + [MAX8997_LDO7] = &ldo_voltage_map_desc, + [MAX8997_LDO8] = &ldo_voltage_map_desc, + [MAX8997_LDO9] = &ldo_voltage_map_desc, + [MAX8997_LDO10] = &ldo_voltage_map_desc, + [MAX8997_LDO11] = &ldo_voltage_map_desc, + [MAX8997_LDO12] = &ldo_voltage_map_desc, + [MAX8997_LDO13] = &ldo_voltage_map_desc, + [MAX8997_LDO14] = &ldo_voltage_map_desc, + [MAX8997_LDO15] = &ldo_voltage_map_desc, + [MAX8997_LDO16] = &ldo_voltage_map_desc, + [MAX8997_LDO17] = &ldo_voltage_map_desc, + [MAX8997_LDO18] = &ldo_voltage_map_desc, + [MAX8997_LDO21] = &ldo_voltage_map_desc, + [MAX8997_BUCK1] = &buck1245_voltage_map_desc, + [MAX8997_BUCK2] = &buck1245_voltage_map_desc, + [MAX8997_BUCK3] = &buck37_voltage_map_desc, + [MAX8997_BUCK4] = &buck1245_voltage_map_desc, + [MAX8997_BUCK5] = &buck1245_voltage_map_desc, + [MAX8997_BUCK6] = NULL, + [MAX8997_BUCK7] = &buck37_voltage_map_desc, + [MAX8997_EN32KHZ_AP] = NULL, + [MAX8997_EN32KHZ_CP] = NULL, + [MAX8997_ENVICHG] = NULL, + [MAX8997_ESAFEOUT1] = NULL, + [MAX8997_ESAFEOUT2] = NULL, + [MAX8997_CHARGER_CV] = NULL, + [MAX8997_CHARGER] = &charger_current_map_desc, + [MAX8997_CHARGER_TOPOFF] = &topoff_current_map_desc, +}; + +static int max8997_list_voltage_charger_cv(struct regulator_dev *rdev, + unsigned int selector) +{ + int rid = rdev_get_id(rdev); + + if (rid != MAX8997_CHARGER_CV) + goto err; + + switch (selector) { + case 0x00: + return 4200000; + case 0x01 ... 0x0E: + return 4000000 + 20000 * (selector - 0x01); + case 0x0F: + return 4350000; + default: + return -EINVAL; + } +err: + return -EINVAL; +} + +static int max8997_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct voltage_map_desc *desc; + int rid = rdev_get_id(rdev); + int val; + + if (rid < 0 || rid >= ARRAY_SIZE(reg_voltage_map)) + return -EINVAL; + + desc = reg_voltage_map[rid]; + if (desc == NULL) + return -EINVAL; + + val = desc->min + desc->step * selector; + if (val > desc->max) + return -EINVAL; + + return val; +} + +static int max8997_get_enable_register(struct regulator_dev *rdev, + int *reg, int *mask, int *pattern) +{ + int rid = rdev_get_id(rdev); + + switch (rid) { + case MAX8997_LDO1 ... MAX8997_LDO21: + *reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1); + *mask = 0xC0; + *pattern = 0xC0; + break; + case MAX8997_BUCK1: + *reg = MAX8997_REG_BUCK1CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK2: + *reg = MAX8997_REG_BUCK2CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK3: + *reg = MAX8997_REG_BUCK3CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK4: + *reg = MAX8997_REG_BUCK4CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK5: + *reg = MAX8997_REG_BUCK5CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK6: + *reg = MAX8997_REG_BUCK6CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_BUCK7: + *reg = MAX8997_REG_BUCK7CTRL; + *mask = 0x01; + *pattern = 0x01; + break; + case MAX8997_EN32KHZ_AP ... MAX8997_EN32KHZ_CP: + *reg = MAX8997_REG_MAINCON1; + *mask = 0x01 << (rid - MAX8997_EN32KHZ_AP); + *pattern = 0x01 << (rid - MAX8997_EN32KHZ_AP); + break; + case MAX8997_ENVICHG: + *reg = MAX8997_REG_MBCCTRL1; + *mask = 0x80; + *pattern = 0x80; + break; + case MAX8997_ESAFEOUT1 ... MAX8997_ESAFEOUT2: + *reg = MAX8997_REG_SAFEOUTCTRL; + *mask = 0x40 << (rid - MAX8997_ESAFEOUT1); + *pattern = 0x40 << (rid - MAX8997_ESAFEOUT1); + break; + case MAX8997_CHARGER: + *reg = MAX8997_REG_MBCCTRL2; + *mask = 0x40; + *pattern = 0x40; + break; + default: + /* Not controllable or not exists */ + return -EINVAL; + } + + return 0; +} + +static int max8997_reg_is_enabled(struct regulator_dev *rdev) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int ret, reg, mask, pattern; + u8 val; + + ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); + if (ret) + return ret; + + ret = max8997_read_reg(i2c, reg, &val); + if (ret) + return ret; + + return (val & mask) == pattern; +} + +static int max8997_reg_enable(struct regulator_dev *rdev) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int ret, reg, mask, pattern; + + ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); + if (ret) + return ret; + + return max8997_update_reg(i2c, reg, pattern, mask); +} + +static int max8997_reg_disable(struct regulator_dev *rdev) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int ret, reg, mask, pattern; + + ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); + if (ret) + return ret; + + return max8997_update_reg(i2c, reg, ~pattern, mask); +} + +static int max8997_get_voltage_register(struct regulator_dev *rdev, + int *_reg, int *_shift, int *_mask) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + int reg, shift = 0, mask = 0x3f; + + switch (rid) { + case MAX8997_LDO1 ... MAX8997_LDO21: + reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1); + break; + case MAX8997_BUCK1: + reg = MAX8997_REG_BUCK1DVS1; + if (max8997->buck1_gpiodvs) + reg += max8997->buck125_gpioindex; + break; + case MAX8997_BUCK2: + reg = MAX8997_REG_BUCK2DVS1; + if (max8997->buck2_gpiodvs) + reg += max8997->buck125_gpioindex; + break; + case MAX8997_BUCK3: + reg = MAX8997_REG_BUCK3DVS; + break; + case MAX8997_BUCK4: + reg = MAX8997_REG_BUCK4DVS; + break; + case MAX8997_BUCK5: + reg = MAX8997_REG_BUCK5DVS1; + if (max8997->buck5_gpiodvs) + reg += max8997->buck125_gpioindex; + break; + case MAX8997_BUCK7: + reg = MAX8997_REG_BUCK7DVS; + break; + case MAX8997_ESAFEOUT1 ... MAX8997_ESAFEOUT2: + reg = MAX8997_REG_SAFEOUTCTRL; + shift = (rid == MAX8997_ESAFEOUT2) ? 2 : 0; + mask = 0x3; + break; + case MAX8997_CHARGER_CV: + reg = MAX8997_REG_MBCCTRL3; + shift = 0; + mask = 0xf; + break; + case MAX8997_CHARGER: + reg = MAX8997_REG_MBCCTRL4; + shift = 0; + mask = 0xf; + break; + case MAX8997_CHARGER_TOPOFF: + reg = MAX8997_REG_MBCCTRL5; + shift = 0; + mask = 0xf; + break; + default: + return -EINVAL; + } + + *_reg = reg; + *_shift = shift; + *_mask = mask; + + return 0; +} + +static int max8997_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int reg, shift, mask, ret; + u8 val; + + ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + ret = max8997_read_reg(i2c, reg, &val); + if (ret) + return ret; + + val >>= shift; + val &= mask; + + return val; +} + +static inline int max8997_get_voltage_proper_val( + const struct voltage_map_desc *desc, + int min_vol, int max_vol) +{ + int i; + + if (desc == NULL) + return -EINVAL; + + if (max_vol < desc->min || min_vol > desc->max) + return -EINVAL; + + if (min_vol < desc->min) + min_vol = desc->min; + + i = DIV_ROUND_UP(min_vol - desc->min, desc->step); + + if (desc->min + desc->step * i > max_vol) + return -EINVAL; + + return i; +} + +static int max8997_set_voltage_charger_cv(struct regulator_dev *rdev, + int min_uV, int max_uV, unsigned *selector) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int rid = rdev_get_id(rdev); + int lb, ub; + int reg, shift = 0, mask, ret = 0; + u8 val = 0x0; + + if (rid != MAX8997_CHARGER_CV) + return -EINVAL; + + ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + if (max_uV < 4000000 || min_uV > 4350000) + return -EINVAL; + + if (min_uV <= 4000000) + val = 0x1; + else if (min_uV <= 4200000 && max_uV >= 4200000) + val = 0x0; + else { + lb = (min_uV - 4000001) / 20000 + 2; + ub = (max_uV - 4000000) / 20000 + 1; + + if (lb > ub) + return -EINVAL; + + if (lb < 0xf) + val = lb; + else { + if (ub >= 0xf) + val = 0xf; + else + return -EINVAL; + } + } + + *selector = val; + + ret = max8997_update_reg(i2c, reg, val << shift, mask); + + return ret; +} + +/* + * For LDO1 ~ LDO21, BUCK1~5, BUCK7, CHARGER, CHARGER_TOPOFF + * BUCK1, 2, and 5 are available if they are not controlled by gpio + */ +static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev, + int min_uV, int max_uV, unsigned *selector) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + const struct voltage_map_desc *desc; + int rid = rdev_get_id(rdev); + int i, reg, shift, mask, ret; + + switch (rid) { + case MAX8997_LDO1 ... MAX8997_LDO21: + break; + case MAX8997_BUCK1 ... MAX8997_BUCK5: + break; + case MAX8997_BUCK6: + return -EINVAL; + case MAX8997_BUCK7: + break; + case MAX8997_CHARGER: + break; + case MAX8997_CHARGER_TOPOFF: + break; + default: + return -EINVAL; + } + + desc = reg_voltage_map[rid]; + + i = max8997_get_voltage_proper_val(desc, min_uV, max_uV); + if (i < 0) + return i; + + ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + ret = max8997_update_reg(i2c, reg, i << shift, mask << shift); + *selector = i; + + return ret; +} + +static int max8997_set_voltage_buck_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + const struct voltage_map_desc *desc = reg_voltage_map[rid]; + + /* Delay is required only if the voltage is increasing */ + if (old_selector >= new_selector) + return 0; + + /* No need to delay if gpio_dvs_mode */ + switch (rid) { + case MAX8997_BUCK1: + if (max8997->buck1_gpiodvs) + return 0; + break; + case MAX8997_BUCK2: + if (max8997->buck2_gpiodvs) + return 0; + break; + case MAX8997_BUCK5: + if (max8997->buck5_gpiodvs) + return 0; + break; + } + + switch (rid) { + case MAX8997_BUCK1: + case MAX8997_BUCK2: + case MAX8997_BUCK4: + case MAX8997_BUCK5: + return DIV_ROUND_UP(desc->step * (new_selector - old_selector), + max8997->ramp_delay * 1000); + } + + return 0; +} + +/* + * Assess the damage on the voltage setting of BUCK1,2,5 by the change. + * + * When GPIO-DVS mode is used for multiple bucks, changing the voltage value + * of one of the bucks may affect that of another buck, which is the side + * effect of the change (set_voltage). This function examines the GPIO-DVS + * configurations and checks whether such side-effect exists. + */ +static int max8997_assess_side_effect(struct regulator_dev *rdev, + u8 new_val, int *best) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + u8 *buckx_val[3]; + bool buckx_gpiodvs[3]; + int side_effect[8]; + int min_side_effect = INT_MAX; + int i; + + *best = -1; + + switch (rid) { + case MAX8997_BUCK1: + rid = 0; + break; + case MAX8997_BUCK2: + rid = 1; + break; + case MAX8997_BUCK5: + rid = 2; + break; + default: + return -EINVAL; + } + + buckx_val[0] = max8997->buck1_vol; + buckx_val[1] = max8997->buck2_vol; + buckx_val[2] = max8997->buck5_vol; + buckx_gpiodvs[0] = max8997->buck1_gpiodvs; + buckx_gpiodvs[1] = max8997->buck2_gpiodvs; + buckx_gpiodvs[2] = max8997->buck5_gpiodvs; + + for (i = 0; i < 8; i++) { + int others; + + if (new_val != (buckx_val[rid])[i]) { + side_effect[i] = -1; + continue; + } + + side_effect[i] = 0; + for (others = 0; others < 3; others++) { + int diff; + + if (others == rid) + continue; + if (buckx_gpiodvs[others] == false) + continue; /* Not affected */ + diff = (buckx_val[others])[i] - + (buckx_val[others])[max8997->buck125_gpioindex]; + if (diff > 0) + side_effect[i] += diff; + else if (diff < 0) + side_effect[i] -= diff; + } + if (side_effect[i] == 0) { + *best = i; + return 0; /* NO SIDE EFFECT! Use This! */ + } + if (side_effect[i] < min_side_effect) { + min_side_effect = side_effect[i]; + *best = i; + } + } + + if (*best == -1) + return -EINVAL; + + return side_effect[*best]; +} + +/* + * For Buck 1 ~ 5 and 7. If it is not controlled by GPIO, this calls + * max8997_set_voltage_ldobuck to do the job. + */ +static int max8997_set_voltage_buck(struct regulator_dev *rdev, + int min_uV, int max_uV, unsigned *selector) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev); + const struct voltage_map_desc *desc; + int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg; + bool gpio_dvs_mode = false; + + if (rid < MAX8997_BUCK1 || rid > MAX8997_BUCK7) + return -EINVAL; + + switch (rid) { + case MAX8997_BUCK1: + if (max8997->buck1_gpiodvs) + gpio_dvs_mode = true; + break; + case MAX8997_BUCK2: + if (max8997->buck2_gpiodvs) + gpio_dvs_mode = true; + break; + case MAX8997_BUCK5: + if (max8997->buck5_gpiodvs) + gpio_dvs_mode = true; + break; + } + + if (!gpio_dvs_mode) + return max8997_set_voltage_ldobuck(rdev, min_uV, max_uV, + selector); + + desc = reg_voltage_map[rid]; + new_val = max8997_get_voltage_proper_val(desc, min_uV, max_uV); + if (new_val < 0) + return new_val; + + tmp_dmg = INT_MAX; + tmp_idx = -1; + tmp_val = -1; + do { + damage = max8997_assess_side_effect(rdev, new_val, &new_idx); + if (damage == 0) + goto out; + + if (tmp_dmg > damage) { + tmp_idx = new_idx; + tmp_val = new_val; + tmp_dmg = damage; + } + + new_val++; + } while (desc->min + desc->step * new_val <= desc->max); + + new_idx = tmp_idx; + new_val = tmp_val; + + if (max8997->ignore_gpiodvs_side_effect == false) + return -EINVAL; + + dev_warn(&rdev->dev, + "MAX8997 GPIO-DVS Side Effect Warning: GPIO SET: %d -> %d\n", + max8997->buck125_gpioindex, tmp_idx); + +out: + if (new_idx < 0 || new_val < 0) + return -EINVAL; + + max8997->buck125_gpioindex = new_idx; + max8997_set_gpio(max8997); + *selector = new_val; + + return 0; +} + +/* For SAFEOUT1 and SAFEOUT2 */ +static int max8997_set_voltage_safeout_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int rid = rdev_get_id(rdev); + int reg, shift = 0, mask, ret; + + if (rid != MAX8997_ESAFEOUT1 && rid != MAX8997_ESAFEOUT2) + return -EINVAL; + + ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + return max8997_update_reg(i2c, reg, selector << shift, mask << shift); +} + +static int max8997_reg_disable_suspend(struct regulator_dev *rdev) +{ + struct max8997_data *max8997 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8997->iodev->i2c; + int ret, reg, mask, pattern; + int rid = rdev_get_id(rdev); + + ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); + if (ret) + return ret; + + max8997_read_reg(i2c, reg, &max8997->saved_states[rid]); + + if (rid == MAX8997_LDO1 || + rid == MAX8997_LDO10 || + rid == MAX8997_LDO21) { + dev_dbg(&rdev->dev, "Conditional Power-Off for %s\n", + rdev->desc->name); + return max8997_update_reg(i2c, reg, 0x40, mask); + } + + dev_dbg(&rdev->dev, "Full Power-Off for %s (%xh -> %xh)\n", + rdev->desc->name, max8997->saved_states[rid] & mask, + (~pattern) & mask); + return max8997_update_reg(i2c, reg, ~pattern, mask); +} + +static const struct regulator_ops max8997_ldo_ops = { + .list_voltage = max8997_list_voltage, + .is_enabled = max8997_reg_is_enabled, + .enable = max8997_reg_enable, + .disable = max8997_reg_disable, + .get_voltage_sel = max8997_get_voltage_sel, + .set_voltage = max8997_set_voltage_ldobuck, + .set_suspend_disable = max8997_reg_disable_suspend, +}; + +static const struct regulator_ops max8997_buck_ops = { + .list_voltage = max8997_list_voltage, + .is_enabled = max8997_reg_is_enabled, + .enable = max8997_reg_enable, + .disable = max8997_reg_disable, + .get_voltage_sel = max8997_get_voltage_sel, + .set_voltage = max8997_set_voltage_buck, + .set_voltage_time_sel = max8997_set_voltage_buck_time_sel, + .set_suspend_disable = max8997_reg_disable_suspend, +}; + +static const struct regulator_ops max8997_fixedvolt_ops = { + .list_voltage = max8997_list_voltage, + .is_enabled = max8997_reg_is_enabled, + .enable = max8997_reg_enable, + .disable = max8997_reg_disable, + .set_suspend_disable = max8997_reg_disable_suspend, +}; + +static const struct regulator_ops max8997_safeout_ops = { + .list_voltage = regulator_list_voltage_table, + .is_enabled = max8997_reg_is_enabled, + .enable = max8997_reg_enable, + .disable = max8997_reg_disable, + .get_voltage_sel = max8997_get_voltage_sel, + .set_voltage_sel = max8997_set_voltage_safeout_sel, + .set_suspend_disable = max8997_reg_disable_suspend, +}; + +static const struct regulator_ops max8997_fixedstate_ops = { + .list_voltage = max8997_list_voltage_charger_cv, + .get_voltage_sel = max8997_get_voltage_sel, + .set_voltage = max8997_set_voltage_charger_cv, +}; + +static int max8997_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + unsigned dummy; + int rid = rdev_get_id(rdev); + + if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF) + return -EINVAL; + + /* Reuse max8997_set_voltage_ldobuck to set current_limit. */ + return max8997_set_voltage_ldobuck(rdev, min_uA, max_uA, &dummy); +} + +static int max8997_get_current_limit(struct regulator_dev *rdev) +{ + int sel, rid = rdev_get_id(rdev); + + if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF) + return -EINVAL; + + sel = max8997_get_voltage_sel(rdev); + if (sel < 0) + return sel; + + /* Reuse max8997_list_voltage to get current_limit. */ + return max8997_list_voltage(rdev, sel); +} + +static const struct regulator_ops max8997_charger_ops = { + .is_enabled = max8997_reg_is_enabled, + .enable = max8997_reg_enable, + .disable = max8997_reg_disable, + .get_current_limit = max8997_get_current_limit, + .set_current_limit = max8997_set_current_limit, +}; + +static const struct regulator_ops max8997_charger_fixedstate_ops = { + .get_current_limit = max8997_get_current_limit, + .set_current_limit = max8997_set_current_limit, +}; + +#define MAX8997_VOLTAGE_REGULATOR(_name, _ops) {\ + .name = #_name, \ + .id = MAX8997_##_name, \ + .ops = &_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ +} + +#define MAX8997_CURRENT_REGULATOR(_name, _ops) {\ + .name = #_name, \ + .id = MAX8997_##_name, \ + .ops = &_ops, \ + .type = REGULATOR_CURRENT, \ + .owner = THIS_MODULE, \ +} + +static struct regulator_desc regulators[] = { + MAX8997_VOLTAGE_REGULATOR(LDO1, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO2, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO3, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO4, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO5, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO6, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO7, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO8, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO9, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO10, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO11, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO12, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO13, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO14, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO15, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO16, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO17, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO18, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(LDO21, max8997_ldo_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK1, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK2, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK3, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK4, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK5, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK6, max8997_fixedvolt_ops), + MAX8997_VOLTAGE_REGULATOR(BUCK7, max8997_buck_ops), + MAX8997_VOLTAGE_REGULATOR(EN32KHZ_AP, max8997_fixedvolt_ops), + MAX8997_VOLTAGE_REGULATOR(EN32KHZ_CP, max8997_fixedvolt_ops), + MAX8997_VOLTAGE_REGULATOR(ENVICHG, max8997_fixedvolt_ops), + MAX8997_VOLTAGE_REGULATOR(ESAFEOUT1, max8997_safeout_ops), + MAX8997_VOLTAGE_REGULATOR(ESAFEOUT2, max8997_safeout_ops), + MAX8997_VOLTAGE_REGULATOR(CHARGER_CV, max8997_fixedstate_ops), + MAX8997_CURRENT_REGULATOR(CHARGER, max8997_charger_ops), + MAX8997_CURRENT_REGULATOR(CHARGER_TOPOFF, + max8997_charger_fixedstate_ops), +}; + +#ifdef CONFIG_OF +static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev, + struct max8997_platform_data *pdata) +{ + struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct device_node *pmic_np, *reg_np; + struct max8997_regulator_data *rdata; + unsigned int i, dvs_voltage_nr = 1; + + pmic_np = iodev->dev->of_node; + if (!pmic_np) { + dev_err(&pdev->dev, "could not find pmic sub-node\n"); + return -ENODEV; + } + + struct device_node *regulators_np __free(device_node) = of_get_child_by_name(pmic_np, + "regulators"); + if (!regulators_np) { + dev_err(&pdev->dev, "could not find regulators sub-node\n"); + return -EINVAL; + } + + /* count the number of regulators to be supported in pmic */ + pdata->num_regulators = of_get_child_count(regulators_np); + + rdata = devm_kcalloc(&pdev->dev, + pdata->num_regulators, sizeof(*rdata), + GFP_KERNEL); + if (!rdata) + return -ENOMEM; + + pdata->regulators = rdata; + for_each_child_of_node(regulators_np, reg_np) { + for (i = 0; i < ARRAY_SIZE(regulators); i++) + if (of_node_name_eq(reg_np, regulators[i].name)) + break; + + if (i == ARRAY_SIZE(regulators)) { + dev_warn(&pdev->dev, "don't know how to configure regulator %pOFn\n", + reg_np); + continue; + } + + rdata->id = i; + rdata->initdata = of_get_regulator_init_data(&pdev->dev, + reg_np, + ®ulators[i]); + rdata->reg_node = reg_np; + rdata++; + } + + pdata->buck1_gpiodvs = of_property_read_bool(pmic_np, "max8997,pmic-buck1-uses-gpio-dvs"); + pdata->buck2_gpiodvs = of_property_read_bool(pmic_np, "max8997,pmic-buck2-uses-gpio-dvs"); + pdata->buck5_gpiodvs = of_property_read_bool(pmic_np, "max8997,pmic-buck5-uses-gpio-dvs"); + + if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs || + pdata->buck5_gpiodvs) { + if (of_property_read_u32(pmic_np, + "max8997,pmic-buck125-default-dvs-idx", + &pdata->buck125_default_idx)) { + pdata->buck125_default_idx = 0; + } else { + if (pdata->buck125_default_idx >= 8) { + pdata->buck125_default_idx = 0; + dev_info(&pdev->dev, "invalid value for default dvs index, using 0 instead\n"); + } + } + + pdata->ignore_gpiodvs_side_effect = of_property_read_bool(pmic_np, + "max8997,pmic-ignore-gpiodvs-side-effect"); + + dvs_voltage_nr = 8; + } + + if (of_property_read_u32_array(pmic_np, + "max8997,pmic-buck1-dvs-voltage", + pdata->buck1_voltage, dvs_voltage_nr)) { + dev_err(&pdev->dev, "buck1 voltages not specified\n"); + return -EINVAL; + } + + if (of_property_read_u32_array(pmic_np, + "max8997,pmic-buck2-dvs-voltage", + pdata->buck2_voltage, dvs_voltage_nr)) { + dev_err(&pdev->dev, "buck2 voltages not specified\n"); + return -EINVAL; + } + + if (of_property_read_u32_array(pmic_np, + "max8997,pmic-buck5-dvs-voltage", + pdata->buck5_voltage, dvs_voltage_nr)) { + dev_err(&pdev->dev, "buck5 voltages not specified\n"); + return -EINVAL; + } + + return 0; +} +#else +static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev, + struct max8997_platform_data *pdata) +{ + return 0; +} +#endif /* CONFIG_OF */ + +static int max8997_pmic_probe(struct platform_device *pdev) +{ + struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct max8997_platform_data *pdata = iodev->pdata; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct max8997_data *max8997; + struct i2c_client *i2c; + int i, ret, nr_dvs; + u8 max_buck1 = 0, max_buck2 = 0, max_buck5 = 0; + + if (!pdata) { + dev_err(&pdev->dev, "No platform init data supplied.\n"); + return -ENODEV; + } + + if (iodev->dev->of_node) { + ret = max8997_pmic_dt_parse_pdata(pdev, pdata); + if (ret) + return ret; + } + + max8997 = devm_kzalloc(&pdev->dev, sizeof(struct max8997_data), + GFP_KERNEL); + if (!max8997) + return -ENOMEM; + + max8997->dev = &pdev->dev; + max8997->iodev = iodev; + max8997->num_regulators = pdata->num_regulators; + platform_set_drvdata(pdev, max8997); + i2c = max8997->iodev->i2c; + + max8997->buck125_gpioindex = pdata->buck125_default_idx; + max8997->buck1_gpiodvs = pdata->buck1_gpiodvs; + max8997->buck2_gpiodvs = pdata->buck2_gpiodvs; + max8997->buck5_gpiodvs = pdata->buck5_gpiodvs; + max8997->ignore_gpiodvs_side_effect = pdata->ignore_gpiodvs_side_effect; + + nr_dvs = (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs || + pdata->buck5_gpiodvs) ? 8 : 1; + + for (i = 0; i < nr_dvs; i++) { + max8997->buck1_vol[i] = ret = + max8997_get_voltage_proper_val( + &buck1245_voltage_map_desc, + pdata->buck1_voltage[i], + pdata->buck1_voltage[i] + + buck1245_voltage_map_desc.step); + if (ret < 0) + return ret; + + max8997->buck2_vol[i] = ret = + max8997_get_voltage_proper_val( + &buck1245_voltage_map_desc, + pdata->buck2_voltage[i], + pdata->buck2_voltage[i] + + buck1245_voltage_map_desc.step); + if (ret < 0) + return ret; + + max8997->buck5_vol[i] = ret = + max8997_get_voltage_proper_val( + &buck1245_voltage_map_desc, + pdata->buck5_voltage[i], + pdata->buck5_voltage[i] + + buck1245_voltage_map_desc.step); + if (ret < 0) + return ret; + + if (max_buck1 < max8997->buck1_vol[i]) + max_buck1 = max8997->buck1_vol[i]; + if (max_buck2 < max8997->buck2_vol[i]) + max_buck2 = max8997->buck2_vol[i]; + if (max_buck5 < max8997->buck5_vol[i]) + max_buck5 = max8997->buck5_vol[i]; + } + + /* For the safety, set max voltage before setting up */ + for (i = 0; i < 8; i++) { + max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i, + max_buck1, 0x3f); + max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i, + max_buck2, 0x3f); + max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i, + max_buck5, 0x3f); + } + + /* Initialize all the DVS related BUCK registers */ + for (i = 0; i < nr_dvs; i++) { + max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i, + max8997->buck1_vol[i], + 0x3f); + max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i, + max8997->buck2_vol[i], + 0x3f); + max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i, + max8997->buck5_vol[i], + 0x3f); + } + + /* + * If buck 1, 2, and 5 do not care DVS GPIO settings, ignore them. + * If at least one of them cares, set gpios. + */ + if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs || + pdata->buck5_gpiodvs) { + const char *gpio_names[3] = {"MAX8997 SET1", "MAX8997 SET2", "MAX8997 SET3"}; + + for (i = 0; i < 3; i++) { + enum gpiod_flags flags; + + if (max8997->buck125_gpioindex & BIT(2 - i)) + flags = GPIOD_OUT_HIGH; + else + flags = GPIOD_OUT_LOW; + + max8997->buck125_gpiods[i] = devm_gpiod_get_index(iodev->dev, + "max8997,pmic-buck125-dvs", + i, + flags); + if (IS_ERR(max8997->buck125_gpiods[i])) { + ret = PTR_ERR(max8997->buck125_gpiods[i]); + return dev_err_probe(iodev->dev, ret, "cant get GPIO %d (%d)\n", + i, ret); + } + gpiod_set_consumer_name(max8997->buck125_gpiods[i], gpio_names[i]); + } + } + + /* DVS-GPIO disabled */ + max8997_update_reg(i2c, MAX8997_REG_BUCK1CTRL, (pdata->buck1_gpiodvs) ? + (1 << 1) : (0 << 1), 1 << 1); + max8997_update_reg(i2c, MAX8997_REG_BUCK2CTRL, (pdata->buck2_gpiodvs) ? + (1 << 1) : (0 << 1), 1 << 1); + max8997_update_reg(i2c, MAX8997_REG_BUCK5CTRL, (pdata->buck5_gpiodvs) ? + (1 << 1) : (0 << 1), 1 << 1); + + /* Misc Settings */ + max8997->ramp_delay = 10; /* set 10mV/us, which is the default */ + max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf << 4) | 0x9); + + for (i = 0; i < pdata->num_regulators; i++) { + const struct voltage_map_desc *desc; + int id = pdata->regulators[i].id; + + desc = reg_voltage_map[id]; + if (desc) { + regulators[id].n_voltages = + (desc->max - desc->min) / desc->step + 1; + } else if (id == MAX8997_ESAFEOUT1 || id == MAX8997_ESAFEOUT2) { + regulators[id].volt_table = safeoutvolt; + regulators[id].n_voltages = ARRAY_SIZE(safeoutvolt); + } else if (id == MAX8997_CHARGER_CV) { + regulators[id].n_voltages = 16; + } + + config.dev = max8997->dev; + config.init_data = pdata->regulators[i].initdata; + config.driver_data = max8997; + config.of_node = pdata->regulators[i].reg_node; + + rdev = devm_regulator_register(&pdev->dev, ®ulators[id], + &config); + if (IS_ERR(rdev)) { + dev_err(max8997->dev, "regulator init failed for %d\n", + id); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id max8997_pmic_id[] = { + { .name = "max8997-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, max8997_pmic_id); + +static struct platform_driver max8997_pmic_driver = { + .driver = { + .name = "max8997-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max8997_pmic_probe, + .id_table = max8997_pmic_id, +}; + +static int __init max8997_pmic_init(void) +{ + return platform_driver_register(&max8997_pmic_driver); +} +subsys_initcall(max8997_pmic_init); + +static void __exit max8997_pmic_cleanup(void) +{ + platform_driver_unregister(&max8997_pmic_driver); +} +module_exit(max8997_pmic_cleanup); + +MODULE_DESCRIPTION("MAXIM 8997/8966 Regulator Driver"); +MODULE_AUTHOR("MyungJoo Ham "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/max8998.c b/drivers/regulator/max8998.c new file mode 100644 index 000000000..90651f4d1 --- /dev/null +++ b/drivers/regulator/max8998.c @@ -0,0 +1,783 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// max8998.c - Voltage regulator driver for the Maxim 8998 +// +// Copyright (C) 2009-2010 Samsung Electronics +// Kyungmin Park +// Marek Szyprowski + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct max8998_data { + struct device *dev; + struct max8998_dev *iodev; + int num_regulators; + u8 buck1_vol[4]; /* voltages for selection */ + u8 buck2_vol[2]; + unsigned int buck1_idx; /* index to last changed voltage */ + /* value in a set */ + unsigned int buck2_idx; + struct gpio_desc *buck1_gpio1; + struct gpio_desc *buck1_gpio2; + struct gpio_desc *buck2_gpio; +}; + +static const unsigned int charger_current_table[] = { + 90000, 380000, 475000, 550000, 570000, 600000, 700000, 800000, +}; + +static int max8998_get_enable_register(struct regulator_dev *rdev, + int *reg, int *shift) +{ + int ldo = rdev_get_id(rdev); + + switch (ldo) { + case MAX8998_LDO2 ... MAX8998_LDO5: + *reg = MAX8998_REG_ONOFF1; + *shift = 3 - (ldo - MAX8998_LDO2); + break; + case MAX8998_LDO6 ... MAX8998_LDO13: + *reg = MAX8998_REG_ONOFF2; + *shift = 7 - (ldo - MAX8998_LDO6); + break; + case MAX8998_LDO14 ... MAX8998_LDO17: + *reg = MAX8998_REG_ONOFF3; + *shift = 7 - (ldo - MAX8998_LDO14); + break; + case MAX8998_BUCK1 ... MAX8998_BUCK4: + *reg = MAX8998_REG_ONOFF1; + *shift = 7 - (ldo - MAX8998_BUCK1); + break; + case MAX8998_EN32KHZ_AP ... MAX8998_ENVICHG: + *reg = MAX8998_REG_ONOFF4; + *shift = 7 - (ldo - MAX8998_EN32KHZ_AP); + break; + case MAX8998_ESAFEOUT1 ... MAX8998_ESAFEOUT2: + *reg = MAX8998_REG_CHGR2; + *shift = 7 - (ldo - MAX8998_ESAFEOUT1); + break; + case MAX8998_CHARGER: + *reg = MAX8998_REG_CHGR2; + *shift = 0; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int max8998_ldo_is_enabled(struct regulator_dev *rdev) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + int ret, reg, shift = 8; + u8 val; + + ret = max8998_get_enable_register(rdev, ®, &shift); + if (ret) + return ret; + + ret = max8998_read_reg(i2c, reg, &val); + if (ret) + return ret; + + return val & (1 << shift); +} + +static int max8998_ldo_is_enabled_inverted(struct regulator_dev *rdev) +{ + return (!max8998_ldo_is_enabled(rdev)); +} + +static int max8998_ldo_enable(struct regulator_dev *rdev) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + int reg, shift = 8, ret; + + ret = max8998_get_enable_register(rdev, ®, &shift); + if (ret) + return ret; + + return max8998_update_reg(i2c, reg, 1<iodev->i2c; + int reg, shift = 8, ret; + + ret = max8998_get_enable_register(rdev, ®, &shift); + if (ret) + return ret; + + return max8998_update_reg(i2c, reg, 0, 1<buck1_idx; + break; + case MAX8998_BUCK2: + reg = MAX8998_REG_BUCK2_VOLTAGE1 + max8998->buck2_idx; + break; + case MAX8998_BUCK3: + reg = MAX8998_REG_BUCK3; + break; + case MAX8998_BUCK4: + reg = MAX8998_REG_BUCK4; + break; + default: + return -EINVAL; + } + + *_reg = reg; + *_shift = shift; + *_mask = mask; + + return 0; +} + +static int max8998_get_voltage_sel(struct regulator_dev *rdev) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + int reg, shift = 0, mask, ret; + u8 val; + + ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + ret = max8998_read_reg(i2c, reg, &val); + if (ret) + return ret; + + val >>= shift; + val &= mask; + + return val; +} + +static int max8998_set_voltage_ldo_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + int reg, shift = 0, mask, ret; + + ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + ret = max8998_update_reg(i2c, reg, selector<> 1) & 0x1); +} + +static inline void buck2_gpio_set(struct gpio_desc *gpio, int v) +{ + gpiod_set_value(gpio, v & 0x1); +} + +static int max8998_set_voltage_buck_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct max8998_platform_data *pdata = max8998->iodev->pdata; + struct i2c_client *i2c = max8998->iodev->i2c; + int buck = rdev_get_id(rdev); + int reg, shift = 0, mask, ret, j; + static u8 buck1_last_val; + + ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); + if (ret) + return ret; + + switch (buck) { + case MAX8998_BUCK1: + dev_dbg(max8998->dev, + "BUCK1, selector:%d, buck1_vol1:%d, buck1_vol2:%d\n" + "buck1_vol3:%d, buck1_vol4:%d\n", + selector, max8998->buck1_vol[0], max8998->buck1_vol[1], + max8998->buck1_vol[2], max8998->buck1_vol[3]); + + if (max8998->buck1_gpio1 && max8998->buck1_gpio2) { + + /* check if requested voltage */ + /* value is already defined */ + for (j = 0; j < ARRAY_SIZE(max8998->buck1_vol); j++) { + if (max8998->buck1_vol[j] == selector) { + max8998->buck1_idx = j; + buck1_gpio_set(max8998->buck1_gpio1, + max8998->buck1_gpio2, j); + goto buck1_exit; + } + } + + if (pdata->buck_voltage_lock) + return -EINVAL; + + /* no predefine regulator found */ + max8998->buck1_idx = (buck1_last_val % 2) + 2; + dev_dbg(max8998->dev, "max8998->buck1_idx:%d\n", + max8998->buck1_idx); + max8998->buck1_vol[max8998->buck1_idx] = selector; + ret = max8998_get_voltage_register(rdev, ®, + &shift, + &mask); + ret = max8998_write_reg(i2c, reg, selector); + buck1_gpio_set(max8998->buck1_gpio1, + max8998->buck1_gpio2, max8998->buck1_idx); + buck1_last_val++; +buck1_exit: + dev_dbg(max8998->dev, "%s: SET1:%d, SET2:%d\n", + i2c->name, gpiod_get_value(max8998->buck1_gpio1), + gpiod_get_value(max8998->buck1_gpio2)); + break; + } else { + ret = max8998_write_reg(i2c, reg, selector); + } + break; + + case MAX8998_BUCK2: + dev_dbg(max8998->dev, + "BUCK2, selector:%d buck2_vol1:%d, buck2_vol2:%d\n", + selector, max8998->buck2_vol[0], max8998->buck2_vol[1]); + if (max8998->buck2_gpio) { + /* check if requested voltage */ + /* value is already defined */ + for (j = 0; j < ARRAY_SIZE(max8998->buck2_vol); j++) { + if (max8998->buck2_vol[j] == selector) { + max8998->buck2_idx = j; + buck2_gpio_set(max8998->buck2_gpio, j); + goto buck2_exit; + } + } + + if (pdata->buck_voltage_lock) + return -EINVAL; + + max8998_get_voltage_register(rdev, + ®, &shift, &mask); + ret = max8998_write_reg(i2c, reg, selector); + max8998->buck2_vol[max8998->buck2_idx] = selector; + buck2_gpio_set(max8998->buck2_gpio, max8998->buck2_idx); +buck2_exit: + dev_dbg(max8998->dev, "%s: SET3:%d\n", i2c->name, + gpiod_get_value(max8998->buck2_gpio)); + } else { + ret = max8998_write_reg(i2c, reg, selector); + } + break; + + case MAX8998_BUCK3: + case MAX8998_BUCK4: + ret = max8998_update_reg(i2c, reg, selector<iodev->i2c; + int buck = rdev_get_id(rdev); + u8 val = 0; + int difference, ret; + + if (buck < MAX8998_BUCK1 || buck > MAX8998_BUCK4) + return -EINVAL; + + /* Voltage stabilization */ + ret = max8998_read_reg(i2c, MAX8998_REG_ONOFF4, &val); + if (ret) + return ret; + + /* lp3974 hasn't got ENRAMP bit - ramp is assumed as true */ + /* MAX8998 has ENRAMP bit implemented, so test it*/ + if (max8998->iodev->type == TYPE_MAX8998 && !(val & MAX8998_ENRAMP)) + return 0; + + difference = (new_selector - old_selector) * rdev->desc->uV_step / 1000; + if (difference > 0) + return DIV_ROUND_UP(difference, (val & 0x0f) + 1); + + return 0; +} + +static int max8998_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + unsigned int n_currents = rdev->desc->n_current_limits; + int i, sel = -1; + + if (n_currents == 0) + return -EINVAL; + + if (rdev->desc->curr_table) { + const unsigned int *curr_table = rdev->desc->curr_table; + bool ascend = curr_table[n_currents - 1] > curr_table[0]; + + /* search for closest to maximum */ + if (ascend) { + for (i = n_currents - 1; i >= 0; i--) { + if (min_uA <= curr_table[i] && + curr_table[i] <= max_uA) { + sel = i; + break; + } + } + } else { + for (i = 0; i < n_currents; i++) { + if (min_uA <= curr_table[i] && + curr_table[i] <= max_uA) { + sel = i; + break; + } + } + } + } + + if (sel < 0) + return -EINVAL; + + sel <<= ffs(rdev->desc->csel_mask) - 1; + + return max8998_update_reg(i2c, rdev->desc->csel_reg, + sel, rdev->desc->csel_mask); +} + +static int max8998_get_current_limit(struct regulator_dev *rdev) +{ + struct max8998_data *max8998 = rdev_get_drvdata(rdev); + struct i2c_client *i2c = max8998->iodev->i2c; + u8 val; + int ret; + + ret = max8998_read_reg(i2c, rdev->desc->csel_reg, &val); + if (ret != 0) + return ret; + + val &= rdev->desc->csel_mask; + val >>= ffs(rdev->desc->csel_mask) - 1; + + if (rdev->desc->curr_table) { + if (val >= rdev->desc->n_current_limits) + return -EINVAL; + + return rdev->desc->curr_table[val]; + } + + return -EINVAL; +} + +static const struct regulator_ops max8998_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = max8998_ldo_is_enabled, + .enable = max8998_ldo_enable, + .disable = max8998_ldo_disable, + .get_voltage_sel = max8998_get_voltage_sel, + .set_voltage_sel = max8998_set_voltage_ldo_sel, +}; + +static const struct regulator_ops max8998_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = max8998_ldo_is_enabled, + .enable = max8998_ldo_enable, + .disable = max8998_ldo_disable, + .get_voltage_sel = max8998_get_voltage_sel, + .set_voltage_sel = max8998_set_voltage_buck_sel, + .set_voltage_time_sel = max8998_set_voltage_buck_time_sel, +}; + +static const struct regulator_ops max8998_charger_ops = { + .set_current_limit = max8998_set_current_limit, + .get_current_limit = max8998_get_current_limit, + .is_enabled = max8998_ldo_is_enabled_inverted, + /* Swapped as register is inverted */ + .enable = max8998_ldo_disable, + .disable = max8998_ldo_enable, +}; + +static const struct regulator_ops max8998_others_ops = { + .is_enabled = max8998_ldo_is_enabled, + .enable = max8998_ldo_enable, + .disable = max8998_ldo_disable, +}; + +#define MAX8998_LINEAR_REG(_name, _ops, _min, _step, _max) \ + { \ + .name = #_name, \ + .id = MAX8998_##_name, \ + .ops = _ops, \ + .min_uV = (_min), \ + .uV_step = (_step), \ + .n_voltages = ((_max) - (_min)) / (_step) + 1, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +#define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \ + { \ + .name = #_name, \ + .id = MAX8998_##_name, \ + .ops = _ops, \ + .curr_table = _table, \ + .n_current_limits = ARRAY_SIZE(_table), \ + .csel_reg = _reg, \ + .csel_mask = _mask, \ + .type = REGULATOR_CURRENT, \ + .owner = THIS_MODULE, \ + } + +#define MAX8998_OTHERS_REG(_name, _id) \ + { \ + .name = #_name, \ + .id = _id, \ + .ops = &max8998_others_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc regulators[] = { + MAX8998_LINEAR_REG(LDO2, &max8998_ldo_ops, 800000, 50000, 1300000), + MAX8998_LINEAR_REG(LDO3, &max8998_ldo_ops, 800000, 50000, 1300000), + MAX8998_LINEAR_REG(LDO4, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO5, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO6, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO7, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO8, &max8998_ldo_ops, 3000000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO9, &max8998_ldo_ops, 2800000, 100000, 3100000), + MAX8998_LINEAR_REG(LDO10, &max8998_ldo_ops, 950000, 50000, 1300000), + MAX8998_LINEAR_REG(LDO11, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO12, &max8998_ldo_ops, 800000, 100000, 3300000), + MAX8998_LINEAR_REG(LDO13, &max8998_ldo_ops, 800000, 100000, 3300000), + MAX8998_LINEAR_REG(LDO14, &max8998_ldo_ops, 1200000, 100000, 3300000), + MAX8998_LINEAR_REG(LDO15, &max8998_ldo_ops, 1200000, 100000, 3300000), + MAX8998_LINEAR_REG(LDO16, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(LDO17, &max8998_ldo_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(BUCK1, &max8998_buck_ops, 750000, 25000, 1525000), + MAX8998_LINEAR_REG(BUCK2, &max8998_buck_ops, 750000, 25000, 1525000), + MAX8998_LINEAR_REG(BUCK3, &max8998_buck_ops, 1600000, 100000, 3600000), + MAX8998_LINEAR_REG(BUCK4, &max8998_buck_ops, 800000, 100000, 2300000), + MAX8998_OTHERS_REG(EN32KHz-AP, MAX8998_EN32KHZ_AP), + MAX8998_OTHERS_REG(EN32KHz-CP, MAX8998_EN32KHZ_CP), + MAX8998_OTHERS_REG(ENVICHG, MAX8998_ENVICHG), + MAX8998_OTHERS_REG(ESAFEOUT1, MAX8998_ESAFEOUT1), + MAX8998_OTHERS_REG(ESAFEOUT2, MAX8998_ESAFEOUT2), + MAX8998_CURRENT_REG(CHARGER, &max8998_charger_ops, + charger_current_table, MAX8998_REG_CHGR1, 0x7), +}; + +static int max8998_pmic_dt_parse_pdata(struct max8998_dev *iodev, + struct max8998_platform_data *pdata) +{ + struct device_node *pmic_np = iodev->dev->of_node; + struct device_node *regulators_np, *reg_np; + struct max8998_regulator_data *rdata; + unsigned int i; + int ret; + + regulators_np = of_get_child_by_name(pmic_np, "regulators"); + if (!regulators_np) { + dev_err(iodev->dev, "could not find regulators sub-node\n"); + return -EINVAL; + } + + /* count the number of regulators to be supported in pmic */ + pdata->num_regulators = of_get_child_count(regulators_np); + + rdata = devm_kcalloc(iodev->dev, + pdata->num_regulators, sizeof(*rdata), + GFP_KERNEL); + if (!rdata) { + of_node_put(regulators_np); + return -ENOMEM; + } + + pdata->regulators = rdata; + for (i = 0; i < ARRAY_SIZE(regulators); ++i) { + reg_np = of_get_child_by_name(regulators_np, + regulators[i].name); + if (!reg_np) + continue; + + rdata->id = regulators[i].id; + rdata->initdata = of_get_regulator_init_data(iodev->dev, + reg_np, + ®ulators[i]); + rdata->reg_node = reg_np; + ++rdata; + } + pdata->num_regulators = rdata - pdata->regulators; + + of_node_put(regulators_np); + + pdata->buck_voltage_lock = of_property_read_bool(pmic_np, "max8998,pmic-buck-voltage-lock"); + + ret = of_property_read_u32(pmic_np, + "max8998,pmic-buck1-default-dvs-idx", + &pdata->buck1_default_idx); + if (!ret && pdata->buck1_default_idx >= 4) { + pdata->buck1_default_idx = 0; + dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n"); + } + + ret = of_property_read_u32(pmic_np, + "max8998,pmic-buck2-default-dvs-idx", + &pdata->buck2_default_idx); + if (!ret && pdata->buck2_default_idx >= 2) { + pdata->buck2_default_idx = 0; + dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n"); + } + + ret = of_property_read_u32_array(pmic_np, + "max8998,pmic-buck1-dvs-voltage", + pdata->buck1_voltage, + ARRAY_SIZE(pdata->buck1_voltage)); + if (ret) { + dev_err(iodev->dev, "buck1 voltages not specified\n"); + return -EINVAL; + } + + ret = of_property_read_u32_array(pmic_np, + "max8998,pmic-buck2-dvs-voltage", + pdata->buck2_voltage, + ARRAY_SIZE(pdata->buck2_voltage)); + if (ret) { + dev_err(iodev->dev, "buck2 voltages not specified\n"); + return -EINVAL; + } + + return 0; +} + +static int max8998_pmic_probe(struct platform_device *pdev) +{ + struct max8998_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct max8998_platform_data *pdata = iodev->pdata; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct max8998_data *max8998; + struct i2c_client *i2c; + enum gpiod_flags flags; + int i, ret; + unsigned int v; + + if (!pdata) { + dev_err(pdev->dev.parent, "No platform init data supplied\n"); + return -ENODEV; + } + + if (IS_ENABLED(CONFIG_OF) && iodev->dev->of_node) { + ret = max8998_pmic_dt_parse_pdata(iodev, pdata); + if (ret) + return ret; + } + + max8998 = devm_kzalloc(&pdev->dev, sizeof(struct max8998_data), + GFP_KERNEL); + if (!max8998) + return -ENOMEM; + + max8998->dev = &pdev->dev; + max8998->iodev = iodev; + max8998->num_regulators = pdata->num_regulators; + platform_set_drvdata(pdev, max8998); + i2c = max8998->iodev->i2c; + + max8998->buck1_idx = pdata->buck1_default_idx; + max8998->buck2_idx = pdata->buck2_default_idx; + + /* Check if MAX8998 voltage selection GPIOs are defined */ + flags = (max8998->buck1_idx & BIT(0)) ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + max8998->buck1_gpio1 = devm_gpiod_get_index_optional(iodev->dev, + "max8998,pmic-buck1-dvs", + 0, + flags); + if (IS_ERR(max8998->buck1_gpio1)) + return dev_err_probe(&pdev->dev, PTR_ERR(max8998->buck1_gpio1), + "could not get BUCK1 GPIO1\n"); + gpiod_set_consumer_name(max8998->buck1_gpio1, "MAX8998 BUCK1_SET1"); + + flags = (max8998->buck1_idx & BIT(1)) ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + max8998->buck1_gpio2 = devm_gpiod_get_index_optional(iodev->dev, + "max8998,pmic-buck1-dvs", + 1, + flags); + if (IS_ERR(max8998->buck1_gpio2)) + return dev_err_probe(&pdev->dev, PTR_ERR(max8998->buck1_gpio2), + "could not get BUCK1 GPIO2\n"); + gpiod_set_consumer_name(max8998->buck1_gpio1, "MAX8998 BUCK1_SET2"); + + flags = (max8998->buck2_idx & BIT(0)) ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + max8998->buck2_gpio = devm_gpiod_get_index_optional(iodev->dev, + "max8998,pmic-buck2-dvs", + 0, + flags); + if (IS_ERR(max8998->buck2_gpio)) + return dev_err_probe(&pdev->dev, PTR_ERR(max8998->buck2_gpio), + "could not get BUCK2 GPIO\n"); + gpiod_set_consumer_name(max8998->buck1_gpio1, "MAX8998 BUCK2_SET3"); + + if (max8998->buck1_gpio1 && max8998->buck1_gpio2) { + /* Set predefined values for BUCK1 registers */ + for (v = 0; v < ARRAY_SIZE(pdata->buck1_voltage); ++v) { + int index = MAX8998_BUCK1 - MAX8998_LDO2; + + i = 0; + while (regulators[index].min_uV + + regulators[index].uV_step * i + < pdata->buck1_voltage[v]) + i++; + + max8998->buck1_vol[v] = i; + ret = max8998_write_reg(i2c, + MAX8998_REG_BUCK1_VOLTAGE1 + v, i); + if (ret) + return ret; + } + } + + if (max8998->buck2_gpio) { + /* Set predefined values for BUCK2 registers */ + for (v = 0; v < ARRAY_SIZE(pdata->buck2_voltage); ++v) { + int index = MAX8998_BUCK2 - MAX8998_LDO2; + + i = 0; + while (regulators[index].min_uV + + regulators[index].uV_step * i + < pdata->buck2_voltage[v]) + i++; + + max8998->buck2_vol[v] = i; + ret = max8998_write_reg(i2c, + MAX8998_REG_BUCK2_VOLTAGE1 + v, i); + if (ret) + return ret; + } + } + + for (i = 0; i < pdata->num_regulators; i++) { + int index = pdata->regulators[i].id - MAX8998_LDO2; + + config.dev = max8998->dev; + config.of_node = pdata->regulators[i].reg_node; + config.init_data = pdata->regulators[i].initdata; + config.driver_data = max8998; + + rdev = devm_regulator_register(&pdev->dev, ®ulators[index], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(max8998->dev, "regulator %s init failed (%d)\n", + regulators[index].name, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id max8998_pmic_id[] = { + { .name = "max8998-pmic", .driver_data = TYPE_MAX8998 }, + { .name = "lp3974-pmic", .driver_data = TYPE_LP3974 }, + { } +}; +MODULE_DEVICE_TABLE(platform, max8998_pmic_id); + +static struct platform_driver max8998_pmic_driver = { + .driver = { + .name = "max8998-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = max8998_pmic_probe, + .id_table = max8998_pmic_id, +}; + +static int __init max8998_pmic_init(void) +{ + return platform_driver_register(&max8998_pmic_driver); +} +subsys_initcall(max8998_pmic_init); + +static void __exit max8998_pmic_cleanup(void) +{ + platform_driver_unregister(&max8998_pmic_driver); +} +module_exit(max8998_pmic_cleanup); + +MODULE_DESCRIPTION("MAXIM 8998 voltage regulator driver"); +MODULE_AUTHOR("Kyungmin Park "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c new file mode 100644 index 000000000..fb3aa1cec --- /dev/null +++ b/drivers/regulator/mc13783-regulator.c @@ -0,0 +1,478 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator Driver for Freescale MC13783 PMIC +// +// Copyright 2010 Yong Shen +// Copyright (C) 2008 Sascha Hauer, Pengutronix +// Copyright 2009 Alberto Panizzo + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mc13xxx.h" + +#define MC13783_REG_SWITCHERS0 24 +/* Enable does not exist for SW1A */ +#define MC13783_REG_SWITCHERS0_SW1AEN 0 +#define MC13783_REG_SWITCHERS0_SW1AVSEL 0 +#define MC13783_REG_SWITCHERS0_SW1AVSEL_M (63 << 0) + +#define MC13783_REG_SWITCHERS1 25 +/* Enable does not exist for SW1B */ +#define MC13783_REG_SWITCHERS1_SW1BEN 0 +#define MC13783_REG_SWITCHERS1_SW1BVSEL 0 +#define MC13783_REG_SWITCHERS1_SW1BVSEL_M (63 << 0) + +#define MC13783_REG_SWITCHERS2 26 +/* Enable does not exist for SW2A */ +#define MC13783_REG_SWITCHERS2_SW2AEN 0 +#define MC13783_REG_SWITCHERS2_SW2AVSEL 0 +#define MC13783_REG_SWITCHERS2_SW2AVSEL_M (63 << 0) + +#define MC13783_REG_SWITCHERS3 27 +/* Enable does not exist for SW2B */ +#define MC13783_REG_SWITCHERS3_SW2BEN 0 +#define MC13783_REG_SWITCHERS3_SW2BVSEL 0 +#define MC13783_REG_SWITCHERS3_SW2BVSEL_M (63 << 0) + +#define MC13783_REG_SWITCHERS5 29 +#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20) +#define MC13783_REG_SWITCHERS5_SW3VSEL 18 +#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18) + +#define MC13783_REG_REGULATORSETTING0 30 +#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2 +#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4 +#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6 +#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9 +#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11 +#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13 +#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14 +#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15 +#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16 + +#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2) +#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4) +#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6) +#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9) +#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11) +#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13) +#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14) +#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15) +#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16) + +#define MC13783_REG_REGULATORSETTING1 31 +#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0 +#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2 +#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4 +#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6 +#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9 + +#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0) +#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2) +#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4) +#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6) +#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9) + +#define MC13783_REG_REGULATORMODE0 32 +#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0) +#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3) +#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6) +#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9) +#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12) +#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15) +#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18) +#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21) + +#define MC13783_REG_REGULATORMODE1 33 +#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0) +#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3) +#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6) +#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9) +#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11) +#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12) +#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15) +#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18) +#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21) + +#define MC13783_REG_POWERMISC 34 +#define MC13783_REG_POWERMISC_GPO1EN (1 << 6) +#define MC13783_REG_POWERMISC_GPO2EN (1 << 8) +#define MC13783_REG_POWERMISC_GPO3EN (1 << 10) +#define MC13783_REG_POWERMISC_GPO4EN (1 << 12) +#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15) +#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16) + +#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15) + + +/* Voltage Values */ +static const int mc13783_sw1x_val[] = { + 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, + 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, + 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, + 1500000, 1525000, 1550000, 1575000, + 1600000, 1625000, 1650000, 1675000, + 1700000, 1700000, 1700000, 1700000, + 1800000, 1800000, 1800000, 1800000, + 1850000, 1850000, 1850000, 1850000, + 2000000, 2000000, 2000000, 2000000, + 2100000, 2100000, 2100000, 2100000, + 2200000, 2200000, 2200000, 2200000, + 2200000, 2200000, 2200000, 2200000, + 2200000, 2200000, 2200000, 2200000, +}; + +static const int mc13783_sw2x_val[] = { + 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, + 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, + 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, + 1500000, 1525000, 1550000, 1575000, + 1600000, 1625000, 1650000, 1675000, + 1700000, 1700000, 1700000, 1700000, + 1800000, 1800000, 1800000, 1800000, + 1900000, 1900000, 1900000, 1900000, + 2000000, 2000000, 2000000, 2000000, + 2100000, 2100000, 2100000, 2100000, + 2200000, 2200000, 2200000, 2200000, + 2200000, 2200000, 2200000, 2200000, + 2200000, 2200000, 2200000, 2200000, +}; + +static const unsigned int mc13783_sw3_val[] = { + 5000000, 5000000, 5000000, 5500000, +}; + +static const unsigned int mc13783_vaudio_val[] = { + 2775000, +}; + +static const unsigned int mc13783_viohi_val[] = { + 2775000, +}; + +static const unsigned int mc13783_violo_val[] = { + 1200000, 1300000, 1500000, 1800000, +}; + +static const unsigned int mc13783_vdig_val[] = { + 1200000, 1300000, 1500000, 1800000, +}; + +static const unsigned int mc13783_vgen_val[] = { + 1200000, 1300000, 1500000, 1800000, + 1100000, 2000000, 2775000, 2400000, +}; + +static const unsigned int mc13783_vrfdig_val[] = { + 1200000, 1500000, 1800000, 1875000, +}; + +static const unsigned int mc13783_vrfref_val[] = { + 2475000, 2600000, 2700000, 2775000, +}; + +static const unsigned int mc13783_vrfcp_val[] = { + 2700000, 2775000, +}; + +static const unsigned int mc13783_vsim_val[] = { + 1800000, 2900000, 3000000, +}; + +static const unsigned int mc13783_vesim_val[] = { + 1800000, 2900000, +}; + +static const unsigned int mc13783_vcam_val[] = { + 1500000, 1800000, 2500000, 2550000, + 2600000, 2750000, 2800000, 3000000, +}; + +static const unsigned int mc13783_vrfbg_val[] = { + 1250000, +}; + +static const unsigned int mc13783_vvib_val[] = { + 1300000, 1800000, 2000000, 3000000, +}; + +static const unsigned int mc13783_vmmc_val[] = { + 1600000, 1800000, 2000000, 2600000, + 2700000, 2800000, 2900000, 3000000, +}; + +static const unsigned int mc13783_vrf_val[] = { + 1500000, 1875000, 2700000, 2775000, +}; + +static const unsigned int mc13783_gpo_val[] = { + 3100000, +}; + +static const unsigned int mc13783_pwgtdrv_val[] = { + 5500000, +}; + +static const struct regulator_ops mc13783_gpo_regulator_ops; + +#define MC13783_DEFINE(prefix, name, node, reg, vsel_reg, voltages) \ + MC13xxx_DEFINE(MC13783_REG_, name, node, reg, vsel_reg, voltages, \ + mc13xxx_regulator_ops) + +#define MC13783_FIXED_DEFINE(prefix, name, node, reg, voltages) \ + MC13xxx_FIXED_DEFINE(MC13783_REG_, name, node, reg, voltages, \ + mc13xxx_fixed_regulator_ops) + +#define MC13783_GPO_DEFINE(prefix, name, node, reg, voltages) \ + MC13xxx_GPO_DEFINE(MC13783_REG_, name, node, reg, voltages, \ + mc13783_gpo_regulator_ops) + +#define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \ + MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages) +#define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \ + MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages) + +static struct mc13xxx_regulator mc13783_regulators[] = { + MC13783_DEFINE_SW(SW1A, sw1a, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val), + MC13783_DEFINE_SW(SW1B, sw1b, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val), + MC13783_DEFINE_SW(SW2A, sw2a, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val), + MC13783_DEFINE_SW(SW2B, sw2b, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val), + MC13783_DEFINE_SW(SW3, sw3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), + + MC13783_FIXED_DEFINE(REG, VAUDIO, vaudio, REGULATORMODE0, mc13783_vaudio_val), + MC13783_FIXED_DEFINE(REG, VIOHI, viohi, REGULATORMODE0, mc13783_viohi_val), + MC13783_DEFINE_REGU(VIOLO, violo, REGULATORMODE0, REGULATORSETTING0, + mc13783_violo_val), + MC13783_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0, + mc13783_vdig_val), + MC13783_DEFINE_REGU(VGEN, vgen, REGULATORMODE0, REGULATORSETTING0, + mc13783_vgen_val), + MC13783_DEFINE_REGU(VRFDIG, vrfdig, REGULATORMODE0, REGULATORSETTING0, + mc13783_vrfdig_val), + MC13783_DEFINE_REGU(VRFREF, vrfref, REGULATORMODE0, REGULATORSETTING0, + mc13783_vrfref_val), + MC13783_DEFINE_REGU(VRFCP, vrfcp, REGULATORMODE0, REGULATORSETTING0, + mc13783_vrfcp_val), + MC13783_DEFINE_REGU(VSIM, vsim, REGULATORMODE1, REGULATORSETTING0, + mc13783_vsim_val), + MC13783_DEFINE_REGU(VESIM, vesim, REGULATORMODE1, REGULATORSETTING0, + mc13783_vesim_val), + MC13783_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0, + mc13783_vcam_val), + MC13783_FIXED_DEFINE(REG, VRFBG, vrfbg, REGULATORMODE1, mc13783_vrfbg_val), + MC13783_DEFINE_REGU(VVIB, vvib, REGULATORMODE1, REGULATORSETTING1, + mc13783_vvib_val), + MC13783_DEFINE_REGU(VRF1, vrf1, REGULATORMODE1, REGULATORSETTING1, + mc13783_vrf_val), + MC13783_DEFINE_REGU(VRF2, vrf2, REGULATORMODE1, REGULATORSETTING1, + mc13783_vrf_val), + MC13783_DEFINE_REGU(VMMC1, vmmc1, REGULATORMODE1, REGULATORSETTING1, + mc13783_vmmc_val), + MC13783_DEFINE_REGU(VMMC2, vmmc2, REGULATORMODE1, REGULATORSETTING1, + mc13783_vmmc_val), + MC13783_GPO_DEFINE(REG, GPO1, gpo1, POWERMISC, mc13783_gpo_val), + MC13783_GPO_DEFINE(REG, GPO2, gpo1, POWERMISC, mc13783_gpo_val), + MC13783_GPO_DEFINE(REG, GPO3, gpo1, POWERMISC, mc13783_gpo_val), + MC13783_GPO_DEFINE(REG, GPO4, gpo1, POWERMISC, mc13783_gpo_val), + MC13783_GPO_DEFINE(REG, PWGT1SPI, pwgt1spi, POWERMISC, mc13783_pwgtdrv_val), + MC13783_GPO_DEFINE(REG, PWGT2SPI, pwgt2spi, POWERMISC, mc13783_pwgtdrv_val), +}; + +static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask, + u32 val) +{ + struct mc13xxx *mc13783 = priv->mc13xxx; + int ret; + u32 valread; + + BUG_ON(val & ~mask); + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread); + if (ret) + goto out; + + /* Update the stored state for Power Gates. */ + priv->powermisc_pwgt_state = + (priv->powermisc_pwgt_state & ~mask) | val; + priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M; + + /* Construct the new register value */ + valread = (valread & ~mask) | val; + /* Overwrite the PWGTxEN with the stored version */ + valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) | + priv->powermisc_pwgt_state; + + ret = mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread); +out: + mc13xxx_unlock(priv->mc13xxx); + return ret; +} + +static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int id = rdev_get_id(rdev); + u32 en_val = mc13xxx_regulators[id].enable_bit; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + /* Power Gate enable value is 0 */ + if (id == MC13783_REG_PWGT1SPI || + id == MC13783_REG_PWGT2SPI) + en_val = 0; + + return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, + en_val); +} + +static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int id = rdev_get_id(rdev); + u32 dis_val = 0; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + /* Power Gate disable value is 1 */ + if (id == MC13783_REG_PWGT1SPI || + id == MC13783_REG_PWGT2SPI) + dis_val = mc13xxx_regulators[id].enable_bit; + + return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, + dis_val); +} + +static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int ret, id = rdev_get_id(rdev); + unsigned int val; + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val); + mc13xxx_unlock(priv->mc13xxx); + + if (ret) + return ret; + + /* Power Gates state is stored in powermisc_pwgt_state + * where the meaning of bits is negated */ + val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) | + (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M); + + return (val & mc13xxx_regulators[id].enable_bit) != 0; +} + +static const struct regulator_ops mc13783_gpo_regulator_ops = { + .enable = mc13783_gpo_regulator_enable, + .disable = mc13783_gpo_regulator_disable, + .is_enabled = mc13783_gpo_regulator_is_enabled, + .list_voltage = regulator_list_voltage_table, + .set_voltage = mc13xxx_fixed_regulator_set_voltage, +}; + +static int mc13783_regulator_probe(struct platform_device *pdev) +{ + struct mc13xxx_regulator_priv *priv; + struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent); + struct mc13xxx_regulator_platform_data *pdata = + dev_get_platdata(&pdev->dev); + struct mc13xxx_regulator_init_data *mc13xxx_data; + struct regulator_config config = { }; + int i, num_regulators; + + num_regulators = mc13xxx_get_num_regulators_dt(pdev); + + if (num_regulators <= 0 && pdata) + num_regulators = pdata->num_regulators; + if (num_regulators <= 0) + return -EINVAL; + + priv = devm_kzalloc(&pdev->dev, + struct_size(priv, regulators, num_regulators), + GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->num_regulators = num_regulators; + priv->mc13xxx_regulators = mc13783_regulators; + priv->mc13xxx = mc13783; + platform_set_drvdata(pdev, priv); + + mc13xxx_data = mc13xxx_parse_regulators_dt(pdev, mc13783_regulators, + ARRAY_SIZE(mc13783_regulators)); + + for (i = 0; i < priv->num_regulators; i++) { + struct regulator_init_data *init_data; + struct regulator_desc *desc; + struct device_node *node = NULL; + int id; + + if (mc13xxx_data) { + id = mc13xxx_data[i].id; + init_data = mc13xxx_data[i].init_data; + node = mc13xxx_data[i].node; + } else { + id = pdata->regulators[i].id; + init_data = pdata->regulators[i].init_data; + } + desc = &mc13783_regulators[id].desc; + + config.dev = &pdev->dev; + config.init_data = init_data; + config.driver_data = priv; + config.of_node = node; + + priv->regulators[i] = devm_regulator_register(&pdev->dev, desc, + &config); + if (IS_ERR(priv->regulators[i])) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + mc13783_regulators[i].desc.name); + return PTR_ERR(priv->regulators[i]); + } + } + + return 0; +} + +static struct platform_driver mc13783_regulator_driver = { + .driver = { + .name = "mc13783-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mc13783_regulator_probe, +}; + +static int __init mc13783_regulator_init(void) +{ + return platform_driver_register(&mc13783_regulator_driver); +} +subsys_initcall(mc13783_regulator_init); + +static void __exit mc13783_regulator_exit(void) +{ + platform_driver_unregister(&mc13783_regulator_driver); +} +module_exit(mc13783_regulator_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Sascha Hauer "); +MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); +MODULE_ALIAS("platform:mc13783-regulator"); diff --git a/drivers/regulator/mc13892-regulator.c b/drivers/regulator/mc13892-regulator.c new file mode 100644 index 000000000..b29cf6ba6 --- /dev/null +++ b/drivers/regulator/mc13892-regulator.c @@ -0,0 +1,652 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator Driver for Freescale MC13892 PMIC +// +// Copyright 2010 Yong Shen +// +// Based on draft driver from Arnaud Patard + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mc13xxx.h" + +#define MC13892_REVISION 7 + +#define MC13892_POWERCTL0 13 +#define MC13892_POWERCTL0_USEROFFSPI 3 +#define MC13892_POWERCTL0_VCOINCELLVSEL 20 +#define MC13892_POWERCTL0_VCOINCELLVSEL_M (7<<20) +#define MC13892_POWERCTL0_VCOINCELLEN (1<<23) + +#define MC13892_SWITCHERS0_SWxHI (1<<23) + +#define MC13892_SWITCHERS0 24 +#define MC13892_SWITCHERS0_SW1VSEL 0 +#define MC13892_SWITCHERS0_SW1VSEL_M (0x1f<<0) +#define MC13892_SWITCHERS0_SW1HI (1<<23) +#define MC13892_SWITCHERS0_SW1EN 0 + +#define MC13892_SWITCHERS1 25 +#define MC13892_SWITCHERS1_SW2VSEL 0 +#define MC13892_SWITCHERS1_SW2VSEL_M (0x1f<<0) +#define MC13892_SWITCHERS1_SW2HI (1<<23) +#define MC13892_SWITCHERS1_SW2EN 0 + +#define MC13892_SWITCHERS2 26 +#define MC13892_SWITCHERS2_SW3VSEL 0 +#define MC13892_SWITCHERS2_SW3VSEL_M (0x1f<<0) +#define MC13892_SWITCHERS2_SW3HI (1<<23) +#define MC13892_SWITCHERS2_SW3EN 0 + +#define MC13892_SWITCHERS3 27 +#define MC13892_SWITCHERS3_SW4VSEL 0 +#define MC13892_SWITCHERS3_SW4VSEL_M (0x1f<<0) +#define MC13892_SWITCHERS3_SW4HI (1<<23) +#define MC13892_SWITCHERS3_SW4EN 0 + +#define MC13892_SWITCHERS4 28 +#define MC13892_SWITCHERS4_SW1MODE 0 +#define MC13892_SWITCHERS4_SW1MODE_AUTO (8<<0) +#define MC13892_SWITCHERS4_SW1MODE_M (0xf<<0) +#define MC13892_SWITCHERS4_SW2MODE 10 +#define MC13892_SWITCHERS4_SW2MODE_AUTO (8<<10) +#define MC13892_SWITCHERS4_SW2MODE_M (0xf<<10) + +#define MC13892_SWITCHERS5 29 +#define MC13892_SWITCHERS5_SW3MODE 0 +#define MC13892_SWITCHERS5_SW3MODE_AUTO (8<<0) +#define MC13892_SWITCHERS5_SW3MODE_M (0xf<<0) +#define MC13892_SWITCHERS5_SW4MODE 8 +#define MC13892_SWITCHERS5_SW4MODE_AUTO (8<<8) +#define MC13892_SWITCHERS5_SW4MODE_M (0xf<<8) +#define MC13892_SWITCHERS5_SWBSTEN (1<<20) + +#define MC13892_REGULATORSETTING0 30 +#define MC13892_REGULATORSETTING0_VGEN1VSEL 0 +#define MC13892_REGULATORSETTING0_VDIGVSEL 4 +#define MC13892_REGULATORSETTING0_VGEN2VSEL 6 +#define MC13892_REGULATORSETTING0_VPLLVSEL 9 +#define MC13892_REGULATORSETTING0_VUSB2VSEL 11 +#define MC13892_REGULATORSETTING0_VGEN3VSEL 14 +#define MC13892_REGULATORSETTING0_VCAMVSEL 16 + +#define MC13892_REGULATORSETTING0_VGEN1VSEL_M (3<<0) +#define MC13892_REGULATORSETTING0_VDIGVSEL_M (3<<4) +#define MC13892_REGULATORSETTING0_VGEN2VSEL_M (7<<6) +#define MC13892_REGULATORSETTING0_VPLLVSEL_M (3<<9) +#define MC13892_REGULATORSETTING0_VUSB2VSEL_M (3<<11) +#define MC13892_REGULATORSETTING0_VGEN3VSEL_M (1<<14) +#define MC13892_REGULATORSETTING0_VCAMVSEL_M (3<<16) + +#define MC13892_REGULATORSETTING1 31 +#define MC13892_REGULATORSETTING1_VVIDEOVSEL 2 +#define MC13892_REGULATORSETTING1_VAUDIOVSEL 4 +#define MC13892_REGULATORSETTING1_VSDVSEL 6 + +#define MC13892_REGULATORSETTING1_VVIDEOVSEL_M (3<<2) +#define MC13892_REGULATORSETTING1_VAUDIOVSEL_M (3<<4) +#define MC13892_REGULATORSETTING1_VSDVSEL_M (7<<6) + +#define MC13892_REGULATORMODE0 32 +#define MC13892_REGULATORMODE0_VGEN1EN (1<<0) +#define MC13892_REGULATORMODE0_VGEN1STDBY (1<<1) +#define MC13892_REGULATORMODE0_VGEN1MODE (1<<2) +#define MC13892_REGULATORMODE0_VIOHIEN (1<<3) +#define MC13892_REGULATORMODE0_VIOHISTDBY (1<<4) +#define MC13892_REGULATORMODE0_VIOHIMODE (1<<5) +#define MC13892_REGULATORMODE0_VDIGEN (1<<9) +#define MC13892_REGULATORMODE0_VDIGSTDBY (1<<10) +#define MC13892_REGULATORMODE0_VDIGMODE (1<<11) +#define MC13892_REGULATORMODE0_VGEN2EN (1<<12) +#define MC13892_REGULATORMODE0_VGEN2STDBY (1<<13) +#define MC13892_REGULATORMODE0_VGEN2MODE (1<<14) +#define MC13892_REGULATORMODE0_VPLLEN (1<<15) +#define MC13892_REGULATORMODE0_VPLLSTDBY (1<<16) +#define MC13892_REGULATORMODE0_VPLLMODE (1<<17) +#define MC13892_REGULATORMODE0_VUSB2EN (1<<18) +#define MC13892_REGULATORMODE0_VUSB2STDBY (1<<19) +#define MC13892_REGULATORMODE0_VUSB2MODE (1<<20) + +#define MC13892_REGULATORMODE1 33 +#define MC13892_REGULATORMODE1_VGEN3EN (1<<0) +#define MC13892_REGULATORMODE1_VGEN3STDBY (1<<1) +#define MC13892_REGULATORMODE1_VGEN3MODE (1<<2) +#define MC13892_REGULATORMODE1_VCAMEN (1<<6) +#define MC13892_REGULATORMODE1_VCAMSTDBY (1<<7) +#define MC13892_REGULATORMODE1_VCAMMODE (1<<8) +#define MC13892_REGULATORMODE1_VCAMCONFIGEN (1<<9) +#define MC13892_REGULATORMODE1_VVIDEOEN (1<<12) +#define MC13892_REGULATORMODE1_VVIDEOSTDBY (1<<13) +#define MC13892_REGULATORMODE1_VVIDEOMODE (1<<14) +#define MC13892_REGULATORMODE1_VAUDIOEN (1<<15) +#define MC13892_REGULATORMODE1_VAUDIOSTDBY (1<<16) +#define MC13892_REGULATORMODE1_VAUDIOMODE (1<<17) +#define MC13892_REGULATORMODE1_VSDEN (1<<18) +#define MC13892_REGULATORMODE1_VSDSTDBY (1<<19) +#define MC13892_REGULATORMODE1_VSDMODE (1<<20) + +#define MC13892_POWERMISC 34 +#define MC13892_POWERMISC_GPO1EN (1<<6) +#define MC13892_POWERMISC_GPO2EN (1<<8) +#define MC13892_POWERMISC_GPO3EN (1<<10) +#define MC13892_POWERMISC_GPO4EN (1<<12) +#define MC13892_POWERMISC_PWGT1SPIEN (1<<15) +#define MC13892_POWERMISC_PWGT2SPIEN (1<<16) +#define MC13892_POWERMISC_GPO4ADINEN (1<<21) + +#define MC13892_POWERMISC_PWGTSPI_M (3 << 15) + +#define MC13892_USB1 50 +#define MC13892_USB1_VUSBEN (1<<3) + +static const unsigned int mc13892_vcoincell[] = { + 2500000, 2700000, 2800000, 2900000, 3000000, 3100000, + 3200000, 3300000, +}; + +static const unsigned int mc13892_sw1[] = { + 600000, 625000, 650000, 675000, 700000, 725000, + 750000, 775000, 800000, 825000, 850000, 875000, + 900000, 925000, 950000, 975000, 1000000, 1025000, + 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, + 1350000, 1375000 +}; + +/* + * Note: this table is used to derive SWxVSEL by index into + * the array. Offset the values by the index of 1100000uV + * to get the actual register value for that voltage selector + * if the HI bit is to be set as well. + */ +#define MC13892_SWxHI_SEL_OFFSET 20 + +static const unsigned int mc13892_sw[] = { + 600000, 625000, 650000, 675000, 700000, 725000, + 750000, 775000, 800000, 825000, 850000, 875000, + 900000, 925000, 950000, 975000, 1000000, 1025000, + 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, + 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, + 1500000, 1525000, 1550000, 1575000, 1600000, 1625000, + 1650000, 1675000, 1700000, 1725000, 1750000, 1775000, + 1800000, 1825000, 1850000, 1875000 +}; + +static const unsigned int mc13892_swbst[] = { + 5000000, +}; + +static const unsigned int mc13892_viohi[] = { + 2775000, +}; + +static const unsigned int mc13892_vpll[] = { + 1050000, 1250000, 1650000, 1800000, +}; + +static const unsigned int mc13892_vdig[] = { + 1050000, 1250000, 1650000, 1800000, +}; + +static const unsigned int mc13892_vsd[] = { + 1800000, 2000000, 2600000, 2700000, + 2800000, 2900000, 3000000, 3150000, +}; + +static const unsigned int mc13892_vusb2[] = { + 2400000, 2600000, 2700000, 2775000, +}; + +static const unsigned int mc13892_vvideo[] = { + 2700000, 2775000, 2500000, 2600000, +}; + +static const unsigned int mc13892_vaudio[] = { + 2300000, 2500000, 2775000, 3000000, +}; + +static const unsigned int mc13892_vcam[] = { + 2500000, 2600000, 2750000, 3000000, +}; + +static const unsigned int mc13892_vgen1[] = { + 1200000, 1500000, 2775000, 3150000, +}; + +static const unsigned int mc13892_vgen2[] = { + 1200000, 1500000, 1600000, 1800000, + 2700000, 2800000, 3000000, 3150000, +}; + +static const unsigned int mc13892_vgen3[] = { + 1800000, 2900000, +}; + +static const unsigned int mc13892_vusb[] = { + 3300000, +}; + +static const unsigned int mc13892_gpo[] = { + 2750000, +}; + +static const unsigned int mc13892_pwgtdrv[] = { + 5000000, +}; + +static const struct regulator_ops mc13892_gpo_regulator_ops; +static const struct regulator_ops mc13892_sw_regulator_ops; + + +#define MC13892_FIXED_DEFINE(name, node, reg, voltages) \ + MC13xxx_FIXED_DEFINE(MC13892_, name, node, reg, voltages, \ + mc13xxx_fixed_regulator_ops) + +#define MC13892_GPO_DEFINE(name, node, reg, voltages) \ + MC13xxx_GPO_DEFINE(MC13892_, name, node, reg, voltages, \ + mc13892_gpo_regulator_ops) + +#define MC13892_SW_DEFINE(name, node, reg, vsel_reg, voltages) \ + MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \ + mc13892_sw_regulator_ops) + +#define MC13892_DEFINE_REGU(name, node, reg, vsel_reg, voltages) \ + MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \ + mc13xxx_regulator_ops) + +static struct mc13xxx_regulator mc13892_regulators[] = { + MC13892_DEFINE_REGU(VCOINCELL, vcoincell, POWERCTL0, POWERCTL0, mc13892_vcoincell), + MC13892_SW_DEFINE(SW1, sw1, SWITCHERS0, SWITCHERS0, mc13892_sw1), + MC13892_SW_DEFINE(SW2, sw2, SWITCHERS1, SWITCHERS1, mc13892_sw), + MC13892_SW_DEFINE(SW3, sw3, SWITCHERS2, SWITCHERS2, mc13892_sw), + MC13892_SW_DEFINE(SW4, sw4, SWITCHERS3, SWITCHERS3, mc13892_sw), + MC13892_FIXED_DEFINE(SWBST, swbst, SWITCHERS5, mc13892_swbst), + MC13892_FIXED_DEFINE(VIOHI, viohi, REGULATORMODE0, mc13892_viohi), + MC13892_DEFINE_REGU(VPLL, vpll, REGULATORMODE0, REGULATORSETTING0, + mc13892_vpll), + MC13892_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0, + mc13892_vdig), + MC13892_DEFINE_REGU(VSD, vsd, REGULATORMODE1, REGULATORSETTING1, + mc13892_vsd), + MC13892_DEFINE_REGU(VUSB2, vusb2, REGULATORMODE0, REGULATORSETTING0, + mc13892_vusb2), + MC13892_DEFINE_REGU(VVIDEO, vvideo, REGULATORMODE1, REGULATORSETTING1, + mc13892_vvideo), + MC13892_DEFINE_REGU(VAUDIO, vaudio, REGULATORMODE1, REGULATORSETTING1, + mc13892_vaudio), + MC13892_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0, + mc13892_vcam), + MC13892_DEFINE_REGU(VGEN1, vgen1, REGULATORMODE0, REGULATORSETTING0, + mc13892_vgen1), + MC13892_DEFINE_REGU(VGEN2, vgen2, REGULATORMODE0, REGULATORSETTING0, + mc13892_vgen2), + MC13892_DEFINE_REGU(VGEN3, vgen3, REGULATORMODE1, REGULATORSETTING0, + mc13892_vgen3), + MC13892_FIXED_DEFINE(VUSB, vusb, USB1, mc13892_vusb), + MC13892_GPO_DEFINE(GPO1, gpo1, POWERMISC, mc13892_gpo), + MC13892_GPO_DEFINE(GPO2, gpo2, POWERMISC, mc13892_gpo), + MC13892_GPO_DEFINE(GPO3, gpo3, POWERMISC, mc13892_gpo), + MC13892_GPO_DEFINE(GPO4, gpo4, POWERMISC, mc13892_gpo), + MC13892_GPO_DEFINE(PWGT1SPI, pwgt1spi, POWERMISC, mc13892_pwgtdrv), + MC13892_GPO_DEFINE(PWGT2SPI, pwgt2spi, POWERMISC, mc13892_pwgtdrv), +}; + +static int mc13892_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask, + u32 val) +{ + struct mc13xxx *mc13892 = priv->mc13xxx; + int ret; + u32 valread; + + BUG_ON(val & ~mask); + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(mc13892, MC13892_POWERMISC, &valread); + if (ret) + goto out; + + /* Update the stored state for Power Gates. */ + priv->powermisc_pwgt_state = + (priv->powermisc_pwgt_state & ~mask) | val; + priv->powermisc_pwgt_state &= MC13892_POWERMISC_PWGTSPI_M; + + /* Construct the new register value */ + valread = (valread & ~mask) | val; + /* Overwrite the PWGTxEN with the stored version */ + valread = (valread & ~MC13892_POWERMISC_PWGTSPI_M) | + priv->powermisc_pwgt_state; + + ret = mc13xxx_reg_write(mc13892, MC13892_POWERMISC, valread); +out: + mc13xxx_unlock(priv->mc13xxx); + return ret; +} + +static int mc13892_gpo_regulator_enable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + u32 en_val = mc13892_regulators[id].enable_bit; + u32 mask = mc13892_regulators[id].enable_bit; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + /* Power Gate enable value is 0 */ + if (id == MC13892_PWGT1SPI || id == MC13892_PWGT2SPI) + en_val = 0; + + if (id == MC13892_GPO4) + mask |= MC13892_POWERMISC_GPO4ADINEN; + + return mc13892_powermisc_rmw(priv, mask, en_val); +} + +static int mc13892_gpo_regulator_disable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + u32 dis_val = 0; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + /* Power Gate disable value is 1 */ + if (id == MC13892_PWGT1SPI || id == MC13892_PWGT2SPI) + dis_val = mc13892_regulators[id].enable_bit; + + return mc13892_powermisc_rmw(priv, mc13892_regulators[id].enable_bit, + dis_val); +} + +static int mc13892_gpo_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + unsigned int val; + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(priv->mc13xxx, mc13892_regulators[id].reg, &val); + mc13xxx_unlock(priv->mc13xxx); + + if (ret) + return ret; + + /* Power Gates state is stored in powermisc_pwgt_state + * where the meaning of bits is negated */ + val = (val & ~MC13892_POWERMISC_PWGTSPI_M) | + (priv->powermisc_pwgt_state ^ MC13892_POWERMISC_PWGTSPI_M); + + return (val & mc13892_regulators[id].enable_bit) != 0; +} + + +static const struct regulator_ops mc13892_gpo_regulator_ops = { + .enable = mc13892_gpo_regulator_enable, + .disable = mc13892_gpo_regulator_disable, + .is_enabled = mc13892_gpo_regulator_is_enabled, + .list_voltage = regulator_list_voltage_table, + .set_voltage = mc13xxx_fixed_regulator_set_voltage, +}; + +static int mc13892_sw_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + unsigned int val, selector; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(priv->mc13xxx, + mc13892_regulators[id].vsel_reg, &val); + mc13xxx_unlock(priv->mc13xxx); + if (ret) + return ret; + + /* + * Figure out if the HI bit is set inside the switcher mode register + * since this means the selector value we return is at a different + * offset into the selector table. + * + * According to the MC13892 documentation note 59 (Table 47) the SW1 + * buck switcher does not support output range programming therefore + * the HI bit must always remain 0. So do not do anything strange if + * our register is MC13892_SWITCHERS0. + */ + + selector = val & mc13892_regulators[id].vsel_mask; + + if ((mc13892_regulators[id].vsel_reg != MC13892_SWITCHERS0) && + (val & MC13892_SWITCHERS0_SWxHI)) { + selector += MC13892_SWxHI_SEL_OFFSET; + } + + dev_dbg(rdev_get_dev(rdev), "%s id: %d val: 0x%08x selector: %d\n", + __func__, id, val, selector); + + return selector; +} + +static int mc13892_sw_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int volt, mask, id = rdev_get_id(rdev); + u32 reg_value; + int ret; + + volt = rdev->desc->volt_table[selector]; + mask = mc13892_regulators[id].vsel_mask; + reg_value = selector; + + /* + * Don't mess with the HI bit or support HI voltage offsets for SW1. + * + * Since the get_voltage_sel callback has given a fudged value for + * the selector offset, we need to back out that offset if HI is + * to be set so we write the correct value to the register. + * + * The HI bit addition and selector offset handling COULD be more + * complicated by shifting and masking off the voltage selector part + * of the register then logical OR it back in, but since the selector + * is at bits 4:0 there is very little point. This makes the whole + * thing more readable and we do far less work. + */ + + if (mc13892_regulators[id].vsel_reg != MC13892_SWITCHERS0) { + mask |= MC13892_SWITCHERS0_SWxHI; + + if (volt > 1375000) { + reg_value -= MC13892_SWxHI_SEL_OFFSET; + reg_value |= MC13892_SWITCHERS0_SWxHI; + } else { + reg_value &= ~MC13892_SWITCHERS0_SWxHI; + } + } + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13892_regulators[id].vsel_reg, + mask, reg_value); + mc13xxx_unlock(priv->mc13xxx); + + return ret; +} + +static const struct regulator_ops mc13892_sw_regulator_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = mc13892_sw_regulator_set_voltage_sel, + .get_voltage_sel = mc13892_sw_regulator_get_voltage_sel, +}; + +static int mc13892_vcam_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int en_val = 0; + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + + if (mode == REGULATOR_MODE_FAST) + en_val = MC13892_REGULATORMODE1_VCAMCONFIGEN; + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13892_regulators[id].reg, + MC13892_REGULATORMODE1_VCAMCONFIGEN, en_val); + mc13xxx_unlock(priv->mc13xxx); + + return ret; +} + +static unsigned int mc13892_vcam_get_mode(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + int ret, id = rdev_get_id(rdev); + unsigned int val; + + mc13xxx_lock(priv->mc13xxx); + ret = mc13xxx_reg_read(priv->mc13xxx, mc13892_regulators[id].reg, &val); + mc13xxx_unlock(priv->mc13xxx); + + if (ret) + return ret; + + if (val & MC13892_REGULATORMODE1_VCAMCONFIGEN) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static struct regulator_ops mc13892_vcam_ops; + +static int mc13892_regulator_probe(struct platform_device *pdev) +{ + struct mc13xxx_regulator_priv *priv; + struct mc13xxx *mc13892 = dev_get_drvdata(pdev->dev.parent); + struct mc13xxx_regulator_platform_data *pdata = + dev_get_platdata(&pdev->dev); + struct mc13xxx_regulator_init_data *mc13xxx_data; + struct regulator_config config = { }; + int i, ret; + int num_regulators = 0; + u32 val; + + num_regulators = mc13xxx_get_num_regulators_dt(pdev); + + if (num_regulators <= 0 && pdata) + num_regulators = pdata->num_regulators; + if (num_regulators <= 0) + return -EINVAL; + + priv = devm_kzalloc(&pdev->dev, + struct_size(priv, regulators, num_regulators), + GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->num_regulators = num_regulators; + priv->mc13xxx_regulators = mc13892_regulators; + priv->mc13xxx = mc13892; + platform_set_drvdata(pdev, priv); + + mc13xxx_lock(mc13892); + ret = mc13xxx_reg_read(mc13892, MC13892_REVISION, &val); + if (ret) + goto err_unlock; + + /* enable switch auto mode (on 2.0A silicon only) */ + if ((val & 0x0000FFFF) == 0x45d0) { + ret = mc13xxx_reg_rmw(mc13892, MC13892_SWITCHERS4, + MC13892_SWITCHERS4_SW1MODE_M | + MC13892_SWITCHERS4_SW2MODE_M, + MC13892_SWITCHERS4_SW1MODE_AUTO | + MC13892_SWITCHERS4_SW2MODE_AUTO); + if (ret) + goto err_unlock; + + ret = mc13xxx_reg_rmw(mc13892, MC13892_SWITCHERS5, + MC13892_SWITCHERS5_SW3MODE_M | + MC13892_SWITCHERS5_SW4MODE_M, + MC13892_SWITCHERS5_SW3MODE_AUTO | + MC13892_SWITCHERS5_SW4MODE_AUTO); + if (ret) + goto err_unlock; + } + mc13xxx_unlock(mc13892); + + /* update mc13892_vcam ops */ + memcpy(&mc13892_vcam_ops, mc13892_regulators[MC13892_VCAM].desc.ops, + sizeof(struct regulator_ops)); + mc13892_vcam_ops.set_mode = mc13892_vcam_set_mode; + mc13892_vcam_ops.get_mode = mc13892_vcam_get_mode; + mc13892_regulators[MC13892_VCAM].desc.ops = &mc13892_vcam_ops; + + mc13xxx_data = mc13xxx_parse_regulators_dt(pdev, mc13892_regulators, + ARRAY_SIZE(mc13892_regulators)); + + for (i = 0; i < priv->num_regulators; i++) { + struct regulator_init_data *init_data; + struct regulator_desc *desc; + struct device_node *node = NULL; + int id; + + if (mc13xxx_data) { + id = mc13xxx_data[i].id; + init_data = mc13xxx_data[i].init_data; + node = mc13xxx_data[i].node; + } else { + id = pdata->regulators[i].id; + init_data = pdata->regulators[i].init_data; + } + desc = &mc13892_regulators[id].desc; + + config.dev = &pdev->dev; + config.init_data = init_data; + config.driver_data = priv; + config.of_node = node; + + priv->regulators[i] = devm_regulator_register(&pdev->dev, desc, + &config); + if (IS_ERR(priv->regulators[i])) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + mc13892_regulators[i].desc.name); + return PTR_ERR(priv->regulators[i]); + } + } + + return 0; + +err_unlock: + mc13xxx_unlock(mc13892); + return ret; +} + +static struct platform_driver mc13892_regulator_driver = { + .driver = { + .name = "mc13892-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mc13892_regulator_probe, +}; + +static int __init mc13892_regulator_init(void) +{ + return platform_driver_register(&mc13892_regulator_driver); +} +subsys_initcall(mc13892_regulator_init); + +static void __exit mc13892_regulator_exit(void) +{ + platform_driver_unregister(&mc13892_regulator_driver); +} +module_exit(mc13892_regulator_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Yong Shen "); +MODULE_DESCRIPTION("Regulator Driver for Freescale MC13892 PMIC"); +MODULE_ALIAS("platform:mc13892-regulator"); diff --git a/drivers/regulator/mc13xxx-regulator-core.c b/drivers/regulator/mc13xxx-regulator-core.c new file mode 100644 index 000000000..8ff19150c --- /dev/null +++ b/drivers/regulator/mc13xxx-regulator-core.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator Driver for Freescale MC13xxx PMIC +// +// Copyright 2010 Yong Shen +// +// Based on mc13783 regulator driver : +// Copyright (C) 2008 Sascha Hauer, Pengutronix +// Copyright 2009 Alberto Panizzo +// +// Regs infos taken from mc13xxx drivers from freescale and mc13xxx.pdf file +// from freescale + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mc13xxx.h" + +static int mc13xxx_regulator_enable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int id = rdev_get_id(rdev); + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, + mc13xxx_regulators[id].enable_bit, + mc13xxx_regulators[id].enable_bit); +} + +static int mc13xxx_regulator_disable(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int id = rdev_get_id(rdev); + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, + mc13xxx_regulators[id].enable_bit, 0); +} + +static int mc13xxx_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int ret, id = rdev_get_id(rdev); + unsigned int val; + + ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val); + if (ret) + return ret; + + return (val & mc13xxx_regulators[id].enable_bit) != 0; +} + +static int mc13xxx_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int id = rdev_get_id(rdev); + + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].vsel_reg, + mc13xxx_regulators[id].vsel_mask, + selector << mc13xxx_regulators[id].vsel_shift); +} + +static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev) +{ + struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); + struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; + int ret, id = rdev_get_id(rdev); + unsigned int val; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); + + ret = mc13xxx_reg_read(priv->mc13xxx, + mc13xxx_regulators[id].vsel_reg, &val); + if (ret) + return ret; + + val = (val & mc13xxx_regulators[id].vsel_mask) + >> mc13xxx_regulators[id].vsel_shift; + + dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val); + + BUG_ON(val >= mc13xxx_regulators[id].desc.n_voltages); + + return rdev->desc->volt_table[val]; +} + +const struct regulator_ops mc13xxx_regulator_ops = { + .enable = mc13xxx_regulator_enable, + .disable = mc13xxx_regulator_disable, + .is_enabled = mc13xxx_regulator_is_enabled, + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = mc13xxx_regulator_set_voltage_sel, + .get_voltage = mc13xxx_regulator_get_voltage, +}; +EXPORT_SYMBOL_GPL(mc13xxx_regulator_ops); + +int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev, int min_uV, + int max_uV, unsigned *selector) +{ + int id = rdev_get_id(rdev); + + dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n", + __func__, id, min_uV, max_uV); + + if (min_uV <= rdev->desc->volt_table[0] && + rdev->desc->volt_table[0] <= max_uV) { + *selector = 0; + return 0; + } else { + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(mc13xxx_fixed_regulator_set_voltage); + +const struct regulator_ops mc13xxx_fixed_regulator_ops = { + .enable = mc13xxx_regulator_enable, + .disable = mc13xxx_regulator_disable, + .is_enabled = mc13xxx_regulator_is_enabled, + .list_voltage = regulator_list_voltage_table, + .set_voltage = mc13xxx_fixed_regulator_set_voltage, +}; +EXPORT_SYMBOL_GPL(mc13xxx_fixed_regulator_ops); + +#ifdef CONFIG_OF +int mc13xxx_get_num_regulators_dt(struct platform_device *pdev) +{ + struct device_node *parent; + int num; + + if (!pdev->dev.parent->of_node) + return -ENODEV; + + parent = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); + if (!parent) + return -ENODEV; + + num = of_get_child_count(parent); + of_node_put(parent); + return num; +} +EXPORT_SYMBOL_GPL(mc13xxx_get_num_regulators_dt); + +struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt( + struct platform_device *pdev, struct mc13xxx_regulator *regulators, + int num_regulators) +{ + struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev); + struct mc13xxx_regulator_init_data *data, *p; + struct device_node *parent, *child; + int i, parsed = 0; + + if (!pdev->dev.parent->of_node) + return NULL; + + parent = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); + if (!parent) + return NULL; + + data = devm_kcalloc(&pdev->dev, priv->num_regulators, sizeof(*data), + GFP_KERNEL); + if (!data) { + of_node_put(parent); + return NULL; + } + + p = data; + + for_each_child_of_node(parent, child) { + int found = 0; + + for (i = 0; i < num_regulators; i++) { + if (!regulators[i].desc.name) + continue; + if (of_node_name_eq(child, + regulators[i].desc.name)) { + p->id = i; + p->init_data = of_get_regulator_init_data( + &pdev->dev, child, + ®ulators[i].desc); + p->node = child; + p++; + + parsed++; + found = 1; + break; + } + } + + if (!found) + dev_warn(&pdev->dev, + "Unknown regulator: %pOFn\n", child); + } + of_node_put(parent); + + priv->num_regulators = parsed; + + return data; +} +EXPORT_SYMBOL_GPL(mc13xxx_parse_regulators_dt); +#endif + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Yong Shen "); +MODULE_DESCRIPTION("Regulator Driver for Freescale MC13xxx PMIC"); +MODULE_ALIAS("mc13xxx-regulator-core"); diff --git a/drivers/regulator/mc13xxx.h b/drivers/regulator/mc13xxx.h new file mode 100644 index 000000000..057aaef6f --- /dev/null +++ b/drivers/regulator/mc13xxx.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * mc13xxx.h - regulators for the Freescale mc13xxx PMIC + * + * Copyright (C) 2010 Yong Shen + */ + +#ifndef __LINUX_REGULATOR_MC13XXX_H +#define __LINUX_REGULATOR_MC13XXX_H + +#include + +struct mc13xxx_regulator { + struct regulator_desc desc; + int reg; + int enable_bit; + int vsel_reg; + int vsel_shift; + int vsel_mask; +}; + +struct mc13xxx_regulator_priv { + struct mc13xxx *mc13xxx; + u32 powermisc_pwgt_state; + struct mc13xxx_regulator *mc13xxx_regulators; + int num_regulators; + struct regulator_dev *regulators[] __counted_by(num_regulators); +}; + +extern int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV, unsigned *selector); + +#ifdef CONFIG_OF +extern int mc13xxx_get_num_regulators_dt(struct platform_device *pdev); +extern struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt( + struct platform_device *pdev, struct mc13xxx_regulator *regulators, + int num_regulators); +#else +static inline int mc13xxx_get_num_regulators_dt(struct platform_device *pdev) +{ + return -ENODEV; +} + +static inline struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt( + struct platform_device *pdev, struct mc13xxx_regulator *regulators, + int num_regulators) +{ + return NULL; +} +#endif + +extern const struct regulator_ops mc13xxx_regulator_ops; +extern const struct regulator_ops mc13xxx_fixed_regulator_ops; + +#define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ + [prefix ## _name] = { \ + .desc = { \ + .name = #_node, \ + .n_voltages = ARRAY_SIZE(_voltages), \ + .volt_table = _voltages, \ + .ops = &_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = prefix ## _name, \ + .owner = THIS_MODULE, \ + }, \ + .reg = prefix ## _reg, \ + .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ + .vsel_reg = prefix ## _vsel_reg, \ + .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\ + .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\ + } + +#define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ + [prefix ## _name] = { \ + .desc = { \ + .name = #_node, \ + .n_voltages = ARRAY_SIZE(_voltages), \ + .volt_table = _voltages, \ + .ops = &_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = prefix ## _name, \ + .owner = THIS_MODULE, \ + }, \ + .reg = prefix ## _reg, \ + .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ + } + +#define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ + [prefix ## _name] = { \ + .desc = { \ + .name = #_node, \ + .n_voltages = ARRAY_SIZE(_voltages), \ + .volt_table = _voltages, \ + .ops = &_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = prefix ## _name, \ + .owner = THIS_MODULE, \ + }, \ + .reg = prefix ## _reg, \ + .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ + } + +#define MC13xxx_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages, ops) \ + MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops) +#define MC13xxx_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages, ops) \ + MC13xxx_DEFINE(REGU, _name, _node, _reg, _vsel_reg, _voltages, ops) + +#endif diff --git a/drivers/regulator/mcp16502.c b/drivers/regulator/mcp16502.c new file mode 100644 index 000000000..07c67ad1a --- /dev/null +++ b/drivers/regulator/mcp16502.c @@ -0,0 +1,596 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// MCP16502 PMIC driver +// +// Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries +// +// Author: Andrei Stefanescu +// +// Inspired from tps65086-regulator.c + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define VDD_LOW_SEL 0x0D +#define VDD_HIGH_SEL 0x3F + +#define MCP16502_FLT BIT(7) +#define MCP16502_DVSR GENMASK(3, 2) +#define MCP16502_ENS BIT(0) + +/* + * The PMIC has four sets of registers corresponding to four power modes: + * Performance, Active, Low-power, Hibernate. + * + * Registers: + * Each regulator has a register for each power mode. To access a register + * for a specific regulator and mode BASE_* and OFFSET_* need to be added. + * + * Operating modes: + * In order for the PMIC to transition to operating modes it has to be + * controlled via GPIO lines called LPM and HPM. + * + * The registers are fully configurable such that you can put all regulators in + * a low-power state while the PMIC is in Active mode. They are supposed to be + * configured at startup and then simply transition to/from a global low-power + * state by setting the GPIO lpm pin high/low. + * + * This driver keeps the PMIC in Active mode, Low-power state is set for the + * regulators by enabling/disabling operating mode (FPWM or Auto PFM). + * + * The PMIC's Low-power and Hibernate modes are used during standby/suspend. + * To enter standby/suspend the PMIC will go to Low-power mode. From there, it + * will transition to Hibernate when the PWRHLD line is set to low by the MPU. + */ + +/* + * This function is useful for iterating over all regulators and accessing their + * registers in a generic way or accessing a regulator device by its id. + */ +#define MCP16502_REG_BASE(i, r) ((((i) + 1) << 4) + MCP16502_REG_##r) +#define MCP16502_STAT_BASE(i) ((i) + 5) + +#define MCP16502_OPMODE_ACTIVE REGULATOR_MODE_NORMAL +#define MCP16502_OPMODE_LPM REGULATOR_MODE_IDLE +#define MCP16502_OPMODE_HIB REGULATOR_MODE_STANDBY + +#define MCP16502_MODE_AUTO_PFM 0 +#define MCP16502_MODE_FPWM BIT(6) + +#define MCP16502_VSEL 0x3F +#define MCP16502_EN BIT(7) +#define MCP16502_MODE BIT(6) + +#define MCP16502_MIN_REG 0x0 +#define MCP16502_MAX_REG 0x65 + +/** + * enum mcp16502_reg - MCP16502 regulators's registers + * @MCP16502_REG_A: active state register + * @MCP16502_REG_LPM: low power mode state register + * @MCP16502_REG_HIB: hibernate state register + * @MCP16502_REG_HPM: high-performance mode register + * @MCP16502_REG_SEQ: startup sequence register + * @MCP16502_REG_CFG: configuration register + */ +enum mcp16502_reg { + MCP16502_REG_A, + MCP16502_REG_LPM, + MCP16502_REG_HIB, + MCP16502_REG_HPM, + MCP16502_REG_SEQ, + MCP16502_REG_CFG, +}; + +/* Ramp delay (uV/us) for buck1, ldo1, ldo2. */ +static const unsigned int mcp16502_ramp_b1l12[] = { + 6250, 3125, 2083, 1563 +}; + +/* Ramp delay (uV/us) for buck2, buck3, buck4. */ +static const unsigned int mcp16502_ramp_b234[] = { + 3125, 1563, 1042, 781 +}; + +static unsigned int mcp16502_of_map_mode(unsigned int mode) +{ + if (mode == REGULATOR_MODE_NORMAL || mode == REGULATOR_MODE_IDLE) + return mode; + + return REGULATOR_MODE_INVALID; +} + +#define MCP16502_REGULATOR(_name, _id, _sn, _ranges, _ops, _ramp_table) \ + [_id] = { \ + .name = _name, \ + .supply_name = #_sn, \ + .regulators_node = "regulators", \ + .id = _id, \ + .ops = &(_ops), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = MCP16502_VSEL + 1, \ + .linear_ranges = _ranges, \ + .linear_min_sel = VDD_LOW_SEL, \ + .n_linear_ranges = ARRAY_SIZE(_ranges), \ + .of_match = _name, \ + .of_map_mode = mcp16502_of_map_mode, \ + .vsel_reg = (((_id) + 1) << 4), \ + .vsel_mask = MCP16502_VSEL, \ + .enable_reg = (((_id) + 1) << 4), \ + .enable_mask = MCP16502_EN, \ + .ramp_reg = MCP16502_REG_BASE(_id, CFG), \ + .ramp_mask = MCP16502_DVSR, \ + .ramp_delay_table = _ramp_table, \ + .n_ramp_values = ARRAY_SIZE(_ramp_table), \ + } + +enum { + BUCK1 = 0, + BUCK2, + BUCK3, + BUCK4, + LDO1, + LDO2, + NUM_REGULATORS +}; + +/* + * struct mcp16502 - PMIC representation + * @lpm: LPM GPIO descriptor + */ +struct mcp16502 { + struct gpio_desc *lpm; +}; + +/* + * mcp16502_gpio_set_mode() - set the GPIO corresponding value + * + * Used to prepare transitioning into hibernate or resuming from it. + */ +static void mcp16502_gpio_set_mode(struct mcp16502 *mcp, int mode) +{ + switch (mode) { + case MCP16502_OPMODE_ACTIVE: + gpiod_set_value(mcp->lpm, 0); + break; + case MCP16502_OPMODE_LPM: + case MCP16502_OPMODE_HIB: + gpiod_set_value(mcp->lpm, 1); + break; + default: + pr_err("%s: %d invalid\n", __func__, mode); + } +} + +/* + * mcp16502_get_reg() - get the PMIC's state configuration register for opmode + * + * @rdev: the regulator whose register we are searching + * @opmode: the PMIC's operating mode ACTIVE, Low-power, Hibernate + */ +static int mcp16502_get_state_reg(struct regulator_dev *rdev, int opmode) +{ + switch (opmode) { + case MCP16502_OPMODE_ACTIVE: + return MCP16502_REG_BASE(rdev_get_id(rdev), A); + case MCP16502_OPMODE_LPM: + return MCP16502_REG_BASE(rdev_get_id(rdev), LPM); + case MCP16502_OPMODE_HIB: + return MCP16502_REG_BASE(rdev_get_id(rdev), HIB); + default: + return -EINVAL; + } +} + +/* + * mcp16502_get_mode() - return the current operating mode of a regulator + * + * Note: all functions that are not part of entering/exiting standby/suspend + * use the Active mode registers. + * + * Note: this is different from the PMIC's operatig mode, it is the + * MODE bit from the regulator's register. + */ +static unsigned int mcp16502_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int ret, reg; + + reg = mcp16502_get_state_reg(rdev, MCP16502_OPMODE_ACTIVE); + if (reg < 0) + return reg; + + ret = regmap_read(rdev->regmap, reg, &val); + if (ret) + return ret; + + switch (val & MCP16502_MODE) { + case MCP16502_MODE_FPWM: + return REGULATOR_MODE_NORMAL; + case MCP16502_MODE_AUTO_PFM: + return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_INVALID; + } +} + +/* + * _mcp16502_set_mode() - helper for set_mode and set_suspend_mode + * + * @rdev: the regulator for which we are setting the mode + * @mode: the regulator's mode (the one from MODE bit) + * @opmode: the PMIC's operating mode: Active/Low-power/Hibernate + */ +static int _mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode, + unsigned int op_mode) +{ + int val; + int reg; + + reg = mcp16502_get_state_reg(rdev, op_mode); + if (reg < 0) + return reg; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = MCP16502_MODE_FPWM; + break; + case REGULATOR_MODE_IDLE: + val = MCP16502_MODE_AUTO_PFM; + break; + default: + return -EINVAL; + } + + reg = regmap_update_bits(rdev->regmap, reg, MCP16502_MODE, val); + return reg; +} + +/* + * mcp16502_set_mode() - regulator_ops set_mode + */ +static int mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_ACTIVE); +} + +/* + * mcp16502_get_status() - regulator_ops get_status + */ +static int mcp16502_get_status(struct regulator_dev *rdev) +{ + int ret; + unsigned int val; + + ret = regmap_read(rdev->regmap, MCP16502_STAT_BASE(rdev_get_id(rdev)), + &val); + if (ret) + return ret; + + if (val & MCP16502_FLT) + return REGULATOR_STATUS_ERROR; + else if (val & MCP16502_ENS) + return REGULATOR_STATUS_ON; + else if (!(val & MCP16502_ENS)) + return REGULATOR_STATUS_OFF; + + return REGULATOR_STATUS_UNDEFINED; +} + +static int mcp16502_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_sel, + unsigned int new_sel) +{ + static const u8 us_ramp[] = { 8, 16, 24, 32 }; + int id = rdev_get_id(rdev); + unsigned int uV_delta, val; + int ret; + + ret = regmap_read(rdev->regmap, MCP16502_REG_BASE(id, CFG), &val); + if (ret) + return ret; + + val = (val & MCP16502_DVSR) >> 2; + uV_delta = abs(new_sel * rdev->desc->linear_ranges->step - + old_sel * rdev->desc->linear_ranges->step); + switch (id) { + case BUCK1: + case LDO1: + case LDO2: + ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val], + mcp16502_ramp_b1l12[val]); + break; + + case BUCK2: + case BUCK3: + case BUCK4: + ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val], + mcp16502_ramp_b234[val]); + break; + + default: + return -EINVAL; + } + + return ret; +} + +#ifdef CONFIG_SUSPEND +/* + * mcp16502_suspend_get_target_reg() - get the reg of the target suspend PMIC + * mode + */ +static int mcp16502_suspend_get_target_reg(struct regulator_dev *rdev) +{ + switch (pm_suspend_target_state) { + case PM_SUSPEND_STANDBY: + return mcp16502_get_state_reg(rdev, MCP16502_OPMODE_LPM); + case PM_SUSPEND_ON: + case PM_SUSPEND_MEM: + return mcp16502_get_state_reg(rdev, MCP16502_OPMODE_HIB); + default: + dev_err(&rdev->dev, "invalid suspend target: %d\n", + pm_suspend_target_state); + } + + return -EINVAL; +} + +/* + * mcp16502_set_suspend_voltage() - regulator_ops set_suspend_voltage + */ +static int mcp16502_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + int sel = regulator_map_voltage_linear_range(rdev, uV, uV); + int reg = mcp16502_suspend_get_target_reg(rdev); + + if (sel < 0) + return sel; + + if (reg < 0) + return reg; + + return regmap_update_bits(rdev->regmap, reg, MCP16502_VSEL, sel); +} + +/* + * mcp16502_set_suspend_mode() - regulator_ops set_suspend_mode + */ +static int mcp16502_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + switch (pm_suspend_target_state) { + case PM_SUSPEND_STANDBY: + return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_LPM); + case PM_SUSPEND_ON: + case PM_SUSPEND_MEM: + return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_HIB); + default: + dev_err(&rdev->dev, "invalid suspend target: %d\n", + pm_suspend_target_state); + } + + return -EINVAL; +} + +/* + * mcp16502_set_suspend_enable() - regulator_ops set_suspend_enable + */ +static int mcp16502_set_suspend_enable(struct regulator_dev *rdev) +{ + int reg = mcp16502_suspend_get_target_reg(rdev); + + if (reg < 0) + return reg; + + return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, MCP16502_EN); +} + +/* + * mcp16502_set_suspend_disable() - regulator_ops set_suspend_disable + */ +static int mcp16502_set_suspend_disable(struct regulator_dev *rdev) +{ + int reg = mcp16502_suspend_get_target_reg(rdev); + + if (reg < 0) + return reg; + + return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, 0); +} +#endif /* CONFIG_SUSPEND */ + +static const struct regulator_ops mcp16502_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mcp16502_get_status, + .set_voltage_time_sel = mcp16502_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + + .set_mode = mcp16502_set_mode, + .get_mode = mcp16502_get_mode, + +#ifdef CONFIG_SUSPEND + .set_suspend_voltage = mcp16502_set_suspend_voltage, + .set_suspend_mode = mcp16502_set_suspend_mode, + .set_suspend_enable = mcp16502_set_suspend_enable, + .set_suspend_disable = mcp16502_set_suspend_disable, +#endif /* CONFIG_SUSPEND */ +}; + +/* + * LDOs cannot change operating modes. + */ +static const struct regulator_ops mcp16502_ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mcp16502_get_status, + .set_voltage_time_sel = mcp16502_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + +#ifdef CONFIG_SUSPEND + .set_suspend_voltage = mcp16502_set_suspend_voltage, + .set_suspend_enable = mcp16502_set_suspend_enable, + .set_suspend_disable = mcp16502_set_suspend_disable, +#endif /* CONFIG_SUSPEND */ +}; + +static const struct of_device_id mcp16502_ids[] = { + { .compatible = "microchip,mcp16502", }, + {} +}; +MODULE_DEVICE_TABLE(of, mcp16502_ids); + +static const struct linear_range b1l12_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, VDD_LOW_SEL, VDD_HIGH_SEL, 50000), +}; + +static const struct linear_range b234_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, VDD_LOW_SEL, VDD_HIGH_SEL, 25000), +}; + +static const struct regulator_desc mcp16502_desc[] = { + /* MCP16502_REGULATOR(_name, _id, _sn, _ranges, _ops, _ramp_table) */ + MCP16502_REGULATOR("VDD_IO", BUCK1, pvin1, b1l12_ranges, mcp16502_buck_ops, + mcp16502_ramp_b1l12), + MCP16502_REGULATOR("VDD_DDR", BUCK2, pvin2, b234_ranges, mcp16502_buck_ops, + mcp16502_ramp_b234), + MCP16502_REGULATOR("VDD_CORE", BUCK3, pvin3, b234_ranges, mcp16502_buck_ops, + mcp16502_ramp_b234), + MCP16502_REGULATOR("VDD_OTHER", BUCK4, pvin4, b234_ranges, mcp16502_buck_ops, + mcp16502_ramp_b234), + MCP16502_REGULATOR("LDO1", LDO1, lvin, b1l12_ranges, mcp16502_ldo_ops, + mcp16502_ramp_b1l12), + MCP16502_REGULATOR("LDO2", LDO2, lvin, b1l12_ranges, mcp16502_ldo_ops, + mcp16502_ramp_b1l12) +}; + +static const struct regmap_range mcp16502_ranges[] = { + regmap_reg_range(MCP16502_MIN_REG, MCP16502_MAX_REG) +}; + +static const struct regmap_access_table mcp16502_yes_reg_table = { + .yes_ranges = mcp16502_ranges, + .n_yes_ranges = ARRAY_SIZE(mcp16502_ranges), +}; + +static const struct regmap_config mcp16502_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MCP16502_MAX_REG, + .cache_type = REGCACHE_NONE, + .rd_table = &mcp16502_yes_reg_table, + .wr_table = &mcp16502_yes_reg_table, +}; + +static int mcp16502_probe(struct i2c_client *client) +{ + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct device *dev; + struct mcp16502 *mcp; + struct regmap *rmap; + int i; + + dev = &client->dev; + config.dev = dev; + + mcp = devm_kzalloc(dev, sizeof(*mcp), GFP_KERNEL); + if (!mcp) + return -ENOMEM; + + rmap = devm_regmap_init_i2c(client, &mcp16502_regmap_config); + if (IS_ERR(rmap)) + return dev_err_probe(dev, PTR_ERR(rmap), "regmap init failed\n"); + + i2c_set_clientdata(client, mcp); + config.regmap = rmap; + config.driver_data = mcp; + + mcp->lpm = devm_gpiod_get_optional(dev, "lpm", GPIOD_OUT_LOW); + if (IS_ERR(mcp->lpm)) + return dev_err_probe(dev, PTR_ERR(mcp->lpm), "failed to get lpm pin\n"); + + for (i = 0; i < NUM_REGULATORS; i++) { + rdev = devm_regulator_register(dev, &mcp16502_desc[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + mcp16502_desc[i].name); + } + + mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_ACTIVE); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int mcp16502_suspend_noirq(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct mcp16502 *mcp = i2c_get_clientdata(client); + + mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_LPM); + + return 0; +} + +static int mcp16502_resume_noirq(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct mcp16502 *mcp = i2c_get_clientdata(client); + + mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_ACTIVE); + + return 0; +} +#endif + +#ifdef CONFIG_PM +static const struct dev_pm_ops mcp16502_pm_ops = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mcp16502_suspend_noirq, + mcp16502_resume_noirq) +}; +#endif +static const struct i2c_device_id mcp16502_i2c_id[] = { + { .name = "mcp16502" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp16502_i2c_id); + +static struct i2c_driver mcp16502_drv = { + .probe = mcp16502_probe, + .driver = { + .name = "mcp16502-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mcp16502_ids, +#ifdef CONFIG_PM + .pm = &mcp16502_pm_ops, +#endif + }, + .id_table = mcp16502_i2c_id, +}; + +module_i2c_driver(mcp16502_drv); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("MCP16502 PMIC driver"); +MODULE_AUTHOR("Andrei Stefanescu andrei.stefanescu@microchip.com"); diff --git a/drivers/regulator/mp5416.c b/drivers/regulator/mp5416.c new file mode 100644 index 000000000..2948635b1 --- /dev/null +++ b/drivers/regulator/mp5416.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// mp5416.c - regulator driver for mps mp5416 +// +// Copyright 2020 Monolithic Power Systems, Inc +// +// Author: Saravanan Sekar + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MP5416_REG_CTL0 0x00 +#define MP5416_REG_CTL1 0x01 +#define MP5416_REG_CTL2 0x02 +#define MP5416_REG_ILIM 0x03 +#define MP5416_REG_BUCK1 0x04 +#define MP5416_REG_BUCK2 0x05 +#define MP5416_REG_BUCK3 0x06 +#define MP5416_REG_BUCK4 0x07 +#define MP5416_REG_LDO1 0x08 +#define MP5416_REG_LDO2 0x09 +#define MP5416_REG_LDO3 0x0a +#define MP5416_REG_LDO4 0x0b + +#define MP5416_REGULATOR_EN BIT(7) +#define MP5416_MASK_VSET 0x7f +#define MP5416_MASK_BUCK1_ILIM 0xc0 +#define MP5416_MASK_BUCK2_ILIM 0x0c +#define MP5416_MASK_BUCK3_ILIM 0x30 +#define MP5416_MASK_BUCK4_ILIM 0x03 +#define MP5416_MASK_DVS_SLEWRATE 0xc0 + +/* values in uV */ +#define MP5416_VOLT1_MIN 600000 +#define MP5416_VOLT1_MAX 2187500 +#define MP5416_VOLT1_STEP 12500 +#define MP5416_VOLT2_MIN 800000 +#define MP5416_VOLT2_MAX 3975000 +#define MP5416_VOLT2_STEP 25000 + +#define MP5416_VOLT1_RANGE \ + ((MP5416_VOLT1_MAX - MP5416_VOLT1_MIN)/MP5416_VOLT1_STEP + 1) +#define MP5416_VOLT2_RANGE \ + ((MP5416_VOLT2_MAX - MP5416_VOLT2_MIN)/MP5416_VOLT2_STEP + 1) + +#define MP5416BUCK(_name, _id, _ilim, _dreg, _dval, _vsel) \ + [MP5416_BUCK ## _id] = { \ + .id = MP5416_BUCK ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = &mp5416_buck_ops, \ + .min_uV = MP5416_VOLT ##_vsel## _MIN, \ + .uV_step = MP5416_VOLT ##_vsel## _STEP, \ + .n_voltages = MP5416_VOLT ##_vsel## _RANGE, \ + .curr_table = _ilim, \ + .n_current_limits = ARRAY_SIZE(_ilim), \ + .csel_reg = MP5416_REG_ILIM, \ + .csel_mask = MP5416_MASK_BUCK ## _id ##_ILIM, \ + .vsel_reg = MP5416_REG_BUCK ## _id, \ + .vsel_mask = MP5416_MASK_VSET, \ + .enable_reg = MP5416_REG_BUCK ## _id, \ + .enable_mask = MP5416_REGULATOR_EN, \ + .ramp_reg = MP5416_REG_CTL2, \ + .ramp_mask = MP5416_MASK_DVS_SLEWRATE, \ + .ramp_delay_table = mp5416_buck_ramp_table, \ + .n_ramp_values = ARRAY_SIZE(mp5416_buck_ramp_table), \ + .active_discharge_on = _dval, \ + .active_discharge_reg = _dreg, \ + .active_discharge_mask = _dval, \ + .owner = THIS_MODULE, \ + } + +#define MP5416LDO(_name, _id, _dval) \ + [MP5416_LDO ## _id] = { \ + .id = MP5416_LDO ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = &mp5416_ldo_ops, \ + .min_uV = MP5416_VOLT2_MIN, \ + .uV_step = MP5416_VOLT2_STEP, \ + .n_voltages = MP5416_VOLT2_RANGE, \ + .vsel_reg = MP5416_REG_LDO ##_id, \ + .vsel_mask = MP5416_MASK_VSET, \ + .enable_reg = MP5416_REG_LDO ##_id, \ + .enable_mask = MP5416_REGULATOR_EN, \ + .active_discharge_on = _dval, \ + .active_discharge_reg = MP5416_REG_CTL2, \ + .active_discharge_mask = _dval, \ + .owner = THIS_MODULE, \ + } + +enum mp5416_regulators { + MP5416_BUCK1, + MP5416_BUCK2, + MP5416_BUCK3, + MP5416_BUCK4, + MP5416_LDO1, + MP5416_LDO2, + MP5416_LDO3, + MP5416_LDO4, + MP5416_MAX_REGULATORS, +}; + +static const struct regmap_config mp5416_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x0d, +}; + +/* Current limits array (in uA) + * ILIM1 & ILIM3 + */ +static const unsigned int mp5416_I_limits1[] = { + 3800000, 4600000, 5600000, 6800000 +}; + +/* ILIM2 & ILIM4 */ +static const unsigned int mp5416_I_limits2[] = { + 2200000, 3200000, 4200000, 5200000 +}; + +/* + * DVS ramp rate BUCK1 to BUCK4 + * 00: 32mV/us + * 01: 16mV/us + * 10: 8mV/us + * 11: 4mV/us + */ +static const unsigned int mp5416_buck_ramp_table[] = { + 32000, 16000, 8000, 4000 +}; + +static const struct regulator_ops mp5416_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops mp5416_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_desc mp5416_regulators_desc[MP5416_MAX_REGULATORS] = { + MP5416BUCK("buck1", 1, mp5416_I_limits1, MP5416_REG_CTL1, BIT(0), 1), + MP5416BUCK("buck2", 2, mp5416_I_limits2, MP5416_REG_CTL1, BIT(1), 2), + MP5416BUCK("buck3", 3, mp5416_I_limits1, MP5416_REG_CTL1, BIT(2), 1), + MP5416BUCK("buck4", 4, mp5416_I_limits2, MP5416_REG_CTL2, BIT(5), 2), + MP5416LDO("ldo1", 1, BIT(4)), + MP5416LDO("ldo2", 2, BIT(3)), + MP5416LDO("ldo3", 3, BIT(2)), + MP5416LDO("ldo4", 4, BIT(1)), +}; + +static const struct regulator_desc mp5496_regulators_desc[MP5416_MAX_REGULATORS] = { + MP5416BUCK("buck1", 1, mp5416_I_limits1, MP5416_REG_CTL1, BIT(0), 1), + MP5416BUCK("buck2", 2, mp5416_I_limits2, MP5416_REG_CTL1, BIT(1), 1), + MP5416BUCK("buck3", 3, mp5416_I_limits1, MP5416_REG_CTL1, BIT(2), 1), + MP5416BUCK("buck4", 4, mp5416_I_limits2, MP5416_REG_CTL2, BIT(5), 1), + MP5416LDO("ldo1", 1, BIT(4)), + MP5416LDO("ldo2", 2, BIT(3)), + MP5416LDO("ldo3", 3, BIT(2)), + MP5416LDO("ldo4", 4, BIT(1)), +}; + +static int mp5416_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct regulator_config config = { NULL, }; + static const struct regulator_desc *desc; + struct regulator_dev *rdev; + struct regmap *regmap; + int i; + + regmap = devm_regmap_init_i2c(client, &mp5416_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + + desc = i2c_get_match_data(client); + if (!desc) + return -ENODEV; + + config.dev = dev; + config.regmap = regmap; + + for (i = 0; i < MP5416_MAX_REGULATORS; i++) { + rdev = devm_regulator_register(dev, + &desc[i], + &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator!\n"); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id mp5416_of_match[] = { + { .compatible = "mps,mp5416", .data = &mp5416_regulators_desc }, + { .compatible = "mps,mp5496", .data = &mp5496_regulators_desc }, + {} +}; +MODULE_DEVICE_TABLE(of, mp5416_of_match); + +static const struct i2c_device_id mp5416_id[] = { + { .name = "mp5416", .driver_data = (kernel_ulong_t)&mp5416_regulators_desc }, + { .name = "mp5496", .driver_data = (kernel_ulong_t)&mp5496_regulators_desc }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mp5416_id); + +static struct i2c_driver mp5416_regulator_driver = { + .driver = { + .name = "mp5416", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(mp5416_of_match), + }, + .probe = mp5416_i2c_probe, + .id_table = mp5416_id, +}; +module_i2c_driver(mp5416_regulator_driver); + +MODULE_AUTHOR("Saravanan Sekar "); +MODULE_DESCRIPTION("MP5416 PMIC regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mp8859.c b/drivers/regulator/mp8859.c new file mode 100644 index 000000000..9a708e826 --- /dev/null +++ b/drivers/regulator/mp8859.c @@ -0,0 +1,408 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2019 five technologies GmbH +// Author: Markus Reichl + +#include +#include +#include +#include +#include + + +#define VOL_MIN_IDX 0x00 +#define VOL_MAX_IDX 0x7ff + +/* Register definitions */ +#define MP8859_VOUT_L_REG 0 //3 lo Bits +#define MP8859_VOUT_H_REG 1 //8 hi Bits +#define MP8859_VOUT_GO_REG 2 +#define MP8859_IOUT_LIM_REG 3 +#define MP8859_CTL1_REG 4 +#define MP8859_CTL2_REG 5 +#define MP8859_RESERVED1_REG 6 +#define MP8859_RESERVED2_REG 7 +#define MP8859_RESERVED3_REG 8 +#define MP8859_STATUS_REG 9 +#define MP8859_INTERRUPT_REG 0x0A +#define MP8859_MASK_REG 0x0B +#define MP8859_ID1_REG 0x0C +#define MP8859_MFR_ID_REG 0x27 +#define MP8859_DEV_ID_REG 0x28 +#define MP8859_IC_REV_REG 0x29 + +#define MP8859_MAX_REG 0x29 + +#define MP8859_GO_BIT 0x01 + +#define MP8859_IOUT_LIM_MASK 0x7f + +#define MP8859_ENABLE_MASK 0x80 +#define MP8859_DISCHG_EN_MASK 0x10 +#define MP8859_MODE_MASK 0x08 + +#define MP8859_PG_MASK 0x80 +#define MP8859_OTP_MASK 0x40 +#define MP8859_OTW_MASK 0x20 +#define MP8859_CC_CV_MASK 0x10 + +static int mp8859_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + + ret = regmap_write(rdev->regmap, MP8859_VOUT_L_REG, sel & 0x7); + + if (ret) + return ret; + ret = regmap_write(rdev->regmap, MP8859_VOUT_H_REG, sel >> 3); + + if (ret) + return ret; + ret = regmap_update_bits(rdev->regmap, MP8859_VOUT_GO_REG, + MP8859_GO_BIT, 1); + return ret; +} + +static int mp8859_get_voltage_sel(struct regulator_dev *rdev) +{ + unsigned int val_tmp; + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MP8859_VOUT_H_REG, &val_tmp); + + if (ret) + return ret; + val = val_tmp << 3; + + ret = regmap_read(rdev->regmap, MP8859_VOUT_L_REG, &val_tmp); + + if (ret) + return ret; + val |= val_tmp & 0x07; + return val; +} + +static int mp8859_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int from, unsigned int to) +{ + int change; + + /* The voltage ramps at 1mV/uS, selectors are 10mV */ + if (from > to) + change = from - to; + else + change = to - from; + + return change * 10 * 1000; +} + +static unsigned int mp8859_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MP8859_CTL1_REG, &val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to read mode: %d\n", ret); + return 0; + } + + if (val & MP8859_MODE_MASK) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int mp8859_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = MP8859_MODE_MASK; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, MP8859_CTL1_REG, + MP8859_MODE_MASK, val); +} + +static int mp8859_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + unsigned int cur_val, new_val; + int ret, i; + + /* Steps of 50mA */ + new_val = max_uA / 50000; + if (new_val > MP8859_IOUT_LIM_MASK) + return -EINVAL; + if (new_val == 0) + return -EINVAL; + + /* + * If the regulator is limiting then ramp gradually as per + * datasheet, otherwise just set the value directly. + */ + ret = regmap_read(rdev->regmap, MP8859_STATUS_REG, &cur_val); + if (ret != 0) + return ret; + if (!(cur_val & MP8859_CC_CV_MASK)) { + return regmap_update_bits(rdev->regmap, MP8859_IOUT_LIM_REG, + MP8859_IOUT_LIM_MASK, new_val); + } + + ret = regmap_read(rdev->regmap, MP8859_IOUT_LIM_REG, &cur_val); + if (ret != 0) + return ret; + + if (cur_val >= new_val) { + for (i = cur_val; i >= new_val; i--) { + ret = regmap_update_bits(rdev->regmap, + MP8859_IOUT_LIM_REG, + MP8859_IOUT_LIM_MASK, + cur_val - i); + if (ret != 0) + return ret; + } + } else { + for (i = cur_val; i <= new_val; i++) { + ret = regmap_update_bits(rdev->regmap, + MP8859_IOUT_LIM_REG, + MP8859_IOUT_LIM_MASK, + cur_val + i); + if (ret != 0) + return ret; + } + } + + return 0; +} + +static int mp8859_get_status(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + /* Output status is only meaingful when enabled */ + ret = regmap_read(rdev->regmap, MP8859_CTL1_REG, &val); + if (ret != 0) + return ret; + if (!(val & MP8859_ENABLE_MASK)) + return REGULATOR_STATUS_UNDEFINED; + + ret = regmap_read(rdev->regmap, MP8859_STATUS_REG, &val); + if (ret != 0) + return ret; + + if (val & MP8859_PG_MASK) + return REGULATOR_STATUS_ON; + else + return REGULATOR_STATUS_ERROR; +} + +static int mp8859_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + unsigned int status, enabled; + int ret; + + *flags = 0; + + /* Output status is only meaingful when enabled */ + ret = regmap_read(rdev->regmap, MP8859_CTL1_REG, &enabled); + if (ret != 0) + return ret; + enabled &= MP8859_ENABLE_MASK; + + ret = regmap_read(rdev->regmap, MP8859_STATUS_REG, &status); + if (ret != 0) + return ret; + + if (enabled && !(status & MP8859_PG_MASK)) + status |= REGULATOR_ERROR_FAIL; + if (status & MP8859_OTP_MASK) + status |= REGULATOR_ERROR_OVER_TEMP; + if (status & MP8859_OTW_MASK) + status |= REGULATOR_ERROR_OVER_TEMP_WARN; + if (status & MP8859_CC_CV_MASK) + status |= REGULATOR_ERROR_OVER_CURRENT; + + return 0; +} + +static const struct linear_range mp8859_dcdc_ranges[] = { + REGULATOR_LINEAR_RANGE(0, VOL_MIN_IDX, VOL_MAX_IDX, 10000), +}; + +static bool mp8859_readable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MP8859_VOUT_L_REG: + case MP8859_VOUT_H_REG: + case MP8859_VOUT_GO_REG: + case MP8859_IOUT_LIM_REG: + case MP8859_CTL1_REG: + case MP8859_CTL2_REG: + case MP8859_STATUS_REG: + case MP8859_INTERRUPT_REG: + case MP8859_MASK_REG: + case MP8859_ID1_REG: + case MP8859_MFR_ID_REG: + case MP8859_DEV_ID_REG: + case MP8859_IC_REV_REG: + return true; + default: + return false; + } +} + +static bool mp8859_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MP8859_VOUT_GO_REG: + case MP8859_STATUS_REG: + case MP8859_INTERRUPT_REG: + return true; + default: + return false; + } +} + +static const struct regmap_config mp8859_regmap = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MP8859_MAX_REG, + .cache_type = REGCACHE_MAPLE, + .readable_reg = mp8859_readable, + .volatile_reg = mp8859_volatile, +}; + +static const struct regulator_ops mp8859_ops = { + .set_voltage_sel = mp8859_set_voltage_sel, + .get_voltage_sel = mp8859_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_time_sel = mp8859_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mp8859_set_mode, + .get_mode = mp8859_get_mode, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_current_limit = mp8859_set_current_limit, + .get_status = mp8859_get_status, + .get_error_flags = mp8859_get_error_flags, +}; + +static const struct regulator_desc mp8859_regulators[] = { + { + .id = 0, + .type = REGULATOR_VOLTAGE, + .name = "mp8859_dcdc", + .supply_name = "vin", + .of_match = of_match_ptr("mp8859_dcdc"), + .n_voltages = VOL_MAX_IDX + 1, + .linear_ranges = mp8859_dcdc_ranges, + .n_linear_ranges = 1, + .enable_reg = MP8859_CTL1_REG, + .enable_mask = MP8859_ENABLE_MASK, + .enable_val = MP8859_ENABLE_MASK, + .active_discharge_reg = MP8859_CTL1_REG, + .active_discharge_on = MP8859_DISCHG_EN_MASK, + .active_discharge_mask = MP8859_DISCHG_EN_MASK, + .ops = &mp8859_ops, + .owner = THIS_MODULE, + }, +}; + +static int mp8859_i2c_probe(struct i2c_client *i2c) +{ + int ret; + struct regulator_config config = {.dev = &i2c->dev}; + struct regmap *regmap = devm_regmap_init_i2c(i2c, &mp8859_regmap); + struct regulator_dev *rdev; + unsigned int val, rev; + + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); + return ret; + } + + ret = regmap_read(regmap, MP8859_MFR_ID_REG, &val); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to read manufacturer ID: %d\n", ret); + return ret; + } + if (val != 0x9) { + dev_err(&i2c->dev, "Manufacturer ID %x != 9\n", val); + return -EINVAL; + } + + ret = regmap_read(regmap, MP8859_DEV_ID_REG, &val); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret); + return ret; + } + if (val != 0x58) { + dev_err(&i2c->dev, "Manufacturer ID %x != 0x58\n", val); + return -EINVAL; + } + + ret = regmap_read(regmap, MP8859_IC_REV_REG, &rev); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to read device revision: %d\n", ret); + return ret; + } + ret = regmap_read(regmap, MP8859_ID1_REG, &val); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to read device ID1: %d\n", ret); + return ret; + } + dev_info(&i2c->dev, "MP8859-%04d revision %d\n", val, rev); + + rdev = devm_regulator_register(&i2c->dev, &mp8859_regulators[0], + &config); + + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&i2c->dev, "failed to register %s: %d\n", + mp8859_regulators[0].name, ret); + return ret; + } + return 0; +} + +static const struct of_device_id mp8859_dt_id[] __maybe_unused = { + {.compatible = "mps,mp8859"}, + {}, +}; +MODULE_DEVICE_TABLE(of, mp8859_dt_id); + +static const struct i2c_device_id mp8859_i2c_id[] = { + { .name = "mp8859" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mp8859_i2c_id); + +static struct i2c_driver mp8859_regulator_driver = { + .driver = { + .name = "mp8859", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(mp8859_dt_id), + }, + .probe = mp8859_i2c_probe, + .id_table = mp8859_i2c_id, +}; + +module_i2c_driver(mp8859_regulator_driver); + +MODULE_DESCRIPTION("Monolithic Power Systems MP8859 voltage regulator driver"); +MODULE_AUTHOR("Markus Reichl "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mp886x.c b/drivers/regulator/mp886x.c new file mode 100644 index 000000000..e0b62bc02 --- /dev/null +++ b/drivers/regulator/mp886x.c @@ -0,0 +1,370 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// MP8867/MP8869 regulator driver +// +// Copyright (C) 2020 Synaptics Incorporated +// +// Author: Jisheng Zhang + +#include +#include +#include +#include +#include +#include +#include + +#define MP886X_VSEL 0x00 +#define MP886X_V_BOOT (1 << 7) +#define MP886X_SYSCNTLREG1 0x01 +#define MP886X_MODE (1 << 0) +#define MP886X_SLEW_SHIFT 3 +#define MP886X_SLEW_MASK (0x7 << MP886X_SLEW_SHIFT) +#define MP886X_GO (1 << 6) +#define MP886X_EN (1 << 7) +#define MP8869_SYSCNTLREG2 0x02 + +struct mp886x_cfg_info { + const struct regulator_ops *rops; + const unsigned int slew_rates[8]; + const int switch_freq[4]; + const u8 fs_reg; + const u8 fs_shift; +}; + +struct mp886x_device_info { + struct device *dev; + struct regulator_desc desc; + struct regulator_init_data *regulator; + struct gpio_desc *en_gpio; + const struct mp886x_cfg_info *ci; + u32 r[2]; + unsigned int sel; +}; + +static void mp886x_set_switch_freq(struct mp886x_device_info *di, + struct regmap *regmap, + u32 freq) +{ + const struct mp886x_cfg_info *ci = di->ci; + int i; + + for (i = 0; i < ARRAY_SIZE(ci->switch_freq); i++) { + if (freq == ci->switch_freq[i]) { + regmap_update_bits(regmap, ci->fs_reg, + 0x3 << ci->fs_shift, i << ci->fs_shift); + return; + } + } + + dev_err(di->dev, "invalid frequency %d\n", freq); +} + +static int mp886x_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_FAST: + regmap_update_bits(rdev->regmap, MP886X_SYSCNTLREG1, + MP886X_MODE, MP886X_MODE); + break; + case REGULATOR_MODE_NORMAL: + regmap_update_bits(rdev->regmap, MP886X_SYSCNTLREG1, + MP886X_MODE, 0); + break; + default: + return -EINVAL; + } + return 0; +} + +static unsigned int mp886x_get_mode(struct regulator_dev *rdev) +{ + u32 val; + int ret; + + ret = regmap_read(rdev->regmap, MP886X_SYSCNTLREG1, &val); + if (ret < 0) + return ret; + if (val & MP886X_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int mp8869_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + + ret = regmap_update_bits(rdev->regmap, MP886X_SYSCNTLREG1, + MP886X_GO, MP886X_GO); + if (ret < 0) + return ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + MP886X_V_BOOT | rdev->desc->vsel_mask, sel); +} + +static inline unsigned int mp8869_scale(unsigned int uv, u32 r1, u32 r2) +{ + u32 tmp = uv * r1 / r2; + + return uv + tmp; +} + +static int mp8869_get_voltage_sel(struct regulator_dev *rdev) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, uv; + unsigned int val; + bool fbloop; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret) + return ret; + + fbloop = val & MP886X_V_BOOT; + if (fbloop) { + uv = rdev->desc->min_uV; + uv = mp8869_scale(uv, di->r[0], di->r[1]); + return regulator_map_voltage_linear(rdev, uv, uv); + } + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static const struct regulator_ops mp8869_regulator_ops = { + .set_voltage_sel = mp8869_set_voltage_sel, + .get_voltage_sel = mp8869_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mp886x_set_mode, + .get_mode = mp886x_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct mp886x_cfg_info mp8869_ci = { + .rops = &mp8869_regulator_ops, + .slew_rates = { + 40000, + 30000, + 20000, + 10000, + 5000, + 2500, + 1250, + 625, + }, + .switch_freq = { + 500000, + 750000, + 1000000, + 1250000, + }, + .fs_reg = MP8869_SYSCNTLREG2, + .fs_shift = 4, +}; + +static int mp8867_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, delta; + + ret = mp8869_set_voltage_sel(rdev, sel); + if (ret < 0) + return ret; + + delta = di->sel - sel; + if (abs(delta) <= 5) + ret = regmap_update_bits(rdev->regmap, MP886X_SYSCNTLREG1, + MP886X_GO, 0); + di->sel = sel; + + return ret; +} + +static int mp8867_get_voltage_sel(struct regulator_dev *rdev) +{ + struct mp886x_device_info *di = rdev_get_drvdata(rdev); + int ret, uv; + unsigned int val; + bool fbloop; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret) + return ret; + + fbloop = val & MP886X_V_BOOT; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + if (fbloop) { + uv = regulator_list_voltage_linear(rdev, val); + uv = mp8869_scale(uv, di->r[0], di->r[1]); + return regulator_map_voltage_linear(rdev, uv, uv); + } + + return val; +} + +static const struct regulator_ops mp8867_regulator_ops = { + .set_voltage_sel = mp8867_set_voltage_sel, + .get_voltage_sel = mp8867_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mp886x_set_mode, + .get_mode = mp886x_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct mp886x_cfg_info mp8867_ci = { + .rops = &mp8867_regulator_ops, + .slew_rates = { + 64000, + 32000, + 16000, + 8000, + 4000, + 2000, + 1000, + 500, + }, + .switch_freq = { + 500000, + 750000, + 1000000, + 1500000, + }, + .fs_reg = MP886X_SYSCNTLREG1, + .fs_shift = 1, +}; + +static int mp886x_regulator_register(struct mp886x_device_info *di, + struct regulator_config *config) +{ + struct regulator_desc *rdesc = &di->desc; + struct regulator_dev *rdev; + + rdesc->name = "mp886x-reg"; + rdesc->supply_name = "vin"; + rdesc->ops = di->ci->rops; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->n_voltages = 128; + rdesc->enable_reg = MP886X_SYSCNTLREG1; + rdesc->enable_mask = MP886X_EN; + rdesc->min_uV = 600000; + rdesc->uV_step = 10000; + rdesc->vsel_reg = MP886X_VSEL; + rdesc->vsel_mask = 0x3f; + rdesc->ramp_reg = MP886X_SYSCNTLREG1; + rdesc->ramp_mask = MP886X_SLEW_MASK; + rdesc->ramp_delay_table = di->ci->slew_rates; + rdesc->n_ramp_values = ARRAY_SIZE(di->ci->slew_rates); + rdesc->owner = THIS_MODULE; + + rdev = devm_regulator_register(di->dev, &di->desc, config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + di->sel = rdesc->ops->get_voltage_sel(rdev); + return 0; +} + +static const struct regmap_config mp886x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int mp886x_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct mp886x_device_info *di; + struct regulator_config config = { }; + struct regmap *regmap; + u32 freq; + int ret; + + di = devm_kzalloc(dev, sizeof(struct mp886x_device_info), GFP_KERNEL); + if (!di) + return -ENOMEM; + + di->regulator = of_get_regulator_init_data(dev, np, &di->desc); + if (!di->regulator) { + dev_err(dev, "Platform data not found!\n"); + return -EINVAL; + } + + ret = of_property_read_u32_array(np, "mps,fb-voltage-divider", + di->r, 2); + if (ret) + return ret; + + di->en_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(di->en_gpio)) + return PTR_ERR(di->en_gpio); + + di->ci = i2c_get_match_data(client); + di->dev = dev; + + regmap = devm_regmap_init_i2c(client, &mp886x_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + i2c_set_clientdata(client, di); + + config.dev = di->dev; + config.init_data = di->regulator; + config.regmap = regmap; + config.driver_data = di; + config.of_node = np; + + if (!of_property_read_u32(np, "mps,switch-frequency-hz", &freq)) + mp886x_set_switch_freq(di, regmap, freq); + + ret = mp886x_regulator_register(di, &config); + if (ret < 0) + dev_err(dev, "Failed to register regulator!\n"); + return ret; +} + +static const struct of_device_id mp886x_dt_ids[] = { + { .compatible = "mps,mp8867", .data = &mp8867_ci }, + { .compatible = "mps,mp8869", .data = &mp8869_ci }, + { } +}; +MODULE_DEVICE_TABLE(of, mp886x_dt_ids); + +static const struct i2c_device_id mp886x_id[] = { + { .name = "mp8867", .driver_data = (kernel_ulong_t)&mp8867_ci }, + { .name = "mp8869", .driver_data = (kernel_ulong_t)&mp8869_ci }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mp886x_id); + +static struct i2c_driver mp886x_regulator_driver = { + .driver = { + .name = "mp886x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mp886x_dt_ids, + }, + .probe = mp886x_i2c_probe, + .id_table = mp886x_id, +}; +module_i2c_driver(mp886x_regulator_driver); + +MODULE_AUTHOR("Jisheng Zhang "); +MODULE_DESCRIPTION("MP886x regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mpq7920.c b/drivers/regulator/mpq7920.c new file mode 100644 index 000000000..0cbc17deb --- /dev/null +++ b/drivers/regulator/mpq7920.c @@ -0,0 +1,330 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// mpq7920.c - regulator driver for mps mpq7920 +// +// Copyright 2019 Monolithic Power Systems, Inc +// +// Author: Saravanan Sekar + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mpq7920.h" + +#define MPQ7920_BUCK_VOLT_RANGE \ + ((MPQ7920_VOLT_MAX - MPQ7920_BUCK_VOLT_MIN)/MPQ7920_VOLT_STEP + 1) +#define MPQ7920_LDO_VOLT_RANGE \ + ((MPQ7920_VOLT_MAX - MPQ7920_LDO_VOLT_MIN)/MPQ7920_VOLT_STEP + 1) + +#define MPQ7920BUCK(_name, _id, _ilim) \ + [MPQ7920_BUCK ## _id] = { \ + .id = MPQ7920_BUCK ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .of_parse_cb = mpq7920_parse_cb, \ + .ops = &mpq7920_buck_ops, \ + .min_uV = MPQ7920_BUCK_VOLT_MIN, \ + .uV_step = MPQ7920_VOLT_STEP, \ + .n_voltages = MPQ7920_BUCK_VOLT_RANGE, \ + .curr_table = _ilim, \ + .n_current_limits = ARRAY_SIZE(_ilim), \ + .csel_reg = MPQ7920_BUCK ##_id## _REG_C, \ + .csel_mask = MPQ7920_MASK_BUCK_ILIM, \ + .enable_reg = MPQ7920_REG_REGULATOR_EN, \ + .enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET - \ + MPQ7920_BUCK ## _id), \ + .vsel_reg = MPQ7920_BUCK ##_id## _REG_A, \ + .vsel_mask = MPQ7920_MASK_VREF, \ + .active_discharge_on = MPQ7920_DISCHARGE_ON, \ + .active_discharge_reg = MPQ7920_BUCK ##_id## _REG_B, \ + .active_discharge_mask = MPQ7920_MASK_DISCHARGE, \ + .soft_start_reg = MPQ7920_BUCK ##_id## _REG_C, \ + .soft_start_mask = MPQ7920_MASK_SOFTSTART, \ + .owner = THIS_MODULE, \ + } + +#define MPQ7920LDO(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask) \ + [MPQ7920_LDO ## _id] = { \ + .id = MPQ7920_LDO ## _id, \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .ops = _ops, \ + .min_uV = MPQ7920_LDO_VOLT_MIN, \ + .uV_step = MPQ7920_VOLT_STEP, \ + .n_voltages = MPQ7920_LDO_VOLT_RANGE, \ + .vsel_reg = MPQ7920_LDO ##_id## _REG_A, \ + .vsel_mask = MPQ7920_MASK_VREF, \ + .curr_table = _ilim, \ + .n_current_limits = _ilim_sz, \ + .csel_reg = _creg, \ + .csel_mask = _cmask, \ + .enable_reg = (_id == 1) ? 0 : MPQ7920_REG_REGULATOR_EN,\ + .enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET - \ + MPQ7920_LDO ##_id + 1), \ + .active_discharge_on = MPQ7920_DISCHARGE_ON, \ + .active_discharge_mask = MPQ7920_MASK_DISCHARGE, \ + .active_discharge_reg = MPQ7920_LDO ##_id## _REG_B, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +enum mpq7920_regulators { + MPQ7920_BUCK1, + MPQ7920_BUCK2, + MPQ7920_BUCK3, + MPQ7920_BUCK4, + MPQ7920_LDO1, /* LDORTC */ + MPQ7920_LDO2, + MPQ7920_LDO3, + MPQ7920_LDO4, + MPQ7920_LDO5, + MPQ7920_MAX_REGULATORS, +}; + +struct mpq7920_regulator_info { + struct regmap *regmap; + struct regulator_desc *rdesc; +}; + +static const struct regmap_config mpq7920_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x25, +}; + +/* Current limits array (in uA) + * ILIM1 & ILIM3 + */ +static const unsigned int mpq7920_I_limits1[] = { + 4600000, 6600000, 7600000, 9300000 +}; + +/* ILIM2 & ILIM4 */ +static const unsigned int mpq7920_I_limits2[] = { + 2700000, 3900000, 5100000, 6100000 +}; + +/* LDO4 & LDO5 */ +static const unsigned int mpq7920_I_limits3[] = { + 300000, 700000 +}; + +static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay); +static int mpq7920_parse_cb(struct device_node *np, + const struct regulator_desc *rdesc, + struct regulator_config *config); + +/* RTCLDO not controllable, always ON */ +static const struct regulator_ops mpq7920_ldortc_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops mpq7920_ldo_wo_current_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops mpq7920_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static const struct regulator_ops mpq7920_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_soft_start = regulator_set_soft_start_regmap, + .set_ramp_delay = mpq7920_set_ramp_delay, +}; + +static struct regulator_desc mpq7920_regulators_desc[MPQ7920_MAX_REGULATORS] = { + MPQ7920BUCK("buck1", 1, mpq7920_I_limits1), + MPQ7920BUCK("buck2", 2, mpq7920_I_limits2), + MPQ7920BUCK("buck3", 3, mpq7920_I_limits1), + MPQ7920BUCK("buck4", 4, mpq7920_I_limits2), + MPQ7920LDO("ldortc", 1, &mpq7920_ldortc_ops, NULL, 0, 0, 0), + MPQ7920LDO("ldo2", 2, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0), + MPQ7920LDO("ldo3", 3, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0), + MPQ7920LDO("ldo4", 4, &mpq7920_ldo_ops, mpq7920_I_limits3, + ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO4_REG_B, + MPQ7920_MASK_LDO_ILIM), + MPQ7920LDO("ldo5", 5, &mpq7920_ldo_ops, mpq7920_I_limits3, + ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO5_REG_B, + MPQ7920_MASK_LDO_ILIM), +}; + +/* + * DVS ramp rate BUCK1 to BUCK4 + * 00-01: Reserved + * 10: 8mV/us + * 11: 4mV/us + */ +static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int ramp_val; + + if (ramp_delay > 8000 || ramp_delay < 0) + return -EINVAL; + + if (ramp_delay <= 4000) + ramp_val = 3; + else + ramp_val = 2; + + return regmap_update_bits(rdev->regmap, MPQ7920_REG_CTL0, + MPQ7920_MASK_DVS_SLEWRATE, ramp_val << 6); +} + +static int mpq7920_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + uint8_t val; + int ret; + struct mpq7920_regulator_info *info = config->driver_data; + struct regulator_desc *rdesc = &info->rdesc[desc->id]; + + if (of_property_read_bool(np, "mps,buck-ovp-disable")) { + regmap_update_bits(config->regmap, + MPQ7920_BUCK1_REG_B + (rdesc->id * 4), + MPQ7920_MASK_OVP, MPQ7920_OVP_DISABLE); + } + + ret = of_property_read_u8(np, "mps,buck-phase-delay", &val); + if (!ret) { + regmap_update_bits(config->regmap, + MPQ7920_BUCK1_REG_C + (rdesc->id * 4), + MPQ7920_MASK_BUCK_PHASE_DEALY, + (val & 3) << 4); + } + + ret = of_property_read_u8(np, "mps,buck-softstart", &val); + if (!ret) + rdesc->soft_start_val_on = (val & 3) << 2; + + return 0; +} + +static void mpq7920_parse_dt(struct device *dev, + struct mpq7920_regulator_info *info) +{ + int ret; + struct device_node *np = dev->of_node; + uint8_t freq; + + np = of_get_child_by_name(np, "regulators"); + if (!np) { + dev_err(dev, "missing 'regulators' subnode in DT\n"); + return; + } + + ret = of_property_read_u8(np, "mps,switch-freq", &freq); + if (!ret) { + regmap_update_bits(info->regmap, MPQ7920_REG_CTL0, + MPQ7920_MASK_SWITCH_FREQ, + (freq & 3) << 4); + } + + of_node_put(np); +} + +static int mpq7920_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct mpq7920_regulator_info *info; + struct regulator_config config = { NULL, }; + struct regulator_dev *rdev; + struct regmap *regmap; + int i; + + info = devm_kzalloc(dev, sizeof(struct mpq7920_regulator_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->rdesc = mpq7920_regulators_desc; + regmap = devm_regmap_init_i2c(client, &mpq7920_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + + i2c_set_clientdata(client, info); + info->regmap = regmap; + if (client->dev.of_node) + mpq7920_parse_dt(&client->dev, info); + + config.dev = dev; + config.regmap = regmap; + config.driver_data = info; + + for (i = 0; i < MPQ7920_MAX_REGULATORS; i++) { + rdev = devm_regulator_register(dev, + &mpq7920_regulators_desc[i], + &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator!\n"); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id mpq7920_of_match[] = { + { .compatible = "mps,mpq7920"}, + {}, +}; +MODULE_DEVICE_TABLE(of, mpq7920_of_match); + +static const struct i2c_device_id mpq7920_id[] = { + { .name = "mpq7920" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mpq7920_id); + +static struct i2c_driver mpq7920_regulator_driver = { + .driver = { + .name = "mpq7920", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mpq7920_of_match, + }, + .probe = mpq7920_i2c_probe, + .id_table = mpq7920_id, +}; +module_i2c_driver(mpq7920_regulator_driver); + +MODULE_AUTHOR("Saravanan Sekar "); +MODULE_DESCRIPTION("MPQ7920 PMIC regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mpq7920.h b/drivers/regulator/mpq7920.h new file mode 100644 index 000000000..489924655 --- /dev/null +++ b/drivers/regulator/mpq7920.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * mpq7920.h - Regulator definitions for mpq7920 + * + * Copyright 2019 Monolithic Power Systems, Inc + * + */ + +#ifndef __MPQ7920_H__ +#define __MPQ7920_H__ + +#define MPQ7920_REG_CTL0 0x00 +#define MPQ7920_REG_CTL1 0x01 +#define MPQ7920_REG_CTL2 0x02 +#define MPQ7920_BUCK1_REG_A 0x03 +#define MPQ7920_BUCK1_REG_B 0x04 +#define MPQ7920_BUCK1_REG_C 0x05 +#define MPQ7920_BUCK1_REG_D 0x06 +#define MPQ7920_BUCK2_REG_A 0x07 +#define MPQ7920_BUCK2_REG_B 0x08 +#define MPQ7920_BUCK2_REG_C 0x09 +#define MPQ7920_BUCK2_REG_D 0x0a +#define MPQ7920_BUCK3_REG_A 0x0b +#define MPQ7920_BUCK3_REG_B 0x0c +#define MPQ7920_BUCK3_REG_C 0x0d +#define MPQ7920_BUCK3_REG_D 0x0e +#define MPQ7920_BUCK4_REG_A 0x0f +#define MPQ7920_BUCK4_REG_B 0x10 +#define MPQ7920_BUCK4_REG_C 0x11 +#define MPQ7920_BUCK4_REG_D 0x12 +#define MPQ7920_LDO1_REG_A 0x13 +#define MPQ7920_LDO1_REG_B 0x0 +#define MPQ7920_LDO2_REG_A 0x14 +#define MPQ7920_LDO2_REG_B 0x15 +#define MPQ7920_LDO2_REG_C 0x16 +#define MPQ7920_LDO3_REG_A 0x17 +#define MPQ7920_LDO3_REG_B 0x18 +#define MPQ7920_LDO3_REG_C 0x19 +#define MPQ7920_LDO4_REG_A 0x1a +#define MPQ7920_LDO4_REG_B 0x1b +#define MPQ7920_LDO4_REG_C 0x1c +#define MPQ7920_LDO5_REG_A 0x1d +#define MPQ7920_LDO5_REG_B 0x1e +#define MPQ7920_LDO5_REG_C 0x1f +#define MPQ7920_REG_MODE 0x20 +#define MPQ7920_REG_REGULATOR_EN 0x22 + +#define MPQ7920_MASK_VREF 0x7f +#define MPQ7920_MASK_BUCK_ILIM 0xc0 +#define MPQ7920_MASK_LDO_ILIM BIT(6) +#define MPQ7920_MASK_DISCHARGE BIT(5) +#define MPQ7920_MASK_MODE 0xc0 +#define MPQ7920_MASK_SOFTSTART 0x0c +#define MPQ7920_MASK_SWITCH_FREQ 0x30 +#define MPQ7920_MASK_BUCK_PHASE_DEALY 0x30 +#define MPQ7920_MASK_DVS_SLEWRATE 0xc0 +#define MPQ7920_MASK_OVP 0x40 +#define MPQ7920_OVP_DISABLE ~(0x40) +#define MPQ7920_DISCHARGE_ON BIT(5) + +#define MPQ7920_REGULATOR_EN_OFFSET 7 + +/* values in mV */ +#define MPQ7920_BUCK_VOLT_MIN 400000 +#define MPQ7920_LDO_VOLT_MIN 650000 +#define MPQ7920_VOLT_MAX 3587500 +#define MPQ7920_VOLT_STEP 12500 + +#endif /* __MPQ7920_H__ */ diff --git a/drivers/regulator/mt6311-regulator.c b/drivers/regulator/mt6311-regulator.c new file mode 100644 index 000000000..1d457d1fd --- /dev/null +++ b/drivers/regulator/mt6311-regulator.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2015 MediaTek Inc. +// Author: Henry Chen + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mt6311-regulator.h" + +static const struct regmap_config mt6311_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MT6311_FQMTR_CON4, + .cache_type = REGCACHE_MAPLE, +}; + +/* Default limits measured in millivolts and milliamps */ +#define MT6311_MIN_UV 600000 +#define MT6311_MAX_UV 1393750 +#define MT6311_STEP_UV 6250 + +static const struct regulator_ops mt6311_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6311_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define MT6311_BUCK(_id) \ +{\ + .name = #_id,\ + .ops = &mt6311_buck_ops,\ + .of_match = of_match_ptr(#_id),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .id = MT6311_ID_##_id,\ + .n_voltages = (MT6311_MAX_UV - MT6311_MIN_UV) / MT6311_STEP_UV + 1,\ + .min_uV = MT6311_MIN_UV,\ + .uV_step = MT6311_STEP_UV,\ + .owner = THIS_MODULE,\ + .enable_reg = MT6311_VDVFS11_CON9,\ + .enable_mask = MT6311_PMIC_VDVFS11_EN_MASK,\ + .vsel_reg = MT6311_VDVFS11_CON12,\ + .vsel_mask = MT6311_PMIC_VDVFS11_VOSEL_MASK,\ +} + +#define MT6311_LDO(_id) \ +{\ + .name = #_id,\ + .ops = &mt6311_ldo_ops,\ + .of_match = of_match_ptr(#_id),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .id = MT6311_ID_##_id,\ + .owner = THIS_MODULE,\ + .enable_reg = MT6311_LDO_CON3,\ + .enable_mask = MT6311_PMIC_RG_VBIASN_EN_MASK,\ +} + +static const struct regulator_desc mt6311_regulators[] = { + MT6311_BUCK(VDVFS), + MT6311_LDO(VBIASN), +}; + +/* + * I2C driver interface functions + */ +static int mt6311_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + int i, ret; + unsigned int data; + + regmap = devm_regmap_init_i2c(i2c, &mt6311_regmap_config); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + ret = regmap_read(regmap, MT6311_SWCID, &data); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read DEVICE_ID reg: %d\n", ret); + return ret; + } + + switch (data) { + case MT6311_E1_CID_CODE: + case MT6311_E2_CID_CODE: + case MT6311_E3_CID_CODE: + break; + default: + dev_err(&i2c->dev, "Unsupported device id = 0x%x.\n", data); + return -ENODEV; + } + + for (i = 0; i < MT6311_MAX_REGULATORS; i++) { + config.dev = &i2c->dev; + config.regmap = regmap; + + rdev = devm_regulator_register(&i2c->dev, + &mt6311_regulators[i], &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, + "Failed to register MT6311 regulator\n"); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct i2c_device_id mt6311_i2c_id[] = { + { .name = "mt6311" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mt6311_i2c_id); + +#ifdef CONFIG_OF +static const struct of_device_id mt6311_dt_ids[] = { + { .compatible = "mediatek,mt6311-regulator", + .data = &mt6311_i2c_id[0] }, + {}, +}; +MODULE_DEVICE_TABLE(of, mt6311_dt_ids); +#endif + +static struct i2c_driver mt6311_regulator_driver = { + .driver = { + .name = "mt6311", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(mt6311_dt_ids), + }, + .probe = mt6311_i2c_probe, + .id_table = mt6311_i2c_id, +}; + +module_i2c_driver(mt6311_regulator_driver); + +MODULE_AUTHOR("Henry Chen "); +MODULE_DESCRIPTION("Regulator device driver for Mediatek MT6311"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mt6311-regulator.h b/drivers/regulator/mt6311-regulator.h new file mode 100644 index 000000000..4904d6751 --- /dev/null +++ b/drivers/regulator/mt6311-regulator.h @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Henry Chen + */ + +#ifndef __MT6311_REGULATOR_H__ +#define __MT6311_REGULATOR_H__ + +#define MT6311_SWCID 0x01 + +#define MT6311_TOP_INT_CON 0x18 +#define MT6311_TOP_INT_MON 0x19 + +#define MT6311_VDVFS11_CON0 0x87 +#define MT6311_VDVFS11_CON7 0x88 +#define MT6311_VDVFS11_CON8 0x89 +#define MT6311_VDVFS11_CON9 0x8A +#define MT6311_VDVFS11_CON10 0x8B +#define MT6311_VDVFS11_CON11 0x8C +#define MT6311_VDVFS11_CON12 0x8D +#define MT6311_VDVFS11_CON13 0x8E +#define MT6311_VDVFS11_CON14 0x8F +#define MT6311_VDVFS11_CON15 0x90 +#define MT6311_VDVFS11_CON16 0x91 +#define MT6311_VDVFS11_CON17 0x92 +#define MT6311_VDVFS11_CON18 0x93 +#define MT6311_VDVFS11_CON19 0x94 + +#define MT6311_LDO_CON0 0xCC +#define MT6311_LDO_OCFB0 0xCD +#define MT6311_LDO_CON2 0xCE +#define MT6311_LDO_CON3 0xCF +#define MT6311_LDO_CON4 0xD0 +#define MT6311_FQMTR_CON0 0xD1 +#define MT6311_FQMTR_CON1 0xD2 +#define MT6311_FQMTR_CON2 0xD3 +#define MT6311_FQMTR_CON3 0xD4 +#define MT6311_FQMTR_CON4 0xD5 + +#define MT6311_PMIC_RG_INT_POL_MASK 0x1 +#define MT6311_PMIC_RG_INT_EN_MASK 0x2 +#define MT6311_PMIC_RG_BUCK_OC_INT_STATUS_MASK 0x10 + +#define MT6311_PMIC_VDVFS11_EN_CTRL_MASK 0x1 +#define MT6311_PMIC_VDVFS11_VOSEL_CTRL_MASK 0x2 +#define MT6311_PMIC_VDVFS11_EN_SEL_MASK 0x3 +#define MT6311_PMIC_VDVFS11_VOSEL_SEL_MASK 0xc +#define MT6311_PMIC_VDVFS11_EN_MASK 0x1 +#define MT6311_PMIC_VDVFS11_VOSEL_MASK 0x7F +#define MT6311_PMIC_VDVFS11_VOSEL_ON_MASK 0x7F +#define MT6311_PMIC_VDVFS11_VOSEL_SLEEP_MASK 0x7F +#define MT6311_PMIC_NI_VDVFS11_VOSEL_MASK 0x7F + +#define MT6311_PMIC_RG_VBIASN_EN_MASK 0x1 + +#endif diff --git a/drivers/regulator/mt6315-regulator.c b/drivers/regulator/mt6315-regulator.c new file mode 100644 index 000000000..231e64fb0 --- /dev/null +++ b/drivers/regulator/mt6315-regulator.c @@ -0,0 +1,302 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2021 MediaTek Inc. + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MT6315_BUCK_MODE_AUTO 0 +#define MT6315_BUCK_MODE_FORCE_PWM 1 +#define MT6315_BUCK_MODE_LP 2 + +struct mt6315_regulator_info { + struct regulator_desc desc; + u32 status_reg; + u32 lp_mode_mask; + u32 lp_mode_shift; +}; + +struct mt_regulator_init_data { + u32 modeset_mask[MT6315_VBUCK_MAX]; +}; + +struct mt6315_chip { + struct device *dev; + struct regmap *regmap; +}; + +#define MT_BUCK(_name, _bid, _supply, _vsel) \ +[_bid] = { \ + .desc = { \ + .name = _name, \ + .supply_name = _supply, \ + .of_match = of_match_ptr(_name), \ + .regulators_node = "regulators", \ + .ops = &mt6315_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _bid, \ + .owner = THIS_MODULE, \ + .n_voltages = 0xc0, \ + .linear_ranges = mt_volt_range1, \ + .n_linear_ranges = ARRAY_SIZE(mt_volt_range1), \ + .vsel_reg = _vsel, \ + .vsel_mask = 0xff, \ + .enable_reg = MT6315_BUCK_TOP_CON0, \ + .enable_mask = BIT(_bid), \ + .of_map_mode = mt6315_map_mode, \ + }, \ + .status_reg = _bid##_DBG4, \ + .lp_mode_mask = BIT(_bid), \ + .lp_mode_shift = _bid, \ +} + +static const struct linear_range mt_volt_range1[] = { + REGULATOR_LINEAR_RANGE(0, 0, 0xbf, 6250), +}; + +static unsigned int mt6315_map_mode(unsigned int mode) +{ + switch (mode) { + case MT6315_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case MT6315_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case MT6315_BUCK_MODE_LP: + return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int mt6315_regulator_get_mode(struct regulator_dev *rdev) +{ + struct mt_regulator_init_data *init = rdev_get_drvdata(rdev); + const struct mt6315_regulator_info *info; + int ret, regval; + u32 modeset_mask; + + info = container_of_const(rdev->desc, struct mt6315_regulator_info, desc); + modeset_mask = init->modeset_mask[rdev_get_id(rdev)]; + ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_4PHASE_ANA_CON42, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get mode: %d\n", ret); + return ret; + } + + if ((regval & modeset_mask) == modeset_mask) + return REGULATOR_MODE_FAST; + + ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_CON1, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret); + return ret; + } + + if (regval & info->lp_mode_mask) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int mt6315_regulator_set_mode(struct regulator_dev *rdev, + u32 mode) +{ + struct mt_regulator_init_data *init = rdev_get_drvdata(rdev); + const struct mt6315_regulator_info *info; + int ret, val, curr_mode; + u32 modeset_mask; + + info = container_of_const(rdev->desc, struct mt6315_regulator_info, desc); + modeset_mask = init->modeset_mask[rdev_get_id(rdev)]; + curr_mode = mt6315_regulator_get_mode(rdev); + switch (mode) { + case REGULATOR_MODE_FAST: + ret = regmap_update_bits(rdev->regmap, + MT6315_BUCK_TOP_4PHASE_ANA_CON42, + modeset_mask, + modeset_mask); + break; + case REGULATOR_MODE_NORMAL: + if (curr_mode == REGULATOR_MODE_FAST) { + ret = regmap_update_bits(rdev->regmap, + MT6315_BUCK_TOP_4PHASE_ANA_CON42, + modeset_mask, + 0); + } else if (curr_mode == REGULATOR_MODE_IDLE) { + ret = regmap_update_bits(rdev->regmap, + MT6315_BUCK_TOP_CON1, + info->lp_mode_mask, + 0); + usleep_range(100, 110); + } else { + ret = -EINVAL; + } + break; + case REGULATOR_MODE_IDLE: + val = MT6315_BUCK_MODE_LP >> 1; + val <<= info->lp_mode_shift; + ret = regmap_update_bits(rdev->regmap, + MT6315_BUCK_TOP_CON1, + info->lp_mode_mask, + val); + break; + default: + ret = -EINVAL; + dev_err(&rdev->dev, "Unsupported mode: %d\n", mode); + break; + } + + if (ret != 0) { + dev_err(&rdev->dev, "Failed to set mode: %d\n", ret); + return ret; + } + + return 0; +} + +static int mt6315_get_status(struct regulator_dev *rdev) +{ + const struct mt6315_regulator_info *info; + int ret; + u32 regval; + + info = container_of_const(rdev->desc, struct mt6315_regulator_info, desc); + ret = regmap_read(rdev->regmap, info->status_reg, ®val); + if (ret < 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & BIT(0)) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops mt6315_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6315_get_status, + .set_mode = mt6315_regulator_set_mode, + .get_mode = mt6315_regulator_get_mode, +}; + +static const struct mt6315_regulator_info mt6315_regulators[MT6315_VBUCK_MAX] = { + MT_BUCK("vbuck1", MT6315_VBUCK1, "pvdd1", MT6315_BUCK_TOP_ELR0), + MT_BUCK("vbuck2", MT6315_VBUCK2, "pvdd2", MT6315_BUCK_TOP_ELR2), + MT_BUCK("vbuck3", MT6315_VBUCK3, "pvdd3", MT6315_BUCK_TOP_ELR4), + MT_BUCK("vbuck4", MT6315_VBUCK4, "pvdd4", MT6315_BUCK_TOP_ELR6), +}; + +static const struct regmap_config mt6315_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x16d0, + .fast_io = true, +}; + +static const struct of_device_id mt6315_of_match[] = { + { + .compatible = "mediatek,mt6315-regulator", + }, { + /* sentinel */ + }, +}; +MODULE_DEVICE_TABLE(of, mt6315_of_match); + +static int mt6315_regulator_probe(struct spmi_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *regmap; + struct mt6315_chip *chip; + struct mt_regulator_init_data *init_data; + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + regmap = devm_regmap_init_spmi_ext(pdev, &mt6315_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + chip = devm_kzalloc(dev, sizeof(struct mt6315_chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + init_data = devm_kzalloc(dev, sizeof(struct mt_regulator_init_data), GFP_KERNEL); + if (!init_data) + return -ENOMEM; + + switch (pdev->usid) { + case MT6315_PP: + init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2) | + BIT(MT6315_VBUCK4); + break; + case MT6315_SP: + case MT6315_RP: + init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2); + break; + default: + init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1); + break; + } + for (i = MT6315_VBUCK2; i < MT6315_VBUCK_MAX; i++) + init_data->modeset_mask[i] = BIT(i); + + chip->dev = dev; + chip->regmap = regmap; + dev_set_drvdata(dev, chip); + + config.dev = dev; + config.regmap = regmap; + for (i = MT6315_VBUCK1; i < MT6315_VBUCK_MAX; i++) { + config.driver_data = init_data; + rdev = devm_regulator_register(dev, &mt6315_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register %s\n", + mt6315_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static void mt6315_regulator_shutdown(struct spmi_device *pdev) +{ + struct mt6315_chip *chip = dev_get_drvdata(&pdev->dev); + int ret = 0; + + ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, PROTECTION_KEY_H); + ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, PROTECTION_KEY); + ret |= regmap_update_bits(chip->regmap, MT6315_TOP2_ELR7, 1, 1); + ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, 0); + ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, 0); + if (ret < 0) + dev_err(&pdev->dev, "[%#x] Failed to enable power off sequence. %d\n", + pdev->usid, ret); +} + +static struct spmi_driver mt6315_regulator_driver = { + .driver = { + .name = "mt6315-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mt6315_of_match, + }, + .probe = mt6315_regulator_probe, + .shutdown = mt6315_regulator_shutdown, +}; + +module_spmi_driver(mt6315_regulator_driver); + +MODULE_AUTHOR("Hsin-Hsiung Wang "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6315 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6316-regulator.c b/drivers/regulator/mt6316-regulator.c new file mode 100644 index 000000000..b170506ee --- /dev/null +++ b/drivers/regulator/mt6316-regulator.c @@ -0,0 +1,346 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2024 MediaTek Inc. +// Copyright (c) 2025 Collabora Ltd +// AngeloGioacchino Del Regno + +#include +#include +#include +#include + +#include +#include +#include + +#define MT6316_BUCK_MODE_AUTO 0 +#define MT6316_BUCK_MODE_FORCE_PWM 1 +#define MT6316_BUCK_MODE_LP 2 + +#define MT6316_CHIP_ID 0x20b +#define MT6316_BUCK_TOP_CON0 0x1440 +#define EN_SET_OFFSET 0x1 +#define EN_CLR_OFFSET 0x2 + +#define MT6316_BUCK_TOP_CON1 0x1443 + +#define MT6316_BUCK_TOP_ELR0 0x1448 +#define MT6316_BUCK_TOP_ELR2 0x144a +#define MT6316_BUCK_TOP_ELR4 0x144c +#define MT6316_BUCK_TOP_ELR6 0x144e +#define MT6316_VSEL_MASK GENMASK(8, 0) + +#define MT6316_VBUCK1_DBG 0x14a8 +#define MT6316_VBUCK2_DBG 0x1528 +#define MT6316_VBUCK3_DBG 0x15a8 +#define MT6316_VBUCK4_DBG 0x1628 +#define MT6316_BUCK_QI BIT(0) + +#define MT6316_BUCK_TOP_4PHASE_TOP_ANA_CON0 0x1688 +#define MT6316_BUCK_TOP_4PHASE_TOP_ELR_0 0x1690 + +enum mt6316_type { + MT6316_TYPE_2PHASE, + MT6316_TYPE_3PHASE, + MT6316_TYPE_4PHASE +}; + +/** + * struct mt6316_regulator_info - MT6316 regulators information + * @desc: Regulator description structure + * @debug_reg: Debug register for regulator status + * @lp_mode_reg: Low Power mode register (normal/idle) + * @lp_mode_mask: Low Power mode regulator mask + * @modeset_reg: AUTO/PWM mode register + * @modeset_mask: AUTO/PWM regulator mask + */ +struct mt6316_regulator_info { + struct regulator_desc desc; + u16 debug_reg; + u16 lp_mode_reg; + u16 lp_mode_mask; + u16 modeset_reg; + u16 modeset_mask; +}; + +#define MT6316_BUCK(match, vreg_id, min, max, step, vs_reg) \ +{ \ + .desc = { \ + .name = match, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6316_vreg_setclr_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min) / step + 1, \ + .min_uV = min, \ + .uV_step = step, \ + .enable_reg = MT6316_BUCK_TOP_CON0, \ + .enable_mask = BIT(vreg_id - 1), \ + .vsel_reg = vs_reg, \ + .vsel_mask = MT6316_VSEL_MASK, \ + .of_map_mode = mt6316_map_mode, \ + }, \ + .lp_mode_reg = MT6316_BUCK_TOP_CON1, \ + .lp_mode_mask = BIT(vreg_id - 1), \ + .modeset_reg = MT6316_BUCK_TOP_4PHASE_TOP_ANA_CON0, \ + .modeset_mask = BIT(vreg_id - 1), \ + .debug_reg = MT6316_VBUCK##vreg_id##_DBG, \ +} + +/* Values in some MT6316 registers are big endian, 9 bits long... */ +static inline u16 mt6316_be9_to_cpu(u16 val) +{ + return ((val >> 8) & BIT(0)) | ((val & GENMASK(7, 0)) << 1); +} + +static inline u16 mt6316_cpu_to_be9(u16 val) +{ + return ((val & BIT(0)) << 8) | (val >> 1); +} + +static unsigned int mt6316_map_mode(u32 mode) +{ + switch (mode) { + case MT6316_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case MT6316_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case MT6316_BUCK_MODE_LP: + return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int mt6316_vreg_enable_setclr(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_SET_OFFSET, + rdev->desc->enable_mask); +} + +static int mt6316_vreg_disable_setclr(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_CLR_OFFSET, + rdev->desc->enable_mask); +} + +static int mt6316_regulator_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector) +{ + u16 val = mt6316_cpu_to_be9(selector); + + return regmap_bulk_write(rdev->regmap, rdev->desc->vsel_reg, &val, sizeof(val)); +} + +static int mt6316_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + u16 val; + int ret; + + ret = regmap_bulk_read(rdev->regmap, rdev->desc->vsel_reg, &val, sizeof(val)); + if (ret) + return ret; + + return mt6316_be9_to_cpu(val & rdev->desc->vsel_mask); +} + +static int mt6316_regulator_get_status(struct regulator_dev *rdev) +{ + struct mt6316_regulator_info *info = rdev_get_drvdata(rdev); + u32 val; + int ret; + + ret = regmap_read(rdev->regmap, info->debug_reg, &val); + if (ret) + return ret; + + return val & MT6316_BUCK_QI ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static unsigned int mt6316_regulator_get_mode(struct regulator_dev *rdev) +{ + struct mt6316_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret) { + dev_err(&rdev->dev, "Failed to get mode: %d\n", ret); + return ret; + } + + if ((val & info->modeset_mask) == info->modeset_mask) + return REGULATOR_MODE_FAST; + + ret = regmap_read(rdev->regmap, info->lp_mode_reg, &val); + val &= info->lp_mode_mask; + if (ret) { + dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret); + return ret; + } + + return val ? REGULATOR_MODE_IDLE : REGULATOR_MODE_NORMAL; +} + +static int mt6316_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct mt6316_regulator_info *info = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev->regmap; + int cur_mode, ret; + + switch (mode) { + case REGULATOR_MODE_FAST: + ret = regmap_set_bits(regmap, info->modeset_reg, info->modeset_mask); + break; + case REGULATOR_MODE_NORMAL: + cur_mode = mt6316_regulator_get_mode(rdev); + if (cur_mode < 0) { + ret = cur_mode; + break; + } + + if (cur_mode == REGULATOR_MODE_FAST) { + ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask); + break; + } else if (cur_mode == REGULATOR_MODE_IDLE) { + ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); + if (ret == 0) + usleep_range(100, 200); + } else { + ret = 0; + } + break; + case REGULATOR_MODE_IDLE: + ret = regmap_set_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); + break; + default: + ret = -EINVAL; + } + + if (ret) { + dev_err(&rdev->dev, "Failed to set mode %u: %d\n", mode, ret); + return ret; + } + + return 0; +} + +static const struct regulator_ops mt6316_vreg_setclr_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = mt6316_regulator_set_voltage_sel, + .get_voltage_sel = mt6316_regulator_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = mt6316_vreg_enable_setclr, + .disable = mt6316_vreg_disable_setclr, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6316_regulator_get_status, + .set_mode = mt6316_regulator_set_mode, + .get_mode = mt6316_regulator_get_mode, +}; + +/* MT6316BP/VP - 2+2 phase buck */ +static struct mt6316_regulator_info mt6316bv_regulators[] = { + MT6316_BUCK("vbuck12", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0), + MT6316_BUCK("vbuck34", 3, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR4), +}; + +/* MT6316CP/HP/KP - 3+1 phase buck */ +static struct mt6316_regulator_info mt6316chk_regulators[] = { + MT6316_BUCK("vbuck124", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0), + MT6316_BUCK("vbuck3", 3, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR4), +}; + +/* MT6316DP/TP - 4 phase buck */ +static struct mt6316_regulator_info mt6316dt_regulators[] = { + MT6316_BUCK("vbuck1234", 1, 0, 1277500, 2500, MT6316_BUCK_TOP_ELR0), +}; + +static const struct regmap_config mt6316_spmi_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x1700, + .fast_io = true, +}; + +static int mt6316_regulator_probe(struct spmi_device *sdev) +{ + struct regulator_config config = {}; + struct mt6316_regulator_info *info; + struct regulator_dev *rdev; + enum mt6316_type type; + int num_vregs, ret; + unsigned int i; + u32 chip_id; + + config.regmap = devm_regmap_init_spmi_ext(sdev, &mt6316_spmi_regmap_config); + if (IS_ERR(config.regmap)) + return PTR_ERR(config.regmap); + + /* + * The first read is expected to fail: this PMIC needs to be woken up + * and that can be done with any activity over the SPMI bus. + */ + regmap_read(config.regmap, MT6316_CHIP_ID, &chip_id); + + /* The second read, instead, shall not fail! */ + ret = regmap_read(config.regmap, MT6316_CHIP_ID, &chip_id); + if (ret) { + dev_err(&sdev->dev, "Cannot read Chip ID!\n"); + return ret; + } + dev_dbg(&sdev->dev, "Chip ID: 0x%x\n", chip_id); + + config.dev = &sdev->dev; + + type = (uintptr_t)device_get_match_data(&sdev->dev); + switch (type) { + case MT6316_TYPE_2PHASE: + info = mt6316bv_regulators; + num_vregs = ARRAY_SIZE(mt6316bv_regulators); + break; + case MT6316_TYPE_3PHASE: + info = mt6316chk_regulators; + num_vregs = ARRAY_SIZE(mt6316chk_regulators); + break; + case MT6316_TYPE_4PHASE: + info = mt6316dt_regulators; + num_vregs = ARRAY_SIZE(mt6316dt_regulators); + break; + default: + return -EINVAL; + } + + for (i = 0; i < num_vregs; i++) { + config.driver_data = &info[i]; + + rdev = devm_regulator_register(&sdev->dev, &info[i].desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&sdev->dev, PTR_ERR(rdev), + "failed to register %s\n", info[i].desc.name); + } + + return 0; +} + +static const struct of_device_id mt6316_regulator_match[] = { + { .compatible = "mediatek,mt6316b-regulator", .data = (void *)MT6316_TYPE_2PHASE }, + { .compatible = "mediatek,mt6316c-regulator", .data = (void *)MT6316_TYPE_3PHASE }, + { .compatible = "mediatek,mt6316d-regulator", .data = (void *)MT6316_TYPE_4PHASE }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mt6316_regulator_match); + +static struct spmi_driver mt6316_regulator_driver = { + .driver = { + .name = "mt6316-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mt6316_regulator_match, + }, + .probe = mt6316_regulator_probe, +}; +module_spmi_driver(mt6316_regulator_driver); + +MODULE_AUTHOR("AngeloGioacchino Del Regno "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6316 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6323-regulator.c b/drivers/regulator/mt6323-regulator.c new file mode 100644 index 000000000..bac226812 --- /dev/null +++ b/drivers/regulator/mt6323-regulator.c @@ -0,0 +1,422 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2016 MediaTek Inc. +// Author: Chen Zhong + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MT6323_LDO_MODE_NORMAL 0 +#define MT6323_LDO_MODE_LP 1 + +/* + * MT6323 regulators' information + * + * @desc: standard fields of regulator description. + * @qi: Mask for query enable signal status of regulators + * @vselon_reg: Register sections for hardware control mode of bucks + * @vselctrl_reg: Register for controlling the buck control mode. + * @vselctrl_mask: Mask for query buck's voltage control mode. + */ +struct mt6323_regulator_info { + struct regulator_desc desc; + u32 qi; + u32 vselon_reg; + u32 vselctrl_reg; + u32 vselctrl_mask; + u32 modeset_reg; + u32 modeset_mask; +}; + +#define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ + vosel, vosel_mask, voselon, vosel_ctrl) \ +[MT6323_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6323_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6323_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min)/step + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .qi = BIT(13), \ + .vselon_reg = voselon, \ + .vselctrl_reg = vosel_ctrl, \ + .vselctrl_mask = BIT(1), \ +} + +#define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask, _modeset_reg, _modeset_mask) \ +[MT6323_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6323_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6323_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .qi = BIT(15), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +#define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \ + _modeset_reg, _modeset_mask) \ +[MT6323_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6323_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6323_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + }, \ + .qi = BIT(15), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), +}; + +static const unsigned int ldo_volt_table1[] = { + 3300000, 3400000, 3500000, 3600000, +}; + +static const unsigned int ldo_volt_table2[] = { + 1500000, 1800000, 2500000, 2800000, +}; + +static const unsigned int ldo_volt_table3[] = { + 1800000, 3300000, +}; + +static const unsigned int ldo_volt_table4[] = { + 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table5[] = { + 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table6[] = { + 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000, +}; + +static const unsigned int ldo_volt_table7[] = { + 1200000, 1300000, 1500000, 1800000, +}; + +static const unsigned int ldo_volt_table8[] = { + 1800000, 3000000, +}; + +static const unsigned int ldo_volt_table9[] = { + 1200000, 1350000, 1500000, 1800000, +}; + +static const unsigned int ldo_volt_table10[] = { + 1200000, 1300000, 1500000, 1800000, +}; + +static int mt6323_get_status(struct regulator_dev *rdev) +{ + int ret; + u32 regval; + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + int ret, val = 0; + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); + + if (!info->modeset_mask) { + dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n", + info->desc.name); + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_STANDBY: + val = MT6323_LDO_MODE_LP; + break; + case REGULATOR_MODE_NORMAL: + val = MT6323_LDO_MODE_NORMAL; + break; + default: + return -EINVAL; + } + + val <<= ffs(info->modeset_mask) - 1; + + ret = regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); + + return ret; +} + +static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + unsigned int mode; + int ret; + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); + + if (!info->modeset_mask) { + dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n", + info->desc.name); + return -EINVAL; + } + + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret < 0) + return ret; + + val &= info->modeset_mask; + val >>= ffs(info->modeset_mask) - 1; + + if (val & 0x1) + mode = REGULATOR_MODE_STANDBY; + else + mode = REGULATOR_MODE_NORMAL; + + return mode; +} + +static const struct regulator_ops mt6323_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6323_get_status, +}; + +static const struct regulator_ops mt6323_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6323_get_status, + .set_mode = mt6323_ldo_set_mode, + .get_mode = mt6323_ldo_get_mode, +}; + +static const struct regulator_ops mt6323_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6323_get_status, + .set_mode = mt6323_ldo_set_mode, + .get_mode = mt6323_ldo_get_mode, +}; + +/* The array is indexed by id(MT6323_ID_XXX) */ +static struct mt6323_regulator_info mt6323_regulators[] = { + MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250, + buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f, + MT6323_VPROC_CON10, MT6323_VPROC_CON5), + MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500, + buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f, + MT6323_VSYS_CON10, MT6323_VSYS_CON5), + MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, + buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9, + 0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5), + MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000, + MT6323_ANALDO_CON1, 0x2), + MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000, + MT6323_ANALDO_CON20, 0x2), + MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1, + MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC, + MT6323_ANALDO_CON21, 0x2), + MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1, + MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC, + MT6323_ANALDO_CON21, 0x2), + MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000, + MT6323_ANALDO_CON2, 0x2), + MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2, + MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0), + MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000, + MT6323_DIGLDO_CON0, 0x2), + MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000, + MT6323_DIGLDO_CON2, 0x2), + MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3, + MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10, + MT6323_DIGLDO_CON3, 0x2), + MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4, + MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80, + MT6323_DIGLDO_CON5, 0x2), + MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4, + MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80, + MT6323_DIGLDO_CON6, 0x2), + MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5, + MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0, + MT6323_DIGLDO_CON7, 0x2), + MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6, + MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0, + MT6323_DIGLDO_CON8, 0x2), + MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7, + MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60, + MT6323_DIGLDO_CON9, 0x2), + MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000, + MT6323_DIGLDO_CON11, 0x2), + MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8, + MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20, + MT6323_DIGLDO_CON13, 0x2), + MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8, + MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20, + MT6323_DIGLDO_CON14, 0x2), + MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000, + -1, 0), + MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5, + MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0, + MT6323_DIGLDO_CON31, 0x2), + MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5, + MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0, + MT6323_DIGLDO_CON39, 0x2), + MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000, + MT6323_DIGLDO_CON45, 0x2), + MT6323_LDO("ldo_vm", VM, ldo_volt_table9, + MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30, + MT6323_DIGLDO_CON47, 0x2), + MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000, + MT6323_DIGLDO_CON49, 0x2), + MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10, + MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60, + MT6323_DIGLDO_CON51, 0x2), + MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000, + MT6323_DIGLDO_CON53, 0x2), +}; + +static int mt6323_set_buck_vosel_reg(struct platform_device *pdev) +{ + struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent); + int i; + u32 regval; + + for (i = 0; i < MT6323_MAX_REGULATOR; i++) { + if (mt6323_regulators[i].vselctrl_reg) { + if (regmap_read(mt6323->regmap, + mt6323_regulators[i].vselctrl_reg, + ®val) < 0) { + dev_err(&pdev->dev, + "Failed to read buck ctrl\n"); + return -EIO; + } + + if (regval & mt6323_regulators[i].vselctrl_mask) { + mt6323_regulators[i].desc.vsel_reg = + mt6323_regulators[i].vselon_reg; + } + } + } + + return 0; +} + +static int mt6323_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + u32 reg_value; + + /* Query buck controller to select activated voltage register part */ + if (mt6323_set_buck_vosel_reg(pdev)) + return -EIO; + + /* Read PMIC chip revision to update constraints and voltage table */ + if (regmap_read(mt6323->regmap, MT6323_CID, ®_value) < 0) { + dev_err(&pdev->dev, "Failed to read Chip ID\n"); + return -EIO; + } + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); + + for (i = 0; i < MT6323_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6323_regulators[i]; + config.regmap = mt6323->regmap; + rdev = devm_regulator_register(&pdev->dev, + &mt6323_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6323_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id mt6323_platform_ids[] = { + { .name = "mt6323-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6323_platform_ids); + +static struct platform_driver mt6323_regulator_driver = { + .driver = { + .name = "mt6323-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6323_regulator_probe, + .id_table = mt6323_platform_ids, +}; + +module_platform_driver(mt6323_regulator_driver); + +MODULE_AUTHOR("Chen Zhong "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6323 PMIC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mt6331-regulator.c b/drivers/regulator/mt6331-regulator.c new file mode 100644 index 000000000..eed9dda04 --- /dev/null +++ b/drivers/regulator/mt6331-regulator.c @@ -0,0 +1,508 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2022 Collabora Ltd. +// Author: AngeloGioacchino Del Regno +// +// Based on mt6323-regulator.c, +// Copyright (c) 2016 MediaTek Inc. +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MT6331_LDO_MODE_NORMAL 0 +#define MT6331_LDO_MODE_LP 1 + +/* + * MT6331 regulators information + * + * @desc: standard fields of regulator description. + * @qi: Mask for query enable signal status of regulators + * @vselon_reg: Register sections for hardware control mode of bucks + * @vselctrl_reg: Register for controlling the buck control mode. + * @vselctrl_mask: Mask for query buck's voltage control mode. + * @status_reg: Register for regulator enable status where qi unavailable + * @status_mask: Mask for querying regulator enable status + */ +struct mt6331_regulator_info { + struct regulator_desc desc; + u32 qi; + u32 vselon_reg; + u32 vselctrl_reg; + u32 vselctrl_mask; + u32 modeset_reg; + u32 modeset_mask; + u32 status_reg; + u32 status_mask; +}; + +#define MT6331_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ + vosel, vosel_mask, voselon, vosel_ctrl) \ +[MT6331_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6331_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6331_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min)/step + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .qi = BIT(13), \ + .vselon_reg = voselon, \ + .vselctrl_reg = vosel_ctrl, \ + .vselctrl_mask = BIT(1), \ + .status_mask = 0, \ +} + +#define MT6331_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ +[MT6331_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6331_volt_table_ao_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6331_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + }, \ +} + +#define MT6331_LDO_S(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask, _modeset_reg, _modeset_mask, \ + _status_reg, _status_mask) \ +[MT6331_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6331_volt_table_no_qi_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6331_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ + .status_reg = _status_reg, \ + .status_mask = _status_mask, \ +} + +#define MT6331_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask, _modeset_reg, _modeset_mask) \ +[MT6331_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = (_modeset_reg ? \ + &mt6331_volt_table_ops : \ + &mt6331_volt_table_no_ms_ops), \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6331_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .qi = BIT(15), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +#define MT6331_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, \ + _modeset_reg, _modeset_mask) \ +[MT6331_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = (_modeset_reg ? \ + &mt6331_volt_fixed_ops : \ + &mt6331_volt_fixed_no_ms_ops), \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6331_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + }, \ + .qi = BIT(qibit), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +static const struct linear_range buck_volt_range[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), +}; + +static const unsigned int ldo_volt_table1[] = { + 2800000, 3000000, 0, 3200000 +}; + +static const unsigned int ldo_volt_table2[] = { + 1500000, 1800000, 2500000, 2800000, +}; + +static const unsigned int ldo_volt_table3[] = { + 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table4[] = { + 0, 0, 1700000, 1800000, 1860000, 2760000, 3000000, 3100000, +}; + +static const unsigned int ldo_volt_table5[] = { + 1800000, 3300000, 1800000, 3300000, +}; + +static const unsigned int ldo_volt_table6[] = { + 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table7[] = { + 1200000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000, +}; + +static const unsigned int ldo_volt_table8[] = { + 900000, 1000000, 1100000, 1220000, 1300000, 1500000, 1500000, 1500000, +}; + +static const unsigned int ldo_volt_table9[] = { + 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1300000, +}; + +static const unsigned int ldo_volt_table10[] = { + 1200000, 1300000, 1500000, 1800000, +}; + +static const unsigned int ldo_volt_table11[] = { + 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, +}; + +static int mt6331_get_status(struct regulator_dev *rdev) +{ + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); + u32 regval; + int ret; + + ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static int mt6331_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); + int val; + + switch (mode) { + case REGULATOR_MODE_STANDBY: + val = MT6331_LDO_MODE_LP; + break; + case REGULATOR_MODE_NORMAL: + val = MT6331_LDO_MODE_NORMAL; + break; + default: + return -EINVAL; + } + + val <<= ffs(info->modeset_mask) - 1; + + return regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); +} + +static unsigned int mt6331_ldo_get_mode(struct regulator_dev *rdev) +{ + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret < 0) + return ret; + + val &= info->modeset_mask; + val >>= ffs(info->modeset_mask) - 1; + + return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops mt6331_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6331_get_status, +}; + +static const struct regulator_ops mt6331_volt_table_no_ms_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6331_get_status, +}; + +static const struct regulator_ops mt6331_volt_table_no_qi_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6331_ldo_set_mode, + .get_mode = mt6331_ldo_get_mode, +}; + +static const struct regulator_ops mt6331_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6331_get_status, + .set_mode = mt6331_ldo_set_mode, + .get_mode = mt6331_ldo_get_mode, +}; + +static const struct regulator_ops mt6331_volt_table_ao_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops mt6331_volt_fixed_no_ms_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6331_get_status, +}; + +static const struct regulator_ops mt6331_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6331_get_status, + .set_mode = mt6331_ldo_set_mode, + .get_mode = mt6331_ldo_get_mode, +}; + +/* The array is indexed by id(MT6331_ID_XXX) */ +static struct mt6331_regulator_info mt6331_regulators[] = { + MT6331_BUCK("buck-vdvfs11", VDVFS11, 700000, 1493750, 6250, + buck_volt_range, MT6331_VDVFS11_CON9, + MT6331_VDVFS11_CON11, GENMASK(6, 0), + MT6331_VDVFS11_CON12, MT6331_VDVFS11_CON7), + MT6331_BUCK("buck-vdvfs12", VDVFS12, 700000, 1493750, 6250, + buck_volt_range, MT6331_VDVFS12_CON9, + MT6331_VDVFS12_CON11, GENMASK(6, 0), + MT6331_VDVFS12_CON12, MT6331_VDVFS12_CON7), + MT6331_BUCK("buck-vdvfs13", VDVFS13, 700000, 1493750, 6250, + buck_volt_range, MT6331_VDVFS13_CON9, + MT6331_VDVFS13_CON11, GENMASK(6, 0), + MT6331_VDVFS13_CON12, MT6331_VDVFS13_CON7), + MT6331_BUCK("buck-vdvfs14", VDVFS14, 700000, 1493750, 6250, + buck_volt_range, MT6331_VDVFS14_CON9, + MT6331_VDVFS14_CON11, GENMASK(6, 0), + MT6331_VDVFS14_CON12, MT6331_VDVFS14_CON7), + MT6331_BUCK("buck-vcore2", VCORE2, 700000, 1493750, 6250, + buck_volt_range, MT6331_VCORE2_CON9, + MT6331_VCORE2_CON11, GENMASK(6, 0), + MT6331_VCORE2_CON12, MT6331_VCORE2_CON7), + MT6331_REG_FIXED("buck-vio18", VIO18, MT6331_VIO18_CON9, 0, 13, 1800000, 0, 0), + MT6331_REG_FIXED("ldo-vrtc", VRTC, MT6331_DIGLDO_CON11, 8, 15, 2800000, 0, 0), + MT6331_REG_FIXED("ldo-vtcxo1", VTCXO1, MT6331_ANALDO_CON1, 10, 15, 2800000, + MT6331_ANALDO_CON1, GENMASK(1, 0)), + MT6331_REG_FIXED("ldo-vtcxo2", VTCXO2, MT6331_ANALDO_CON2, 10, 15, 2800000, + MT6331_ANALDO_CON2, GENMASK(1, 0)), + MT6331_REG_FIXED("ldo-vsram", VSRAM_DVFS1, MT6331_SYSLDO_CON4, 10, 15, 1012500, + MT6331_SYSLDO_CON4, GENMASK(1, 0)), + MT6331_REG_FIXED("ldo-vio28", VIO28, MT6331_DIGLDO_CON1, 10, 15, 2800000, + MT6331_DIGLDO_CON1, GENMASK(1, 0)), + MT6331_LDO("ldo-avdd32aud", AVDD32_AUD, ldo_volt_table1, MT6331_ANALDO_CON3, 10, + MT6331_ANALDO_CON10, GENMASK(6, 5), MT6331_ANALDO_CON3, GENMASK(1, 0)), + MT6331_LDO("ldo-vauxa32", VAUXA32, ldo_volt_table1, MT6331_ANALDO_CON4, 10, + MT6331_ANALDO_CON6, GENMASK(6, 5), MT6331_ANALDO_CON4, GENMASK(1, 0)), + MT6331_LDO("ldo-vemc33", VEMC33, ldo_volt_table6, MT6331_DIGLDO_CON5, 10, + MT6331_DIGLDO_CON17, BIT(6), MT6331_DIGLDO_CON5, GENMASK(1, 0)), + MT6331_LDO("ldo-vibr", VIBR, ldo_volt_table3, MT6331_DIGLDO_CON12, 10, + MT6331_DIGLDO_CON20, GENMASK(6, 4), MT6331_DIGLDO_CON12, GENMASK(1, 0)), + MT6331_LDO("ldo-vmc", VMC, ldo_volt_table5, MT6331_DIGLDO_CON3, 10, + MT6331_DIGLDO_CON15, GENMASK(5, 4), MT6331_DIGLDO_CON3, GENMASK(1, 0)), + MT6331_LDO("ldo-vmch", VMCH, ldo_volt_table6, MT6331_DIGLDO_CON4, 10, + MT6331_DIGLDO_CON16, BIT(6), MT6331_DIGLDO_CON4, GENMASK(1, 0)), + MT6331_LDO("ldo-vmipi", VMIPI, ldo_volt_table3, MT6331_SYSLDO_CON5, 10, + MT6331_SYSLDO_CON13, GENMASK(5, 3), MT6331_SYSLDO_CON5, GENMASK(1, 0)), + MT6331_LDO("ldo-vsim1", VSIM1, ldo_volt_table4, MT6331_DIGLDO_CON8, 10, + MT6331_DIGLDO_CON21, GENMASK(6, 4), MT6331_DIGLDO_CON8, GENMASK(1, 0)), + MT6331_LDO("ldo-vsim2", VSIM2, ldo_volt_table4, MT6331_DIGLDO_CON9, 10, + MT6331_DIGLDO_CON22, GENMASK(6, 4), MT6331_DIGLDO_CON9, GENMASK(1, 0)), + MT6331_LDO("ldo-vusb10", VUSB10, ldo_volt_table9, MT6331_SYSLDO_CON2, 10, + MT6331_SYSLDO_CON10, GENMASK(5, 3), MT6331_SYSLDO_CON2, GENMASK(1, 0)), + MT6331_LDO("ldo-vcama", VCAMA, ldo_volt_table2, MT6331_ANALDO_CON5, 15, + MT6331_ANALDO_CON9, GENMASK(5, 4), 0, 0), + MT6331_LDO_S("ldo-vcamaf", VCAM_AF, ldo_volt_table3, MT6331_DIGLDO_CON2, 10, + MT6331_DIGLDO_CON14, GENMASK(6, 4), MT6331_DIGLDO_CON2, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(0)), + MT6331_LDO_S("ldo-vcamd", VCAMD, ldo_volt_table8, MT6331_SYSLDO_CON1, 15, + MT6331_SYSLDO_CON9, GENMASK(6, 4), MT6331_SYSLDO_CON1, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(11)), + MT6331_LDO_S("ldo-vcamio", VCAM_IO, ldo_volt_table10, MT6331_SYSLDO_CON3, 10, + MT6331_SYSLDO_CON11, GENMASK(4, 3), MT6331_SYSLDO_CON3, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(13)), + MT6331_LDO_S("ldo-vgp1", VGP1, ldo_volt_table3, MT6331_DIGLDO_CON6, 10, + MT6331_DIGLDO_CON19, GENMASK(6, 4), MT6331_DIGLDO_CON6, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(4)), + MT6331_LDO_S("ldo-vgp2", VGP2, ldo_volt_table10, MT6331_SYSLDO_CON6, 10, + MT6331_SYSLDO_CON14, GENMASK(4, 3), MT6331_SYSLDO_CON6, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(15)), + MT6331_LDO_S("ldo-vgp3", VGP3, ldo_volt_table10, MT6331_SYSLDO_CON7, 10, + MT6331_SYSLDO_CON15, GENMASK(4, 3), MT6331_SYSLDO_CON7, GENMASK(1, 0), + MT6331_EN_STATUS2, BIT(0)), + MT6331_LDO_S("ldo-vgp4", VGP4, ldo_volt_table7, MT6331_DIGLDO_CON7, 10, + MT6331_DIGLDO_CON18, GENMASK(6, 4), MT6331_DIGLDO_CON7, GENMASK(1, 0), + MT6331_EN_STATUS1, BIT(5)), + MT6331_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table11, + MT6331_DIGLDO_CON28, GENMASK(14, 12)), +}; + +static int mt6331_set_buck_vosel_reg(struct platform_device *pdev) +{ + struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent); + int i; + u32 regval; + + for (i = 0; i < MT6331_ID_VREG_MAX; i++) { + if (mt6331_regulators[i].vselctrl_reg) { + if (regmap_read(mt6331->regmap, + mt6331_regulators[i].vselctrl_reg, + ®val) < 0) { + dev_err(&pdev->dev, + "Failed to read buck ctrl\n"); + return -EIO; + } + + if (regval & mt6331_regulators[i].vselctrl_mask) { + mt6331_regulators[i].desc.vsel_reg = + mt6331_regulators[i].vselon_reg; + } + } + } + + return 0; +} + +static int mt6331_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + u32 reg_value; + + /* Query buck controller to select activated voltage register part */ + if (mt6331_set_buck_vosel_reg(pdev)) + return -EIO; + + /* Read PMIC chip revision to update constraints and voltage table */ + if (regmap_read(mt6331->regmap, MT6331_HWCID, ®_value) < 0) { + dev_err(&pdev->dev, "Failed to read Chip ID\n"); + return -EIO; + } + reg_value &= GENMASK(7, 0); + + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); + + /* + * ChipID 0x10 is "MT6331 E1", has a different voltage table and + * it's currently not supported in this driver. Upon detection of + * this ID, refuse to register the regulators, as we will wrongly + * interpret the VSEL for this revision, potentially overvolting + * some device. + */ + if (reg_value == 0x10) { + dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n"); + return -EINVAL; + } + + for (i = 0; i < MT6331_ID_VREG_MAX; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6331_regulators[i]; + config.regmap = mt6331->regmap; + rdev = devm_regulator_register(&pdev->dev, + &mt6331_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6331_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id mt6331_platform_ids[] = { + { .name = "mt6331-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6331_platform_ids); + +static struct platform_driver mt6331_regulator_driver = { + .driver = { + .name = "mt6331-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6331_regulator_probe, + .id_table = mt6331_platform_ids, +}; + +module_platform_driver(mt6331_regulator_driver); + +MODULE_AUTHOR("AngeloGioacchino Del Regno "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6331 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6332-regulator.c b/drivers/regulator/mt6332-regulator.c new file mode 100644 index 000000000..949fde376 --- /dev/null +++ b/drivers/regulator/mt6332-regulator.c @@ -0,0 +1,423 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2022 Collabora Ltd. +// Author: AngeloGioacchino Del Regno +// +// Based on mt6323-regulator.c, +// Copyright (c) 2016 MediaTek Inc. +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MT6332_LDO_MODE_NORMAL 0 +#define MT6332_LDO_MODE_LP 1 + +/* + * MT6332 regulators information + * + * @desc: standard fields of regulator description. + * @qi: Mask for query enable signal status of regulators + * @vselon_reg: Register sections for hardware control mode of bucks + * @vselctrl_reg: Register for controlling the buck control mode. + * @vselctrl_mask: Mask for query buck's voltage control mode. + * @status_reg: Register for regulator enable status where qi unavailable + * @status_mask: Mask for querying regulator enable status + */ +struct mt6332_regulator_info { + struct regulator_desc desc; + u32 qi; + u32 vselon_reg; + u32 vselctrl_reg; + u32 vselctrl_mask; + u32 modeset_reg; + u32 modeset_mask; + u32 status_reg; + u32 status_mask; +}; + +#define MT6332_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ + vosel, vosel_mask, voselon, vosel_ctrl) \ +[MT6332_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6332_buck_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6332_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min)/step + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .qi = BIT(13), \ + .vselon_reg = voselon, \ + .vselctrl_reg = vosel_ctrl, \ + .vselctrl_mask = BIT(1), \ + .status_mask = 0, \ +} + +#define MT6332_LDO_LINEAR(match, vreg, min, max, step, volt_ranges, \ + enreg, vosel, vosel_mask, voselon, \ + vosel_ctrl, _modeset_reg, _modeset_mask) \ +[MT6332_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6332_ldo_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6332_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min)/step + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .qi = BIT(15), \ + .vselon_reg = voselon, \ + .vselctrl_reg = vosel_ctrl, \ + .vselctrl_mask = BIT(1), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ + .status_mask = 0, \ +} + +#define MT6332_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ +[MT6332_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6332_volt_table_ao_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6332_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + }, \ +} + +#define MT6332_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask, _modeset_reg, _modeset_mask) \ +[MT6332_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6332_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6332_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .qi = BIT(15), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ + .status_mask = 0, \ +} + +#define MT6332_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, stbit) \ +[MT6332_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6332_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6332_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + }, \ + .qi = BIT(qibit), \ + .status_reg = MT6332_EN_STATUS0, \ + .status_mask = BIT(stbit), \ +} + +static const struct linear_range boost_volt_range[] = { + REGULATOR_LINEAR_RANGE(3500000, 0, 0x7f, 31250), +}; + +static const struct linear_range buck_volt_range[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_pa_volt_range[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), +}; + +static const struct linear_range buck_rf_volt_range[] = { + REGULATOR_LINEAR_RANGE(1050000, 0, 0x7f, 9375), +}; + +static const unsigned int ldo_volt_table1[] = { + 2800000, 3000000, 0, 3200000 +}; + +static const unsigned int ldo_volt_table2[] = { + 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, +}; + +static int mt6332_get_status(struct regulator_dev *rdev) +{ + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); + u32 reg, en_mask, regval; + int ret; + + if (info->qi > 0) { + reg = info->desc.enable_reg; + en_mask = info->qi; + } else { + reg = info->status_reg; + en_mask = info->status_mask; + } + + ret = regmap_read(rdev->regmap, reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & en_mask) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static int mt6332_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); + int val; + + switch (mode) { + case REGULATOR_MODE_STANDBY: + val = MT6332_LDO_MODE_LP; + break; + case REGULATOR_MODE_NORMAL: + val = MT6332_LDO_MODE_NORMAL; + break; + default: + return -EINVAL; + } + + val <<= ffs(info->modeset_mask) - 1; + + return regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); +} + +static unsigned int mt6332_ldo_get_mode(struct regulator_dev *rdev) +{ + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret < 0) + return ret; + + val &= info->modeset_mask; + val >>= ffs(info->modeset_mask) - 1; + + return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops mt6332_buck_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6332_get_status, +}; + +static const struct regulator_ops mt6332_ldo_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6332_get_status, + .set_mode = mt6332_ldo_set_mode, + .get_mode = mt6332_ldo_get_mode, +}; + +static const struct regulator_ops mt6332_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6332_get_status, + .set_mode = mt6332_ldo_set_mode, + .get_mode = mt6332_ldo_get_mode, +}; + +static const struct regulator_ops mt6332_volt_table_ao_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops mt6332_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6332_get_status, +}; + +/* The array is indexed by id(MT6332_ID_XXX) */ +static struct mt6332_regulator_info mt6332_regulators[] = { + MT6332_BUCK("buck-vdram", VDRAM, 700000, 1493750, 6250, buck_volt_range, + MT6332_EN_STATUS0, MT6332_VDRAM_CON11, GENMASK(6, 0), + MT6332_VDRAM_CON12, MT6332_VDRAM_CON7), + MT6332_BUCK("buck-vdvfs2", VDVFS2, 700000, 1312500, 6250, buck_volt_range, + MT6332_VDVFS2_CON9, MT6332_VDVFS2_CON11, GENMASK(6, 0), + MT6332_VDVFS2_CON12, MT6332_VDVFS2_CON7), + MT6332_BUCK("buck-vpa", VPA, 500000, 3400000, 50000, buck_pa_volt_range, + MT6332_VPA_CON9, MT6332_VPA_CON11, GENMASK(5, 0), + MT6332_VPA_CON12, MT6332_VPA_CON7), + MT6332_BUCK("buck-vrf18a", VRF1, 1050000, 2240625, 9375, buck_rf_volt_range, + MT6332_VRF1_CON9, MT6332_VRF1_CON11, GENMASK(6, 0), + MT6332_VRF1_CON12, MT6332_VRF1_CON7), + MT6332_BUCK("buck-vrf18b", VRF2, 1050000, 2240625, 9375, buck_rf_volt_range, + MT6332_VRF2_CON9, MT6332_VRF2_CON11, GENMASK(6, 0), + MT6332_VRF2_CON12, MT6332_VRF2_CON7), + MT6332_BUCK("buck-vsbst", VSBST, 3500000, 7468750, 31250, boost_volt_range, + MT6332_VSBST_CON8, MT6332_VSBST_CON12, GENMASK(6, 0), + MT6332_VSBST_CON13, MT6332_VSBST_CON8), + MT6332_LDO("ldo-vauxb32", VAUXB32, ldo_volt_table1, MT6332_LDO_CON1, 10, + MT6332_LDO_CON9, GENMASK(6, 5), MT6332_LDO_CON1, GENMASK(1, 0)), + MT6332_REG_FIXED("ldo-vbif28", VBIF28, MT6332_LDO_CON2, 10, 0, 2800000, 1), + MT6332_REG_FIXED("ldo-vusb33", VUSB33, MT6332_LDO_CON3, 10, 0, 3300000, 2), + MT6332_LDO_LINEAR("ldo-vsram", VSRAM_DVFS2, 700000, 1493750, 6250, buck_volt_range, + MT6332_EN_STATUS0, MT6332_LDO_CON8, GENMASK(15, 9), + MT6332_VDVFS2_CON23, MT6332_VDVFS2_CON22, + MT6332_LDO_CON5, GENMASK(1, 0)), + MT6332_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table2, MT6332_LDO_CON12, GENMASK(11, 9)), +}; + +static int mt6332_set_buck_vosel_reg(struct platform_device *pdev) +{ + struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent); + int i; + u32 regval; + + for (i = 0; i < MT6332_ID_VREG_MAX; i++) { + if (mt6332_regulators[i].vselctrl_reg) { + if (regmap_read(mt6332->regmap, + mt6332_regulators[i].vselctrl_reg, + ®val) < 0) { + dev_err(&pdev->dev, + "Failed to read buck ctrl\n"); + return -EIO; + } + + if (regval & mt6332_regulators[i].vselctrl_mask) { + mt6332_regulators[i].desc.vsel_reg = + mt6332_regulators[i].vselon_reg; + } + } + } + + return 0; +} + +static int mt6332_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + u32 reg_value; + + /* Query buck controller to select activated voltage register part */ + if (mt6332_set_buck_vosel_reg(pdev)) + return -EIO; + + /* Read PMIC chip revision to update constraints and voltage table */ + if (regmap_read(mt6332->regmap, MT6332_HWCID, ®_value) < 0) { + dev_err(&pdev->dev, "Failed to read Chip ID\n"); + return -EIO; + } + reg_value &= GENMASK(7, 0); + + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); + + /* + * ChipID 0x10 is "MT6332 E1", has a different voltage table and + * it's currently not supported in this driver. Upon detection of + * this ID, refuse to register the regulators, as we will wrongly + * interpret the VSEL for this revision, potentially overvolting + * some device. + */ + if (reg_value == 0x10) { + dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n"); + return -EINVAL; + } + + for (i = 0; i < MT6332_ID_VREG_MAX; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6332_regulators[i]; + config.regmap = mt6332->regmap; + rdev = devm_regulator_register(&pdev->dev, + &mt6332_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6332_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id mt6332_platform_ids[] = { + { .name = "mt6332-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6332_platform_ids); + +static struct platform_driver mt6332_regulator_driver = { + .driver = { + .name = "mt6332-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6332_regulator_probe, + .id_table = mt6332_platform_ids, +}; + +module_platform_driver(mt6332_regulator_driver); + +MODULE_AUTHOR("AngeloGioacchino Del Regno "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6332 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6357-regulator.c b/drivers/regulator/mt6357-regulator.c new file mode 100644 index 000000000..815ef7d3e --- /dev/null +++ b/drivers/regulator/mt6357-regulator.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2022 MediaTek Inc. +// Copyright (c) 2022 BayLibre, SAS. +// Author: Chen Zhong +// Author: Fabien Parent +// Author: Alexandre Mergnat +// +// Based on mt6397-regulator.c +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * MT6357 regulators' information + * + * @desc: standard fields of regulator description. + * @da_vsel_reg: Monitor register for query buck's voltage. + * @da_vsel_mask: Mask for query buck's voltage. + */ +struct mt6357_regulator_info { + struct regulator_desc desc; + u32 da_vsel_reg; + u32 da_vsel_mask; +}; + +#define MT6357_BUCK(match, vreg, min, max, step, \ + volt_ranges, vosel_reg, vosel_mask, _da_vsel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel_reg, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6357_BUCK_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_BUCK_##vreg##_DBG0, \ + .da_vsel_mask = vosel_mask, \ +} + +#define MT6357_LDO(match, vreg, ldo_volt_table, \ + enreg, vosel, vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ +} + +#define MT6357_LDO1(match, vreg, min, max, step, volt_ranges, \ + enreg, vosel, vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_LDO_##vreg##_DBG0, \ + .da_vsel_mask = 0x7f00, \ +} + +#define MT6357_REG_FIXED(match, vreg, volt) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = MT6357_LDO_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + .min_uV = volt, \ + }, \ +} + +/** + * mt6357_get_buck_voltage_sel - get_voltage_sel for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * da_vsel_reg and da_vsel_mask fields in the info structure and + * then use this as their get_voltage_sel operation. + */ +static int mt6357_get_buck_voltage_sel(struct regulator_dev *rdev) +{ + int ret, regval; + struct mt6357_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6357 Buck %s vsel reg: %d\n", + info->desc.name, ret); + return ret; + } + + regval &= info->da_vsel_mask; + regval >>= ffs(info->da_vsel_mask) - 1; + + return regval; +} + +static const struct regulator_ops mt6357_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6357_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const int vxo22_voltages[] = { + 2200000, + 0, + 2400000, +}; + +static const int vefuse_voltages[] = { + 1200000, + 1300000, + 1500000, + 0, + 1800000, + 0, + 0, + 0, + 0, + 2800000, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vcn33_voltages[] = { + 0, + 3300000, + 3400000, + 3500000, +}; + +static const int vcama_voltages[] = { + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 2500000, + 0, + 0, + 2800000, +}; + +static const int vcamd_voltages[] = { + 0, + 0, + 0, + 0, + 1000000, + 1100000, + 1200000, + 1300000, + 0, + 1500000, + 0, + 0, + 1800000, +}; + +static const int vldo28_voltages[] = { + 0, + 2800000, + 0, + 3000000, +}; + +static const int vdram_voltages[] = { + 0, + 1100000, + 1200000, +}; + +static const int vsim_voltages[] = { + 0, + 0, + 0, + 1700000, + 1800000, + 0, + 0, + 0, + 2700000, + 0, + 0, + 3000000, + 3100000, +}; + +static const int vibr_voltages[] = { + 1200000, + 1300000, + 1500000, + 0, + 1800000, + 2000000, + 0, + 0, + 0, + 2800000, + 0, + 3000000, + 0, + 3300000, +}; + +static const int vmc_voltages[] = { + 0, + 0, + 0, + 0, + 1800000, + 0, + 0, + 0, + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vmch_voltages[] = { + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vemc_voltages[] = { + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vusb_voltages[] = { + 0, + 0, + 0, + 3000000, + 3100000, +}; + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(518750, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), +}; + +static const struct linear_range buck_volt_range4[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 0x7f, 12500), +}; + +/* The array is indexed by id(MT6357_ID_XXX) */ +static struct mt6357_regulator_info mt6357_regulators[] = { + /* Bucks */ + MT6357_BUCK("buck-vcore", VCORE, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VCORE_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vproc", VPROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VPROC_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vmodem", VMODEM, 500000, 1293750, 6250, + buck_volt_range2, MT6357_BUCK_VMODEM_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vpa", VPA, 500000, 3650000, 50000, + buck_volt_range3, MT6357_BUCK_VPA_CON1, 0x3f, 0x3f), + MT6357_BUCK("buck-vs1", VS1, 1200000, 2787500, 12500, + buck_volt_range4, MT6357_BUCK_VS1_ELR0, 0x7f, 0x7f), + + /* LDOs */ + MT6357_LDO("ldo-vcama", VCAMA, vcama_voltages, + MT6357_LDO_VCAMA_CON0, MT6357_VCAMA_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vcamd", VCAMD, vcamd_voltages, + MT6357_LDO_VCAMD_CON0, MT6357_VCAMD_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vcn33-bt", VCN33_BT, vcn33_voltages, + MT6357_LDO_VCN33_CON0_0, MT6357_VCN33_ANA_CON0, 0x300), + MT6357_LDO("ldo-vcn33-wifi", VCN33_WIFI, vcn33_voltages, + MT6357_LDO_VCN33_CON0_1, MT6357_VCN33_ANA_CON0, 0x300), + MT6357_LDO("ldo-vdram", VDRAM, vdram_voltages, + MT6357_LDO_VDRAM_CON0, MT6357_VDRAM_ELR_2, 0x300), + MT6357_LDO("ldo-vefuse", VEFUSE, vefuse_voltages, + MT6357_LDO_VEFUSE_CON0, MT6357_VEFUSE_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vemc", VEMC, vemc_voltages, + MT6357_LDO_VEMC_CON0, MT6357_VEMC_ANA_CON0, 0x700), + MT6357_LDO("ldo-vibr", VIBR, vibr_voltages, + MT6357_LDO_VIBR_CON0, MT6357_VIBR_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vldo28", VLDO28, vldo28_voltages, + MT6357_LDO_VLDO28_CON0_0, MT6357_VLDO28_ANA_CON0, 0x300), + MT6357_LDO("ldo-vmc", VMC, vmc_voltages, + MT6357_LDO_VMC_CON0, MT6357_VMC_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vmch", VMCH, vmch_voltages, + MT6357_LDO_VMCH_CON0, MT6357_VMCH_ANA_CON0, 0x700), + MT6357_LDO("ldo-vsim1", VSIM1, vsim_voltages, + MT6357_LDO_VSIM1_CON0, MT6357_VSIM1_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vsim2", VSIM2, vsim_voltages, + MT6357_LDO_VSIM2_CON0, MT6357_VSIM2_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vusb33", VUSB33, vusb_voltages, + MT6357_LDO_VUSB33_CON0_0, MT6357_VUSB33_ANA_CON0, 0x700), + MT6357_LDO("ldo-vxo22", VXO22, vxo22_voltages, + MT6357_LDO_VXO22_CON0, MT6357_VXO22_ANA_CON0, 0x300), + + MT6357_LDO1("ldo-vsram-proc", VSRAM_PROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_PROC_CON0, + MT6357_LDO_VSRAM_CON0, 0x7f00), + MT6357_LDO1("ldo-vsram-others", VSRAM_OTHERS, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_OTHERS_CON0, + MT6357_LDO_VSRAM_CON1, 0x7f00), + + MT6357_REG_FIXED("ldo-vaud28", VAUD28, 2800000), + MT6357_REG_FIXED("ldo-vaux18", VAUX18, 1800000), + MT6357_REG_FIXED("ldo-vcamio18", VCAMIO, 1800000), + MT6357_REG_FIXED("ldo-vcn18", VCN18, 1800000), + MT6357_REG_FIXED("ldo-vcn28", VCN28, 2800000), + MT6357_REG_FIXED("ldo-vfe28", VFE28, 2800000), + MT6357_REG_FIXED("ldo-vio18", VIO18, 1800000), + MT6357_REG_FIXED("ldo-vio28", VIO28, 2800000), + MT6357_REG_FIXED("ldo-vrf12", VRF12, 1200000), + MT6357_REG_FIXED("ldo-vrf18", VRF18, 1800000), +}; + +static int mt6357_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6357 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + for (i = 0; i < MT6357_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6357_regulators[i]; + config.regmap = mt6357->regmap; + + rdev = devm_regulator_register(&pdev->dev, + &mt6357_regulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6357_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6357_platform_ids[] = { + { .name = "mt6357-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6357_platform_ids); + +static struct platform_driver mt6357_regulator_driver = { + .driver = { + .name = "mt6357-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6357_regulator_probe, + .id_table = mt6357_platform_ids, +}; + +module_platform_driver(mt6357_regulator_driver); + +MODULE_AUTHOR("Chen Zhong "); +MODULE_AUTHOR("Fabien Parent "); +MODULE_AUTHOR("Alexandre Mergnat "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6357 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c new file mode 100644 index 000000000..d6a0ec406 --- /dev/null +++ b/drivers/regulator/mt6358-regulator.c @@ -0,0 +1,745 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2019 MediaTek Inc. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * MT6358 regulators' information + * + * @desc: standard fields of regulator description. + * @qi: Mask for query enable signal status of regulators + */ +struct mt6358_regulator_info { + struct regulator_desc desc; + u32 status_reg; + u32 qi; + u32 da_vsel_reg; + u32 da_vsel_mask; + u32 modeset_reg; + u32 modeset_mask; +}; + +#define to_regulator_info(x) container_of_const((x), struct mt6358_regulator_info, desc) + +#define MT6358_BUCK(match, vreg, supply, min, max, step, \ + vosel_mask, _da_vsel_reg, _da_vsel_mask, \ + _modeset_reg, _modeset_shift) \ +[MT6358_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6358_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = MT6358_BUCK_##vreg##_ELR0, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6358_BUCK_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + .of_map_mode = mt6358_map_mode, \ + }, \ + .status_reg = MT6358_BUCK_##vreg##_DBG1, \ + .qi = BIT(0), \ + .da_vsel_reg = _da_vsel_reg, \ + .da_vsel_mask = _da_vsel_mask, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = BIT(_modeset_shift), \ +} + +#define MT6358_LDO(match, vreg, supply, volt_ranges, enreg, enbit, vosel, vosel_mask) \ +[MT6358_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6358_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(volt_ranges##_ranges) * 11, \ + .linear_ranges = volt_ranges##_ranges, \ + .linear_range_selectors_bitfield = volt_ranges##_selectors, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges##_ranges), \ + .vsel_range_reg = vosel, \ + .vsel_range_mask = vosel_mask, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .status_reg = MT6358_LDO_##vreg##_CON1, \ + .qi = BIT(15), \ +} + +#define MT6358_LDO1(match, vreg, supply, min, max, step, \ + _da_vsel_reg, _da_vsel_mask, vosel, vosel_mask) \ +[MT6358_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6358_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6358_LDO_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = _da_vsel_reg, \ + .da_vsel_mask = _da_vsel_mask, \ + .status_reg = MT6358_LDO_##vreg##_DBG1, \ + .qi = BIT(0), \ +} + +#define MT6358_REG_FIXED(match, vreg, supply, enreg, enbit, volt) \ +[MT6358_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6358_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 11, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + .uV_step = 10000, \ + }, \ + .status_reg = MT6358_LDO_##vreg##_CON1, \ + .qi = BIT(15), \ +} + +#define MT6366_BUCK(match, vreg, min, max, step, \ + vosel_mask, _da_vsel_reg, _da_vsel_mask, \ + _modeset_reg, _modeset_shift) \ +[MT6366_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = "vsys-" match, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6366_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = MT6358_BUCK_##vreg##_ELR0, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6358_BUCK_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + .of_map_mode = mt6358_map_mode, \ + }, \ + .status_reg = MT6358_BUCK_##vreg##_DBG1, \ + .qi = BIT(0), \ + .da_vsel_reg = _da_vsel_reg, \ + .da_vsel_mask = _da_vsel_mask, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = BIT(_modeset_shift), \ +} + +#define MT6366_LDO(match, vreg, volt_ranges, supply, enreg, enbit, vosel, vosel_mask) \ +[MT6366_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6366_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(volt_ranges##_ranges) * 11, \ + .linear_ranges = volt_ranges##_ranges, \ + .linear_range_selectors_bitfield = volt_ranges##_selectors, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges##_ranges), \ + .vsel_range_reg = vosel, \ + .vsel_range_mask = vosel_mask, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .status_reg = MT6358_LDO_##vreg##_CON1, \ + .qi = BIT(15), \ +} + +#define MT6366_LDO1(match, vreg, supply, min, max, step, \ + _da_vsel_reg, _da_vsel_mask, vosel, vosel_mask) \ +[MT6366_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6366_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6358_LDO_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = _da_vsel_reg, \ + .da_vsel_mask = _da_vsel_mask, \ + .status_reg = MT6358_LDO_##vreg##_DBG1, \ + .qi = BIT(0), \ +} + +#define MT6366_REG_FIXED(match, vreg, supply, enreg, enbit, volt) \ +[MT6366_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6358_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6366_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 11, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + .uV_step = 10000, \ + }, \ + .status_reg = MT6358_LDO_##vreg##_CON1, \ + .qi = BIT(15), \ +} + + +/* VDRAM2 voltage selector not shown in datasheet */ +static const unsigned int vdram2_selectors[] = { 0, 12 }; +static const struct linear_range vdram2_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), +}; + +static const unsigned int vsim_selectors[] = { 3, 4, 8, 11, 12 }; +static const struct linear_range vsim_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), +}; + +static const unsigned int vibr_selectors[] = { 0, 1, 2, 4, 5, 9, 11, 13 }; +static const struct linear_range vibr_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), +}; + +/* VUSB voltage selector not shown in datasheet */ +static const unsigned int vusb_selectors[] = { 3, 4 }; +static const struct linear_range vusb_ranges[] = { + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), +}; + +static const unsigned int vcamd_selectors[] = { 3, 4, 5, 6, 7, 9, 12 }; +static const struct linear_range vcamd_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), +}; + +static const unsigned int vefuse_selectors[] = { 11, 12, 13 }; +static const struct linear_range vefuse_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), +}; + +static const unsigned int vmch_vemc_selectors[] = { 2, 3, 5 }; +static const struct linear_range vmch_vemc_ranges[] = { + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), +}; + +static const unsigned int vcama_selectors[] = { 0, 7, 9, 10, 11, 12 }; +static const struct linear_range vcama_ranges[] = { + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), +}; + +static const unsigned int vcn33_selectors[] = { 1, 2, 3 }; +static const struct linear_range vcn33_ranges[] = { + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3500000, 0, 10, 10000), +}; + +static const unsigned int vmc_selectors[] = { 4, 10, 11, 13 }; +static const struct linear_range vmc_ranges[] = { + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), +}; + +static const unsigned int vldo28_selectors[] = { 1, 3 }; +static const struct linear_range vldo28_ranges[] = { + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), +}; + +static const unsigned int mt6366_vmddr_selectors[] = { 0, 1, 2, 3, 4, 5, 6, 7, 9, 12 }; +static const struct linear_range mt6366_vmddr_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), +}; + +static const unsigned int mt6366_vcn18_vm18_selectors[] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; +static const struct linear_range mt6366_vcn18_vm18_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2100000, 0, 10, 10000), +}; + +static unsigned int mt6358_map_mode(unsigned int mode) +{ + return mode == MT6397_BUCK_MODE_AUTO ? + REGULATOR_MODE_NORMAL : REGULATOR_MODE_FAST; +} + +static int mt6358_get_buck_voltage_sel(struct regulator_dev *rdev) +{ + const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); + int ret, regval; + + ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6358 Buck %s vsel reg: %d\n", + info->desc.name, ret); + return ret; + } + + ret = (regval & info->da_vsel_mask) >> (ffs(info->da_vsel_mask) - 1); + + return ret; +} + +static int mt6358_get_status(struct regulator_dev *rdev) +{ + const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); + int ret; + u32 regval; + + ret = regmap_read(rdev->regmap, info->status_reg, ®val); + if (ret != 0) { + dev_info(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static int mt6358_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); + int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = MT6397_BUCK_MODE_FORCE_PWM; + break; + case REGULATOR_MODE_NORMAL: + val = MT6397_BUCK_MODE_AUTO; + break; + default: + return -EINVAL; + } + + dev_dbg(&rdev->dev, "mt6358 buck set_mode %#x, %#x, %#x\n", + info->modeset_reg, info->modeset_mask, val); + + val <<= ffs(info->modeset_mask) - 1; + + return regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); +} + +static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev) +{ + const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); + int ret, regval; + + ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6358 buck mode: %d\n", ret); + return ret; + } + + switch ((regval & info->modeset_mask) >> (ffs(info->modeset_mask) - 1)) { + case MT6397_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case MT6397_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + default: + return -EINVAL; + } +} + +static const struct regulator_ops mt6358_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6358_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6358_get_status, + .set_mode = mt6358_regulator_set_mode, + .get_mode = mt6358_regulator_get_mode, +}; + +static const struct regulator_ops mt6358_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6358_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6358_get_status, +}; + +static const struct regulator_ops mt6358_volt_table_ops = { + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = regulator_map_voltage_pickable_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6358_get_status, +}; + +/* "Fixed" LDOs with output voltage calibration +0 ~ +10 mV */ +static const struct regulator_ops mt6358_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6358_get_status, +}; + +/* The array is indexed by id(MT6358_ID_XXX) */ +static const struct mt6358_regulator_info mt6358_regulators[] = { + MT6358_BUCK("buck_vdram1", VDRAM1, "vsys-vdram1", 500000, 2087500, 12500, + 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8), + MT6358_BUCK("buck_vcore", VCORE, "vsys-vcore", 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1), + MT6358_BUCK("buck_vpa", VPA, "vsys-vpa", 500000, 3650000, 50000, + 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3), + MT6358_BUCK("buck_vproc11", VPROC11, "vsys-vproc11", 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1), + MT6358_BUCK("buck_vproc12", VPROC12, "vsys-vproc12", 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2), + MT6358_BUCK("buck_vgpu", VGPU, "vsys-vgpu", 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2), + MT6358_BUCK("buck_vs2", VS2, "vsys-vs2", 500000, 2087500, 12500, + 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8), + MT6358_BUCK("buck_vmodem", VMODEM, "vsys-vmodem", 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), + MT6358_BUCK("buck_vs1", VS1, "vsys-vs1", 1000000, 2587500, 12500, + 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), + MT6358_REG_FIXED("ldo_vrf12", VRF12, "vs2-ldo2", MT6358_LDO_VRF12_CON0, 0, 1200000), + MT6358_REG_FIXED("ldo_vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000), + MT6358_REG_FIXED("ldo_vcamio", VCAMIO, "vs1-ldo1", MT6358_LDO_VCAMIO_CON0, 0, 1800000), + MT6358_REG_FIXED("ldo_vcn18", VCN18, "vs1-ldo1", MT6358_LDO_VCN18_CON0, 0, 1800000), + MT6358_REG_FIXED("ldo_vfe28", VFE28, "vsys-ldo1", MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6358_REG_FIXED("ldo_vcn28", VCN28, "vsys-ldo1", MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6358_REG_FIXED("ldo_vxo22", VXO22, "vsys-ldo1", MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6358_REG_FIXED("ldo_vaux18", VAUX18, "vsys-ldo1", MT6358_LDO_VAUX18_CON0, 0, 1800000), + MT6358_REG_FIXED("ldo_vbif28", VBIF28, "vsys-ldo1", MT6358_LDO_VBIF28_CON0, 0, 2800000), + MT6358_REG_FIXED("ldo_vio28", VIO28, "vsys-ldo2", MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6358_REG_FIXED("ldo_va12", VA12, "vs2-ldo2", MT6358_LDO_VA12_CON0, 0, 1200000), + MT6358_REG_FIXED("ldo_vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6358_REG_FIXED("ldo_vaud28", VAUD28, "vsys-ldo1", MT6358_LDO_VAUD28_CON0, 0, 2800000), + MT6358_LDO("ldo_vdram2", VDRAM2, "vs2-ldo1", vdram2, + MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0xf), + MT6358_LDO("ldo_vsim1", VSIM1, "vsys-ldo1", vsim, + MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vibr", VIBR, "vsys-ldo3", vibr, + MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vusb", VUSB, "vsys-ldo1", vusb, + MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), + MT6358_LDO("ldo_vcamd", VCAMD, "vs2-ldo4", vcamd, + MT6358_LDO_VCAMD_CON0, 0, MT6358_VCAMD_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vefuse", VEFUSE, "vs1-ldo1", vefuse, + MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vmch", VMCH, "vsys-ldo2", vmch_vemc, + MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), + MT6358_LDO("ldo_vcama1", VCAMA1, "vsys-ldo3", vcama, + MT6358_LDO_VCAMA1_CON0, 0, MT6358_VCAMA1_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vemc", VEMC, "vsys-ldo2", vmch_vemc, + MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), + MT6358_LDO("ldo_vcn33", VCN33, "vsys-ldo3", vcn33, + MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), + MT6358_LDO("ldo_vcama2", VCAMA2, "vsys-ldo3", vcama, + MT6358_LDO_VCAMA2_CON0, 0, MT6358_VCAMA2_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vmc", VMC, "vsys-ldo2", vmc, + MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), + MT6358_LDO("ldo_vldo28", VLDO28, "vsys-ldo2", vldo28, + MT6358_LDO_VLDO28_CON0_0, 0, + MT6358_VLDO28_ANA_CON0, 0x300), + MT6358_LDO("ldo_vsim2", VSIM2, "vsys-ldo2", vsim, + MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), + MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), + MT6358_LDO1("ldo_vsram_others", VSRAM_OTHERS, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), + MT6358_LDO1("ldo_vsram_gpu", VSRAM_GPU, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), + MT6358_LDO1("ldo_vsram_proc12", VSRAM_PROC12, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), +}; + +/* The array is indexed by id(MT6366_ID_XXX) */ +static const struct mt6358_regulator_info mt6366_regulators[] = { + MT6366_BUCK("vdram1", VDRAM1, 500000, 2087500, 12500, + 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8), + MT6366_BUCK("vcore", VCORE, 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1), + MT6366_BUCK("vpa", VPA, 500000, 3650000, 50000, + 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3), + MT6366_BUCK("vproc11", VPROC11, 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1), + MT6366_BUCK("vproc12", VPROC12, 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2), + MT6366_BUCK("vgpu", VGPU, 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2), + MT6366_BUCK("vs2", VS2, 500000, 2087500, 12500, + 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8), + MT6366_BUCK("vmodem", VMODEM, 500000, 1293750, 6250, + 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), + MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500, + 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), + MT6366_REG_FIXED("vrf12", VRF12, "vs2-ldo2", MT6358_LDO_VRF12_CON0, 0, 1200000), + MT6366_REG_FIXED("vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000), + MT6366_REG_FIXED("vfe28", VFE28, "vsys-ldo1", MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6366_REG_FIXED("vcn28", VCN28, "vsys-ldo1", MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6366_REG_FIXED("vxo22", VXO22, "vsys-ldo1", MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6366_REG_FIXED("vaux18", VAUX18, "vsys-ldo1", MT6358_LDO_VAUX18_CON0, 0, 1800000), + MT6366_REG_FIXED("vbif28", VBIF28, "vsys-ldo1", MT6358_LDO_VBIF28_CON0, 0, 2800000), + MT6366_REG_FIXED("vio28", VIO28, "vsys-ldo2", MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6366_REG_FIXED("va12", VA12, "vs2-ldo2", MT6358_LDO_VA12_CON0, 0, 1200000), + MT6366_REG_FIXED("vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6366_REG_FIXED("vaud28", VAUD28, "vsys-ldo1", MT6358_LDO_VAUD28_CON0, 0, 2800000), + MT6366_LDO("vdram2", VDRAM2, vdram2, "vs2-ldo1", + MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), + MT6366_LDO("vsim1", VSIM1, vsim, "vsys-ldo1", + MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), + MT6366_LDO("vibr", VIBR, vibr, "vsys-ldo3", + MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), + MT6366_LDO("vusb", VUSB, vusb, "vsys-ldo1", + MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), + MT6366_LDO("vefuse", VEFUSE, vefuse, "vs1-ldo1", + MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), + MT6366_LDO("vmch", VMCH, vmch_vemc, "vsys-ldo2", + MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), + MT6366_LDO("vemc", VEMC, vmch_vemc, "vsys-ldo3", + MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), + MT6366_LDO("vcn33", VCN33, vcn33, "vsys-ldo3", + MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), + MT6366_LDO("vmc", VMC, vmc, "vsys-ldo2", + MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), + MT6366_LDO("vsim2", VSIM2, vsim, "vsys-ldo2", + MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), + MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, "vs1-ldo1", + MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), + MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, "vs1-ldo1", + MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00), + MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, "vs2-ldo1", + MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00), + MT6366_LDO1("vsram-proc11", VSRAM_PROC11, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), + MT6366_LDO1("vsram-others", VSRAM_OTHERS, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), + MT6366_LDO1("vsram-gpu", VSRAM_GPU, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), + MT6366_LDO1("vsram-proc12", VSRAM_PROC12, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), + MT6366_LDO1("vsram-core", VSRAM_CORE, "vs2-ldo3", 500000, 1293750, 6250, + MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f), +}; + +static int mt6358_sync_vcn33_setting(struct device *dev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(dev->parent); + unsigned int val; + int ret; + + /* + * VCN33_WIFI and VCN33_BT are two separate enable bits for the same + * regulator. They share the same voltage setting and output pin. + * Instead of having two potentially conflicting regulators, just have + * one VCN33 regulator. Sync the two enable bits and only use one in + * the regulator device. + */ + ret = regmap_read(mt6397->regmap, MT6358_LDO_VCN33_CON0_1, &val); + if (ret) { + dev_err(dev, "Failed to read VCN33_WIFI setting\n"); + return ret; + } + + if (!(val & BIT(0))) + return 0; + + /* Sync VCN33_WIFI enable status to VCN33_BT */ + ret = regmap_update_bits(mt6397->regmap, MT6358_LDO_VCN33_CON0_0, BIT(0), BIT(0)); + if (ret) { + dev_err(dev, "Failed to sync VCN33_WIFI setting to VCN33_BT\n"); + return ret; + } + + /* Disable VCN33_WIFI */ + ret = regmap_update_bits(mt6397->regmap, MT6358_LDO_VCN33_CON0_1, BIT(0), 0); + if (ret) { + dev_err(dev, "Failed to disable VCN33_WIFI\n"); + return ret; + } + + return 0; +} + +static int mt6358_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + const struct mt6358_regulator_info *mt6358_info; + int i, max_regulator, ret; + + switch (mt6397->chip_id) { + case MT6358_CHIP_ID: + max_regulator = MT6358_MAX_REGULATOR; + mt6358_info = mt6358_regulators; + break; + case MT6366_CHIP_ID: + max_regulator = MT6366_MAX_REGULATOR; + mt6358_info = mt6366_regulators; + break; + default: + dev_err(&pdev->dev, "unsupported chip ID: %d\n", mt6397->chip_id); + return -EINVAL; + } + + ret = mt6358_sync_vcn33_setting(&pdev->dev); + if (ret) + return ret; + + for (i = 0; i < max_regulator; i++) { + config.dev = &pdev->dev; + config.regmap = mt6397->regmap; + + rdev = devm_regulator_register(&pdev->dev, + &mt6358_info[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6358_info[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6358_platform_ids[] = { + { .name = "mt6358-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6358_platform_ids); + +static struct platform_driver mt6358_regulator_driver = { + .driver = { + .name = "mt6358-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6358_regulator_probe, + .id_table = mt6358_platform_ids, +}; + +module_platform_driver(mt6358_regulator_driver); + +MODULE_AUTHOR("Hsin-Hsiung Wang "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6358 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6359-regulator.c b/drivers/regulator/mt6359-regulator.c new file mode 100644 index 000000000..7c3a3ecb3 --- /dev/null +++ b/drivers/regulator/mt6359-regulator.c @@ -0,0 +1,1152 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2021 MediaTek Inc. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MT6359_BUCK_MODE_AUTO 0 +#define MT6359_BUCK_MODE_FORCE_PWM 1 +#define MT6359_BUCK_MODE_NORMAL 0 +#define MT6359_BUCK_MODE_LP 2 + +/* + * MT6359 regulators' information + * + * @desc: standard fields of regulator description. + * @status_reg: for query status of regulators. + * @qi: Mask for query enable signal status of regulators. + * @modeset_reg: for operating AUTO/PWM mode register. + * @modeset_mask: MASK for operating modeset register. + */ +struct mt6359_regulator_info { + struct regulator_desc desc; + u32 status_reg; + u32 qi; + u32 modeset_reg; + u32 modeset_mask; + u32 lp_mode_reg; + u32 lp_mode_mask; +}; + +#define MT6359_BUCK(match, _name, supply, min, max, step, \ + _enable_reg, _status_reg, \ + _vsel_reg, _vsel_mask, \ + _lp_mode_reg, _lp_mode_shift, \ + _modeset_reg, _modeset_shift) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_linear_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .uV_step = (step), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + .of_map_mode = mt6359_map_mode, \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ + .lp_mode_reg = _lp_mode_reg, \ + .lp_mode_mask = BIT(_lp_mode_shift), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = BIT(_modeset_shift), \ +} + +#define MT6359_LDO_LINEAR(match, _name, supply, min, max, step, \ + _enable_reg, _status_reg, _vsel_reg, _vsel_mask) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_linear_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .uV_step = (step), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359_LDO(match, _name, supply, _volt_table, \ + _enable_reg, _enable_mask, _status_reg, \ + _vsel_reg, _vsel_mask, _en_delay) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(_volt_table), \ + .volt_table = _volt_table, \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(_enable_mask), \ + .enable_time = _en_delay, \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359_REG_FIXED(match, _name, supply, \ + _enable_reg, _status_reg, \ + _fixed_volt) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(0), \ + .fixed_uV = (_fixed_volt), \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359P_LDO1(match, _name, supply, _ops, \ + _volt_table, _enable_reg, \ + _enable_mask, _status_reg, \ + _vsel_reg, _vsel_mask) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(_volt_table), \ + .volt_table = _volt_table, \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _enable_reg, \ + .enable_mask = BIT(_enable_mask), \ + }, \ + .status_reg = _status_reg, \ + .qi = BIT(0), \ +} + +#define MT6359_LDO_NOOP(match, _name, supply) \ +[MT6359_ID_##_name] = { \ + .desc = { \ + .name = #_name, \ + .supply_name = supply, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &mt6359_noop_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6359_ID_##_name, \ + .owner = THIS_MODULE, \ + }, \ +} + +static const unsigned int vsim1_voltages[] = { + 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000, +}; + +static const unsigned int vibr_voltages[] = { + 1200000, 1300000, 1500000, 0, 1800000, 2000000, 0, 0, 2700000, 2800000, + 0, 3000000, 0, 3300000, +}; + +static const unsigned int vrf12_voltages[] = { + 0, 0, 1100000, 1200000, 1300000, +}; + +static const unsigned int volt18_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, +}; + +static const unsigned int vcn13_voltages[] = { + 900000, 1000000, 0, 1200000, 1300000, +}; + +static const unsigned int vcn33_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 0, 0, 0, 3300000, 3400000, 3500000, +}; + +static const unsigned int vefuse_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, 2000000, +}; + +static const unsigned int vxo22_voltages[] = { + 1800000, 0, 0, 0, 2200000, +}; + +static const unsigned int vrfck_voltages[] = { + 0, 0, 1500000, 0, 0, 0, 0, 1600000, 0, 0, 0, 0, 1700000, +}; + +static const unsigned int vrfck_voltages_1[] = { + 1240000, 1600000, +}; + +static const unsigned int vio28_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 2900000, 3000000, 3100000, 3300000, +}; + +static const unsigned int vemc_voltages[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2900000, 3000000, 0, 3300000, +}; + +static const unsigned int vemc_voltages_1[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 2500000, 2800000, 2900000, 3000000, 3100000, + 3300000, +}; + +static const unsigned int va12_voltages[] = { + 0, 0, 0, 0, 0, 0, 1200000, 1300000, +}; + +static const unsigned int va09_voltages[] = { + 0, 0, 800000, 900000, 0, 0, 1200000, +}; + +static const unsigned int vrf18_voltages[] = { + 0, 0, 0, 0, 0, 1700000, 1800000, 1810000, +}; + +static const unsigned int vbbck_voltages[] = { + 0, 0, 0, 0, 1100000, 0, 0, 0, 1150000, 0, 0, 0, 1200000, +}; + +static const unsigned int vsim2_voltages[] = { + 0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000, +}; + +static inline unsigned int mt6359_map_mode(unsigned int mode) +{ + switch (mode) { + case MT6359_BUCK_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case MT6359_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + case MT6359_BUCK_MODE_LP: + return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int mt6359_get_status(struct regulator_dev *rdev) +{ + int ret; + u32 regval; + const struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->status_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + if (regval & info->qi) + return REGULATOR_STATUS_ON; + else + return REGULATOR_STATUS_OFF; +} + +static unsigned int mt6359_regulator_get_mode(struct regulator_dev *rdev) +{ + const struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret, regval; + + ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6359 buck mode: %d\n", ret); + return ret; + } + + regval &= info->modeset_mask; + regval >>= ffs(info->modeset_mask) - 1; + + if (regval == MT6359_BUCK_MODE_FORCE_PWM) + return REGULATOR_MODE_FAST; + + ret = regmap_read(rdev->regmap, info->lp_mode_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6359 buck lp mode: %d\n", ret); + return ret; + } + + if (regval & info->lp_mode_mask) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int mt6359_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret = 0, val; + int curr_mode; + + curr_mode = mt6359_regulator_get_mode(rdev); + switch (mode) { + case REGULATOR_MODE_FAST: + val = MT6359_BUCK_MODE_FORCE_PWM; + val <<= ffs(info->modeset_mask) - 1; + ret = regmap_update_bits(rdev->regmap, + info->modeset_reg, + info->modeset_mask, + val); + break; + case REGULATOR_MODE_NORMAL: + if (curr_mode == REGULATOR_MODE_FAST) { + val = MT6359_BUCK_MODE_AUTO; + val <<= ffs(info->modeset_mask) - 1; + ret = regmap_update_bits(rdev->regmap, + info->modeset_reg, + info->modeset_mask, + val); + } else if (curr_mode == REGULATOR_MODE_IDLE) { + val = MT6359_BUCK_MODE_NORMAL; + val <<= ffs(info->lp_mode_mask) - 1; + ret = regmap_update_bits(rdev->regmap, + info->lp_mode_reg, + info->lp_mode_mask, + val); + udelay(100); + } + break; + case REGULATOR_MODE_IDLE: + val = MT6359_BUCK_MODE_LP >> 1; + val <<= ffs(info->lp_mode_mask) - 1; + ret = regmap_update_bits(rdev->regmap, + info->lp_mode_reg, + info->lp_mode_mask, + val); + break; + default: + return -EINVAL; + } + + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to set mt6359 buck mode: %d\n", ret); + } + + return ret; +} + +static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev, + u32 sel) +{ + const struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + u32 val = 0; + + sel <<= ffs(info->desc.vsel_mask) - 1; + ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY); + if (ret) + return ret; + + ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, &val); + if (ret) + return ret; + + switch (val) { + case 0: + /* If HW trapping is 0, use VEMC_VOSEL_0 */ + ret = regmap_update_bits(rdev->regmap, + info->desc.vsel_reg, + info->desc.vsel_mask, sel); + break; + case 1: + /* If HW trapping is 1, use VEMC_VOSEL_1 */ + ret = regmap_update_bits(rdev->regmap, + info->desc.vsel_reg + 0x2, + info->desc.vsel_mask, sel); + break; + default: + return -EINVAL; + } + + if (ret) + return ret; + + ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0); + return ret; +} + +static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev) +{ + const struct mt6359_regulator_info *info = rdev_get_drvdata(rdev); + int ret; + u32 val = 0; + + ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, &val); + if (ret) + return ret; + switch (val) { + case 0: + /* If HW trapping is 0, use VEMC_VOSEL_0 */ + ret = regmap_read(rdev->regmap, + info->desc.vsel_reg, &val); + break; + case 1: + /* If HW trapping is 1, use VEMC_VOSEL_1 */ + ret = regmap_read(rdev->regmap, + info->desc.vsel_reg + 0x2, &val); + break; + default: + return -EINVAL; + } + if (ret) + return ret; + + val &= info->desc.vsel_mask; + val >>= ffs(info->desc.vsel_mask) - 1; + + return val; +} + +static const struct regulator_ops mt6359_volt_linear_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, + .set_mode = mt6359_regulator_set_mode, + .get_mode = mt6359_regulator_get_mode, +}; + +static const struct regulator_ops mt6359_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, +}; + +static const struct regulator_ops mt6359_volt_fixed_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, +}; + +static const struct regulator_ops mt6359p_vemc_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = mt6359p_vemc_set_voltage_sel, + .get_voltage_sel = mt6359p_vemc_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6359_get_status, +}; + +/* Used for backward-compatible placeholder regulators */ +static const struct regulator_ops mt6359_noop_ops = {}; + +/* The array is indexed by id(MT6359_ID_XXX) */ +static const struct mt6359_regulator_info mt6359_regulators[] = { + MT6359_BUCK("buck_vs1", VS1, "vsys-vs1", 800000, 2200000, 12500, + MT6359_RG_BUCK_VS1_EN_ADDR, + MT6359_DA_VS1_EN_ADDR, MT6359_RG_BUCK_VS1_VOSEL_ADDR, + MT6359_RG_BUCK_VS1_VOSEL_MASK << + MT6359_RG_BUCK_VS1_VOSEL_SHIFT, + MT6359_RG_BUCK_VS1_LP_ADDR, MT6359_RG_BUCK_VS1_LP_SHIFT, + MT6359_RG_VS1_FPWM_ADDR, MT6359_RG_VS1_FPWM_SHIFT), + MT6359_BUCK("buck_vgpu11", VGPU11, "vsys-vgpu11", 400000, 1193750, 6250, + MT6359_RG_BUCK_VGPU11_EN_ADDR, + MT6359_DA_VGPU11_EN_ADDR, MT6359_RG_BUCK_VGPU11_VOSEL_ADDR, + MT6359_RG_BUCK_VGPU11_VOSEL_MASK << + MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT, + MT6359_RG_BUCK_VGPU11_LP_ADDR, + MT6359_RG_BUCK_VGPU11_LP_SHIFT, + MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT), + MT6359_BUCK("buck_vmodem", VMODEM, "vsys-vmodem", 400000, 1100000, 6250, + MT6359_RG_BUCK_VMODEM_EN_ADDR, + MT6359_DA_VMODEM_EN_ADDR, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR, + MT6359_RG_BUCK_VMODEM_VOSEL_MASK << + MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT, + MT6359_RG_BUCK_VMODEM_LP_ADDR, + MT6359_RG_BUCK_VMODEM_LP_SHIFT, + MT6359_RG_VMODEM_FCCM_ADDR, MT6359_RG_VMODEM_FCCM_SHIFT), + MT6359_BUCK("buck_vpu", VPU, "vsys-vpu", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPU_EN_ADDR, + MT6359_DA_VPU_EN_ADDR, MT6359_RG_BUCK_VPU_VOSEL_ADDR, + MT6359_RG_BUCK_VPU_VOSEL_MASK << + MT6359_RG_BUCK_VPU_VOSEL_SHIFT, + MT6359_RG_BUCK_VPU_LP_ADDR, MT6359_RG_BUCK_VPU_LP_SHIFT, + MT6359_RG_VPU_FCCM_ADDR, MT6359_RG_VPU_FCCM_SHIFT), + MT6359_BUCK("buck_vcore", VCORE, "vsys-vcore", 400000, 1193750, 6250, + MT6359_RG_BUCK_VCORE_EN_ADDR, + MT6359_DA_VCORE_EN_ADDR, MT6359_RG_BUCK_VCORE_VOSEL_ADDR, + MT6359_RG_BUCK_VCORE_VOSEL_MASK << + MT6359_RG_BUCK_VCORE_VOSEL_SHIFT, + MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT, + MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT), + MT6359_BUCK("buck_vs2", VS2, "vsys-vs2", 800000, 1600000, 12500, + MT6359_RG_BUCK_VS2_EN_ADDR, + MT6359_DA_VS2_EN_ADDR, MT6359_RG_BUCK_VS2_VOSEL_ADDR, + MT6359_RG_BUCK_VS2_VOSEL_MASK << + MT6359_RG_BUCK_VS2_VOSEL_SHIFT, + MT6359_RG_BUCK_VS2_LP_ADDR, MT6359_RG_BUCK_VS2_LP_SHIFT, + MT6359_RG_VS2_FPWM_ADDR, MT6359_RG_VS2_FPWM_SHIFT), + MT6359_BUCK("buck_vpa", VPA, "vsys-vpa", 500000, 3650000, 50000, + MT6359_RG_BUCK_VPA_EN_ADDR, + MT6359_DA_VPA_EN_ADDR, MT6359_RG_BUCK_VPA_VOSEL_ADDR, + MT6359_RG_BUCK_VPA_VOSEL_MASK << + MT6359_RG_BUCK_VPA_VOSEL_SHIFT, + MT6359_RG_BUCK_VPA_LP_ADDR, MT6359_RG_BUCK_VPA_LP_SHIFT, + MT6359_RG_VPA_MODESET_ADDR, MT6359_RG_VPA_MODESET_SHIFT), + MT6359_BUCK("buck_vproc2", VPROC2, "vsys-vproc2", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPROC2_EN_ADDR, + MT6359_DA_VPROC2_EN_ADDR, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC2_VOSEL_MASK << + MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC2_LP_ADDR, + MT6359_RG_BUCK_VPROC2_LP_SHIFT, + MT6359_RG_VPROC2_FCCM_ADDR, MT6359_RG_VPROC2_FCCM_SHIFT), + MT6359_BUCK("buck_vproc1", VPROC1, "vsys-vproc1", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPROC1_EN_ADDR, + MT6359_DA_VPROC1_EN_ADDR, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC1_VOSEL_MASK << + MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC1_LP_ADDR, + MT6359_RG_BUCK_VPROC1_LP_SHIFT, + MT6359_RG_VPROC1_FCCM_ADDR, MT6359_RG_VPROC1_FCCM_SHIFT), + MT6359_BUCK("buck_vcore_sshub", VCORE_SSHUB, "vsys-vcore", 400000, 1193750, 6250, + MT6359_RG_BUCK_VCORE_SSHUB_EN_ADDR, + MT6359_DA_VCORE_EN_ADDR, + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_ADDR, + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_MASK << + MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT, + MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT, + MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT), + MT6359_REG_FIXED("ldo_vaud18", VAUD18, "vs1-ldo1", MT6359_RG_LDO_VAUD18_EN_ADDR, + MT6359_DA_VAUD18_B_EN_ADDR, 1800000), + MT6359_LDO("ldo_vsim1", VSIM1, "vsys-ldo2", vsim1_voltages, + MT6359_RG_LDO_VSIM1_EN_ADDR, MT6359_RG_LDO_VSIM1_EN_SHIFT, + MT6359_DA_VSIM1_B_EN_ADDR, MT6359_RG_VSIM1_VOSEL_ADDR, + MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT, + 480), + MT6359_LDO("ldo_vibr", VIBR, "vsys-ldo1", vibr_voltages, + MT6359_RG_LDO_VIBR_EN_ADDR, MT6359_RG_LDO_VIBR_EN_SHIFT, + MT6359_DA_VIBR_B_EN_ADDR, MT6359_RG_VIBR_VOSEL_ADDR, + MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vrf12", VRF12, "vs2-ldo2", vrf12_voltages, + MT6359_RG_LDO_VRF12_EN_ADDR, MT6359_RG_LDO_VRF12_EN_SHIFT, + MT6359_DA_VRF12_B_EN_ADDR, MT6359_RG_VRF12_VOSEL_ADDR, + MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT, + 120), + MT6359_REG_FIXED("ldo_vusb", VUSB, "vsys-ldo2", MT6359_RG_LDO_VUSB_EN_0_ADDR, + MT6359_DA_VUSB_B_EN_ADDR, 3000000), + MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, "vs2-ldo1", 500000, 1293750, 6250, + MT6359_RG_LDO_VSRAM_PROC2_EN_ADDR, + MT6359_DA_VSRAM_PROC2_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT), + MT6359_LDO("ldo_vio18", VIO18, "vs1-ldo2", volt18_voltages, + MT6359_RG_LDO_VIO18_EN_ADDR, MT6359_RG_LDO_VIO18_EN_SHIFT, + MT6359_DA_VIO18_B_EN_ADDR, MT6359_RG_VIO18_VOSEL_ADDR, + MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT, + 960), + MT6359_LDO("ldo_vcamio", VCAMIO, "vs1-ldo1", volt18_voltages, + MT6359_RG_LDO_VCAMIO_EN_ADDR, MT6359_RG_LDO_VCAMIO_EN_SHIFT, + MT6359_DA_VCAMIO_B_EN_ADDR, MT6359_RG_VCAMIO_VOSEL_ADDR, + MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT, + 1290), + MT6359_REG_FIXED("ldo_vcn18", VCN18, "vs1-ldo2", MT6359_RG_LDO_VCN18_EN_ADDR, + MT6359_DA_VCN18_B_EN_ADDR, 1800000), + MT6359_REG_FIXED("ldo_vfe28", VFE28, "vsys-ldo1", MT6359_RG_LDO_VFE28_EN_ADDR, + MT6359_DA_VFE28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vcn13", VCN13, "vs2-ldo2", vcn13_voltages, + MT6359_RG_LDO_VCN13_EN_ADDR, MT6359_RG_LDO_VCN13_EN_SHIFT, + MT6359_DA_VCN13_B_EN_ADDR, MT6359_RG_VCN13_VOSEL_ADDR, + MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vcn33_1", VCN33_1, "vsys-ldo1", vcn33_voltages, + MT6359_RG_LDO_VCN33_1_EN_0_ADDR, + MT6359_RG_LDO_VCN33_1_EN_0_SHIFT, + MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR, + MT6359_RG_VCN33_1_VOSEL_MASK << + MT6359_RG_VCN33_1_VOSEL_SHIFT, 240), + MT6359_REG_FIXED("ldo_vaux18", VAUX18, "vsys-ldo2", MT6359_RG_LDO_VAUX18_EN_ADDR, + MT6359_DA_VAUX18_B_EN_ADDR, 1800000), + MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, "vs2-ldo1", 500000, 1293750, + 6250, + MT6359_RG_LDO_VSRAM_OTHERS_EN_ADDR, + MT6359_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT), + MT6359_LDO("ldo_vefuse", VEFUSE, "vs1-ldo2", vefuse_voltages, + MT6359_RG_LDO_VEFUSE_EN_ADDR, MT6359_RG_LDO_VEFUSE_EN_SHIFT, + MT6359_DA_VEFUSE_B_EN_ADDR, MT6359_RG_VEFUSE_VOSEL_ADDR, + MT6359_RG_VEFUSE_VOSEL_MASK << MT6359_RG_VEFUSE_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vxo22", VXO22, "vsys-ldo2", vxo22_voltages, + MT6359_RG_LDO_VXO22_EN_ADDR, MT6359_RG_LDO_VXO22_EN_SHIFT, + MT6359_DA_VXO22_B_EN_ADDR, MT6359_RG_VXO22_VOSEL_ADDR, + MT6359_RG_VXO22_VOSEL_MASK << MT6359_RG_VXO22_VOSEL_SHIFT, + 120), + MT6359_LDO("ldo_vrfck", VRFCK, "vsys-ldo2", vrfck_voltages, + MT6359_RG_LDO_VRFCK_EN_ADDR, MT6359_RG_LDO_VRFCK_EN_SHIFT, + MT6359_DA_VRFCK_B_EN_ADDR, MT6359_RG_VRFCK_VOSEL_ADDR, + MT6359_RG_VRFCK_VOSEL_MASK << MT6359_RG_VRFCK_VOSEL_SHIFT, + 480), + MT6359_REG_FIXED("ldo_vbif28", VBIF28, "vsys-ldo2", MT6359_RG_LDO_VBIF28_EN_ADDR, + MT6359_DA_VBIF28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vio28", VIO28, "vsys-ldo2", vio28_voltages, + MT6359_RG_LDO_VIO28_EN_ADDR, MT6359_RG_LDO_VIO28_EN_SHIFT, + MT6359_DA_VIO28_B_EN_ADDR, MT6359_RG_VIO28_VOSEL_ADDR, + MT6359_RG_VIO28_VOSEL_MASK << MT6359_RG_VIO28_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vemc", VEMC, "vsys-ldo2", vemc_voltages, + MT6359_RG_LDO_VEMC_EN_ADDR, MT6359_RG_LDO_VEMC_EN_SHIFT, + MT6359_DA_VEMC_B_EN_ADDR, MT6359_RG_VEMC_VOSEL_ADDR, + MT6359_RG_VEMC_VOSEL_MASK << MT6359_RG_VEMC_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vcn33_2", VCN33_2, "vsys-ldo1", vcn33_voltages, + MT6359_RG_LDO_VCN33_2_EN_0_ADDR, + MT6359_RG_LDO_VCN33_2_EN_0_SHIFT, + MT6359_DA_VCN33_2_B_EN_ADDR, MT6359_RG_VCN33_2_VOSEL_ADDR, + MT6359_RG_VCN33_2_VOSEL_MASK << + MT6359_RG_VCN33_2_VOSEL_SHIFT, 240), + MT6359_LDO("ldo_va12", VA12, "vs2-ldo2", va12_voltages, + MT6359_RG_LDO_VA12_EN_ADDR, MT6359_RG_LDO_VA12_EN_SHIFT, + MT6359_DA_VA12_B_EN_ADDR, MT6359_RG_VA12_VOSEL_ADDR, + MT6359_RG_VA12_VOSEL_MASK << MT6359_RG_VA12_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_va09", VA09, "vs2-ldo2", va09_voltages, + MT6359_RG_LDO_VA09_EN_ADDR, MT6359_RG_LDO_VA09_EN_SHIFT, + MT6359_DA_VA09_B_EN_ADDR, MT6359_RG_VA09_VOSEL_ADDR, + MT6359_RG_VA09_VOSEL_MASK << MT6359_RG_VA09_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vrf18", VRF18, "vs1-ldo2", vrf18_voltages, + MT6359_RG_LDO_VRF18_EN_ADDR, MT6359_RG_LDO_VRF18_EN_SHIFT, + MT6359_DA_VRF18_B_EN_ADDR, MT6359_RG_VRF18_VOSEL_ADDR, + MT6359_RG_VRF18_VOSEL_MASK << MT6359_RG_VRF18_VOSEL_SHIFT, + 120), + MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD, "vs2-ldo1", 500000, 1100000, 6250, + MT6359_RG_LDO_VSRAM_MD_EN_ADDR, + MT6359_DA_VSRAM_MD_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_MD_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT), + MT6359_LDO("ldo_vufs", VUFS, "vs1-ldo1", volt18_voltages, + MT6359_RG_LDO_VUFS_EN_ADDR, MT6359_RG_LDO_VUFS_EN_SHIFT, + MT6359_DA_VUFS_B_EN_ADDR, MT6359_RG_VUFS_VOSEL_ADDR, + MT6359_RG_VUFS_VOSEL_MASK << MT6359_RG_VUFS_VOSEL_SHIFT, + 1920), + MT6359_LDO("ldo_vm18", VM18, "vs1-ldo1", volt18_voltages, + MT6359_RG_LDO_VM18_EN_ADDR, MT6359_RG_LDO_VM18_EN_SHIFT, + MT6359_DA_VM18_B_EN_ADDR, MT6359_RG_VM18_VOSEL_ADDR, + MT6359_RG_VM18_VOSEL_MASK << MT6359_RG_VM18_VOSEL_SHIFT, + 1920), + /* vbbck is fed from vio18 internally. */ + MT6359_LDO("ldo_vbbck", VBBCK, "LDO_VIO18", vbbck_voltages, + MT6359_RG_LDO_VBBCK_EN_ADDR, MT6359_RG_LDO_VBBCK_EN_SHIFT, + MT6359_DA_VBBCK_B_EN_ADDR, MT6359_RG_VBBCK_VOSEL_ADDR, + MT6359_RG_VBBCK_VOSEL_MASK << MT6359_RG_VBBCK_VOSEL_SHIFT, + 240), + MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1, "vs2-ldo1", 500000, 1293750, 6250, + MT6359_RG_LDO_VSRAM_PROC1_EN_ADDR, + MT6359_DA_VSRAM_PROC1_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT), + MT6359_LDO("ldo_vsim2", VSIM2, "vsys-ldo2", vsim2_voltages, + MT6359_RG_LDO_VSIM2_EN_ADDR, MT6359_RG_LDO_VSIM2_EN_SHIFT, + MT6359_DA_VSIM2_B_EN_ADDR, MT6359_RG_VSIM2_VOSEL_ADDR, + MT6359_RG_VSIM2_VOSEL_MASK << MT6359_RG_VSIM2_VOSEL_SHIFT, + 480), + MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB, "vs2-ldo1", + 500000, 1293750, 6250, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR, + MT6359_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT), + /* Placeholders for DT backward compatibility */ + MT6359_LDO_NOOP("ldo_vcn33_1_bt", VCN33_1_BT, "LDO_VCN33_1"), + MT6359_LDO_NOOP("ldo_vcn33_1_wifi", VCN33_1_WIFI, "LDO_VCN33_1"), + MT6359_LDO_NOOP("ldo_vcn33_2_bt", VCN33_2_BT, "LDO_VCN33_2"), + MT6359_LDO_NOOP("ldo_vcn33_2_wifi", VCN33_2_WIFI, "LDO_VCN33_2"), +}; + +static const struct mt6359_regulator_info mt6359p_regulators[] = { + MT6359_BUCK("buck_vs1", VS1, "vsys-vs1", 800000, 2200000, 12500, + MT6359_RG_BUCK_VS1_EN_ADDR, + MT6359_DA_VS1_EN_ADDR, MT6359_RG_BUCK_VS1_VOSEL_ADDR, + MT6359_RG_BUCK_VS1_VOSEL_MASK << + MT6359_RG_BUCK_VS1_VOSEL_SHIFT, + MT6359_RG_BUCK_VS1_LP_ADDR, MT6359_RG_BUCK_VS1_LP_SHIFT, + MT6359_RG_VS1_FPWM_ADDR, MT6359_RG_VS1_FPWM_SHIFT), + MT6359_BUCK("buck_vgpu11", VGPU11, "vsys-vgpu11", 400000, 1193750, 6250, + MT6359_RG_BUCK_VGPU11_EN_ADDR, + MT6359_DA_VGPU11_EN_ADDR, MT6359P_RG_BUCK_VGPU11_VOSEL_ADDR, + MT6359_RG_BUCK_VGPU11_VOSEL_MASK << + MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT, + MT6359_RG_BUCK_VGPU11_LP_ADDR, + MT6359_RG_BUCK_VGPU11_LP_SHIFT, + MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT), + MT6359_BUCK("buck_vmodem", VMODEM, "vsys-vmodem", 400000, 1100000, 6250, + MT6359_RG_BUCK_VMODEM_EN_ADDR, + MT6359_DA_VMODEM_EN_ADDR, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR, + MT6359_RG_BUCK_VMODEM_VOSEL_MASK << + MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT, + MT6359_RG_BUCK_VMODEM_LP_ADDR, + MT6359_RG_BUCK_VMODEM_LP_SHIFT, + MT6359_RG_VMODEM_FCCM_ADDR, MT6359_RG_VMODEM_FCCM_SHIFT), + MT6359_BUCK("buck_vpu", VPU, "vsys-vpu", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPU_EN_ADDR, + MT6359_DA_VPU_EN_ADDR, MT6359_RG_BUCK_VPU_VOSEL_ADDR, + MT6359_RG_BUCK_VPU_VOSEL_MASK << + MT6359_RG_BUCK_VPU_VOSEL_SHIFT, + MT6359_RG_BUCK_VPU_LP_ADDR, MT6359_RG_BUCK_VPU_LP_SHIFT, + MT6359_RG_VPU_FCCM_ADDR, MT6359_RG_VPU_FCCM_SHIFT), + MT6359_BUCK("buck_vcore", VCORE, "vsys-vcore", 506250, 1300000, 6250, + MT6359_RG_BUCK_VCORE_EN_ADDR, + MT6359_DA_VCORE_EN_ADDR, MT6359P_RG_BUCK_VCORE_VOSEL_ADDR, + MT6359_RG_BUCK_VCORE_VOSEL_MASK << + MT6359_RG_BUCK_VCORE_VOSEL_SHIFT, + MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT, + MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT), + MT6359_BUCK("buck_vs2", VS2, "vsys-vs2", 800000, 1600000, 12500, + MT6359_RG_BUCK_VS2_EN_ADDR, + MT6359_DA_VS2_EN_ADDR, MT6359_RG_BUCK_VS2_VOSEL_ADDR, + MT6359_RG_BUCK_VS2_VOSEL_MASK << + MT6359_RG_BUCK_VS2_VOSEL_SHIFT, + MT6359_RG_BUCK_VS2_LP_ADDR, MT6359_RG_BUCK_VS2_LP_SHIFT, + MT6359_RG_VS2_FPWM_ADDR, MT6359_RG_VS2_FPWM_SHIFT), + MT6359_BUCK("buck_vpa", VPA, "vsys-vpa", 500000, 3650000, 50000, + MT6359_RG_BUCK_VPA_EN_ADDR, + MT6359_DA_VPA_EN_ADDR, MT6359_RG_BUCK_VPA_VOSEL_ADDR, + MT6359_RG_BUCK_VPA_VOSEL_MASK << + MT6359_RG_BUCK_VPA_VOSEL_SHIFT, + MT6359_RG_BUCK_VPA_LP_ADDR, MT6359_RG_BUCK_VPA_LP_SHIFT, + MT6359_RG_VPA_MODESET_ADDR, MT6359_RG_VPA_MODESET_SHIFT), + MT6359_BUCK("buck_vproc2", VPROC2, "vsys-vproc2", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPROC2_EN_ADDR, + MT6359_DA_VPROC2_EN_ADDR, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC2_VOSEL_MASK << + MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC2_LP_ADDR, + MT6359_RG_BUCK_VPROC2_LP_SHIFT, + MT6359_RG_VPROC2_FCCM_ADDR, MT6359_RG_VPROC2_FCCM_SHIFT), + MT6359_BUCK("buck_vproc1", VPROC1, "vsys-vproc1", 400000, 1193750, 6250, + MT6359_RG_BUCK_VPROC1_EN_ADDR, + MT6359_DA_VPROC1_EN_ADDR, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR, + MT6359_RG_BUCK_VPROC1_VOSEL_MASK << + MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT, + MT6359_RG_BUCK_VPROC1_LP_ADDR, + MT6359_RG_BUCK_VPROC1_LP_SHIFT, + MT6359_RG_VPROC1_FCCM_ADDR, MT6359_RG_VPROC1_FCCM_SHIFT), + MT6359_BUCK("buck_vgpu11_sshub", VGPU11_SSHUB, "vsys-vgpu11", 400000, 1193750, 6250, + MT6359P_RG_BUCK_VGPU11_SSHUB_EN_ADDR, + MT6359_DA_VGPU11_EN_ADDR, + MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_ADDR, + MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_MASK << + MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_SHIFT, + MT6359_RG_BUCK_VGPU11_LP_ADDR, + MT6359_RG_BUCK_VGPU11_LP_SHIFT, + MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT), + MT6359_REG_FIXED("ldo_vaud18", VAUD18, "vs1-ldo1", MT6359P_RG_LDO_VAUD18_EN_ADDR, + MT6359P_DA_VAUD18_B_EN_ADDR, 1800000), + MT6359_LDO("ldo_vsim1", VSIM1, "vsys-ldo2", vsim1_voltages, + MT6359P_RG_LDO_VSIM1_EN_ADDR, MT6359P_RG_LDO_VSIM1_EN_SHIFT, + MT6359P_DA_VSIM1_B_EN_ADDR, MT6359P_RG_VSIM1_VOSEL_ADDR, + MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT, + 480), + MT6359_LDO("ldo_vibr", VIBR, "vsys-ldo1", vibr_voltages, + MT6359P_RG_LDO_VIBR_EN_ADDR, MT6359P_RG_LDO_VIBR_EN_SHIFT, + MT6359P_DA_VIBR_B_EN_ADDR, MT6359P_RG_VIBR_VOSEL_ADDR, + MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vrf12", VRF12, "vs2-ldo2", vrf12_voltages, + MT6359P_RG_LDO_VRF12_EN_ADDR, MT6359P_RG_LDO_VRF12_EN_SHIFT, + MT6359P_DA_VRF12_B_EN_ADDR, MT6359P_RG_VRF12_VOSEL_ADDR, + MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT, + 480), + MT6359_REG_FIXED("ldo_vusb", VUSB, "vsys-ldo2", MT6359P_RG_LDO_VUSB_EN_0_ADDR, + MT6359P_DA_VUSB_B_EN_ADDR, 3000000), + MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, "vs2-ldo1", 500000, 1293750, 6250, + MT6359P_RG_LDO_VSRAM_PROC2_EN_ADDR, + MT6359P_DA_VSRAM_PROC2_B_EN_ADDR, + MT6359P_RG_LDO_VSRAM_PROC2_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT), + MT6359_LDO("ldo_vio18", VIO18, "vs1-ldo2", volt18_voltages, + MT6359P_RG_LDO_VIO18_EN_ADDR, MT6359P_RG_LDO_VIO18_EN_SHIFT, + MT6359P_DA_VIO18_B_EN_ADDR, MT6359P_RG_VIO18_VOSEL_ADDR, + MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT, + 960), + MT6359_LDO("ldo_vcamio", VCAMIO, "vs1-ldo1", volt18_voltages, + MT6359P_RG_LDO_VCAMIO_EN_ADDR, + MT6359P_RG_LDO_VCAMIO_EN_SHIFT, + MT6359P_DA_VCAMIO_B_EN_ADDR, MT6359P_RG_VCAMIO_VOSEL_ADDR, + MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT, + 1290), + MT6359_REG_FIXED("ldo_vcn18", VCN18, "vs1-ldo2", MT6359P_RG_LDO_VCN18_EN_ADDR, + MT6359P_DA_VCN18_B_EN_ADDR, 1800000), + MT6359_REG_FIXED("ldo_vfe28", VFE28, "vsys-ldo1", MT6359P_RG_LDO_VFE28_EN_ADDR, + MT6359P_DA_VFE28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vcn13", VCN13, "vs2-ldo2", vcn13_voltages, + MT6359P_RG_LDO_VCN13_EN_ADDR, MT6359P_RG_LDO_VCN13_EN_SHIFT, + MT6359P_DA_VCN13_B_EN_ADDR, MT6359P_RG_VCN13_VOSEL_ADDR, + MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vcn33_1", VCN33_1, "vsys-ldo1", vcn33_voltages, + MT6359P_RG_LDO_VCN33_1_EN_0_ADDR, + MT6359_RG_LDO_VCN33_1_EN_0_SHIFT, + MT6359P_DA_VCN33_1_B_EN_ADDR, MT6359P_RG_VCN33_1_VOSEL_ADDR, + MT6359_RG_VCN33_1_VOSEL_MASK << + MT6359_RG_VCN33_1_VOSEL_SHIFT, 240), + MT6359_REG_FIXED("ldo_vaux18", VAUX18, "vsys-ldo2", MT6359P_RG_LDO_VAUX18_EN_ADDR, + MT6359P_DA_VAUX18_B_EN_ADDR, 1800000), + MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, "vs2-ldo1", 500000, 1293750, + 6250, + MT6359P_RG_LDO_VSRAM_OTHERS_EN_ADDR, + MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359P_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT), + MT6359_LDO("ldo_vefuse", VEFUSE, "vs1-ldo2", vefuse_voltages, + MT6359P_RG_LDO_VEFUSE_EN_ADDR, + MT6359P_RG_LDO_VEFUSE_EN_SHIFT, + MT6359P_DA_VEFUSE_B_EN_ADDR, MT6359P_RG_VEFUSE_VOSEL_ADDR, + MT6359_RG_VEFUSE_VOSEL_MASK << MT6359_RG_VEFUSE_VOSEL_SHIFT, + 240), + MT6359_LDO("ldo_vxo22", VXO22, "vsys-ldo2", vxo22_voltages, + MT6359P_RG_LDO_VXO22_EN_ADDR, MT6359P_RG_LDO_VXO22_EN_SHIFT, + MT6359P_DA_VXO22_B_EN_ADDR, MT6359P_RG_VXO22_VOSEL_ADDR, + MT6359_RG_VXO22_VOSEL_MASK << MT6359_RG_VXO22_VOSEL_SHIFT, + 480), + MT6359_LDO("ldo_vrfck_1", VRFCK, "vsys-ldo2", vrfck_voltages_1, + MT6359P_RG_LDO_VRFCK_EN_ADDR, MT6359P_RG_LDO_VRFCK_EN_SHIFT, + MT6359P_DA_VRFCK_B_EN_ADDR, MT6359P_RG_VRFCK_VOSEL_ADDR, + MT6359_RG_VRFCK_VOSEL_MASK << MT6359_RG_VRFCK_VOSEL_SHIFT, + 480), + MT6359_REG_FIXED("ldo_vbif28", VBIF28, "vsys-ldo2", MT6359P_RG_LDO_VBIF28_EN_ADDR, + MT6359P_DA_VBIF28_B_EN_ADDR, 2800000), + MT6359_LDO("ldo_vio28", VIO28, "vsys-ldo2", vio28_voltages, + MT6359P_RG_LDO_VIO28_EN_ADDR, MT6359P_RG_LDO_VIO28_EN_SHIFT, + MT6359P_DA_VIO28_B_EN_ADDR, MT6359P_RG_VIO28_VOSEL_ADDR, + MT6359_RG_VIO28_VOSEL_MASK << MT6359_RG_VIO28_VOSEL_SHIFT, + 1920), + MT6359P_LDO1("ldo_vemc_1", VEMC, "vsys-ldo2", mt6359p_vemc_ops, vemc_voltages_1, + MT6359P_RG_LDO_VEMC_EN_ADDR, MT6359P_RG_LDO_VEMC_EN_SHIFT, + MT6359P_DA_VEMC_B_EN_ADDR, + MT6359P_RG_LDO_VEMC_VOSEL_0_ADDR, + MT6359P_RG_LDO_VEMC_VOSEL_0_MASK << + MT6359P_RG_LDO_VEMC_VOSEL_0_SHIFT), + MT6359_LDO("ldo_vcn33_2", VCN33_2, "vsys-ldo1", vcn33_voltages, + MT6359P_RG_LDO_VCN33_2_EN_0_ADDR, + MT6359P_RG_LDO_VCN33_2_EN_0_SHIFT, + MT6359P_DA_VCN33_2_B_EN_ADDR, MT6359P_RG_VCN33_2_VOSEL_ADDR, + MT6359_RG_VCN33_2_VOSEL_MASK << + MT6359_RG_VCN33_2_VOSEL_SHIFT, 240), + MT6359_LDO("ldo_va12", VA12, "vs2-ldo2", va12_voltages, + MT6359P_RG_LDO_VA12_EN_ADDR, MT6359P_RG_LDO_VA12_EN_SHIFT, + MT6359P_DA_VA12_B_EN_ADDR, MT6359P_RG_VA12_VOSEL_ADDR, + MT6359_RG_VA12_VOSEL_MASK << MT6359_RG_VA12_VOSEL_SHIFT, + 960), + MT6359_LDO("ldo_va09", VA09, "vs2-ldo2", va09_voltages, + MT6359P_RG_LDO_VA09_EN_ADDR, MT6359P_RG_LDO_VA09_EN_SHIFT, + MT6359P_DA_VA09_B_EN_ADDR, MT6359P_RG_VA09_VOSEL_ADDR, + MT6359_RG_VA09_VOSEL_MASK << MT6359_RG_VA09_VOSEL_SHIFT, + 960), + MT6359_LDO("ldo_vrf18", VRF18, "vs1-ldo2", vrf18_voltages, + MT6359P_RG_LDO_VRF18_EN_ADDR, MT6359P_RG_LDO_VRF18_EN_SHIFT, + MT6359P_DA_VRF18_B_EN_ADDR, MT6359P_RG_VRF18_VOSEL_ADDR, + MT6359_RG_VRF18_VOSEL_MASK << MT6359_RG_VRF18_VOSEL_SHIFT, + 240), + MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD, "vs2-ldo1", 500000, 1293750, 6250, + MT6359P_RG_LDO_VSRAM_MD_EN_ADDR, + MT6359P_DA_VSRAM_MD_B_EN_ADDR, + MT6359P_RG_LDO_VSRAM_MD_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT), + MT6359_LDO("ldo_vufs", VUFS, "vs1-ldo1", volt18_voltages, + MT6359P_RG_LDO_VUFS_EN_ADDR, MT6359P_RG_LDO_VUFS_EN_SHIFT, + MT6359P_DA_VUFS_B_EN_ADDR, MT6359P_RG_VUFS_VOSEL_ADDR, + MT6359_RG_VUFS_VOSEL_MASK << MT6359_RG_VUFS_VOSEL_SHIFT, + 1920), + MT6359_LDO("ldo_vm18", VM18, "vs1-ldo1", volt18_voltages, + MT6359P_RG_LDO_VM18_EN_ADDR, MT6359P_RG_LDO_VM18_EN_SHIFT, + MT6359P_DA_VM18_B_EN_ADDR, MT6359P_RG_VM18_VOSEL_ADDR, + MT6359_RG_VM18_VOSEL_MASK << MT6359_RG_VM18_VOSEL_SHIFT, + 1920), + /* vbbck is fed from vio18 internally. */ + MT6359_LDO("ldo_vbbck", VBBCK, "LDO_VIO18", vbbck_voltages, + MT6359P_RG_LDO_VBBCK_EN_ADDR, MT6359P_RG_LDO_VBBCK_EN_SHIFT, + MT6359P_DA_VBBCK_B_EN_ADDR, MT6359P_RG_VBBCK_VOSEL_ADDR, + MT6359P_RG_VBBCK_VOSEL_MASK << MT6359P_RG_VBBCK_VOSEL_SHIFT, + 480), + MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1, "vs2-ldo1", 500000, 1293750, 6250, + MT6359P_RG_LDO_VSRAM_PROC1_EN_ADDR, + MT6359P_DA_VSRAM_PROC1_B_EN_ADDR, + MT6359P_RG_LDO_VSRAM_PROC1_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT), + MT6359_LDO("ldo_vsim2", VSIM2, "vsys-ldo2", vsim2_voltages, + MT6359P_RG_LDO_VSIM2_EN_ADDR, MT6359P_RG_LDO_VSIM2_EN_SHIFT, + MT6359P_DA_VSIM2_B_EN_ADDR, MT6359P_RG_VSIM2_VOSEL_ADDR, + MT6359_RG_VSIM2_VOSEL_MASK << MT6359_RG_VSIM2_VOSEL_SHIFT, + 480), + MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB, "vs2-ldo1", + 500000, 1293750, 6250, + MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR, + MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR, + MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR, + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK << + MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT), + /* Placeholders for DT backward compatibility */ + MT6359_LDO_NOOP("ldo_vcn33_1_bt", VCN33_1_BT, "LDO_VCN33_1"), + MT6359_LDO_NOOP("ldo_vcn33_1_wifi", VCN33_1_WIFI, "LDO_VCN33_1"), + MT6359_LDO_NOOP("ldo_vcn33_2_bt", VCN33_2_BT, "LDO_VCN33_2"), + MT6359_LDO_NOOP("ldo_vcn33_2_wifi", VCN33_2_WIFI, "LDO_VCN33_2"), +}; + +struct mt6359_vcn33_regs { + u32 wifi_en_reg; + u32 wifi_en_mask; + u32 bt_en_reg; + u32 bt_en_mask; +}; + +static const struct mt6359_vcn33_regs vcn33_regs[][2] = { + { /* MT6359 */ + { + .wifi_en_reg = MT6359_RG_LDO_VCN33_1_EN_1_ADDR, + .wifi_en_mask = BIT(MT6359_RG_LDO_VCN33_1_EN_1_SHIFT), + .bt_en_reg = MT6359_RG_LDO_VCN33_1_EN_0_ADDR, + .bt_en_mask = BIT(MT6359_RG_LDO_VCN33_1_EN_0_SHIFT), + }, { + .wifi_en_reg = MT6359_RG_LDO_VCN33_2_EN_1_ADDR, + .wifi_en_mask = BIT(MT6359_RG_LDO_VCN33_2_EN_1_SHIFT), + .bt_en_reg = MT6359_RG_LDO_VCN33_2_EN_0_ADDR, + .bt_en_mask = BIT(MT6359_RG_LDO_VCN33_2_EN_0_SHIFT), + } + }, { /* MT6359P */ + { + .wifi_en_reg = MT6359P_RG_LDO_VCN33_1_EN_1_ADDR, + .wifi_en_mask = BIT(MT6359P_RG_LDO_VCN33_1_EN_1_SHIFT), + .bt_en_reg = MT6359P_RG_LDO_VCN33_1_EN_0_ADDR, + .bt_en_mask = BIT(MT6359_RG_LDO_VCN33_1_EN_0_SHIFT), + }, { + .wifi_en_reg = MT6359P_RG_LDO_VCN33_2_EN_1_ADDR, + .wifi_en_mask = BIT(MT6359_RG_LDO_VCN33_2_EN_1_SHIFT), + .bt_en_reg = MT6359P_RG_LDO_VCN33_2_EN_0_ADDR, + .bt_en_mask = BIT(MT6359P_RG_LDO_VCN33_2_EN_0_SHIFT), + } + } +}; + +static int mt6359_sync_vcn33_setting(struct device *dev, unsigned int idx) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(dev->parent); + unsigned int val; + int ret; + + /* + * VCN33_[12]_WIFI and VCN33_[12]_BT are two separate enable bits for + * the same regulator. They share the same voltage setting and output + * pin. Instead of having two potentially conflicting regulators, just + * have one regulator. Sync the two enable bits and only use one in + * the regulator device. + */ + for (unsigned int i = 0; i < ARRAY_SIZE(vcn33_regs[0]); i++) { + u32 bt_en_mask = vcn33_regs[idx][i].bt_en_mask; + u32 wifi_en_mask = vcn33_regs[idx][i].wifi_en_mask; + + ret = regmap_read(mt6397->regmap, vcn33_regs[idx][i].wifi_en_reg, &val); + if (ret) + return dev_err_probe(dev, ret, "Failed to read VCN33_%u_WIFI setting\n", + i + 1); + + if (!(val & wifi_en_mask)) + continue; + + /* Sync VCN33_[12]_WIFI enable status to VCN33_[12]_BT */ + ret = regmap_update_bits(mt6397->regmap, vcn33_regs[idx][i].bt_en_reg, + bt_en_mask, bt_en_mask); + if (ret) + return dev_err_probe(dev, ret, + "Failed to sync VCN33_%u_WIFI setting to VCN33_%u_BT\n", + i + 1, i + 1); + + /* Disable VCN33_[12]_WIFI */ + ret = regmap_update_bits(mt6397->regmap, vcn33_regs[idx][i].wifi_en_reg, + wifi_en_mask, 0); + if (ret) + return dev_err_probe(dev, ret, "Failed to disable VCN33_%u_WIFI\n", i + 1); + } + + return 0; +} + +static int mt6359_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + const struct mt6359_regulator_info *mt6359_info; + const char *vio18_name, *vcn33_1_name, *vcn33_2_name; + int i, hw_ver, ret; + + ret = regmap_read(mt6397->regmap, MT6359P_HWCID, &hw_ver); + if (ret) + return ret; + + if (hw_ver >= MT6359P_CHIP_VER) { + mt6359_info = mt6359p_regulators; + ret = mt6359_sync_vcn33_setting(&pdev->dev, 1); + if (ret) + return ret; + } else { + mt6359_info = mt6359_regulators; + ret = mt6359_sync_vcn33_setting(&pdev->dev, 0); + if (ret) + return ret; + } + + vio18_name = mt6359_info[MT6359_ID_VIO18].desc.name; + vcn33_1_name = mt6359_info[MT6359_ID_VCN33_1].desc.name; + vcn33_2_name = mt6359_info[MT6359_ID_VCN33_2].desc.name; + + config.dev = mt6397->dev; + config.regmap = mt6397->regmap; + for (i = 0; i < MT6359_MAX_REGULATOR; i++, mt6359_info++) { + const struct regulator_desc *desc = &mt6359_info->desc; + struct regulator_desc *_desc; + + /* drop const here, but all uses in the driver are const */ + config.driver_data = (void *)mt6359_info; + + /* Use vio18's actual name as supply_name for vbbck */ + if (i == MT6359_ID_VBBCK && strcmp(desc->supply_name, vio18_name) != 0) { + _desc = devm_kzalloc(&pdev->dev, sizeof(*_desc), GFP_KERNEL); + if (!_desc) + return -ENOMEM; + + memcpy(_desc, desc, sizeof(*_desc)); + _desc->supply_name = vio18_name; + desc = _desc; + } + + /* Use vcn33_1's actual name as supply_name for vcn33_1_(bt|wifi) */ + if ((i == MT6359_ID_VCN33_1_BT || i == MT6359_ID_VCN33_1_WIFI) && + strcmp(desc->supply_name, vcn33_1_name) != 0) { + _desc = devm_kzalloc(&pdev->dev, sizeof(*_desc), GFP_KERNEL); + if (!_desc) + return -ENOMEM; + + memcpy(_desc, desc, sizeof(*_desc)); + _desc->supply_name = vcn33_1_name; + desc = _desc; + } + + /* Use vcn33_2's actual name as supply_name for vcn33_2_(bt|wifi) */ + if ((i == MT6359_ID_VCN33_2_BT || i == MT6359_ID_VCN33_2_WIFI) && + strcmp(desc->supply_name, vcn33_2_name) != 0) { + _desc = devm_kzalloc(&pdev->dev, sizeof(*_desc), GFP_KERNEL); + if (!_desc) + return -ENOMEM; + + memcpy(_desc, desc, sizeof(*_desc)); + _desc->supply_name = vcn33_2_name; + desc = _desc; + } + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", mt6359_info->desc.name); + return PTR_ERR(rdev); + } + + /* Save vio18 name for vbbck */ + if (i == MT6359_ID_VIO18) + vio18_name = rdev_get_name(rdev); + + /* Save vcn33_1 name for vbbck */ + if (i == MT6359_ID_VCN33_1) + vcn33_1_name = rdev_get_name(rdev); + + /* Save vcn33_2 name for vbbck */ + if (i == MT6359_ID_VCN33_2) + vcn33_2_name = rdev_get_name(rdev); + } + + return 0; +} + +static const struct platform_device_id mt6359_platform_ids[] = { + { .name = "mt6359-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6359_platform_ids); + +static struct platform_driver mt6359_regulator_driver = { + .driver = { + .name = "mt6359-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6359_regulator_probe, + .id_table = mt6359_platform_ids, +}; + +module_platform_driver(mt6359_regulator_driver); + +MODULE_AUTHOR("Wen Su "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6359 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6360-regulator.c b/drivers/regulator/mt6360-regulator.c new file mode 100644 index 000000000..ed25e9603 --- /dev/null +++ b/drivers/regulator/mt6360-regulator.c @@ -0,0 +1,466 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (C) 2020 MediaTek Inc. +// +// Author: Gene Chen + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +enum { + MT6360_REGULATOR_BUCK1 = 0, + MT6360_REGULATOR_BUCK2, + MT6360_REGULATOR_LDO6, + MT6360_REGULATOR_LDO7, + MT6360_REGULATOR_LDO1, + MT6360_REGULATOR_LDO2, + MT6360_REGULATOR_LDO3, + MT6360_REGULATOR_LDO5, + MT6360_REGULATOR_MAX, +}; + +struct mt6360_irq_mapping { + const char *name; + irq_handler_t handler; +}; + +struct mt6360_regulator_desc { + const struct regulator_desc desc; + unsigned int mode_reg; + unsigned int mode_mask; + unsigned int state_reg; + unsigned int state_mask; + const struct mt6360_irq_mapping *irq_tables; + int irq_table_size; +}; + +struct mt6360_regulator_data { + struct device *dev; + struct regmap *regmap; +}; + +static irqreturn_t mt6360_pgb_event_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_FAIL, NULL); + return IRQ_HANDLED; +} + +static irqreturn_t mt6360_oc_event_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); + return IRQ_HANDLED; +} + +static irqreturn_t mt6360_ov_event_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_REGULATION_OUT, NULL); + return IRQ_HANDLED; +} + +static irqreturn_t mt6360_uv_event_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, NULL); + return IRQ_HANDLED; +} + +static const struct mt6360_irq_mapping buck1_irq_tbls[] = { + { "buck1_pgb_evt", mt6360_pgb_event_handler }, + { "buck1_oc_evt", mt6360_oc_event_handler }, + { "buck1_ov_evt", mt6360_ov_event_handler }, + { "buck1_uv_evt", mt6360_uv_event_handler }, +}; + +static const struct mt6360_irq_mapping buck2_irq_tbls[] = { + { "buck2_pgb_evt", mt6360_pgb_event_handler }, + { "buck2_oc_evt", mt6360_oc_event_handler }, + { "buck2_ov_evt", mt6360_ov_event_handler }, + { "buck2_uv_evt", mt6360_uv_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo6_irq_tbls[] = { + { "ldo6_pgb_evt", mt6360_pgb_event_handler }, + { "ldo6_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo7_irq_tbls[] = { + { "ldo7_pgb_evt", mt6360_pgb_event_handler }, + { "ldo7_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo1_irq_tbls[] = { + { "ldo1_pgb_evt", mt6360_pgb_event_handler }, + { "ldo1_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo2_irq_tbls[] = { + { "ldo2_pgb_evt", mt6360_pgb_event_handler }, + { "ldo2_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo3_irq_tbls[] = { + { "ldo3_pgb_evt", mt6360_pgb_event_handler }, + { "ldo3_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct mt6360_irq_mapping ldo5_irq_tbls[] = { + { "ldo5_pgb_evt", mt6360_pgb_event_handler }, + { "ldo5_oc_evt", mt6360_oc_event_handler }, +}; + +static const struct linear_range buck_vout_ranges[] = { + REGULATOR_LINEAR_RANGE(300000, 0x00, 0xc7, 5000), + REGULATOR_LINEAR_RANGE(1300000, 0xc8, 0xff, 0), +}; + +static const struct linear_range ldo_vout_ranges1[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x09, 10000), + REGULATOR_LINEAR_RANGE(600000, 0x0a, 0x10, 0), + REGULATOR_LINEAR_RANGE(610000, 0x11, 0x19, 10000), + REGULATOR_LINEAR_RANGE(700000, 0x1a, 0x20, 0), + REGULATOR_LINEAR_RANGE(710000, 0x21, 0x29, 10000), + REGULATOR_LINEAR_RANGE(800000, 0x2a, 0x30, 0), + REGULATOR_LINEAR_RANGE(810000, 0x31, 0x39, 10000), + REGULATOR_LINEAR_RANGE(900000, 0x3a, 0x40, 0), + REGULATOR_LINEAR_RANGE(910000, 0x41, 0x49, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0x4a, 0x50, 0), + REGULATOR_LINEAR_RANGE(1010000, 0x51, 0x59, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0x5a, 0x60, 0), + REGULATOR_LINEAR_RANGE(1110000, 0x61, 0x69, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0x6a, 0x70, 0), + REGULATOR_LINEAR_RANGE(1210000, 0x71, 0x79, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0x7a, 0x80, 0), + REGULATOR_LINEAR_RANGE(1310000, 0x81, 0x89, 10000), + REGULATOR_LINEAR_RANGE(1400000, 0x8a, 0x90, 0), + REGULATOR_LINEAR_RANGE(1410000, 0x91, 0x99, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0x9a, 0xa0, 0), + REGULATOR_LINEAR_RANGE(1510000, 0xa1, 0xa9, 10000), + REGULATOR_LINEAR_RANGE(1600000, 0xaa, 0xb0, 0), + REGULATOR_LINEAR_RANGE(1610000, 0xb1, 0xb9, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0xba, 0xc0, 0), + REGULATOR_LINEAR_RANGE(1710000, 0xc1, 0xc9, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0xca, 0xd0, 0), + REGULATOR_LINEAR_RANGE(1810000, 0xd1, 0xd9, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0xda, 0xe0, 0), + REGULATOR_LINEAR_RANGE(1910000, 0xe1, 0xe9, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0xea, 0xf0, 0), + REGULATOR_LINEAR_RANGE(2010000, 0xf1, 0xf9, 10000), + REGULATOR_LINEAR_RANGE(2100000, 0xfa, 0xff, 0), +}; + +static const struct linear_range ldo_vout_ranges2[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x09, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0x0a, 0x10, 0), + REGULATOR_LINEAR_RANGE(1310000, 0x11, 0x19, 10000), + REGULATOR_LINEAR_RANGE(1400000, 0x1a, 0x1f, 0), + REGULATOR_LINEAR_RANGE(1500000, 0x20, 0x29, 10000), + REGULATOR_LINEAR_RANGE(1600000, 0x2a, 0x2f, 0), + REGULATOR_LINEAR_RANGE(1700000, 0x30, 0x39, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0x3a, 0x40, 0), + REGULATOR_LINEAR_RANGE(1810000, 0x41, 0x49, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0x4a, 0x4f, 0), + REGULATOR_LINEAR_RANGE(2000000, 0x50, 0x59, 10000), + REGULATOR_LINEAR_RANGE(2100000, 0x5a, 0x60, 0), + REGULATOR_LINEAR_RANGE(2110000, 0x61, 0x69, 10000), + REGULATOR_LINEAR_RANGE(2200000, 0x6a, 0x6f, 0), + REGULATOR_LINEAR_RANGE(2500000, 0x70, 0x79, 10000), + REGULATOR_LINEAR_RANGE(2600000, 0x7a, 0x7f, 0), + REGULATOR_LINEAR_RANGE(2700000, 0x80, 0x89, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0x8a, 0x90, 0), + REGULATOR_LINEAR_RANGE(2810000, 0x91, 0x99, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0x9a, 0xa0, 0), + REGULATOR_LINEAR_RANGE(2910000, 0xa1, 0xa9, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0xaa, 0xb0, 0), + REGULATOR_LINEAR_RANGE(3010000, 0xb1, 0xb9, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0xba, 0xc0, 0), + REGULATOR_LINEAR_RANGE(3110000, 0xc1, 0xc9, 10000), + REGULATOR_LINEAR_RANGE(3200000, 0xca, 0xcf, 0), + REGULATOR_LINEAR_RANGE(3300000, 0xd0, 0xd9, 10000), + REGULATOR_LINEAR_RANGE(3400000, 0xda, 0xe0, 0), + REGULATOR_LINEAR_RANGE(3410000, 0xe1, 0xe9, 10000), + REGULATOR_LINEAR_RANGE(3500000, 0xea, 0xf0, 0), + REGULATOR_LINEAR_RANGE(3510000, 0xf1, 0xf9, 10000), + REGULATOR_LINEAR_RANGE(3600000, 0xfa, 0xff, 0), +}; + +static const struct linear_range ldo_vout_ranges3[] = { + REGULATOR_LINEAR_RANGE(2700000, 0x00, 0x09, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0x0a, 0x10, 0), + REGULATOR_LINEAR_RANGE(2810000, 0x11, 0x19, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0x1a, 0x20, 0), + REGULATOR_LINEAR_RANGE(2910000, 0x21, 0x29, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0x2a, 0x30, 0), + REGULATOR_LINEAR_RANGE(3010000, 0x31, 0x39, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0x3a, 0x40, 0), + REGULATOR_LINEAR_RANGE(3110000, 0x41, 0x49, 10000), + REGULATOR_LINEAR_RANGE(3200000, 0x4a, 0x4f, 0), + REGULATOR_LINEAR_RANGE(3300000, 0x50, 0x59, 10000), + REGULATOR_LINEAR_RANGE(3400000, 0x5a, 0x60, 0), + REGULATOR_LINEAR_RANGE(3410000, 0x61, 0x69, 10000), + REGULATOR_LINEAR_RANGE(3500000, 0x6a, 0x70, 0), + REGULATOR_LINEAR_RANGE(3510000, 0x71, 0x79, 10000), + REGULATOR_LINEAR_RANGE(3600000, 0x7a, 0x7f, 0), +}; + +static int mt6360_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + int shift = ffs(rdesc->mode_mask) - 1; + unsigned int val; + int ret; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = MT6360_OPMODE_NORMAL; + break; + case REGULATOR_MODE_STANDBY: + val = MT6360_OPMODE_ULP; + break; + case REGULATOR_MODE_IDLE: + val = MT6360_OPMODE_LP; + break; + default: + return -EINVAL; + } + + ret = regmap_update_bits(regmap, rdesc->mode_reg, rdesc->mode_mask, val << shift); + if (ret) { + dev_err(&rdev->dev, "%s: fail (%d)\n", __func__, ret); + return ret; + } + + return 0; +} + +static unsigned int mt6360_regulator_get_mode(struct regulator_dev *rdev) +{ + const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + int shift = ffs(rdesc->mode_mask) - 1; + unsigned int val; + int ret; + + ret = regmap_read(regmap, rdesc->mode_reg, &val); + if (ret) + return ret; + + val &= rdesc->mode_mask; + val >>= shift; + + switch (val) { + case MT6360_OPMODE_LP: + return REGULATOR_MODE_IDLE; + case MT6360_OPMODE_ULP: + return REGULATOR_MODE_STANDBY; + case MT6360_OPMODE_NORMAL: + return REGULATOR_MODE_NORMAL; + default: + return -EINVAL; + } +} + +static int mt6360_regulator_get_status(struct regulator_dev *rdev) +{ + const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + int ret; + + ret = regmap_read(regmap, rdesc->state_reg, &val); + if (ret) + return ret; + + if (val & rdesc->state_mask) + return REGULATOR_STATUS_ON; + + return REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops mt6360_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_mode = mt6360_regulator_set_mode, + .get_mode = mt6360_regulator_get_mode, + .get_status = mt6360_regulator_get_status, +}; + +static unsigned int mt6360_regulator_of_map_mode(unsigned int hw_mode) +{ + switch (hw_mode) { + case MT6360_OPMODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case MT6360_OPMODE_LP: + return REGULATOR_MODE_IDLE; + case MT6360_OPMODE_ULP: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +#define MT6360_REGULATOR_DESC(match, _name, _sname, ereg, emask, vreg, \ + vmask, mreg, mmask, streg, stmask, \ + vranges, vcnts, offon_delay, irq_tbls) \ +{ \ + .desc = { \ + .name = #_name, \ + .supply_name = #_sname, \ + .id = MT6360_REGULATOR_##_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulator"), \ + .of_map_mode = mt6360_regulator_of_map_mode, \ + .owner = THIS_MODULE, \ + .ops = &mt6360_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .vsel_reg = vreg, \ + .vsel_mask = vmask, \ + .enable_reg = ereg, \ + .enable_mask = emask, \ + .linear_ranges = vranges, \ + .n_linear_ranges = ARRAY_SIZE(vranges), \ + .n_voltages = vcnts, \ + .off_on_delay = offon_delay, \ + }, \ + .mode_reg = mreg, \ + .mode_mask = mmask, \ + .state_reg = streg, \ + .state_mask = stmask, \ + .irq_tables = irq_tbls, \ + .irq_table_size = ARRAY_SIZE(irq_tbls), \ +} + +static const struct mt6360_regulator_desc mt6360_regulator_descs[] = { + MT6360_REGULATOR_DESC("buck1", BUCK1, BUCK1_VIN, + 0x117, 0x40, 0x110, 0xff, 0x117, 0x30, 0x117, 0x04, + buck_vout_ranges, 256, 0, buck1_irq_tbls), + MT6360_REGULATOR_DESC("buck2", BUCK2, BUCK2_VIN, + 0x127, 0x40, 0x120, 0xff, 0x127, 0x30, 0x127, 0x04, + buck_vout_ranges, 256, 0, buck2_irq_tbls), + MT6360_REGULATOR_DESC("ldo6", LDO6, LDO_VIN3, + 0x137, 0x40, 0x13B, 0xff, 0x137, 0x30, 0x137, 0x04, + ldo_vout_ranges1, 256, 0, ldo6_irq_tbls), + MT6360_REGULATOR_DESC("ldo7", LDO7, LDO_VIN3, + 0x131, 0x40, 0x135, 0xff, 0x131, 0x30, 0x131, 0x04, + ldo_vout_ranges1, 256, 0, ldo7_irq_tbls), + MT6360_REGULATOR_DESC("ldo1", LDO1, LDO_VIN1, + 0x217, 0x40, 0x21B, 0xff, 0x217, 0x30, 0x217, 0x04, + ldo_vout_ranges2, 256, 0, ldo1_irq_tbls), + MT6360_REGULATOR_DESC("ldo2", LDO2, LDO_VIN1, + 0x211, 0x40, 0x215, 0xff, 0x211, 0x30, 0x211, 0x04, + ldo_vout_ranges2, 256, 0, ldo2_irq_tbls), + MT6360_REGULATOR_DESC("ldo3", LDO3, LDO_VIN1, + 0x205, 0x40, 0x209, 0xff, 0x205, 0x30, 0x205, 0x04, + ldo_vout_ranges2, 256, 100, ldo3_irq_tbls), + MT6360_REGULATOR_DESC("ldo5", LDO5, LDO_VIN2, + 0x20B, 0x40, 0x20F, 0x7f, 0x20B, 0x30, 0x20B, 0x04, + ldo_vout_ranges3, 128, 100, ldo5_irq_tbls), +}; + +static int mt6360_regulator_irq_register(struct platform_device *pdev, + struct regulator_dev *rdev, + const struct mt6360_irq_mapping *tbls, + int tbl_size) +{ + int i, irq, ret; + + for (i = 0; i < tbl_size; i++) { + const struct mt6360_irq_mapping *irq_desc = tbls + i; + + irq = platform_get_irq_byname(pdev, irq_desc->name); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, irq_desc->handler, 0, + irq_desc->name, rdev); + if (ret) { + dev_err(&pdev->dev, "Fail to request %s irq\n", irq_desc->name); + return ret; + } + } + + return 0; +} + +static int mt6360_regulator_probe(struct platform_device *pdev) +{ + struct mt6360_regulator_data *mrd; + struct regulator_config config = {}; + int i, ret; + + mrd = devm_kzalloc(&pdev->dev, sizeof(*mrd), GFP_KERNEL); + if (!mrd) + return -ENOMEM; + + mrd->dev = &pdev->dev; + + mrd->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!mrd->regmap) { + dev_err(&pdev->dev, "Failed to get parent regmap\n"); + return -ENODEV; + } + + config.dev = pdev->dev.parent; + config.driver_data = mrd; + config.regmap = mrd->regmap; + + for (i = 0; i < ARRAY_SIZE(mt6360_regulator_descs); i++) { + const struct mt6360_regulator_desc *rdesc = mt6360_regulator_descs + i; + struct regulator_dev *rdev; + + rdev = devm_regulator_register(&pdev->dev, &rdesc->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register %d regulator\n", i); + return PTR_ERR(rdev); + } + + ret = mt6360_regulator_irq_register(pdev, rdev, rdesc->irq_tables, + rdesc->irq_table_size); + if (ret) { + dev_err(&pdev->dev, "Failed to register %d regulator irqs\n", i); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id mt6360_regulator_id_table[] = { + { .name = "mt6360-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, mt6360_regulator_id_table); + +static struct platform_driver mt6360_regulator_driver = { + .driver = { + .name = "mt6360-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = mt6360_regulator_probe, + .id_table = mt6360_regulator_id_table, +}; +module_platform_driver(mt6360_regulator_driver); + +MODULE_AUTHOR("Gene Chen "); +MODULE_DESCRIPTION("MT6360 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mt6363-regulator.c b/drivers/regulator/mt6363-regulator.c new file mode 100644 index 000000000..aa6a8eb7a --- /dev/null +++ b/drivers/regulator/mt6363-regulator.c @@ -0,0 +1,944 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2024 MediaTek Inc. +// Copyright (c) 2025 Collabora Ltd +// AngeloGioacchino Del Regno + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define MT6363_REGULATOR_MODE_NORMAL 0 +#define MT6363_REGULATOR_MODE_FCCM 1 +#define MT6363_REGULATOR_MODE_LP 2 +#define MT6363_REGULATOR_MODE_ULP 3 + +#define EN_SET_OFFSET 0x1 +#define EN_CLR_OFFSET 0x2 +#define OP_CFG_OFFSET 0x5 + +#define NORMAL_OP_CFG 0x10 +#define NORMAL_OP_EN 0x800000 + +#define OC_IRQ_ENABLE_DELAY_MS 10 + +/* Unlock keys for TMA and BUCK_TOP */ +#define MT6363_TMA_UNLOCK_VALUE 0x9c9c +#define MT6363_BUCK_TOP_UNLOCK_VALUE 0x5543 + +enum { + MT6363_ID_VBUCK1, + MT6363_ID_VBUCK2, + MT6363_ID_VBUCK3, + MT6363_ID_VBUCK4, + MT6363_ID_VBUCK5, + MT6363_ID_VBUCK6, + MT6363_ID_VBUCK7, + MT6363_ID_VS1, + MT6363_ID_VS2, + MT6363_ID_VS3, + MT6363_ID_VA12_1, + MT6363_ID_VA12_2, + MT6363_ID_VA15, + MT6363_ID_VAUX18, + MT6363_ID_VCN13, + MT6363_ID_VCN15, + MT6363_ID_VEMC, + MT6363_ID_VIO075, + MT6363_ID_VIO18, + MT6363_ID_VM18, + MT6363_ID_VSRAM_APU, + MT6363_ID_VSRAM_CPUB, + MT6363_ID_VSRAM_CPUM, + MT6363_ID_VSRAM_CPUL, + MT6363_ID_VSRAM_DIGRF, + MT6363_ID_VSRAM_MDFE, + MT6363_ID_VSRAM_MODEM, + MT6363_ID_VRF09, + MT6363_ID_VRF12, + MT6363_ID_VRF13, + MT6363_ID_VRF18, + MT6363_ID_VRFIO18, + MT6363_ID_VTREF18, + MT6363_ID_VUFS12, + MT6363_ID_VUFS18, +}; + +/** + * struct mt6363_regulator_info - MT6363 regulators information + * @desc: Regulator description structure + * @lp_mode_reg: Low Power mode register (normal/idle) + * @lp_mode_mask: Low Power mode regulator mask + * @hw_lp_mode_reg: Hardware voted Low Power mode register (normal/idle) + * @hw_lp_mode_mask: Hardware voted Low Power mode regulator mask + * @modeset_reg: AUTO/PWM mode register + * @modeset_mask: AUTO/PWM regulator mask + * @lp_imax_uA: Maximum load current (microamps), for Low Power mode only + * @op_en_reg: Operation mode enablement register + * @orig_op_en: Backup of a regulator's operation mode enablement register + * @orig_op_cfg: Backup of a regulator's operation mode configuration register + * @oc_work: Delayed work for enabling overcurrent IRQ + * @hwirq: PMIC-Internal HW Interrupt for overcurrent event + * @virq: Mapped Interrupt for overcurrent event + */ +struct mt6363_regulator_info { + struct regulator_desc desc; + u16 lp_mode_reg; + u16 lp_mode_mask; + u16 hw_lp_mode_reg; + u16 hw_lp_mode_mask; + u16 modeset_reg; + u16 modeset_mask; + int lp_imax_uA; + u16 op_en_reg; + u32 orig_op_en; + u8 orig_op_cfg; + struct delayed_work oc_work; + u8 hwirq; + int virq; +}; + +#define MT6363_BUCK(match, vreg, min, max, step, en_reg, lp_reg, \ + mset_reg, ocp_intn) \ +[MT6363_ID_##vreg] = { \ + .desc = { \ + .name = match, \ + .supply_name = "vsys-"match, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6363_vreg_setclr_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6363_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min) / step + 1, \ + .min_uV = min, \ + .uV_step = step, \ + .enable_reg = en_reg, \ + .enable_mask = BIT(MT6363_RG_BUCK_##vreg##_EN_BIT), \ + .vsel_reg = MT6363_RG_BUCK_##vreg##_VOSEL_ADDR, \ + .vsel_mask = MT6363_RG_BUCK_##vreg##_VOSEL_MASK, \ + .of_map_mode = mt6363_map_mode, \ + }, \ + .lp_mode_reg = lp_reg, \ + .lp_mode_mask = BIT(MT6363_RG_BUCK_##vreg##_LP_BIT), \ + .hw_lp_mode_reg = MT6363_BUCK_##vreg##_HW_LP_MODE, \ + .hw_lp_mode_mask = 0xc, \ + .modeset_reg = mset_reg, \ + .modeset_mask = BIT(MT6363_RG_##vreg##_FCCM_BIT), \ + .lp_imax_uA = 100000, \ + .op_en_reg = MT6363_BUCK_##vreg##_OP_EN_0, \ + .hwirq = ocp_intn, \ +} + +#define MT6363_LDO_LINEAR_OPS(match, vreg, in_sup, vops, min, max, \ + step, buck_reg, ocp_intn) \ +[MT6363_ID_##vreg] = { \ + .desc = { \ + .name = match, \ + .supply_name = in_sup, \ + .of_match = of_match_ptr(match), \ + .ops = &vops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6363_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min) / step + 1, \ + .min_uV = min, \ + .uV_step = step, \ + .enable_reg = MT6363_RG_##buck_reg##_EN_ADDR, \ + .enable_mask = BIT(MT6363_RG_LDO_##vreg##_EN_BIT), \ + .vsel_reg = MT6363_RG_LDO_##vreg##_VOSEL_ADDR, \ + .vsel_mask = MT6363_RG_LDO_##vreg##_VOSEL_MASK, \ + .of_map_mode = mt6363_map_mode, \ + }, \ + .lp_mode_reg = MT6363_RG_##buck_reg##_LP_ADDR, \ + .lp_mode_mask = BIT(MT6363_RG_LDO_##vreg##_LP_BIT), \ + .hw_lp_mode_reg = MT6363_LDO_##vreg##_HW_LP_MODE, \ + .hw_lp_mode_mask = 0x4, \ + .hwirq = ocp_intn, \ +} + +#define MT6363_LDO_L_SC(match, vreg, inp, min, max, step, buck_reg, \ + ocp_intn) \ + MT6363_LDO_LINEAR_OPS(match, vreg, inp, mt6363_vreg_setclr_ops, \ + min, max, step, buck_reg, ocp_intn) + +#define MT6363_LDO_L(match, vreg, inp, min, max, step, buck_reg, \ + ocp_intn) \ + MT6363_LDO_LINEAR_OPS(match, vreg, inp, mt6363_ldo_linear_ops, \ + min, max, step, buck_reg, ocp_intn) + +#define MT6363_LDO_LINEAR_CAL_OPS(match, vreg, in_sup, vops, vrnum, \ + ocp_intn) \ +[MT6363_ID_##vreg] = { \ + .desc = { \ + .name = match, \ + .supply_name = in_sup, \ + .of_match = of_match_ptr(match), \ + .ops = &vops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6363_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_ranges##vrnum) * 11, \ + .linear_ranges = ldo_volt_ranges##vrnum, \ + .n_linear_ranges = ARRAY_SIZE(ldo_volt_ranges##vrnum), \ + .linear_range_selectors_bitfield = ldos_cal_selectors, \ + .enable_reg = MT6363_RG_LDO_##vreg##_ADDR, \ + .enable_mask = BIT(MT6363_RG_LDO_##vreg##_EN_BIT), \ + .vsel_reg = MT6363_RG_##vreg##_VOCAL_ADDR, \ + .vsel_mask = MT6363_RG_##vreg##_VOCAL_MASK, \ + .vsel_range_reg = MT6363_RG_##vreg##_VOSEL_ADDR, \ + .vsel_range_mask = MT6363_RG_##vreg##_VOSEL_MASK, \ + .of_map_mode = mt6363_map_mode, \ + }, \ + .lp_mode_reg = MT6363_RG_LDO_##vreg##_ADDR, \ + .lp_mode_mask = BIT(MT6363_RG_LDO_##vreg##_LP_BIT), \ + .hw_lp_mode_reg = MT6363_LDO_##vreg##_HW_LP_MODE, \ + .hw_lp_mode_mask = 0x4, \ + .lp_imax_uA = 10000, \ + .op_en_reg = MT6363_LDO_##vreg##_OP_EN0, \ + .hwirq = ocp_intn, \ +} + +#define MT6363_LDO_VT(match, vreg, inp, vranges_num, ocp_intn) \ + MT6363_LDO_LINEAR_CAL_OPS(match, vreg, inp, mt6363_ldo_vtable_ops,\ + vranges_num, ocp_intn) + +static const unsigned int ldos_cal_selectors[] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +}; + +static const struct linear_range ldo_volt_ranges0[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3500000, 0, 10, 10000) +}; + +static const struct linear_range ldo_volt_ranges1[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1810000, 0, 10, 10000) +}; + +static const struct linear_range ldo_volt_ranges2[] = { + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000) +}; + +static const struct linear_range ldo_volt_ranges3[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2100000, 0, 10, 10000) +}; + +static const struct linear_range ldo_volt_ranges4[] = { + REGULATOR_LINEAR_RANGE(550000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(600000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(650000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(700000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(750000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(800000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(900000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(950000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1050000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1150000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1750000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(1850000, 0, 10, 5000) +}; + +static const struct linear_range ldo_volt_ranges5[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(650000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(700000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(750000, 0, 10, 5000), + REGULATOR_LINEAR_RANGE(800000, 0, 10, 5000) +}; + +static int mt6363_vreg_enable_setclr(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_SET_OFFSET, + rdev->desc->enable_mask); +} + +static int mt6363_vreg_disable_setclr(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_CLR_OFFSET, + rdev->desc->enable_mask); +} + +static inline unsigned int mt6363_map_mode(unsigned int mode) +{ + switch (mode) { + case MT6363_REGULATOR_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case MT6363_REGULATOR_MODE_FCCM: + return REGULATOR_MODE_FAST; + case MT6363_REGULATOR_MODE_LP: + return REGULATOR_MODE_IDLE; + case MT6363_REGULATOR_MODE_ULP: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int mt6363_regulator_get_mode(struct regulator_dev *rdev) +{ + struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + if (info->modeset_reg) { + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret) { + dev_err(&rdev->dev, "Failed to get mt6363 mode: %d\n", ret); + return ret; + } + + if (val & info->modeset_mask) + return REGULATOR_MODE_FAST; + } else { + val = 0; + } + + ret = regmap_read(rdev->regmap, info->hw_lp_mode_reg, &val); + val &= info->hw_lp_mode_mask; + + if (ret) { + dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret); + return ret; + } + + if (val) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int mt6363_buck_unlock(struct regmap *map, bool unlock) +{ + u16 buf = unlock ? MT6363_BUCK_TOP_UNLOCK_VALUE : 0; + + return regmap_bulk_write(map, MT6363_BUCK_TOP_KEY_PROT_LO, &buf, sizeof(buf)); +} + +static int mt6363_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev->regmap; + int cur_mode, ret; + + if (!info->modeset_reg && mode == REGULATOR_MODE_FAST) + return -EOPNOTSUPP; + + switch (mode) { + case REGULATOR_MODE_FAST: + ret = mt6363_buck_unlock(regmap, true); + if (ret) + break; + + ret = regmap_set_bits(regmap, info->modeset_reg, info->modeset_mask); + + mt6363_buck_unlock(regmap, false); + break; + case REGULATOR_MODE_NORMAL: + cur_mode = mt6363_regulator_get_mode(rdev); + if (cur_mode < 0) { + ret = cur_mode; + break; + } + + if (cur_mode == REGULATOR_MODE_FAST) { + ret = mt6363_buck_unlock(regmap, true); + if (ret) + break; + + ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask); + + mt6363_buck_unlock(regmap, false); + break; + } else if (cur_mode == REGULATOR_MODE_IDLE) { + ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); + if (ret == 0) + usleep_range(100, 200); + } else { + ret = 0; + } + break; + case REGULATOR_MODE_IDLE: + ret = regmap_set_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); + break; + default: + ret = -EINVAL; + } + + if (ret) { + dev_err(&rdev->dev, "Failed to set mode %u: %d\n", mode, ret); + return ret; + } + + return 0; +} + +static int mt6363_regulator_set_load(struct regulator_dev *rdev, int load_uA) +{ + struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); + unsigned int opmode_cfg, opmode_en; + int i, ret; + + if (!info->lp_imax_uA) + return -EINVAL; + + if (load_uA >= info->lp_imax_uA) { + ret = mt6363_regulator_set_mode(rdev, REGULATOR_MODE_NORMAL); + if (ret) + return ret; + + opmode_cfg = NORMAL_OP_CFG; + opmode_en = NORMAL_OP_EN; + } else { + opmode_cfg = info->orig_op_cfg; + opmode_en = info->orig_op_en; + } + + ret = regmap_write(rdev->regmap, info->op_en_reg + OP_CFG_OFFSET, opmode_cfg); + if (ret) + return ret; + + for (i = 0; i < 3; i++) { + ret = regmap_write(rdev->regmap, info->op_en_reg + i, + (opmode_en >> (i * 8)) & GENMASK(7, 0)); + if (ret) + return ret; + } + + return 0; +} + +static int mt6363_vemc_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + const u16 tma_unlock_key = MT6363_TMA_UNLOCK_VALUE; + const struct regulator_desc *rdesc = rdev->desc; + struct regmap *regmap = rdev->regmap; + unsigned int range, val; + int i, ret; + u16 mask; + + for (i = 0; i < rdesc->n_linear_ranges; i++) { + const struct linear_range *r = &rdesc->linear_ranges[i]; + unsigned int voltages_in_range = linear_range_values_in_range(r); + + if (sel < voltages_in_range) + break; + sel -= voltages_in_range; + } + + if (i == rdesc->n_linear_ranges) + return -EINVAL; + + ret = regmap_read(rdev->regmap, MT6363_TOP_TRAP, &val); + if (ret) + return ret; + + if (val > 1) + return -EINVAL; + + /* Unlock TMA for writing */ + ret = regmap_bulk_write(rdev->regmap, MT6363_TOP_TMA_KEY_L, + &tma_unlock_key, sizeof(tma_unlock_key)); + if (ret) + return ret; + + /* If HW trapping value is 1, use VEMC_VOSEL_1 instead of VEMC_VOSEL_0 */ + if (val == 1) { + mask = MT6363_RG_VEMC_VOSEL_1_MASK; + sel = FIELD_PREP(MT6363_RG_VEMC_VOSEL_1_MASK, sel); + } else { + mask = rdesc->vsel_mask; + } + + sel <<= ffs(rdesc->vsel_mask) - 1; + sel += rdesc->linear_ranges[i].min_sel; + + range = rdesc->linear_range_selectors_bitfield[i]; + range <<= ffs(rdesc->vsel_range_mask) - 1; + + /* Write to the vreg calibration register for voltage finetuning */ + ret = regmap_update_bits(regmap, rdesc->vsel_range_reg, + rdesc->vsel_range_mask, range); + if (ret) + goto lock_tma; + + /* Function must return the result of this write operation */ + ret = regmap_update_bits(regmap, rdesc->vsel_reg, mask, sel); + +lock_tma: + /* Unconditionally re-lock TMA */ + val = 0; + regmap_bulk_write(rdev->regmap, MT6363_TOP_TMA_KEY_L, &val, 2); + + return ret; +} + +static int mt6363_vemc_get_voltage_sel(struct regulator_dev *rdev) +{ + const struct regulator_desc *rdesc = rdev->desc; + unsigned int vosel, trap, calsel; + int vcal, vsel, range, ret; + + ret = regmap_read(rdev->regmap, rdesc->vsel_reg, &vosel); + if (ret) + return ret; + + ret = regmap_read(rdev->regmap, rdesc->vsel_range_reg, &calsel); + if (ret) + return ret; + + calsel &= rdesc->vsel_range_mask; + for (range = 0; range < rdesc->n_linear_ranges; range++) + if (rdesc->linear_range_selectors_bitfield[range] != calsel) + break; + + if (range == rdesc->n_linear_ranges) + return -EINVAL; + + ret = regmap_read(rdev->regmap, MT6363_TOP_TRAP, &trap); + if (ret) + return ret; + + /* If HW trapping value is 1, use VEMC_VOSEL_1 instead of VEMC_VOSEL_0 */ + if (trap > 1) + return -EINVAL; + else if (trap == 1) + vsel = FIELD_GET(MT6363_RG_VEMC_VOSEL_1_MASK, vosel); + else + vsel = vosel & rdesc->vsel_mask; + + vcal = linear_range_values_in_range_array(rdesc->linear_ranges, range); + + return vsel + vcal; +} + +static int mt6363_va15_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + struct regmap *regmap = rdev->regmap; + int ret; + + ret = mt6363_buck_unlock(regmap, true); + if (ret) + return ret; + + ret = regulator_set_voltage_sel_pickable_regmap(rdev, sel); + if (ret) + goto va15_unlock; + + ret = regmap_update_bits(regmap, MT6363_RG_BUCK_EFUSE_RSV1, + MT6363_RG_BUCK_EFUSE_RSV1_MASK, sel); + if (ret) + goto va15_unlock; + +va15_unlock: + mt6363_buck_unlock(rdev->regmap, false); + return ret; +} + +static void mt6363_oc_irq_enable_work(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct mt6363_regulator_info *info = + container_of(dwork, struct mt6363_regulator_info, oc_work); + + enable_irq(info->virq); +} + +static irqreturn_t mt6363_oc_isr(int irq, void *data) +{ + struct regulator_dev *rdev = (struct regulator_dev *)data; + struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); + + disable_irq_nosync(info->virq); + + if (regulator_is_enabled_regmap(rdev)) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); + + schedule_delayed_work(&info->oc_work, msecs_to_jiffies(OC_IRQ_ENABLE_DELAY_MS)); + + return IRQ_HANDLED; +} + +static int mt6363_set_ocp(struct regulator_dev *rdev, int lim, int severity, bool enable) +{ + struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); + + /* MT6363 supports only enabling protection and does not support limits */ + if (lim || severity != REGULATOR_SEVERITY_PROT || !enable) + return -EOPNOTSUPP; + + /* If there is no OCP interrupt, there's nothing to set */ + if (info->virq <= 0) + return -EOPNOTSUPP; + + return devm_request_threaded_irq(&rdev->dev, info->virq, NULL, + mt6363_oc_isr, IRQF_ONESHOT, + info->desc.name, rdev); +} + +static const struct regulator_ops mt6363_vreg_setclr_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = mt6363_vreg_enable_setclr, + .disable = mt6363_vreg_disable_setclr, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6363_regulator_set_mode, + .get_mode = mt6363_regulator_get_mode, + .set_load = mt6363_regulator_set_load, + .set_over_current_protection = mt6363_set_ocp, +}; + +static const struct regulator_ops mt6363_ldo_linear_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6363_regulator_set_mode, + .get_mode = mt6363_regulator_get_mode, + .set_over_current_protection = mt6363_set_ocp, +}; + +static const struct regulator_ops mt6363_ldo_vtable_ops = { + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = regulator_map_voltage_pickable_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6363_regulator_set_mode, + .get_mode = mt6363_regulator_get_mode, + .set_load = mt6363_regulator_set_load, + .set_over_current_protection = mt6363_set_ocp, +}; + +static const struct regulator_ops mt6363_ldo_vemc_ops = { + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = regulator_map_voltage_pickable_linear_range, + .set_voltage_sel = mt6363_vemc_set_voltage_sel, + .get_voltage_sel = mt6363_vemc_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6363_regulator_set_mode, + .get_mode = mt6363_regulator_get_mode, + .set_load = mt6363_regulator_set_load, + .set_over_current_protection = mt6363_set_ocp, +}; + +static const struct regulator_ops mt6363_ldo_va15_ops = { + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = regulator_map_voltage_pickable_linear_range, + .set_voltage_sel = mt6363_va15_set_voltage_sel, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6363_regulator_set_mode, + .get_mode = mt6363_regulator_get_mode, + .set_load = mt6363_regulator_set_load, + .set_over_current_protection = mt6363_set_ocp, +}; + +/* The array is indexed by id(MT6363_ID_XXX) */ +static struct mt6363_regulator_info mt6363_regulators[] = { + MT6363_BUCK("vbuck1", VBUCK1, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 1), + MT6363_BUCK("vbuck2", VBUCK2, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 2), + MT6363_BUCK("vbuck3", VBUCK3, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 3), + MT6363_BUCK("vbuck4", VBUCK4, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 4), + MT6363_BUCK("vbuck5", VBUCK5, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 5), + MT6363_BUCK("vbuck6", VBUCK6, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 6), + MT6363_BUCK("vbuck7", VBUCK7, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 7), + MT6363_BUCK("vs1", VS1, 0, 2200000, 12500, MT6363_RG_BUCK1_EN_ADDR, + MT6363_RG_BUCK1_LP_ADDR, MT6363_RG_VS1_FCCM_ADDR, 8), + MT6363_BUCK("vs2", VS2, 0, 1600000, 12500, MT6363_RG_BUCK0_EN_ADDR, + MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 0), + MT6363_BUCK("vs3", VS3, 0, 1193750, 6250, MT6363_RG_BUCK1_EN_ADDR, + MT6363_RG_BUCK1_LP_ADDR, MT6363_RG_VS3_FCCM_ADDR, 9), + MT6363_LDO_VT("va12-1", VA12_1, "vs2-ldo2", 3, 37), + MT6363_LDO_VT("va12-2", VA12_2, "vs2-ldo2", 3, 38), + MT6363_LDO_LINEAR_CAL_OPS("va15", VA15, "vs1-ldo1", mt6363_ldo_va15_ops, 3, 39), + MT6363_LDO_VT("vaux18", VAUX18, "vsys-ldo1", 2, 31), + MT6363_LDO_VT("vcn13", VCN13, "vs2-ldo2", 1, 17), + MT6363_LDO_VT("vcn15", VCN15, "vs1-ldo2", 3, 16), + MT6363_LDO_LINEAR_CAL_OPS("vemc", VEMC, "vsys-ldo1", mt6363_ldo_vemc_ops, 0, 32), + MT6363_LDO_VT("vio0p75", VIO075, "vs1-ldo1", 5, 36), + MT6363_LDO_VT("vio18", VIO18, "vs1-ldo2", 3, 35), + MT6363_LDO_VT("vm18", VM18, "vs1-ldo1", 4, 40), + MT6363_LDO_L("vsram-apu", VSRAM_APU, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 30), + MT6363_LDO_L("vsram-cpub", VSRAM_CPUB, "vs2-ldo1", 400000, 1193750, 6250, BUCK1, 27), + MT6363_LDO_L("vsram-cpum", VSRAM_CPUM, "vs2-ldo1", 400000, 1193750, 6250, BUCK1, 28), + MT6363_LDO_L("vsram-cpul", VSRAM_CPUL, "vs2-ldo2", 400000, 1193750, 6250, BUCK1, 29), + MT6363_LDO_L_SC("vsram-digrf", VSRAM_DIGRF, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 23), + MT6363_LDO_L_SC("vsram-mdfe", VSRAM_MDFE, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 24), + MT6363_LDO_L_SC("vsram-modem", VSRAM_MODEM, "vs3-ldo2", 400000, 1193750, 6250, BUCK1, 25), + MT6363_LDO_VT("vrf0p9", VRF09, "vs3-ldo2", 1, 18), + MT6363_LDO_VT("vrf12", VRF12, "vs2-ldo1", 3, 19), + MT6363_LDO_VT("vrf13", VRF13, "vs2-ldo1", 1, 20), + MT6363_LDO_VT("vrf18", VRF18, "vs1-ldo1", 3, 21), + MT6363_LDO_VT("vrf-io18", VRFIO18, "vs1-ldo1", 3, 22), + MT6363_LDO_VT("vtref18", VTREF18, "vsys-ldo1", 2, 26), + MT6363_LDO_VT("vufs12", VUFS12, "vs2-ldo1", 4, 33), + MT6363_LDO_VT("vufs18", VUFS18, "vs1-ldo2", 3, 34), +}; + +static int mt6363_backup_op_setting(struct regmap *map, struct mt6363_regulator_info *info) +{ + unsigned int i, val; + int ret; + + ret = regmap_read(map, info->op_en_reg + OP_CFG_OFFSET, &val); + if (ret) + return ret; + + info->orig_op_cfg = val; + + for (i = 0; i < 3; i++) { + ret = regmap_read(map, info->op_en_reg + i, &val); + if (ret) + return ret; + + info->orig_op_en |= val << (i * 8); + } + + return 0; +} + +static void mt6363_irq_remove(void *data) +{ + int *virq = data; + + irq_dispose_mapping(*virq); +} + +static void mt6363_spmi_remove(void *data) +{ + struct spmi_device *sdev = data; + + spmi_device_remove(sdev); +}; + +static struct regmap *mt6363_spmi_register_regmap(struct device *dev) +{ + struct regmap_config mt6363_regmap_config = { + .reg_bits = 16, + .val_bits = 16, + .max_register = 0x1f90, + .fast_io = true, + }; + struct spmi_device *sdev, *sparent; + u32 base; + int ret; + + if (!dev->parent) + return ERR_PTR(-ENODEV); + + ret = device_property_read_u32(dev, "reg", &base); + if (ret) + return ERR_PTR(ret); + + sparent = to_spmi_device(dev->parent); + if (!sparent) + return ERR_PTR(-ENODEV); + + sdev = spmi_device_alloc(sparent->ctrl); + if (!sdev) + return ERR_PTR(-ENODEV); + + sdev->usid = sparent->usid; + dev_set_name(&sdev->dev, "%d-%02x-regulator", sdev->ctrl->nr, sdev->usid); + ret = device_add(&sdev->dev); + if (ret) { + put_device(&sdev->dev); + return ERR_PTR(ret); + }; + + ret = devm_add_action_or_reset(dev, mt6363_spmi_remove, sdev); + if (ret) + return ERR_PTR(ret); + + mt6363_regmap_config.reg_base = base; + + return devm_regmap_init_spmi_ext(sdev, &mt6363_regmap_config); +} + +static int mt6363_regulator_probe(struct platform_device *pdev) +{ + struct device_node *interrupt_parent; + struct regulator_config config = {}; + struct mt6363_regulator_info *info; + struct device *dev = &pdev->dev; + struct regulator_dev *rdev; + struct irq_domain *domain; + struct irq_fwspec fwspec; + struct spmi_device *sdev; + int i, ret, val; + + config.regmap = mt6363_spmi_register_regmap(dev); + if (IS_ERR(config.regmap)) + return dev_err_probe(dev, PTR_ERR(config.regmap), + "Cannot get regmap\n"); + config.dev = dev; + sdev = to_spmi_device(dev->parent); + + /* + * The first read may fail if the bootloader sets sleep mode: wake up + * this PMIC with W/R on the SPMI bus and ignore the first result. + * This matches the MT6373 driver behavior. + */ + regmap_read(config.regmap, MT6363_TOP_TRAP, &val); + + interrupt_parent = of_irq_find_parent(dev->of_node); + if (!interrupt_parent) + return dev_err_probe(dev, -EINVAL, "Cannot find IRQ parent\n"); + + domain = irq_find_host(interrupt_parent); + of_node_put(interrupt_parent); + fwspec.fwnode = domain->fwnode; + + fwspec.param_count = 3; + fwspec.param[0] = sdev->usid; + fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; + + for (i = 0; i < ARRAY_SIZE(mt6363_regulators); i++) { + info = &mt6363_regulators[i]; + + fwspec.param[1] = info->hwirq; + info->virq = irq_create_fwspec_mapping(&fwspec); + if (!info->virq) + return dev_err_probe(dev, -EINVAL, + "Failed to map IRQ%d\n", info->hwirq); + + ret = devm_add_action_or_reset(dev, mt6363_irq_remove, &info->virq); + if (ret) + return ret; + + config.driver_data = info; + INIT_DELAYED_WORK(&info->oc_work, mt6363_oc_irq_enable_work); + + rdev = devm_regulator_register(dev, &info->desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "failed to register %s\n", info->desc.name); + + if (info->lp_imax_uA) { + ret = mt6363_backup_op_setting(config.regmap, info); + if (ret) { + dev_warn(dev, "Failed to backup op_setting for %s\n", + info->desc.name); + info->lp_imax_uA = 0; + } + } + } + + return 0; +} + +static const struct of_device_id mt6363_regulator_match[] = { + { .compatible = "mediatek,mt6363-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mt6363_regulator_match); + +static struct platform_driver mt6363_regulator_driver = { + .driver = { + .name = "mt6363-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = mt6363_regulator_match, + }, + .probe = mt6363_regulator_probe, +}; +module_platform_driver(mt6363_regulator_driver); + +MODULE_AUTHOR("AngeloGioacchino Del Regno "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6363 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mt6370-regulator.c b/drivers/regulator/mt6370-regulator.c new file mode 100644 index 000000000..6997beb51 --- /dev/null +++ b/drivers/regulator/mt6370-regulator.c @@ -0,0 +1,390 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + MT6370_IDX_DSVBOOST = 0, + MT6370_IDX_DSVPOS, + MT6370_IDX_DSVNEG, + MT6370_IDX_VIBLDO, + MT6370_MAX_IDX +}; + +#define MT6370_REG_LDO_CFG 0x180 +#define MT6370_REG_LDO_VOUT 0x181 +#define MT6370_REG_DB_CTRL1 0x1B0 +#define MT6370_REG_DB_CTRL2 0x1B1 +#define MT6370_REG_DB_VBST 0x1B2 +#define MT6370_REG_DB_VPOS 0x1B3 +#define MT6370_REG_DB_VNEG 0x1B4 +#define MT6370_REG_LDO_STAT 0x1DC +#define MT6370_REG_DB_STAT 0x1DF + +#define MT6370_LDOOMS_MASK BIT(7) +#define MT6370_LDOEN_MASK BIT(7) +#define MT6370_LDOVOUT_MASK GENMASK(3, 0) +#define MT6370_DBPERD_MASK (BIT(7) | BIT(4)) +#define MT6370_DBEXTEN_MASK BIT(0) +#define MT6370_DBVPOSEN_MASK BIT(6) +#define MT6370_DBVPOSDISG_MASK BIT(5) +#define MT6370_DBVNEGEN_MASK BIT(3) +#define MT6370_DBVNEGDISG_MASK BIT(2) +#define MT6370_DBALLON_MASK (MT6370_DBVPOSEN_MASK | MT6370_DBVNEGEN_MASK) +#define MT6370_DBSLEW_MASK GENMASK(7, 6) +#define MT6370_DBVOUT_MASK GENMASK(5, 0) +#define MT6370_LDOOC_EVT_MASK BIT(7) +#define MT6370_POSSCP_EVT_MASK BIT(7) +#define MT6370_NEGSCP_EVT_MASK BIT(6) +#define MT6370_BSTOCP_EVT_MASK BIT(5) +#define MT6370_POSOCP_EVT_MASK BIT(4) +#define MT6370_NEGOCP_EVT_MASK BIT(3) + +#define MT6370_LDO_MINUV 1600000 +#define MT6370_LDO_STPUV 200000 +#define MT6370_LDO_N_VOLT 13 +#define MT6370_DBVBOOST_MINUV 4000000 +#define MT6370_DBVBOOST_STPUV 50000 +#define MT6370_DBVBOOST_N_VOLT 45 +#define MT6370_DBVOUT_MINUV 4000000 +#define MT6370_DBVOUT_STPUV 50000 +#define MT6370_DBVOUT_N_VOLT 41 + +struct mt6370_priv { + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev[MT6370_MAX_IDX]; + bool use_external_ctrl; +}; + +static const unsigned int mt6370_vpos_ramp_tbl[] = { 8540, 5840, 4830, 3000 }; +static const unsigned int mt6370_vneg_ramp_tbl[] = { 10090, 6310, 5050, 3150 }; + +static int mt6370_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int stat_reg, stat, rpt_flags = 0; + int rid = rdev_get_id(rdev), ret; + + if (rid == MT6370_IDX_VIBLDO) + stat_reg = MT6370_REG_LDO_STAT; + else + stat_reg = MT6370_REG_DB_STAT; + + ret = regmap_read(regmap, stat_reg, &stat); + if (ret) + return ret; + + switch (rid) { + case MT6370_IDX_DSVBOOST: + if (stat & MT6370_BSTOCP_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_OVER_CURRENT; + break; + case MT6370_IDX_DSVPOS: + if (stat & MT6370_POSSCP_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (stat & MT6370_POSOCP_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_OVER_CURRENT; + break; + case MT6370_IDX_DSVNEG: + if (stat & MT6370_NEGSCP_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (stat & MT6370_NEGOCP_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_OVER_CURRENT; + break; + default: + if (stat & MT6370_LDOOC_EVT_MASK) + rpt_flags |= REGULATOR_ERROR_OVER_CURRENT; + break; + } + + *flags = rpt_flags; + return 0; +} + +static const struct regulator_ops mt6370_dbvboost_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, + .get_error_flags = mt6370_get_error_flags, +}; + +static const struct regulator_ops mt6370_dbvout_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_error_flags = mt6370_get_error_flags, +}; + +static const struct regulator_ops mt6370_ldo_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = mt6370_get_error_flags, +}; + +static int mt6370_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct mt6370_priv *priv = config->driver_data; + struct gpio_desc *enable_gpio; + int ret; + + enable_gpio = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0, + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE, + desc->name); + if (IS_ERR(enable_gpio)) { + config->ena_gpiod = NULL; + return 0; + } + + /* + * RG control by default + * Only if all are using external pin, change all by external control + */ + if (priv->use_external_ctrl) { + ret = regmap_update_bits(priv->regmap, MT6370_REG_DB_CTRL1, + MT6370_DBEXTEN_MASK, + MT6370_DBEXTEN_MASK); + if (ret) + return ret; + } + + config->ena_gpiod = enable_gpio; + priv->use_external_ctrl = true; + return 0; +} + +static const struct regulator_desc mt6370_regulator_descs[] = { + { + .name = "mt6370-dsv-vbst", + .of_match = of_match_ptr("dsvbst"), + .regulators_node = of_match_ptr("regulators"), + .id = MT6370_IDX_DSVBOOST, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &mt6370_dbvboost_ops, + .min_uV = MT6370_DBVBOOST_MINUV, + .uV_step = MT6370_DBVBOOST_STPUV, + .n_voltages = MT6370_DBVBOOST_N_VOLT, + .vsel_reg = MT6370_REG_DB_VBST, + .vsel_mask = MT6370_DBVOUT_MASK, + .bypass_reg = MT6370_REG_DB_CTRL1, + .bypass_mask = MT6370_DBPERD_MASK, + .bypass_val_on = MT6370_DBPERD_MASK, + }, + { + .name = "mt6370-dsv-vpos", + .of_match = of_match_ptr("dsvpos"), + .regulators_node = of_match_ptr("regulators"), + .id = MT6370_IDX_DSVPOS, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .of_parse_cb = mt6370_of_parse_cb, + .ops = &mt6370_dbvout_ops, + .min_uV = MT6370_DBVOUT_MINUV, + .uV_step = MT6370_DBVOUT_STPUV, + .n_voltages = MT6370_DBVOUT_N_VOLT, + .vsel_reg = MT6370_REG_DB_VPOS, + .vsel_mask = MT6370_DBVOUT_MASK, + .enable_reg = MT6370_REG_DB_CTRL2, + .enable_mask = MT6370_DBVPOSEN_MASK, + .ramp_reg = MT6370_REG_DB_VPOS, + .ramp_mask = MT6370_DBSLEW_MASK, + .ramp_delay_table = mt6370_vpos_ramp_tbl, + .n_ramp_values = ARRAY_SIZE(mt6370_vpos_ramp_tbl), + .active_discharge_reg = MT6370_REG_DB_CTRL2, + .active_discharge_mask = MT6370_DBVPOSDISG_MASK, + .active_discharge_on = MT6370_DBVPOSDISG_MASK, + }, + { + .name = "mt6370-dsv-vneg", + .of_match = of_match_ptr("dsvneg"), + .regulators_node = of_match_ptr("regulators"), + .id = MT6370_IDX_DSVNEG, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .of_parse_cb = mt6370_of_parse_cb, + .ops = &mt6370_dbvout_ops, + .min_uV = MT6370_DBVOUT_MINUV, + .uV_step = MT6370_DBVOUT_STPUV, + .n_voltages = MT6370_DBVOUT_N_VOLT, + .vsel_reg = MT6370_REG_DB_VNEG, + .vsel_mask = MT6370_DBVOUT_MASK, + .enable_reg = MT6370_REG_DB_CTRL2, + .enable_mask = MT6370_DBVNEGEN_MASK, + .ramp_reg = MT6370_REG_DB_VNEG, + .ramp_mask = MT6370_DBSLEW_MASK, + .ramp_delay_table = mt6370_vneg_ramp_tbl, + .n_ramp_values = ARRAY_SIZE(mt6370_vneg_ramp_tbl), + .active_discharge_reg = MT6370_REG_DB_CTRL2, + .active_discharge_mask = MT6370_DBVNEGDISG_MASK, + .active_discharge_on = MT6370_DBVNEGDISG_MASK, + }, + { + .name = "mt6370-vib-ldo", + .of_match = of_match_ptr("vibldo"), + .regulators_node = of_match_ptr("regulators"), + .id = MT6370_IDX_VIBLDO, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &mt6370_ldo_ops, + .min_uV = MT6370_LDO_MINUV, + .uV_step = MT6370_LDO_STPUV, + .n_voltages = MT6370_LDO_N_VOLT, + .vsel_reg = MT6370_REG_LDO_VOUT, + .vsel_mask = MT6370_LDOVOUT_MASK, + .enable_reg = MT6370_REG_LDO_VOUT, + .enable_mask = MT6370_LDOEN_MASK, + .active_discharge_reg = MT6370_REG_LDO_CFG, + .active_discharge_mask = MT6370_LDOOMS_MASK, + .active_discharge_on = MT6370_LDOOMS_MASK, + } +}; + +static irqreturn_t mt6370_scp_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + return IRQ_HANDLED; +} + +static irqreturn_t mt6370_ocp_handler(int irq, void *data) +{ + struct regulator_dev *rdev = data; + + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); + return IRQ_HANDLED; +} + +static int mt6370_regulator_irq_register(struct mt6370_priv *priv) +{ + struct platform_device *pdev = to_platform_device(priv->dev); + static const struct { + const char *name; + int rid; + irq_handler_t handler; + } mt6370_irqs[] = { + { "db_vpos_scp", MT6370_IDX_DSVPOS, mt6370_scp_handler }, + { "db_vneg_scp", MT6370_IDX_DSVNEG, mt6370_scp_handler }, + { "db_vbst_ocp", MT6370_IDX_DSVBOOST, mt6370_ocp_handler }, + { "db_vpos_ocp", MT6370_IDX_DSVPOS, mt6370_ocp_handler }, + { "db_vneg_ocp", MT6370_IDX_DSVNEG, mt6370_ocp_handler }, + { "ldo_oc", MT6370_IDX_VIBLDO, mt6370_ocp_handler } + }; + struct regulator_dev *rdev; + int i, irq, ret; + + for (i = 0; i < ARRAY_SIZE(mt6370_irqs); i++) { + irq = platform_get_irq_byname(pdev, mt6370_irqs[i].name); + + rdev = priv->rdev[mt6370_irqs[i].rid]; + + ret = devm_request_threaded_irq(priv->dev, irq, NULL, + mt6370_irqs[i].handler, 0, + mt6370_irqs[i].name, rdev); + if (ret) { + dev_err(priv->dev, + "Failed to register (%d) interrupt\n", i); + return ret; + } + } + + return 0; +} + +static int mt6370_regulator_register(struct mt6370_priv *priv) +{ + struct regulator_dev *rdev; + struct regulator_config cfg = {}; + struct device *parent = priv->dev->parent; + int i; + + cfg.dev = parent; + cfg.driver_data = priv; + + for (i = 0; i < MT6370_MAX_IDX; i++) { + rdev = devm_regulator_register(priv->dev, + mt6370_regulator_descs + i, + &cfg); + if (IS_ERR(rdev)) { + dev_err(priv->dev, + "Failed to register (%d) regulator\n", i); + return PTR_ERR(rdev); + } + + priv->rdev[i] = rdev; + } + + return 0; +} + +static int mt6370_regulator_probe(struct platform_device *pdev) +{ + struct mt6370_priv *priv; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) { + dev_err(&pdev->dev, "Failed to init regmap\n"); + return -ENODEV; + } + + ret = mt6370_regulator_register(priv); + if (ret) + return ret; + + return mt6370_regulator_irq_register(priv); +} + +static const struct platform_device_id mt6370_devid_table[] = { + { .name = "mt6370-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, mt6370_devid_table); + +static struct platform_driver mt6370_regulator_driver = { + .driver = { + .name = "mt6370-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = mt6370_devid_table, + .probe = mt6370_regulator_probe, +}; +module_platform_driver(mt6370_regulator_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Mediatek MT6370 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mt6380-regulator.c b/drivers/regulator/mt6380-regulator.c new file mode 100644 index 000000000..da901a751 --- /dev/null +++ b/drivers/regulator/mt6380-regulator.c @@ -0,0 +1,342 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2017 MediaTek Inc. +// Author: Chenglin Xu + +#include +#include +#include +#include +#include +#include +#include +#include + +/* PMIC Registers */ +#define MT6380_ALDO_CON_0 0x0000 +#define MT6380_BTLDO_CON_0 0x0004 +#define MT6380_COMP_CON_0 0x0008 +#define MT6380_CPUBUCK_CON_0 0x000C +#define MT6380_CPUBUCK_CON_1 0x0010 +#define MT6380_CPUBUCK_CON_2 0x0014 +#define MT6380_DDRLDO_CON_0 0x0018 +#define MT6380_MLDO_CON_0 0x001C +#define MT6380_PALDO_CON_0 0x0020 +#define MT6380_PHYLDO_CON_0 0x0024 +#define MT6380_SIDO_CON_0 0x0028 +#define MT6380_SIDO_CON_1 0x002C +#define MT6380_SIDO_CON_2 0x0030 +#define MT6380_SLDO_CON_0 0x0034 +#define MT6380_TLDO_CON_0 0x0038 +#define MT6380_STARTUP_CON_0 0x003C +#define MT6380_STARTUP_CON_1 0x0040 +#define MT6380_SMPS_TOP_CON_0 0x0044 +#define MT6380_SMPS_TOP_CON_1 0x0048 +#define MT6380_ANA_CTRL_0 0x0050 +#define MT6380_ANA_CTRL_1 0x0054 +#define MT6380_ANA_CTRL_2 0x0058 +#define MT6380_ANA_CTRL_3 0x005C +#define MT6380_ANA_CTRL_4 0x0060 +#define MT6380_SPK_CON9 0x0064 +#define MT6380_SPK_CON11 0x0068 +#define MT6380_SPK_CON12 0x006A +#define MT6380_CLK_CTRL 0x0070 +#define MT6380_PINMUX_CTRL 0x0074 +#define MT6380_IO_CTRL 0x0078 +#define MT6380_SLP_MODE_CTRL_0 0x007C +#define MT6380_SLP_MODE_CTRL_1 0x0080 +#define MT6380_SLP_MODE_CTRL_2 0x0084 +#define MT6380_SLP_MODE_CTRL_3 0x0088 +#define MT6380_SLP_MODE_CTRL_4 0x008C +#define MT6380_SLP_MODE_CTRL_5 0x0090 +#define MT6380_SLP_MODE_CTRL_6 0x0094 +#define MT6380_SLP_MODE_CTRL_7 0x0098 +#define MT6380_SLP_MODE_CTRL_8 0x009C +#define MT6380_FCAL_CTRL_0 0x00A0 +#define MT6380_FCAL_CTRL_1 0x00A4 +#define MT6380_LDO_CTRL_0 0x00A8 +#define MT6380_LDO_CTRL_1 0x00AC +#define MT6380_LDO_CTRL_2 0x00B0 +#define MT6380_LDO_CTRL_3 0x00B4 +#define MT6380_LDO_CTRL_4 0x00B8 +#define MT6380_DEBUG_CTRL_0 0x00BC +#define MT6380_EFU_CTRL_0 0x0200 +#define MT6380_EFU_CTRL_1 0x0201 +#define MT6380_EFU_CTRL_2 0x0202 +#define MT6380_EFU_CTRL_3 0x0203 +#define MT6380_EFU_CTRL_4 0x0204 +#define MT6380_EFU_CTRL_5 0x0205 +#define MT6380_EFU_CTRL_6 0x0206 +#define MT6380_EFU_CTRL_7 0x0207 +#define MT6380_EFU_CTRL_8 0x0208 + +#define MT6380_REGULATOR_MODE_AUTO 0 +#define MT6380_REGULATOR_MODE_FORCE_PWM 1 + +/* + * mt6380 regulators' information + * + * @desc: standard fields of regulator description + * @vselon_reg: Register sections for hardware control mode of bucks + * @modeset_reg: Register for controlling the buck/LDO control mode + * @modeset_mask: Mask for controlling the buck/LDO control mode + */ +struct mt6380_regulator_info { + struct regulator_desc desc; + u32 vselon_reg; + u32 modeset_reg; + u32 modeset_mask; +}; + +#define MT6380_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ + vosel, vosel_mask, enbit, voselon, _modeset_reg, \ + _modeset_mask) \ +[MT6380_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6380_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6380_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .vselon_reg = voselon, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +#define MT6380_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask, _modeset_reg, _modeset_mask) \ +[MT6380_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6380_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6380_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +#define MT6380_REG_FIXED(match, vreg, enreg, enbit, volt, \ + _modeset_reg, _modeset_mask) \ +[MT6380_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6380_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6380_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + }, \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = _modeset_mask, \ +} + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0xfe, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0xfe, 6250), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 0x3c, 25000), +}; + +static const unsigned int ldo_volt_table1[] = { + 1400000, 1350000, 1300000, 1250000, 1200000, 1150000, 1100000, 1050000, +}; + +static const unsigned int ldo_volt_table2[] = { + 2200000, 3300000, +}; + +static const unsigned int ldo_volt_table3[] = { + 1240000, 1390000, 1540000, 1840000, +}; + +static const unsigned int ldo_volt_table4[] = { + 2200000, 3300000, +}; + +static int mt6380_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + int val = 0; + struct mt6380_regulator_info *info = rdev_get_drvdata(rdev); + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = MT6380_REGULATOR_MODE_AUTO; + break; + case REGULATOR_MODE_FAST: + val = MT6380_REGULATOR_MODE_FORCE_PWM; + break; + default: + return -EINVAL; + } + + val <<= ffs(info->modeset_mask) - 1; + + return regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); +} + +static unsigned int mt6380_regulator_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + unsigned int mode; + int ret; + struct mt6380_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); + if (ret < 0) + return ret; + + val &= info->modeset_mask; + val >>= ffs(info->modeset_mask) - 1; + + switch (val) { + case MT6380_REGULATOR_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case MT6380_REGULATOR_MODE_FORCE_PWM: + mode = REGULATOR_MODE_FAST; + break; + default: + return -EINVAL; + } + + return mode; +} + +static const struct regulator_ops mt6380_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6380_regulator_set_mode, + .get_mode = mt6380_regulator_get_mode, +}; + +static const struct regulator_ops mt6380_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6380_regulator_set_mode, + .get_mode = mt6380_regulator_get_mode, +}; + +static const struct regulator_ops mt6380_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = mt6380_regulator_set_mode, + .get_mode = mt6380_regulator_get_mode, +}; + +/* The array is indexed by id(MT6380_ID_XXX) */ +static struct mt6380_regulator_info mt6380_regulators[] = { + MT6380_BUCK("buck-vcore1", VCPU, 600000, 1393750, 6250, + buck_volt_range1, MT6380_ANA_CTRL_3, MT6380_ANA_CTRL_1, + 0xfe, 3, MT6380_ANA_CTRL_1, + MT6380_CPUBUCK_CON_0, 0x8000000), + MT6380_BUCK("buck-vcore", VCORE, 600000, 1393750, 6250, + buck_volt_range2, MT6380_ANA_CTRL_3, MT6380_ANA_CTRL_2, + 0xfe, 2, MT6380_ANA_CTRL_2, MT6380_SIDO_CON_0, 0x1000000), + MT6380_BUCK("buck-vrf", VRF, 1200000, 1575000, 25000, + buck_volt_range3, MT6380_ANA_CTRL_3, MT6380_SIDO_CON_0, + 0x78, 1, MT6380_SIDO_CON_0, MT6380_SIDO_CON_0, 0x8000), + MT6380_LDO("ldo-vm", VMLDO, ldo_volt_table1, MT6380_LDO_CTRL_0, + 1, MT6380_MLDO_CON_0, 0xE000, MT6380_ANA_CTRL_1, 0x4000000), + MT6380_LDO("ldo-va", VALDO, ldo_volt_table2, MT6380_LDO_CTRL_0, + 2, MT6380_ALDO_CON_0, 0x400, MT6380_ALDO_CON_0, 0x20), + MT6380_REG_FIXED("ldo-vphy", VPHYLDO, MT6380_LDO_CTRL_0, 7, 1800000, + MT6380_PHYLDO_CON_0, 0x80), + MT6380_LDO("ldo-vddr", VDDRLDO, ldo_volt_table3, MT6380_LDO_CTRL_0, + 8, MT6380_DDRLDO_CON_0, 0x3000, MT6380_DDRLDO_CON_0, 0x80), + MT6380_LDO("ldo-vt", VTLDO, ldo_volt_table4, MT6380_LDO_CTRL_0, 3, + MT6380_TLDO_CON_0, 0x400, MT6380_TLDO_CON_0, 0x20), +}; + +static int mt6380_regulator_probe(struct platform_device *pdev) +{ + struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + for (i = 0; i < MT6380_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6380_regulators[i]; + config.regmap = regmap; + rdev = devm_regulator_register(&pdev->dev, + &mt6380_regulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6380_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static const struct platform_device_id mt6380_platform_ids[] = { + { .name = "mt6380-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6380_platform_ids); + +static const struct of_device_id __maybe_unused mt6380_of_match[] = { + { .compatible = "mediatek,mt6380-regulator", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mt6380_of_match); + +static struct platform_driver mt6380_regulator_driver = { + .driver = { + .name = "mt6380-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(mt6380_of_match), + }, + .probe = mt6380_regulator_probe, + .id_table = mt6380_platform_ids, +}; + +module_platform_driver(mt6380_regulator_driver); + +MODULE_AUTHOR("Chenglin Xu "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6380 PMIC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/mt6397-regulator.c b/drivers/regulator/mt6397-regulator.c new file mode 100644 index 000000000..e68df86ca --- /dev/null +++ b/drivers/regulator/mt6397-regulator.c @@ -0,0 +1,420 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2014 MediaTek Inc. +// Author: Flora Fu + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * MT6397 regulators' information + * + * @desc: standard fields of regulator description. + * @qi: Mask for query enable signal status of regulators + * @vselon_reg: Register sections for hardware control mode of bucks + * @vselctrl_reg: Register for controlling the buck control mode. + * @vselctrl_mask: Mask for query buck's voltage control mode. + */ +struct mt6397_regulator_info { + struct regulator_desc desc; + u32 qi; + u32 vselon_reg; + u32 vselctrl_reg; + u32 vselctrl_mask; + u32 modeset_reg; + u32 modeset_mask; +}; + +#define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ + vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \ + _modeset_shift) \ +[MT6397_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6397_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6397_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = (max - min)/step + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + .of_map_mode = mt6397_map_mode, \ + }, \ + .qi = BIT(13), \ + .vselon_reg = voselon, \ + .vselctrl_reg = vosel_ctrl, \ + .vselctrl_mask = BIT(1), \ + .modeset_reg = _modeset_reg, \ + .modeset_mask = BIT(_modeset_shift), \ +} + +#define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ + vosel_mask) \ +[MT6397_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6397_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6397_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + }, \ + .qi = BIT(15), \ +} + +#define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \ +[MT6397_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .ops = &mt6397_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6397_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = enreg, \ + .enable_mask = BIT(enbit), \ + .min_uV = volt, \ + }, \ + .qi = BIT(15), \ +} + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000), +}; + +static const unsigned int ldo_volt_table1[] = { + 1500000, 1800000, 2500000, 2800000, +}; + +static const unsigned int ldo_volt_table2[] = { + 1800000, 3300000, +}; + +static const unsigned int ldo_volt_table3[] = { + 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table4[] = { + 1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table5[] = { + 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table5_v2[] = { + 1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, +}; + +static const unsigned int ldo_volt_table6[] = { + 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000, +}; + +static const unsigned int ldo_volt_table7[] = { + 1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000, +}; + +static unsigned int mt6397_map_mode(unsigned int mode) +{ + switch (mode) { + case MT6397_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case MT6397_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int mt6397_regulator_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); + int ret, val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = MT6397_BUCK_MODE_FORCE_PWM; + break; + case REGULATOR_MODE_NORMAL: + val = MT6397_BUCK_MODE_AUTO; + break; + default: + ret = -EINVAL; + goto err_mode; + } + + dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x\n", + info->modeset_reg, info->modeset_mask, val); + + val <<= ffs(info->modeset_mask) - 1; + + ret = regmap_update_bits(rdev->regmap, info->modeset_reg, + info->modeset_mask, val); +err_mode: + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to set mt6397 buck mode: %d\n", ret); + return ret; + } + + return 0; +} + +static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev) +{ + struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); + int ret, regval; + + ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6397 buck mode: %d\n", ret); + return ret; + } + + regval &= info->modeset_mask; + regval >>= ffs(info->modeset_mask) - 1; + + switch (regval) { + case MT6397_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case MT6397_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + default: + return -EINVAL; + } +} + +static int mt6397_get_status(struct regulator_dev *rdev) +{ + int ret; + u32 regval; + struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); + return ret; + } + + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops mt6397_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6397_get_status, + .set_mode = mt6397_regulator_set_mode, + .get_mode = mt6397_regulator_get_mode, +}; + +static const struct regulator_ops mt6397_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6397_get_status, +}; + +static const struct regulator_ops mt6397_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = mt6397_get_status, +}; + +/* The array is indexed by id(MT6397_ID_XXX) */ +static struct mt6397_regulator_info mt6397_regulators[] = { + MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250, + buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f, + MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11), + MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250, + buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f, + MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8), + MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250, + buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9, + 0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5, + MT6397_VSRMCA15_CON2, 8), + MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250, + buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9, + 0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5, + MT6397_VSRMCA7_CON2, 8), + MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250, + buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f, + MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8), + MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1, + MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f, + MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8), + MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2, + MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f, + MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8), + MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000, + buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f, + MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8), + MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000), + MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000), + MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1, + MT6397_ANALDO_CON2, 15, MT6397_ANALDO_CON6, 0xC0), + MT6397_REG_FIXED("ldo_vio28", VIO28, MT6397_DIGLDO_CON0, 14, 2800000), + MT6397_REG_FIXED("ldo_vusb", VUSB, MT6397_DIGLDO_CON1, 14, 3300000), + MT6397_LDO("ldo_vmc", VMC, ldo_volt_table2, + MT6397_DIGLDO_CON2, 12, MT6397_DIGLDO_CON29, 0x10), + MT6397_LDO("ldo_vmch", VMCH, ldo_volt_table3, + MT6397_DIGLDO_CON3, 14, MT6397_DIGLDO_CON17, 0x80), + MT6397_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table3, + MT6397_DIGLDO_CON4, 14, MT6397_DIGLDO_CON18, 0x10), + MT6397_LDO("ldo_vgp1", VGP1, ldo_volt_table4, + MT6397_DIGLDO_CON5, 15, MT6397_DIGLDO_CON19, 0xE0), + MT6397_LDO("ldo_vgp2", VGP2, ldo_volt_table5, + MT6397_DIGLDO_CON6, 15, MT6397_DIGLDO_CON20, 0xE0), + MT6397_LDO("ldo_vgp3", VGP3, ldo_volt_table5, + MT6397_DIGLDO_CON7, 15, MT6397_DIGLDO_CON21, 0xE0), + MT6397_LDO("ldo_vgp4", VGP4, ldo_volt_table5, + MT6397_DIGLDO_CON8, 15, MT6397_DIGLDO_CON22, 0xE0), + MT6397_LDO("ldo_vgp5", VGP5, ldo_volt_table6, + MT6397_DIGLDO_CON9, 15, MT6397_DIGLDO_CON23, 0xE0), + MT6397_LDO("ldo_vgp6", VGP6, ldo_volt_table5, + MT6397_DIGLDO_CON10, 15, MT6397_DIGLDO_CON33, 0xE0), + MT6397_LDO("ldo_vibr", VIBR, ldo_volt_table7, + MT6397_DIGLDO_CON24, 15, MT6397_DIGLDO_CON25, 0xE00), +}; + +static int mt6397_set_buck_vosel_reg(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + int i; + u32 regval; + + for (i = 0; i < MT6397_MAX_REGULATOR; i++) { + if (mt6397_regulators[i].vselctrl_reg) { + if (regmap_read(mt6397->regmap, + mt6397_regulators[i].vselctrl_reg, + ®val) < 0) { + dev_err(&pdev->dev, + "Failed to read buck ctrl\n"); + return -EIO; + } + + if (regval & mt6397_regulators[i].vselctrl_mask) { + mt6397_regulators[i].desc.vsel_reg = + mt6397_regulators[i].vselon_reg; + } + } + } + + return 0; +} + +static int mt6397_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + u32 reg_value, version; + + /* Query buck controller to select activated voltage register part */ + if (mt6397_set_buck_vosel_reg(pdev)) + return -EIO; + + /* Read PMIC chip revision to update constraints and voltage table */ + if (regmap_read(mt6397->regmap, MT6397_CID, ®_value) < 0) { + dev_err(&pdev->dev, "Failed to read Chip ID\n"); + return -EIO; + } + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); + + version = (reg_value & 0xFF); + switch (version) { + case MT6397_REGULATOR_ID91: + mt6397_regulators[MT6397_ID_VGP2].desc.volt_table = + ldo_volt_table5_v2; + break; + default: + break; + } + + for (i = 0; i < MT6397_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6397_regulators[i]; + config.regmap = mt6397->regmap; + rdev = devm_regulator_register(&pdev->dev, + &mt6397_regulators[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6397_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6397_platform_ids[] = { + { .name = "mt6397-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, mt6397_platform_ids); + +static const struct of_device_id mt6397_of_match[] __maybe_unused = { + { .compatible = "mediatek,mt6397-regulator", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mt6397_of_match); + +static struct platform_driver mt6397_regulator_driver = { + .driver = { + .name = "mt6397-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(mt6397_of_match), + }, + .probe = mt6397_regulator_probe, + .id_table = mt6397_platform_ids, +}; + +module_platform_driver(mt6397_regulator_driver); + +MODULE_AUTHOR("Flora Fu "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/mtk-dvfsrc-regulator.c b/drivers/regulator/mtk-dvfsrc-regulator.c new file mode 100644 index 000000000..c0c9a6751 --- /dev/null +++ b/drivers/regulator/mtk-dvfsrc-regulator.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * Copyright (c) 2024 Collabora Ltd. + * AngeloGioacchino Del Regno + */ + +#include +#include +#include +#include +#include +#include + +enum dvfsrc_regulator_id { + DVFSRC_ID_VCORE, + DVFSRC_ID_VSCP, + DVFSRC_ID_MAX +}; + +struct dvfsrc_regulator_pdata { + const struct regulator_desc *descs; + u32 size; +}; + +#define MTK_DVFSRC_VREG(match, _name, _volt_table) \ +{ \ + .name = match, \ + .of_match = match, \ + .ops = &dvfsrc_vcore_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = DVFSRC_ID_##_name, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(_volt_table), \ + .volt_table = _volt_table, \ +} + +static inline struct device *to_dvfs_regulator_dev(struct regulator_dev *rdev) +{ + return rdev_get_dev(rdev)->parent; +} + +static inline struct device *to_dvfsrc_dev(struct regulator_dev *rdev) +{ + return to_dvfs_regulator_dev(rdev)->parent; +} + +static int dvfsrc_get_cmd(int rdev_id, enum mtk_dvfsrc_cmd *cmd) +{ + switch (rdev_id) { + case DVFSRC_ID_VCORE: + *cmd = MTK_DVFSRC_CMD_VCORE_LEVEL; + break; + case DVFSRC_ID_VSCP: + *cmd = MTK_DVFSRC_CMD_VSCP_LEVEL; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int dvfsrc_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct device *dvfsrc_dev = to_dvfsrc_dev(rdev); + enum mtk_dvfsrc_cmd req_cmd; + int id = rdev_get_id(rdev); + int ret; + + ret = dvfsrc_get_cmd(id, &req_cmd); + if (ret) + return ret; + + return mtk_dvfsrc_send_request(dvfsrc_dev, req_cmd, selector); +} + +static int dvfsrc_get_voltage_sel(struct regulator_dev *rdev) +{ + struct device *dvfsrc_dev = to_dvfsrc_dev(rdev); + enum mtk_dvfsrc_cmd query_cmd; + int id = rdev_get_id(rdev); + int val, ret; + + ret = dvfsrc_get_cmd(id, &query_cmd); + if (ret) + return ret; + + ret = mtk_dvfsrc_query_info(dvfsrc_dev, query_cmd, &val); + if (ret) + return ret; + + return val; +} + +static const struct regulator_ops dvfsrc_vcore_ops = { + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = dvfsrc_get_voltage_sel, + .set_voltage_sel = dvfsrc_set_voltage_sel, +}; + +static const unsigned int mt6873_voltages[] = { + 575000, + 600000, + 650000, + 725000, +}; + +static const struct regulator_desc mt6873_regulators[] = { + MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt6873_voltages), + MTK_DVFSRC_VREG("dvfsrc-vscp", VSCP, mt6873_voltages), +}; + +static const struct dvfsrc_regulator_pdata mt6873_data = { + .descs = mt6873_regulators, + .size = ARRAY_SIZE(mt6873_regulators), +}; + +static const unsigned int mt6893_voltages[] = { + 575000, + 600000, + 650000, + 725000, + 750000, +}; + +static const struct regulator_desc mt6893_regulators[] = { + MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt6893_voltages), + MTK_DVFSRC_VREG("dvfsrc-vscp", VSCP, mt6893_voltages), +}; + +static const struct dvfsrc_regulator_pdata mt6893_data = { + .descs = mt6893_regulators, + .size = ARRAY_SIZE(mt6893_regulators), +}; + +static const unsigned int mt8183_voltages[] = { + 725000, + 800000, +}; + +static const struct regulator_desc mt8183_regulators[] = { + MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt8183_voltages), +}; + +static const struct dvfsrc_regulator_pdata mt8183_data = { + .descs = mt8183_regulators, + .size = ARRAY_SIZE(mt8183_regulators), +}; + +static const unsigned int mt8195_voltages[] = { + 550000, + 600000, + 650000, + 750000, +}; + +static const struct regulator_desc mt8195_regulators[] = { + MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt8195_voltages), + MTK_DVFSRC_VREG("dvfsrc-vscp", VSCP, mt8195_voltages), +}; + +static const struct dvfsrc_regulator_pdata mt8195_data = { + .descs = mt8195_regulators, + .size = ARRAY_SIZE(mt8195_regulators), +}; + +static const unsigned int mt8196_voltages[] = { + 575000, + 600000, + 650000, + 725000, + 825000, + 875000, +}; + +static const struct regulator_desc mt8196_regulators[] = { + MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt8196_voltages), +}; + +static const struct dvfsrc_regulator_pdata mt8196_data = { + .descs = mt8196_regulators, + .size = ARRAY_SIZE(mt8196_regulators), +}; + +static int dvfsrc_vcore_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = { .dev = &pdev->dev }; + const struct dvfsrc_regulator_pdata *pdata; + int i; + + pdata = device_get_match_data(&pdev->dev); + if (!pdata) + return -EINVAL; + + for (i = 0; i < pdata->size; i++) { + const struct regulator_desc *vrdesc = &pdata->descs[i]; + struct regulator_dev *rdev; + + rdev = devm_regulator_register(&pdev->dev, vrdesc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "failed to register %s\n", vrdesc->name); + } + + return 0; +} + +static const struct of_device_id mtk_dvfsrc_regulator_match[] = { + { .compatible = "mediatek,mt6873-dvfsrc-regulator", .data = &mt6873_data }, + { .compatible = "mediatek,mt6893-dvfsrc-regulator", .data = &mt6893_data }, + { .compatible = "mediatek,mt8183-dvfsrc-regulator", .data = &mt8183_data }, + { .compatible = "mediatek,mt8192-dvfsrc-regulator", .data = &mt6873_data }, + { .compatible = "mediatek,mt8195-dvfsrc-regulator", .data = &mt8195_data }, + { .compatible = "mediatek,mt8196-dvfsrc-regulator", .data = &mt8196_data }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mtk_dvfsrc_regulator_match); + +static struct platform_driver mtk_dvfsrc_regulator_driver = { + .driver = { + .name = "mtk-dvfsrc-regulator", + .of_match_table = mtk_dvfsrc_regulator_match, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = dvfsrc_vcore_regulator_probe, +}; +module_platform_driver(mtk_dvfsrc_regulator_driver); + +MODULE_AUTHOR("AngeloGioacchino Del Regno "); +MODULE_AUTHOR("Arvin wang "); +MODULE_DESCRIPTION("MediaTek DVFS Resource Collector Regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c new file mode 100644 index 000000000..c0cc6cc0a --- /dev/null +++ b/drivers/regulator/of_regulator.c @@ -0,0 +1,987 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * OF helpers for regulator framework + * + * Copyright (C) 2011 Texas Instruments, Inc. + * Rajendra Nayak + */ + +#include +#include +#include +#include +#include +#include + +#include "internal.h" + +static const char *const regulator_states[PM_SUSPEND_MAX + 1] = { + [PM_SUSPEND_STANDBY] = "regulator-state-standby", + [PM_SUSPEND_MEM] = "regulator-state-mem", + [PM_SUSPEND_MAX] = "regulator-state-disk", +}; + +static void fill_limit(int *limit, int val) +{ + if (val) + if (val == 1) + *limit = REGULATOR_NOTIF_LIMIT_ENABLE; + else + *limit = val; + else + *limit = REGULATOR_NOTIF_LIMIT_DISABLE; +} + +static void of_get_regulator_prot_limits(struct device_node *np, + struct regulation_constraints *constraints) +{ + u32 pval; + int i; + static const char *const props[] = { + "regulator-oc-%s-microamp", + "regulator-ov-%s-microvolt", + "regulator-temp-%s-kelvin", + "regulator-uv-%s-microvolt", + }; + struct notification_limit *limits[] = { + &constraints->over_curr_limits, + &constraints->over_voltage_limits, + &constraints->temp_limits, + &constraints->under_voltage_limits, + }; + bool set[4] = {0}; + + /* Protection limits: */ + for (i = 0; i < ARRAY_SIZE(props); i++) { + char prop[255]; + bool found; + int j; + static const char *const lvl[] = { + "protection", "error", "warn" + }; + int *l[] = { + &limits[i]->prot, &limits[i]->err, &limits[i]->warn, + }; + + for (j = 0; j < ARRAY_SIZE(lvl); j++) { + snprintf(prop, 255, props[i], lvl[j]); + found = !of_property_read_u32(np, prop, &pval); + if (found) + fill_limit(l[j], pval); + set[i] |= found; + } + } + constraints->over_current_detection = set[0]; + constraints->over_voltage_detection = set[1]; + constraints->over_temp_detection = set[2]; + constraints->under_voltage_detection = set[3]; +} + +static int of_get_regulation_constraints(struct device *dev, + struct device_node *np, + struct regulator_init_data *init_data, + const struct regulator_desc *desc) +{ + struct regulation_constraints *constraints = &init_data->constraints; + struct regulator_state *suspend_state; + struct device_node *suspend_np; + unsigned int mode; + int ret, i, len; + int n_phandles; + u32 pval; + + n_phandles = of_count_phandle_with_args(np, "regulator-coupled-with", + NULL); + n_phandles = max(n_phandles, 0); + + constraints->name = of_get_property(np, "regulator-name", NULL); + + if (!of_property_read_u32(np, "regulator-min-microvolt", &pval)) + constraints->min_uV = pval; + + if (!of_property_read_u32(np, "regulator-max-microvolt", &pval)) + constraints->max_uV = pval; + + /* Voltage change possible? */ + if (constraints->min_uV != constraints->max_uV) + constraints->valid_ops_mask |= REGULATOR_CHANGE_VOLTAGE; + + /* Do we have a voltage range, if so try to apply it? */ + if (constraints->min_uV && constraints->max_uV) + constraints->apply_uV = true; + + if (!of_property_read_u32(np, "regulator-microvolt-offset", &pval)) + constraints->uV_offset = pval; + if (!of_property_read_u32(np, "regulator-min-microamp", &pval)) + constraints->min_uA = pval; + if (!of_property_read_u32(np, "regulator-max-microamp", &pval)) + constraints->max_uA = pval; + + if (!of_property_read_u32(np, "regulator-input-current-limit-microamp", + &pval)) + constraints->ilim_uA = pval; + + /* Current change possible? */ + if (constraints->min_uA != constraints->max_uA) + constraints->valid_ops_mask |= REGULATOR_CHANGE_CURRENT; + + if (!of_property_read_u32(np, "regulator-power-budget-milliwatt", &pval)) + constraints->pw_budget_mW = pval; + + constraints->boot_on = of_property_read_bool(np, "regulator-boot-on"); + constraints->always_on = of_property_read_bool(np, "regulator-always-on"); + if (!constraints->always_on) /* status change should be possible. */ + constraints->valid_ops_mask |= REGULATOR_CHANGE_STATUS; + + constraints->pull_down = of_property_read_bool(np, "regulator-pull-down"); + constraints->system_critical = of_property_read_bool(np, + "system-critical-regulator"); + + if (of_property_read_bool(np, "regulator-allow-bypass")) + constraints->valid_ops_mask |= REGULATOR_CHANGE_BYPASS; + + if (of_property_read_bool(np, "regulator-allow-set-load")) + constraints->valid_ops_mask |= REGULATOR_CHANGE_DRMS; + + ret = of_property_read_u32(np, "regulator-ramp-delay", &pval); + if (!ret) { + if (pval) + constraints->ramp_delay = pval; + else + constraints->ramp_disable = true; + } + + ret = of_property_read_u32(np, "regulator-settling-time-us", &pval); + if (!ret) + constraints->settling_time = pval; + + ret = of_property_read_u32(np, "regulator-settling-time-up-us", &pval); + if (!ret) + constraints->settling_time_up = pval; + if (constraints->settling_time_up && constraints->settling_time) { + pr_warn("%pOFn: ambiguous configuration for settling time, ignoring 'regulator-settling-time-up-us'\n", + np); + constraints->settling_time_up = 0; + } + + ret = of_property_read_u32(np, "regulator-settling-time-down-us", + &pval); + if (!ret) + constraints->settling_time_down = pval; + if (constraints->settling_time_down && constraints->settling_time) { + pr_warn("%pOFn: ambiguous configuration for settling time, ignoring 'regulator-settling-time-down-us'\n", + np); + constraints->settling_time_down = 0; + } + + ret = of_property_read_u32(np, "regulator-enable-ramp-delay", &pval); + if (!ret) + constraints->enable_time = pval; + + ret = of_property_read_u32(np, "regulator-uv-less-critical-window-ms", &pval); + if (!ret) + constraints->uv_less_critical_window_ms = pval; + else + constraints->uv_less_critical_window_ms = + REGULATOR_DEF_UV_LESS_CRITICAL_WINDOW_MS; + + constraints->soft_start = of_property_read_bool(np, + "regulator-soft-start"); + ret = of_property_read_u32(np, "regulator-active-discharge", &pval); + if (!ret) { + constraints->active_discharge = + (pval) ? REGULATOR_ACTIVE_DISCHARGE_ENABLE : + REGULATOR_ACTIVE_DISCHARGE_DISABLE; + } + + if (!of_property_read_u32(np, "regulator-initial-mode", &pval)) { + if (desc && desc->of_map_mode) { + mode = desc->of_map_mode(pval); + if (mode == REGULATOR_MODE_INVALID) + pr_err("%pOFn: invalid mode %u\n", np, pval); + else + constraints->initial_mode = mode; + } else { + pr_warn("%pOFn: mapping for mode %d not defined\n", + np, pval); + } + } + + len = of_property_count_elems_of_size(np, "regulator-allowed-modes", + sizeof(u32)); + if (len > 0) { + if (desc && desc->of_map_mode) { + for (i = 0; i < len; i++) { + ret = of_property_read_u32_index(np, + "regulator-allowed-modes", i, &pval); + if (ret) { + pr_err("%pOFn: couldn't read allowed modes index %d, ret=%d\n", + np, i, ret); + break; + } + mode = desc->of_map_mode(pval); + if (mode == REGULATOR_MODE_INVALID) + pr_err("%pOFn: invalid regulator-allowed-modes element %u\n", + np, pval); + else + constraints->valid_modes_mask |= mode; + } + if (constraints->valid_modes_mask) + constraints->valid_ops_mask + |= REGULATOR_CHANGE_MODE; + } else { + pr_warn("%pOFn: mode mapping not defined\n", np); + } + } + + if (!of_property_read_u32(np, "regulator-system-load", &pval)) + constraints->system_load = pval; + + if (n_phandles) { + constraints->max_spread = devm_kzalloc(dev, + sizeof(*constraints->max_spread) * n_phandles, + GFP_KERNEL); + + if (!constraints->max_spread) + return -ENOMEM; + + of_property_read_u32_array(np, "regulator-coupled-max-spread", + constraints->max_spread, n_phandles); + } + + if (!of_property_read_u32(np, "regulator-max-step-microvolt", + &pval)) + constraints->max_uV_step = pval; + + constraints->over_current_protection = of_property_read_bool(np, + "regulator-over-current-protection"); + + of_get_regulator_prot_limits(np, constraints); + + for (i = 0; i < ARRAY_SIZE(regulator_states); i++) { + switch (i) { + case PM_SUSPEND_MEM: + suspend_state = &constraints->state_mem; + break; + case PM_SUSPEND_MAX: + suspend_state = &constraints->state_disk; + break; + case PM_SUSPEND_STANDBY: + suspend_state = &constraints->state_standby; + break; + case PM_SUSPEND_ON: + case PM_SUSPEND_TO_IDLE: + default: + continue; + } + + suspend_np = of_get_child_by_name(np, regulator_states[i]); + if (!suspend_np) + continue; + if (!suspend_state) { + of_node_put(suspend_np); + continue; + } + + if (!of_property_read_u32(suspend_np, "regulator-mode", + &pval)) { + if (desc && desc->of_map_mode) { + mode = desc->of_map_mode(pval); + if (mode == REGULATOR_MODE_INVALID) + pr_err("%pOFn: invalid mode %u\n", + np, pval); + else + suspend_state->mode = mode; + } else { + pr_warn("%pOFn: mapping for mode %d not defined\n", + np, pval); + } + } + + if (of_property_read_bool(suspend_np, + "regulator-on-in-suspend")) + suspend_state->enabled = ENABLE_IN_SUSPEND; + else if (of_property_read_bool(suspend_np, + "regulator-off-in-suspend")) + suspend_state->enabled = DISABLE_IN_SUSPEND; + + if (!of_property_read_u32(suspend_np, + "regulator-suspend-min-microvolt", &pval)) + suspend_state->min_uV = pval; + + if (!of_property_read_u32(suspend_np, + "regulator-suspend-max-microvolt", &pval)) + suspend_state->max_uV = pval; + + if (!of_property_read_u32(suspend_np, + "regulator-suspend-microvolt", &pval)) + suspend_state->uV = pval; + else /* otherwise use min_uV as default suspend voltage */ + suspend_state->uV = suspend_state->min_uV; + + if (of_property_read_bool(suspend_np, + "regulator-changeable-in-suspend")) + suspend_state->changeable = true; + + if (i == PM_SUSPEND_MEM) + constraints->initial_state = PM_SUSPEND_MEM; + + of_node_put(suspend_np); + suspend_state = NULL; + suspend_np = NULL; + } + + return 0; +} + +/** + * of_get_regulator_init_data - extract regulator_init_data structure info + * @dev: device requesting for regulator_init_data + * @node: regulator device node + * @desc: regulator description + * + * Populates regulator_init_data structure by extracting data from device + * tree node. + * + * Return: Pointer to a populated &struct regulator_init_data or NULL if + * memory allocation fails. + */ +struct regulator_init_data *of_get_regulator_init_data(struct device *dev, + struct device_node *node, + const struct regulator_desc *desc) +{ + struct regulator_init_data *init_data; + + if (!node) + return NULL; + + init_data = devm_kzalloc(dev, sizeof(*init_data), GFP_KERNEL); + if (!init_data) + return NULL; /* Out of memory? */ + + if (of_get_regulation_constraints(dev, node, init_data, desc)) + return NULL; + + return init_data; +} +EXPORT_SYMBOL_GPL(of_get_regulator_init_data); + +struct devm_of_regulator_matches { + struct of_regulator_match *matches; + unsigned int num_matches; +}; + +static void devm_of_regulator_put_matches(struct device *dev, void *res) +{ + struct devm_of_regulator_matches *devm_matches = res; + int i; + + for (i = 0; i < devm_matches->num_matches; i++) + of_node_put(devm_matches->matches[i].of_node); +} + +/** + * of_regulator_match - extract multiple regulator init data from device tree. + * @dev: device requesting the data + * @node: parent device node of the regulators + * @matches: match table for the regulators + * @num_matches: number of entries in match table + * + * This function uses a match table specified by the regulator driver to + * parse regulator init data from the device tree. @node is expected to + * contain a set of child nodes, each providing the init data for one + * regulator. The data parsed from a child node will be matched to a regulator + * based on either the deprecated property regulator-compatible if present, + * or otherwise the child node's name. Note that the match table is modified + * in place and an additional of_node reference is taken for each matched + * regulator. + * + * Return: The number of matches found or a negative error number on failure. + */ +int of_regulator_match(struct device *dev, struct device_node *node, + struct of_regulator_match *matches, + unsigned int num_matches) +{ + unsigned int count = 0; + unsigned int i; + const char *name; + struct device_node *child; + struct devm_of_regulator_matches *devm_matches; + + if (!dev || !node) + return -EINVAL; + + devm_matches = devres_alloc(devm_of_regulator_put_matches, + sizeof(struct devm_of_regulator_matches), + GFP_KERNEL); + if (!devm_matches) + return -ENOMEM; + + devm_matches->matches = matches; + devm_matches->num_matches = num_matches; + + devres_add(dev, devm_matches); + + for (i = 0; i < num_matches; i++) { + struct of_regulator_match *match = &matches[i]; + match->init_data = NULL; + match->of_node = NULL; + } + + for_each_child_of_node(node, child) { + name = of_get_property(child, + "regulator-compatible", NULL); + if (!name) + name = child->name; + for (i = 0; i < num_matches; i++) { + struct of_regulator_match *match = &matches[i]; + if (match->of_node) + continue; + + if (strcmp(match->name, name)) + continue; + + match->init_data = + of_get_regulator_init_data(dev, child, + match->desc); + if (!match->init_data) { + dev_err(dev, + "failed to parse DT for regulator %pOFn\n", + child); + of_node_put(child); + goto err_put; + } + match->of_node = of_node_get(child); + count++; + break; + } + } + + return count; + +err_put: + for (i = 0; i < num_matches; i++) { + struct of_regulator_match *match = &matches[i]; + + match->init_data = NULL; + if (match->of_node) { + of_node_put(match->of_node); + match->of_node = NULL; + } + } + return -EINVAL; +} +EXPORT_SYMBOL_GPL(of_regulator_match); + +static struct +device_node *regulator_of_get_init_node(struct device *dev, + const struct regulator_desc *desc) +{ + struct device_node *search, *child; + const char *name; + + if (!dev->of_node || !desc->of_match) + return NULL; + + if (desc->regulators_node) { + search = of_get_child_by_name(dev->of_node, + desc->regulators_node); + } else { + search = of_node_get(dev->of_node); + + if (!strcmp(desc->of_match, search->name)) + return search; + } + + if (!search) { + dev_dbg(dev, "Failed to find regulator container node '%s'\n", + desc->regulators_node); + return NULL; + } + + for_each_available_child_of_node(search, child) { + name = of_get_property(child, "regulator-compatible", NULL); + if (!name) { + if (!desc->of_match_full_name) + name = child->name; + else + name = child->full_name; + } + + if (!strcmp(desc->of_match, name)) { + of_node_put(search); + /* + * 'of_node_get(child)' is already performed by the + * for_each loop. + */ + return child; + } + } + + of_node_put(search); + + return NULL; +} + +struct regulator_init_data *regulator_of_get_init_data(struct device *dev, + const struct regulator_desc *desc, + struct regulator_config *config, + struct device_node **node) +{ + struct device_node *child; + struct regulator_init_data *init_data = NULL; + + child = regulator_of_get_init_node(config->dev, desc); + if (!child) + return NULL; + + init_data = of_get_regulator_init_data(dev, child, desc); + if (!init_data) { + dev_err(dev, "failed to parse DT for regulator %pOFn\n", child); + goto error; + } + + if (desc->of_parse_cb) { + int ret; + + ret = desc->of_parse_cb(child, desc, config); + if (ret) { + if (ret == -EPROBE_DEFER) { + of_node_put(child); + return ERR_PTR(-EPROBE_DEFER); + } + dev_err(dev, + "driver callback failed to parse DT for regulator %pOFn\n", + child); + goto error; + } + } + + *node = child; + + return init_data; + +error: + of_node_put(child); + + return NULL; +} + +/** + * of_get_child_regulator - get a child regulator device node + * based on supply name + * @parent: Parent device node + * @prop_name: Combination regulator supply name and "-supply" + * + * Traverse all child nodes. + * Extract the child regulator device node corresponding to the supply name. + * + * Return: Pointer to the &struct device_node corresponding to the regulator + * if found, or %NULL if not found. + */ +static struct device_node *of_get_child_regulator(struct device_node *parent, + const char *prop_name) +{ + struct device_node *regnode = NULL; + struct device_node *child = NULL; + + for_each_child_of_node(parent, child) { + regnode = of_parse_phandle(child, prop_name, 0); + if (regnode) + goto err_node_put; + + regnode = of_get_child_regulator(child, prop_name); + if (regnode) + goto err_node_put; + } + return NULL; + +err_node_put: + of_node_put(child); + return regnode; +} + +/** + * of_get_regulator - get a regulator device node based on supply name + * @dev: Device pointer for dev_printk() messages + * @node: Device node pointer for supply property lookup + * @supply: regulator supply name + * + * Extract the regulator device node corresponding to the supply name. + * + * Return: Pointer to the &struct device_node corresponding to the regulator + * if found, or %NULL if not found. + */ +static struct device_node *of_get_regulator(struct device *dev, struct device_node *node, + const char *supply) +{ + struct device_node *regnode = NULL; + char prop_name[64]; /* 64 is max size of property name */ + + dev_dbg(dev, "Looking up %s-supply from device node %pOF\n", supply, node); + + snprintf(prop_name, 64, "%s-supply", supply); + regnode = of_parse_phandle(node, prop_name, 0); + if (regnode) + return regnode; + + regnode = of_get_child_regulator(dev->of_node, prop_name); + if (regnode) + return regnode; + + dev_dbg(dev, "Looking up %s property in node %pOF failed\n", prop_name, dev->of_node); + return NULL; +} + +static struct regulator_dev *of_find_regulator_by_node(struct device_node *np) +{ + struct device *dev; + + dev = class_find_device_by_of_node(®ulator_class, np); + + return dev ? dev_to_rdev(dev) : NULL; +} + +/** + * of_regulator_dev_lookup - lookup a regulator device with device tree only + * @dev: Device pointer for regulator supply lookup. + * @np: Device node pointer for regulator supply lookup. + * @supply: Supply name or regulator ID. + * + * Return: Pointer to the &struct regulator_dev on success, or ERR_PTR() + * encoded value on error. + * + * If successful, returns a pointer to the &struct regulator_dev that + * corresponds to the name @supply and with the embedded &struct device + * refcount incremented by one. The refcount must be dropped by calling + * put_device(). + * + * On failure one of the following ERR_PTR() encoded values is returned: + * * -%ENODEV if lookup fails permanently. + * * -%EPROBE_DEFER if lookup could succeed in the future. + */ +struct regulator_dev *of_regulator_dev_lookup(struct device *dev, struct device_node *np, + const char *supply) +{ + struct regulator_dev *r; + struct device_node *node; + + node = of_get_regulator(dev, np, supply); + if (node) { + r = of_find_regulator_by_node(node); + of_node_put(node); + if (r) + return r; + + /* + * We have a node, but there is no device. + * assume it has not registered yet. + */ + return ERR_PTR(-EPROBE_DEFER); + } + + return ERR_PTR(-ENODEV); +} + +struct regulator *_of_regulator_get(struct device *dev, struct device_node *node, + const char *id, enum regulator_get_type get_type) +{ + struct regulator_dev *r; + int ret; + + ret = _regulator_get_common_check(dev, id, get_type); + if (ret) + return ERR_PTR(ret); + + r = of_regulator_dev_lookup(dev, node, id); + return _regulator_get_common(r, dev, id, get_type); +} + +/** + * of_regulator_get - get regulator via device tree lookup + * @dev: device used for dev_printk() messages + * @node: device node for regulator "consumer" + * @id: Supply name + * + * Return: pointer to struct regulator corresponding to the regulator producer, + * or PTR_ERR() encoded error number. + * + * This is intended for use by consumers that want to get a regulator + * supply directly from a device node. This will _not_ consider supply + * aliases. See regulator_dev_lookup(). + */ +struct regulator *of_regulator_get(struct device *dev, + struct device_node *node, + const char *id) +{ + return _of_regulator_get(dev, node, id, NORMAL_GET); +} +EXPORT_SYMBOL_GPL(of_regulator_get); + +/** + * of_regulator_get_optional - get optional regulator via device tree lookup + * @dev: device used for dev_printk() messages + * @node: device node for regulator "consumer" + * @id: Supply name + * + * Return: pointer to struct regulator corresponding to the regulator producer, + * or PTR_ERR() encoded error number. + * + * This is intended for use by consumers that want to get a regulator + * supply directly from a device node, and can and want to deal with + * absence of such supplies. This will _not_ consider supply aliases. + * See regulator_dev_lookup(). + */ +struct regulator *of_regulator_get_optional(struct device *dev, + struct device_node *node, + const char *id) +{ + return _of_regulator_get(dev, node, id, OPTIONAL_GET); +} +EXPORT_SYMBOL_GPL(of_regulator_get_optional); + +/* + * Returns number of regulators coupled with rdev. + */ +int of_get_n_coupled(struct regulator_dev *rdev) +{ + struct device_node *node = rdev->dev.of_node; + int n_phandles; + + n_phandles = of_count_phandle_with_args(node, + "regulator-coupled-with", + NULL); + + return (n_phandles > 0) ? n_phandles : 0; +} + +/* Looks for "to_find" device_node in src's "regulator-coupled-with" property */ +static bool of_coupling_find_node(struct device_node *src, + struct device_node *to_find, + int *index) +{ + int n_phandles, i; + bool found = false; + + n_phandles = of_count_phandle_with_args(src, + "regulator-coupled-with", + NULL); + + for (i = 0; i < n_phandles; i++) { + struct device_node *tmp = of_parse_phandle(src, + "regulator-coupled-with", i); + + if (!tmp) + break; + + /* found */ + if (tmp == to_find) + found = true; + + of_node_put(tmp); + + if (found) { + *index = i; + break; + } + } + + return found; +} + +/** + * of_check_coupling_data - Parse rdev's coupling properties and check data + * consistency + * @rdev: pointer to regulator_dev whose data is checked + * + * Function checks if all the following conditions are met: + * - rdev's max_spread is greater than 0 + * - all coupled regulators have the same max_spread + * - all coupled regulators have the same number of regulator_dev phandles + * - all regulators are linked to each other + * + * Return: True if all conditions are met; false otherwise. + */ +bool of_check_coupling_data(struct regulator_dev *rdev) +{ + struct device_node *node = rdev->dev.of_node; + int n_phandles = of_get_n_coupled(rdev); + struct device_node *c_node; + int index; + int i; + bool ret = true; + + /* iterate over rdev's phandles */ + for (i = 0; i < n_phandles; i++) { + int max_spread = rdev->constraints->max_spread[i]; + int c_max_spread, c_n_phandles; + + if (max_spread <= 0) { + dev_err(&rdev->dev, "max_spread value invalid\n"); + return false; + } + + c_node = of_parse_phandle(node, + "regulator-coupled-with", i); + + if (!c_node) + ret = false; + + c_n_phandles = of_count_phandle_with_args(c_node, + "regulator-coupled-with", + NULL); + + if (c_n_phandles != n_phandles) { + dev_err(&rdev->dev, "number of coupled reg phandles mismatch\n"); + ret = false; + goto clean; + } + + if (!of_coupling_find_node(c_node, node, &index)) { + dev_err(&rdev->dev, "missing 2-way linking for coupled regulators\n"); + ret = false; + goto clean; + } + + if (of_property_read_u32_index(c_node, "regulator-coupled-max-spread", + index, &c_max_spread)) { + ret = false; + goto clean; + } + + if (c_max_spread != max_spread) { + dev_err(&rdev->dev, + "coupled regulators max_spread mismatch\n"); + ret = false; + goto clean; + } + +clean: + of_node_put(c_node); + if (!ret) + break; + } + + return ret; +} + +/** + * of_parse_coupled_regulator() - Get regulator_dev pointer from rdev's property + * @rdev: Pointer to regulator_dev, whose DTS is used as a source to parse + * "regulator-coupled-with" property + * @index: Index in phandles array + * + * Return: Pointer to the &struct regulator_dev parsed from DTS, or %NULL if + * it has not yet been registered. + */ +struct regulator_dev *of_parse_coupled_regulator(struct regulator_dev *rdev, + int index) +{ + struct device_node *node = rdev->dev.of_node; + struct device_node *c_node; + struct regulator_dev *c_rdev; + + c_node = of_parse_phandle(node, "regulator-coupled-with", index); + if (!c_node) + return NULL; + + c_rdev = of_find_regulator_by_node(c_node); + + of_node_put(c_node); + + return c_rdev; +} + +/* + * Check if name is a supply name according to the '*-supply' pattern + * return 0 if false + * return length of supply name without the -supply + */ +static int is_supply_name(const char *name) +{ + int strs, i; + + strs = strlen(name); + /* string need to be at minimum len(x-supply) */ + if (strs < 8) + return 0; + for (i = strs - 6; i > 0; i--) { + /* find first '-' and check if right part is supply */ + if (name[i] != '-') + continue; + if (strcmp(name + i + 1, "supply") != 0) + return 0; + return i; + } + return 0; +} + +/** + * of_regulator_bulk_get_all - get multiple regulator consumers + * + * @dev: Device to supply + * @np: device node to search for consumers + * @consumers: Configuration of consumers; clients are stored here. + * + * This helper function allows drivers to get several regulator + * consumers in one operation. If any of the regulators cannot be + * acquired then any regulators that were allocated will be freed + * before returning to the caller, and @consumers will not be + * changed. + * + * Return: Number of regulators on success, or a negative error number + * on failure. + */ +int of_regulator_bulk_get_all(struct device *dev, struct device_node *np, + struct regulator_bulk_data **consumers) +{ + int num_consumers = 0; + struct regulator *tmp; + struct regulator_bulk_data *_consumers = NULL; + struct property *prop; + int i, n = 0, ret; + char name[64]; + + /* + * first pass: get numbers of xxx-supply + * second pass: fill consumers + */ +restart: + for_each_property_of_node(np, prop) { + i = is_supply_name(prop->name); + if (i == 0) + continue; + if (!_consumers) { + num_consumers++; + continue; + } else { + memcpy(name, prop->name, i); + name[i] = '\0'; + tmp = regulator_get(dev, name); + if (IS_ERR(tmp)) { + ret = PTR_ERR(tmp); + goto error; + } + _consumers[n].consumer = tmp; + n++; + continue; + } + } + if (_consumers) { + *consumers = _consumers; + return num_consumers; + } + if (num_consumers == 0) + return 0; + _consumers = kmalloc_objs(struct regulator_bulk_data, num_consumers); + if (!_consumers) + return -ENOMEM; + goto restart; + +error: + while (--n >= 0) + regulator_put(_consumers[n].consumer); + kfree(_consumers); + return ret; +} +EXPORT_SYMBOL_GPL(of_regulator_bulk_get_all); diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c new file mode 100644 index 000000000..f82618a70 --- /dev/null +++ b/drivers/regulator/palmas-regulator.c @@ -0,0 +1,1687 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Regulator part of Palmas PMIC Chips + * + * Copyright 2011-2013 Texas Instruments Inc. + * + * Author: Graeme Gregory + * Author: Ian Lartey + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct linear_range smps_low_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0), + REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000), + REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0), +}; + +static const struct linear_range smps_high_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0), + REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000), + REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0), +}; + +static struct palmas_regs_info palmas_generic_regs_info[] = { + { + .name = "SMPS12", + .sname = "smps1-in", + .vsel_addr = PALMAS_SMPS12_VOLTAGE, + .ctrl_addr = PALMAS_SMPS12_CTRL, + .tstep_addr = PALMAS_SMPS12_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, + }, + { + .name = "SMPS123", + .sname = "smps1-in", + .vsel_addr = PALMAS_SMPS12_VOLTAGE, + .ctrl_addr = PALMAS_SMPS12_CTRL, + .tstep_addr = PALMAS_SMPS12_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, + }, + { + .name = "SMPS3", + .sname = "smps3-in", + .vsel_addr = PALMAS_SMPS3_VOLTAGE, + .ctrl_addr = PALMAS_SMPS3_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3, + }, + { + .name = "SMPS45", + .sname = "smps4-in", + .vsel_addr = PALMAS_SMPS45_VOLTAGE, + .ctrl_addr = PALMAS_SMPS45_CTRL, + .tstep_addr = PALMAS_SMPS45_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, + }, + { + .name = "SMPS457", + .sname = "smps4-in", + .vsel_addr = PALMAS_SMPS45_VOLTAGE, + .ctrl_addr = PALMAS_SMPS45_CTRL, + .tstep_addr = PALMAS_SMPS45_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, + }, + { + .name = "SMPS6", + .sname = "smps6-in", + .vsel_addr = PALMAS_SMPS6_VOLTAGE, + .ctrl_addr = PALMAS_SMPS6_CTRL, + .tstep_addr = PALMAS_SMPS6_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6, + }, + { + .name = "SMPS7", + .sname = "smps7-in", + .vsel_addr = PALMAS_SMPS7_VOLTAGE, + .ctrl_addr = PALMAS_SMPS7_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7, + }, + { + .name = "SMPS8", + .sname = "smps8-in", + .vsel_addr = PALMAS_SMPS8_VOLTAGE, + .ctrl_addr = PALMAS_SMPS8_CTRL, + .tstep_addr = PALMAS_SMPS8_TSTEP, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8, + }, + { + .name = "SMPS9", + .sname = "smps9-in", + .vsel_addr = PALMAS_SMPS9_VOLTAGE, + .ctrl_addr = PALMAS_SMPS9_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9, + }, + { + .name = "SMPS10_OUT2", + .sname = "smps10-in", + .ctrl_addr = PALMAS_SMPS10_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, + }, + { + .name = "SMPS10_OUT1", + .sname = "smps10-out2", + .ctrl_addr = PALMAS_SMPS10_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, + }, + { + .name = "LDO1", + .sname = "ldo1-in", + .vsel_addr = PALMAS_LDO1_VOLTAGE, + .ctrl_addr = PALMAS_LDO1_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1, + }, + { + .name = "LDO2", + .sname = "ldo2-in", + .vsel_addr = PALMAS_LDO2_VOLTAGE, + .ctrl_addr = PALMAS_LDO2_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2, + }, + { + .name = "LDO3", + .sname = "ldo3-in", + .vsel_addr = PALMAS_LDO3_VOLTAGE, + .ctrl_addr = PALMAS_LDO3_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3, + }, + { + .name = "LDO4", + .sname = "ldo4-in", + .vsel_addr = PALMAS_LDO4_VOLTAGE, + .ctrl_addr = PALMAS_LDO4_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4, + }, + { + .name = "LDO5", + .sname = "ldo5-in", + .vsel_addr = PALMAS_LDO5_VOLTAGE, + .ctrl_addr = PALMAS_LDO5_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5, + }, + { + .name = "LDO6", + .sname = "ldo6-in", + .vsel_addr = PALMAS_LDO6_VOLTAGE, + .ctrl_addr = PALMAS_LDO6_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6, + }, + { + .name = "LDO7", + .sname = "ldo7-in", + .vsel_addr = PALMAS_LDO7_VOLTAGE, + .ctrl_addr = PALMAS_LDO7_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7, + }, + { + .name = "LDO8", + .sname = "ldo8-in", + .vsel_addr = PALMAS_LDO8_VOLTAGE, + .ctrl_addr = PALMAS_LDO8_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8, + }, + { + .name = "LDO9", + .sname = "ldo9-in", + .vsel_addr = PALMAS_LDO9_VOLTAGE, + .ctrl_addr = PALMAS_LDO9_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9, + }, + { + .name = "LDOLN", + .sname = "ldoln-in", + .vsel_addr = PALMAS_LDOLN_VOLTAGE, + .ctrl_addr = PALMAS_LDOLN_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN, + }, + { + .name = "LDOUSB", + .sname = "ldousb-in", + .vsel_addr = PALMAS_LDOUSB_VOLTAGE, + .ctrl_addr = PALMAS_LDOUSB_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB, + }, + { + .name = "REGEN1", + .ctrl_addr = PALMAS_REGEN1_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1, + }, + { + .name = "REGEN2", + .ctrl_addr = PALMAS_REGEN2_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2, + }, + { + .name = "REGEN3", + .ctrl_addr = PALMAS_REGEN3_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3, + }, + { + .name = "SYSEN1", + .ctrl_addr = PALMAS_SYSEN1_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1, + }, + { + .name = "SYSEN2", + .ctrl_addr = PALMAS_SYSEN2_CTRL, + .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2, + }, +}; + +static struct palmas_regs_info tps65917_regs_info[] = { + { + .name = "SMPS1", + .sname = "smps1-in", + .vsel_addr = TPS65917_SMPS1_VOLTAGE, + .ctrl_addr = TPS65917_SMPS1_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1, + }, + { + .name = "SMPS2", + .sname = "smps2-in", + .vsel_addr = TPS65917_SMPS2_VOLTAGE, + .ctrl_addr = TPS65917_SMPS2_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2, + }, + { + .name = "SMPS3", + .sname = "smps3-in", + .vsel_addr = TPS65917_SMPS3_VOLTAGE, + .ctrl_addr = TPS65917_SMPS3_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3, + }, + { + .name = "SMPS4", + .sname = "smps4-in", + .vsel_addr = TPS65917_SMPS4_VOLTAGE, + .ctrl_addr = TPS65917_SMPS4_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4, + }, + { + .name = "SMPS5", + .sname = "smps5-in", + .vsel_addr = TPS65917_SMPS5_VOLTAGE, + .ctrl_addr = TPS65917_SMPS5_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5, + }, + { + .name = "SMPS12", + .sname = "smps1-in", + .vsel_addr = TPS65917_SMPS1_VOLTAGE, + .ctrl_addr = TPS65917_SMPS1_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12, + }, + { + .name = "LDO1", + .sname = "ldo1-in", + .vsel_addr = TPS65917_LDO1_VOLTAGE, + .ctrl_addr = TPS65917_LDO1_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1, + }, + { + .name = "LDO2", + .sname = "ldo2-in", + .vsel_addr = TPS65917_LDO2_VOLTAGE, + .ctrl_addr = TPS65917_LDO2_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2, + }, + { + .name = "LDO3", + .sname = "ldo3-in", + .vsel_addr = TPS65917_LDO3_VOLTAGE, + .ctrl_addr = TPS65917_LDO3_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3, + }, + { + .name = "LDO4", + .sname = "ldo4-in", + .vsel_addr = TPS65917_LDO4_VOLTAGE, + .ctrl_addr = TPS65917_LDO4_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4, + }, + { + .name = "LDO5", + .sname = "ldo5-in", + .vsel_addr = TPS65917_LDO5_VOLTAGE, + .ctrl_addr = TPS65917_LDO5_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5, + }, + { + .name = "REGEN1", + .ctrl_addr = TPS65917_REGEN1_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1, + }, + { + .name = "REGEN2", + .ctrl_addr = TPS65917_REGEN2_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2, + }, + { + .name = "REGEN3", + .ctrl_addr = TPS65917_REGEN3_CTRL, + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3, + }, +}; + +#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ + [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ + .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ + .reg_offset = _offset, \ + .bit_pos = _pos, \ + } + +static struct palmas_sleep_requestor_info palma_sleep_req_info[] = { + EXTERNAL_REQUESTOR(REGEN1, 0, 0), + EXTERNAL_REQUESTOR(REGEN2, 0, 1), + EXTERNAL_REQUESTOR(SYSEN1, 0, 2), + EXTERNAL_REQUESTOR(SYSEN2, 0, 3), + EXTERNAL_REQUESTOR(CLK32KG, 0, 4), + EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), + EXTERNAL_REQUESTOR(REGEN3, 0, 6), + EXTERNAL_REQUESTOR(SMPS12, 1, 0), + EXTERNAL_REQUESTOR(SMPS3, 1, 1), + EXTERNAL_REQUESTOR(SMPS45, 1, 2), + EXTERNAL_REQUESTOR(SMPS6, 1, 3), + EXTERNAL_REQUESTOR(SMPS7, 1, 4), + EXTERNAL_REQUESTOR(SMPS8, 1, 5), + EXTERNAL_REQUESTOR(SMPS9, 1, 6), + EXTERNAL_REQUESTOR(SMPS10, 1, 7), + EXTERNAL_REQUESTOR(LDO1, 2, 0), + EXTERNAL_REQUESTOR(LDO2, 2, 1), + EXTERNAL_REQUESTOR(LDO3, 2, 2), + EXTERNAL_REQUESTOR(LDO4, 2, 3), + EXTERNAL_REQUESTOR(LDO5, 2, 4), + EXTERNAL_REQUESTOR(LDO6, 2, 5), + EXTERNAL_REQUESTOR(LDO7, 2, 6), + EXTERNAL_REQUESTOR(LDO8, 2, 7), + EXTERNAL_REQUESTOR(LDO9, 3, 0), + EXTERNAL_REQUESTOR(LDOLN, 3, 1), + EXTERNAL_REQUESTOR(LDOUSB, 3, 2), +}; + +#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ + [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ + .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ + .reg_offset = _offset, \ + .bit_pos = _pos, \ + } + +static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = { + EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0), + EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1), + EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6), + EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0), + EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1), + EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2), + EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3), + EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4), + EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5), + EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0), + EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1), + EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2), + EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3), + EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4), +}; + +static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; + +#define SMPS_CTRL_MODE_OFF 0x00 +#define SMPS_CTRL_MODE_ON 0x01 +#define SMPS_CTRL_MODE_ECO 0x02 +#define SMPS_CTRL_MODE_PWM 0x03 + +#define PALMAS_SMPS_NUM_VOLTAGES 122 +#define PALMAS_SMPS10_NUM_VOLTAGES 2 +#define PALMAS_LDO_NUM_VOLTAGES 50 + +#define SMPS10_VSEL (1<<3) +#define SMPS10_BOOST_EN (1<<2) +#define SMPS10_BYPASS_EN (1<<1) +#define SMPS10_SWITCH_EN (1<<0) + +#define REGULATOR_SLAVE 0 + +static int palmas_smps_read(struct palmas *palmas, unsigned int reg, + unsigned int *dest) +{ + unsigned int addr; + + addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); + + return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); +} + +static int palmas_smps_write(struct palmas *palmas, unsigned int reg, + unsigned int value) +{ + unsigned int addr; + + addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); + + return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); +} + +static int palmas_ldo_read(struct palmas *palmas, unsigned int reg, + unsigned int *dest) +{ + unsigned int addr; + + addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); + + return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); +} + +static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, + unsigned int value) +{ + unsigned int addr; + + addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); + + return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); +} + +static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) +{ + int id = rdev_get_id(dev); + int ret; + struct palmas_pmic *pmic = rdev_get_drvdata(dev); + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + unsigned int reg; + bool rail_enable = true; + + ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®); + if (ret) + return ret; + + reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + + if (reg == SMPS_CTRL_MODE_OFF) + rail_enable = false; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + reg |= SMPS_CTRL_MODE_ON; + break; + case REGULATOR_MODE_IDLE: + reg |= SMPS_CTRL_MODE_ECO; + break; + case REGULATOR_MODE_FAST: + reg |= SMPS_CTRL_MODE_PWM; + break; + default: + return -EINVAL; + } + + pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + if (rail_enable) + palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg); + + /* Switch the enable value to ensure this is used for enable */ + pmic->desc[id].enable_val = pmic->current_reg_mode[id]; + + return 0; +} + +static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) +{ + struct palmas_pmic *pmic = rdev_get_drvdata(dev); + int id = rdev_get_id(dev); + unsigned int reg; + + reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + + switch (reg) { + case SMPS_CTRL_MODE_ON: + return REGULATOR_MODE_NORMAL; + case SMPS_CTRL_MODE_ECO: + return REGULATOR_MODE_IDLE; + case SMPS_CTRL_MODE_PWM: + return REGULATOR_MODE_FAST; + } + + return 0; +} + +static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, + int ramp_delay) +{ + int id = rdev_get_id(rdev); + struct palmas_pmic *pmic = rdev_get_drvdata(rdev); + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + unsigned int reg = 0; + int ret; + + /* SMPS3 and SMPS7 do not have tstep_addr setting */ + switch (id) { + case PALMAS_REG_SMPS3: + case PALMAS_REG_SMPS7: + return 0; + } + + if (ramp_delay <= 0) + reg = 0; + else if (ramp_delay <= 2500) + reg = 3; + else if (ramp_delay <= 5000) + reg = 2; + else + reg = 1; + + ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg); + if (ret < 0) { + dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret); + return ret; + } + + pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg]; + return ret; +} + +static const struct regulator_ops palmas_ops_smps = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = palmas_set_mode_smps, + .get_mode = palmas_get_mode_smps, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = palmas_smps_set_ramp_delay, +}; + +static const struct regulator_ops palmas_ops_ext_control_smps = { + .set_mode = palmas_set_mode_smps, + .get_mode = palmas_get_mode_smps, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = palmas_smps_set_ramp_delay, +}; + +static const struct regulator_ops palmas_ops_smps10 = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +static const struct regulator_ops tps65917_ops_smps = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = palmas_set_mode_smps, + .get_mode = palmas_get_mode_smps, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops tps65917_ops_ext_control_smps = { + .set_mode = palmas_set_mode_smps, + .get_mode = palmas_get_mode_smps, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static int palmas_is_enabled_ldo(struct regulator_dev *dev) +{ + int id = rdev_get_id(dev); + struct palmas_pmic *pmic = rdev_get_drvdata(dev); + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + unsigned int reg; + + palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®); + + reg &= PALMAS_LDO1_CTRL_STATUS; + + return !!(reg); +} + +static const struct regulator_ops palmas_ops_ldo = { + .is_enabled = palmas_is_enabled_ldo, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops palmas_ops_ldo9 = { + .is_enabled = palmas_is_enabled_ldo, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +static const struct regulator_ops palmas_ops_ext_control_ldo = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops palmas_ops_extreg = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops palmas_ops_ext_control_extreg = { +}; + +static const struct regulator_ops tps65917_ops_ldo = { + .is_enabled = palmas_is_enabled_ldo, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops tps65917_ops_ldo_1_2 = { + .is_enabled = palmas_is_enabled_ldo, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +static int palmas_regulator_config_external(struct palmas *palmas, int id, + struct palmas_reg_init *reg_init) +{ + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + int ret; + + ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id, + reg_init->roof_floor, true); + if (ret < 0) + dev_err(palmas->dev, + "Ext control config for regulator %d failed %d\n", + id, ret); + return ret; +} + +/* + * setup the hardware based sleep configuration of the SMPS/LDO regulators + * from the platform data. This is different to the software based control + * supported by the regulator framework as it is controlled by toggling + * pins on the PMIC such as PREQ, SYSEN, ... + */ +static int palmas_smps_init(struct palmas *palmas, int id, + struct palmas_reg_init *reg_init) +{ + unsigned int reg; + int ret; + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + unsigned int addr = rinfo->ctrl_addr; + + ret = palmas_smps_read(palmas, addr, ®); + if (ret) + return ret; + + switch (id) { + case PALMAS_REG_SMPS10_OUT1: + case PALMAS_REG_SMPS10_OUT2: + reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK; + if (reg_init->mode_sleep) + reg |= reg_init->mode_sleep << + PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT; + break; + default: + if (reg_init->warm_reset) + reg |= PALMAS_SMPS12_CTRL_WR_S; + else + reg &= ~PALMAS_SMPS12_CTRL_WR_S; + + if (reg_init->roof_floor) + reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; + else + reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; + + reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK; + if (reg_init->mode_sleep) + reg |= reg_init->mode_sleep << + PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT; + } + + ret = palmas_smps_write(palmas, addr, reg); + if (ret) + return ret; + + if (rinfo->vsel_addr && reg_init->vsel) { + + reg = reg_init->vsel; + + ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg); + if (ret) + return ret; + } + + if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) && + (id != PALMAS_REG_SMPS10_OUT2)) { + /* Enable externally controlled regulator */ + ret = palmas_smps_read(palmas, addr, ®); + if (ret < 0) + return ret; + + if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) { + reg |= SMPS_CTRL_MODE_ON; + ret = palmas_smps_write(palmas, addr, reg); + if (ret < 0) + return ret; + } + return palmas_regulator_config_external(palmas, id, reg_init); + } + return 0; +} + +static int palmas_ldo_init(struct palmas *palmas, int id, + struct palmas_reg_init *reg_init) +{ + unsigned int reg; + unsigned int addr; + int ret; + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + + addr = rinfo->ctrl_addr; + + ret = palmas_ldo_read(palmas, addr, ®); + if (ret) + return ret; + + if (reg_init->warm_reset) + reg |= PALMAS_LDO1_CTRL_WR_S; + else + reg &= ~PALMAS_LDO1_CTRL_WR_S; + + if (reg_init->mode_sleep) + reg |= PALMAS_LDO1_CTRL_MODE_SLEEP; + else + reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP; + + ret = palmas_ldo_write(palmas, addr, reg); + if (ret) + return ret; + + if (reg_init->roof_floor) { + /* Enable externally controlled regulator */ + ret = palmas_update_bits(palmas, PALMAS_LDO_BASE, + addr, PALMAS_LDO1_CTRL_MODE_ACTIVE, + PALMAS_LDO1_CTRL_MODE_ACTIVE); + if (ret < 0) { + dev_err(palmas->dev, + "LDO Register 0x%02x update failed %d\n", + addr, ret); + return ret; + } + return palmas_regulator_config_external(palmas, id, reg_init); + } + return 0; +} + +static int palmas_extreg_init(struct palmas *palmas, int id, + struct palmas_reg_init *reg_init) +{ + unsigned int addr; + int ret; + unsigned int val = 0; + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; + + addr = rinfo->ctrl_addr; + + if (reg_init->mode_sleep) + val = PALMAS_REGEN1_CTRL_MODE_SLEEP; + + ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, + addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val); + if (ret < 0) { + dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", + addr, ret); + return ret; + } + + if (reg_init->roof_floor) { + /* Enable externally controlled regulator */ + ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, + addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE, + PALMAS_REGEN1_CTRL_MODE_ACTIVE); + if (ret < 0) { + dev_err(palmas->dev, + "Resource Register 0x%02x update failed %d\n", + addr, ret); + return ret; + } + return palmas_regulator_config_external(palmas, id, reg_init); + } + return 0; +} + +static void palmas_enable_ldo8_track(struct palmas *palmas) +{ + unsigned int reg; + unsigned int addr; + int ret; + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; + struct palmas_regs_info *rinfo; + + rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8]; + addr = rinfo->ctrl_addr; + + ret = palmas_ldo_read(palmas, addr, ®); + if (ret) { + dev_err(palmas->dev, "Error in reading ldo8 control reg\n"); + return; + } + + reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN; + ret = palmas_ldo_write(palmas, addr, reg); + if (ret < 0) { + dev_err(palmas->dev, "Error in enabling tracking mode\n"); + return; + } + /* + * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8 + * output is defined by the LDO8_VOLTAGE.VSEL register divided by two, + * and can be set from 0.45 to 1.65 V. + */ + addr = rinfo->vsel_addr; + ret = palmas_ldo_read(palmas, addr, ®); + if (ret) { + dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n"); + return; + } + + reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK; + ret = palmas_ldo_write(palmas, addr, reg); + if (ret < 0) + dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n"); + + return; +} + +static int palmas_ldo_registration(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config) +{ + int id, ret; + struct regulator_dev *rdev; + struct palmas_reg_init *reg_init; + struct palmas_regs_info *rinfo; + struct regulator_desc *desc; + + for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { + if (pdata && pdata->reg_init[id]) + reg_init = pdata->reg_init[id]; + else + reg_init = NULL; + + rinfo = &ddata->palmas_regs_info[id]; + /* Miss out regulators which are not available due + * to alternate functions. + */ + + /* Register the regulators */ + desc = &pmic->desc[id]; + desc->name = rinfo->name; + desc->id = id; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + if (id < PALMAS_REG_REGEN1) { + desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; + if (reg_init && reg_init->roof_floor) + desc->ops = &palmas_ops_ext_control_ldo; + else + desc->ops = &palmas_ops_ldo; + desc->min_uV = 900000; + desc->uV_step = 50000; + desc->linear_min_sel = 1; + desc->enable_time = 500; + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, + rinfo->vsel_addr); + desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; + + /* Check if LDO8 is in tracking mode or not */ + if (pdata && (id == PALMAS_REG_LDO8) && + pdata->enable_ldo8_tracking) { + palmas_enable_ldo8_track(pmic->palmas); + desc->min_uV = 450000; + desc->uV_step = 25000; + } + + /* LOD6 in vibrator mode will have enable time 2000us */ + if (pdata && pdata->ldo6_vibrator && + (id == PALMAS_REG_LDO6)) + desc->enable_time = 2000; + + if (id == PALMAS_REG_LDO9) { + desc->ops = &palmas_ops_ldo9; + desc->bypass_reg = desc->enable_reg; + desc->bypass_val_on = + PALMAS_LDO9_CTRL_LDO_BYPASS_EN; + desc->bypass_mask = + PALMAS_LDO9_CTRL_LDO_BYPASS_EN; + } + } else { + if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3) + continue; + + desc->n_voltages = 1; + if (reg_init && reg_init->roof_floor) + desc->ops = &palmas_ops_ext_control_extreg; + else + desc->ops = &palmas_ops_extreg; + desc->enable_reg = + PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; + } + + if (pdata) + config.init_data = pdata->reg_data[id]; + else + config.init_data = NULL; + + desc->supply_name = rinfo->sname; + config.of_node = ddata->palmas_matches[id].of_node; + + rdev = devm_regulator_register(pmic->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(pmic->dev, + "failed to register %s regulator\n", + pdev_name); + return PTR_ERR(rdev); + } + + /* Initialise sleep/init values from platform data */ + if (pdata) { + reg_init = pdata->reg_init[id]; + if (reg_init) { + if (id <= ddata->ldo_end) + ret = palmas_ldo_init(pmic->palmas, id, + reg_init); + else + ret = palmas_extreg_init(pmic->palmas, + id, reg_init); + if (ret) + return ret; + } + } + } + + return 0; +} + +static int tps65917_ldo_registration(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config) +{ + int id, ret; + struct regulator_dev *rdev; + struct palmas_reg_init *reg_init; + struct palmas_regs_info *rinfo; + struct regulator_desc *desc; + + for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { + if (pdata && pdata->reg_init[id]) + reg_init = pdata->reg_init[id]; + else + reg_init = NULL; + + /* Miss out regulators which are not available due + * to alternate functions. + */ + rinfo = &ddata->palmas_regs_info[id]; + + /* Register the regulators */ + desc = &pmic->desc[id]; + desc->name = rinfo->name; + desc->id = id; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + if (id < TPS65917_REG_REGEN1) { + desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; + if (reg_init && reg_init->roof_floor) + desc->ops = &palmas_ops_ext_control_ldo; + else + desc->ops = &tps65917_ops_ldo; + desc->min_uV = 900000; + desc->uV_step = 50000; + desc->linear_min_sel = 1; + desc->enable_time = 500; + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, + rinfo->vsel_addr); + desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; + /* + * To be confirmed. Discussion on going with PMIC Team. + * It is of the order of ~60mV/uS. + */ + desc->ramp_delay = 2500; + if (id == TPS65917_REG_LDO1 || + id == TPS65917_REG_LDO2) { + desc->ops = &tps65917_ops_ldo_1_2; + desc->bypass_reg = desc->enable_reg; + desc->bypass_val_on = + TPS65917_LDO1_CTRL_BYPASS_EN; + desc->bypass_mask = + TPS65917_LDO1_CTRL_BYPASS_EN; + } + } else { + desc->n_voltages = 1; + if (reg_init && reg_init->roof_floor) + desc->ops = &palmas_ops_ext_control_extreg; + else + desc->ops = &palmas_ops_extreg; + desc->enable_reg = + PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; + } + + if (pdata) + config.init_data = pdata->reg_data[id]; + else + config.init_data = NULL; + + desc->supply_name = rinfo->sname; + config.of_node = ddata->palmas_matches[id].of_node; + + rdev = devm_regulator_register(pmic->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(pmic->dev, + "failed to register %s regulator\n", + pdev_name); + return PTR_ERR(rdev); + } + + /* Initialise sleep/init values from platform data */ + if (pdata) { + reg_init = pdata->reg_init[id]; + if (reg_init) { + if (id < TPS65917_REG_REGEN1) + ret = palmas_ldo_init(pmic->palmas, + id, reg_init); + else + ret = palmas_extreg_init(pmic->palmas, + id, reg_init); + if (ret) + return ret; + } + } + } + + return 0; +} + +static int palmas_smps_registration(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config) +{ + int id, ret; + unsigned int addr, reg; + struct regulator_dev *rdev; + struct palmas_reg_init *reg_init; + struct palmas_regs_info *rinfo; + struct regulator_desc *desc; + + for (id = ddata->smps_start; id <= ddata->smps_end; id++) { + bool ramp_delay_support = false; + + /* + * Miss out regulators which are not available due + * to slaving configurations. + */ + switch (id) { + case PALMAS_REG_SMPS12: + case PALMAS_REG_SMPS3: + if (pmic->smps123) + continue; + if (id == PALMAS_REG_SMPS12) + ramp_delay_support = true; + break; + case PALMAS_REG_SMPS123: + if (!pmic->smps123) + continue; + ramp_delay_support = true; + break; + case PALMAS_REG_SMPS45: + case PALMAS_REG_SMPS7: + if (pmic->smps457) + continue; + if (id == PALMAS_REG_SMPS45) + ramp_delay_support = true; + break; + case PALMAS_REG_SMPS457: + if (!pmic->smps457) + continue; + ramp_delay_support = true; + break; + case PALMAS_REG_SMPS10_OUT1: + case PALMAS_REG_SMPS10_OUT2: + if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST)) + continue; + } + rinfo = &ddata->palmas_regs_info[id]; + desc = &pmic->desc[id]; + + if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8)) + ramp_delay_support = true; + + if (ramp_delay_support) { + addr = rinfo->tstep_addr; + ret = palmas_smps_read(pmic->palmas, addr, ®); + if (ret < 0) { + dev_err(pmic->dev, + "reading TSTEP reg failed: %d\n", ret); + return ret; + } + desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3]; + pmic->ramp_delay[id] = desc->ramp_delay; + } + + /* Initialise sleep/init values from platform data */ + if (pdata && pdata->reg_init[id]) { + reg_init = pdata->reg_init[id]; + ret = palmas_smps_init(pmic->palmas, id, reg_init); + if (ret) + return ret; + } else { + reg_init = NULL; + } + + /* Register the regulators */ + desc->name = rinfo->name; + desc->id = id; + + switch (id) { + case PALMAS_REG_SMPS10_OUT1: + case PALMAS_REG_SMPS10_OUT2: + desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; + desc->ops = &palmas_ops_smps10; + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + PALMAS_SMPS10_CTRL); + desc->vsel_mask = SMPS10_VSEL; + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + PALMAS_SMPS10_CTRL); + if (id == PALMAS_REG_SMPS10_OUT1) + desc->enable_mask = SMPS10_SWITCH_EN; + else + desc->enable_mask = SMPS10_BOOST_EN; + desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + PALMAS_SMPS10_CTRL); + desc->bypass_val_on = SMPS10_BYPASS_EN; + desc->bypass_mask = SMPS10_BYPASS_EN; + desc->min_uV = 3750000; + desc->uV_step = 1250000; + break; + default: + /* + * Read and store the RANGE bit for later use + * This must be done before regulator is probed, + * otherwise we error in probe with unsupportable + * ranges. Read the current smps mode for later use. + */ + addr = rinfo->vsel_addr; + desc->n_linear_ranges = 3; + + ret = palmas_smps_read(pmic->palmas, addr, ®); + if (ret) + return ret; + if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) + pmic->range[id] = 1; + if (pmic->range[id]) + desc->linear_ranges = smps_high_ranges; + else + desc->linear_ranges = smps_low_ranges; + + if (reg_init && reg_init->roof_floor) + desc->ops = &palmas_ops_ext_control_smps; + else + desc->ops = &palmas_ops_smps; + desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + rinfo->vsel_addr); + desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; + + /* Read the smps mode for later use. */ + addr = rinfo->ctrl_addr; + ret = palmas_smps_read(pmic->palmas, addr, ®); + if (ret) + return ret; + pmic->current_reg_mode[id] = reg & + PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + /* set_mode overrides this value */ + desc->enable_val = SMPS_CTRL_MODE_ON; + } + + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + if (pdata) + config.init_data = pdata->reg_data[id]; + else + config.init_data = NULL; + + desc->supply_name = rinfo->sname; + config.of_node = ddata->palmas_matches[id].of_node; + + rdev = devm_regulator_register(pmic->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(pmic->dev, + "failed to register %s regulator\n", + pdev_name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static int tps65917_smps_registration(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config) +{ + int id, ret; + unsigned int addr, reg; + struct regulator_dev *rdev; + struct palmas_reg_init *reg_init; + struct palmas_regs_info *rinfo; + struct regulator_desc *desc; + + for (id = ddata->smps_start; id <= ddata->smps_end; id++) { + /* + * Miss out regulators which are not available due + * to slaving configurations. + */ + desc = &pmic->desc[id]; + desc->n_linear_ranges = 3; + if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) && + pmic->smps12) + continue; + + /* Initialise sleep/init values from platform data */ + if (pdata && pdata->reg_init[id]) { + reg_init = pdata->reg_init[id]; + ret = palmas_smps_init(pmic->palmas, id, reg_init); + if (ret) + return ret; + } else { + reg_init = NULL; + } + rinfo = &ddata->palmas_regs_info[id]; + + /* Register the regulators */ + desc->name = rinfo->name; + desc->id = id; + + /* + * Read and store the RANGE bit for later use + * This must be done before regulator is probed, + * otherwise we error in probe with unsupportable + * ranges. Read the current smps mode for later use. + */ + addr = rinfo->vsel_addr; + + ret = palmas_smps_read(pmic->palmas, addr, ®); + if (ret) + return ret; + if (reg & TPS65917_SMPS1_VOLTAGE_RANGE) + pmic->range[id] = 1; + + if (pmic->range[id]) + desc->linear_ranges = smps_high_ranges; + else + desc->linear_ranges = smps_low_ranges; + + if (reg_init && reg_init->roof_floor) + desc->ops = &tps65917_ops_ext_control_smps; + else + desc->ops = &tps65917_ops_smps; + desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + rinfo->vsel_addr); + desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; + desc->ramp_delay = 2500; + + /* Read the smps mode for later use. */ + addr = rinfo->ctrl_addr; + ret = palmas_smps_read(pmic->palmas, addr, ®); + if (ret) + return ret; + pmic->current_reg_mode[id] = reg & + PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, + rinfo->ctrl_addr); + desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; + /* set_mode overrides this value */ + desc->enable_val = SMPS_CTRL_MODE_ON; + + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + if (pdata) + config.init_data = pdata->reg_data[id]; + else + config.init_data = NULL; + + desc->supply_name = rinfo->sname; + config.of_node = ddata->palmas_matches[id].of_node; + + rdev = devm_regulator_register(pmic->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(pmic->dev, + "failed to register %s regulator\n", + pdev_name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct of_regulator_match palmas_matches[] = { + { .name = "smps12", }, + { .name = "smps123", }, + { .name = "smps3", }, + { .name = "smps45", }, + { .name = "smps457", }, + { .name = "smps6", }, + { .name = "smps7", }, + { .name = "smps8", }, + { .name = "smps9", }, + { .name = "smps10_out2", }, + { .name = "smps10_out1", }, + { .name = "ldo1", }, + { .name = "ldo2", }, + { .name = "ldo3", }, + { .name = "ldo4", }, + { .name = "ldo5", }, + { .name = "ldo6", }, + { .name = "ldo7", }, + { .name = "ldo8", }, + { .name = "ldo9", }, + { .name = "ldoln", }, + { .name = "ldousb", }, + { .name = "regen1", }, + { .name = "regen2", }, + { .name = "regen3", }, + { .name = "sysen1", }, + { .name = "sysen2", }, +}; + +static struct of_regulator_match tps65917_matches[] = { + { .name = "smps1", }, + { .name = "smps2", }, + { .name = "smps3", }, + { .name = "smps4", }, + { .name = "smps5", }, + { .name = "smps12",}, + { .name = "ldo1", }, + { .name = "ldo2", }, + { .name = "ldo3", }, + { .name = "ldo4", }, + { .name = "ldo5", }, + { .name = "regen1", }, + { .name = "regen2", }, + { .name = "regen3", }, + { .name = "sysen1", }, + { .name = "sysen2", }, +}; + +static struct palmas_pmic_driver_data palmas_ddata = { + .smps_start = PALMAS_REG_SMPS12, + .smps_end = PALMAS_REG_SMPS10_OUT1, + .ldo_begin = PALMAS_REG_LDO1, + .ldo_end = PALMAS_REG_LDOUSB, + .max_reg = PALMAS_NUM_REGS, + .has_regen3 = true, + .palmas_regs_info = palmas_generic_regs_info, + .palmas_matches = palmas_matches, + .sleep_req_info = palma_sleep_req_info, + .smps_register = palmas_smps_registration, + .ldo_register = palmas_ldo_registration, +}; + +static struct palmas_pmic_driver_data tps65917_ddata = { + .smps_start = TPS65917_REG_SMPS1, + .smps_end = TPS65917_REG_SMPS12, + .ldo_begin = TPS65917_REG_LDO1, + .ldo_end = TPS65917_REG_LDO5, + .max_reg = TPS65917_NUM_REGS, + .has_regen3 = true, + .palmas_regs_info = tps65917_regs_info, + .palmas_matches = tps65917_matches, + .sleep_req_info = tps65917_sleep_req_info, + .smps_register = tps65917_smps_registration, + .ldo_register = tps65917_ldo_registration, +}; + +static int palmas_dt_to_pdata(struct device *dev, + struct device_node *node, + struct palmas_pmic_platform_data *pdata, + struct palmas_pmic_driver_data *ddata) +{ + struct device_node *regulators; + u32 prop; + int idx, ret; + + regulators = of_get_child_by_name(node, "regulators"); + if (!regulators) { + dev_info(dev, "regulator node not found\n"); + return 0; + } + + ret = of_regulator_match(dev, regulators, ddata->palmas_matches, + ddata->max_reg); + of_node_put(regulators); + if (ret < 0) { + dev_err(dev, "Error parsing regulator init data: %d\n", ret); + return 0; + } + + for (idx = 0; idx < ddata->max_reg; idx++) { + struct of_regulator_match *match; + struct palmas_reg_init *rinit; + struct device_node *np; + + match = &ddata->palmas_matches[idx]; + np = match->of_node; + + if (!match->init_data || !np) + continue; + + rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL); + if (!rinit) + return -ENOMEM; + + pdata->reg_data[idx] = match->init_data; + pdata->reg_init[idx] = rinit; + + rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset"); + ret = of_property_read_u32(np, "ti,roof-floor", &prop); + /* EINVAL: Property not found */ + if (ret != -EINVAL) { + int econtrol; + + /* use default value, when no value is specified */ + econtrol = PALMAS_EXT_CONTROL_NSLEEP; + if (!ret) { + switch (prop) { + case 1: + econtrol = PALMAS_EXT_CONTROL_ENABLE1; + break; + case 2: + econtrol = PALMAS_EXT_CONTROL_ENABLE2; + break; + case 3: + econtrol = PALMAS_EXT_CONTROL_NSLEEP; + break; + default: + WARN_ON(1); + dev_warn(dev, + "%s: Invalid roof-floor option: %u\n", + match->name, prop); + break; + } + } + rinit->roof_floor = econtrol; + } + + ret = of_property_read_u32(np, "ti,mode-sleep", &prop); + if (!ret) + rinit->mode_sleep = prop; + + ret = of_property_read_bool(np, "ti,smps-range"); + if (ret) + rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE; + + if (idx == PALMAS_REG_LDO8) + pdata->enable_ldo8_tracking = of_property_read_bool( + np, "ti,enable-ldo8-tracking"); + } + + pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); + + return 0; +} + +static const struct of_device_id of_palmas_match_tbl[] = { + { + .compatible = "ti,palmas-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,twl6035-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,twl6036-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,twl6037-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,tps65913-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,tps65914-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,tps80036-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,tps659038-pmic", + .data = &palmas_ddata, + }, + { + .compatible = "ti,tps65917-pmic", + .data = &tps65917_ddata, + }, + { /* end */ } +}; +MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); + +static int palmas_regulators_probe(struct platform_device *pdev) +{ + struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); + struct palmas_pmic_platform_data *pdata; + struct device_node *node = pdev->dev.of_node; + struct palmas_pmic_driver_data *driver_data; + struct regulator_config config = { }; + struct palmas_pmic *pmic; + const char *pdev_name; + int ret = 0; + unsigned int reg; + + driver_data = (struct palmas_pmic_driver_data *)device_get_match_data(&pdev->dev); + if (!driver_data) + return -ENODATA; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + if (of_device_is_compatible(node, "ti,tps659038-pmic")) { + palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr = + TPS659038_REGEN2_CTRL; + palmas_ddata.has_regen3 = false; + } + + pmic->dev = &pdev->dev; + pmic->palmas = palmas; + palmas->pmic = pmic; + platform_set_drvdata(pdev, pmic); + pmic->palmas->pmic_ddata = driver_data; + + ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data); + if (ret) + return ret; + + ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®); + if (ret) + return ret; + + if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) { + pmic->smps123 = 1; + pmic->smps12 = 1; + } + + if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) + pmic->smps457 = 1; + + config.regmap = palmas->regmap[REGULATOR_SLAVE]; + config.dev = &pdev->dev; + config.driver_data = pmic; + pdev_name = pdev->name; + + ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name, + config); + if (ret) + return ret; + + ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name, + config); + + return ret; +} + +static struct platform_driver palmas_driver = { + .driver = { + .name = "palmas-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_palmas_match_tbl, + }, + .probe = palmas_regulators_probe, +}; + +static int __init palmas_init(void) +{ + return platform_driver_register(&palmas_driver); +} +subsys_initcall(palmas_init); + +static void __exit palmas_exit(void) +{ + platform_driver_unregister(&palmas_driver); +} +module_exit(palmas_exit); + +MODULE_AUTHOR("Graeme Gregory "); +MODULE_DESCRIPTION("Palmas voltage regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:palmas-pmic"); diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c new file mode 100644 index 000000000..cd5a0d7e4 --- /dev/null +++ b/drivers/regulator/pbias-regulator.c @@ -0,0 +1,243 @@ +/* + * pbias-regulator.c + * + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ + * Author: Balaji T K + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct pbias_reg_info { + u32 enable; + u32 enable_mask; + u32 disable_val; + u32 vmode; + unsigned int enable_time; + char *name; + const unsigned int *pbias_volt_table; + int n_voltages; +}; + +struct pbias_of_data { + unsigned int offset; +}; + +static const unsigned int pbias_volt_table_3_0V[] = { + 1800000, + 3000000 +}; + +static const unsigned int pbias_volt_table_3_3V[] = { + 1800000, + 3300000 +}; + +static const struct regulator_ops pbias_regulator_voltage_ops = { + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct pbias_reg_info pbias_mmc_omap2430 = { + .enable = BIT(1), + .enable_mask = BIT(1), + .vmode = BIT(0), + .disable_val = 0, + .enable_time = 100, + .pbias_volt_table = pbias_volt_table_3_0V, + .n_voltages = 2, + .name = "pbias_mmc_omap2430" +}; + +static const struct pbias_reg_info pbias_sim_omap3 = { + .enable = BIT(9), + .enable_mask = BIT(9), + .vmode = BIT(8), + .enable_time = 100, + .pbias_volt_table = pbias_volt_table_3_0V, + .n_voltages = 2, + .name = "pbias_sim_omap3" +}; + +static const struct pbias_reg_info pbias_mmc_omap4 = { + .enable = BIT(26) | BIT(22), + .enable_mask = BIT(26) | BIT(25) | BIT(22), + .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .pbias_volt_table = pbias_volt_table_3_0V, + .n_voltages = 2, + .name = "pbias_mmc_omap4" +}; + +static const struct pbias_reg_info pbias_mmc_omap5 = { + .enable = BIT(27) | BIT(26), + .enable_mask = BIT(27) | BIT(25) | BIT(26), + .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .pbias_volt_table = pbias_volt_table_3_3V, + .n_voltages = 2, + .name = "pbias_mmc_omap5" +}; + +static struct of_regulator_match pbias_matches[] = { + { .name = "pbias_mmc_omap2430", .driver_data = (void *)&pbias_mmc_omap2430}, + { .name = "pbias_sim_omap3", .driver_data = (void *)&pbias_sim_omap3}, + { .name = "pbias_mmc_omap4", .driver_data = (void *)&pbias_mmc_omap4}, + { .name = "pbias_mmc_omap5", .driver_data = (void *)&pbias_mmc_omap5}, +}; +#define PBIAS_NUM_REGS ARRAY_SIZE(pbias_matches) + +/* Offset from SCM general area (and syscon) base */ + +static const struct pbias_of_data pbias_of_data_omap2 = { + .offset = 0x230, +}; + +static const struct pbias_of_data pbias_of_data_omap3 = { + .offset = 0x2b0, +}; + +static const struct pbias_of_data pbias_of_data_omap4 = { + .offset = 0x60, +}; + +static const struct pbias_of_data pbias_of_data_omap5 = { + .offset = 0x60, +}; + +static const struct pbias_of_data pbias_of_data_dra7 = { + .offset = 0xe00, +}; + +static const struct of_device_id pbias_of_match[] = { + { .compatible = "ti,pbias-omap", }, + { .compatible = "ti,pbias-omap2", .data = &pbias_of_data_omap2, }, + { .compatible = "ti,pbias-omap3", .data = &pbias_of_data_omap3, }, + { .compatible = "ti,pbias-omap4", .data = &pbias_of_data_omap4, }, + { .compatible = "ti,pbias-omap5", .data = &pbias_of_data_omap5, }, + { .compatible = "ti,pbias-dra7", .data = &pbias_of_data_dra7, }, + {}, +}; +MODULE_DEVICE_TABLE(of, pbias_of_match); + +static int pbias_regulator_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct resource *res; + struct regulator_config cfg = { }; + struct regulator_desc *desc; + struct regulator_dev *rdev; + struct regmap *syscon; + const struct pbias_reg_info *info; + int ret, count, idx; + const struct pbias_of_data *data; + unsigned int offset; + + count = of_regulator_match(&pdev->dev, np, pbias_matches, + PBIAS_NUM_REGS); + if (count < 0) + return count; + + desc = devm_kcalloc(&pdev->dev, count, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + syscon = syscon_regmap_lookup_by_phandle(np, "syscon"); + if (IS_ERR(syscon)) + return PTR_ERR(syscon); + + data = of_device_get_match_data(&pdev->dev); + if (data) { + offset = data->offset; + } else { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; + + offset = res->start; + dev_WARN(&pdev->dev, + "using legacy dt data for pbias offset\n"); + } + + cfg.regmap = syscon; + cfg.dev = &pdev->dev; + + for (idx = 0; idx < PBIAS_NUM_REGS && count; idx++) { + if (!pbias_matches[idx].init_data || + !pbias_matches[idx].of_node) + continue; + + info = pbias_matches[idx].driver_data; + if (!info) + return -ENODEV; + + desc->name = info->name; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->ops = &pbias_regulator_voltage_ops; + desc->volt_table = info->pbias_volt_table; + desc->n_voltages = info->n_voltages; + desc->enable_time = info->enable_time; + desc->vsel_reg = offset; + desc->vsel_mask = info->vmode; + desc->enable_reg = offset; + desc->enable_mask = info->enable_mask; + desc->enable_val = info->enable; + desc->disable_val = info->disable_val; + + cfg.init_data = pbias_matches[idx].init_data; + cfg.of_node = pbias_matches[idx].of_node; + + rdev = devm_regulator_register(&pdev->dev, desc, &cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, + "Failed to register regulator: %d\n", ret); + return ret; + } + desc++; + count--; + } + + return 0; +} + +static struct platform_driver pbias_regulator_driver = { + .probe = pbias_regulator_probe, + .driver = { + .name = "pbias-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(pbias_of_match), + }, +}; + +module_platform_driver(pbias_regulator_driver); + +MODULE_AUTHOR("Balaji T K "); +MODULE_DESCRIPTION("pbias voltage regulator"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pbias-regulator"); diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c new file mode 100644 index 000000000..c41db70fa --- /dev/null +++ b/drivers/regulator/pca9450-regulator.c @@ -0,0 +1,1472 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020 NXP. + * NXP PCA9450 pmic driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned int pca9450_buck_get_mode(struct regulator_dev *rdev); +static int pca9450_buck_set_mode(struct regulator_dev *rdev, unsigned int mode); + +struct pc9450_dvs_config { + unsigned int run_reg; /* dvs0 */ + unsigned int run_mask; + unsigned int standby_reg; /* dvs1 */ + unsigned int standby_mask; + unsigned int mode_reg; /* ctrl */ + unsigned int mode_mask; +}; + +struct pca9450_regulator_desc { + struct regulator_desc desc; + const struct pc9450_dvs_config dvs; +}; + +struct pca9450 { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *sd_vsel_gpio; + enum pca9450_chip_type type; + unsigned int rcnt; + int irq; + bool sd_vsel_fixed_low; + int default_t_off_deb; +}; + +static const struct regmap_range pca9450_status_range = { + .range_min = PCA9450_REG_INT1, + .range_max = PCA9450_REG_PWRON_STAT, +}; + +static const struct regmap_access_table pca9450_volatile_regs = { + .yes_ranges = &pca9450_status_range, + .n_yes_ranges = 1, +}; + +static const struct regmap_config pca9450_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &pca9450_volatile_regs, + .max_register = PCA9450_MAX_REGISTER - 1, + .cache_type = REGCACHE_MAPLE, +}; + +/* + * BUCK1/2/3 + * BUCK1RAM[1:0] BUCK1 DVS ramp rate setting + * 00: 25mV/1usec + * 01: 25mV/2usec + * 10: 25mV/4usec + * 11: 25mV/8usec + */ +static const unsigned int pca9450_dvs_buck_ramp_table[] = { + 25000, 12500, 6250, 3125 +}; + +static const struct regulator_ops pca9450_dvs_buck_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_mode = pca9450_buck_set_mode, + .get_mode = pca9450_buck_get_mode, +}; + +static const struct regulator_ops pca9450_buck_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_mode = pca9450_buck_set_mode, + .get_mode = pca9450_buck_get_mode, +}; + +static const struct regulator_ops pca9450_ldo_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static unsigned int pca9450_ldo5_get_reg_voltage_sel(struct regulator_dev *rdev) +{ + struct pca9450 *pca9450 = rdev_get_drvdata(rdev); + + if (pca9450->sd_vsel_fixed_low) + return PCA9450_REG_LDO5CTRL_L; + + if (pca9450->sd_vsel_gpio && !gpiod_get_value(pca9450->sd_vsel_gpio)) + return PCA9450_REG_LDO5CTRL_L; + + return rdev->desc->vsel_reg; +} + +static int pca9450_ldo5_get_voltage_sel_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, pca9450_ldo5_get_reg_voltage_sel(rdev), &val); + if (ret != 0) + return ret; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static int pca9450_ldo5_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned int sel) +{ + int ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + + ret = regmap_update_bits(rdev->regmap, pca9450_ldo5_get_reg_voltage_sel(rdev), + rdev->desc->vsel_mask, sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + return ret; +} + +static const struct regulator_ops pca9450_ldo5_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = pca9450_ldo5_set_voltage_sel_regmap, + .get_voltage_sel = pca9450_ldo5_get_voltage_sel_regmap, +}; + +/* + * BUCK1/2/3 + * 0.60 to 2.1875V (12.5mV step) + */ +static const struct linear_range pca9450_dvs_buck_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x7F, 12500), +}; + +/* + * BUCK1/3 + * 0.65 to 2.2375V (12.5mV step) + */ +static const struct linear_range pca9451a_dvs_buck_volts[] = { + REGULATOR_LINEAR_RANGE(650000, 0x00, 0x7F, 12500), +}; + +/* + * BUCK4/5/6 + * 0.6V to 3.4V (25mV step) + */ +static const struct linear_range pca9450_buck_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x70, 25000), + REGULATOR_LINEAR_RANGE(3400000, 0x71, 0x7F, 0), +}; + +/* + * LDO1 + * 1.6 to 3.3V () + */ +static const struct linear_range pca9450_ldo1_volts[] = { + REGULATOR_LINEAR_RANGE(1600000, 0x00, 0x03, 100000), + REGULATOR_LINEAR_RANGE(3000000, 0x04, 0x07, 100000), +}; + +/* + * LDO2 + * 0.8 to 1.15V (50mV step) + */ +static const struct linear_range pca9450_ldo2_volts[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x07, 50000), +}; + +/* + * LDO3/4 + * 0.8 to 3.3V (100mV step) + */ +static const struct linear_range pca9450_ldo34_volts[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x19, 100000), + REGULATOR_LINEAR_RANGE(3300000, 0x1A, 0x1F, 0), +}; + +/* + * LDO5 + * 1.8 to 3.3V (100mV step) + */ +static const struct linear_range pca9450_ldo5_volts[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000), +}; + +static int buck_set_dvs(const struct regulator_desc *desc, + struct device_node *np, struct regmap *regmap, + char *prop, unsigned int reg, unsigned int mask) +{ + int ret, i; + uint32_t uv; + + ret = of_property_read_u32(np, prop, &uv); + if (ret == -EINVAL) + return 0; + else if (ret) + return ret; + + for (i = 0; i < desc->n_voltages; i++) { + ret = regulator_desc_list_voltage_linear_range(desc, i); + if (ret < 0) + continue; + if (ret == uv) { + i <<= ffs(desc->vsel_mask) - 1; + ret = regmap_update_bits(regmap, reg, mask, i); + break; + } + } + + if (ret == 0) { + const struct pca9450_regulator_desc *regulator = container_of_const(desc, + struct pca9450_regulator_desc, desc); + + /* Enable DVS control through PMIC_STBY_REQ for this BUCK */ + ret = regmap_update_bits(regmap, regulator->desc.enable_reg, + BUCK1_DVS_CTRL, BUCK1_DVS_CTRL); + } + return ret; +} + +static int pca9450_set_dvs_levels(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct pca9450_regulator_desc *data = container_of_const(desc, + struct pca9450_regulator_desc, desc); + const struct pc9450_dvs_config *dvs = &data->dvs; + unsigned int reg, mask; + char *prop; + int i, ret = 0; + + for (i = 0; i < PCA9450_DVS_LEVEL_MAX; i++) { + switch (i) { + case PCA9450_DVS_LEVEL_RUN: + prop = "nxp,dvs-run-voltage"; + reg = dvs->run_reg; + mask = dvs->run_mask; + break; + case PCA9450_DVS_LEVEL_STANDBY: + prop = "nxp,dvs-standby-voltage"; + reg = dvs->standby_reg; + mask = dvs->standby_mask; + break; + default: + return -EINVAL; + } + + ret = buck_set_dvs(desc, np, cfg->regmap, prop, reg, mask); + if (ret) + break; + } + + return ret; +} + +static inline unsigned int pca9450_map_mode(unsigned int mode) +{ + switch (mode) { + case PCA9450_BUCK_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case PCA9450_BUCK_MODE_FORCE_PWM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int pca9450_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct pca9450_regulator_desc *desc = container_of_const(rdev->desc, + struct pca9450_regulator_desc, desc); + const struct pc9450_dvs_config *dvs = &desc->dvs; + int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = dvs->mode_mask; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + dev_dbg(&rdev->dev, "pca9450 buck set_mode %#x, %#x, %#x\n", + dvs->mode_reg, dvs->mode_mask, val); + + return regmap_update_bits(rdev->regmap, dvs->mode_reg, + dvs->mode_mask, val); +} + +static unsigned int pca9450_buck_get_mode(struct regulator_dev *rdev) +{ + const struct pca9450_regulator_desc *desc = container_of_const(rdev->desc, + struct pca9450_regulator_desc, desc); + const struct pc9450_dvs_config *dvs = &desc->dvs; + int ret = 0, regval; + + ret = regmap_read(rdev->regmap, dvs->mode_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get pca9450 buck mode: %d\n", ret); + return ret; + } + + if ((regval & dvs->mode_mask) == dvs->mode_mask) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static struct pca9450_regulator_desc pca9450a_regulators[] = { + { + .desc = { + .name = "buck1", + .supply_name = "inb13", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK1, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK1_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK1OUT_DVS0, + .vsel_mask = BUCK1OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK1CTRL, + .enable_mask = BUCK1_ENMODE_MASK, + .ramp_reg = PCA9450_REG_BUCK1CTRL, + .ramp_mask = BUCK1_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK1OUT_DVS0, + .run_mask = BUCK1OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK1OUT_DVS1, + .standby_mask = BUCK1OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK1CTRL, + .mode_mask = BUCK1_FPWM, + }, + }, + { + .desc = { + .name = "buck2", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK2, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK2_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK2OUT_DVS0, + .vsel_mask = BUCK2OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK2CTRL, + .enable_mask = BUCK2_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ_STBYREQ, + .ramp_reg = PCA9450_REG_BUCK2CTRL, + .ramp_mask = BUCK2_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK2OUT_DVS0, + .run_mask = BUCK2OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK2OUT_DVS1, + .standby_mask = BUCK2OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK2CTRL, + .mode_mask = BUCK2_FPWM, + }, + }, + { + .desc = { + .name = "buck3", + .supply_name = "inb13", + .of_match = of_match_ptr("BUCK3"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK3, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK3_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK3OUT_DVS0, + .vsel_mask = BUCK3OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK3CTRL, + .enable_mask = BUCK3_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .ramp_reg = PCA9450_REG_BUCK3CTRL, + .ramp_mask = BUCK3_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK3OUT_DVS0, + .run_mask = BUCK3OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK3OUT_DVS1, + .standby_mask = BUCK3OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK3CTRL, + .mode_mask = BUCK3_FPWM, + }, + }, + { + .desc = { + .name = "buck4", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK4, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK4_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK4OUT, + .vsel_mask = BUCK4OUT_MASK, + .enable_reg = PCA9450_REG_BUCK4CTRL, + .enable_mask = BUCK4_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK4CTRL, + .mode_mask = BUCK4_FPWM, + }, + }, + { + .desc = { + .name = "buck5", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK5, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK5_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK5OUT, + .vsel_mask = BUCK5OUT_MASK, + .enable_reg = PCA9450_REG_BUCK5CTRL, + .enable_mask = BUCK5_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK5CTRL, + .mode_mask = BUCK5_FPWM, + }, + }, + { + .desc = { + .name = "buck6", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK6, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK6_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK6OUT, + .vsel_mask = BUCK6OUT_MASK, + .enable_reg = PCA9450_REG_BUCK6CTRL, + .enable_mask = BUCK6_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK6CTRL, + .mode_mask = BUCK6_FPWM, + }, + }, + { + .desc = { + .name = "ldo1", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO1, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO1_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo1_volts), + .vsel_reg = PCA9450_REG_LDO1CTRL, + .vsel_mask = LDO1OUT_MASK, + .enable_reg = PCA9450_REG_LDO1CTRL, + .enable_mask = LDO1_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo2", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO2, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO2_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo2_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo2_volts), + .vsel_reg = PCA9450_REG_LDO2CTRL, + .vsel_mask = LDO2OUT_MASK, + .enable_reg = PCA9450_REG_LDO2CTRL, + .enable_mask = LDO2_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo3", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO3, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO3_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO3CTRL, + .vsel_mask = LDO3OUT_MASK, + .enable_reg = PCA9450_REG_LDO3CTRL, + .enable_mask = LDO3_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo4", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO4, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO4_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO4CTRL, + .vsel_mask = LDO4OUT_MASK, + .enable_reg = PCA9450_REG_LDO4CTRL, + .enable_mask = LDO4_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo5", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO5, + .ops = &pca9450_ldo5_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO5_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo5_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo5_volts), + .vsel_reg = PCA9450_REG_LDO5CTRL_H, + .vsel_mask = LDO5HOUT_MASK, + .enable_reg = PCA9450_REG_LDO5CTRL_L, + .enable_mask = LDO5H_EN_MASK, + .owner = THIS_MODULE, + }, + }, +}; + +/* + * Buck3 removed on PCA9450B and connected with Buck1 internal for dual phase + * on PCA9450C as no Buck3. + */ +static struct pca9450_regulator_desc pca9450bc_regulators[] = { + { + .desc = { + .name = "buck1", + .supply_name = "inb13", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK1, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK1_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK1OUT_DVS0, + .vsel_mask = BUCK1OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK1CTRL, + .enable_mask = BUCK1_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .ramp_reg = PCA9450_REG_BUCK1CTRL, + .ramp_mask = BUCK1_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK1OUT_DVS0, + .run_mask = BUCK1OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK1OUT_DVS1, + .standby_mask = BUCK1OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK1CTRL, + .mode_mask = BUCK1_FPWM, + }, + }, + { + .desc = { + .name = "buck2", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK2, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK2_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK2OUT_DVS0, + .vsel_mask = BUCK2OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK2CTRL, + .enable_mask = BUCK2_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ_STBYREQ, + .ramp_reg = PCA9450_REG_BUCK2CTRL, + .ramp_mask = BUCK2_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK2OUT_DVS0, + .run_mask = BUCK2OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK2OUT_DVS1, + .standby_mask = BUCK2OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK2CTRL, + .mode_mask = BUCK2_FPWM, + }, + }, + { + .desc = { + .name = "buck4", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK4, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK4_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK4OUT, + .vsel_mask = BUCK4OUT_MASK, + .enable_reg = PCA9450_REG_BUCK4CTRL, + .enable_mask = BUCK4_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK4CTRL, + .mode_mask = BUCK4_FPWM, + }, + }, + { + .desc = { + .name = "buck5", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK5, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK5_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK5OUT, + .vsel_mask = BUCK5OUT_MASK, + .enable_reg = PCA9450_REG_BUCK5CTRL, + .enable_mask = BUCK5_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK5CTRL, + .mode_mask = BUCK5_FPWM, + }, + }, + { + .desc = { + .name = "buck6", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK6, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK6_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK6OUT, + .vsel_mask = BUCK6OUT_MASK, + .enable_reg = PCA9450_REG_BUCK6CTRL, + .enable_mask = BUCK6_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK6CTRL, + .mode_mask = BUCK6_FPWM, + }, + }, + { + .desc = { + .name = "ldo1", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO1, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO1_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo1_volts), + .vsel_reg = PCA9450_REG_LDO1CTRL, + .vsel_mask = LDO1OUT_MASK, + .enable_reg = PCA9450_REG_LDO1CTRL, + .enable_mask = LDO1_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo2", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO2, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO2_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo2_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo2_volts), + .vsel_reg = PCA9450_REG_LDO2CTRL, + .vsel_mask = LDO2OUT_MASK, + .enable_reg = PCA9450_REG_LDO2CTRL, + .enable_mask = LDO2_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo3", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO3, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO3_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO3CTRL, + .vsel_mask = LDO3OUT_MASK, + .enable_reg = PCA9450_REG_LDO3CTRL, + .enable_mask = LDO3_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo4", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO4, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO4_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO4CTRL, + .vsel_mask = LDO4OUT_MASK, + .enable_reg = PCA9450_REG_LDO4CTRL, + .enable_mask = LDO4_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo5", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO5, + .ops = &pca9450_ldo5_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO5_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo5_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo5_volts), + .vsel_reg = PCA9450_REG_LDO5CTRL_H, + .vsel_mask = LDO5HOUT_MASK, + .enable_reg = PCA9450_REG_LDO5CTRL_L, + .enable_mask = LDO5H_EN_MASK, + .owner = THIS_MODULE, + }, + }, +}; + +static struct pca9450_regulator_desc pca9451a_regulators[] = { + { + .desc = { + .name = "buck1", + .supply_name = "inb13", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK1, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK1_VOLTAGE_NUM, + .linear_ranges = pca9451a_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9451a_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK1OUT_DVS0, + .vsel_mask = BUCK1OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK1CTRL, + .enable_mask = BUCK1_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .ramp_mask = BUCK1_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK1OUT_DVS0, + .run_mask = BUCK1OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK1OUT_DVS1, + .standby_mask = BUCK1OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK1CTRL, + .mode_mask = BUCK1_FPWM, + }, + }, + { + .desc = { + .name = "buck2", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK2, + .ops = &pca9450_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK2_VOLTAGE_NUM, + .linear_ranges = pca9450_dvs_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts), + .vsel_reg = PCA9450_REG_BUCK2OUT_DVS0, + .vsel_mask = BUCK2OUT_DVS0_MASK, + .enable_reg = PCA9450_REG_BUCK2CTRL, + .enable_mask = BUCK2_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ_STBYREQ, + .ramp_mask = BUCK2_RAMP_MASK, + .ramp_delay_table = pca9450_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pca9450_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pca9450_set_dvs_levels, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .run_reg = PCA9450_REG_BUCK2OUT_DVS0, + .run_mask = BUCK2OUT_DVS0_MASK, + .standby_reg = PCA9450_REG_BUCK2OUT_DVS1, + .standby_mask = BUCK2OUT_DVS1_MASK, + .mode_reg = PCA9450_REG_BUCK2CTRL, + .mode_mask = BUCK2_FPWM, + }, + }, + { + .desc = { + .name = "buck4", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK4, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK4_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK4OUT, + .vsel_mask = BUCK4OUT_MASK, + .enable_reg = PCA9450_REG_BUCK4CTRL, + .enable_mask = BUCK4_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK4CTRL, + .mode_mask = BUCK4_FPWM, + }, + }, + { + .desc = { + .name = "buck5", + .supply_name = "inb45", + .of_match = of_match_ptr("BUCK5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK5, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK5_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK5OUT, + .vsel_mask = BUCK5OUT_MASK, + .enable_reg = PCA9450_REG_BUCK5CTRL, + .enable_mask = BUCK5_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK5CTRL, + .mode_mask = BUCK5_FPWM, + }, + }, + { + .desc = { + .name = "buck6", + .supply_name = "inb26", + .of_match = of_match_ptr("BUCK6"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_BUCK6, + .ops = &pca9450_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_BUCK6_VOLTAGE_NUM, + .linear_ranges = pca9450_buck_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts), + .vsel_reg = PCA9450_REG_BUCK6OUT, + .vsel_mask = BUCK6OUT_MASK, + .enable_reg = PCA9450_REG_BUCK6CTRL, + .enable_mask = BUCK6_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + .of_map_mode = pca9450_map_mode, + }, + .dvs = { + .mode_reg = PCA9450_REG_BUCK6CTRL, + .mode_mask = BUCK6_FPWM, + }, + }, + { + .desc = { + .name = "ldo1", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO1, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO1_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo1_volts), + .vsel_reg = PCA9450_REG_LDO1CTRL, + .vsel_mask = LDO1OUT_MASK, + .enable_reg = PCA9450_REG_LDO1CTRL, + .enable_mask = LDO1_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo3", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO3"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO3, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO3_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO3CTRL, + .vsel_mask = LDO3OUT_MASK, + .enable_reg = PCA9450_REG_LDO3CTRL, + .enable_mask = LDO3_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo4", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO4"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO4, + .ops = &pca9450_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO4_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo34_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts), + .vsel_reg = PCA9450_REG_LDO4CTRL, + .vsel_mask = LDO4OUT_MASK, + .enable_reg = PCA9450_REG_LDO4CTRL, + .enable_mask = LDO4_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo5", + .supply_name = "inl1", + .of_match = of_match_ptr("LDO5"), + .regulators_node = of_match_ptr("regulators"), + .id = PCA9450_LDO5, + .ops = &pca9450_ldo5_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PCA9450_LDO5_VOLTAGE_NUM, + .linear_ranges = pca9450_ldo5_volts, + .n_linear_ranges = ARRAY_SIZE(pca9450_ldo5_volts), + .vsel_reg = PCA9450_REG_LDO5CTRL_H, + .vsel_mask = LDO5HOUT_MASK, + .enable_reg = PCA9450_REG_LDO5CTRL_L, + .enable_mask = LDO5H_EN_MASK, + .owner = THIS_MODULE, + }, + }, +}; + +static irqreturn_t pca9450_irq_handler(int irq, void *data) +{ + struct pca9450 *pca9450 = data; + struct regmap *regmap = pca9450->regmap; + unsigned int status; + int ret; + + ret = regmap_read(regmap, PCA9450_REG_INT1, &status); + if (ret < 0) { + dev_err(pca9450->dev, + "Failed to read INT1(%d)\n", ret); + return IRQ_NONE; + } + + if (status & IRQ_PWRON) + dev_warn(pca9450->dev, "PWRON interrupt.\n"); + + if (status & IRQ_WDOGB) + dev_warn(pca9450->dev, "WDOGB interrupt.\n"); + + if (status & IRQ_VR_FLT1) + dev_warn(pca9450->dev, "VRFLT1 interrupt.\n"); + + if (status & IRQ_VR_FLT2) + dev_warn(pca9450->dev, "VRFLT2 interrupt.\n"); + + if (status & IRQ_LOWVSYS) + dev_warn(pca9450->dev, "LOWVSYS interrupt.\n"); + + if (status & IRQ_THERM_105) + dev_warn(pca9450->dev, "IRQ_THERM_105 interrupt.\n"); + + if (status & IRQ_THERM_125) + dev_warn(pca9450->dev, "IRQ_THERM_125 interrupt.\n"); + + return IRQ_HANDLED; +} + +static int pca9450_i2c_restart_handler(struct sys_off_data *data) +{ + struct pca9450 *pca9450 = data->cb_data; + struct i2c_client *i2c = container_of(pca9450->dev, struct i2c_client, dev); + + dev_dbg(&i2c->dev, "Restarting device..\n"); + if (i2c_smbus_write_byte_data(i2c, PCA9450_REG_SWRST, SW_RST_COMMAND) == 0) { + /* tRESTART is 250ms, so 300 should be enough to make sure it happened */ + mdelay(300); + /* When we get here, the PMIC didn't power cycle for some reason. so warn.*/ + dev_warn(&i2c->dev, "Device didn't respond to restart command\n"); + } else { + dev_err(&i2c->dev, "Restart command failed\n"); + } + + return 0; +} + +static int pca9450_of_init(struct pca9450 *pca9450) +{ + struct i2c_client *i2c = container_of(pca9450->dev, struct i2c_client, dev); + int ret; + unsigned int val; + unsigned int reset_ctrl; + unsigned int rstb_deb_ctrl; + unsigned int t_on_deb, t_off_deb; + unsigned int t_on_step, t_off_step; + unsigned int t_restart; + + if (of_property_read_bool(i2c->dev.of_node, "nxp,wdog_b-warm-reset")) + reset_ctrl = WDOG_B_CFG_WARM; + else + reset_ctrl = WDOG_B_CFG_COLD_LDO12; + + /* Set reset behavior on assertion of WDOG_B signal */ + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL, + WDOG_B_CFG_MASK, reset_ctrl); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to set WDOG_B reset behavior\n"); + + ret = of_property_read_u32(i2c->dev.of_node, "npx,pmic-rst-b-debounce-ms", &val); + if (ret == -EINVAL) + rstb_deb_ctrl = T_PMIC_RST_DEB_50MS; + else if (ret) + return ret; + else { + switch (val) { + case 10: rstb_deb_ctrl = T_PMIC_RST_DEB_10MS; break; + case 50: rstb_deb_ctrl = T_PMIC_RST_DEB_50MS; break; + case 100: rstb_deb_ctrl = T_PMIC_RST_DEB_100MS; break; + case 500: rstb_deb_ctrl = T_PMIC_RST_DEB_500MS; break; + case 1000: rstb_deb_ctrl = T_PMIC_RST_DEB_1S; break; + case 2000: rstb_deb_ctrl = T_PMIC_RST_DEB_2S; break; + case 4000: rstb_deb_ctrl = T_PMIC_RST_DEB_4S; break; + case 8000: rstb_deb_ctrl = T_PMIC_RST_DEB_8S; break; + default: return -EINVAL; + } + } + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL, + T_PMIC_RST_DEB_MASK, rstb_deb_ctrl); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to set PMIC_RST_B debounce time\n"); + + ret = of_property_read_u32(i2c->dev.of_node, "nxp,pmic-on-req-on-debounce-us", &val); + if (ret == -EINVAL) + t_on_deb = T_ON_DEB_20MS; + else if (ret) + return ret; + else { + switch (val) { + case 120: t_on_deb = T_ON_DEB_120US; break; + case 20000: t_on_deb = T_ON_DEB_20MS; break; + case 100000: t_on_deb = T_ON_DEB_100MS; break; + case 750000: t_on_deb = T_ON_DEB_750MS; break; + default: return -EINVAL; + } + } + + ret = of_property_read_u32(i2c->dev.of_node, "nxp,pmic-on-req-off-debounce-us", &val); + if (ret == -EINVAL) + t_off_deb = pca9450->default_t_off_deb; + else if (ret) + return ret; + else { + switch (val) { + case 120: t_off_deb = T_OFF_DEB_120US; break; + case 2000: t_off_deb = T_OFF_DEB_2MS; break; + default: return -EINVAL; + } + } + + ret = of_property_read_u32(i2c->dev.of_node, "nxp,power-on-step-ms", &val); + if (ret == -EINVAL) + t_on_step = T_ON_STEP_2MS; + else if (ret) + return ret; + else { + switch (val) { + case 1: t_on_step = T_ON_STEP_1MS; break; + case 2: t_on_step = T_ON_STEP_2MS; break; + case 4: t_on_step = T_ON_STEP_4MS; break; + case 8: t_on_step = T_ON_STEP_8MS; break; + default: return -EINVAL; + } + } + + ret = of_property_read_u32(i2c->dev.of_node, "nxp,power-down-step-ms", &val); + if (ret == -EINVAL) + t_off_step = T_OFF_STEP_8MS; + else if (ret) + return ret; + else { + switch (val) { + case 2: t_off_step = T_OFF_STEP_2MS; break; + case 4: t_off_step = T_OFF_STEP_4MS; break; + case 8: t_off_step = T_OFF_STEP_8MS; break; + case 16: t_off_step = T_OFF_STEP_16MS; break; + default: return -EINVAL; + } + } + + ret = of_property_read_u32(i2c->dev.of_node, "nxp,restart-ms", &val); + if (ret == -EINVAL) + t_restart = T_RESTART_250MS; + else if (ret) + return ret; + else { + switch (val) { + case 250: t_restart = T_RESTART_250MS; break; + case 500: t_restart = T_RESTART_500MS; break; + default: return -EINVAL; + } + } + + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_PWRCTRL, + T_ON_DEB_MASK | T_OFF_DEB_MASK | T_ON_STEP_MASK | + T_OFF_STEP_MASK | T_RESTART_MASK, + t_on_deb | t_off_deb | t_on_step | + t_off_step | t_restart); + if (ret) + return dev_err_probe(&i2c->dev, ret, + "Failed to set PWR_CTRL debounce configuration\n"); + + if (of_property_read_bool(i2c->dev.of_node, "nxp,i2c-lt-enable")) { + /* Enable I2C Level Translator */ + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_CONFIG2, + I2C_LT_MASK, I2C_LT_ON_STANDBY_RUN); + if (ret) + return dev_err_probe(&i2c->dev, ret, + "Failed to enable I2C level translator\n"); + } + + return 0; +} + +static int pca9450_i2c_probe(struct i2c_client *i2c) +{ + enum pca9450_chip_type type = (unsigned int)(uintptr_t) + of_device_get_match_data(&i2c->dev); + const struct pca9450_regulator_desc *regulator_desc; + struct regulator_config config = { }; + struct regulator_dev *ldo5; + struct pca9450 *pca9450; + unsigned int device_id, i; + const char *type_name; + int ret; + + pca9450 = devm_kzalloc(&i2c->dev, sizeof(struct pca9450), GFP_KERNEL); + if (!pca9450) + return -ENOMEM; + + switch (type) { + case PCA9450_TYPE_PCA9450A: + regulator_desc = pca9450a_regulators; + pca9450->rcnt = ARRAY_SIZE(pca9450a_regulators); + pca9450->default_t_off_deb = T_OFF_DEB_120US; + type_name = "pca9450a"; + break; + case PCA9450_TYPE_PCA9450BC: + regulator_desc = pca9450bc_regulators; + pca9450->rcnt = ARRAY_SIZE(pca9450bc_regulators); + pca9450->default_t_off_deb = T_OFF_DEB_120US; + type_name = "pca9450bc"; + break; + case PCA9450_TYPE_PCA9451A: + regulator_desc = pca9451a_regulators; + pca9450->rcnt = ARRAY_SIZE(pca9451a_regulators); + pca9450->default_t_off_deb = T_OFF_DEB_2MS; + type_name = "pca9451a"; + break; + case PCA9450_TYPE_PCA9452: + regulator_desc = pca9451a_regulators; + pca9450->rcnt = ARRAY_SIZE(pca9451a_regulators); + pca9450->default_t_off_deb = T_OFF_DEB_2MS; + type_name = "pca9452"; + break; + default: + dev_err(&i2c->dev, "Unknown device type"); + return -EINVAL; + } + + pca9450->irq = i2c->irq; + pca9450->type = type; + pca9450->dev = &i2c->dev; + + dev_set_drvdata(&i2c->dev, pca9450); + + pca9450->regmap = devm_regmap_init_i2c(i2c, + &pca9450_regmap_config); + if (IS_ERR(pca9450->regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(pca9450->regmap), + "regmap initialization failed\n"); + + ret = regmap_read(pca9450->regmap, PCA9450_REG_DEV_ID, &device_id); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Read device id error\n"); + + /* Check your board and dts for match the right pmic */ + if (((device_id >> 4) != 0x1 && type == PCA9450_TYPE_PCA9450A) || + ((device_id >> 4) != 0x3 && type == PCA9450_TYPE_PCA9450BC) || + ((device_id >> 4) != 0x9 && type == PCA9450_TYPE_PCA9451A) || + ((device_id >> 4) != 0x9 && type == PCA9450_TYPE_PCA9452)) + return dev_err_probe(&i2c->dev, -EINVAL, + "Device id(%x) mismatched\n", device_id >> 4); + + for (i = 0; i < pca9450->rcnt; i++) { + const struct regulator_desc *desc; + struct regulator_dev *rdev; + const struct pca9450_regulator_desc *r; + + r = ®ulator_desc[i]; + desc = &r->desc; + + if (type == PCA9450_TYPE_PCA9451A && !strcmp(desc->name, "ldo3")) + continue; + + config.regmap = pca9450->regmap; + config.dev = pca9450->dev; + config.driver_data = pca9450; + + rdev = devm_regulator_register(pca9450->dev, desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(pca9450->dev, PTR_ERR(rdev), + "Failed to register regulator(%s)\n", desc->name); + + if (!strcmp(desc->name, "ldo5")) + ldo5 = rdev; + } + + if (pca9450->irq) { + ret = devm_request_threaded_irq(pca9450->dev, pca9450->irq, NULL, + pca9450_irq_handler, + (IRQF_TRIGGER_LOW | IRQF_ONESHOT), + "pca9450-irq", pca9450); + if (ret != 0) + return dev_err_probe(pca9450->dev, ret, "Failed to request IRQ: %d\n", + pca9450->irq); + + /* Unmask all interrupt except PWRON/WDOG/RSVD */ + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_INT1_MSK, + IRQ_VR_FLT1 | IRQ_VR_FLT2 | IRQ_LOWVSYS | + IRQ_THERM_105 | IRQ_THERM_125, + IRQ_PWRON | IRQ_WDOGB | IRQ_RSVD); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + } + + /* Clear PRESET_EN bit in BUCK123_DVS to use DVS registers */ + ret = regmap_clear_bits(pca9450->regmap, PCA9450_REG_BUCK123_DVS, + BUCK123_PRESET_EN); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to clear PRESET_EN bit\n"); + + ret = pca9450_of_init(pca9450); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unable to parse OF data\n"); + + /* + * For LDO5 we need to be able to check the status of the SD_VSEL input in + * order to know which control register is used. Most boards connect SD_VSEL + * to the VSELECT signal, so we can use the GPIO that is internally routed + * to this signal (if SION bit is set in IOMUX). + */ + pca9450->sd_vsel_gpio = gpiod_get_optional(&ldo5->dev, "sd-vsel", GPIOD_IN); + if (IS_ERR(pca9450->sd_vsel_gpio)) + return dev_err_probe(&i2c->dev, PTR_ERR(pca9450->sd_vsel_gpio), + "Failed to get SD_VSEL GPIO\n"); + + pca9450->sd_vsel_fixed_low = + of_property_read_bool(ldo5->dev.of_node, "nxp,sd-vsel-fixed-low"); + + if (devm_register_sys_off_handler(&i2c->dev, SYS_OFF_MODE_RESTART, + PCA9450_RESTART_HANDLER_PRIORITY, + pca9450_i2c_restart_handler, pca9450)) + dev_warn(&i2c->dev, "Failed to register restart handler\n"); + + dev_info(&i2c->dev, "%s probed.\n", type_name); + + return 0; +} + +static const struct of_device_id pca9450_of_match[] = { + { + .compatible = "nxp,pca9450a", + .data = (void *)PCA9450_TYPE_PCA9450A, + }, + { + .compatible = "nxp,pca9450b", + .data = (void *)PCA9450_TYPE_PCA9450BC, + }, + { + .compatible = "nxp,pca9450c", + .data = (void *)PCA9450_TYPE_PCA9450BC, + }, + { + .compatible = "nxp,pca9451a", + .data = (void *)PCA9450_TYPE_PCA9451A, + }, + { + .compatible = "nxp,pca9452", + .data = (void *)PCA9450_TYPE_PCA9452, + }, + { } +}; +MODULE_DEVICE_TABLE(of, pca9450_of_match); + +static struct i2c_driver pca9450_i2c_driver = { + .driver = { + .name = "nxp-pca9450", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = pca9450_of_match, + }, + .probe = pca9450_i2c_probe, +}; + +module_i2c_driver(pca9450_i2c_driver); + +MODULE_AUTHOR("Robin Gong "); +MODULE_DESCRIPTION("NXP PCA9450 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pf0900-regulator.c b/drivers/regulator/pf0900-regulator.c new file mode 100644 index 000000000..5c44d2dbc --- /dev/null +++ b/drivers/regulator/pf0900-regulator.c @@ -0,0 +1,975 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright 2025 NXP. +// NXP PF0900 pmic driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum pf0900_regulators { + PF0900_SW1 = 0, + PF0900_SW2, + PF0900_SW3, + PF0900_SW4, + PF0900_SW5, + PF0900_LDO1, + PF0900_LDO2, + PF0900_LDO3, + PF0900_VAON, + PF0900_REGULATOR_CNT, +}; + +enum { + PF0900_DVS_LEVEL_RUN = 0, + PF0900_DVS_LEVEL_STANDBY, + PF0900_DVS_LEVEL_MAX, +}; + + +#define PF0900_VAON_VOLTAGE_NUM 0x03 +#define PF0900_SW_VOLTAGE_NUM 0x100 +#define PF0900_LDO_VOLTAGE_NUM 0x20 + +#define REGU_SW_CNT 0x5 +#define REGU_LDO_VAON_CNT 0x4 + +enum { + PF0900_REG_DEV_ID = 0x00, + PF0900_REG_DEV_FAM = 0x01, + PF0900_REG_REV_ID = 0x02, + PF0900_REG_PROG_ID1 = 0x03, + PF0900_REG_PROG_ID2 = 0x04, + PF0900_REG_SYSTEM_INT = 0x05, + PF0900_REG_STATUS1_INT = 0x06, + PF0900_REG_STATUS1_MSK = 0x07, + PF0900_REG_STATUS1_SNS = 0x08, + PF0900_REG_STATUS2_INT = 0x09, + PF0900_REG_STATUS2_MSK = 0x0A, + PF0900_REG_STATUS2_SNS = 0x0B, + PF0900_REG_STATUS3_INT = 0x0C, + PF0900_REG_STATUS3_MSK = 0x0D, + PF0900_REG_SW_MODE_INT = 0x0E, + PF0900_REG_SW_MODE_MSK = 0x0F, + PF0900_REG_SW_ILIM_INT = 0x10, + PF0900_REG_SW_ILIM_MSK = 0x11, + PF0900_REG_SW_ILIM_SNS = 0x12, + PF0900_REG_LDO_ILIM_INT = 0x13, + PF0900_REG_LDO_ILIM_MSK = 0x14, + PF0900_REG_LDO_ILIM_SNS = 0x15, + PF0900_REG_SW_UV_INT = 0x16, + PF0900_REG_SW_UV_MSK = 0x17, + PF0900_REG_SW_UV_SNS = 0x18, + PF0900_REG_SW_OV_INT = 0x19, + PF0900_REG_SW_OV_MSK = 0x1A, + PF0900_REG_SW_OV_SNS = 0x1B, + PF0900_REG_LDO_UV_INT = 0x1C, + PF0900_REG_LDO_UV_MSK = 0x1D, + PF0900_REG_LDO_UV_SNS = 0x1E, + PF0900_REG_LDO_OV_INT = 0x1F, + PF0900_REG_LDO_OV_MSK = 0x20, + PF0900_REG_LDO_OV_SNS = 0x21, + PF0900_REG_PWRON_INT = 0x22, + PF0900_REG_IO_INT = 0x24, + PF0900_REG_IO_MSK = 0x25, + PF0900_REG_IO_SNS = 0x26, + PF0900_REG_IOSHORT_SNS = 0x27, + PF0900_REG_ABIST_OV1 = 0x28, + PF0900_REG_ABIST_OV2 = 0x29, + PF0900_REG_ABIST_UV1 = 0x2A, + PF0900_REG_ABIST_UV2 = 0x2B, + PF0900_REG_ABIST_IO = 0x2C, + PF0900_REG_TEST_FLAGS = 0x2D, + PF0900_REG_HFAULT_FLAGS = 0x2E, + PF0900_REG_FAULT_FLAGS = 0x2F, + PF0900_REG_FS0B_CFG = 0x30, + PF0900_REG_FCCU_CFG = 0x31, + PF0900_REG_RSTB_CFG1 = 0x32, + PF0900_REG_SYSTEM_CMD = 0x33, + PF0900_REG_FS0B_CMD = 0x34, + PF0900_REG_SECURE_WR1 = 0x35, + PF0900_REG_SECURE_WR2 = 0x36, + PF0900_REG_VMON_CFG1 = 0x37, + PF0900_REG_SYS_CFG1 = 0x38, + PF0900_REG_GPO_CFG = 0x39, + PF0900_REG_GPO_CTRL = 0x3A, + PF0900_REG_PWRUP_CFG = 0x3B, + PF0900_REG_RSTB_PWRUP = 0x3C, + PF0900_REG_GPIO1_PWRUP = 0x3D, + PF0900_REG_GPIO2_PWRUP = 0x3E, + PF0900_REG_GPIO3_PWRUP = 0x3F, + PF0900_REG_GPIO4_PWRUP = 0x40, + PF0900_REG_VMON1_PWRUP = 0x41, + PF0900_REG_VMON2_PWRUP = 0x42, + PF0900_REG_SW1_PWRUP = 0x43, + PF0900_REG_SW2_PWRUP = 0x44, + PF0900_REG_SW3_PWRUP = 0x45, + PF0900_REG_SW4_PWRUP = 0x46, + PF0900_REG_SW5_PWRUP = 0x47, + PF0900_REG_LDO1_PWRUP = 0x48, + PF0900_REG_LDO2_PWRUP = 0x49, + PF0900_REG_LDO3_PWRUP = 0x4A, + PF0900_REG_VAON_PWRUP = 0x4B, + PF0900_REG_FREQ_CTRL = 0x4C, + PF0900_REG_PWRON_CFG = 0x4D, + PF0900_REG_WD_CTRL1 = 0x4E, + PF0900_REG_WD_CTRL2 = 0x4F, + PF0900_REG_WD_CFG1 = 0x50, + PF0900_REG_WD_CFG2 = 0x51, + PF0900_REG_WD_CNT1 = 0x52, + PF0900_REG_WD_CNT2 = 0x53, + PF0900_REG_FAULT_CFG = 0x54, + PF0900_REG_FAULT_CNT = 0x55, + PF0900_REG_DFS_CNT = 0x56, + PF0900_REG_AMUX_CFG = 0x57, + PF0900_REG_VMON1_RUN_CFG = 0x58, + PF0900_REG_VMON1_STBY_CFG = 0x59, + PF0900_REG_VMON1_CTRL = 0x5A, + PF0900_REG_VMON2_RUN_CFG = 0x5B, + PF0900_REG_VMON2_STBY_CFG = 0x5C, + PF0900_REG_VMON2_CTRL = 0x5D, + PF0900_REG_SW1_VRUN = 0x5E, + PF0900_REG_SW1_VSTBY = 0x5F, + PF0900_REG_SW1_MODE = 0x60, + PF0900_REG_SW1_CFG1 = 0x61, + PF0900_REG_SW1_CFG2 = 0x62, + PF0900_REG_SW2_VRUN = 0x63, + PF0900_REG_SW2_VSTBY = 0x64, + PF0900_REG_SW2_MODE = 0x65, + PF0900_REG_SW2_CFG1 = 0x66, + PF0900_REG_SW2_CFG2 = 0x67, + PF0900_REG_SW3_VRUN = 0x68, + PF0900_REG_SW3_VSTBY = 0x69, + PF0900_REG_SW3_MODE = 0x6A, + PF0900_REG_SW3_CFG1 = 0x6B, + PF0900_REG_SW3_CFG2 = 0x6C, + PF0900_REG_SW4_VRUN = 0x6D, + PF0900_REG_SW4_VSTBY = 0x6E, + PF0900_REG_SW4_MODE = 0x6F, + PF0900_REG_SW4_CFG1 = 0x70, + PF0900_REG_SW4_CFG2 = 0x71, + PF0900_REG_SW5_VRUN = 0x72, + PF0900_REG_SW5_VSTBY = 0x73, + PF0900_REG_SW5_MODE = 0x74, + PF0900_REG_SW5_CFG1 = 0x75, + PF0900_REG_SW5_CFG2 = 0x76, + PF0900_REG_LDO1_RUN = 0x77, + PF0900_REG_LDO1_STBY = 0x78, + PF0900_REG_LDO1_CFG2 = 0x79, + PF0900_REG_LDO2_RUN = 0x7A, + PF0900_REG_LDO2_STBY = 0x7B, + PF0900_REG_LDO2_CFG2 = 0x7C, + PF0900_REG_LDO3_RUN = 0x7D, + PF0900_REG_LDO3_STBY = 0x7E, + PF0900_REG_LDO3_CFG2 = 0x7F, + PF0900_REG_VAON_CFG1 = 0x80, + PF0900_REG_VAON_CFG2 = 0x81, + PF0900_REG_SYS_DIAG = 0x82, + PF0900_MAX_REGISTER, +}; + +/* PF0900 SW MODE */ +#define SW_RUN_MODE_OFF 0x00 +#define SW_RUN_MODE_PWM 0x01 +#define SW_RUN_MODE_PFM 0x02 +#define SW_STBY_MODE_OFF 0x00 +#define SW_STBY_MODE_PWM 0x04 +#define SW_STBY_MODE_PFM 0x08 + +/* PF0900 SW MODE MASK */ +#define SW_RUN_MODE_MASK GENMASK(1, 0) +#define SW_STBY_MODE_MASK GENMASK(3, 2) + +/* PF0900 SW VRUN/VSTBY MASK */ +#define PF0900_SW_VOL_MASK GENMASK(7, 0) + +/* PF0900_REG_VAON_CFG1 bits */ +#define PF0900_VAON_1P8V 0x01 + +#define PF0900_VAON_MASK GENMASK(1, 0) + +/* PF0900_REG_SWX_CFG1 MASK */ +#define PF0900_SW_DVS_MASK GENMASK(4, 3) + +/* PF0900_REG_LDO_RUN MASK */ +#define VLDO_RUN_MASK GENMASK(4, 0) +#define LDO_RUN_EN_MASK BIT(5) + +/* PF0900_REG_STATUS1_INT bits */ +#define PF0900_IRQ_PWRUP BIT(3) + +/* PF0900_REG_ILIM_INT bits */ +#define PF0900_IRQ_SW1_IL BIT(0) +#define PF0900_IRQ_SW2_IL BIT(1) +#define PF0900_IRQ_SW3_IL BIT(2) +#define PF0900_IRQ_SW4_IL BIT(3) +#define PF0900_IRQ_SW5_IL BIT(4) + +#define PF0900_IRQ_LDO1_IL BIT(0) +#define PF0900_IRQ_LDO2_IL BIT(1) +#define PF0900_IRQ_LDO3_IL BIT(2) + +/* PF0900_REG_UV_INT bits */ +#define PF0900_IRQ_SW1_UV BIT(0) +#define PF0900_IRQ_SW2_UV BIT(1) +#define PF0900_IRQ_SW3_UV BIT(2) +#define PF0900_IRQ_SW4_UV BIT(3) +#define PF0900_IRQ_SW5_UV BIT(4) + +#define PF0900_IRQ_LDO1_UV BIT(0) +#define PF0900_IRQ_LDO2_UV BIT(1) +#define PF0900_IRQ_LDO3_UV BIT(2) +#define PF0900_IRQ_VAON_UV BIT(3) + +/* PF0900_REG_OV_INT bits */ +#define PF0900_IRQ_SW1_OV BIT(0) +#define PF0900_IRQ_SW2_OV BIT(1) +#define PF0900_IRQ_SW3_OV BIT(2) +#define PF0900_IRQ_SW4_OV BIT(3) +#define PF0900_IRQ_SW5_OV BIT(4) + +#define PF0900_IRQ_LDO1_OV BIT(0) +#define PF0900_IRQ_LDO2_OV BIT(1) +#define PF0900_IRQ_LDO3_OV BIT(2) +#define PF0900_IRQ_VAON_OV BIT(3) + +struct pf0900_regulator_desc { + struct regulator_desc desc; + unsigned int suspend_enable_mask; + unsigned int suspend_voltage_reg; + unsigned int suspend_voltage_cache; +}; + +struct pf0900_drvdata { + const struct pf0900_regulator_desc *desc; + unsigned int rcnt; +}; + +struct pf0900 { + struct device *dev; + struct regmap *regmap; + const struct pf0900_drvdata *drvdata; + struct regulator_dev *rdevs[PF0900_REGULATOR_CNT]; + int irq; + unsigned short addr; + bool crc_en; +}; + +enum pf0900_regulator_type { + PF0900_SW = 0, + PF0900_LDO, +}; + +#define PF0900_REGU_IRQ(_reg, _type, _event) \ + { \ + .reg = _reg, \ + .type = _type, \ + .event = _event, \ + } + +struct pf0900_regulator_irq { + unsigned int reg; + unsigned int type; + unsigned int event; +}; + +static const struct regmap_range pf0900_range = { + .range_min = PF0900_REG_DEV_ID, + .range_max = PF0900_REG_SYS_DIAG, +}; + +static const struct regmap_access_table pf0900_volatile_regs = { + .yes_ranges = &pf0900_range, + .n_yes_ranges = 1, +}; + +static const struct regmap_config pf0900_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &pf0900_volatile_regs, + .max_register = PF0900_MAX_REGISTER - 1, + .cache_type = REGCACHE_MAPLE, +}; + +static uint8_t crc8_j1850(unsigned short addr, unsigned int reg, + unsigned int val) +{ + uint8_t crcBuf[3]; + uint8_t t_crc; + uint8_t i, j; + + crcBuf[0] = addr; + crcBuf[1] = reg; + crcBuf[2] = val; + t_crc = 0xFF; + + /* + * The CRC calculation is based on the standard CRC-8-SAE as + * defined in the SAE-J1850 specification with the following + * characteristics. + * Polynomial = 0x1D + * Initial Value = 0xFF + * The CRC byte is calculated by shifting 24-bit data through + * the CRC polynomial.The 24-bits package is built as follows: + * DEVICE_ADDR[b8] + REGISTER_ADDR [b8] +DATA[b8] + * The DEVICE_ADDR is calculated as the 7-bit slave address + * shifted left one space plus the corresponding read/write bit. + * (7Bit Address [b7] << 1 ) + R/W = DEVICE_ADDR[b8] + */ + for (i = 0; i < sizeof(crcBuf); i++) { + t_crc ^= crcBuf[i]; + for (j = 0; j < 8; j++) { + if ((t_crc & 0x80) != 0) { + t_crc <<= 1; + t_crc ^= 0x1D; + } else { + t_crc <<= 1; + } + } + } + + return t_crc; +} + +static int pf0900_regmap_read(void *context, unsigned int reg, + unsigned int *val) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + struct pf0900 *pf0900 = dev_get_drvdata(dev); + int ret; + u8 crc; + + if (!pf0900 || !pf0900->dev) + return -EINVAL; + + if (reg >= PF0900_MAX_REGISTER) { + dev_err(pf0900->dev, "Invalid register address: 0x%x\n", reg); + return -EINVAL; + } + + if (pf0900->crc_en) { + ret = i2c_smbus_read_word_data(i2c, reg); + if (ret < 0) { + dev_err(pf0900->dev, "Read error at reg=0x%x: %d\n", reg, ret); + return ret; + } + + *val = (u16)ret; + crc = crc8_j1850(pf0900->addr << 1 | 0x1, reg, FIELD_GET(GENMASK(7, 0), *val)); + if (crc != FIELD_GET(GENMASK(15, 8), *val)) { + dev_err(pf0900->dev, "Crc check error!\n"); + return -EINVAL; + } + *val = FIELD_GET(GENMASK(7, 0), *val); + } else { + ret = i2c_smbus_read_byte_data(i2c, reg); + if (ret < 0) { + dev_err(pf0900->dev, "Read error at reg=0x%x: %d\n", reg, ret); + return ret; + } + *val = ret; + } + + return 0; +} + +static int pf0900_regmap_write(void *context, unsigned int reg, + unsigned int val) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + struct pf0900 *pf0900 = dev_get_drvdata(dev); + uint8_t data[2]; + int ret; + + if (!pf0900 || !pf0900->dev) + return -EINVAL; + + if (reg >= PF0900_MAX_REGISTER) { + dev_err(pf0900->dev, "Invalid register address: 0x%x\n", reg); + return -EINVAL; + } + + data[0] = val; + if (pf0900->crc_en) { + /* Get CRC */ + data[1] = crc8_j1850(pf0900->addr << 1, reg, data[0]); + val = FIELD_PREP(GENMASK(15, 8), data[1]) | data[0]; + ret = i2c_smbus_write_word_data(i2c, reg, val); + } else { + ret = i2c_smbus_write_byte_data(i2c, reg, data[0]); + } + + if (ret) { + dev_err(pf0900->dev, "Write reg=0x%x error!\n", reg); + return ret; + } + + return 0; +} + +static int pf0900_suspend_enable(struct regulator_dev *rdev) +{ + struct pf0900_regulator_desc *rdata = rdev_get_drvdata(rdev); + struct regmap *rmap = rdev_get_regmap(rdev); + + return regmap_update_bits(rmap, rdata->desc.enable_reg, + rdata->suspend_enable_mask, SW_STBY_MODE_PFM); +} + +static int pf0900_suspend_disable(struct regulator_dev *rdev) +{ + struct pf0900_regulator_desc *rdata = rdev_get_drvdata(rdev); + struct regmap *rmap = rdev_get_regmap(rdev); + + return regmap_update_bits(rmap, rdata->desc.enable_reg, + rdata->suspend_enable_mask, SW_STBY_MODE_OFF); +} + +static int pf0900_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct pf0900_regulator_desc *rdata = rdev_get_drvdata(rdev); + struct regmap *rmap = rdev_get_regmap(rdev); + int ret; + + if (rdata->suspend_voltage_cache == uV) + return 0; + + ret = regulator_map_voltage_iterate(rdev, uV, uV); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to map %i uV\n", uV); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), "uV: %i, reg: 0x%x, msk: 0x%x, val: 0x%x\n", + uV, rdata->suspend_voltage_reg, rdata->desc.vsel_mask, ret); + ret = regmap_update_bits(rmap, rdata->suspend_voltage_reg, + rdata->desc.vsel_mask, ret); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to set %i uV\n", uV); + return ret; + } + + rdata->suspend_voltage_cache = uV; + + return 0; +} + +static const struct regmap_bus pf0900_regmap_bus = { + .reg_read = pf0900_regmap_read, + .reg_write = pf0900_regmap_write, +}; + +static const struct regulator_ops pf0900_avon_regulator_ops = { + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops pf0900_dvs_sw_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_enable = pf0900_suspend_enable, + .set_suspend_disable = pf0900_suspend_disable, + .set_suspend_voltage = pf0900_set_suspend_voltage, +}; + +static const struct regulator_ops pf0900_ldo_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +/* + * SW1/2/3/4/5 + * SW1_DVS[1:0] SW1 DVS ramp rate setting + * 00: 15.6mV/8usec + * 01: 15.6mV/4usec + * 10: 15.6mV/2usec + * 11: 15.6mV/1usec + */ +static const unsigned int pf0900_dvs_sw_ramp_table[] = { + 1950, 3900, 7800, 15600 +}; + +/* VAON 1.8V, 3.0V, or 3.3V */ +static const int pf0900_vaon_voltages[] = { + 0, 1800000, 3000000, 3300000, +}; + +/* + * SW1 0.5V to 3.3V + * 0.5V to 1.35V (6.25mV step) + * 1.8V to 2.5V (125mV step) + * 2.8V to 3.3V (250mV step) + */ +static const struct linear_range pf0900_dvs_sw1_volts[] = { + REGULATOR_LINEAR_RANGE(0, 0x00, 0x08, 0), + REGULATOR_LINEAR_RANGE(500000, 0x09, 0x91, 6250), + REGULATOR_LINEAR_RANGE(0, 0x92, 0x9E, 0), + REGULATOR_LINEAR_RANGE(1500000, 0x9F, 0x9F, 0), + REGULATOR_LINEAR_RANGE(1800000, 0xA0, 0xD8, 12500), + REGULATOR_LINEAR_RANGE(0, 0xD9, 0xDF, 0), + REGULATOR_LINEAR_RANGE(2800000, 0xE0, 0xF4, 25000), + REGULATOR_LINEAR_RANGE(0, 0xF5, 0xFF, 0), +}; + +/* + * SW2/3/4/5 0.3V to 3.3V + * 0.45V to 1.35V (6.25mV step) + * 1.8V to 2.5V (125mV step) + * 2.8V to 3.3V (250mV step) + */ +static const struct linear_range pf0900_dvs_sw2345_volts[] = { + REGULATOR_LINEAR_RANGE(300000, 0x00, 0x00, 0), + REGULATOR_LINEAR_RANGE(450000, 0x01, 0x91, 6250), + REGULATOR_LINEAR_RANGE(0, 0x92, 0x9E, 0), + REGULATOR_LINEAR_RANGE(1500000, 0x9F, 0x9F, 0), + REGULATOR_LINEAR_RANGE(1800000, 0xA0, 0xD8, 12500), + REGULATOR_LINEAR_RANGE(0, 0xD9, 0xDF, 0), + REGULATOR_LINEAR_RANGE(2800000, 0xE0, 0xF4, 25000), + REGULATOR_LINEAR_RANGE(0, 0xF5, 0xFF, 0), +}; + +/* + * LDO1 + * 0.75V to 3.3V + */ +static const struct linear_range pf0900_ldo1_volts[] = { + REGULATOR_LINEAR_RANGE(750000, 0x00, 0x0F, 50000), + REGULATOR_LINEAR_RANGE(1800000, 0x10, 0x1F, 100000), +}; + +/* + * LDO2/3 + * 0.65V to 3.3V (50mV step) + */ +static const struct linear_range pf0900_ldo23_volts[] = { + REGULATOR_LINEAR_RANGE(650000, 0x00, 0x0D, 50000), + REGULATOR_LINEAR_RANGE(1400000, 0x0E, 0x0F, 100000), + REGULATOR_LINEAR_RANGE(1800000, 0x10, 0x1F, 100000), +}; + +static const struct pf0900_regulator_desc pf0900_regulators[] = { + { + .desc = { + .name = "sw1", + .of_match = of_match_ptr("sw1"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_SW1, + .ops = &pf0900_dvs_sw_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_SW_VOLTAGE_NUM, + .linear_ranges = pf0900_dvs_sw1_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_dvs_sw1_volts), + .vsel_reg = PF0900_REG_SW1_VRUN, + .vsel_mask = PF0900_SW_VOL_MASK, + .enable_reg = PF0900_REG_SW1_MODE, + .enable_mask = SW_RUN_MODE_MASK, + .enable_val = SW_RUN_MODE_PWM, + .ramp_reg = PF0900_REG_SW1_CFG1, + .ramp_mask = PF0900_SW_DVS_MASK, + .ramp_delay_table = pf0900_dvs_sw_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf0900_dvs_sw_ramp_table), + .owner = THIS_MODULE, + }, + .suspend_enable_mask = SW_STBY_MODE_MASK, + .suspend_voltage_reg = PF0900_REG_SW1_VSTBY, + }, + { + .desc = { + .name = "sw2", + .of_match = of_match_ptr("sw2"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_SW2, + .ops = &pf0900_dvs_sw_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_SW_VOLTAGE_NUM, + .linear_ranges = pf0900_dvs_sw2345_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_dvs_sw2345_volts), + .vsel_reg = PF0900_REG_SW2_VRUN, + .vsel_mask = PF0900_SW_VOL_MASK, + .enable_reg = PF0900_REG_SW2_MODE, + .enable_mask = SW_RUN_MODE_MASK, + .enable_val = SW_RUN_MODE_PWM, + .ramp_reg = PF0900_REG_SW2_CFG1, + .ramp_mask = PF0900_SW_DVS_MASK, + .ramp_delay_table = pf0900_dvs_sw_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf0900_dvs_sw_ramp_table), + .owner = THIS_MODULE, + }, + .suspend_enable_mask = SW_STBY_MODE_MASK, + .suspend_voltage_reg = PF0900_REG_SW2_VSTBY, + }, + { + .desc = { + .name = "sw3", + .of_match = of_match_ptr("sw3"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_SW3, + .ops = &pf0900_dvs_sw_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_SW_VOLTAGE_NUM, + .linear_ranges = pf0900_dvs_sw2345_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_dvs_sw2345_volts), + .vsel_reg = PF0900_REG_SW3_VRUN, + .vsel_mask = PF0900_SW_VOL_MASK, + .enable_reg = PF0900_REG_SW3_MODE, + .enable_mask = SW_RUN_MODE_MASK, + .enable_val = SW_RUN_MODE_PWM, + .ramp_reg = PF0900_REG_SW3_CFG1, + .ramp_mask = PF0900_SW_DVS_MASK, + .ramp_delay_table = pf0900_dvs_sw_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf0900_dvs_sw_ramp_table), + .owner = THIS_MODULE, + }, + .suspend_enable_mask = SW_STBY_MODE_MASK, + .suspend_voltage_reg = PF0900_REG_SW3_VSTBY, + }, + { + .desc = { + .name = "sw4", + .of_match = of_match_ptr("sw4"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_SW4, + .ops = &pf0900_dvs_sw_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_SW_VOLTAGE_NUM, + .linear_ranges = pf0900_dvs_sw2345_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_dvs_sw2345_volts), + .vsel_reg = PF0900_REG_SW4_VRUN, + .vsel_mask = PF0900_SW_VOL_MASK, + .enable_reg = PF0900_REG_SW4_MODE, + .enable_mask = SW_RUN_MODE_MASK, + .enable_val = SW_RUN_MODE_PWM, + .ramp_reg = PF0900_REG_SW4_CFG1, + .ramp_mask = PF0900_SW_DVS_MASK, + .ramp_delay_table = pf0900_dvs_sw_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf0900_dvs_sw_ramp_table), + .owner = THIS_MODULE, + }, + .suspend_enable_mask = SW_STBY_MODE_MASK, + .suspend_voltage_reg = PF0900_REG_SW4_VSTBY, + }, + { + .desc = { + .name = "sw5", + .of_match = of_match_ptr("sw5"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_SW5, + .ops = &pf0900_dvs_sw_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_SW_VOLTAGE_NUM, + .linear_ranges = pf0900_dvs_sw2345_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_dvs_sw2345_volts), + .vsel_reg = PF0900_REG_SW5_VRUN, + .vsel_mask = PF0900_SW_VOL_MASK, + .enable_reg = PF0900_REG_SW5_MODE, + .enable_mask = SW_RUN_MODE_MASK, + .enable_val = SW_RUN_MODE_PWM, + .ramp_reg = PF0900_REG_SW5_CFG1, + .ramp_mask = PF0900_SW_DVS_MASK, + .ramp_delay_table = pf0900_dvs_sw_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf0900_dvs_sw_ramp_table), + .owner = THIS_MODULE, + }, + .suspend_enable_mask = SW_STBY_MODE_MASK, + .suspend_voltage_reg = PF0900_REG_SW5_VSTBY, + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_LDO1, + .ops = &pf0900_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_LDO_VOLTAGE_NUM, + .linear_ranges = pf0900_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_ldo1_volts), + .vsel_reg = PF0900_REG_LDO1_RUN, + .vsel_mask = VLDO_RUN_MASK, + .enable_reg = PF0900_REG_LDO1_RUN, + .enable_mask = LDO_RUN_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_LDO2, + .ops = &pf0900_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_LDO_VOLTAGE_NUM, + .linear_ranges = pf0900_ldo23_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_ldo23_volts), + .vsel_reg = PF0900_REG_LDO2_RUN, + .vsel_mask = VLDO_RUN_MASK, + .enable_reg = PF0900_REG_LDO2_RUN, + .enable_mask = LDO_RUN_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo3", + .of_match = of_match_ptr("ldo3"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_LDO3, + .ops = &pf0900_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_LDO_VOLTAGE_NUM, + .linear_ranges = pf0900_ldo23_volts, + .n_linear_ranges = ARRAY_SIZE(pf0900_ldo23_volts), + .vsel_reg = PF0900_REG_LDO3_RUN, + .vsel_mask = VLDO_RUN_MASK, + .enable_reg = PF0900_REG_LDO3_RUN, + .enable_mask = LDO_RUN_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "vaon", + .of_match = of_match_ptr("vaon"), + .regulators_node = of_match_ptr("regulators"), + .id = PF0900_VAON, + .ops = &pf0900_avon_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF0900_VAON_VOLTAGE_NUM, + .volt_table = pf0900_vaon_voltages, + .enable_reg = PF0900_REG_VAON_CFG1, + .enable_mask = PF0900_VAON_MASK, + .enable_val = PF0900_VAON_1P8V, + .vsel_reg = PF0900_REG_VAON_CFG1, + .vsel_mask = PF0900_VAON_MASK, + .owner = THIS_MODULE, + }, + }, +}; + +static const struct pf0900_regulator_irq regu_irqs[] = { + PF0900_REGU_IRQ(PF0900_REG_SW_ILIM_INT, PF0900_SW, REGULATOR_ERROR_OVER_CURRENT_WARN), + PF0900_REGU_IRQ(PF0900_REG_LDO_ILIM_INT, PF0900_LDO, REGULATOR_ERROR_OVER_CURRENT_WARN), + PF0900_REGU_IRQ(PF0900_REG_SW_UV_INT, PF0900_SW, REGULATOR_ERROR_UNDER_VOLTAGE_WARN), + PF0900_REGU_IRQ(PF0900_REG_LDO_UV_INT, PF0900_LDO, REGULATOR_ERROR_UNDER_VOLTAGE_WARN), + PF0900_REGU_IRQ(PF0900_REG_SW_OV_INT, PF0900_SW, REGULATOR_ERROR_OVER_VOLTAGE_WARN), + PF0900_REGU_IRQ(PF0900_REG_LDO_OV_INT, PF0900_LDO, REGULATOR_ERROR_OVER_VOLTAGE_WARN), +}; + +static irqreturn_t pf0900_irq_handler(int irq, void *data) +{ + unsigned int val, regu, i, index; + struct pf0900 *pf0900 = data; + int ret; + + for (i = 0; i < ARRAY_SIZE(regu_irqs); i++) { + ret = regmap_read(pf0900->regmap, regu_irqs[i].reg, &val); + if (ret < 0) { + dev_err(pf0900->dev, "Failed to read %d\n", ret); + return IRQ_NONE; + } + if (val) { + ret = regmap_write_bits(pf0900->regmap, regu_irqs[i].reg, val, val); + if (ret < 0) { + dev_err(pf0900->dev, "Failed to update %d\n", ret); + return IRQ_NONE; + } + + if (regu_irqs[i].type == PF0900_SW) { + for (index = 0; index < REGU_SW_CNT; index++) { + if (val & BIT(index)) { + regu = (enum pf0900_regulators)index; + regulator_notifier_call_chain(pf0900->rdevs[regu], + regu_irqs[i].event, + NULL); + } + } + } else if (regu_irqs[i].type == PF0900_LDO) { + for (index = 0; index < REGU_LDO_VAON_CNT; index++) { + if (val & BIT(index)) { + regu = (enum pf0900_regulators)index + PF0900_LDO1; + regulator_notifier_call_chain(pf0900->rdevs[regu], + regu_irqs[i].event, + NULL); + } + } + } + } + } + + return IRQ_HANDLED; +} + +static int pf0900_i2c_probe(struct i2c_client *i2c) +{ + const struct pf0900_regulator_desc *regulator_desc; + const struct pf0900_drvdata *drvdata = NULL; + struct device_node *np = i2c->dev.of_node; + unsigned int device_id, device_fam, i; + struct regulator_config config = { }; + struct pf0900 *pf0900; + int ret; + + if (!i2c->irq) + return dev_err_probe(&i2c->dev, -EINVAL, "No IRQ configured?\n"); + + pf0900 = devm_kzalloc(&i2c->dev, sizeof(struct pf0900), GFP_KERNEL); + if (!pf0900) + return -ENOMEM; + + drvdata = device_get_match_data(&i2c->dev); + if (!drvdata) + return dev_err_probe(&i2c->dev, -EINVAL, "unable to find driver data\n"); + + regulator_desc = drvdata->desc; + pf0900->drvdata = drvdata; + pf0900->crc_en = of_property_read_bool(np, "nxp,i2c-crc-enable"); + pf0900->irq = i2c->irq; + pf0900->dev = &i2c->dev; + pf0900->addr = i2c->addr; + + dev_set_drvdata(&i2c->dev, pf0900); + + pf0900->regmap = devm_regmap_init(&i2c->dev, &pf0900_regmap_bus, &i2c->dev, + &pf0900_regmap_config); + if (IS_ERR(pf0900->regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(pf0900->regmap), + "regmap initialization failed\n"); + ret = regmap_read(pf0900->regmap, PF0900_REG_DEV_ID, &device_id); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Read device id error\n"); + + ret = regmap_read(pf0900->regmap, PF0900_REG_DEV_FAM, &device_fam); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Read device fam error\n"); + + /* Check your board and dts for match the right pmic */ + if (device_fam == 0x09 && (device_id & 0x1F) != 0x0) + return dev_err_probe(&i2c->dev, -EINVAL, "Device id(%x) mismatched\n", + device_id >> 4); + + for (i = 0; i < drvdata->rcnt; i++) { + const struct regulator_desc *desc; + const struct pf0900_regulator_desc *r; + + r = ®ulator_desc[i]; + desc = &r->desc; + config.regmap = pf0900->regmap; + config.driver_data = (void *)r; + config.dev = pf0900->dev; + + pf0900->rdevs[i] = devm_regulator_register(pf0900->dev, desc, &config); + if (IS_ERR(pf0900->rdevs[i])) + return dev_err_probe(pf0900->dev, PTR_ERR(pf0900->rdevs[i]), + "Failed to register regulator(%s)\n", desc->name); + } + + ret = devm_request_threaded_irq(pf0900->dev, pf0900->irq, NULL, + pf0900_irq_handler, + (IRQF_TRIGGER_FALLING | IRQF_ONESHOT), + "pf0900-irq", pf0900); + + if (ret != 0) + return dev_err_probe(pf0900->dev, ret, "Failed to request IRQ: %d\n", + pf0900->irq); + /* + * The PWRUP_M is unmasked by default. When the device enter in RUN state, + * it will assert the PWRUP_I interrupt and assert the INTB pin to inform + * the MCU that it has finished the power up sequence properly. + */ + ret = regmap_write_bits(pf0900->regmap, PF0900_REG_STATUS1_INT, PF0900_IRQ_PWRUP, + PF0900_IRQ_PWRUP); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Clean PWRUP_I error\n"); + + /* mask interrupt PWRUP */ + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_STATUS1_MSK, PF0900_IRQ_PWRUP, + PF0900_IRQ_PWRUP); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_SW_ILIM_MSK, PF0900_IRQ_SW1_IL | + PF0900_IRQ_SW2_IL | PF0900_IRQ_SW3_IL | PF0900_IRQ_SW4_IL | + PF0900_IRQ_SW5_IL, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_SW_UV_MSK, PF0900_IRQ_SW1_UV | + PF0900_IRQ_SW2_UV | PF0900_IRQ_SW3_UV | PF0900_IRQ_SW4_UV | + PF0900_IRQ_SW5_UV, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_SW_OV_MSK, PF0900_IRQ_SW1_OV | + PF0900_IRQ_SW2_OV | PF0900_IRQ_SW3_OV | PF0900_IRQ_SW4_OV | + PF0900_IRQ_SW5_OV, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_LDO_ILIM_MSK, PF0900_IRQ_LDO1_IL | + PF0900_IRQ_LDO2_IL | PF0900_IRQ_LDO3_IL, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_LDO_UV_MSK, PF0900_IRQ_LDO1_UV | + PF0900_IRQ_LDO2_UV | PF0900_IRQ_LDO3_UV | PF0900_IRQ_VAON_UV, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + ret = regmap_update_bits(pf0900->regmap, PF0900_REG_LDO_OV_MSK, PF0900_IRQ_LDO1_OV | + PF0900_IRQ_LDO2_OV | PF0900_IRQ_LDO3_OV | PF0900_IRQ_VAON_OV, 0); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + return 0; +} + +static struct pf0900_drvdata pf0900_drvdata = { + .desc = pf0900_regulators, + .rcnt = ARRAY_SIZE(pf0900_regulators), +}; + +static const struct of_device_id pf0900_of_match[] = { + { .compatible = "nxp,pf0900", .data = &pf0900_drvdata}, + { } +}; + +MODULE_DEVICE_TABLE(of, pf0900_of_match); + +static struct i2c_driver pf0900_i2c_driver = { + .driver = { + .name = "nxp-pf0900", + .of_match_table = pf0900_of_match, + }, + .probe = pf0900_i2c_probe, +}; + +module_i2c_driver(pf0900_i2c_driver); + +MODULE_AUTHOR("Joy Zou "); +MODULE_DESCRIPTION("NXP PF0900 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pf1550-regulator.c b/drivers/regulator/pf1550-regulator.c new file mode 100644 index 000000000..ceee553a8 --- /dev/null +++ b/drivers/regulator/pf1550-regulator.c @@ -0,0 +1,426 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// regulator driver for the PF1550 +// +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Robin Gong +// +// Portions Copyright (c) 2025 Savoir-faire Linux Inc. +// Samuel Kayode +// + +#include +#include +#include +#include +#include +#include +#include + +#define PF1550_REGULATOR_IRQ_NR 11 +#define PF1550_MAX_REGULATOR 7 + +struct pf1550_desc { + struct regulator_desc desc; + unsigned char stby_reg; + unsigned char stby_mask; + unsigned char stby_enable_reg; + unsigned char stby_enable_mask; +}; + +struct pf1550_regulator_info { + struct device *dev; + const struct pf1550_ddata *pf1550; + struct pf1550_desc regulator_descs[PF1550_MAX_REGULATOR]; + struct regulator_dev *rdevs[PF1550_MAX_REGULATOR]; +}; + +static const int pf1550_sw12_volts[] = { + 1100000, 1200000, 1350000, 1500000, 1800000, 2500000, 3000000, 3300000, +}; + +static const int pf1550_ldo13_volts[] = { + 750000, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, + 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, +}; + +static int pf1550_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + int id = rdev_get_id(rdev); + unsigned int ramp_bits = 0; + int ret; + + if (id > PF1550_VREFDDR) + return -EACCES; + + if (ramp_delay < 0 || ramp_delay > 6250) + return -EINVAL; + + ramp_delay = 6250 / ramp_delay; + ramp_bits = ramp_delay >> 1; + + ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg + 4, 0x10, + ramp_bits << 4); + if (ret < 0) + dev_err(&rdev->dev, "ramp failed, err %d\n", ret); + + return ret; +} + +static int pf1550_set_suspend_enable(struct regulator_dev *rdev) +{ + const struct pf1550_desc *desc = container_of_const(rdev->desc, + struct pf1550_desc, + desc); + unsigned int val = desc->stby_enable_mask; + + return regmap_update_bits(rdev->regmap, desc->stby_enable_reg, + desc->stby_enable_mask, val); +} + +static int pf1550_set_suspend_disable(struct regulator_dev *rdev) +{ + const struct pf1550_desc *desc = container_of_const(rdev->desc, + struct pf1550_desc, + desc); + + return regmap_update_bits(rdev->regmap, desc->stby_enable_reg, + desc->stby_enable_mask, 0); +} + +static int pf1550_buck_set_table_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + const struct pf1550_desc *desc = container_of_const(rdev->desc, + struct pf1550_desc, + desc); + int ret; + + ret = regulator_map_voltage_ascend(rdev, uV, uV); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to map %i uV\n", uV); + return ret; + } + + return regmap_update_bits(rdev->regmap, desc->stby_reg, + desc->stby_mask, ret); +} + +static int pf1550_buck_set_linear_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + const struct pf1550_desc *desc = container_of_const(rdev->desc, + struct pf1550_desc, + desc); + int ret; + + ret = regulator_map_voltage_linear(rdev, uV, uV); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to map %i uV\n", uV); + return ret; + } + + return regmap_update_bits(rdev->regmap, desc->stby_reg, + desc->stby_mask, ret); +} + +static const struct regulator_ops pf1550_sw1_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_suspend_enable = pf1550_set_suspend_enable, + .set_suspend_disable = pf1550_set_suspend_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_voltage = pf1550_buck_set_table_suspend_voltage, + .map_voltage = regulator_map_voltage_ascend, + .set_ramp_delay = pf1550_set_ramp_delay, +}; + +static const struct regulator_ops pf1550_sw2_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_suspend_enable = pf1550_set_suspend_enable, + .set_suspend_disable = pf1550_set_suspend_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_voltage = pf1550_buck_set_linear_suspend_voltage, + .map_voltage = regulator_map_voltage_linear, + .set_ramp_delay = pf1550_set_ramp_delay, +}; + +static const struct regulator_ops pf1550_ldo1_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_suspend_enable = pf1550_set_suspend_enable, + .set_suspend_disable = pf1550_set_suspend_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops pf1550_ldo2_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_suspend_enable = pf1550_set_suspend_enable, + .set_suspend_disable = pf1550_set_suspend_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops pf1550_fixed_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_suspend_enable = pf1550_set_suspend_enable, + .set_suspend_disable = pf1550_set_suspend_disable, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +#define PF_VREF(_chip, match, _name, voltage) { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = 1, \ + .ops = &pf1550_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (voltage), \ + .enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask = 0x1, \ + }, \ + .stby_enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_enable_mask = 0x2, \ +} + +#define PF_SW(_chip, match, _name, min, max, mask, step) { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pf1550_sw2_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .linear_min_sel = 0, \ + .vsel_reg = _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask = (mask), \ + .enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask = 0x1, \ + }, \ + .stby_reg = _chip ## _PMIC_REG_ ## _name ## _STBY_VOLT, \ + .stby_mask = (mask), \ + .stby_enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_enable_mask = 0x2, \ +} + +#define PF_LDO1(_chip, match, _name, mask, voltages) { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pf1550_ldo1_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask = (mask), \ + .enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask = 0x1, \ + }, \ + .stby_enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_enable_mask = 0x2, \ +} + +#define PF_LDO2(_chip, match, _name, mask, min, max, step) { \ + .desc = { \ + .name = #_name, \ + .of_match = of_match_ptr(match), \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pf1550_ldo2_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .linear_min_sel = 0, \ + .vsel_reg = _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask = (mask), \ + .enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask = 0x1, \ + }, \ + .stby_enable_reg = _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_enable_mask = 0x2, \ +} + +static struct pf1550_desc pf1550_regulators[] = { + PF_SW(PF1550, "sw1", SW1, 600000, 1387500, 0x3f, 12500), + PF_SW(PF1550, "sw2", SW2, 600000, 1387500, 0x3f, 12500), + PF_SW(PF1550, "sw3", SW3, 1800000, 3300000, 0xf, 100000), + PF_VREF(PF1550, "vrefddr", VREFDDR, 1200000), + PF_LDO1(PF1550, "ldo1", LDO1, 0x1f, pf1550_ldo13_volts), + PF_LDO2(PF1550, "ldo2", LDO2, 0xf, 1800000, 3300000, 100000), + PF_LDO1(PF1550, "ldo3", LDO3, 0x1f, pf1550_ldo13_volts), +}; + +/* + * The _LS interrupts indicate an over-current event. The _HS + * interrupts, which are more accurate and can detect catastrophic + * faults, issue an error event. The current limit FAULT interrupt is + * similar to the _HS. + */ +static const struct pf1550_regulator_irq { + unsigned int event; + u8 id; +} pf1550_regulator_irqs[] = { + [PF1550_PMIC_IRQ_SW1_LS] = { REGULATOR_EVENT_OVER_CURRENT_WARN, PF1550_SW1 }, + [PF1550_PMIC_IRQ_SW2_LS] = { REGULATOR_EVENT_OVER_CURRENT_WARN, PF1550_SW2 }, + [PF1550_PMIC_IRQ_SW3_LS] = { REGULATOR_EVENT_OVER_CURRENT_WARN, PF1550_SW3 }, + [PF1550_PMIC_IRQ_SW1_HS] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_SW1 }, + [PF1550_PMIC_IRQ_SW2_HS] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_SW2 }, + [PF1550_PMIC_IRQ_SW3_HS] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_SW3 }, + [PF1550_PMIC_IRQ_LDO1_FAULT] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_LDO1 }, + [PF1550_PMIC_IRQ_LDO2_FAULT] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_LDO2 }, + [PF1550_PMIC_IRQ_LDO3_FAULT] = { REGULATOR_EVENT_OVER_CURRENT, PF1550_LDO3 }, +}; + +static irqreturn_t pf1550_regulator_irq_handler(int irq, void *data) +{ + const struct pf1550_regulator_irq *map; + struct pf1550_regulator_info *info = data; + struct device *dev = info->dev; + struct platform_device *pdev = to_platform_device(dev); + int i, irq_type = -1; + + for (i = 0; i < PF1550_REGULATOR_IRQ_NR; i++) + if (irq == platform_get_irq(pdev, i)) + irq_type = i; + + /* The die temperature concerns every rail. */ + if (irq_type == PF1550_PMIC_IRQ_TEMP_110 || + irq_type == PF1550_PMIC_IRQ_TEMP_125) { + for (i = 0; i < PF1550_MAX_REGULATOR; i++) + regulator_notifier_call_chain(info->rdevs[i], + REGULATOR_EVENT_OVER_TEMP, + NULL); + return IRQ_HANDLED; + } + + if (irq_type < 0 || irq_type >= (int)ARRAY_SIZE(pf1550_regulator_irqs)) { + dev_err(dev, "regulator interrupt: irq %d occurred\n", irq_type); + return IRQ_HANDLED; + } + + map = &pf1550_regulator_irqs[irq_type]; + + for (i = 0; i < PF1550_MAX_REGULATOR; i++) + if (rdev_get_id(info->rdevs[i]) == map->id) + regulator_notifier_call_chain(info->rdevs[i], + map->event, NULL); + + return IRQ_HANDLED; +} + +static int pf1550_regulator_probe(struct platform_device *pdev) +{ + const struct pf1550_ddata *pf1550 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct pf1550_regulator_info *info; + int i, irq = -1, ret = 0; + + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + config.regmap = dev_get_regmap(pf1550->dev, NULL); + if (!config.regmap) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to get parent regmap\n"); + + config.dev = pf1550->dev; + info->dev = &pdev->dev; + info->pf1550 = pf1550; + + memcpy(info->regulator_descs, pf1550_regulators, + sizeof(info->regulator_descs)); + + for (i = 0; i < ARRAY_SIZE(pf1550_regulators); i++) { + struct regulator_desc *desc; + + desc = &info->regulator_descs[i].desc; + + if ((desc->id == PF1550_SW2 && !pf1550->dvs2_enable) || + (desc->id == PF1550_SW1 && !pf1550->dvs1_enable)) { + /* OTP_SW2_DVS_ENB == 1? or OTP_SW1_DVS_ENB == 1? */ + desc->volt_table = pf1550_sw12_volts; + desc->n_voltages = ARRAY_SIZE(pf1550_sw12_volts); + desc->ops = &pf1550_sw1_ops; + } + + info->rdevs[i] = devm_regulator_register(&pdev->dev, desc, + &config); + if (IS_ERR(info->rdevs[i])) + return dev_err_probe(&pdev->dev, + PTR_ERR(info->rdevs[i]), + "failed to initialize regulator-%d\n", + i); + } + + platform_set_drvdata(pdev, info); + + for (i = 0; i < PF1550_REGULATOR_IRQ_NR; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + pf1550_regulator_irq_handler, + IRQF_NO_SUSPEND, + "pf1550-regulator", info); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed: irq request (IRQ: %d)\n", + i); + } + + return 0; +} + +static const struct platform_device_id pf1550_regulator_id[] = { + { .name = "pf1550-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, pf1550_regulator_id); + +static struct platform_driver pf1550_regulator_driver = { + .driver = { + .name = "pf1550-regulator", + }, + .probe = pf1550_regulator_probe, + .id_table = pf1550_regulator_id, +}; +module_platform_driver(pf1550_regulator_driver); + +MODULE_DESCRIPTION("NXP PF1550 regulator driver"); +MODULE_AUTHOR("Robin Gong "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pf530x-regulator.c b/drivers/regulator/pf530x-regulator.c new file mode 100644 index 000000000..8ad1cbbd7 --- /dev/null +++ b/drivers/regulator/pf530x-regulator.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0+ + +// documentation of this device is available at +// https://www.nxp.com/docs/en/data-sheet/PF5300.pdf + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* registers */ +#define PF530X_DEVICEID 0x00 +#define PF530X_REV 0x01 +#define PF530X_EMREV 0x02 +#define PF530X_PROGID 0x03 +#define PF530X_CONFIG1 0x04 +#define PF530X_INT_STATUS1 0x05 +#define PF530X_INT_SENSE1 0x06 +#define PF530X_INT_STATUS2 0x07 +#define PF530X_INT_SENSE2 0x08 +#define PF530X_BIST_STAT1 0x09 +#define PF530X_BIST_CTRL 0x0a +#define PF530X_STATE 0x0b +#define PF530X_STATE_CTRL 0x0c +#define PF530X_SW1_VOLT 0x0d +#define PF530X_SW1_STBY_VOLT 0x0e +#define PF530X_SW1_CTRL1 0x0f +#define PF530X_SW1_CTRL2 0x10 +#define PF530X_CLK_CTRL 0x11 +#define PF530X_SEQ_CTRL1 0x12 +#define PF530X_SEQ_CTRL2 0x13 +#define PF530X_RANDOM_CHK 0x14 +#define PF530X_RANDOM_GEN 0x15 +#define PF530X_WD_CTRL1 0x16 +#define PF530X_WD_SEED 0x17 +#define PF530X_WD_ANSWER 0x18 +#define PF530X_FLT_CNT1 0x19 +#define PF530X_FLT_CNT2 0x1a +#define PF530X_OTP_MODE 0x2f + +enum pf530x_states { + PF530X_STATE_POF, + PF530X_STATE_FUSE_LOAD, + PF530X_STATE_LP_OFF, + PF530X_STATE_SELF_TEST, + PF530X_STATE_POWER_UP, + PF530X_STATE_INIT, + PF530X_STATE_IO_RELEASE, + PF530X_STATE_RUN, + PF530X_STATE_STANDBY, + PF530X_STATE_FAULT, + PF530X_STATE_FAILSAFE, + PF530X_STATE_POWER_DOWN, + PF530X_STATE_2MS_SELFTEST_RETRY, + PF530X_STATE_OFF_DLY, +}; + +#define PF530_FAM 0x50 +enum pf530x_devid { + PF5300 = 0x3, + PF5301 = 0x4, + PF5302 = 0x5, +}; + +#define PF530x_FAM 0x50 +#define PF530x_DEVICE_FAM_MASK GENMASK(7, 4) +#define PF530x_DEVICE_ID_MASK GENMASK(3, 0) + +#define PF530x_STATE_MASK GENMASK(3, 0) +#define PF530x_STATE_RUN 0x07 +#define PF530x_STATE_STANDBY 0x08 +#define PF530x_STATE_LP_OFF 0x02 + +#define PF530X_OTP_STBY_MODE GENMASK(3, 2) +#define PF530X_OTP_RUN_MODE GENMASK(1, 0) + +#define PF530X_INT_STATUS_OV BIT(1) +#define PF530X_INT_STATUS_UV BIT(2) +#define PF530X_INT_STATUS_ILIM BIT(3) + +#define SW1_ILIM_S BIT(0) +#define VMON_UV_S BIT(1) +#define VMON_OV_S BIT(2) +#define VIN_OVLO_S BIT(3) +#define BG_ERR_S BIT(6) + +#define THERM_155_S BIT(3) +#define THERM_140_S BIT(2) +#define THERM_125_S BIT(1) +#define THERM_110_S BIT(0) + +struct pf530x_chip { + struct regmap *regmap; + struct device *dev; +}; + +static const struct regmap_config pf530x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PF530X_OTP_MODE, + .cache_type = REGCACHE_MAPLE, +}; + +static int pf530x_get_status(struct regulator_dev *rdev) +{ + unsigned int state; + int ret; + + ret = regmap_read(rdev->regmap, PF530X_INT_SENSE1, &state); + if (ret != 0) + return ret; + + if ((state & (BG_ERR_S | SW1_ILIM_S | VMON_UV_S | VMON_OV_S | VIN_OVLO_S)) + != 0) + return REGULATOR_STATUS_ERROR; + + // no errors, check if what non-error state we're in + ret = regmap_read(rdev->regmap, PF530X_STATE, &state); + if (ret != 0) + return ret; + + state &= PF530x_STATE_MASK; + + switch (state) { + case PF530x_STATE_RUN: + ret = REGULATOR_STATUS_NORMAL; + break; + case PF530x_STATE_STANDBY: + ret = REGULATOR_STATUS_STANDBY; + break; + case PF530x_STATE_LP_OFF: + ret = REGULATOR_STATUS_OFF; + break; + default: + ret = REGULATOR_STATUS_ERROR; + break; + } + return ret; +} + +static int pf530x_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + unsigned int status; + int ret; + + ret = regmap_read(rdev->regmap, PF530X_INT_STATUS1, &status); + + if (ret != 0) + return ret; + + *flags = 0; + + if (status & PF530X_INT_STATUS_OV) + *flags |= REGULATOR_ERROR_OVER_VOLTAGE_WARN; + + if (status & PF530X_INT_STATUS_UV) + *flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (status & PF530X_INT_STATUS_ILIM) + *flags |= REGULATOR_ERROR_OVER_CURRENT; + + ret = regmap_read(rdev->regmap, PF530X_INT_SENSE2, &status); + + if (ret != 0) + return ret; + + if ((status & (THERM_155_S | + THERM_140_S | + THERM_125_S | + THERM_110_S)) != 0) + *flags |= REGULATOR_ERROR_OVER_TEMP_WARN; + + return 0; +} + +static const struct regulator_ops pf530x_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .map_voltage = regulator_map_voltage_linear_range, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .get_status = pf530x_get_status, + .get_error_flags = pf530x_get_error_flags, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +static const struct linear_range vrange = REGULATOR_LINEAR_RANGE(500000, 0, 140, 5000); + +static const struct regulator_desc pf530x_reg_desc = { + .name = "SW1", + .ops = &pf530x_regulator_ops, + .linear_ranges = &vrange, + .n_linear_ranges = 1, + .type = REGULATOR_VOLTAGE, + .id = 0, + .owner = THIS_MODULE, + .vsel_reg = PF530X_SW1_VOLT, + .vsel_mask = 0xFF, + .bypass_reg = PF530X_SW1_CTRL2, + .bypass_mask = 0x07, + .bypass_val_on = 0x07, + .bypass_val_off = 0x00, + .enable_reg = PF530X_SW1_CTRL1, + .enable_mask = GENMASK(5, 2), + .enable_val = GENMASK(5, 2), + .disable_val = 0, +}; + +static int pf530x_identify(struct pf530x_chip *chip) +{ + unsigned int value; + u8 dev_fam, dev_id, full_layer_rev, metal_layer_rev, prog_idh, prog_idl, emrev; + const char *name = NULL; + int ret; + + ret = regmap_read(chip->regmap, PF530X_DEVICEID, &value); + if (ret) { + dev_err(chip->dev, "failed to read chip family\n"); + return ret; + } + + dev_fam = value & PF530x_DEVICE_FAM_MASK; + switch (dev_fam) { + case PF530x_FAM: + break; + default: + dev_err(chip->dev, + "Chip 0x%x is not from PF530X family\n", dev_fam); + return ret; + } + + dev_id = value & PF530x_DEVICE_ID_MASK; + switch (dev_id) { + case PF5300: + name = "PF5300"; + break; + case PF5301: + name = "PF5301"; + break; + case PF5302: + name = "PF5302"; + break; + default: + dev_err(chip->dev, "Unknown pf530x device id 0x%x\n", dev_id); + return -ENODEV; + } + + ret = regmap_read(chip->regmap, PF530X_REV, &value); + if (ret) { + dev_err(chip->dev, "failed to read chip rev\n"); + return ret; + } + + full_layer_rev = ((value & 0xF0) == 0) ? '0' : ((((value & 0xF0) >> 4) - 1) + 'A'); + metal_layer_rev = value & 0xF; + + ret = regmap_read(chip->regmap, PF530X_EMREV, &value); + if (ret) { + dev_err(chip->dev, "failed to read chip emrev register\n"); + return ret; + } + + prog_idh = (value >> 4) + 'A'; + // prog_idh skips 'O', per page 96 of the datasheet + if (prog_idh >= 'O') + prog_idh += 1; + + emrev = value & 0x7; + + ret = regmap_read(chip->regmap, PF530X_PROGID, &value); + if (ret) { + dev_err(chip->dev, "failed to read chip progid register\n"); + return ret; + } + + if (value >= 0x22) { + dev_err(chip->dev, "invalid value for progid register\n"); + return -ENODEV; + } else if (value < 10) { + prog_idl = value + '0'; + } else { + prog_idl = (value - 10) + 'A'; + // prog_idh skips 'O', per page 97 of the datasheet + if (prog_idl >= 'O') + prog_idl += 1; + } + + dev_info(chip->dev, "%s Regulator found (Rev %c%d ProgID %c%c EMREV %x).\n", + name, full_layer_rev, metal_layer_rev, prog_idh, prog_idl, emrev); + + return 0; +} + +static int pf530x_i2c_probe(struct i2c_client *client) +{ + struct regulator_config config = { NULL, }; + struct pf530x_chip *chip; + int ret; + struct regulator_dev *rdev; + struct regulator_init_data *init_data; + + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + i2c_set_clientdata(client, chip); + chip->dev = &client->dev; + + chip->regmap = devm_regmap_init_i2c(client, &pf530x_regmap_config); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + dev_err(&client->dev, + "regmap allocation failed with err %d\n", ret); + return ret; + } + + ret = pf530x_identify(chip); + if (ret) + return ret; + + init_data = of_get_regulator_init_data(chip->dev, chip->dev->of_node, &pf530x_reg_desc); + if (!init_data) + return -ENODATA; + + config.dev = chip->dev; + config.of_node = chip->dev->of_node; + config.regmap = chip->regmap; + config.init_data = init_data; + + // the config parameter gets copied, it's ok to pass a pointer on the stack here + rdev = devm_regulator_register(&client->dev, &pf530x_reg_desc, &config); + if (IS_ERR(rdev)) { + dev_err(&client->dev, "failed to register %s regulator\n", pf530x_reg_desc.name); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id pf530x_dt_ids[] = { + { .compatible = "nxp,pf5300",}, + { } +}; +MODULE_DEVICE_TABLE(of, pf530x_dt_ids); + +static const struct i2c_device_id pf530x_i2c_id[] = { + { .name = "pf5300" }, + { .name = "pf5301" }, + { .name = "pf5302" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pf530x_i2c_id); + +static struct i2c_driver pf530x_regulator_driver = { + .id_table = pf530x_i2c_id, + .driver = { + .name = "pf530x", + .of_match_table = pf530x_dt_ids, + }, + .probe = pf530x_i2c_probe, +}; +module_i2c_driver(pf530x_regulator_driver); + +MODULE_AUTHOR("Woodrow Douglass "); +MODULE_DESCRIPTION("Regulator Driver for NXP's PF5300/PF5301/PF5302 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pf8x00-regulator.c b/drivers/regulator/pf8x00-regulator.c new file mode 100644 index 000000000..c938b4632 --- /dev/null +++ b/drivers/regulator/pf8x00-regulator.c @@ -0,0 +1,620 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 NXP + * Copyright (C) 2019 Boundary Devices + * Copyright (C) 2020 Amarula Solutions(India) + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* registers */ +#define PF8X00_DEVICEID 0x00 +#define PF8X00_REVID 0x01 +#define PF8X00_EMREV 0x02 +#define PF8X00_PROGID 0x03 +#define PF8X00_IMS_INT 0x04 +#define PF8X00_IMS_THERM 0x07 +#define PF8X00_SW_MODE_INT 0x0a +#define PF8X00_SW_MODE_MASK 0x0b +#define PF8X00_IMS_SW_ILIM 0x12 +#define PF8X00_IMS_LDO_ILIM 0x15 +#define PF8X00_IMS_SW_UV 0x18 +#define PF8X00_IMS_SW_OV 0x1b +#define PF8X00_IMS_LDO_UV 0x1e +#define PF8X00_IMS_LDO_OV 0x21 +#define PF8X00_IMS_PWRON 0x24 +#define PF8X00_SYS_INT 0x27 +#define PF8X00_HARD_FAULT 0x29 +#define PF8X00_FSOB_FLAGS 0x2a +#define PF8X00_FSOB_SELECT 0x2b +#define PF8X00_ABIST_OV1 0x2c +#define PF8X00_ABIST_OV2 0x2d +#define PF8X00_ABIST_UV1 0x2e +#define PF8X00_ABIST_UV2 0x2f +#define PF8X00_TEST_FLAGS 0x30 +#define PF8X00_ABIST_RUN 0x31 +#define PF8X00_RANDOM_GEN 0x33 +#define PF8X00_RANDOM_CHK 0x34 +#define PF8X00_VMONEN1 0x35 +#define PF8X00_VMONEN2 0x36 +#define PF8X00_CTRL1 0x37 +#define PF8X00_CTRL2 0x38 +#define PF8X00_CTRL3 0x39 +#define PF8X00_PWRUP_CTRL 0x3a +#define PF8X00_RESETBMCU 0x3c +#define PF8X00_PGOOD 0x3d +#define PF8X00_PWRDN_DLY1 0x3e +#define PF8X00_PWRDN_DLY2 0x3f +#define PF8X00_FREQ_CTRL 0x40 +#define PF8X00_COINCELL_CTRL 0x41 +#define PF8X00_PWRON 0x42 +#define PF8X00_WD_CONFIG 0x43 +#define PF8X00_WD_CLEAR 0x44 +#define PF8X00_WD_EXPIRE 0x45 +#define PF8X00_WD_COUNTER 0x46 +#define PF8X00_FAULT_COUNTER 0x47 +#define PF8X00_FSAFE_COUNTER 0x48 +#define PF8X00_FAULT_TIMER 0x49 +#define PF8X00_AMUX 0x4a +#define PF8X00_SW1_CONFIG1 0x4d +#define PF8X00_LDO1_CONFIG1 0x85 +#define PF8X00_VSNVS_CONFIG1 0x9d +#define PF8X00_PAGE_SELECT 0x9f + +/* regulators */ +enum pf8x00_regulators { + PF8X00_LDO1, + PF8X00_LDO2, + PF8X00_LDO3, + PF8X00_LDO4, + PF8X00_BUCK1, + PF8X00_BUCK2, + PF8X00_BUCK3, + PF8X00_BUCK4, + PF8X00_BUCK5, + PF8X00_BUCK6, + PF8X00_BUCK7, + PF8X00_VSNVS, + + PF8X00_MAX_REGULATORS, +}; + +enum pf8x00_buck_states { + SW_CONFIG1, + SW_CONFIG2, + SW_PWRUP, + SW_MODE1, + SW_RUN_VOLT, + SW_STBY_VOLT, +}; +#define PF8X00_SW_BASE(i) (8 * (i - PF8X00_BUCK1) + PF8X00_SW1_CONFIG1) + +enum pf8x00_ldo_states { + LDO_CONFIG1, + LDO_CONFIG2, + LDO_PWRUP, + LDO_RUN_VOLT, + LDO_STBY_VOLT, +}; +#define PF8X00_LDO_BASE(i) (6 * (i - PF8X00_LDO1) + PF8X00_LDO1_CONFIG1) + +enum swxilim_bits { + SWXILIM_2100_MA, + SWXILIM_2600_MA, + SWXILIM_3000_MA, + SWXILIM_4500_MA, +}; +#define PF8X00_SWXILIM_SHIFT 3 +#define PF8X00_SWXILIM_MASK GENMASK(4, 3) +#define PF8X00_SWXPHASE_MASK GENMASK(2, 0) +#define PF8X00_SWXPHASE_SHIFT 7 + +enum pf8x00_devid { + PF8100 = 0x0, + PF8121A = BIT(1), + PF8200 = BIT(3), +}; +#define PF8X00_FAM BIT(6) +#define PF8X00_DEVICE_FAM_MASK GENMASK(7, 4) +#define PF8X00_DEVICE_ID_MASK GENMASK(3, 0) + +struct pf8x00_regulator_data { + struct regulator_desc desc; + unsigned int suspend_enable_reg; + unsigned int suspend_enable_mask; + unsigned int suspend_voltage_reg; + unsigned int suspend_voltage_cache; +}; + +struct pf8x00_chip { + struct regmap *regmap; + struct device *dev; +}; + +static const struct regmap_config pf8x00_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PF8X00_PAGE_SELECT, + .cache_type = REGCACHE_MAPLE, +}; + +/* VLDOx output: 1.5V to 5.0V */ +static const int pf8x00_ldo_voltages[] = { + 1500000, 1600000, 1800000, 1850000, 2150000, 2500000, 2800000, 3000000, + 3100000, 3150000, 3200000, 3300000, 3350000, 1650000, 1700000, 5000000, +}; + +/* Output: 2.1A to 4.5A */ +static const unsigned int pf8x00_sw_current_table[] = { + 2100000, 2600000, 3000000, 4500000, +}; + +/* Output: 0.4V to 1.8V */ +#define PF8XOO_SW1_6_VOLTAGE_NUM 0xB2 +static const struct linear_range pf8x00_sw1_to_6_voltages[] = { + REGULATOR_LINEAR_RANGE(400000, 0x00, 0xB0, 6250), + REGULATOR_LINEAR_RANGE(1800000, 0xB1, 0xB1, 0), +}; + +/* Output: 1.0V to 4.1V */ +static const int pf8x00_sw7_voltages[] = { + 1000000, 1100000, 1200000, 1250000, 1300000, 1350000, 1500000, 1600000, + 1800000, 1850000, 2000000, 2100000, 2150000, 2250000, 2300000, 2400000, + 2500000, 2800000, 3150000, 3200000, 3250000, 3300000, 3350000, 3400000, + 3500000, 3800000, 4000000, 4100000, 4100000, 4100000, 4100000, 4100000, +}; + +/* Output: 1.8V, 3.0V, or 3.3V */ +static const int pf8x00_vsnvs_voltages[] = { + 0, 1800000, 3000000, 3300000, +}; + +static void swxilim_select(struct pf8x00_chip *chip, int id, int ilim) +{ + u8 ilim_sel; + u8 reg = PF8X00_SW_BASE(id) + SW_CONFIG2; + + switch (ilim) { + case 2100: + ilim_sel = SWXILIM_2100_MA; + break; + case 2600: + ilim_sel = SWXILIM_2600_MA; + break; + case 3000: + ilim_sel = SWXILIM_3000_MA; + break; + case 4500: + ilim_sel = SWXILIM_4500_MA; + break; + default: + ilim_sel = SWXILIM_2100_MA; + break; + } + + regmap_update_bits(chip->regmap, reg, + PF8X00_SWXILIM_MASK, + ilim_sel << PF8X00_SWXILIM_SHIFT); +} + +static void handle_ilim_property(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct pf8x00_chip *chip = config->driver_data; + int ret; + int val; + + if ((desc->id >= PF8X00_BUCK1) && (desc->id <= PF8X00_BUCK7)) { + ret = of_property_read_u32(np, "nxp,ilim-ma", &val); + if (ret) { + dev_dbg(chip->dev, "unspecified ilim for BUCK%d, use value stored in OTP\n", + desc->id - PF8X00_LDO4); + return; + } + + dev_warn(chip->dev, "nxp,ilim-ma is deprecated, please use regulator-max-microamp\n"); + swxilim_select(chip, desc->id, val); + + } else + dev_warn(chip->dev, "nxp,ilim-ma used with incorrect regulator (%d)\n", desc->id); +} + +static void handle_shift_property(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + unsigned char id = desc->id - PF8X00_LDO4; + unsigned char reg = PF8X00_SW_BASE(id) + SW_CONFIG2; + struct pf8x00_chip *chip = config->driver_data; + + int phase; + int val; + int ret; + if ((desc->id >= PF8X00_BUCK1) && (desc->id <= PF8X00_BUCK7)) { + ret = of_property_read_u32(np, "nxp,phase-shift", &val); + if (ret) { + dev_dbg(chip->dev, + "unspecified phase-shift for BUCK%d, using OTP configuration\n", + id); + return; + } + + if (val < 0 || val > 315 || val % 45 != 0) { + dev_warn(config->dev, + "invalid phase_shift %d for BUCK%d, using OTP configuration\n", + val, id); + return; + } + + phase = val / 45; + + if (phase >= 1) + phase -= 1; + else + phase = PF8X00_SWXPHASE_SHIFT; + + regmap_update_bits(chip->regmap, reg, + PF8X00_SWXPHASE_MASK, + phase); + } else + dev_warn(chip->dev, "nxp,phase-shift used with incorrect regulator (%d)\n", id); + +} + +static int pf8x00_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + + handle_ilim_property(np, desc, config); + handle_shift_property(np, desc, config); + + return 0; +} + +static int pf8x00_suspend_enable(struct regulator_dev *rdev) +{ + struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev); + struct regmap *rmap = rdev_get_regmap(rdev); + + return regmap_update_bits(rmap, regl->suspend_enable_reg, + regl->suspend_enable_mask, + regl->suspend_enable_mask); +} + +static int pf8x00_suspend_disable(struct regulator_dev *rdev) +{ + struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev); + struct regmap *rmap = rdev_get_regmap(rdev); + + return regmap_update_bits(rmap, regl->suspend_enable_reg, + regl->suspend_enable_mask, 0); +} + +static int pf8x00_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev); + int ret; + + if (regl->suspend_voltage_cache == uV) + return 0; + + ret = regulator_map_voltage_iterate(rdev, uV, uV); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to map %i uV\n", uV); + return ret; + } + + dev_dbg(rdev_get_dev(rdev), "uV: %i, reg: 0x%x, msk: 0x%x, val: 0x%x\n", + uV, regl->suspend_voltage_reg, regl->desc.vsel_mask, ret); + ret = regmap_update_bits(rdev->regmap, regl->suspend_voltage_reg, + regl->desc.vsel_mask, ret); + if (ret < 0) { + dev_err(rdev_get_dev(rdev), "failed to set %i uV\n", uV); + return ret; + } + + regl->suspend_voltage_cache = uV; + + return 0; +} + +static const struct regulator_ops pf8x00_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_suspend_enable = pf8x00_suspend_enable, + .set_suspend_disable = pf8x00_suspend_disable, + .set_suspend_voltage = pf8x00_set_suspend_voltage, +}; + + +static const struct regulator_ops pf8x00_buck1_6_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_suspend_enable = pf8x00_suspend_enable, + .set_suspend_disable = pf8x00_suspend_disable, + .set_suspend_voltage = pf8x00_set_suspend_voltage, +}; + +static const struct regulator_ops pf8x00_buck7_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, + .set_suspend_enable = pf8x00_suspend_enable, + .set_suspend_disable = pf8x00_suspend_disable, +}; + +static const struct regulator_ops pf8x00_vsnvs_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +#define PF8X00LDO(_id, _name, base, voltages) \ + [PF8X00_LDO ## _id] = { \ + .desc = { \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pf8x00_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PF8X00_LDO ## _id, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = (base) + LDO_RUN_VOLT, \ + .vsel_mask = 0xff, \ + .enable_reg = (base) + LDO_CONFIG2, \ + .enable_val = 0x2, \ + .disable_val = 0x0, \ + .enable_mask = 2, \ + }, \ + .suspend_enable_reg = (base) + LDO_CONFIG2, \ + .suspend_enable_mask = 1, \ + .suspend_voltage_reg = (base) + LDO_STBY_VOLT, \ + } + +#define PF8X00BUCK(_id, _name, base, voltages) \ + [PF8X00_BUCK ## _id] = { \ + .desc = { \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .of_parse_cb = pf8x00_of_parse_cb, \ + .n_voltages = PF8XOO_SW1_6_VOLTAGE_NUM, \ + .ops = &pf8x00_buck1_6_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PF8X00_BUCK ## _id, \ + .owner = THIS_MODULE, \ + .ramp_delay = 19000, \ + .linear_ranges = pf8x00_sw1_to_6_voltages, \ + .n_linear_ranges = \ + ARRAY_SIZE(pf8x00_sw1_to_6_voltages), \ + .vsel_reg = (base) + SW_RUN_VOLT, \ + .vsel_mask = 0xff, \ + .curr_table = pf8x00_sw_current_table, \ + .n_current_limits = \ + ARRAY_SIZE(pf8x00_sw_current_table), \ + .csel_reg = (base) + SW_CONFIG2, \ + .csel_mask = PF8X00_SWXILIM_MASK, \ + .enable_reg = (base) + SW_MODE1, \ + .enable_val = 0x3, \ + .disable_val = 0x0, \ + .enable_mask = 0x3, \ + .enable_time = 500, \ + }, \ + .suspend_enable_reg = (base) + SW_MODE1, \ + .suspend_enable_mask = 0xc, \ + .suspend_voltage_reg = (base) + SW_STBY_VOLT, \ + } + +#define PF8X00BUCK7(_name, base, voltages) \ + [PF8X00_BUCK7] = { \ + .desc = { \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .of_parse_cb = pf8x00_of_parse_cb, \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pf8x00_buck7_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PF8X00_BUCK7, \ + .owner = THIS_MODULE, \ + .ramp_delay = 19000, \ + .volt_table = voltages, \ + .vsel_reg = (base) + SW_RUN_VOLT, \ + .vsel_mask = 0xff, \ + .curr_table = pf8x00_sw_current_table, \ + .n_current_limits = \ + ARRAY_SIZE(pf8x00_sw_current_table), \ + .csel_reg = (base) + SW_CONFIG2, \ + .csel_mask = PF8X00_SWXILIM_MASK, \ + .enable_reg = (base) + SW_MODE1, \ + .enable_val = 0x3, \ + .disable_val = 0x0, \ + .enable_mask = 0x3, \ + .enable_time = 500, \ + }, \ + } + + +#define PF8X00VSNVS(_name, base, voltages) \ + [PF8X00_VSNVS] = { \ + .desc = { \ + .name = _name, \ + .of_match = _name, \ + .regulators_node = "regulators", \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pf8x00_vsnvs_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = PF8X00_VSNVS, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = (base), \ + .vsel_mask = 0x3, \ + }, \ + } + +static struct pf8x00_regulator_data pf8x00_regs_data[PF8X00_MAX_REGULATORS] = { + PF8X00LDO(1, "ldo1", PF8X00_LDO_BASE(PF8X00_LDO1), pf8x00_ldo_voltages), + PF8X00LDO(2, "ldo2", PF8X00_LDO_BASE(PF8X00_LDO2), pf8x00_ldo_voltages), + PF8X00LDO(3, "ldo3", PF8X00_LDO_BASE(PF8X00_LDO3), pf8x00_ldo_voltages), + PF8X00LDO(4, "ldo4", PF8X00_LDO_BASE(PF8X00_LDO4), pf8x00_ldo_voltages), + PF8X00BUCK(1, "buck1", PF8X00_SW_BASE(PF8X00_BUCK1), pf8x00_sw1_to_6_voltages), + PF8X00BUCK(2, "buck2", PF8X00_SW_BASE(PF8X00_BUCK2), pf8x00_sw1_to_6_voltages), + PF8X00BUCK(3, "buck3", PF8X00_SW_BASE(PF8X00_BUCK3), pf8x00_sw1_to_6_voltages), + PF8X00BUCK(4, "buck4", PF8X00_SW_BASE(PF8X00_BUCK4), pf8x00_sw1_to_6_voltages), + PF8X00BUCK(5, "buck5", PF8X00_SW_BASE(PF8X00_BUCK5), pf8x00_sw1_to_6_voltages), + PF8X00BUCK(6, "buck6", PF8X00_SW_BASE(PF8X00_BUCK6), pf8x00_sw1_to_6_voltages), + PF8X00BUCK7("buck7", PF8X00_SW_BASE(PF8X00_BUCK7), pf8x00_sw7_voltages), + PF8X00VSNVS("vsnvs", PF8X00_VSNVS_CONFIG1, pf8x00_vsnvs_voltages), +}; + +static int pf8x00_identify(struct pf8x00_chip *chip) +{ + unsigned int value; + u8 dev_fam, dev_id; + const char *name = NULL; + int ret; + + ret = regmap_read(chip->regmap, PF8X00_DEVICEID, &value); + if (ret) { + dev_err(chip->dev, "failed to read chip family\n"); + return ret; + } + + dev_fam = value & PF8X00_DEVICE_FAM_MASK; + switch (dev_fam) { + case PF8X00_FAM: + break; + default: + dev_err(chip->dev, + "Chip 0x%x is not from PF8X00 family\n", dev_fam); + return ret; + } + + dev_id = value & PF8X00_DEVICE_ID_MASK; + switch (dev_id) { + case PF8100: + name = "PF8100"; + break; + case PF8121A: + name = "PF8121A"; + break; + case PF8200: + name = "PF8200"; + break; + default: + dev_err(chip->dev, "Unknown pf8x00 device id 0x%x\n", dev_id); + return -ENODEV; + } + + dev_info(chip->dev, "%s PMIC found.\n", name); + + return 0; +} + +static int pf8x00_i2c_probe(struct i2c_client *client) +{ + struct regulator_config config = { NULL, }; + struct pf8x00_chip *chip; + int id; + int ret; + + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + i2c_set_clientdata(client, chip); + chip->dev = &client->dev; + + chip->regmap = devm_regmap_init_i2c(client, &pf8x00_regmap_config); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + dev_err(&client->dev, + "regmap allocation failed with err %d\n", ret); + return ret; + } + + ret = pf8x00_identify(chip); + if (ret) + return ret; + + for (id = 0; id < ARRAY_SIZE(pf8x00_regs_data); id++) { + struct pf8x00_regulator_data *data = &pf8x00_regs_data[id]; + struct regulator_dev *rdev; + + config.dev = chip->dev; + config.driver_data = data; + config.regmap = chip->regmap; + + rdev = devm_regulator_register(&client->dev, &data->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&client->dev, + "failed to register %s regulator\n", data->desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id pf8x00_dt_ids[] = { + { .compatible = "nxp,pf8100",}, + { .compatible = "nxp,pf8121a",}, + { .compatible = "nxp,pf8200",}, + { } +}; +MODULE_DEVICE_TABLE(of, pf8x00_dt_ids); + +static const struct i2c_device_id pf8x00_i2c_id[] = { + { .name = "pf8100" }, + { .name = "pf8121a" }, + { .name = "pf8200" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pf8x00_i2c_id); + +static struct i2c_driver pf8x00_regulator_driver = { + .id_table = pf8x00_i2c_id, + .driver = { + .name = "pf8x00", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = pf8x00_dt_ids, + }, + .probe = pf8x00_i2c_probe, +}; +module_i2c_driver(pf8x00_regulator_driver); + +MODULE_AUTHOR("Jagan Teki "); +MODULE_AUTHOR("Troy Kisky "); +MODULE_DESCRIPTION("Regulator Driver for NXP's PF8100/PF8121A/PF8200 PMIC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/pf9453-regulator.c b/drivers/regulator/pf9453-regulator.c new file mode 100644 index 000000000..07cbcd312 --- /dev/null +++ b/drivers/regulator/pf9453-regulator.c @@ -0,0 +1,873 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2024 NXP. + * NXP PF9453 pmic driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct pf9453_dvs_config { + unsigned int run_reg; /* dvs0 */ + unsigned int run_mask; + unsigned int standby_reg; /* dvs1 */ + unsigned int standby_mask; +}; + +struct pf9453_regulator_desc { + struct regulator_desc desc; + const struct pf9453_dvs_config dvs; +}; + +struct pf9453 { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *sd_vsel_gpio; + int irq; +}; + +enum { + PF9453_BUCK1 = 0, + PF9453_BUCK2, + PF9453_BUCK3, + PF9453_BUCK4, + PF9453_LDO1, + PF9453_LDO2, + PF9453_LDOSNVS, + PF9453_REGULATOR_CNT +}; + +enum { + PF9453_DVS_LEVEL_RUN = 0, + PF9453_DVS_LEVEL_STANDBY, + PF9453_DVS_LEVEL_DPSTANDBY, + PF9453_DVS_LEVEL_MAX +}; + +#define PF9453_BUCK1_VOLTAGE_NUM 0x80 +#define PF9453_BUCK2_VOLTAGE_NUM 0x80 +#define PF9453_BUCK3_VOLTAGE_NUM 0x80 +#define PF9453_BUCK4_VOLTAGE_NUM 0x80 + +#define PF9453_LDO1_VOLTAGE_NUM 0x65 +#define PF9453_LDO2_VOLTAGE_NUM 0x3b +#define PF9453_LDOSNVS_VOLTAGE_NUM 0x59 + +enum { + PF9453_REG_DEV_ID = 0x01, + PF9453_REG_INT1 = 0x02, + PF9453_REG_INT1_MASK = 0x03, + PF9453_REG_INT1_STATUS = 0x04, + PF9453_REG_VRFLT1_INT = 0x05, + PF9453_REG_VRFLT1_MASK = 0x06, + PF9453_REG_PWRON_STAT = 0x07, + PF9453_REG_RESET_CTRL = 0x08, + PF9453_REG_SW_RST = 0x09, + PF9453_REG_PWR_CTRL = 0x0a, + PF9453_REG_CONFIG1 = 0x0b, + PF9453_REG_CONFIG2 = 0x0c, + PF9453_REG_32K_CONFIG = 0x0d, + PF9453_REG_BUCK1CTRL = 0x10, + PF9453_REG_BUCK1OUT = 0x11, + PF9453_REG_BUCK2CTRL = 0x14, + PF9453_REG_BUCK2OUT = 0x15, + PF9453_REG_BUCK2OUT_STBY = 0x1d, + PF9453_REG_BUCK2OUT_MAX_LIMIT = 0x1f, + PF9453_REG_BUCK2OUT_MIN_LIMIT = 0x20, + PF9453_REG_BUCK3CTRL = 0x21, + PF9453_REG_BUCK3OUT = 0x22, + PF9453_REG_BUCK4CTRL = 0x2e, + PF9453_REG_BUCK4OUT = 0x2f, + PF9453_REG_LDO1OUT_L = 0x36, + PF9453_REG_LDO1CFG = 0x37, + PF9453_REG_LDO1OUT_H = 0x38, + PF9453_REG_LDOSNVS_CFG1 = 0x39, + PF9453_REG_LDOSNVS_CFG2 = 0x3a, + PF9453_REG_LDO2CFG = 0x3b, + PF9453_REG_LDO2OUT = 0x3c, + PF9453_REG_BUCK_POK = 0x3d, + PF9453_REG_LSW_CTRL1 = 0x40, + PF9453_REG_LSW_CTRL2 = 0x41, + PF9453_REG_LOCK = 0x4e, + PF9453_MAX_REG +}; + +#define PF9453_UNLOCK_KEY 0x5c +#define PF9453_LOCK_KEY 0x0 + +/* PF9453 BUCK ENMODE bits */ +#define BUCK_ENMODE_OFF 0x00 +#define BUCK_ENMODE_ONREQ 0x01 +#define BUCK_ENMODE_ONREQ_STBY 0x02 +#define BUCK_ENMODE_ONREQ_STBY_DPSTBY 0x03 + +/* PF9453 BUCK ENMODE bits */ +#define LDO_ENMODE_OFF 0x00 +#define LDO_ENMODE_ONREQ 0x01 +#define LDO_ENMODE_ONREQ_STBY 0x02 +#define LDO_ENMODE_ONREQ_STBY_DPSTBY 0x03 + +/* PF9453_REG_BUCK1_CTRL bits */ +#define BUCK1_AD 0x08 +#define BUCK1_FPWM 0x04 +#define BUCK1_ENMODE_MASK GENMASK(1, 0) + +/* PF9453_REG_BUCK2_CTRL bits */ +#define BUCK2_RAMP_MASK GENMASK(7, 6) +#define BUCK2_RAMP_25MV 0x0 +#define BUCK2_RAMP_12P5MV 0x1 +#define BUCK2_RAMP_6P25MV 0x2 +#define BUCK2_RAMP_3P125MV 0x3 +#define BUCK2_AD 0x08 +#define BUCK2_FPWM 0x04 +#define BUCK2_ENMODE_MASK GENMASK(1, 0) + +/* PF9453_REG_BUCK3_CTRL bits */ +#define BUCK3_AD 0x08 +#define BUCK3_FPWM 0x04 +#define BUCK3_ENMODE_MASK GENMASK(1, 0) + +/* PF9453_REG_BUCK4_CTRL bits */ +#define BUCK4_AD 0x08 +#define BUCK4_FPWM 0x04 +#define BUCK4_ENMODE_MASK GENMASK(1, 0) + +/* PF9453_REG_BUCK123_PRESET_EN bit */ +#define BUCK123_PRESET_EN 0x80 + +/* PF9453_BUCK1OUT bits */ +#define BUCK1OUT_MASK GENMASK(6, 0) + +/* PF9453_BUCK2OUT bits */ +#define BUCK2OUT_MASK GENMASK(6, 0) +#define BUCK2OUT_STBY_MASK GENMASK(6, 0) + +/* PF9453_REG_BUCK3OUT bits */ +#define BUCK3OUT_MASK GENMASK(6, 0) + +/* PF9453_REG_BUCK4OUT bits */ +#define BUCK4OUT_MASK GENMASK(6, 0) + +/* PF9453_REG_LDO1_VOLT bits */ +#define LDO1_EN_MASK GENMASK(1, 0) +#define LDO1OUT_MASK GENMASK(6, 0) + +/* PF9453_REG_LDO2_VOLT bits */ +#define LDO2_EN_MASK GENMASK(1, 0) +#define LDO2OUT_MASK GENMASK(6, 0) + +/* PF9453_REG_LDOSNVS_VOLT bits */ +#define LDOSNVS_EN_MASK GENMASK(0, 0) +#define LDOSNVSCFG1_MASK GENMASK(6, 0) + +/* PF9453_REG_IRQ bits */ +#define IRQ_RSVD 0x80 +#define IRQ_RSTB 0x40 +#define IRQ_ONKEY 0x20 +#define IRQ_RESETKEY 0x10 +#define IRQ_VR_FLT1 0x08 +#define IRQ_LOWVSYS 0x04 +#define IRQ_THERM_100 0x02 +#define IRQ_THERM_80 0x01 + +/* PF9453_REG_RESET_CTRL bits */ +#define WDOG_B_CFG_MASK GENMASK(7, 6) +#define WDOG_B_CFG_NONE 0x00 +#define WDOG_B_CFG_WARM 0x40 +#define WDOG_B_CFG_COLD 0x80 + +static const struct regmap_range pf9453_status_range = { + .range_min = PF9453_REG_INT1, + .range_max = PF9453_REG_PWRON_STAT, +}; + +static const struct regmap_access_table pf9453_volatile_regs = { + .yes_ranges = &pf9453_status_range, + .n_yes_ranges = 1, +}; + +static const struct regmap_config pf9453_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &pf9453_volatile_regs, + .max_register = PF9453_MAX_REG - 1, + .cache_type = REGCACHE_MAPLE, +}; + +/* + * BUCK2 + * BUCK2RAM[1:0] BUCK2 DVS ramp rate setting + * 00: 25mV/1usec + * 01: 25mV/2usec + * 10: 25mV/4usec + * 11: 25mV/8usec + */ +static const unsigned int pf9453_dvs_buck_ramp_table[] = { + 25000, 12500, 6250, 3125 +}; + +static bool is_reg_protect(uint reg) +{ + switch (reg) { + case PF9453_REG_BUCK1OUT: + case PF9453_REG_BUCK2OUT: + case PF9453_REG_BUCK3OUT: + case PF9453_REG_BUCK4OUT: + case PF9453_REG_LDO1OUT_L: + case PF9453_REG_LDO1OUT_H: + case PF9453_REG_LDO2OUT: + case PF9453_REG_LDOSNVS_CFG1: + case PF9453_REG_BUCK2OUT_MAX_LIMIT: + case PF9453_REG_BUCK2OUT_MIN_LIMIT: + return true; + default: + return false; + } +} + +static int pf9453_pmic_write(struct pf9453 *pf9453, unsigned int reg, u8 mask, unsigned int val) +{ + int ret = -EINVAL; + u8 data, key; + u32 rxBuf; + + /* If not updating entire register, perform a read-mod-write */ + data = val; + key = PF9453_UNLOCK_KEY; + + if (mask != 0xffU) { + /* Read data */ + ret = regmap_read(pf9453->regmap, reg, &rxBuf); + if (ret) { + dev_err(pf9453->dev, "Read reg=%0x error!\n", reg); + return ret; + } + data = (val & mask) | (rxBuf & (~mask)); + } + + if (reg < PF9453_MAX_REG) { + if (is_reg_protect(reg)) { + ret = regmap_raw_write(pf9453->regmap, PF9453_REG_LOCK, &key, 1U); + if (ret) { + dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); + return ret; + } + + ret = regmap_raw_write(pf9453->regmap, reg, &data, 1U); + if (ret) { + dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); + return ret; + } + + key = PF9453_LOCK_KEY; + ret = regmap_raw_write(pf9453->regmap, PF9453_REG_LOCK, &key, 1U); + if (ret) { + dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); + return ret; + } + } else { + ret = regmap_raw_write(pf9453->regmap, reg, &data, 1U); + if (ret) { + dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); + return ret; + } + } + } + + return ret; +} + +/** + * pf9453_regulator_enable_regmap - enable regulator for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * enable_reg and enable_mask fields in their descriptor and then use + * this as their enable() operation, saving some code. + * + * Return: %0 on success, or negative errno. + */ +static int pf9453_regulator_enable_regmap(struct regulator_dev *rdev) +{ + struct pf9453 *pf9453 = dev_get_drvdata(rdev->dev.parent); + unsigned int val; + + if (rdev->desc->enable_is_inverted) { + val = rdev->desc->disable_val; + } else { + val = rdev->desc->enable_val; + if (!val) + val = rdev->desc->enable_mask; + } + + return pf9453_pmic_write(pf9453, rdev->desc->enable_reg, rdev->desc->enable_mask, val); +} + +/** + * pf9453_regulator_disable_regmap - disable regulator for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * enable_reg and enable_mask fields in their descriptor and then use + * this as their disable() operation, saving some code. + * + * Return: %0 on success, or negative errno. + */ +static int pf9453_regulator_disable_regmap(struct regulator_dev *rdev) +{ + struct pf9453 *pf9453 = dev_get_drvdata(rdev->dev.parent); + unsigned int val; + + if (rdev->desc->enable_is_inverted) { + val = rdev->desc->enable_val; + if (!val) + val = rdev->desc->enable_mask; + } else { + val = rdev->desc->disable_val; + } + + return pf9453_pmic_write(pf9453, rdev->desc->enable_reg, rdev->desc->enable_mask, val); +} + +/** + * pf9453_regulator_set_voltage_sel_regmap - set voltage for regmap users + * + * @rdev: regulator to operate on + * @sel: Selector to set + * + * Regulators that use regmap for their register I/O can set the + * vsel_reg and vsel_mask fields in their descriptor and then use this + * as their set_voltage_vsel operation, saving some code. + * + * Return: %0 on success, or negative errno. + */ +static int pf9453_regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned int sel) +{ + struct pf9453 *pf9453 = dev_get_drvdata(rdev->dev.parent); + int ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + ret = pf9453_pmic_write(pf9453, rdev->desc->vsel_reg, rdev->desc->vsel_mask, sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = pf9453_pmic_write(pf9453, rdev->desc->apply_reg, + rdev->desc->apply_bit, rdev->desc->apply_bit); + return ret; +} + +static int find_closest_bigger(unsigned int target, const unsigned int *table, + unsigned int num_sel, unsigned int *sel) +{ + unsigned int s, tmp, max, maxsel = 0; + bool found = false; + + max = table[0]; + + for (s = 0; s < num_sel; s++) { + if (table[s] > max) { + max = table[s]; + maxsel = s; + } + if (table[s] >= target) { + if (!found || table[s] - target < tmp - target) { + tmp = table[s]; + *sel = s; + found = true; + if (tmp == target) + break; + } + } + } + + if (!found) { + *sel = maxsel; + return -EINVAL; + } + + return 0; +} + +/** + * pf9453_regulator_set_ramp_delay_regmap - set ramp delay for regmap users + * + * @rdev: regulator to operate on + * @ramp_delay: desired ramp delay value in microseconds + * + * Regulators that use regmap for their register I/O can set the ramp_reg + * and ramp_mask fields in their descriptor and then use this as their + * set_ramp_delay operation, saving some code. + * + * Return: %0 on success, or negative errno. + */ +static int pf9453_regulator_set_ramp_delay_regmap(struct regulator_dev *rdev, int ramp_delay) +{ + struct pf9453 *pf9453 = dev_get_drvdata(rdev->dev.parent); + unsigned int sel; + int ret; + + if (WARN_ON(!rdev->desc->n_ramp_values || !rdev->desc->ramp_delay_table)) + return -EINVAL; + + ret = find_closest_bigger(ramp_delay, rdev->desc->ramp_delay_table, + rdev->desc->n_ramp_values, &sel); + + if (ret) { + dev_warn(rdev_get_dev(rdev), + "Can't set ramp-delay %u, setting %u\n", ramp_delay, + rdev->desc->ramp_delay_table[sel]); + } + + sel <<= ffs(rdev->desc->ramp_mask) - 1; + + return pf9453_pmic_write(pf9453, rdev->desc->ramp_reg, + rdev->desc->ramp_mask, sel); +} + +static const struct regulator_ops pf9453_dvs_buck_regulator_ops = { + .enable = pf9453_regulator_enable_regmap, + .disable = pf9453_regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = pf9453_regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = pf9453_regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops pf9453_buck_regulator_ops = { + .enable = pf9453_regulator_enable_regmap, + .disable = pf9453_regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = pf9453_regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops pf9453_ldo_regulator_ops = { + .enable = pf9453_regulator_enable_regmap, + .disable = pf9453_regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = pf9453_regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +/* + * BUCK1/3/4 + * 0.60 to 3.775V (25mV step) + */ +static const struct linear_range pf9453_buck134_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x7F, 25000), +}; + +/* + * BUCK2 + * 0.60 to 2.1875V (12.5mV step) + */ +static const struct linear_range pf9453_buck2_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x7F, 12500), +}; + +/* + * LDO1 + * 0.8 to 3.3V (25mV step) + */ +static const struct linear_range pf9453_ldo1_volts[] = { + REGULATOR_LINEAR_RANGE(800000, 0x00, 0x64, 25000), +}; + +/* + * LDO2 + * 0.5 to 1.95V (25mV step) + */ +static const struct linear_range pf9453_ldo2_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x3A, 25000), +}; + +/* + * LDOSNVS + * 1.2 to 3.4V (25mV step) + */ +static const struct linear_range pf9453_ldosnvs_volts[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x58, 25000), +}; + +static int buck_set_dvs(const struct regulator_desc *desc, + struct device_node *np, struct pf9453 *pf9453, + char *prop, unsigned int reg, unsigned int mask) +{ + int ret, i; + u32 uv; + + ret = of_property_read_u32(np, prop, &uv); + if (ret == -EINVAL) + return 0; + else if (ret) + return ret; + + for (i = 0; i < desc->n_voltages; i++) { + ret = regulator_desc_list_voltage_linear_range(desc, i); + if (ret < 0) + continue; + if (ret == uv) { + i <<= ffs(desc->vsel_mask) - 1; + ret = pf9453_pmic_write(pf9453, reg, mask, i); + break; + } + } + + return ret; +} + +static int pf9453_set_dvs_levels(struct device_node *np, const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + const struct pf9453_regulator_desc *data = container_of_const(desc, + struct pf9453_regulator_desc, + desc); + struct pf9453 *pf9453 = dev_get_drvdata(cfg->dev); + const struct pf9453_dvs_config *dvs = &data->dvs; + unsigned int reg, mask; + int i, ret = 0; + char *prop; + + for (i = 0; i < PF9453_DVS_LEVEL_MAX; i++) { + switch (i) { + case PF9453_DVS_LEVEL_RUN: + prop = "nxp,dvs-run-voltage"; + reg = dvs->run_reg; + mask = dvs->run_mask; + break; + case PF9453_DVS_LEVEL_DPSTANDBY: + case PF9453_DVS_LEVEL_STANDBY: + prop = "nxp,dvs-standby-voltage"; + reg = dvs->standby_reg; + mask = dvs->standby_mask; + break; + default: + return -EINVAL; + } + + ret = buck_set_dvs(desc, np, pf9453, prop, reg, mask); + if (ret) + break; + } + + return ret; +} + +static const struct pf9453_regulator_desc pf9453_regulators[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("BUCK1"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_BUCK1, + .ops = &pf9453_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_BUCK1_VOLTAGE_NUM, + .linear_ranges = pf9453_buck134_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_buck134_volts), + .vsel_reg = PF9453_REG_BUCK1OUT, + .vsel_mask = BUCK1OUT_MASK, + .enable_reg = PF9453_REG_BUCK1CTRL, + .enable_mask = BUCK1_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("BUCK2"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_BUCK2, + .ops = &pf9453_dvs_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_BUCK2_VOLTAGE_NUM, + .linear_ranges = pf9453_buck2_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_buck2_volts), + .vsel_reg = PF9453_REG_BUCK2OUT, + .vsel_mask = BUCK2OUT_MASK, + .enable_reg = PF9453_REG_BUCK2CTRL, + .enable_mask = BUCK2_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .ramp_reg = PF9453_REG_BUCK2CTRL, + .ramp_mask = BUCK2_RAMP_MASK, + .ramp_delay_table = pf9453_dvs_buck_ramp_table, + .n_ramp_values = ARRAY_SIZE(pf9453_dvs_buck_ramp_table), + .owner = THIS_MODULE, + .of_parse_cb = pf9453_set_dvs_levels, + }, + .dvs = { + .run_reg = PF9453_REG_BUCK2OUT, + .run_mask = BUCK2OUT_MASK, + .standby_reg = PF9453_REG_BUCK2OUT_STBY, + .standby_mask = BUCK2OUT_STBY_MASK, + }, + }, + { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("BUCK3"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_BUCK3, + .ops = &pf9453_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_BUCK3_VOLTAGE_NUM, + .linear_ranges = pf9453_buck134_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_buck134_volts), + .vsel_reg = PF9453_REG_BUCK3OUT, + .vsel_mask = BUCK3OUT_MASK, + .enable_reg = PF9453_REG_BUCK3CTRL, + .enable_mask = BUCK3_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("BUCK4"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_BUCK4, + .ops = &pf9453_buck_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_BUCK4_VOLTAGE_NUM, + .linear_ranges = pf9453_buck134_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_buck134_volts), + .vsel_reg = PF9453_REG_BUCK4OUT, + .vsel_mask = BUCK4OUT_MASK, + .enable_reg = PF9453_REG_BUCK4CTRL, + .enable_mask = BUCK4_ENMODE_MASK, + .enable_val = BUCK_ENMODE_ONREQ, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("LDO1"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_LDO1, + .ops = &pf9453_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_LDO1_VOLTAGE_NUM, + .linear_ranges = pf9453_ldo1_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_ldo1_volts), + .vsel_reg = PF9453_REG_LDO1OUT_H, + .vsel_mask = LDO1OUT_MASK, + .enable_reg = PF9453_REG_LDO1CFG, + .enable_mask = LDO1_EN_MASK, + .enable_val = LDO_ENMODE_ONREQ, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("LDO2"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_LDO2, + .ops = &pf9453_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_LDO2_VOLTAGE_NUM, + .linear_ranges = pf9453_ldo2_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_ldo2_volts), + .vsel_reg = PF9453_REG_LDO2OUT, + .vsel_mask = LDO2OUT_MASK, + .enable_reg = PF9453_REG_LDO2CFG, + .enable_mask = LDO2_EN_MASK, + .enable_val = LDO_ENMODE_ONREQ, + .owner = THIS_MODULE, + }, + }, + { + .desc = { + .name = "ldosnvs", + .of_match = of_match_ptr("LDO-SNVS"), + .regulators_node = of_match_ptr("regulators"), + .id = PF9453_LDOSNVS, + .ops = &pf9453_ldo_regulator_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = PF9453_LDOSNVS_VOLTAGE_NUM, + .linear_ranges = pf9453_ldosnvs_volts, + .n_linear_ranges = ARRAY_SIZE(pf9453_ldosnvs_volts), + .vsel_reg = PF9453_REG_LDOSNVS_CFG1, + .vsel_mask = LDOSNVSCFG1_MASK, + .enable_reg = PF9453_REG_LDOSNVS_CFG2, + .enable_mask = LDOSNVS_EN_MASK, + .owner = THIS_MODULE, + }, + }, + { } +}; + +static irqreturn_t pf9453_irq_handler(int irq, void *data) +{ + struct pf9453 *pf9453 = data; + struct regmap *regmap = pf9453->regmap; + unsigned int status; + int ret; + + ret = regmap_read(regmap, PF9453_REG_INT1, &status); + if (ret < 0) { + dev_err(pf9453->dev, "Failed to read INT1(%d)\n", ret); + return IRQ_NONE; + } + + if (!status) + return IRQ_NONE; + + if (status & IRQ_RSTB) + dev_warn(pf9453->dev, "IRQ_RSTB interrupt.\n"); + + if (status & IRQ_ONKEY) + dev_warn(pf9453->dev, "IRQ_ONKEY interrupt.\n"); + + if (status & IRQ_VR_FLT1) + dev_warn(pf9453->dev, "VRFLT1 interrupt.\n"); + + if (status & IRQ_RESETKEY) + dev_warn(pf9453->dev, "IRQ_RESETKEY interrupt.\n"); + + if (status & IRQ_LOWVSYS) + dev_warn(pf9453->dev, "LOWVSYS interrupt.\n"); + + if (status & IRQ_THERM_100) + dev_warn(pf9453->dev, "IRQ_THERM_100 interrupt.\n"); + + if (status & IRQ_THERM_80) + dev_warn(pf9453->dev, "IRQ_THERM_80 interrupt.\n"); + + return IRQ_HANDLED; +} + +static int pf9453_i2c_probe(struct i2c_client *i2c) +{ + const struct pf9453_regulator_desc *regulator_desc = of_device_get_match_data(&i2c->dev); + struct regulator_config config = { }; + unsigned int reset_ctrl; + unsigned int device_id; + struct pf9453 *pf9453; + int ret; + + if (!i2c->irq) + return dev_err_probe(&i2c->dev, -EINVAL, "No IRQ configured?\n"); + + pf9453 = devm_kzalloc(&i2c->dev, sizeof(struct pf9453), GFP_KERNEL); + if (!pf9453) + return -ENOMEM; + + pf9453->regmap = devm_regmap_init_i2c(i2c, &pf9453_regmap_config); + if (IS_ERR(pf9453->regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(pf9453->regmap), + "regmap initialization failed\n"); + + pf9453->irq = i2c->irq; + pf9453->dev = &i2c->dev; + + dev_set_drvdata(&i2c->dev, pf9453); + + ret = regmap_read(pf9453->regmap, PF9453_REG_DEV_ID, &device_id); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Read device id error\n"); + + /* Check your board and dts for match the right pmic */ + if ((device_id >> 4) != 0xb) + return dev_err_probe(&i2c->dev, -EINVAL, "Device id(%x) mismatched\n", + device_id >> 4); + + while (regulator_desc->desc.name) { + const struct regulator_desc *desc; + struct regulator_dev *rdev; + + desc = ®ulator_desc->desc; + + config.regmap = pf9453->regmap; + config.dev = pf9453->dev; + + rdev = devm_regulator_register(pf9453->dev, desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(pf9453->dev, PTR_ERR(rdev), + "Failed to register regulator(%s)\n", desc->name); + + regulator_desc++; + } + + ret = devm_request_threaded_irq(pf9453->dev, pf9453->irq, NULL, pf9453_irq_handler, + (IRQF_ONESHOT | IRQF_SHARED), + "pf9453-irq", pf9453); + if (ret) + return dev_err_probe(pf9453->dev, ret, "Failed to request IRQ: %d\n", pf9453->irq); + + /* Unmask all interrupt except PWRON/WDOG/RSVD */ + ret = pf9453_pmic_write(pf9453, PF9453_REG_INT1_MASK, + IRQ_ONKEY | IRQ_RESETKEY | IRQ_RSTB | IRQ_VR_FLT1 + | IRQ_LOWVSYS | IRQ_THERM_100 | IRQ_THERM_80, IRQ_RSVD); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Unmask irq error\n"); + + if (of_property_read_bool(i2c->dev.of_node, "nxp,wdog_b-warm-reset")) + reset_ctrl = WDOG_B_CFG_WARM; + else + reset_ctrl = WDOG_B_CFG_COLD; + + /* Set reset behavior on assertion of WDOG_B signal */ + ret = pf9453_pmic_write(pf9453, PF9453_REG_RESET_CTRL, WDOG_B_CFG_MASK, reset_ctrl); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to set WDOG_B reset behavior\n"); + + /* + * The driver uses the LDO1OUT_H register to control the LDO1 regulator. + * This is only valid if the SD_VSEL input of the PMIC is high. Let's + * check if the pin is available as GPIO and set it to high. + */ + pf9453->sd_vsel_gpio = gpiod_get_optional(pf9453->dev, "sd-vsel", GPIOD_OUT_HIGH); + + if (IS_ERR(pf9453->sd_vsel_gpio)) + return dev_err_probe(&i2c->dev, PTR_ERR(pf9453->sd_vsel_gpio), + "Failed to get SD_VSEL GPIO\n"); + + return 0; +} + +static const struct of_device_id pf9453_of_match[] = { + { + .compatible = "nxp,pf9453", + .data = pf9453_regulators, + }, + { } +}; +MODULE_DEVICE_TABLE(of, pf9453_of_match); + +static struct i2c_driver pf9453_i2c_driver = { + .driver = { + .name = "nxp-pf9453", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = pf9453_of_match, + }, + .probe = pf9453_i2c_probe, +}; + +module_i2c_driver(pf9453_i2c_driver); + +MODULE_AUTHOR("Joy Zou "); +MODULE_DESCRIPTION("NXP PF9453 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c new file mode 100644 index 000000000..d3a0e2505 --- /dev/null +++ b/drivers/regulator/pfuze100-regulator.c @@ -0,0 +1,876 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PFUZE_FLAG_DISABLE_SW BIT(1) + +#define PFUZE_NUMREGS 128 +#define PFUZE100_VOL_OFFSET 0 +#define PFUZE100_STANDBY_OFFSET 1 +#define PFUZE100_MODE_OFFSET 3 +#define PFUZE100_CONF_OFFSET 4 + +#define PFUZE100_DEVICEID 0x0 +#define PFUZE100_REVID 0x3 +#define PFUZE100_FABID 0x4 + +#define PFUZE100_COINVOL 0x1a +#define PFUZE100_SW1ABVOL 0x20 +#define PFUZE100_SW1ABMODE 0x23 +#define PFUZE100_SW1CVOL 0x2e +#define PFUZE100_SW1CMODE 0x31 +#define PFUZE100_SW2VOL 0x35 +#define PFUZE100_SW2MODE 0x38 +#define PFUZE100_SW3AVOL 0x3c +#define PFUZE100_SW3AMODE 0x3f +#define PFUZE100_SW3BVOL 0x43 +#define PFUZE100_SW3BMODE 0x46 +#define PFUZE100_SW4VOL 0x4a +#define PFUZE100_SW4MODE 0x4d +#define PFUZE100_SWBSTCON1 0x66 +#define PFUZE100_VREFDDRCON 0x6a +#define PFUZE100_VSNVSVOL 0x6b +#define PFUZE100_VGEN1VOL 0x6c +#define PFUZE100_VGEN2VOL 0x6d +#define PFUZE100_VGEN3VOL 0x6e +#define PFUZE100_VGEN4VOL 0x6f +#define PFUZE100_VGEN5VOL 0x70 +#define PFUZE100_VGEN6VOL 0x71 + +#define PFUZE100_SWxMODE_MASK 0xf +#define PFUZE100_SWxMODE_APS_APS 0x8 +#define PFUZE100_SWxMODE_APS_OFF 0x4 + +#define PFUZE100_VGENxLPWR BIT(6) +#define PFUZE100_VGENxSTBY BIT(5) + +enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3, PFUZE3001 = 0x31, }; + +struct pfuze_regulator { + struct regulator_desc desc; + unsigned char stby_reg; + unsigned char stby_mask; + bool sw_reg; +}; + +struct pfuze_chip { + int chip_id; + int flags; + struct regmap *regmap; + struct device *dev; + struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR]; + struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR]; + const struct pfuze_regulator *pfuze_regulators; +}; + +static const int pfuze100_swbst[] = { + 5000000, 5050000, 5100000, 5150000, +}; + +static const int pfuze100_vsnvs[] = { + 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000, +}; + +static const int pfuze100_coin[] = { + 2500000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, +}; + +static const int pfuze3000_sw1a[] = { + 700000, 725000, 750000, 775000, 800000, 825000, 850000, 875000, + 900000, 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, + 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, + 1300000, 1325000, 1350000, 1375000, 1400000, 1425000, 1800000, 3300000, +}; + +static const int pfuze3000_sw2lo[] = { + 1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, +}; + +static const int pfuze3000_sw2hi[] = { + 2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000, +}; + +static const struct of_device_id pfuze_dt_ids[] = { + { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100}, + { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200}, + { .compatible = "fsl,pfuze3000", .data = (void *)PFUZE3000}, + { .compatible = "fsl,pfuze3001", .data = (void *)PFUZE3001}, + { } +}; +MODULE_DEVICE_TABLE(of, pfuze_dt_ids); + +static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + bool reg_has_ramp_delay; + unsigned int ramp_bits = 0; + int ret; + + switch (pfuze100->chip_id) { + case PFUZE3001: + /* no dynamic voltage scaling for PF3001 */ + reg_has_ramp_delay = false; + break; + case PFUZE3000: + reg_has_ramp_delay = (id < PFUZE3000_SWBST); + break; + case PFUZE200: + reg_has_ramp_delay = (id < PFUZE200_SWBST); + break; + case PFUZE100: + default: + reg_has_ramp_delay = (id < PFUZE100_SWBST); + break; + } + + if (reg_has_ramp_delay) { + if (ramp_delay > 0) { + ramp_delay = 12500 / ramp_delay; + ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3); + } + + ret = regmap_update_bits(pfuze100->regmap, + rdev->desc->vsel_reg + 4, + 0xc0, ramp_bits << 6); + if (ret < 0) + dev_err(pfuze100->dev, "ramp failed, err %d\n", ret); + } else { + ret = -EACCES; + } + + return ret; +} + +static int pfuze100_ldo_set_suspend_disable(struct regulator_dev *rdev) +{ + struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct pfuze_regulator *desc = &pfuze100->regulator_descs[id]; + + /* + * Set the standby bit so the LDO output is turned off when the PMIC + * receives a STANDBY event, using the per-regulator stby_reg/stby_mask + * that describe the standby control for each LDO. + * + * The stby_mask only covers the VGENxSTBY bit. The VGENxLPWR stays at + * its reset value of 0, so the LDO is switched off rather than put + * into low-power mode. + */ + return regmap_update_bits(pfuze100->regmap, desc->stby_reg, + desc->stby_mask, desc->stby_mask); +} + +static const struct regulator_ops pfuze100_ldo_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_suspend_disable = pfuze100_ldo_set_suspend_disable, +}; + +static const struct regulator_ops pfuze100_fixed_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops pfuze100_sw_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = pfuze100_set_ramp_delay, +}; + +static const struct regulator_ops pfuze100_sw_disable_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = pfuze100_set_ramp_delay, +}; + +static const struct regulator_ops pfuze100_swb_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + +}; + +static const struct regulator_ops pfuze3000_sw_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = pfuze100_set_ramp_delay, + +}; + +#define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name, \ + .n_voltages = 1, \ + .ops = &pfuze100_fixed_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (voltage), \ + .enable_reg = (base), \ + .enable_mask = 0x10, \ + }, \ + } + +#define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name,\ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pfuze100_sw_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \ + .vsel_mask = 0x3f, \ + .enable_reg = (base) + PFUZE100_MODE_OFFSET, \ + .enable_mask = 0xf, \ + }, \ + .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \ + .stby_mask = 0x3f, \ + .sw_reg = true, \ + } + +#define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name, \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pfuze100_swb_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = (base), \ + .vsel_mask = (mask), \ + .enable_reg = (base), \ + .enable_mask = 0x48, \ + }, \ + } + +#define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pfuze100_ldo_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base), \ + .vsel_mask = 0xf, \ + .enable_reg = (base), \ + .enable_mask = 0x10, \ + }, \ + .stby_reg = (base), \ + .stby_mask = 0x20, \ + } + +#define PFUZE100_COIN_REG(_chip, _name, base, mask, voltages) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name, \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pfuze100_swb_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = (base), \ + .vsel_mask = (mask), \ + .enable_reg = (base), \ + .enable_mask = 0x8, \ + }, \ + } + +#define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step) { \ + .desc = { \ + .name = #_name, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pfuze100_ldo_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base), \ + .vsel_mask = 0x3, \ + .enable_reg = (base), \ + .enable_mask = 0x10, \ + }, \ + .stby_reg = (base), \ + .stby_mask = 0x20, \ +} + +/* No linar case for the some switches of PFUZE3000 */ +#define PFUZE3000_SW_REG(_chip, _name, base, mask, voltages) \ + [_chip ## _ ## _name] = { \ + .desc = { \ + .name = #_name, \ + .n_voltages = ARRAY_SIZE(voltages), \ + .ops = &pfuze3000_sw_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .volt_table = voltages, \ + .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \ + .vsel_mask = (mask), \ + .enable_reg = (base) + PFUZE100_MODE_OFFSET, \ + .enable_mask = 0xf, \ + .enable_val = 0x8, \ + .enable_time = 500, \ + }, \ + .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \ + .stby_mask = (mask), \ + .sw_reg = true, \ + } + +#define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step) { \ + .desc = { \ + .name = #_name,\ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .ops = &pfuze100_sw_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = _chip ## _ ## _name, \ + .owner = THIS_MODULE, \ + .min_uV = (min), \ + .uV_step = (step), \ + .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \ + .vsel_mask = 0xf, \ + }, \ + .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \ + .stby_mask = 0xf, \ +} + +/* PFUZE100 */ +static const struct pfuze_regulator pfuze100_regulators[] = { + PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), + PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000), + PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), + PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), + PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), + PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000), + PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), + PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), + PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000), + PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), + PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), + PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), + PFUZE100_COIN_REG(PFUZE100, COIN, PFUZE100_COINVOL, 0x7, pfuze100_coin), +}; + +static const struct pfuze_regulator pfuze200_regulators[] = { + PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), + PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), + PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), + PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), + PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), + PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), + PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000), + PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), + PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), + PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), + PFUZE100_COIN_REG(PFUZE200, COIN, PFUZE100_COINVOL, 0x7, pfuze100_coin), +}; + +static const struct pfuze_regulator pfuze3000_regulators[] = { + PFUZE3000_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a), + PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000), + PFUZE3000_SW_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo), + PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000), + PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst), + PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), + PFUZE100_FIXED_REG(PFUZE3000, VREFDDR, PFUZE100_VREFDDRCON, 750000), + PFUZE100_VGEN_REG(PFUZE3000, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE3000, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), + PFUZE3000_VCC_REG(PFUZE3000, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000), + PFUZE3000_VCC_REG(PFUZE3000, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000), + PFUZE100_VGEN_REG(PFUZE3000, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE3000, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), +}; + +static const struct pfuze_regulator pfuze3001_regulators[] = { + PFUZE3000_SW_REG(PFUZE3001, SW1, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a), + PFUZE3000_SW_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo), + PFUZE3000_SW3_REG(PFUZE3001, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000), + PFUZE100_SWB_REG(PFUZE3001, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), + PFUZE100_VGEN_REG(PFUZE3001, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE3001, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), + PFUZE3000_VCC_REG(PFUZE3001, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000), + PFUZE3000_VCC_REG(PFUZE3001, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000), + PFUZE100_VGEN_REG(PFUZE3001, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), + PFUZE100_VGEN_REG(PFUZE3001, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), +}; + +/* PFUZE100 */ +static struct of_regulator_match pfuze100_matches[] = { + { .name = "sw1ab", }, + { .name = "sw1c", }, + { .name = "sw2", }, + { .name = "sw3a", }, + { .name = "sw3b", }, + { .name = "sw4", }, + { .name = "swbst", }, + { .name = "vsnvs", }, + { .name = "vrefddr", }, + { .name = "vgen1", }, + { .name = "vgen2", }, + { .name = "vgen3", }, + { .name = "vgen4", }, + { .name = "vgen5", }, + { .name = "vgen6", }, + { .name = "coin", }, +}; + +/* PFUZE200 */ +static struct of_regulator_match pfuze200_matches[] = { + + { .name = "sw1ab", }, + { .name = "sw2", }, + { .name = "sw3a", }, + { .name = "sw3b", }, + { .name = "swbst", }, + { .name = "vsnvs", }, + { .name = "vrefddr", }, + { .name = "vgen1", }, + { .name = "vgen2", }, + { .name = "vgen3", }, + { .name = "vgen4", }, + { .name = "vgen5", }, + { .name = "vgen6", }, + { .name = "coin", }, +}; + +/* PFUZE3000 */ +static struct of_regulator_match pfuze3000_matches[] = { + + { .name = "sw1a", }, + { .name = "sw1b", }, + { .name = "sw2", }, + { .name = "sw3", }, + { .name = "swbst", }, + { .name = "vsnvs", }, + { .name = "vrefddr", }, + { .name = "vldo1", }, + { .name = "vldo2", }, + { .name = "vccsd", }, + { .name = "v33", }, + { .name = "vldo3", }, + { .name = "vldo4", }, +}; + +/* PFUZE3001 */ +static struct of_regulator_match pfuze3001_matches[] = { + + { .name = "sw1", }, + { .name = "sw2", }, + { .name = "sw3", }, + { .name = "vsnvs", }, + { .name = "vldo1", }, + { .name = "vldo2", }, + { .name = "vccsd", }, + { .name = "v33", }, + { .name = "vldo3", }, + { .name = "vldo4", }, +}; + +static struct of_regulator_match *pfuze_matches; + +static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) +{ + struct device *dev = chip->dev; + struct device_node *np, *parent; + int ret; + + np = of_node_get(dev->of_node); + if (!np) + return -EINVAL; + + if (of_property_read_bool(np, "fsl,pfuze-support-disable-sw")) + chip->flags |= PFUZE_FLAG_DISABLE_SW; + + parent = of_get_child_by_name(np, "regulators"); + if (!parent) { + dev_err(dev, "regulators node not found\n"); + of_node_put(np); + return -EINVAL; + } + + switch (chip->chip_id) { + case PFUZE3001: + pfuze_matches = pfuze3001_matches; + ret = of_regulator_match(dev, parent, pfuze3001_matches, + ARRAY_SIZE(pfuze3001_matches)); + break; + case PFUZE3000: + pfuze_matches = pfuze3000_matches; + ret = of_regulator_match(dev, parent, pfuze3000_matches, + ARRAY_SIZE(pfuze3000_matches)); + break; + case PFUZE200: + pfuze_matches = pfuze200_matches; + ret = of_regulator_match(dev, parent, pfuze200_matches, + ARRAY_SIZE(pfuze200_matches)); + break; + + case PFUZE100: + default: + pfuze_matches = pfuze100_matches; + ret = of_regulator_match(dev, parent, pfuze100_matches, + ARRAY_SIZE(pfuze100_matches)); + break; + } + + of_node_put(parent); + of_node_put(np); + if (ret < 0) { + dev_err(dev, "Error parsing regulator init data: %d\n", + ret); + return ret; + } + + return 0; +} + +static inline struct regulator_init_data *match_init_data(int index) +{ + return pfuze_matches[index].init_data; +} + +static inline struct device_node *match_of_node(int index) +{ + return pfuze_matches[index].of_node; +} + +static int pfuze_power_off_prepare(struct sys_off_data *data) +{ + struct pfuze_chip *syspm_pfuze_chip = data->cb_data; + + dev_info(syspm_pfuze_chip->dev, "Configure standby mode for power off"); + + /* Switch from default mode: APS/APS to APS/Off */ + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE, + PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF); + + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL, + PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, + PFUZE100_VGENxSTBY); + + return NOTIFY_DONE; +} + +static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip) +{ + int err; + + if (pfuze_chip->chip_id != PFUZE100) { + dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare handler for not supported chip\n"); + return -ENODEV; + } + + err = devm_register_sys_off_handler(pfuze_chip->dev, + SYS_OFF_MODE_POWER_OFF_PREPARE, + SYS_OFF_PRIO_DEFAULT, + pfuze_power_off_prepare, + pfuze_chip); + if (err) { + dev_err(pfuze_chip->dev, "failed to register sys-off handler: %d\n", + err); + return err; + } + + return 0; +} + +static int pfuze_identify(struct pfuze_chip *pfuze_chip) +{ + unsigned int value; + int ret; + + ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value); + if (ret) + return ret; + + if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) { + /* + * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 + * as ID=8 in PFUZE100 + */ + dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8"); + } else if ((value & 0x0f) != pfuze_chip->chip_id && + (value & 0xf0) >> 4 != pfuze_chip->chip_id && + (value != pfuze_chip->chip_id)) { + /* device id NOT match with your setting */ + dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value); + return -ENODEV; + } + + ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value); + if (ret) + return ret; + dev_info(pfuze_chip->dev, + "Full layer: %x, Metal layer: %x\n", + (value & 0xf0) >> 4, value & 0x0f); + + ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value); + if (ret) + return ret; + dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n", + (value & 0xc) >> 2, value & 0x3); + + return 0; +} + +static const struct regmap_config pfuze_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PFUZE_NUMREGS - 1, + .cache_type = REGCACHE_MAPLE, +}; + +static int pfuze100_regulator_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct pfuze_chip *pfuze_chip; + struct regulator_config config = { }; + int i, ret; + const struct of_device_id *match; + u32 regulator_num; + u32 sw_check_start, sw_check_end, sw_hi = 0x40; + + pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip), + GFP_KERNEL); + if (!pfuze_chip) + return -ENOMEM; + + if (client->dev.of_node) { + match = of_match_device(pfuze_dt_ids, &client->dev); + if (!match) { + dev_err(&client->dev, "Error: No device match found\n"); + return -ENODEV; + } + pfuze_chip->chip_id = (int)(long)match->data; + } else if (id) { + pfuze_chip->chip_id = id->driver_data; + } else { + dev_err(&client->dev, "No dts match or id table match found\n"); + return -ENODEV; + } + + i2c_set_clientdata(client, pfuze_chip); + pfuze_chip->dev = &client->dev; + + pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config); + if (IS_ERR(pfuze_chip->regmap)) { + ret = PTR_ERR(pfuze_chip->regmap); + dev_err(&client->dev, + "regmap allocation failed with err %d\n", ret); + return ret; + } + + ret = pfuze_identify(pfuze_chip); + if (ret) { + dev_err(&client->dev, "unrecognized pfuze chip ID!\n"); + return ret; + } + + /* use the right regulators after identify the right device */ + switch (pfuze_chip->chip_id) { + case PFUZE3001: + pfuze_chip->pfuze_regulators = pfuze3001_regulators; + regulator_num = ARRAY_SIZE(pfuze3001_regulators); + sw_check_start = PFUZE3001_SW2; + sw_check_end = PFUZE3001_SW2; + sw_hi = 1 << 3; + break; + case PFUZE3000: + pfuze_chip->pfuze_regulators = pfuze3000_regulators; + regulator_num = ARRAY_SIZE(pfuze3000_regulators); + sw_check_start = PFUZE3000_SW2; + sw_check_end = PFUZE3000_SW2; + sw_hi = 1 << 3; + break; + case PFUZE200: + pfuze_chip->pfuze_regulators = pfuze200_regulators; + regulator_num = ARRAY_SIZE(pfuze200_regulators); + sw_check_start = PFUZE200_SW2; + sw_check_end = PFUZE200_SW3B; + break; + case PFUZE100: + default: + pfuze_chip->pfuze_regulators = pfuze100_regulators; + regulator_num = ARRAY_SIZE(pfuze100_regulators); + sw_check_start = PFUZE100_SW2; + sw_check_end = PFUZE100_SW4; + break; + } + dev_info(&client->dev, "pfuze%s found.\n", + (pfuze_chip->chip_id == PFUZE100) ? "100" : + (((pfuze_chip->chip_id == PFUZE200) ? "200" : + ((pfuze_chip->chip_id == PFUZE3000) ? "3000" : "3001")))); + + memcpy(pfuze_chip->regulator_descs, pfuze_chip->pfuze_regulators, + regulator_num * sizeof(struct pfuze_regulator)); + + ret = pfuze_parse_regulators_dt(pfuze_chip); + if (ret) + return ret; + + for (i = 0; i < regulator_num; i++) { + struct regulator_init_data *init_data; + struct regulator_desc *desc; + int val; + + desc = &pfuze_chip->regulator_descs[i].desc; + + init_data = match_init_data(i); + + /* SW2~SW4 high bit check and modify the voltage value table */ + if (i >= sw_check_start && i <= sw_check_end) { + ret = regmap_read(pfuze_chip->regmap, + desc->vsel_reg, &val); + if (ret) { + dev_err(&client->dev, "Fails to read from the register.\n"); + return ret; + } + + if (val & sw_hi) { + if (pfuze_chip->chip_id == PFUZE3000 || + pfuze_chip->chip_id == PFUZE3001) { + desc->volt_table = pfuze3000_sw2hi; + desc->n_voltages = ARRAY_SIZE(pfuze3000_sw2hi); + } else { + desc->min_uV = 800000; + desc->uV_step = 50000; + desc->n_voltages = 51; + } + } + } + + /* + * Allow SW regulators to turn off. Checking it trough a flag is + * a workaround to keep the backward compatibility with existing + * old dtb's which may relay on the fact that we didn't disable + * the switched regulator till yet. + */ + if (pfuze_chip->flags & PFUZE_FLAG_DISABLE_SW) { + if (pfuze_chip->chip_id == PFUZE100 || + pfuze_chip->chip_id == PFUZE200) { + if (pfuze_chip->regulator_descs[i].sw_reg) { + desc->ops = &pfuze100_sw_disable_regulator_ops; + desc->enable_val = 0x8; + desc->disable_val = 0x0; + desc->enable_time = 500; + } + } + } + + config.dev = &client->dev; + config.init_data = init_data; + config.driver_data = pfuze_chip; + config.of_node = match_of_node(i); + + pfuze_chip->regulators[i] = + devm_regulator_register(&client->dev, desc, &config); + if (IS_ERR(pfuze_chip->regulators[i])) { + dev_err(&client->dev, "register regulator%s failed\n", + pfuze_chip->pfuze_regulators[i].desc.name); + return PTR_ERR(pfuze_chip->regulators[i]); + } + } + + if (of_property_read_bool(client->dev.of_node, + "fsl,pmic-stby-poweroff")) + return pfuze_power_off_prepare_init(pfuze_chip); + + return 0; +} + +static struct i2c_driver pfuze_driver = { + .driver = { + .name = "pfuze100-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = pfuze_dt_ids, + }, + .probe = pfuze100_regulator_probe, +}; +module_i2c_driver(pfuze_driver); + +MODULE_AUTHOR("Robin Gong "); +MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/200/3000/3001 PMIC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/pv88060-regulator.c b/drivers/regulator/pv88060-regulator.c new file mode 100644 index 000000000..375d9e759 --- /dev/null +++ b/drivers/regulator/pv88060-regulator.c @@ -0,0 +1,390 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// pv88060-regulator.c - Regulator device driver for PV88060 +// Copyright (C) 2015 Powerventure Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pv88060-regulator.h" + +#define PV88060_MAX_REGULATORS 14 + +/* PV88060 REGULATOR IDs */ +enum { + /* BUCKs */ + PV88060_ID_BUCK1, + + /* LDOs */ + PV88060_ID_LDO1, + PV88060_ID_LDO2, + PV88060_ID_LDO3, + PV88060_ID_LDO4, + PV88060_ID_LDO5, + PV88060_ID_LDO6, + PV88060_ID_LDO7, + + /* SWTs */ + PV88060_ID_SW1, + PV88060_ID_SW2, + PV88060_ID_SW3, + PV88060_ID_SW4, + PV88060_ID_SW5, + PV88060_ID_SW6, +}; + +struct pv88060_regulator { + struct regulator_desc desc; + unsigned int conf; /* buck configuration register */ +}; + +struct pv88060 { + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev[PV88060_MAX_REGULATORS]; +}; + +static const struct regmap_config pv88060_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +/* Current limits array (in uA) for BUCK1 + * Entry indexes corresponds to register values. + */ + +static const unsigned int pv88060_buck1_limits[] = { + 1496000, 2393000, 3291000, 4189000 +}; + +static unsigned int pv88060_buck_get_mode(struct regulator_dev *rdev) +{ + struct pv88060_regulator *info = rdev_get_drvdata(rdev); + unsigned int data; + int ret, mode = 0; + + ret = regmap_read(rdev->regmap, info->conf, &data); + if (ret < 0) + return ret; + + switch (data & PV88060_BUCK_MODE_MASK) { + case PV88060_BUCK_MODE_SYNC: + mode = REGULATOR_MODE_FAST; + break; + case PV88060_BUCK_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case PV88060_BUCK_MODE_SLEEP: + mode = REGULATOR_MODE_STANDBY; + break; + } + + return mode; +} + +static int pv88060_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct pv88060_regulator *info = rdev_get_drvdata(rdev); + int val = 0; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = PV88060_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = PV88060_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = PV88060_BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, info->conf, + PV88060_BUCK_MODE_MASK, val); +} + +static const struct regulator_ops pv88060_buck_ops = { + .get_mode = pv88060_buck_get_mode, + .set_mode = pv88060_buck_set_mode, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static const struct regulator_ops pv88060_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops pv88060_sw_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define PV88060_BUCK(chip, regl_name, min, step, max, limits_array) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88060_buck_ops,\ + .min_uV = min,\ + .uV_step = step,\ + .n_voltages = ((max) - (min))/(step) + 1,\ + .enable_reg = PV88060_REG_##regl_name##_CONF0,\ + .enable_mask = PV88060_BUCK_EN, \ + .vsel_reg = PV88060_REG_##regl_name##_CONF0,\ + .vsel_mask = PV88060_VBUCK_MASK,\ + .curr_table = limits_array,\ + .n_current_limits = ARRAY_SIZE(limits_array),\ + .csel_reg = PV88060_REG_##regl_name##_CONF1,\ + .csel_mask = PV88060_BUCK_ILIM_MASK,\ + },\ + .conf = PV88060_REG_##regl_name##_CONF1,\ +} + +#define PV88060_LDO(chip, regl_name, min, step, max) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88060_ldo_ops,\ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = (step) ? ((max - min) / step + 1) : 1, \ + .enable_reg = PV88060_REG_##regl_name##_CONF, \ + .enable_mask = PV88060_LDO_EN, \ + .vsel_reg = PV88060_REG_##regl_name##_CONF, \ + .vsel_mask = PV88060_VLDO_MASK, \ + },\ +} + +#define PV88060_SW(chip, regl_name, max) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88060_sw_ops,\ + .fixed_uV = max,\ + .n_voltages = 1,\ + .enable_reg = PV88060_REG_##regl_name##_CONF,\ + .enable_mask = PV88060_SW_EN,\ + },\ +} + +static const struct pv88060_regulator pv88060_regulator_info[] = { + PV88060_BUCK(PV88060, BUCK1, 2800000, 12500, 4387500, + pv88060_buck1_limits), + PV88060_LDO(PV88060, LDO1, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO2, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO3, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO4, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO5, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO6, 1200000, 50000, 3350000), + PV88060_LDO(PV88060, LDO7, 1200000, 50000, 3350000), + PV88060_SW(PV88060, SW1, 5000000), + PV88060_SW(PV88060, SW2, 5000000), + PV88060_SW(PV88060, SW3, 5000000), + PV88060_SW(PV88060, SW4, 5000000), + PV88060_SW(PV88060, SW5, 5000000), + PV88060_SW(PV88060, SW6, 5000000), +}; + +static irqreturn_t pv88060_irq_handler(int irq, void *data) +{ + struct pv88060 *chip = data; + int i, reg_val, err, ret = IRQ_NONE; + + err = regmap_read(chip->regmap, PV88060_REG_EVENT_A, ®_val); + if (err < 0) + goto error_i2c; + + if (reg_val & PV88060_E_VDD_FLT) { + for (i = 0; i < PV88060_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + } + + err = regmap_write(chip->regmap, PV88060_REG_EVENT_A, + PV88060_E_VDD_FLT); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + if (reg_val & PV88060_E_OVER_TEMP) { + for (i = 0; i < PV88060_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_OVER_TEMP, + NULL); + } + + err = regmap_write(chip->regmap, PV88060_REG_EVENT_A, + PV88060_E_OVER_TEMP); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + return ret; + +error_i2c: + dev_err(chip->dev, "I2C error : %d\n", err); + return IRQ_NONE; +} + +/* + * I2C driver interface functions + */ +static int pv88060_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev); + struct pv88060 *chip; + struct regulator_config config = { }; + int error, i, ret = 0; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct pv88060), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &i2c->dev; + chip->regmap = devm_regmap_init_i2c(i2c, &pv88060_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + i2c_set_clientdata(i2c, chip); + + if (i2c->irq != 0) { + ret = regmap_write(chip->regmap, PV88060_REG_MASK_A, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask A reg: %d\n", ret); + return ret; + } + + ret = regmap_write(chip->regmap, PV88060_REG_MASK_B, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask B reg: %d\n", ret); + return ret; + } + + ret = regmap_write(chip->regmap, PV88060_REG_MASK_C, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask C reg: %d\n", ret); + return ret; + } + + ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + pv88060_irq_handler, + IRQF_TRIGGER_LOW|IRQF_ONESHOT, + "pv88060", chip); + if (ret != 0) { + dev_err(chip->dev, "Failed to request IRQ: %d\n", + i2c->irq); + return ret; + } + + ret = regmap_update_bits(chip->regmap, PV88060_REG_MASK_A, + PV88060_M_VDD_FLT | PV88060_M_OVER_TEMP, 0); + if (ret < 0) { + dev_err(chip->dev, + "Failed to update mask reg: %d\n", ret); + return ret; + } + + } else { + dev_warn(chip->dev, "No IRQ configured\n"); + } + + config.dev = chip->dev; + config.regmap = chip->regmap; + + for (i = 0; i < PV88060_MAX_REGULATORS; i++) { + if (init_data) + config.init_data = &init_data[i]; + + config.driver_data = (void *)&pv88060_regulator_info[i]; + chip->rdev[i] = devm_regulator_register(chip->dev, + &pv88060_regulator_info[i].desc, &config); + if (IS_ERR(chip->rdev[i])) { + dev_err(chip->dev, + "Failed to register PV88060 regulator\n"); + return PTR_ERR(chip->rdev[i]); + } + } + + return 0; +} + +static const struct i2c_device_id pv88060_i2c_id[] = { + { .name = "pv88060" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pv88060_i2c_id); + +#ifdef CONFIG_OF +static const struct of_device_id pv88060_dt_ids[] = { + { .compatible = "pvs,pv88060", .data = &pv88060_i2c_id[0] }, + {}, +}; +MODULE_DEVICE_TABLE(of, pv88060_dt_ids); +#endif + +static struct i2c_driver pv88060_regulator_driver = { + .driver = { + .name = "pv88060", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(pv88060_dt_ids), + }, + .probe = pv88060_i2c_probe, + .id_table = pv88060_i2c_id, +}; + +module_i2c_driver(pv88060_regulator_driver); + +MODULE_AUTHOR("James Ban "); +MODULE_DESCRIPTION("Regulator device driver for Powerventure PV88060"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pv88060-regulator.h b/drivers/regulator/pv88060-regulator.h new file mode 100644 index 000000000..d333dbf3b --- /dev/null +++ b/drivers/regulator/pv88060-regulator.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * pv88060-regulator.h - Regulator definitions for PV88060 + * Copyright (C) 2015 Powerventure Semiconductor Ltd. + */ + +#ifndef __PV88060_REGISTERS_H__ +#define __PV88060_REGISTERS_H__ + +/* System Control and Event Registers */ +#define PV88060_REG_EVENT_A 0x04 +#define PV88060_REG_MASK_A 0x08 +#define PV88060_REG_MASK_B 0x09 +#define PV88060_REG_MASK_C 0x0A + +/* Regulator Registers */ +#define PV88060_REG_BUCK1_CONF0 0x1B +#define PV88060_REG_BUCK1_CONF1 0x1C +#define PV88060_REG_LDO1_CONF 0x1D +#define PV88060_REG_LDO2_CONF 0x1E +#define PV88060_REG_LDO3_CONF 0x1F +#define PV88060_REG_LDO4_CONF 0x20 +#define PV88060_REG_LDO5_CONF 0x21 +#define PV88060_REG_LDO6_CONF 0x22 +#define PV88060_REG_LDO7_CONF 0x23 + +#define PV88060_REG_SW1_CONF 0x3B +#define PV88060_REG_SW2_CONF 0x3C +#define PV88060_REG_SW3_CONF 0x3D +#define PV88060_REG_SW4_CONF 0x3E +#define PV88060_REG_SW5_CONF 0x3F +#define PV88060_REG_SW6_CONF 0x40 + +/* PV88060_REG_EVENT_A (addr=0x04) */ +#define PV88060_E_VDD_FLT 0x01 +#define PV88060_E_OVER_TEMP 0x02 + +/* PV88060_REG_MASK_A (addr=0x08) */ +#define PV88060_M_VDD_FLT 0x01 +#define PV88060_M_OVER_TEMP 0x02 + +/* PV88060_REG_BUCK1_CONF0 (addr=0x1B) */ +#define PV88060_BUCK_EN 0x80 +#define PV88060_VBUCK_MASK 0x7F +/* PV88060_REG_LDO1/2/3/4/5/6/7_CONT */ +#define PV88060_LDO_EN 0x40 +#define PV88060_VLDO_MASK 0x3F +/* PV88060_REG_SW1/2/3/4/5_CONF */ +#define PV88060_SW_EN 0x80 + +/* PV88060_REG_BUCK1_CONF1 (addr=0x1C) */ +#define PV88060_BUCK_ILIM_SHIFT 2 +#define PV88060_BUCK_ILIM_MASK 0x0C +#define PV88060_BUCK_MODE_SHIFT 0 +#define PV88060_BUCK_MODE_MASK 0x03 +#define PV88060_BUCK_MODE_SLEEP 0x00 +#define PV88060_BUCK_MODE_AUTO 0x01 +#define PV88060_BUCK_MODE_SYNC 0x02 + +#endif /* __PV88060_REGISTERS_H__ */ diff --git a/drivers/regulator/pv88080-regulator.c b/drivers/regulator/pv88080-regulator.c new file mode 100644 index 000000000..b96afbf11 --- /dev/null +++ b/drivers/regulator/pv88080-regulator.c @@ -0,0 +1,546 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// pv88080-regulator.c - Regulator device driver for PV88080 +// Copyright (C) 2016 Powerventure Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pv88080-regulator.h" + +#define PV88080_MAX_REGULATORS 4 + +/* PV88080 REGULATOR IDs */ +enum { + /* BUCKs */ + PV88080_ID_BUCK1, + PV88080_ID_BUCK2, + PV88080_ID_BUCK3, + PV88080_ID_HVBUCK, +}; + +struct pv88080_regulator { + struct regulator_desc desc; + unsigned int mode_reg; + unsigned int conf2; + unsigned int conf5; +}; + +struct pv88080 { + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev[PV88080_MAX_REGULATORS]; + unsigned long type; + const struct pv88080_compatible_regmap *regmap_config; +}; + +struct pv88080_buck_voltage { + int min_uV; + int max_uV; + int uV_step; +}; + +struct pv88080_buck_regmap { + /* REGS */ + int buck_enable_reg; + int buck_vsel_reg; + int buck_mode_reg; + int buck_limit_reg; + int buck_vdac_range_reg; + int buck_vrange_gain_reg; + /* MASKS */ + int buck_enable_mask; + int buck_vsel_mask; + int buck_limit_mask; +}; + +struct pv88080_compatible_regmap { + /* BUCK1, 2, 3 */ + struct pv88080_buck_regmap buck_regmap[PV88080_MAX_REGULATORS-1]; + /* HVBUCK */ + int hvbuck_enable_reg; + int hvbuck_vsel_reg; + int hvbuck_enable_mask; + int hvbuck_vsel_mask; +}; + +static const struct regmap_config pv88080_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +/* Current limits array (in uA) for BUCK1, BUCK2, BUCK3. + * Entry indexes corresponds to register values. + */ + +static const unsigned int pv88080_buck1_limits[] = { + 3230000, 5130000, 6960000, 8790000 +}; + +static const unsigned int pv88080_buck23_limits[] = { + 1496000, 2393000, 3291000, 4189000 +}; + +static const struct pv88080_buck_voltage pv88080_buck_vol[2] = { + { + .min_uV = 600000, + .max_uV = 1393750, + .uV_step = 6250, + }, + { + .min_uV = 1400000, + .max_uV = 2193750, + .uV_step = 6250, + }, +}; + +static const struct pv88080_compatible_regmap pv88080_aa_regs = { + /* BUCK1 */ + .buck_regmap[0] = { + .buck_enable_reg = PV88080AA_REG_BUCK1_CONF0, + .buck_vsel_reg = PV88080AA_REG_BUCK1_CONF0, + .buck_mode_reg = PV88080AA_REG_BUCK1_CONF1, + .buck_limit_reg = PV88080AA_REG_BUCK1_CONF1, + .buck_vdac_range_reg = PV88080AA_REG_BUCK1_CONF2, + .buck_vrange_gain_reg = PV88080AA_REG_BUCK1_CONF5, + .buck_enable_mask = PV88080_BUCK1_EN, + .buck_vsel_mask = PV88080_VBUCK1_MASK, + .buck_limit_mask = PV88080_BUCK1_ILIM_MASK, + }, + /* BUCK2 */ + .buck_regmap[1] = { + .buck_enable_reg = PV88080AA_REG_BUCK2_CONF0, + .buck_vsel_reg = PV88080AA_REG_BUCK2_CONF0, + .buck_mode_reg = PV88080AA_REG_BUCK2_CONF1, + .buck_limit_reg = PV88080AA_REG_BUCK2_CONF1, + .buck_vdac_range_reg = PV88080AA_REG_BUCK2_CONF2, + .buck_vrange_gain_reg = PV88080AA_REG_BUCK2_CONF5, + .buck_enable_mask = PV88080_BUCK2_EN, + .buck_vsel_mask = PV88080_VBUCK2_MASK, + .buck_limit_mask = PV88080_BUCK2_ILIM_MASK, + }, + /* BUCK3 */ + .buck_regmap[2] = { + .buck_enable_reg = PV88080AA_REG_BUCK3_CONF0, + .buck_vsel_reg = PV88080AA_REG_BUCK3_CONF0, + .buck_mode_reg = PV88080AA_REG_BUCK3_CONF1, + .buck_limit_reg = PV88080AA_REG_BUCK3_CONF1, + .buck_vdac_range_reg = PV88080AA_REG_BUCK3_CONF2, + .buck_vrange_gain_reg = PV88080AA_REG_BUCK3_CONF5, + .buck_enable_mask = PV88080_BUCK3_EN, + .buck_vsel_mask = PV88080_VBUCK3_MASK, + .buck_limit_mask = PV88080_BUCK3_ILIM_MASK, + }, + /* HVBUCK */ + .hvbuck_enable_reg = PV88080AA_REG_HVBUCK_CONF2, + .hvbuck_vsel_reg = PV88080AA_REG_HVBUCK_CONF1, + .hvbuck_enable_mask = PV88080_HVBUCK_EN, + .hvbuck_vsel_mask = PV88080_VHVBUCK_MASK, +}; + +static const struct pv88080_compatible_regmap pv88080_ba_regs = { + /* BUCK1 */ + .buck_regmap[0] = { + .buck_enable_reg = PV88080BA_REG_BUCK1_CONF0, + .buck_vsel_reg = PV88080BA_REG_BUCK1_CONF0, + .buck_mode_reg = PV88080BA_REG_BUCK1_CONF1, + .buck_limit_reg = PV88080BA_REG_BUCK1_CONF1, + .buck_vdac_range_reg = PV88080BA_REG_BUCK1_CONF2, + .buck_vrange_gain_reg = PV88080BA_REG_BUCK1_CONF5, + .buck_enable_mask = PV88080_BUCK1_EN, + .buck_vsel_mask = PV88080_VBUCK1_MASK, + .buck_limit_mask = PV88080_BUCK1_ILIM_MASK, + }, + /* BUCK2 */ + .buck_regmap[1] = { + .buck_enable_reg = PV88080BA_REG_BUCK2_CONF0, + .buck_vsel_reg = PV88080BA_REG_BUCK2_CONF0, + .buck_mode_reg = PV88080BA_REG_BUCK2_CONF1, + .buck_limit_reg = PV88080BA_REG_BUCK2_CONF1, + .buck_vdac_range_reg = PV88080BA_REG_BUCK2_CONF2, + .buck_vrange_gain_reg = PV88080BA_REG_BUCK2_CONF5, + .buck_enable_mask = PV88080_BUCK2_EN, + .buck_vsel_mask = PV88080_VBUCK2_MASK, + .buck_limit_mask = PV88080_BUCK2_ILIM_MASK, + }, + /* BUCK3 */ + .buck_regmap[2] = { + .buck_enable_reg = PV88080BA_REG_BUCK3_CONF0, + .buck_vsel_reg = PV88080BA_REG_BUCK3_CONF0, + .buck_mode_reg = PV88080BA_REG_BUCK3_CONF1, + .buck_limit_reg = PV88080BA_REG_BUCK3_CONF1, + .buck_vdac_range_reg = PV88080BA_REG_BUCK3_CONF2, + .buck_vrange_gain_reg = PV88080BA_REG_BUCK3_CONF5, + .buck_enable_mask = PV88080_BUCK3_EN, + .buck_vsel_mask = PV88080_VBUCK3_MASK, + .buck_limit_mask = PV88080_BUCK3_ILIM_MASK, + }, + /* HVBUCK */ + .hvbuck_enable_reg = PV88080BA_REG_HVBUCK_CONF2, + .hvbuck_vsel_reg = PV88080BA_REG_HVBUCK_CONF1, + .hvbuck_enable_mask = PV88080_HVBUCK_EN, + .hvbuck_vsel_mask = PV88080_VHVBUCK_MASK, +}; + +static unsigned int pv88080_buck_get_mode(struct regulator_dev *rdev) +{ + struct pv88080_regulator *info = rdev_get_drvdata(rdev); + unsigned int data; + int ret, mode = 0; + + ret = regmap_read(rdev->regmap, info->mode_reg, &data); + if (ret < 0) + return ret; + + switch (data & PV88080_BUCK1_MODE_MASK) { + case PV88080_BUCK_MODE_SYNC: + mode = REGULATOR_MODE_FAST; + break; + case PV88080_BUCK_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case PV88080_BUCK_MODE_SLEEP: + mode = REGULATOR_MODE_STANDBY; + break; + default: + return -EINVAL; + } + + return mode; +} + +static int pv88080_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct pv88080_regulator *info = rdev_get_drvdata(rdev); + int val = 0; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = PV88080_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = PV88080_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = PV88080_BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, info->mode_reg, + PV88080_BUCK1_MODE_MASK, val); +} + +static const struct regulator_ops pv88080_buck_ops = { + .get_mode = pv88080_buck_get_mode, + .set_mode = pv88080_buck_set_mode, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static const struct regulator_ops pv88080_hvbuck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +#define PV88080_BUCK(chip, regl_name, min, step, max, limits_array) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88080_buck_ops,\ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = ((max) - (min))/(step) + 1, \ + .curr_table = limits_array, \ + .n_current_limits = ARRAY_SIZE(limits_array), \ + },\ +} + +#define PV88080_HVBUCK(chip, regl_name, min, step, max) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88080_hvbuck_ops,\ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = ((max) - (min))/(step) + 1, \ + },\ +} + +static struct pv88080_regulator pv88080_regulator_info[] = { + PV88080_BUCK(PV88080, BUCK1, 600000, 6250, 1393750, + pv88080_buck1_limits), + PV88080_BUCK(PV88080, BUCK2, 600000, 6250, 1393750, + pv88080_buck23_limits), + PV88080_BUCK(PV88080, BUCK3, 600000, 6250, 1393750, + pv88080_buck23_limits), + PV88080_HVBUCK(PV88080, HVBUCK, 0, 5000, 1275000), +}; + +static irqreturn_t pv88080_irq_handler(int irq, void *data) +{ + struct pv88080 *chip = data; + int i, reg_val, err, ret = IRQ_NONE; + + err = regmap_read(chip->regmap, PV88080_REG_EVENT_A, ®_val); + if (err < 0) + goto error_i2c; + + if (reg_val & PV88080_E_VDD_FLT) { + for (i = 0; i < PV88080_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + } + + err = regmap_write(chip->regmap, PV88080_REG_EVENT_A, + PV88080_E_VDD_FLT); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + if (reg_val & PV88080_E_OVER_TEMP) { + for (i = 0; i < PV88080_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_OVER_TEMP, + NULL); + } + + err = regmap_write(chip->regmap, PV88080_REG_EVENT_A, + PV88080_E_OVER_TEMP); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + return ret; + +error_i2c: + dev_err(chip->dev, "I2C error : %d\n", err); + return IRQ_NONE; +} + +/* + * I2C driver interface functions + */ +static int pv88080_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev); + struct pv88080 *chip; + const struct pv88080_compatible_regmap *regmap_config; + struct regulator_config config = { }; + int i, error, ret; + unsigned int conf2, conf5; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct pv88080), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &i2c->dev; + chip->regmap = devm_regmap_init_i2c(i2c, &pv88080_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + chip->regmap_config = i2c_get_match_data(i2c); + if (!chip->regmap_config) + return -ENODEV; + + i2c_set_clientdata(i2c, chip); + + if (i2c->irq != 0) { + ret = regmap_write(chip->regmap, PV88080_REG_MASK_A, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask A reg: %d\n", ret); + return ret; + } + ret = regmap_write(chip->regmap, PV88080_REG_MASK_B, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask B reg: %d\n", ret); + return ret; + } + ret = regmap_write(chip->regmap, PV88080_REG_MASK_C, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask C reg: %d\n", ret); + return ret; + } + + ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + pv88080_irq_handler, + IRQF_TRIGGER_LOW|IRQF_ONESHOT, + "pv88080", chip); + if (ret != 0) { + dev_err(chip->dev, "Failed to request IRQ: %d\n", + i2c->irq); + return ret; + } + + ret = regmap_update_bits(chip->regmap, PV88080_REG_MASK_A, + PV88080_M_VDD_FLT | PV88080_M_OVER_TEMP, 0); + if (ret < 0) { + dev_err(chip->dev, + "Failed to update mask reg: %d\n", ret); + return ret; + } + } else { + dev_warn(chip->dev, "No IRQ configured\n"); + } + + regmap_config = chip->regmap_config; + config.dev = chip->dev; + config.regmap = chip->regmap; + + /* Registeration for BUCK1, 2, 3 */ + for (i = 0; i < PV88080_MAX_REGULATORS-1; i++) { + if (init_data) + config.init_data = &init_data[i]; + + pv88080_regulator_info[i].desc.csel_reg + = regmap_config->buck_regmap[i].buck_limit_reg; + pv88080_regulator_info[i].desc.csel_mask + = regmap_config->buck_regmap[i].buck_limit_mask; + pv88080_regulator_info[i].mode_reg + = regmap_config->buck_regmap[i].buck_mode_reg; + pv88080_regulator_info[i].conf2 + = regmap_config->buck_regmap[i].buck_vdac_range_reg; + pv88080_regulator_info[i].conf5 + = regmap_config->buck_regmap[i].buck_vrange_gain_reg; + pv88080_regulator_info[i].desc.enable_reg + = regmap_config->buck_regmap[i].buck_enable_reg; + pv88080_regulator_info[i].desc.enable_mask + = regmap_config->buck_regmap[i].buck_enable_mask; + pv88080_regulator_info[i].desc.vsel_reg + = regmap_config->buck_regmap[i].buck_vsel_reg; + pv88080_regulator_info[i].desc.vsel_mask + = regmap_config->buck_regmap[i].buck_vsel_mask; + + ret = regmap_read(chip->regmap, + pv88080_regulator_info[i].conf2, &conf2); + if (ret < 0) + return ret; + conf2 = ((conf2 >> PV88080_BUCK_VDAC_RANGE_SHIFT) & + PV88080_BUCK_VDAC_RANGE_MASK); + + ret = regmap_read(chip->regmap, + pv88080_regulator_info[i].conf5, &conf5); + if (ret < 0) + return ret; + conf5 = ((conf5 >> PV88080_BUCK_VRANGE_GAIN_SHIFT) & + PV88080_BUCK_VRANGE_GAIN_MASK); + + pv88080_regulator_info[i].desc.min_uV = + pv88080_buck_vol[conf2].min_uV * (conf5+1); + pv88080_regulator_info[i].desc.uV_step = + pv88080_buck_vol[conf2].uV_step * (conf5+1); + pv88080_regulator_info[i].desc.n_voltages = + ((pv88080_buck_vol[conf2].max_uV * (conf5+1)) + - (pv88080_regulator_info[i].desc.min_uV)) + /(pv88080_regulator_info[i].desc.uV_step) + 1; + + config.driver_data = (void *)&pv88080_regulator_info[i]; + chip->rdev[i] = devm_regulator_register(chip->dev, + &pv88080_regulator_info[i].desc, &config); + if (IS_ERR(chip->rdev[i])) { + dev_err(chip->dev, + "Failed to register PV88080 regulator\n"); + return PTR_ERR(chip->rdev[i]); + } + } + + pv88080_regulator_info[PV88080_ID_HVBUCK].desc.enable_reg + = regmap_config->hvbuck_enable_reg; + pv88080_regulator_info[PV88080_ID_HVBUCK].desc.enable_mask + = regmap_config->hvbuck_enable_mask; + pv88080_regulator_info[PV88080_ID_HVBUCK].desc.vsel_reg + = regmap_config->hvbuck_vsel_reg; + pv88080_regulator_info[PV88080_ID_HVBUCK].desc.vsel_mask + = regmap_config->hvbuck_vsel_mask; + + /* Registeration for HVBUCK */ + if (init_data) + config.init_data = &init_data[PV88080_ID_HVBUCK]; + + config.driver_data = (void *)&pv88080_regulator_info[PV88080_ID_HVBUCK]; + chip->rdev[PV88080_ID_HVBUCK] = devm_regulator_register(chip->dev, + &pv88080_regulator_info[PV88080_ID_HVBUCK].desc, &config); + if (IS_ERR(chip->rdev[PV88080_ID_HVBUCK])) { + dev_err(chip->dev, "Failed to register PV88080 regulator\n"); + return PTR_ERR(chip->rdev[PV88080_ID_HVBUCK]); + } + + return 0; +} + +static const struct of_device_id pv88080_dt_ids[] = { + { .compatible = "pvs,pv88080", .data = &pv88080_aa_regs }, + { .compatible = "pvs,pv88080-aa", .data = &pv88080_aa_regs }, + { .compatible = "pvs,pv88080-ba", .data = &pv88080_ba_regs }, + {} +}; +MODULE_DEVICE_TABLE(of, pv88080_dt_ids); + +static const struct i2c_device_id pv88080_i2c_id[] = { + { .name = "pv88080", .driver_data = (kernel_ulong_t)&pv88080_aa_regs }, + { .name = "pv88080-aa", .driver_data = (kernel_ulong_t)&pv88080_aa_regs }, + { .name = "pv88080-ba", .driver_data = (kernel_ulong_t)&pv88080_ba_regs }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pv88080_i2c_id); + +static struct i2c_driver pv88080_regulator_driver = { + .driver = { + .name = "pv88080", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = pv88080_dt_ids, + }, + .probe = pv88080_i2c_probe, + .id_table = pv88080_i2c_id, +}; + +module_i2c_driver(pv88080_regulator_driver); + +MODULE_AUTHOR("James Ban "); +MODULE_DESCRIPTION("Regulator device driver for Powerventure PV88080"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pv88080-regulator.h b/drivers/regulator/pv88080-regulator.h new file mode 100644 index 000000000..7d7f8f11a --- /dev/null +++ b/drivers/regulator/pv88080-regulator.h @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * pv88080-regulator.h - Regulator definitions for PV88080 + * Copyright (C) 2016 Powerventure Semiconductor Ltd. + */ + +#ifndef __PV88080_REGISTERS_H__ +#define __PV88080_REGISTERS_H__ + +/* System Control and Event Registers */ +#define PV88080_REG_EVENT_A 0x04 +#define PV88080_REG_MASK_A 0x09 +#define PV88080_REG_MASK_B 0x0A +#define PV88080_REG_MASK_C 0x0B + +/* Regulator Registers - rev. AA */ +#define PV88080AA_REG_HVBUCK_CONF1 0x2D +#define PV88080AA_REG_HVBUCK_CONF2 0x2E +#define PV88080AA_REG_BUCK1_CONF0 0x27 +#define PV88080AA_REG_BUCK1_CONF1 0x28 +#define PV88080AA_REG_BUCK1_CONF2 0x59 +#define PV88080AA_REG_BUCK1_CONF5 0x5C +#define PV88080AA_REG_BUCK2_CONF0 0x29 +#define PV88080AA_REG_BUCK2_CONF1 0x2A +#define PV88080AA_REG_BUCK2_CONF2 0x61 +#define PV88080AA_REG_BUCK2_CONF5 0x64 +#define PV88080AA_REG_BUCK3_CONF0 0x2B +#define PV88080AA_REG_BUCK3_CONF1 0x2C +#define PV88080AA_REG_BUCK3_CONF2 0x69 +#define PV88080AA_REG_BUCK3_CONF5 0x6C + +/* Regulator Registers - rev. BA */ +#define PV88080BA_REG_HVBUCK_CONF1 0x33 +#define PV88080BA_REG_HVBUCK_CONF2 0x34 +#define PV88080BA_REG_BUCK1_CONF0 0x2A +#define PV88080BA_REG_BUCK1_CONF1 0x2C +#define PV88080BA_REG_BUCK1_CONF2 0x5A +#define PV88080BA_REG_BUCK1_CONF5 0x5D +#define PV88080BA_REG_BUCK2_CONF0 0x2D +#define PV88080BA_REG_BUCK2_CONF1 0x2F +#define PV88080BA_REG_BUCK2_CONF2 0x63 +#define PV88080BA_REG_BUCK2_CONF5 0x66 +#define PV88080BA_REG_BUCK3_CONF0 0x30 +#define PV88080BA_REG_BUCK3_CONF1 0x32 +#define PV88080BA_REG_BUCK3_CONF2 0x6C +#define PV88080BA_REG_BUCK3_CONF5 0x6F + +/* PV88080_REG_EVENT_A (addr=0x04) */ +#define PV88080_E_VDD_FLT 0x01 +#define PV88080_E_OVER_TEMP 0x02 + +/* PV88080_REG_MASK_A (addr=0x09) */ +#define PV88080_M_VDD_FLT 0x01 +#define PV88080_M_OVER_TEMP 0x02 + +/* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */ +#define PV88080_BUCK1_EN 0x80 +#define PV88080_VBUCK1_MASK 0x7F + +/* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */ +#define PV88080_BUCK2_EN 0x80 +#define PV88080_VBUCK2_MASK 0x7F + +/* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */ +#define PV88080_BUCK3_EN 0x80 +#define PV88080_VBUCK3_MASK 0x7F + +/* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */ +#define PV88080_BUCK1_ILIM_SHIFT 2 +#define PV88080_BUCK1_ILIM_MASK 0x0C +#define PV88080_BUCK1_MODE_MASK 0x03 + +/* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */ +#define PV88080_BUCK2_ILIM_SHIFT 2 +#define PV88080_BUCK2_ILIM_MASK 0x0C +#define PV88080_BUCK2_MODE_MASK 0x03 + +/* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */ +#define PV88080_BUCK3_ILIM_SHIFT 2 +#define PV88080_BUCK3_ILIM_MASK 0x0C +#define PV88080_BUCK3_MODE_MASK 0x03 + +#define PV88080_BUCK_MODE_SLEEP 0x00 +#define PV88080_BUCK_MODE_AUTO 0x01 +#define PV88080_BUCK_MODE_SYNC 0x02 + +/* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */ +#define PV88080_VHVBUCK_MASK 0xFF + +/* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */ +#define PV88080_HVBUCK_EN 0x01 + +/* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */ +/* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */ +#define PV88080_BUCK_VDAC_RANGE_SHIFT 7 +#define PV88080_BUCK_VDAC_RANGE_MASK 0x01 + +#define PV88080_BUCK_VDAC_RANGE_1 0x00 +#define PV88080_BUCK_VDAC_RANGE_2 0x01 + +/* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */ +/* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */ +#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 +#define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 + +#define PV88080_BUCK_VRANGE_GAIN_1 0x00 +#define PV88080_BUCK_VRANGE_GAIN_2 0x01 + +#endif /* __PV88080_REGISTERS_H__ */ diff --git a/drivers/regulator/pv88090-regulator.c b/drivers/regulator/pv88090-regulator.c new file mode 100644 index 000000000..ca5eeb5df --- /dev/null +++ b/drivers/regulator/pv88090-regulator.c @@ -0,0 +1,411 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// pv88090-regulator.c - Regulator device driver for PV88090 +// Copyright (C) 2015 Powerventure Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pv88090-regulator.h" + +#define PV88090_MAX_REGULATORS 5 + +/* PV88090 REGULATOR IDs */ +enum { + /* BUCKs */ + PV88090_ID_BUCK1, + PV88090_ID_BUCK2, + PV88090_ID_BUCK3, + + /* LDOs */ + PV88090_ID_LDO1, + PV88090_ID_LDO2, +}; + +struct pv88090_regulator { + struct regulator_desc desc; + unsigned int conf; + unsigned int conf2; +}; + +struct pv88090 { + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev[PV88090_MAX_REGULATORS]; +}; + +struct pv88090_buck_voltage { + int min_uV; + int max_uV; + int uV_step; +}; + +static const struct regmap_config pv88090_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +/* Current limits array (in uA) for BUCK1, BUCK2, BUCK3. + * Entry indexes corresponds to register values. + */ + +static const unsigned int pv88090_buck1_limits[] = { + 220000, 440000, 660000, 880000, 1100000, 1320000, 1540000, 1760000, + 1980000, 2200000, 2420000, 2640000, 2860000, 3080000, 3300000, 3520000, + 3740000, 3960000, 4180000, 4400000, 4620000, 4840000, 5060000, 5280000, + 5500000, 5720000, 5940000, 6160000, 6380000, 6600000, 6820000, 7040000 +}; + +static const unsigned int pv88090_buck23_limits[] = { + 1496000, 2393000, 3291000, 4189000 +}; + +static const struct pv88090_buck_voltage pv88090_buck_vol[3] = { + { + .min_uV = 600000, + .max_uV = 1393750, + .uV_step = 6250, + }, + + { + .min_uV = 1400000, + .max_uV = 2193750, + .uV_step = 6250, + }, + { + .min_uV = 1250000, + .max_uV = 2837500, + .uV_step = 12500, + }, +}; + +static unsigned int pv88090_buck_get_mode(struct regulator_dev *rdev) +{ + struct pv88090_regulator *info = rdev_get_drvdata(rdev); + unsigned int data; + int ret, mode = 0; + + ret = regmap_read(rdev->regmap, info->conf, &data); + if (ret < 0) + return ret; + + switch (data & PV88090_BUCK1_MODE_MASK) { + case PV88090_BUCK_MODE_SYNC: + mode = REGULATOR_MODE_FAST; + break; + case PV88090_BUCK_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case PV88090_BUCK_MODE_SLEEP: + mode = REGULATOR_MODE_STANDBY; + break; + } + + return mode; +} + +static int pv88090_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct pv88090_regulator *info = rdev_get_drvdata(rdev); + int val = 0; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = PV88090_BUCK_MODE_SYNC; + break; + case REGULATOR_MODE_NORMAL: + val = PV88090_BUCK_MODE_AUTO; + break; + case REGULATOR_MODE_STANDBY: + val = PV88090_BUCK_MODE_SLEEP; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, info->conf, + PV88090_BUCK1_MODE_MASK, val); +} + +static const struct regulator_ops pv88090_buck_ops = { + .get_mode = pv88090_buck_get_mode, + .set_mode = pv88090_buck_set_mode, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static const struct regulator_ops pv88090_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +#define PV88090_BUCK(chip, regl_name, min, step, max, limits_array) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88090_buck_ops,\ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = ((max) - (min))/(step) + 1, \ + .enable_reg = PV88090_REG_##regl_name##_CONF0, \ + .enable_mask = PV88090_##regl_name##_EN, \ + .vsel_reg = PV88090_REG_##regl_name##_CONF0, \ + .vsel_mask = PV88090_V##regl_name##_MASK, \ + .curr_table = limits_array, \ + .n_current_limits = ARRAY_SIZE(limits_array), \ + .csel_reg = PV88090_REG_##regl_name##_CONF1, \ + .csel_mask = PV88090_##regl_name##_ILIM_MASK, \ + },\ + .conf = PV88090_REG_##regl_name##_CONF1, \ + .conf2 = PV88090_REG_##regl_name##_CONF2, \ +} + +#define PV88090_LDO(chip, regl_name, min, step, max) \ +{\ + .desc = {\ + .id = chip##_ID_##regl_name,\ + .name = __stringify(chip##_##regl_name),\ + .of_match = of_match_ptr(#regl_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &pv88090_ldo_ops,\ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = ((max) - (min))/(step) + 1, \ + .enable_reg = PV88090_REG_##regl_name##_CONT, \ + .enable_mask = PV88090_##regl_name##_EN, \ + .vsel_reg = PV88090_REG_##regl_name##_CONT, \ + .vsel_mask = PV88090_V##regl_name##_MASK, \ + },\ +} + +static struct pv88090_regulator pv88090_regulator_info[] = { + PV88090_BUCK(PV88090, BUCK1, 600000, 6250, 1393750, + pv88090_buck1_limits), + PV88090_BUCK(PV88090, BUCK2, 600000, 6250, 1393750, + pv88090_buck23_limits), + PV88090_BUCK(PV88090, BUCK3, 600000, 6250, 1393750, + pv88090_buck23_limits), + PV88090_LDO(PV88090, LDO1, 1200000, 50000, 4350000), + PV88090_LDO(PV88090, LDO2, 650000, 25000, 2225000), +}; + +static irqreturn_t pv88090_irq_handler(int irq, void *data) +{ + struct pv88090 *chip = data; + int i, reg_val, err, ret = IRQ_NONE; + + err = regmap_read(chip->regmap, PV88090_REG_EVENT_A, ®_val); + if (err < 0) + goto error_i2c; + + if (reg_val & PV88090_E_VDD_FLT) { + for (i = 0; i < PV88090_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + } + + err = regmap_write(chip->regmap, PV88090_REG_EVENT_A, + PV88090_E_VDD_FLT); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + if (reg_val & PV88090_E_OVER_TEMP) { + for (i = 0; i < PV88090_MAX_REGULATORS; i++) { + if (chip->rdev[i] != NULL) + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_OVER_TEMP, + NULL); + } + + err = regmap_write(chip->regmap, PV88090_REG_EVENT_A, + PV88090_E_OVER_TEMP); + if (err < 0) + goto error_i2c; + + ret = IRQ_HANDLED; + } + + return ret; + +error_i2c: + dev_err(chip->dev, "I2C error : %d\n", err); + return IRQ_NONE; +} + +/* + * I2C driver interface functions + */ +static int pv88090_i2c_probe(struct i2c_client *i2c) +{ + struct regulator_init_data *init_data = dev_get_platdata(&i2c->dev); + struct pv88090 *chip; + struct regulator_config config = { }; + int error, i, ret = 0; + unsigned int conf2, range, index; + + chip = devm_kzalloc(&i2c->dev, sizeof(struct pv88090), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev = &i2c->dev; + chip->regmap = devm_regmap_init_i2c(i2c, &pv88090_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(chip->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + i2c_set_clientdata(i2c, chip); + + if (i2c->irq != 0) { + ret = regmap_write(chip->regmap, PV88090_REG_MASK_A, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask A reg: %d\n", ret); + return ret; + } + + ret = regmap_write(chip->regmap, PV88090_REG_MASK_B, 0xFF); + if (ret < 0) { + dev_err(chip->dev, + "Failed to mask B reg: %d\n", ret); + return ret; + } + + ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + pv88090_irq_handler, + IRQF_TRIGGER_LOW|IRQF_ONESHOT, + "pv88090", chip); + if (ret != 0) { + dev_err(chip->dev, "Failed to request IRQ: %d\n", + i2c->irq); + return ret; + } + + ret = regmap_update_bits(chip->regmap, PV88090_REG_MASK_A, + PV88090_M_VDD_FLT | PV88090_M_OVER_TEMP, 0); + if (ret < 0) { + dev_err(chip->dev, + "Failed to update mask reg: %d\n", ret); + return ret; + } + + } else { + dev_warn(chip->dev, "No IRQ configured\n"); + } + + config.dev = chip->dev; + config.regmap = chip->regmap; + + for (i = 0; i < PV88090_MAX_REGULATORS; i++) { + if (init_data) + config.init_data = &init_data[i]; + + if (i == PV88090_ID_BUCK2 || i == PV88090_ID_BUCK3) { + ret = regmap_read(chip->regmap, + pv88090_regulator_info[i].conf2, &conf2); + if (ret < 0) + return ret; + + conf2 = (conf2 >> PV88090_BUCK_VDAC_RANGE_SHIFT) & + PV88090_BUCK_VDAC_RANGE_MASK; + + ret = regmap_read(chip->regmap, + PV88090_REG_BUCK_FOLD_RANGE, &range); + if (ret < 0) + return ret; + + range = (range >> + (PV88090_BUCK_VRANGE_GAIN_SHIFT + i - 1)) & + PV88090_BUCK_VRANGE_GAIN_MASK; + index = ((range << 1) | conf2); + if (index > PV88090_ID_BUCK3) { + dev_err(chip->dev, + "Invalid index(%d)\n", index); + return -EINVAL; + } + + pv88090_regulator_info[i].desc.min_uV + = pv88090_buck_vol[index].min_uV; + pv88090_regulator_info[i].desc.uV_step + = pv88090_buck_vol[index].uV_step; + pv88090_regulator_info[i].desc.n_voltages + = ((pv88090_buck_vol[index].max_uV) + - (pv88090_buck_vol[index].min_uV)) + /(pv88090_buck_vol[index].uV_step) + 1; + } + + config.driver_data = (void *)&pv88090_regulator_info[i]; + chip->rdev[i] = devm_regulator_register(chip->dev, + &pv88090_regulator_info[i].desc, &config); + if (IS_ERR(chip->rdev[i])) { + dev_err(chip->dev, + "Failed to register PV88090 regulator\n"); + return PTR_ERR(chip->rdev[i]); + } + } + + return 0; +} + +static const struct i2c_device_id pv88090_i2c_id[] = { + { .name = "pv88090" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pv88090_i2c_id); + +#ifdef CONFIG_OF +static const struct of_device_id pv88090_dt_ids[] = { + { .compatible = "pvs,pv88090", .data = &pv88090_i2c_id[0] }, + {}, +}; +MODULE_DEVICE_TABLE(of, pv88090_dt_ids); +#endif + +static struct i2c_driver pv88090_regulator_driver = { + .driver = { + .name = "pv88090", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(pv88090_dt_ids), + }, + .probe = pv88090_i2c_probe, + .id_table = pv88090_i2c_id, +}; + +module_i2c_driver(pv88090_regulator_driver); + +MODULE_AUTHOR("James Ban "); +MODULE_DESCRIPTION("Regulator device driver for Powerventure PV88090"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/pv88090-regulator.h b/drivers/regulator/pv88090-regulator.h new file mode 100644 index 000000000..f814ee52c --- /dev/null +++ b/drivers/regulator/pv88090-regulator.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * pv88090-regulator.h - Regulator definitions for PV88090 + * Copyright (C) 2015 Powerventure Semiconductor Ltd. + */ + +#ifndef __PV88090_REGISTERS_H__ +#define __PV88090_REGISTERS_H__ + +/* System Control and Event Registers */ +#define PV88090_REG_EVENT_A 0x03 +#define PV88090_REG_MASK_A 0x06 +#define PV88090_REG_MASK_B 0x07 + +/* Regulator Registers */ +#define PV88090_REG_BUCK1_CONF0 0x18 +#define PV88090_REG_BUCK1_CONF1 0x19 +#define PV88090_REG_BUCK1_CONF2 0x1a +#define PV88090_REG_BUCK2_CONF0 0x1b +#define PV88090_REG_BUCK2_CONF1 0x1c +#define PV88090_REG_BUCK2_CONF2 0x58 +#define PV88090_REG_BUCK3_CONF0 0x1d +#define PV88090_REG_BUCK3_CONF1 0x1e +#define PV88090_REG_BUCK3_CONF2 0x5c + +#define PV88090_REG_LDO1_CONT 0x1f +#define PV88090_REG_LDO2_CONT 0x20 +#define PV88090_REG_LDO3_CONT 0x21 +#define PV88090_REG_BUCK_FOLD_RANGE 0x61 + +/* PV88090_REG_EVENT_A (addr=0x03) */ +#define PV88090_E_VDD_FLT 0x01 +#define PV88090_E_OVER_TEMP 0x02 + +/* PV88090_REG_MASK_A (addr=0x06) */ +#define PV88090_M_VDD_FLT 0x01 +#define PV88090_M_OVER_TEMP 0x02 + +/* PV88090_REG_BUCK1_CONF0 (addr=0x18) */ +#define PV88090_BUCK1_EN 0x80 +#define PV88090_VBUCK1_MASK 0x7F +/* PV88090_REG_BUCK2_CONF0 (addr=0x1b) */ +#define PV88090_BUCK2_EN 0x80 +#define PV88090_VBUCK2_MASK 0x7F +/* PV88090_REG_BUCK3_CONF0 (addr=0x1d) */ +#define PV88090_BUCK3_EN 0x80 +#define PV88090_VBUCK3_MASK 0x7F +/* PV88090_REG_LDO1_CONT (addr=0x1f) */ +#define PV88090_LDO1_EN 0x40 +#define PV88090_VLDO1_MASK 0x3F +/* PV88090_REG_LDO2_CONT (addr=0x20) */ +#define PV88090_LDO2_EN 0x40 +#define PV88090_VLDO2_MASK 0x3F + +/* PV88090_REG_BUCK1_CONF1 (addr=0x19) */ +#define PV88090_BUCK1_ILIM_SHIFT 2 +#define PV88090_BUCK1_ILIM_MASK 0x7C +#define PV88090_BUCK1_MODE_MASK 0x03 + +/* PV88090_REG_BUCK2_CONF1 (addr=0x1c) */ +#define PV88090_BUCK2_ILIM_SHIFT 2 +#define PV88090_BUCK2_ILIM_MASK 0x0C +#define PV88090_BUCK2_MODE_MASK 0x03 + +/* PV88090_REG_BUCK3_CONF1 (addr=0x1e) */ +#define PV88090_BUCK3_ILIM_SHIFT 2 +#define PV88090_BUCK3_ILIM_MASK 0x0C +#define PV88090_BUCK3_MODE_MASK 0x03 + +#define PV88090_BUCK_MODE_SLEEP 0x00 +#define PV88090_BUCK_MODE_AUTO 0x01 +#define PV88090_BUCK_MODE_SYNC 0x02 + +/* PV88090_REG_BUCK2_CONF2 (addr=0x58) */ +/* PV88090_REG_BUCK3_CONF2 (addr=0x5c) */ +#define PV88090_BUCK_VDAC_RANGE_SHIFT 7 +#define PV88090_BUCK_VDAC_RANGE_MASK 0x01 + +#define PV88090_BUCK_VDAC_RANGE_1 0x00 +#define PV88090_BUCK_VDAC_RANGE_2 0x01 + +/* PV88090_REG_BUCK_FOLD_RANGE (addr=0x61) */ +#define PV88090_BUCK_VRANGE_GAIN_SHIFT 3 +#define PV88090_BUCK_VRANGE_GAIN_MASK 0x01 + +#define PV88090_BUCK_VRANGE_GAIN_1 0x00 +#define PV88090_BUCK_VRANGE_GAIN_2 0x01 + +#endif /* __PV88090_REGISTERS_H__ */ diff --git a/drivers/regulator/pwm-regulator.c b/drivers/regulator/pwm-regulator.c new file mode 100644 index 000000000..7434b6b22 --- /dev/null +++ b/drivers/regulator/pwm-regulator.c @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for PWM Regulators + * + * Copyright (C) 2014 - STMicroelectronics Inc. + * + * Author: Lee Jones + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct pwm_continuous_reg_data { + unsigned int min_uV_dutycycle; + unsigned int max_uV_dutycycle; + unsigned int dutycycle_unit; +}; + +struct pwm_regulator_data { + /* Shared */ + struct pwm_device *pwm; + + /* Voltage table */ + struct pwm_voltages *duty_cycle_table; + + /* Continuous mode info */ + struct pwm_continuous_reg_data continuous; + + /* regulator descriptor */ + struct regulator_desc desc; + + int state; + + /* Enable GPIO */ + struct gpio_desc *enb_gpio; +}; + +struct pwm_voltages { + unsigned int uV; + unsigned int dutycycle; +}; + +/* + * Voltage table call-backs + */ +static void pwm_regulator_init_state(struct regulator_dev *rdev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + struct pwm_state pwm_state; + unsigned int dutycycle; + int i; + + pwm_get_state(drvdata->pwm, &pwm_state); + dutycycle = pwm_get_relative_duty_cycle(&pwm_state, 100); + + for (i = 0; i < rdev->desc->n_voltages; i++) { + if (dutycycle == drvdata->duty_cycle_table[i].dutycycle) { + drvdata->state = i; + return; + } + } +} + +static int pwm_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + + if (drvdata->state < 0) + pwm_regulator_init_state(rdev); + + return drvdata->state; +} + +static int pwm_regulator_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + struct pwm_state pstate; + int ret; + + pwm_init_state(drvdata->pwm, &pstate); + pwm_set_relative_duty_cycle(&pstate, + drvdata->duty_cycle_table[selector].dutycycle, 100); + + ret = pwm_apply_might_sleep(drvdata->pwm, &pstate); + if (ret) { + dev_err(&rdev->dev, "Failed to configure PWM: %d\n", ret); + return ret; + } + + drvdata->state = selector; + + return 0; +} + +static int pwm_regulator_list_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + + return drvdata->duty_cycle_table[selector].uV; +} + +static int pwm_regulator_enable(struct regulator_dev *dev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(dev); + + gpiod_set_value_cansleep(drvdata->enb_gpio, 1); + + return pwm_enable(drvdata->pwm); +} + +static int pwm_regulator_disable(struct regulator_dev *dev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(dev); + + pwm_disable(drvdata->pwm); + + gpiod_set_value_cansleep(drvdata->enb_gpio, 0); + + return 0; +} + +static int pwm_regulator_is_enabled(struct regulator_dev *dev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(dev); + + if (drvdata->enb_gpio && !gpiod_get_value_cansleep(drvdata->enb_gpio)) + return false; + + return pwm_is_enabled(drvdata->pwm); +} + +static int pwm_regulator_get_voltage(struct regulator_dev *rdev) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + unsigned int min_uV_duty = drvdata->continuous.min_uV_dutycycle; + unsigned int max_uV_duty = drvdata->continuous.max_uV_dutycycle; + unsigned int duty_unit = drvdata->continuous.dutycycle_unit; + int min_uV = rdev->constraints->min_uV; + int max_uV = rdev->constraints->max_uV; + int diff_uV = max_uV - min_uV; + struct pwm_state pstate; + unsigned int diff_duty; + unsigned int voltage; + + pwm_get_state(drvdata->pwm, &pstate); + + if (!pstate.enabled) { + if (pstate.polarity == PWM_POLARITY_INVERSED) + pstate.duty_cycle = pstate.period; + else + pstate.duty_cycle = 0; + } + + voltage = pwm_get_relative_duty_cycle(&pstate, duty_unit); + if (voltage < min(max_uV_duty, min_uV_duty) || + voltage > max(max_uV_duty, min_uV_duty)) + return -ENOTRECOVERABLE; + + /* + * The dutycycle for min_uV might be greater than the one for max_uV. + * This is happening when the user needs an inversed polarity, but the + * PWM device does not support inversing it in hardware. + */ + if (max_uV_duty < min_uV_duty) { + voltage = min_uV_duty - voltage; + diff_duty = min_uV_duty - max_uV_duty; + } else { + voltage = voltage - min_uV_duty; + diff_duty = max_uV_duty - min_uV_duty; + } + + voltage = DIV_ROUND_CLOSEST_ULL((u64)voltage * diff_uV, diff_duty); + + return voltage + min_uV; +} + +static int pwm_regulator_set_voltage(struct regulator_dev *rdev, + int req_min_uV, int req_max_uV, + unsigned int *selector) +{ + struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); + unsigned int min_uV_duty = drvdata->continuous.min_uV_dutycycle; + unsigned int max_uV_duty = drvdata->continuous.max_uV_dutycycle; + unsigned int duty_unit = drvdata->continuous.dutycycle_unit; + int min_uV = rdev->constraints->min_uV; + int max_uV = rdev->constraints->max_uV; + int diff_uV = max_uV - min_uV; + struct pwm_state pstate; + unsigned int diff_duty; + unsigned int dutycycle; + int ret; + + pwm_init_state(drvdata->pwm, &pstate); + + /* + * The dutycycle for min_uV might be greater than the one for max_uV. + * This is happening when the user needs an inversed polarity, but the + * PWM device does not support inversing it in hardware. + */ + if (max_uV_duty < min_uV_duty) + diff_duty = min_uV_duty - max_uV_duty; + else + diff_duty = max_uV_duty - min_uV_duty; + + dutycycle = DIV_ROUND_CLOSEST_ULL((u64)(req_min_uV - min_uV) * + diff_duty, + diff_uV); + + if (max_uV_duty < min_uV_duty) + dutycycle = min_uV_duty - dutycycle; + else + dutycycle = min_uV_duty + dutycycle; + + pwm_set_relative_duty_cycle(&pstate, dutycycle, duty_unit); + + ret = pwm_apply_might_sleep(drvdata->pwm, &pstate); + if (ret) { + dev_err(&rdev->dev, "Failed to configure PWM: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct regulator_ops pwm_regulator_voltage_table_ops = { + .set_voltage_sel = pwm_regulator_set_voltage_sel, + .get_voltage_sel = pwm_regulator_get_voltage_sel, + .list_voltage = pwm_regulator_list_voltage, + .map_voltage = regulator_map_voltage_iterate, + .enable = pwm_regulator_enable, + .disable = pwm_regulator_disable, + .is_enabled = pwm_regulator_is_enabled, +}; + +static const struct regulator_ops pwm_regulator_voltage_continuous_ops = { + .get_voltage = pwm_regulator_get_voltage, + .set_voltage = pwm_regulator_set_voltage, + .enable = pwm_regulator_enable, + .disable = pwm_regulator_disable, + .is_enabled = pwm_regulator_is_enabled, +}; + +static const struct regulator_desc pwm_regulator_desc = { + .name = "pwm-regulator", + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .supply_name = "pwm", +}; + +static int pwm_regulator_init_table(struct platform_device *pdev, + struct pwm_regulator_data *drvdata) +{ + struct device_node *np = pdev->dev.of_node; + struct pwm_voltages *duty_cycle_table; + unsigned int length = 0; + int ret; + + of_find_property(np, "voltage-table", &length); + + if ((length < sizeof(*duty_cycle_table)) || + (length % sizeof(*duty_cycle_table))) + return dev_err_probe(&pdev->dev, -EINVAL, + "voltage-table length(%d) is invalid\n", + length); + + duty_cycle_table = devm_kzalloc(&pdev->dev, length, GFP_KERNEL); + if (!duty_cycle_table) + return -ENOMEM; + + ret = of_property_read_u32_array(np, "voltage-table", + (u32 *)duty_cycle_table, + length / sizeof(u32)); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to read voltage-table\n"); + + drvdata->state = -ENOTRECOVERABLE; + drvdata->duty_cycle_table = duty_cycle_table; + drvdata->desc.ops = &pwm_regulator_voltage_table_ops; + drvdata->desc.n_voltages = length / sizeof(*duty_cycle_table); + + return 0; +} + +static int pwm_regulator_init_continuous(struct platform_device *pdev, + struct pwm_regulator_data *drvdata) +{ + u32 dutycycle_range[2] = { 0, 100 }; + u32 dutycycle_unit = 100; + + drvdata->desc.ops = &pwm_regulator_voltage_continuous_ops; + drvdata->desc.continuous_voltage_range = true; + + of_property_read_u32_array(pdev->dev.of_node, + "pwm-dutycycle-range", + dutycycle_range, 2); + of_property_read_u32(pdev->dev.of_node, "pwm-dutycycle-unit", + &dutycycle_unit); + + if (dutycycle_range[0] > dutycycle_unit || + dutycycle_range[1] > dutycycle_unit) + return -EINVAL; + + drvdata->continuous.dutycycle_unit = dutycycle_unit; + drvdata->continuous.min_uV_dutycycle = dutycycle_range[0]; + drvdata->continuous.max_uV_dutycycle = dutycycle_range[1]; + + return 0; +} + +static int pwm_regulator_init_boot_on(struct platform_device *pdev, + struct pwm_regulator_data *drvdata, + const struct regulator_init_data *init_data) +{ + struct pwm_state pstate; + + if (!init_data->constraints.boot_on || drvdata->enb_gpio) + return 0; + + pwm_get_state(drvdata->pwm, &pstate); + if (pstate.enabled) + return 0; + + /* + * Update the duty cycle so the output does not change + * when the regulator core enables the regulator (and + * thus the PWM channel). + */ + if (pstate.polarity == PWM_POLARITY_INVERSED) + pstate.duty_cycle = pstate.period; + else + pstate.duty_cycle = 0; + + return pwm_apply_might_sleep(drvdata->pwm, &pstate); +} + +static int pwm_regulator_probe(struct platform_device *pdev) +{ + const struct regulator_init_data *init_data; + struct pwm_regulator_data *drvdata; + struct regulator_dev *regulator; + struct regulator_config config = { }; + struct device_node *np = pdev->dev.of_node; + enum gpiod_flags gpio_flags; + int ret; + + if (!np) + return dev_err_probe(&pdev->dev, -EINVAL, + "Device Tree node missing\n"); + + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + memcpy(&drvdata->desc, &pwm_regulator_desc, sizeof(drvdata->desc)); + + if (of_property_present(np, "voltage-table")) + ret = pwm_regulator_init_table(pdev, drvdata); + else + ret = pwm_regulator_init_continuous(pdev, drvdata); + if (ret) + return ret; + + init_data = of_get_regulator_init_data(&pdev->dev, np, + &drvdata->desc); + if (!init_data) + return -ENOMEM; + + config.of_node = np; + config.dev = &pdev->dev; + config.driver_data = drvdata; + config.init_data = init_data; + + drvdata->pwm = devm_pwm_get(&pdev->dev, NULL); + if (IS_ERR(drvdata->pwm)) + return dev_err_probe(&pdev->dev, PTR_ERR(drvdata->pwm), + "Failed to get PWM\n"); + + if (init_data->constraints.boot_on || init_data->constraints.always_on) + gpio_flags = GPIOD_OUT_HIGH; + else + gpio_flags = GPIOD_OUT_LOW; + drvdata->enb_gpio = devm_gpiod_get_optional(&pdev->dev, "enable", + gpio_flags); + if (IS_ERR(drvdata->enb_gpio)) { + ret = PTR_ERR(drvdata->enb_gpio); + return dev_err_probe(&pdev->dev, ret, "Failed to get enable GPIO\n"); + } + + ret = pwm_adjust_config(drvdata->pwm); + if (ret) + return ret; + + ret = pwm_regulator_init_boot_on(pdev, drvdata, init_data); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to apply boot_on settings\n"); + + regulator = devm_regulator_register(&pdev->dev, + &drvdata->desc, &config); + if (IS_ERR(regulator)) { + ret = PTR_ERR(regulator); + return dev_err_probe(&pdev->dev, ret, + "Failed to register regulator %s\n", + drvdata->desc.name); + } + + return 0; +} + +static const struct of_device_id __maybe_unused pwm_of_match[] = { + { .compatible = "pwm-regulator" }, + { }, +}; +MODULE_DEVICE_TABLE(of, pwm_of_match); + +static struct platform_driver pwm_regulator_driver = { + .driver = { + .name = "pwm-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(pwm_of_match), + }, + .probe = pwm_regulator_probe, +}; + +module_platform_driver(pwm_regulator_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Lee Jones "); +MODULE_DESCRIPTION("PWM Regulator Driver"); +MODULE_ALIAS("platform:pwm-regulator"); diff --git a/drivers/regulator/qcom-labibb-regulator.c b/drivers/regulator/qcom-labibb-regulator.c new file mode 100644 index 000000000..1b14015ca --- /dev/null +++ b/drivers/regulator/qcom-labibb-regulator.c @@ -0,0 +1,906 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2020, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_PERPH_TYPE 0x04 + +#define QCOM_LAB_TYPE 0x24 +#define QCOM_IBB_TYPE 0x20 + +#define PMI8998_LAB_REG_BASE 0xde00 +#define PMI8998_IBB_REG_BASE 0xdc00 +#define PMI8998_IBB_LAB_REG_OFFSET 0x200 + +#define REG_LABIBB_STATUS1 0x08 + #define LABIBB_STATUS1_SC_BIT BIT(6) + #define LABIBB_STATUS1_VREG_OK_BIT BIT(7) + +#define REG_LABIBB_INT_SET_TYPE 0x11 +#define REG_LABIBB_INT_POLARITY_HIGH 0x12 +#define REG_LABIBB_INT_POLARITY_LOW 0x13 +#define REG_LABIBB_INT_LATCHED_CLR 0x14 +#define REG_LABIBB_INT_EN_SET 0x15 +#define REG_LABIBB_INT_EN_CLR 0x16 + #define LABIBB_INT_VREG_OK BIT(0) + #define LABIBB_INT_VREG_TYPE_LEVEL 0 + +#define REG_LABIBB_VOLTAGE 0x41 + #define LABIBB_VOLTAGE_OVERRIDE_EN BIT(7) + #define LAB_VOLTAGE_SET_MASK GENMASK(3, 0) + #define IBB_VOLTAGE_SET_MASK GENMASK(5, 0) + +#define REG_LABIBB_ENABLE_CTL 0x46 + #define LABIBB_CONTROL_ENABLE BIT(7) + +#define REG_LABIBB_PD_CTL 0x47 + #define LAB_PD_CTL_MASK GENMASK(1, 0) + #define IBB_PD_CTL_MASK (BIT(0) | BIT(7)) + #define LAB_PD_CTL_STRONG_PULL BIT(0) + #define IBB_PD_CTL_HALF_STRENGTH BIT(0) + #define IBB_PD_CTL_EN BIT(7) + +#define REG_LABIBB_CURRENT_LIMIT 0x4b + #define LAB_CURRENT_LIMIT_MASK GENMASK(2, 0) + #define IBB_CURRENT_LIMIT_MASK GENMASK(4, 0) + #define LAB_CURRENT_LIMIT_OVERRIDE_EN BIT(3) + #define LABIBB_CURRENT_LIMIT_EN BIT(7) + +#define REG_IBB_PWRUP_PWRDN_CTL_1 0x58 + #define IBB_CTL_1_DISCHARGE_EN BIT(2) + +#define REG_LABIBB_SOFT_START_CTL 0x5f +#define REG_LABIBB_SEC_ACCESS 0xd0 + #define LABIBB_SEC_UNLOCK_CODE 0xa5 + +#define LAB_ENABLE_CTL_MASK BIT(7) +#define IBB_ENABLE_CTL_MASK (BIT(7) | BIT(6)) + +#define LABIBB_OFF_ON_DELAY 1000 +#define LAB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 2) +#define IBB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 10) +#define LABIBB_POLL_ENABLED_TIME 1000 +#define OCP_RECOVERY_INTERVAL_MS 500 +#define SC_RECOVERY_INTERVAL_MS 250 +#define LABIBB_MAX_OCP_COUNT 4 +#define LABIBB_MAX_SC_COUNT 3 +#define LABIBB_MAX_FATAL_COUNT 2 + +struct labibb_current_limits { + u32 uA_min; + u32 uA_step; + u8 ovr_val; +}; + +struct labibb_regulator { + struct regulator_desc desc; + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev; + struct labibb_current_limits uA_limits; + struct delayed_work ocp_recovery_work; + struct delayed_work sc_recovery_work; + u16 base; + u8 type; + u8 dischg_sel; + u8 soft_start_sel; + int sc_irq; + int sc_count; + int ocp_irq; + int ocp_irq_count; + int fatal_count; +}; + +struct labibb_regulator_data { + const char *name; + u8 type; + u16 base; + const struct regulator_desc *desc; +}; + +static int qcom_labibb_ocp_hw_enable(struct regulator_dev *rdev) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + int ret; + + /* Clear irq latch status to avoid spurious event */ + ret = regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_LATCHED_CLR, + LABIBB_INT_VREG_OK, 1); + if (ret) + return ret; + + /* Enable OCP HW interrupt */ + return regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_EN_SET, + LABIBB_INT_VREG_OK, 1); +} + +static int qcom_labibb_ocp_hw_disable(struct regulator_dev *rdev) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + + return regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_EN_CLR, + LABIBB_INT_VREG_OK, 1); +} + +/** + * qcom_labibb_check_ocp_status - Check the Over-Current Protection status + * @vreg: Main driver structure + * + * This function checks the STATUS1 register for the VREG_OK bit: if it is + * set, then there is no Over-Current event. + * + * Returns: Zero if there is no over-current, 1 if in over-current or + * negative number for error + */ +static int qcom_labibb_check_ocp_status(struct labibb_regulator *vreg) +{ + u32 cur_status; + int ret; + + ret = regmap_read(vreg->rdev->regmap, vreg->base + REG_LABIBB_STATUS1, + &cur_status); + if (ret) + return ret; + + return !(cur_status & LABIBB_STATUS1_VREG_OK_BIT); +} + +/** + * qcom_labibb_ocp_recovery_worker - Handle OCP event + * @work: OCP work structure + * + * This is the worker function to handle the Over Current Protection + * hardware event; This will check if the hardware is still + * signaling an over-current condition and will eventually stop + * the regulator if such condition is still signaled after + * LABIBB_MAX_OCP_COUNT times. + * + * If the driver that is consuming the regulator did not take action + * for the OCP condition, or the hardware did not stabilize, a cut + * of the LAB and IBB regulators will be forced (regulators will be + * disabled). + * + * As last, if the writes to shut down the LAB/IBB regulators fail + * for more than LABIBB_MAX_FATAL_COUNT, then a kernel panic will be + * triggered, as a last resort to protect the hardware from burning; + * this, however, is expected to never happen, but this is kept to + * try to further ensure that we protect the hardware at all costs. + */ +static void qcom_labibb_ocp_recovery_worker(struct work_struct *work) +{ + struct labibb_regulator *vreg; + const struct regulator_ops *ops; + int ret; + + vreg = container_of(work, struct labibb_regulator, + ocp_recovery_work.work); + ops = vreg->rdev->desc->ops; + + if (vreg->ocp_irq_count >= LABIBB_MAX_OCP_COUNT) { + /* + * If we tried to disable the regulator multiple times but + * we kept failing, there's only one last hope to save our + * hardware from the death: raise a kernel bug, reboot and + * hope that the bootloader kindly saves us. This, though + * is done only as paranoid checking, because failing the + * regmap write to disable the vreg is almost impossible, + * since we got here after multiple regmap R/W. + */ + BUG_ON(vreg->fatal_count > LABIBB_MAX_FATAL_COUNT); + dev_err(&vreg->rdev->dev, "LABIBB: CRITICAL: Disabling regulator\n"); + + /* Disable the regulator immediately to avoid damage */ + ret = ops->disable(vreg->rdev); + if (ret) { + vreg->fatal_count++; + goto reschedule; + } + enable_irq(vreg->ocp_irq); + vreg->fatal_count = 0; + return; + } + + ret = qcom_labibb_check_ocp_status(vreg); + if (ret != 0) { + vreg->ocp_irq_count++; + goto reschedule; + } + + ret = qcom_labibb_ocp_hw_enable(vreg->rdev); + if (ret) { + /* We cannot trust it without OCP enabled. */ + dev_err(vreg->dev, "Cannot enable OCP IRQ\n"); + vreg->ocp_irq_count++; + goto reschedule; + } + + enable_irq(vreg->ocp_irq); + /* Everything went fine: reset the OCP count! */ + vreg->ocp_irq_count = 0; + return; + +reschedule: + mod_delayed_work(system_dfl_wq, &vreg->ocp_recovery_work, + msecs_to_jiffies(OCP_RECOVERY_INTERVAL_MS)); +} + +/** + * qcom_labibb_ocp_isr - Interrupt routine for OverCurrent Protection + * @irq: Interrupt number + * @chip: Main driver structure + * + * Over Current Protection (OCP) will signal to the client driver + * that an over-current event has happened and then will schedule + * a recovery worker. + * + * Disabling and eventually re-enabling the regulator is expected + * to be done by the driver, as some hardware may be triggering an + * over-current condition only at first initialization or it may + * be expected only for a very brief amount of time, after which + * the attached hardware may be expected to stabilize its current + * draw. + * + * Returns: IRQ_HANDLED for success or IRQ_NONE for failure. + */ +static irqreturn_t qcom_labibb_ocp_isr(int irq, void *chip) +{ + struct labibb_regulator *vreg = chip; + const struct regulator_ops *ops = vreg->rdev->desc->ops; + int ret; + + /* If the regulator is not enabled, this is a fake event */ + if (!ops->is_enabled(vreg->rdev)) + return IRQ_HANDLED; + + /* If we tried to recover for too many times it's not getting better */ + if (vreg->ocp_irq_count > LABIBB_MAX_OCP_COUNT) + return IRQ_NONE; + + /* + * If we (unlikely) can't read this register, to prevent hardware + * damage at all costs, we assume that the overcurrent event was + * real; Moreover, if the status register is not signaling OCP, + * it was a spurious event, so it's all ok. + */ + ret = qcom_labibb_check_ocp_status(vreg); + if (ret == 0) { + vreg->ocp_irq_count = 0; + goto end; + } + vreg->ocp_irq_count++; + + /* + * Disable the interrupt temporarily, or it will fire continuously; + * we will re-enable it in the recovery worker function. + */ + disable_irq_nosync(irq); + + /* Warn the user for overcurrent */ + dev_warn(vreg->dev, "Over-Current interrupt fired!\n"); + + /* Disable the interrupt to avoid hogging */ + ret = qcom_labibb_ocp_hw_disable(vreg->rdev); + if (ret) + goto end; + + /* Signal overcurrent event to drivers */ + regulator_notifier_call_chain(vreg->rdev, + REGULATOR_EVENT_OVER_CURRENT, NULL); + +end: + /* Schedule the recovery work */ + schedule_delayed_work(&vreg->ocp_recovery_work, + msecs_to_jiffies(OCP_RECOVERY_INTERVAL_MS)); + if (ret) + return IRQ_NONE; + + return IRQ_HANDLED; +} + +static int qcom_labibb_set_ocp(struct regulator_dev *rdev, int lim, + int severity, bool enable) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + char *ocp_irq_name; + u32 irq_flags = IRQF_ONESHOT; + int irq_trig_low, ret; + + /* + * labibb supports only protection - and does not support setting + * limit. Furthermore, we don't support disabling protection. + */ + if (lim || severity != REGULATOR_SEVERITY_PROT || !enable) + return -EINVAL; + + /* If there is no OCP interrupt, there's nothing to set */ + if (vreg->ocp_irq <= 0) + return -EINVAL; + + ocp_irq_name = devm_kasprintf(vreg->dev, GFP_KERNEL, "%s-over-current", + vreg->desc.name); + if (!ocp_irq_name) + return -ENOMEM; + + /* IRQ polarities - LAB: trigger-low, IBB: trigger-high */ + switch (vreg->type) { + case QCOM_LAB_TYPE: + irq_flags |= IRQF_TRIGGER_LOW; + irq_trig_low = 1; + break; + case QCOM_IBB_TYPE: + irq_flags |= IRQF_TRIGGER_HIGH; + irq_trig_low = 0; + break; + default: + return -EINVAL; + } + + /* Activate OCP HW level interrupt */ + ret = regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_SET_TYPE, + LABIBB_INT_VREG_OK, + LABIBB_INT_VREG_TYPE_LEVEL); + if (ret) + return ret; + + /* Set OCP interrupt polarity */ + ret = regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_POLARITY_HIGH, + LABIBB_INT_VREG_OK, !irq_trig_low); + if (ret) + return ret; + ret = regmap_update_bits(rdev->regmap, + vreg->base + REG_LABIBB_INT_POLARITY_LOW, + LABIBB_INT_VREG_OK, irq_trig_low); + if (ret) + return ret; + + ret = qcom_labibb_ocp_hw_enable(rdev); + if (ret) + return ret; + + return devm_request_threaded_irq(vreg->dev, vreg->ocp_irq, NULL, + qcom_labibb_ocp_isr, irq_flags, + ocp_irq_name, vreg); +} + +/** + * qcom_labibb_check_sc_status - Check the Short Circuit Protection status + * @vreg: Main driver structure + * + * This function checks the STATUS1 register on both LAB and IBB regulators + * for the ShortCircuit bit: if it is set on *any* of them, then we have + * experienced a short-circuit event. + * + * Returns: Zero if there is no short-circuit, 1 if in short-circuit or + * negative number for error + */ +static int qcom_labibb_check_sc_status(struct labibb_regulator *vreg) +{ + u32 ibb_status, ibb_reg, lab_status, lab_reg; + int ret; + + /* We have to work on both regulators due to PBS... */ + lab_reg = ibb_reg = vreg->base + REG_LABIBB_STATUS1; + if (vreg->type == QCOM_LAB_TYPE) + ibb_reg -= PMI8998_IBB_LAB_REG_OFFSET; + else + lab_reg += PMI8998_IBB_LAB_REG_OFFSET; + + ret = regmap_read(vreg->rdev->regmap, lab_reg, &lab_status); + if (ret) + return ret; + ret = regmap_read(vreg->rdev->regmap, ibb_reg, &ibb_status); + if (ret) + return ret; + + return !!(lab_status & LABIBB_STATUS1_SC_BIT) || + !!(ibb_status & LABIBB_STATUS1_SC_BIT); +} + +/** + * qcom_labibb_sc_recovery_worker - Handle Short Circuit event + * @work: SC work structure + * + * This is the worker function to handle the Short Circuit Protection + * hardware event; This will check if the hardware is still + * signaling a short-circuit condition and will eventually never + * re-enable the regulator if such condition is still signaled after + * LABIBB_MAX_SC_COUNT times. + * + * If the driver that is consuming the regulator did not take action + * for the SC condition, or the hardware did not stabilize, this + * worker will stop rescheduling, leaving the regulators disabled + * as already done by the Portable Batch System (PBS). + * + * Returns: IRQ_HANDLED for success or IRQ_NONE for failure. + */ +static void qcom_labibb_sc_recovery_worker(struct work_struct *work) +{ + struct labibb_regulator *vreg; + const struct regulator_ops *ops; + u32 lab_reg, ibb_reg, lab_val, ibb_val, val; + bool pbs_cut = false; + int i, sc, ret; + + vreg = container_of(work, struct labibb_regulator, + sc_recovery_work.work); + ops = vreg->rdev->desc->ops; + + /* + * If we tried to check the regulator status multiple times but we + * kept failing, then just bail out, as the Portable Batch System + * (PBS) will disable the vregs for us, preventing hardware damage. + */ + if (vreg->fatal_count > LABIBB_MAX_FATAL_COUNT) + return; + + /* Too many short-circuit events. Throw in the towel. */ + if (vreg->sc_count > LABIBB_MAX_SC_COUNT) + return; + + /* + * The Portable Batch System (PBS) automatically disables LAB + * and IBB when a short-circuit event is detected, so we have to + * check and work on both of them at the same time. + */ + lab_reg = ibb_reg = vreg->base + REG_LABIBB_ENABLE_CTL; + if (vreg->type == QCOM_LAB_TYPE) + ibb_reg -= PMI8998_IBB_LAB_REG_OFFSET; + else + lab_reg += PMI8998_IBB_LAB_REG_OFFSET; + + sc = qcom_labibb_check_sc_status(vreg); + if (sc) + goto reschedule; + + for (i = 0; i < LABIBB_MAX_SC_COUNT; i++) { + ret = regmap_read(vreg->regmap, lab_reg, &lab_val); + if (ret) { + vreg->fatal_count++; + goto reschedule; + } + + ret = regmap_read(vreg->regmap, ibb_reg, &ibb_val); + if (ret) { + vreg->fatal_count++; + goto reschedule; + } + val = lab_val & ibb_val; + + if (!(val & LABIBB_CONTROL_ENABLE)) { + pbs_cut = true; + break; + } + usleep_range(5000, 6000); + } + if (pbs_cut) + goto reschedule; + + + /* + * If we have reached this point, we either have successfully + * recovered from the SC condition or we had a spurious SC IRQ, + * which means that we can re-enable the regulators, if they + * have ever been disabled by the PBS. + */ + ret = ops->enable(vreg->rdev); + if (ret) + goto reschedule; + + /* Everything went fine: reset the OCP count! */ + vreg->sc_count = 0; + enable_irq(vreg->sc_irq); + return; + +reschedule: + /* + * Now that we have done basic handling of the short-circuit, + * reschedule this worker in the regular system workqueue, as + * taking action is not truly urgent anymore. + */ + vreg->sc_count++; + mod_delayed_work(system_dfl_wq, &vreg->sc_recovery_work, + msecs_to_jiffies(SC_RECOVERY_INTERVAL_MS)); +} + +/** + * qcom_labibb_sc_isr - Interrupt routine for Short Circuit Protection + * @irq: Interrupt number + * @chip: Main driver structure + * + * Short Circuit Protection (SCP) will signal to the client driver + * that a regulation-out event has happened and then will schedule + * a recovery worker. + * + * The LAB and IBB regulators will be automatically disabled by the + * Portable Batch System (PBS) and they will be enabled again by + * the worker function if the hardware stops signaling the short + * circuit event. + * + * Returns: IRQ_HANDLED for success or IRQ_NONE for failure. + */ +static irqreturn_t qcom_labibb_sc_isr(int irq, void *chip) +{ + struct labibb_regulator *vreg = chip; + + if (vreg->sc_count > LABIBB_MAX_SC_COUNT) + return IRQ_NONE; + + /* Warn the user for short circuit */ + dev_warn(vreg->dev, "Short-Circuit interrupt fired!\n"); + + /* + * Disable the interrupt temporarily, or it will fire continuously; + * we will re-enable it in the recovery worker function. + */ + disable_irq_nosync(irq); + + /* Signal out of regulation event to drivers */ + regulator_notifier_call_chain(vreg->rdev, + REGULATOR_EVENT_REGULATION_OUT, NULL); + + /* Schedule the short-circuit handling as high-priority work */ + mod_delayed_work(system_highpri_wq, &vreg->sc_recovery_work, + msecs_to_jiffies(SC_RECOVERY_INTERVAL_MS)); + return IRQ_HANDLED; +} + + +static int qcom_labibb_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + struct regulator_desc *desc = &vreg->desc; + struct labibb_current_limits *lim = &vreg->uA_limits; + u32 mask, val; + int i, ret, sel = -1; + + if (min_uA < lim->uA_min || max_uA < lim->uA_min) + return -EINVAL; + + for (i = 0; i < desc->n_current_limits; i++) { + int uA_limit = (lim->uA_step * i) + lim->uA_min; + + if (max_uA >= uA_limit && min_uA <= uA_limit) + sel = i; + } + if (sel < 0) + return -EINVAL; + + /* Current limit setting needs secure access */ + ret = regmap_write(vreg->regmap, vreg->base + REG_LABIBB_SEC_ACCESS, + LABIBB_SEC_UNLOCK_CODE); + if (ret) + return ret; + + mask = desc->csel_mask | lim->ovr_val; + mask |= LABIBB_CURRENT_LIMIT_EN; + val = (u32)sel | lim->ovr_val; + val |= LABIBB_CURRENT_LIMIT_EN; + + return regmap_update_bits(vreg->regmap, desc->csel_reg, mask, val); +} + +static int qcom_labibb_get_current_limit(struct regulator_dev *rdev) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + struct regulator_desc *desc = &vreg->desc; + struct labibb_current_limits *lim = &vreg->uA_limits; + unsigned int cur_step; + int ret; + + ret = regmap_read(vreg->regmap, desc->csel_reg, &cur_step); + if (ret) + return ret; + cur_step &= desc->csel_mask; + + return (cur_step * lim->uA_step) + lim->uA_min; +} + +static int qcom_labibb_set_soft_start(struct regulator_dev *rdev) +{ + struct labibb_regulator *vreg = rdev_get_drvdata(rdev); + u32 val = 0; + + if (vreg->type == QCOM_IBB_TYPE) + val = vreg->dischg_sel; + else + val = vreg->soft_start_sel; + + return regmap_write(rdev->regmap, rdev->desc->soft_start_reg, val); +} + +static int qcom_labibb_get_table_sel(const int *table, int sz, u32 value) +{ + int i; + + for (i = 0; i < sz; i++) + if (table[i] == value) + return i; + return -EINVAL; +} + +/* IBB discharge resistor values in KOhms */ +static const int dischg_resistor_values[] = { 300, 64, 32, 16 }; + +/* Soft start time in microseconds */ +static const int soft_start_values[] = { 200, 400, 600, 800 }; + +static int qcom_labibb_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct labibb_regulator *vreg = config->driver_data; + u32 dischg_kohms, soft_start_time; + int ret; + + ret = of_property_read_u32(np, "qcom,discharge-resistor-kohms", + &dischg_kohms); + if (ret) + dischg_kohms = 300; + + ret = qcom_labibb_get_table_sel(dischg_resistor_values, + ARRAY_SIZE(dischg_resistor_values), + dischg_kohms); + if (ret < 0) + return ret; + vreg->dischg_sel = (u8)ret; + + ret = of_property_read_u32(np, "qcom,soft-start-us", + &soft_start_time); + if (ret) + soft_start_time = 200; + + ret = qcom_labibb_get_table_sel(soft_start_values, + ARRAY_SIZE(soft_start_values), + soft_start_time); + if (ret < 0) + return ret; + vreg->soft_start_sel = (u8)ret; + + return 0; +} + +static const struct regulator_ops qcom_labibb_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_pull_down = regulator_set_pull_down_regmap, + .set_current_limit = qcom_labibb_set_current_limit, + .get_current_limit = qcom_labibb_get_current_limit, + .set_soft_start = qcom_labibb_set_soft_start, + .set_over_current_protection = qcom_labibb_set_ocp, +}; + +static const struct regulator_desc pmi8998_lab_desc = { + .enable_mask = LAB_ENABLE_CTL_MASK, + .enable_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_ENABLE_CTL), + .enable_val = LABIBB_CONTROL_ENABLE, + .enable_time = LAB_ENABLE_TIME, + .poll_enabled_time = LABIBB_POLL_ENABLED_TIME, + .soft_start_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_SOFT_START_CTL), + .pull_down_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_PD_CTL), + .pull_down_mask = LAB_PD_CTL_MASK, + .pull_down_val_on = LAB_PD_CTL_STRONG_PULL, + .vsel_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_VOLTAGE), + .vsel_mask = LAB_VOLTAGE_SET_MASK, + .apply_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_VOLTAGE), + .apply_bit = LABIBB_VOLTAGE_OVERRIDE_EN, + .csel_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_CURRENT_LIMIT), + .csel_mask = LAB_CURRENT_LIMIT_MASK, + .n_current_limits = 8, + .off_on_delay = LABIBB_OFF_ON_DELAY, + .owner = THIS_MODULE, + .type = REGULATOR_VOLTAGE, + .min_uV = 4600000, + .uV_step = 100000, + .n_voltages = 16, + .ops = &qcom_labibb_ops, + .of_parse_cb = qcom_labibb_of_parse_cb, +}; + +static const struct regulator_desc pmi8998_ibb_desc = { + .enable_mask = IBB_ENABLE_CTL_MASK, + .enable_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_ENABLE_CTL), + .enable_val = LABIBB_CONTROL_ENABLE, + .enable_time = IBB_ENABLE_TIME, + .poll_enabled_time = LABIBB_POLL_ENABLED_TIME, + .soft_start_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_SOFT_START_CTL), + .active_discharge_off = 0, + .active_discharge_on = IBB_CTL_1_DISCHARGE_EN, + .active_discharge_mask = IBB_CTL_1_DISCHARGE_EN, + .active_discharge_reg = (PMI8998_IBB_REG_BASE + REG_IBB_PWRUP_PWRDN_CTL_1), + .pull_down_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_PD_CTL), + .pull_down_mask = IBB_PD_CTL_MASK, + .pull_down_val_on = IBB_PD_CTL_HALF_STRENGTH | IBB_PD_CTL_EN, + .vsel_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_VOLTAGE), + .vsel_mask = IBB_VOLTAGE_SET_MASK, + .apply_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_VOLTAGE), + .apply_bit = LABIBB_VOLTAGE_OVERRIDE_EN, + .csel_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_CURRENT_LIMIT), + .csel_mask = IBB_CURRENT_LIMIT_MASK, + .n_current_limits = 32, + .off_on_delay = LABIBB_OFF_ON_DELAY, + .owner = THIS_MODULE, + .type = REGULATOR_VOLTAGE, + .min_uV = 1400000, + .uV_step = 100000, + .n_voltages = 64, + .ops = &qcom_labibb_ops, + .of_parse_cb = qcom_labibb_of_parse_cb, +}; + +static const struct labibb_regulator_data pmi8998_labibb_data[] = { + {"lab", QCOM_LAB_TYPE, PMI8998_LAB_REG_BASE, &pmi8998_lab_desc}, + {"ibb", QCOM_IBB_TYPE, PMI8998_IBB_REG_BASE, &pmi8998_ibb_desc}, + { }, +}; + +static const struct of_device_id qcom_labibb_match[] = { + { .compatible = "qcom,pmi8998-lab-ibb", .data = &pmi8998_labibb_data}, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_labibb_match); + +static int qcom_labibb_regulator_probe(struct platform_device *pdev) +{ + struct labibb_regulator *vreg; + struct device *dev = &pdev->dev; + struct regulator_config cfg = {}; + struct device_node *reg_node; + const struct labibb_regulator_data *reg_data; + struct regmap *reg_regmap; + unsigned int type; + int ret; + + reg_regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!reg_regmap) { + dev_err(&pdev->dev, "Couldn't get parent's regmap\n"); + return -ENODEV; + } + + reg_data = device_get_match_data(&pdev->dev); + if (!reg_data) + return -ENODEV; + + for (; reg_data->name; reg_data++) { + char *sc_irq_name; + int irq = 0; + + /* Validate if the type of regulator is indeed + * what's mentioned in DT. + */ + ret = regmap_read(reg_regmap, reg_data->base + REG_PERPH_TYPE, + &type); + if (ret < 0) { + dev_err(dev, + "Peripheral type read failed ret=%d\n", + ret); + return -EINVAL; + } + + if (WARN_ON((type != QCOM_LAB_TYPE) && (type != QCOM_IBB_TYPE)) || + WARN_ON(type != reg_data->type)) + return -EINVAL; + + vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), + GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + sc_irq_name = devm_kasprintf(dev, GFP_KERNEL, + "%s-short-circuit", + reg_data->name); + if (!sc_irq_name) + return -ENOMEM; + + reg_node = of_get_child_by_name(pdev->dev.of_node, + reg_data->name); + if (!reg_node) + return -EINVAL; + + /* The Short Circuit interrupt is critical */ + irq = of_irq_get_byname(reg_node, "sc-err"); + if (irq <= 0) { + if (irq == 0) + irq = -EINVAL; + + of_node_put(reg_node); + return dev_err_probe(vreg->dev, irq, + "Short-circuit irq not found.\n"); + } + vreg->sc_irq = irq; + + /* OverCurrent Protection IRQ is optional */ + irq = of_irq_get_byname(reg_node, "ocp"); + vreg->ocp_irq = irq; + vreg->ocp_irq_count = 0; + of_node_put(reg_node); + + vreg->regmap = reg_regmap; + vreg->dev = dev; + vreg->base = reg_data->base; + vreg->type = reg_data->type; + INIT_DELAYED_WORK(&vreg->sc_recovery_work, + qcom_labibb_sc_recovery_worker); + + if (vreg->ocp_irq > 0) + INIT_DELAYED_WORK(&vreg->ocp_recovery_work, + qcom_labibb_ocp_recovery_worker); + + switch (vreg->type) { + case QCOM_LAB_TYPE: + /* LAB Limits: 200-1600mA */ + vreg->uA_limits.uA_min = 200000; + vreg->uA_limits.uA_step = 200000; + vreg->uA_limits.ovr_val = LAB_CURRENT_LIMIT_OVERRIDE_EN; + break; + case QCOM_IBB_TYPE: + /* IBB Limits: 0-1550mA */ + vreg->uA_limits.uA_min = 0; + vreg->uA_limits.uA_step = 50000; + vreg->uA_limits.ovr_val = 0; /* No override bit */ + break; + default: + return -EINVAL; + } + + memcpy(&vreg->desc, reg_data->desc, sizeof(vreg->desc)); + vreg->desc.of_match = reg_data->name; + vreg->desc.name = reg_data->name; + + cfg.dev = vreg->dev; + cfg.driver_data = vreg; + cfg.regmap = vreg->regmap; + + vreg->rdev = devm_regulator_register(vreg->dev, &vreg->desc, + &cfg); + + if (IS_ERR(vreg->rdev)) { + dev_err(dev, "qcom_labibb: error registering %s : %d\n", + reg_data->name, ret); + return PTR_ERR(vreg->rdev); + } + + ret = devm_request_threaded_irq(vreg->dev, vreg->sc_irq, NULL, + qcom_labibb_sc_isr, + IRQF_ONESHOT | + IRQF_TRIGGER_RISING, + sc_irq_name, vreg); + if (ret) + return ret; + } + + return 0; +} + +static struct platform_driver qcom_labibb_regulator_driver = { + .driver = { + .name = "qcom-lab-ibb-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = qcom_labibb_match, + }, + .probe = qcom_labibb_regulator_probe, +}; +module_platform_driver(qcom_labibb_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm labibb driver"); +MODULE_AUTHOR("Nisha Kumari "); +MODULE_AUTHOR("Sumit Semwal "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/qcom-pm8008-regulator.c b/drivers/regulator/qcom-pm8008-regulator.c new file mode 100644 index 000000000..9c9b8be2e --- /dev/null +++ b/drivers/regulator/qcom-pm8008-regulator.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEFAULT_VOLTAGE_STEPPER_RATE 38400 + +#define LDO_STEPPER_CTL_REG 0x3b +#define STEP_RATE_MASK GENMASK(1, 0) + +#define LDO_VSET_LB_REG 0x40 + +#define LDO_ENABLE_REG 0x46 +#define ENABLE_BIT BIT(7) + +struct pm8008_regulator { + struct regmap *regmap; + struct regulator_desc desc; + unsigned int base; +}; + +struct pm8008_regulator_data { + const char *name; + const char *supply_name; + unsigned int base; + int min_dropout_uV; + const struct linear_range *voltage_range; +}; + +static const struct linear_range nldo_ranges[] = { + REGULATOR_LINEAR_RANGE(528000, 0, 122, 8000), +}; + +static const struct linear_range pldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1504000, 0, 237, 8000), +}; + +static const struct pm8008_regulator_data pm8008_reg_data[] = { + { "ldo1", "vdd-l1-l2", 0x4000, 225000, nldo_ranges, }, + { "ldo2", "vdd-l1-l2", 0x4100, 225000, nldo_ranges, }, + { "ldo3", "vdd-l3-l4", 0x4200, 300000, pldo_ranges, }, + { "ldo4", "vdd-l3-l4", 0x4300, 300000, pldo_ranges, }, + { "ldo5", "vdd-l5", 0x4400, 200000, pldo_ranges, }, + { "ldo6", "vdd-l6", 0x4500, 200000, pldo_ranges, }, + { "ldo7", "vdd-l7", 0x4600, 200000, pldo_ranges, }, +}; + +static int pm8008_regulator_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + struct pm8008_regulator *preg = rdev_get_drvdata(rdev); + unsigned int mV; + __le16 val; + int ret; + + ret = regulator_list_voltage_linear_range(rdev, sel); + if (ret < 0) + return ret; + + mV = DIV_ROUND_UP(ret, 1000); + + val = cpu_to_le16(mV); + + ret = regmap_bulk_write(preg->regmap, preg->base + LDO_VSET_LB_REG, + &val, sizeof(val)); + if (ret < 0) + return ret; + + return 0; +} + +static int pm8008_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + struct pm8008_regulator *preg = rdev_get_drvdata(rdev); + unsigned int uV; + __le16 val; + int ret; + + ret = regmap_bulk_read(preg->regmap, preg->base + LDO_VSET_LB_REG, + &val, sizeof(val)); + if (ret < 0) + return ret; + + uV = le16_to_cpu(val) * 1000; + + return regulator_map_voltage_linear_range(rdev, uV, INT_MAX); +} + +static const struct regulator_ops pm8008_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = pm8008_regulator_set_voltage_sel, + .get_voltage_sel = pm8008_regulator_get_voltage_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int pm8008_regulator_probe(struct platform_device *pdev) +{ + const struct pm8008_regulator_data *data; + struct regulator_config config = {}; + struct device *dev = &pdev->dev; + struct pm8008_regulator *preg; + struct regulator_desc *desc; + struct regulator_dev *rdev; + struct regmap *regmap; + unsigned int val; + int ret, i; + + regmap = dev_get_regmap(dev->parent, "secondary"); + if (!regmap) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(pm8008_reg_data); i++) { + data = &pm8008_reg_data[i]; + + preg = devm_kzalloc(dev, sizeof(*preg), GFP_KERNEL); + if (!preg) + return -ENOMEM; + + preg->regmap = regmap; + preg->base = data->base; + + desc = &preg->desc; + + desc->name = data->name; + desc->supply_name = data->supply_name; + desc->of_match = data->name; + desc->regulators_node = of_match_ptr("regulators"); + desc->ops = &pm8008_regulator_ops; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + desc->linear_ranges = data->voltage_range; + desc->n_linear_ranges = 1; + desc->uV_step = desc->linear_ranges[0].step; + desc->min_uV = desc->linear_ranges[0].min; + desc->n_voltages = linear_range_values_in_range(&desc->linear_ranges[0]); + + ret = regmap_read(regmap, preg->base + LDO_STEPPER_CTL_REG, &val); + if (ret < 0) { + dev_err(dev, "failed to read step rate: %d\n", ret); + return ret; + } + val &= STEP_RATE_MASK; + desc->ramp_delay = DEFAULT_VOLTAGE_STEPPER_RATE >> val; + + desc->min_dropout_uV = data->min_dropout_uV; + + desc->enable_reg = preg->base + LDO_ENABLE_REG; + desc->enable_mask = ENABLE_BIT; + + config.dev = dev->parent; + config.driver_data = preg; + config.regmap = regmap; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "failed to register regulator %s: %d\n", + desc->name, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id pm8008_regulator_id_table[] = { + { .name = "pm8008-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm8008_regulator_id_table); + +static struct platform_driver pm8008_regulator_driver = { + .driver = { + .name = "qcom-pm8008-regulator", + }, + .probe = pm8008_regulator_probe, + .id_table = pm8008_regulator_id_table, +}; +module_platform_driver(pm8008_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm PM8008 PMIC regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/qcom-refgen-regulator.c b/drivers/regulator/qcom-refgen-regulator.c new file mode 100644 index 000000000..cc72e5a43 --- /dev/null +++ b/drivers/regulator/qcom-refgen-regulator.c @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2017, 2019-2020, The Linux Foundation. All rights reserved. +// Copyright (c) 2023, Linaro Limited + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define REFGEN_REG_BIAS_EN 0x08 +#define REFGEN_BIAS_EN_MASK GENMASK(2, 0) + #define REFGEN_BIAS_EN_ENABLE 0x7 + #define REFGEN_BIAS_EN_DISABLE 0x6 + +#define REFGEN_REG_REFGEN_STATUS 0xc +#define REFGEN_STATUS_OUT_MASK BIT(3) + +#define REFGEN_REG_BG_CTRL 0x14 +#define REFGEN_BG_CTRL_MASK GENMASK(2, 1) + #define REFGEN_BG_CTRL_ENABLE 0x3 + #define REFGEN_BG_CTRL_DISABLE 0x2 + +#define REFGEN_REG_PWRDWN_CTRL5 0x80 +#define REFGEN_PWRDWN_CTRL5_MASK BIT(0) + #define REFGEN_PWRDWN_CTRL5_ENABLE 0x1 + +struct qcom_refgen_regulator_data { + const struct regulator_desc *rdesc; + bool has_clocks; +}; + +struct qcom_refgen_drvdata { + struct clk_bulk_data *clks; + int num_clks; + bool is_enabled; +}; + +static int qcom_sdm845_refgen_enable(struct regulator_dev *rdev) +{ + regmap_update_bits(rdev->regmap, REFGEN_REG_BG_CTRL, REFGEN_BG_CTRL_MASK, + FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_ENABLE)); + + regmap_write(rdev->regmap, REFGEN_REG_BIAS_EN, + FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_ENABLE)); + + return 0; +} + +static int qcom_sdm845_refgen_disable(struct regulator_dev *rdev) +{ + regmap_write(rdev->regmap, REFGEN_REG_BIAS_EN, + FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_DISABLE)); + + regmap_update_bits(rdev->regmap, REFGEN_REG_BG_CTRL, REFGEN_BG_CTRL_MASK, + FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_DISABLE)); + + return 0; +} + +static int qcom_sdm845_refgen_is_enabled(struct regulator_dev *rdev) +{ + u32 val; + + regmap_read(rdev->regmap, REFGEN_REG_BG_CTRL, &val); + if (FIELD_GET(REFGEN_BG_CTRL_MASK, val) != REFGEN_BG_CTRL_ENABLE) + return 0; + + regmap_read(rdev->regmap, REFGEN_REG_BIAS_EN, &val); + if (FIELD_GET(REFGEN_BIAS_EN_MASK, val) != REFGEN_BIAS_EN_ENABLE) + return 0; + + return 1; +} + +static int qcom_ipq9650_refgen_enable(struct regulator_dev *rdev) +{ + struct qcom_refgen_drvdata *drvdata = rdev_get_drvdata(rdev); + int ret; + + ret = clk_bulk_prepare_enable(drvdata->num_clks, drvdata->clks); + if (ret) + return ret; + + drvdata->is_enabled = true; + + return 0; +} + +static int qcom_ipq9650_refgen_disable(struct regulator_dev *rdev) +{ + struct qcom_refgen_drvdata *drvdata = rdev_get_drvdata(rdev); + + clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks); + + drvdata->is_enabled = false; + + return 0; +} + +static int qcom_ipq9650_refgen_is_enabled(struct regulator_dev *rdev) +{ + struct qcom_refgen_drvdata *drvdata = rdev_get_drvdata(rdev); + + return drvdata->is_enabled; +} + +static int qcom_ipq9650_refgen_get_status(struct regulator_dev *rdev) +{ + u32 val; + + regmap_read(rdev->regmap, REFGEN_REG_REFGEN_STATUS, &val); + if (FIELD_GET(REFGEN_STATUS_OUT_MASK, val)) + return REGULATOR_STATUS_ON; + + return REGULATOR_STATUS_OFF; +} + +static const struct regulator_desc ipq9650_refgen_desc = { + .enable_time = 5, + .name = "refgen", + .owner = THIS_MODULE, + .type = REGULATOR_CURRENT, + .ops = &(const struct regulator_ops) { + .enable = qcom_ipq9650_refgen_enable, + .disable = qcom_ipq9650_refgen_disable, + .is_enabled = qcom_ipq9650_refgen_is_enabled, + .get_status = qcom_ipq9650_refgen_get_status, + }, +}; + +static const struct regulator_desc sdm845_refgen_desc = { + .enable_time = 5, + .name = "refgen", + .owner = THIS_MODULE, + .type = REGULATOR_CURRENT, + .ops = &(const struct regulator_ops) { + .enable = qcom_sdm845_refgen_enable, + .disable = qcom_sdm845_refgen_disable, + .is_enabled = qcom_sdm845_refgen_is_enabled, + }, +}; + +static const struct regulator_desc sm8250_refgen_desc = { + .enable_reg = REFGEN_REG_PWRDWN_CTRL5, + .enable_mask = REFGEN_PWRDWN_CTRL5_MASK, + .enable_val = REFGEN_PWRDWN_CTRL5_ENABLE, + .disable_val = 0, + .enable_time = 5, + .name = "refgen", + .owner = THIS_MODULE, + .type = REGULATOR_CURRENT, + .ops = &(const struct regulator_ops) { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + }, +}; + +static const struct qcom_refgen_regulator_data ipq9650_data = { + .rdesc = &ipq9650_refgen_desc, + .has_clocks = true, +}; + +static const struct qcom_refgen_regulator_data sdm845_data = { + .rdesc = &sdm845_refgen_desc, +}; + +static const struct qcom_refgen_regulator_data sm8250_data = { + .rdesc = &sm8250_refgen_desc, +}; + +static const struct regmap_config qcom_refgen_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, +}; + +static int qcom_refgen_probe(struct platform_device *pdev) +{ + const struct qcom_refgen_regulator_data *data; + struct qcom_refgen_drvdata *drvdata = NULL; + struct regulator_init_data *init_data; + struct regulator_config config = {}; + const struct regulator_desc *rdesc; + struct device *dev = &pdev->dev; + struct regulator_dev *rdev; + struct regmap *regmap; + void __iomem *base; + + data = of_device_get_match_data(dev); + if (!data) + return -ENODATA; + + if (data->has_clocks) { + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->num_clks = devm_clk_bulk_get_all(dev, &drvdata->clks); + if (drvdata->num_clks < 0) + return dev_err_probe(dev, drvdata->num_clks, + "failed to get clocks\n"); + } + + rdesc = data->rdesc; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap = devm_regmap_init_mmio(dev, base, &qcom_refgen_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + init_data = of_get_regulator_init_data(dev, dev->of_node, rdesc); + if (!init_data) + return -ENOMEM; + + config.dev = dev; + config.init_data = init_data; + config.of_node = dev->of_node; + config.regmap = regmap; + config.driver_data = drvdata; + + rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + return 0; +} + +static const struct of_device_id qcom_refgen_match_table[] = { + { .compatible = "qcom,ipq9650-refgen-regulator", .data = &ipq9650_data }, + { .compatible = "qcom,sdm845-refgen-regulator", .data = &sdm845_data }, + { .compatible = "qcom,sm8250-refgen-regulator", .data = &sm8250_data }, + { } +}; +MODULE_DEVICE_TABLE(of, qcom_refgen_match_table); + +static struct platform_driver qcom_refgen_driver = { + .probe = qcom_refgen_probe, + .driver = { + .name = "qcom-refgen-regulator", + .of_match_table = qcom_refgen_match_table, + }, +}; +module_platform_driver(qcom_refgen_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Qualcomm REFGEN regulator driver"); diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c new file mode 100644 index 000000000..25c14de3c --- /dev/null +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -0,0 +1,2143 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. +// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + +#define pr_fmt(fmt) "%s: " fmt, __func__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +/** + * enum rpmh_regulator_type - supported RPMh accelerator types + * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, + * and mode of LDO, SMPS, and BOB type PMIC regulators. + * @XOB: RPMh XOB accelerator which supports voting on the enable state + * of PMIC regulators. + */ +enum rpmh_regulator_type { + VRM, + XOB, +}; + +/** + * enum regulator_hw_type - supported regulator types + * @SMPS: Switch mode power supply. + * @LDO: Linear Dropout regulator. + * @BOB: Buck/Boost type regulator. + * @VS: Simple voltage ON/OFF switch. + * @NUM_REGULATOR_TYPES: Number of regulator types. + */ +enum regulator_hw_type { + SMPS, + LDO, + BOB, + VS, + NUM_REGULATOR_TYPES, +}; + +struct resource_name_formats { + const char *rsc_name_fmt; + const char *rsc_name_fmt1; +}; + +static const struct resource_name_formats vreg_rsc_name_lookup[NUM_REGULATOR_TYPES] = { + [SMPS] = {"S%d%s", "smp%s%d"}, + [LDO] = {"L%d%s", "ldo%s%d"}, + [BOB] = {"B%d%s", "bob%s%d"}, + [VS] = {"VS%d%s", "vs%s%d"}, +}; + +#define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0 +#define RPMH_REGULATOR_VOLTAGE_MASK GENMASK(12, 0) + +#define RPMH_REGULATOR_REG_ENABLE 0x4 +#define RPMH_REGULATOR_ENABLE_MASK BIT(0) + +#define RPMH_REGULATOR_REG_VRM_MODE 0x8 +#define RPMH_REGULATOR_MODE_MASK GENMASK(2, 0) + +#define PMIC4_LDO_MODE_RETENTION 4 +#define PMIC4_LDO_MODE_LPM 5 +#define PMIC4_LDO_MODE_HPM 7 + +#define PMIC4_SMPS_MODE_RETENTION 4 +#define PMIC4_SMPS_MODE_PFM 5 +#define PMIC4_SMPS_MODE_AUTO 6 +#define PMIC4_SMPS_MODE_PWM 7 + +#define PMIC4_BOB_MODE_PASS 0 +#define PMIC4_BOB_MODE_PFM 1 +#define PMIC4_BOB_MODE_AUTO 2 +#define PMIC4_BOB_MODE_PWM 3 + +#define PMIC5_LDO_MODE_RETENTION 3 +#define PMIC5_LDO_MODE_LPM 4 +#define PMIC5_LDO_MODE_HPM 7 + +#define PMIC5_SMPS_MODE_RETENTION 3 +#define PMIC5_SMPS_MODE_PFM 4 +#define PMIC5_SMPS_MODE_AUTO 6 +#define PMIC5_SMPS_MODE_PWM 7 + +#define PMIC5_BOB_MODE_PASS 2 +#define PMIC5_BOB_MODE_PFM 4 +#define PMIC5_BOB_MODE_AUTO 6 +#define PMIC5_BOB_MODE_PWM 7 + +#define PMIC530_LDO_MODE_RETENTION 3 +#define PMIC530_LDO_MODE_LPM 4 +#define PMIC530_LDO_MODE_OPM 5 +#define PMIC530_LDO_MODE_HPM 7 + +#define PMIC_ID_LEN 4 +/** + * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations + * @regulator_type: RPMh accelerator type used to manage this + * regulator + * @ops: Pointer to regulator ops callback structure + * @voltage_ranges: The possible ranges of voltages supported by this + * PMIC regulator type + * @n_linear_ranges: Number of entries in voltage_ranges + * @n_voltages: The number of unique voltage set points defined + * by voltage_ranges + * @hpm_min_load_uA: Minimum load current in microamps that requires + * high power mode (HPM) operation. This is used + * for LDO hardware type regulators only. + * @pmic_bypass_mode: The PMIC bypass mode value. + * @pmic_mode_map: Array indexed by regulator framework mode + * containing PMIC hardware modes. Must be large + * enough to index all framework modes supported + * by this regulator hardware type. + * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined + * in device tree to a regulator framework mode + */ +struct rpmh_vreg_hw_data { + enum rpmh_regulator_type regulator_type; + const struct regulator_ops *ops; + const struct linear_range *voltage_ranges; + int n_linear_ranges; + int n_voltages; + int hpm_min_load_uA; + int pmic_bypass_mode; + const int *pmic_mode_map; + unsigned int (*of_map_mode)(unsigned int mode); +}; + +/** + * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a + * single regulator device + * @dev: Device pointer for the top-level PMIC RPMh + * regulator parent device. This is used as a + * handle in RPMh write requests. + * @addr: Base address of the regulator resource within + * an RPMh accelerator + * @rdesc: Regulator descriptor + * @hw_data: PMIC regulator configuration data for this RPMh + * regulator + * @always_wait_for_ack: Boolean flag indicating if a request must always + * wait for an ACK from RPMh before continuing even + * if it corresponds to a strictly lower power + * state (e.g. enabled --> disabled). + * @enabled: Flag indicating if the regulator is enabled or + * not + * @bypassed: Boolean indicating if the regulator is in + * bypass (pass-through) mode or not. This is + * only used by BOB rpmh-regulator resources. + * @voltage_selector: Selector used for get_voltage_sel() and + * set_voltage_sel() callbacks + * @mode: RPMh VRM regulator current framework mode + */ +struct rpmh_vreg { + struct device *dev; + u32 addr; + struct regulator_desc rdesc; + const struct rpmh_vreg_hw_data *hw_data; + bool always_wait_for_ack; + + int enabled; + bool bypassed; + int voltage_selector; + unsigned int mode; +}; + +/** + * struct rpmh_vreg_init_data - initialization data for an RPMh regulator + * @name: Name for the regulator which also corresponds + * to the device tree subnode name of the regulator + * @index: This is the index number of the regulator present + * on the PMIC. + * @vreg_hw_type: Regulator HW type enum, this must be BOB, SMPS, + * LDO, VS, based on the regulator HW type. + * @supply_name: Parent supply regulator name + * @hw_data: Configuration data for this PMIC regulator type + */ +struct rpmh_vreg_init_data { + const char *name; + enum regulator_hw_type vreg_hw_type; + int index; + const char *supply_name; + const struct rpmh_vreg_hw_data *hw_data; +}; + +/** + * rpmh_regulator_send_request() - send the request to RPMh + * @vreg: Pointer to the RPMh regulator + * @cmd: Pointer to the RPMh command to send + * @wait_for_ack: Boolean indicating if execution must wait until the + * request has been acknowledged as complete + * + * Return: 0 on success, or a negative error number on failure + */ +static int rpmh_regulator_send_request(struct rpmh_vreg *vreg, + struct tcs_cmd *cmd, bool wait_for_ack) +{ + int ret; + + if (wait_for_ack || vreg->always_wait_for_ack) + ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1); + else + ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, + 1); + + return ret; +} + +static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector, bool wait_for_ack) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE, + }; + int ret; + + /* VRM voltage control register is set with voltage in millivolts. */ + cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev, + selector), 1000); + + ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack); + if (!ret) + vreg->voltage_selector = selector; + + return ret; +} + +static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + + if (vreg->enabled == -EINVAL) { + /* + * Cache the voltage and send it later when the regulator is + * enabled or disabled. + */ + vreg->voltage_selector = selector; + return 0; + } + + return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector, + selector > vreg->voltage_selector); +} + +static int _rpmh_regulator_vrm_get_voltage(struct regulator_dev *rdev, int *uV) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE, + }; + int ret; + + ret = rpmh_read(vreg->dev, &cmd); + if (!ret) + *uV = (cmd.data & RPMH_REGULATOR_VOLTAGE_MASK) * 1000; + else + dev_err(vreg->dev, "failed to read VOLTAGE ret = %d\n", ret); + + return ret; +} + +static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + int ret, uV = 0; + + if (vreg->voltage_selector < 0) { + ret = _rpmh_regulator_vrm_get_voltage(rdev, &uV); + if (!ret && uV != 0) + vreg->voltage_selector = regulator_map_voltage_linear_range(rdev, + uV, INT_MAX); + } + + return vreg->voltage_selector; +} + +static int rpmh_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + + return vreg->enabled; +} + +static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev, + bool enable) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE, + .data = enable, + }; + int ret; + + if (vreg->enabled == -EINVAL && + vreg->voltage_selector != -ENOTRECOVERABLE) { + ret = _rpmh_regulator_vrm_set_voltage_sel(rdev, + vreg->voltage_selector, true); + if (ret < 0) + return ret; + } + + ret = rpmh_regulator_send_request(vreg, &cmd, enable); + if (!ret) + vreg->enabled = enable; + + return ret; +} + +static int rpmh_regulator_enable(struct regulator_dev *rdev) +{ + return rpmh_regulator_set_enable_state(rdev, true); +} + +static int rpmh_regulator_disable(struct regulator_dev *rdev) +{ + return rpmh_regulator_set_enable_state(rdev, false); +} + +static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg, + unsigned int mode, bool bypassed) +{ + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE, + }; + int pmic_mode; + + if (mode > REGULATOR_MODE_STANDBY) + return -EINVAL; + + pmic_mode = vreg->hw_data->pmic_mode_map[mode]; + if (pmic_mode < 0) + return pmic_mode; + + if (bypassed) + cmd.data = vreg->hw_data->pmic_bypass_mode; + else + cmd.data = pmic_mode; + + return rpmh_regulator_send_request(vreg, &cmd, true); +} + +static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + int ret; + + if (mode == vreg->mode) + return 0; + + ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed); + if (!ret) + vreg->mode = mode; + + return ret; +} + +static int rpmh_regulator_vrm_get_pmic_mode(struct rpmh_vreg *vreg, int *pmic_mode) +{ + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE, + }; + int ret; + + ret = rpmh_read(vreg->dev, &cmd); + if (!ret) + *pmic_mode = cmd.data & RPMH_REGULATOR_MODE_MASK; + else + return -EINVAL; + + return 0; +} + +static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + + return vreg->mode; +} + +/** + * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load + * @rdev: Regulator device pointer for the rpmh-regulator + * @input_uV: Input voltage + * @output_uV: Output voltage + * @load_uA: Aggregated load current in microamps + * + * This function is used in the regulator_ops for VRM type RPMh regulator + * devices. + * + * Return: 0 on success, or a negative error number on failure + */ +static unsigned int rpmh_regulator_vrm_get_optimum_mode( + struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + + if (load_uA >= vreg->hw_data->hpm_min_load_uA) + return REGULATOR_MODE_NORMAL; + else + return REGULATOR_MODE_IDLE; +} + +static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev, + bool enable) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + int ret; + + if (vreg->bypassed == enable) + return 0; + + ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable); + if (!ret) + vreg->bypassed = enable; + + return ret; +} + +static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev, + bool *enable) +{ + struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); + + *enable = vreg->bypassed; + + return 0; +} + +static const struct regulator_ops rpmh_regulator_vrm_ops = { + .enable = rpmh_regulator_enable, + .disable = rpmh_regulator_disable, + .is_enabled = rpmh_regulator_is_enabled, + .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, + .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .set_mode = rpmh_regulator_vrm_set_mode, + .get_mode = rpmh_regulator_vrm_get_mode, +}; + +static const struct regulator_ops rpmh_regulator_vrm_drms_ops = { + .enable = rpmh_regulator_enable, + .disable = rpmh_regulator_disable, + .is_enabled = rpmh_regulator_is_enabled, + .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, + .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .set_mode = rpmh_regulator_vrm_set_mode, + .get_mode = rpmh_regulator_vrm_get_mode, + .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode, +}; + +static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = { + .enable = rpmh_regulator_enable, + .disable = rpmh_regulator_disable, + .is_enabled = rpmh_regulator_is_enabled, + .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, + .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .set_mode = rpmh_regulator_vrm_set_mode, + .get_mode = rpmh_regulator_vrm_get_mode, + .set_bypass = rpmh_regulator_vrm_set_bypass, + .get_bypass = rpmh_regulator_vrm_get_bypass, +}; + +static const struct regulator_ops rpmh_regulator_xob_ops = { + .enable = rpmh_regulator_enable, + .disable = rpmh_regulator_disable, + .is_enabled = rpmh_regulator_is_enabled, +}; + +/** + * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator + * @vreg: Pointer to the individual rpmh-regulator resource + * @dev: Pointer to the top level rpmh-regulator PMIC device + * @node: Pointer to the individual rpmh-regulator resource + * device node + * @pmic_id: String used to identify the top level rpmh-regulator + * PMIC device on the board + * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator + * resources defined for the top level PMIC device + * + * Return: 0 on success, or a negative error number on failure + */ +static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev, + struct device_node *node, const char *pmic_id, + const struct rpmh_vreg_init_data *pmic_rpmh_data) +{ + struct regulator_config reg_config = {}; + char rpmh_resource_name[20] = ""; + const char *rsc_name; + const struct rpmh_vreg_init_data *rpmh_data; + struct regulator_init_data *init_data; + struct regulator_dev *rdev; + int ret; + + vreg->dev = dev; + + for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++) + if (of_node_name_eq(node, rpmh_data->name)) + break; + + if (!rpmh_data->name) { + dev_err(dev, "Unknown regulator %pOFn\n", node); + return -EINVAL; + } + + if (strnlen(pmic_id, PMIC_ID_LEN) > 1 && strnstr(pmic_id, "_E", PMIC_ID_LEN)) { + rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt; + scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), + rsc_name, rpmh_data->index, pmic_id); + + } else { + rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt1; + scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), + rsc_name, pmic_id, rpmh_data->index); + } + + vreg->addr = cmd_db_read_addr(rpmh_resource_name); + if (!vreg->addr) { + dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n", + node, rpmh_resource_name); + return -ENODEV; + } + + vreg->rdesc.name = rpmh_data->name; + vreg->rdesc.supply_name = rpmh_data->supply_name; + vreg->hw_data = rpmh_data->hw_data; + + vreg->enabled = -EINVAL; + vreg->voltage_selector = -ENOTRECOVERABLE; + vreg->mode = REGULATOR_MODE_INVALID; + + if (rpmh_data->hw_data->n_voltages) { + vreg->rdesc.linear_ranges = rpmh_data->hw_data->voltage_ranges; + vreg->rdesc.n_linear_ranges = rpmh_data->hw_data->n_linear_ranges; + vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages; + } + + vreg->always_wait_for_ack = of_property_read_bool(node, + "qcom,always-wait-for-ack"); + + vreg->rdesc.owner = THIS_MODULE; + vreg->rdesc.type = REGULATOR_VOLTAGE; + vreg->rdesc.ops = vreg->hw_data->ops; + vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode; + + init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc); + if (!init_data) + return -ENOMEM; + + if (rpmh_data->hw_data->regulator_type == XOB && + init_data->constraints.min_uV && + init_data->constraints.min_uV == init_data->constraints.max_uV) { + vreg->rdesc.fixed_uV = init_data->constraints.min_uV; + vreg->rdesc.n_voltages = 1; + } + + reg_config.dev = dev; + reg_config.init_data = init_data; + reg_config.of_node = node; + reg_config.driver_data = vreg; + + rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", + node, ret); + return ret; + } + + dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n", + node, rpmh_resource_name, vreg->addr); + + return 0; +} + +static int rpmh_regulator_determine_initial_mode(struct rpmh_vreg *vreg) +{ + struct tcs_cmd cmd = { + .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE, + }; + int ret, pmic_mode, mode; + int sts; + + ret = rpmh_read(vreg->dev, &cmd); + if (ret) { + dev_err(vreg->dev, "failed to read ENABLE status ret = %d\n", ret); + + return ret; + } + + sts = cmd.data & RPMH_REGULATOR_ENABLE_MASK; + if (!sts) + return 0; + + if (vreg->hw_data->regulator_type == XOB) + return 0; + + ret = rpmh_regulator_vrm_get_pmic_mode(vreg, &pmic_mode); + if (ret < 0) { + vreg->mode = REGULATOR_MODE_INVALID; + dev_err(vreg->dev, "failed to read pmic_mode ret = %d\n", ret); + + return ret; + } + + /* + * NOTE: Since BOB4 BYPASS_MODE value = 0 we cannot confirm if that BOB + * regulator has been sent into bypass mode by bootloader or if bootloader + * just has not requested for any mode voting. Due this limitation, we + * must check if the read pmic_mode value is non-zero before comparing it + * to bypass mode value. This also is needed to avoid setting BYPASS status + * for LDOs which dont support bypass mode, and have the pmic_bypass_mode + * uninitialized value as zero in the vreg hw data. For such cases assume + * lowest mode, if pmic_mode is zero, to allow for mode voting. + */ + if (!pmic_mode) { + for (mode = REGULATOR_MODE_STANDBY; mode > REGULATOR_MODE_INVALID; mode >>= 1) { + if (vreg->hw_data->pmic_mode_map[mode] >= 0) { + vreg->mode = mode; + break; + } + } + + return 0; + } + + if (vreg->hw_data->pmic_bypass_mode == pmic_mode) { + vreg->bypassed = true; + + return 0; + } + + for (mode = REGULATOR_MODE_STANDBY; mode > REGULATOR_MODE_INVALID; mode >>= 1) { + if (pmic_mode == vreg->hw_data->pmic_mode_map[mode]) { + vreg->mode = mode; + break; + } + } + + return 0; +} + +static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION, + [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM, + [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM, + [REGULATOR_MODE_FAST] = -EINVAL, +}; + +static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION, + [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM, + [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM, + [REGULATOR_MODE_FAST] = -EINVAL, +}; + +static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = -EINVAL, + [REGULATOR_MODE_IDLE] = -EINVAL, + [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM, + [REGULATOR_MODE_FAST] = -EINVAL, +}; + +static const int pmic_mode_map_pmic530_ldo[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = PMIC530_LDO_MODE_RETENTION, + [REGULATOR_MODE_IDLE] = PMIC530_LDO_MODE_LPM, + [REGULATOR_MODE_NORMAL] = PMIC530_LDO_MODE_OPM, + [REGULATOR_MODE_FAST] = PMIC530_LDO_MODE_HPM, +}; + +static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode) +{ + unsigned int mode; + + switch (rpmh_mode) { + case RPMH_REGULATOR_MODE_HPM: + mode = REGULATOR_MODE_NORMAL; + break; + case RPMH_REGULATOR_MODE_LPM: + mode = REGULATOR_MODE_IDLE; + break; + case RPMH_REGULATOR_MODE_RET: + mode = REGULATOR_MODE_STANDBY; + break; + default: + mode = REGULATOR_MODE_INVALID; + break; + } + + return mode; +} + +static unsigned int rpmh_regulator_pmic530_ldo_of_map_mode(unsigned int rpmh_mode) +{ + unsigned int mode; + + switch (rpmh_mode) { + case RPMH_REGULATOR_MODE_HPM: + mode = REGULATOR_MODE_FAST; + break; + case RPMH_REGULATOR_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case RPMH_REGULATOR_MODE_LPM: + mode = REGULATOR_MODE_IDLE; + break; + case RPMH_REGULATOR_MODE_RET: + mode = REGULATOR_MODE_STANDBY; + break; + default: + mode = REGULATOR_MODE_INVALID; + break; + } + return mode; +} + +static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION, + [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM, + [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO, + [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM, +}; + +static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION, + [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM, + [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO, + [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM, +}; + +static unsigned int +rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode) +{ + unsigned int mode; + + switch (rpmh_mode) { + case RPMH_REGULATOR_MODE_HPM: + mode = REGULATOR_MODE_FAST; + break; + case RPMH_REGULATOR_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case RPMH_REGULATOR_MODE_LPM: + mode = REGULATOR_MODE_IDLE; + break; + case RPMH_REGULATOR_MODE_RET: + mode = REGULATOR_MODE_STANDBY; + break; + default: + mode = REGULATOR_MODE_INVALID; + break; + } + + return mode; +} + +static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = -EINVAL, + [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM, + [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO, + [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM, +}; + +static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = { + [REGULATOR_MODE_INVALID] = -EINVAL, + [REGULATOR_MODE_STANDBY] = -EINVAL, + [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM, + [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO, + [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM, +}; + +static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode) +{ + unsigned int mode; + + switch (rpmh_mode) { + case RPMH_REGULATOR_MODE_HPM: + mode = REGULATOR_MODE_FAST; + break; + case RPMH_REGULATOR_MODE_AUTO: + mode = REGULATOR_MODE_NORMAL; + break; + case RPMH_REGULATOR_MODE_LPM: + mode = REGULATOR_MODE_IDLE; + break; + default: + mode = REGULATOR_MODE_INVALID; + break; + } + + return mode; +} + +static const struct rpmh_vreg_hw_data pmic4_pldo = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic4_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_pldo_lv = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic4_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_nldo = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic4_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 216, + .pmic_mode_map = pmic_mode_map_pmic4_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 259, + .pmic_mode_map = pmic_mode_map_pmic4_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_bob = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_bypass_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), + }, + .n_linear_ranges = 1, + .n_voltages = 84, + .pmic_bypass_mode = PMIC4_BOB_MODE_PASS, + .pmic_mode_map = pmic_mode_map_pmic4_bob, + .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic4_lvs = { + .regulator_type = XOB, + .ops = &rpmh_regulator_xob_ops, + /* LVS hardware does not support voltage or mode configuration. */ +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo_lv = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 63, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 188, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo502 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo502ln = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1800000, 0, 2, 200000), + REGULATOR_LINEAR_RANGE(2608000, 3, 28, 16000), + REGULATOR_LINEAR_RANGE(3104000, 29, 30, 96000), + REGULATOR_LINEAR_RANGE(3312000, 31, 31, 0), + }, + .n_linear_ranges = 4, + .n_voltages = 32, + .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_nldo = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 124, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_nldo515 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 211, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_nldo502 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(528000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 216, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 264, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 264, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_ftsmps525 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000), + REGULATOR_LINEAR_RANGE(1376000, 268, 438, 8000), + }, + .n_linear_ranges = 2, + .n_voltages = 439, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 215, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000), + }, + .n_linear_ranges = 1, + .n_voltages = 236, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000), + }, + .n_linear_ranges = 1, + .n_voltages = 5, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_bob = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_bypass_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000), + }, + .n_linear_ranges = 1, + .n_voltages = 32, + .pmic_bypass_mode = PMIC5_BOB_MODE_PASS, + .pmic_mode_map = pmic_mode_map_pmic5_bob, + .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_nldo530 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 211, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic530_ldo, + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp150 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic530_ldo, + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp300 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .hpm_min_load_uA = 20000, + .pmic_mode_map = pmic_mode_map_pmic530_ldo, + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp600 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .hpm_min_load_uA = 40000, + .pmic_mode_map = pmic_mode_map_pmic530_ldo, + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, +}; + +static const struct rpmh_vreg_hw_data pmic5_ftsmps530 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(252000, 0, 305, 4000), + REGULATOR_LINEAR_RANGE(1480000, 306, 464, 8000), + }, + .n_linear_ranges = 2, + .n_voltages = 465, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + +#define RPMH_VREG(_name, _vreg_hw_type, _index, _hw_data, _supply_name) \ +{ \ + .name = _name, \ + .vreg_hw_type = _vreg_hw_type, \ + .index = _index, \ + .hw_data = _hw_data, \ + .supply_name = _supply_name, \ +} + +static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic4_hfsmps3, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic4_ftsmps426, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic4_ftsmps426, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic4_ftsmps426, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic4_ftsmps426, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic4_ftsmps426, "vdd-s10"), + RPMH_VREG("smps11", SMPS, 11, &pmic4_ftsmps426, "vdd-s11"), + RPMH_VREG("smps12", SMPS, 12, &pmic4_ftsmps426, "vdd-s12"), + RPMH_VREG("smps13", SMPS, 13, &pmic4_ftsmps426, "vdd-s13"), + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l27"), + RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l8-l17"), + RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l3-l11"), + RPMH_VREG("ldo4", LDO, 4, &pmic4_nldo, "vdd-l4-l5"), + RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l4-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo8", LDO, 8, &pmic4_nldo, "vdd-l2-l8-l17"), + RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo, "vdd-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo, "vdd-l10-l23-l25"), + RPMH_VREG("ldo11", LDO, 11, &pmic4_nldo, "vdd-l3-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo, "vdd-l13-l19-l21"), + RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l16-l28"), + RPMH_VREG("ldo17", LDO, 17, &pmic4_nldo, "vdd-l2-l8-l17"), + RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l18-l22"), + RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l13-l19-l21"), + RPMH_VREG("ldo20", LDO, 20, &pmic4_pldo, "vdd-l20-l24"), + RPMH_VREG("ldo21", LDO, 21, &pmic4_pldo, "vdd-l13-l19-l21"), + RPMH_VREG("ldo22", LDO, 22, &pmic4_pldo, "vdd-l18-l22"), + RPMH_VREG("ldo23", LDO, 23, &pmic4_pldo, "vdd-l10-l23-l25"), + RPMH_VREG("ldo24", LDO, 24, &pmic4_pldo, "vdd-l20-l24"), + RPMH_VREG("ldo25", LDO, 25, &pmic4_pldo, "vdd-l10-l23-l25"), + RPMH_VREG("ldo26", LDO, 26, &pmic4_nldo, "vdd-l26"), + RPMH_VREG("ldo27", LDO, 27, &pmic4_nldo, "vdd-l1-l27"), + RPMH_VREG("ldo28", LDO, 28, &pmic4_pldo, "vdd-l16-l28"), + RPMH_VREG("lvs1", VS, 1, &pmic4_lvs, "vin-lvs-1-2"), + RPMH_VREG("lvs2", VS, 2, &pmic4_lvs, "vin-lvs-1-2"), + {} +}; + +static const struct rpmh_vreg_init_data pmau0102_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps527, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps527, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps527, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps527, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps527, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps527, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps527, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps527, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo515_mv, "vdd-l3"), + {} +}; + +static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + {} +}; + +static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { + RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic4_ftsmps426, "vdd-s4"), + {} +}; + +static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + {} +}; + +static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l1-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"), + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"), + {} +}; + +static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps527, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps527, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps527, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps527, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps527, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps527, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps527, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps527, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps527, "vdd-s9"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6-l7"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l6-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo515_mv, "vdd-l8-l9"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"), + {} +}; + +static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_hfsmps510, "vdd-s10"), + RPMH_VREG("smps11", SMPS, 11, &pmic5_hfsmps510, "vdd-s11"), + RPMH_VREG("smps12", SMPS, 12, &pmic5_hfsmps510, "vdd-s12"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l5"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"), + {} +}; + +static const struct rpmh_vreg_init_data pm8350b_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + {} +}; + +static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps515, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l12"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo_lv, "vdd-l2-l8"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l9-l11"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l2-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l6-l9-l11"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l6-l9-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l1-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pm8450_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), + {} +}; + +static const struct rpmh_vreg_init_data pm8550_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l4-l10"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l13-l14"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l1-l4-l10"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l7"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l6-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l8-l9"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l1-l4-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l2-l13-l14"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l2-l13-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l17"), + RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"), + RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"), + {} +}; + +static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), + {} +}; + +static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), + {} +}; + +static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), + {} +}; + +static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515, "vdd-s2"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"), + {} +}; + +static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515_1, "vdd-s2"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"), + {} +}; + +static const struct rpmh_vreg_init_data pm8010_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo502, "vdd-l1-l2"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo502, "vdd-l1-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo502ln, "vdd-l3-l4"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo502ln, "vdd-l3-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo502, "vdd-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo502ln, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo502, "vdd-l7"), +}; + +static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l7-l8"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l4-l7-l8"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l4-l7-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10-l14-l15"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l12-l13"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l11-l12-l13"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo_lv, "vdd-l11-l12-l13"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l10-l14-l15"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l10-l14-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), + {} +}; + +static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l1-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"), + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, NULL), + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, NULL), + /* smps3 - smps5 not configured */ + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, NULL), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, NULL), + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, NULL), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, NULL), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, NULL), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, NULL), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, NULL), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, NULL), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, NULL), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, NULL), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, NULL), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo, NULL), + RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, NULL), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, NULL), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, NULL), + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, NULL), + /* ldo17 not configured */ + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, NULL), + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, NULL), + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, NULL), + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, NULL), + RPMH_VREG("ldo22", LDO, 22, &pmic5_nldo, NULL), +}; + +static const struct rpmh_vreg_init_data pmcx0102_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"), + {} +}; + +static const struct rpmh_vreg_init_data pmh0101_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1-l4-l10"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo530_mvp300, "vdd-l2-l13-l14"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3-l11"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l1-l4-l10"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo530_mvp150, "vdd-l5-l16"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo530_mvp300, "vdd-l6-l7"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo530_mvp300, "vdd-l6-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo530_mvp150, "vdd-l8-l9"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo515_mv, "vdd-l8-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo530, "vdd-l1-l4-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo530, "vdd-l3-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo530, "vdd-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo530, "vdd-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo530_mvp600, "vdd-l5-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo515_mv, "vdd-l17"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo530, "vdd-l18"), + RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"), + RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"), + {} +}; + +static const struct rpmh_vreg_init_data pmh0104_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), + {} +}; + +static const struct rpmh_vreg_init_data pmh0110_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"), + {} +}; + +static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l9"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l12"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l3-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10-l11-l13"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l10-l11-l13"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l4-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l10-l11-l13"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l16"), + {} +}; + +static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l18"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6-l16"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6-l16"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8-l9"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l8-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l6-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo, "vdd-l17"), + /* ldo18 not configured */ + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, "vdd-l19"), + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, "vdd-l20"), + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, "vdd-l21"), + {} +}; + +static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps525, "vdd-s9"), + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps525, "vdd-s10"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-18"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l16"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo_lv, "vdd-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo_lv, "vdd-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8-l9"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l8-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo515, "vdd-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo515, "vdd-l4-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo515, "vdd-l17"), + /* ldo18 not configured */ + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo515, "vdd-l19"), + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo515, "vdd-l20-l21"), + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo515, "vdd-l20-l21"), +}; + +static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"), + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps520, "vdd-s7"), + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4-l12-l15"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4-l12-l15"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l1-l4-l12-l15"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, "vdd-l13"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14-l16"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l1-l4-l12-l15"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, "vdd-l14-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + {} +}; + +static const struct rpmh_vreg_init_data pm7550_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l5"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l4-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l9-l10"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l9-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo515_mv, "vdd-l12-l14"), + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo515_mv, "vdd-l13-l16"), + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l12-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16"), + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo20", LDO, 20, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo21", LDO, 21, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo22", LDO, 22, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("ldo23", LDO, 23, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps515, "vdd-s3"), + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5-l6"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l5-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-bob"), + {} +}; + +static const struct rpmh_vreg_init_data pmr735b_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"), + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"), + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"), + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10"), + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l11"), + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"), + {} +}; + +static const struct rpmh_vreg_init_data pmr735d_vreg_data[] = { + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l2-l5"), + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l1-l2-l5"), + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3-l4"), + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l3-l4"), + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l1-l2-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"), + {} +}; + +static const struct rpmh_vreg_init_data pm660_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"), + RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"), + RPMH_VREG("smps6", SMPS, 6, &pmic4_hfsmps3, "vdd-s6"), + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l6-l7"), + RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l3"), + RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l2-l3"), + /* ldo4 is inaccessible on PM660 */ + RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l5"), + RPMH_VREG("ldo6", LDO, 6, &pmic4_nldo, "vdd-l1-l6-l7"), + RPMH_VREG("ldo7", LDO, 7, &pmic4_nldo, "vdd-l1-l6-l7"), + RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo11", LDO, 11, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), + RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), + RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), + RPMH_VREG("ldo17", LDO, 17, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), + RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), + RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), + {} +}; + +static const struct rpmh_vreg_init_data pm660l_vreg_data[] = { + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3-s4"), + RPMH_VREG("smps5", SMPS, 5, &pmic4_ftsmps426, "vdd-s5"), + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l9-l10"), + RPMH_VREG("ldo2", LDO, 2, &pmic4_pldo, "vdd-l2"), + RPMH_VREG("ldo3", LDO, 3, &pmic4_pldo, "vdd-l3-l5-l7-l8"), + RPMH_VREG("ldo4", LDO, 4, &pmic4_pldo, "vdd-l4-l6"), + RPMH_VREG("ldo5", LDO, 5, &pmic4_pldo, "vdd-l3-l5-l7-l8"), + RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l4-l6"), + RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo, "vdd-l3-l5-l7-l8"), + RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo, "vdd-l3-l5-l7-l8"), + RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"), + {} +}; + +static int rpmh_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct rpmh_vreg_init_data *vreg_data; + struct rpmh_vreg *vreg; + const char *pmic_id; + int ret; + + vreg_data = of_device_get_match_data(dev); + if (!vreg_data) + return -ENODEV; + + ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id); + if (ret < 0) { + dev_err(dev, "qcom,pmic-id missing in DT node\n"); + return ret; + } + + for_each_available_child_of_node_scoped(dev->of_node, node) { + vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id, + vreg_data); + if (ret < 0) + return ret; + + ret = rpmh_regulator_determine_initial_mode(vreg); + if (ret < 0) + dev_err(dev, "failed to read initial mode for %s\n", + vreg->rdesc.name); + + } + + return 0; +} + +static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { + { + .compatible = "qcom,pm8005-rpmh-regulators", + .data = pm8005_vreg_data, + }, + { + .compatible = "qcom,pm8009-rpmh-regulators", + .data = pm8009_vreg_data, + }, + { + .compatible = "qcom,pm8009-1-rpmh-regulators", + .data = pm8009_1_vreg_data, + }, + { + .compatible = "qcom,pm8010-rpmh-regulators", + .data = pm8010_vreg_data, + }, + { + .compatible = "qcom,pm8150-rpmh-regulators", + .data = pm8150_vreg_data, + }, + { + .compatible = "qcom,pm8150l-rpmh-regulators", + .data = pm8150l_vreg_data, + }, + { + .compatible = "qcom,pm8350-rpmh-regulators", + .data = pm8350_vreg_data, + }, + { + .compatible = "qcom,pm8350b-rpmh-regulators", + .data = pm8350b_vreg_data, + }, + { + .compatible = "qcom,pm8350c-rpmh-regulators", + .data = pm8350c_vreg_data, + }, + { + .compatible = "qcom,pm8450-rpmh-regulators", + .data = pm8450_vreg_data, + }, + { + .compatible = "qcom,pm8550-rpmh-regulators", + .data = pm8550_vreg_data, + }, + { + .compatible = "qcom,pm8550ve-rpmh-regulators", + .data = pm8550ve_vreg_data, + }, + { + .compatible = "qcom,pm8550vs-rpmh-regulators", + .data = pm8550vs_vreg_data, + }, + { + .compatible = "qcom,pm8998-rpmh-regulators", + .data = pm8998_vreg_data, + }, + { + .compatible = "qcom,pmau0102-rpmh-regulators", + .data = pmau0102_vreg_data, + }, + { + .compatible = "qcom,pmg1110-rpmh-regulators", + .data = pmg1110_vreg_data, + }, + { + .compatible = "qcom,pmi8998-rpmh-regulators", + .data = pmi8998_vreg_data, + }, + { + .compatible = "qcom,pm6150-rpmh-regulators", + .data = pm6150_vreg_data, + }, + { + .compatible = "qcom,pm6150l-rpmh-regulators", + .data = pm6150l_vreg_data, + }, + { + .compatible = "qcom,pm6350-rpmh-regulators", + .data = pm6350_vreg_data, + }, + { + .compatible = "qcom,pmc8180-rpmh-regulators", + .data = pm8150_vreg_data, + }, + { + .compatible = "qcom,pmc8180c-rpmh-regulators", + .data = pm8150l_vreg_data, + }, + { + .compatible = "qcom,pmc8380-rpmh-regulators", + .data = pmc8380_vreg_data, + }, + { + .compatible = "qcom,pmcx0102-rpmh-regulators", + .data = pmcx0102_vreg_data, + }, + { + .compatible = "qcom,pmh0101-rpmh-regulators", + .data = pmh0101_vreg_data, + }, + { + .compatible = "qcom,pmh0104-rpmh-regulators", + .data = pmh0104_vreg_data, + }, + { + .compatible = "qcom,pmh0110-rpmh-regulators", + .data = pmh0110_vreg_data, + }, + { + .compatible = "qcom,pmm8155au-rpmh-regulators", + .data = pmm8155au_vreg_data, + }, + { + .compatible = "qcom,pmm8654au-rpmh-regulators", + .data = pmm8654au_vreg_data, + }, + { + .compatible = "qcom,pmx55-rpmh-regulators", + .data = pmx55_vreg_data, + }, + { + .compatible = "qcom,pmx65-rpmh-regulators", + .data = pmx65_vreg_data, + }, + { + .compatible = "qcom,pmx75-rpmh-regulators", + .data = pmx75_vreg_data, + }, + { + .compatible = "qcom,pm7325-rpmh-regulators", + .data = pm7325_vreg_data, + }, + { + .compatible = "qcom,pm7550-rpmh-regulators", + .data = pm7550_vreg_data, + }, + { + .compatible = "qcom,pmr735a-rpmh-regulators", + .data = pmr735a_vreg_data, + }, + { + .compatible = "qcom,pmr735b-rpmh-regulators", + .data = pmr735b_vreg_data, + }, + { + .compatible = "qcom,pmr735d-rpmh-regulators", + .data = pmr735d_vreg_data, + }, + { + .compatible = "qcom,pm660-rpmh-regulators", + .data = pm660_vreg_data, + }, + { + .compatible = "qcom,pm660l-rpmh-regulators", + .data = pm660l_vreg_data, + }, + {} +}; +MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table); + +static struct platform_driver rpmh_regulator_driver = { + .driver = { + .name = "qcom-rpmh-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(rpmh_regulator_match_table), + }, + .probe = rpmh_regulator_probe, +}; +module_platform_driver(rpmh_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm RPMh regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/qcom_rpm-regulator.c b/drivers/regulator/qcom_rpm-regulator.c new file mode 100644 index 000000000..2d5fec145 --- /dev/null +++ b/drivers/regulator/qcom_rpm-regulator.c @@ -0,0 +1,1010 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2014, Sony Mobile Communications AB. + * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define MAX_REQUEST_LEN 2 + +struct request_member { + int word; + unsigned int mask; + int shift; +}; + +struct rpm_reg_parts { + struct request_member mV; /* used if voltage is in mV */ + struct request_member uV; /* used if voltage is in uV */ + struct request_member ip; /* peak current in mA */ + struct request_member pd; /* pull down enable */ + struct request_member ia; /* average current in mA */ + struct request_member fm; /* force mode */ + struct request_member pm; /* power mode */ + struct request_member pc; /* pin control */ + struct request_member pf; /* pin function */ + struct request_member enable_state; /* NCP and switch */ + struct request_member comp_mode; /* NCP */ + struct request_member freq; /* frequency: NCP and SMPS */ + struct request_member freq_clk_src; /* clock source: SMPS */ + struct request_member hpm; /* switch: control OCP and SS */ + int request_len; +}; + +#define FORCE_MODE_IS_2_BITS(reg) \ + (((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3) + +struct qcom_rpm_reg { + struct qcom_rpm *rpm; + + struct mutex lock; + struct device *dev; + struct regulator_desc desc; + const struct rpm_reg_parts *parts; + + int resource; + u32 val[MAX_REQUEST_LEN]; + + int uV; + int is_enabled; + + bool supports_force_mode_auto; + bool supports_force_mode_bypass; +}; + +static const struct rpm_reg_parts rpm8660_ldo_parts = { + .request_len = 2, + .mV = { 0, 0x00000FFF, 0 }, + .ip = { 0, 0x00FFF000, 12 }, + .fm = { 0, 0x03000000, 24 }, + .pc = { 0, 0x3C000000, 26 }, + .pf = { 0, 0xC0000000, 30 }, + .pd = { 1, 0x00000001, 0 }, + .ia = { 1, 0x00001FFE, 1 }, +}; + +static const struct rpm_reg_parts rpm8660_smps_parts = { + .request_len = 2, + .mV = { 0, 0x00000FFF, 0 }, + .ip = { 0, 0x00FFF000, 12 }, + .fm = { 0, 0x03000000, 24 }, + .pc = { 0, 0x3C000000, 26 }, + .pf = { 0, 0xC0000000, 30 }, + .pd = { 1, 0x00000001, 0 }, + .ia = { 1, 0x00001FFE, 1 }, + .freq = { 1, 0x001FE000, 13 }, + .freq_clk_src = { 1, 0x00600000, 21 }, +}; + +static const struct rpm_reg_parts rpm8660_switch_parts = { + .request_len = 1, + .enable_state = { 0, 0x00000001, 0 }, + .pd = { 0, 0x00000002, 1 }, + .pc = { 0, 0x0000003C, 2 }, + .pf = { 0, 0x000000C0, 6 }, + .hpm = { 0, 0x00000300, 8 }, +}; + +static const struct rpm_reg_parts rpm8660_ncp_parts = { + .request_len = 1, + .mV = { 0, 0x00000FFF, 0 }, + .enable_state = { 0, 0x00001000, 12 }, + .comp_mode = { 0, 0x00002000, 13 }, + .freq = { 0, 0x003FC000, 14 }, +}; + +static const struct rpm_reg_parts rpm8960_ldo_parts = { + .request_len = 2, + .uV = { 0, 0x007FFFFF, 0 }, + .pd = { 0, 0x00800000, 23 }, + .pc = { 0, 0x0F000000, 24 }, + .pf = { 0, 0xF0000000, 28 }, + .ip = { 1, 0x000003FF, 0 }, + .ia = { 1, 0x000FFC00, 10 }, + .fm = { 1, 0x00700000, 20 }, +}; + +static const struct rpm_reg_parts rpm8960_smps_parts = { + .request_len = 2, + .uV = { 0, 0x007FFFFF, 0 }, + .pd = { 0, 0x00800000, 23 }, + .pc = { 0, 0x0F000000, 24 }, + .pf = { 0, 0xF0000000, 28 }, + .ip = { 1, 0x000003FF, 0 }, + .ia = { 1, 0x000FFC00, 10 }, + .fm = { 1, 0x00700000, 20 }, + .pm = { 1, 0x00800000, 23 }, + .freq = { 1, 0x1F000000, 24 }, + .freq_clk_src = { 1, 0x60000000, 29 }, +}; + +static const struct rpm_reg_parts rpm8960_switch_parts = { + .request_len = 1, + .enable_state = { 0, 0x00000001, 0 }, + .pd = { 0, 0x00000002, 1 }, + .pc = { 0, 0x0000003C, 2 }, + .pf = { 0, 0x000003C0, 6 }, + .hpm = { 0, 0x00000C00, 10 }, +}; + +static const struct rpm_reg_parts rpm8960_ncp_parts = { + .request_len = 1, + .uV = { 0, 0x007FFFFF, 0 }, + .enable_state = { 0, 0x00800000, 23 }, + .comp_mode = { 0, 0x01000000, 24 }, + .freq = { 0, 0x3E000000, 25 }, +}; + +/* + * Physically available PMIC regulator voltage ranges + */ +static const struct linear_range pldo_ranges[] = { + REGULATOR_LINEAR_RANGE( 750000, 0, 59, 12500), + REGULATOR_LINEAR_RANGE(1500000, 60, 123, 25000), + REGULATOR_LINEAR_RANGE(3100000, 124, 160, 50000), +}; + +static const struct linear_range nldo_ranges[] = { + REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), +}; + +static const struct linear_range nldo1200_ranges[] = { + REGULATOR_LINEAR_RANGE( 375000, 0, 59, 6250), + REGULATOR_LINEAR_RANGE( 750000, 60, 123, 12500), +}; + +static const struct linear_range smps_ranges[] = { + REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500), + REGULATOR_LINEAR_RANGE( 750000, 30, 89, 12500), + REGULATOR_LINEAR_RANGE(1500000, 90, 153, 25000), +}; + +static const struct linear_range ftsmps_ranges[] = { + REGULATOR_LINEAR_RANGE( 350000, 0, 6, 50000), + REGULATOR_LINEAR_RANGE( 700000, 7, 63, 12500), + REGULATOR_LINEAR_RANGE(1500000, 64, 100, 50000), +}; + +static const struct linear_range smb208_ranges[] = { + REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500), + REGULATOR_LINEAR_RANGE( 750000, 30, 89, 12500), + REGULATOR_LINEAR_RANGE(1500000, 90, 153, 25000), + REGULATOR_LINEAR_RANGE(3100000, 154, 234, 25000), +}; + +static const struct linear_range ncp_ranges[] = { + REGULATOR_LINEAR_RANGE(1500000, 0, 31, 50000), +}; + +static int rpm_reg_write(struct qcom_rpm_reg *vreg, + const struct request_member *req, + const int value) +{ + if (WARN_ON((value << req->shift) & ~req->mask)) + return -EINVAL; + + vreg->val[req->word] &= ~req->mask; + vreg->val[req->word] |= value << req->shift; + + return qcom_rpm_write(vreg->rpm, + QCOM_RPM_ACTIVE_STATE, + vreg->resource, + vreg->val, + vreg->parts->request_len); +} + +static int rpm_reg_set_mV_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->mV; + int ret = 0; + int uV; + + if (req->mask == 0) + return -EINVAL; + + uV = regulator_list_voltage_linear_range(rdev, selector); + if (uV < 0) + return uV; + + mutex_lock(&vreg->lock); + if (vreg->is_enabled) + ret = rpm_reg_write(vreg, req, uV / 1000); + + if (!ret) + vreg->uV = uV; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_set_uV_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->uV; + int ret = 0; + int uV; + + if (req->mask == 0) + return -EINVAL; + + uV = regulator_list_voltage_linear_range(rdev, selector); + if (uV < 0) + return uV; + + mutex_lock(&vreg->lock); + if (vreg->is_enabled) + ret = rpm_reg_write(vreg, req, uV); + + if (!ret) + vreg->uV = uV; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_get_voltage(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + + return vreg->uV; +} + +static int rpm_reg_mV_enable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->mV; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, vreg->uV / 1000); + if (!ret) + vreg->is_enabled = 1; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_uV_enable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->uV; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, vreg->uV); + if (!ret) + vreg->is_enabled = 1; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_switch_enable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->enable_state; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, 1); + if (!ret) + vreg->is_enabled = 1; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_mV_disable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->mV; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, 0); + if (!ret) + vreg->is_enabled = 0; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_uV_disable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->uV; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, 0); + if (!ret) + vreg->is_enabled = 0; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_switch_disable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->enable_state; + int ret; + + if (req->mask == 0) + return -EINVAL; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, 0); + if (!ret) + vreg->is_enabled = 0; + mutex_unlock(&vreg->lock); + + return ret; +} + +static int rpm_reg_is_enabled(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + + return vreg->is_enabled; +} + +static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + const struct rpm_reg_parts *parts = vreg->parts; + const struct request_member *req = &parts->ia; + int load_mA = load_uA / 1000; + int max_mA = req->mask >> req->shift; + int ret; + + if (req->mask == 0) + return -EINVAL; + + if (load_mA > max_mA) + load_mA = max_mA; + + mutex_lock(&vreg->lock); + ret = rpm_reg_write(vreg, req, load_mA); + mutex_unlock(&vreg->lock); + + return ret; +} + +static const struct regulator_ops uV_ops = { + .list_voltage = regulator_list_voltage_linear_range, + + .set_voltage_sel = rpm_reg_set_uV_sel, + .get_voltage = rpm_reg_get_voltage, + + .enable = rpm_reg_uV_enable, + .disable = rpm_reg_uV_disable, + .is_enabled = rpm_reg_is_enabled, + + .set_load = rpm_reg_set_load, +}; + +static const struct regulator_ops mV_ops = { + .list_voltage = regulator_list_voltage_linear_range, + + .set_voltage_sel = rpm_reg_set_mV_sel, + .get_voltage = rpm_reg_get_voltage, + + .enable = rpm_reg_mV_enable, + .disable = rpm_reg_mV_disable, + .is_enabled = rpm_reg_is_enabled, + + .set_load = rpm_reg_set_load, +}; + +static const struct regulator_ops switch_ops = { + .enable = rpm_reg_switch_enable, + .disable = rpm_reg_switch_disable, + .is_enabled = rpm_reg_is_enabled, +}; + +/* + * PM8018 regulators + */ +static const struct qcom_rpm_reg pm8018_pldo = { + .desc.linear_ranges = pldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges), + .desc.n_voltages = 161, + .desc.ops = &uV_ops, + .parts = &rpm8960_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8018_nldo = { + .desc.linear_ranges = nldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges), + .desc.n_voltages = 64, + .desc.ops = &uV_ops, + .parts = &rpm8960_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8018_smps = { + .desc.linear_ranges = smps_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(smps_ranges), + .desc.n_voltages = 154, + .desc.ops = &uV_ops, + .parts = &rpm8960_smps_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8018_switch = { + .desc.ops = &switch_ops, + .parts = &rpm8960_switch_parts, +}; + +/* + * PM8058 regulators + */ +static const struct qcom_rpm_reg pm8058_pldo = { + .desc.linear_ranges = pldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges), + .desc.n_voltages = 161, + .desc.ops = &mV_ops, + .parts = &rpm8660_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8058_nldo = { + .desc.linear_ranges = nldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges), + .desc.n_voltages = 64, + .desc.ops = &mV_ops, + .parts = &rpm8660_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8058_smps = { + .desc.linear_ranges = smps_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(smps_ranges), + .desc.n_voltages = 154, + .desc.ops = &mV_ops, + .parts = &rpm8660_smps_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8058_ncp = { + .desc.linear_ranges = ncp_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges), + .desc.n_voltages = 32, + .desc.ops = &mV_ops, + .parts = &rpm8660_ncp_parts, +}; + +static const struct qcom_rpm_reg pm8058_switch = { + .desc.ops = &switch_ops, + .parts = &rpm8660_switch_parts, +}; + +/* + * PM8901 regulators + */ +static const struct qcom_rpm_reg pm8901_pldo = { + .desc.linear_ranges = pldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges), + .desc.n_voltages = 161, + .desc.ops = &mV_ops, + .parts = &rpm8660_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = true, +}; + +static const struct qcom_rpm_reg pm8901_nldo = { + .desc.linear_ranges = nldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges), + .desc.n_voltages = 64, + .desc.ops = &mV_ops, + .parts = &rpm8660_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = true, +}; + +static const struct qcom_rpm_reg pm8901_ftsmps = { + .desc.linear_ranges = ftsmps_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(ftsmps_ranges), + .desc.n_voltages = 101, + .desc.ops = &mV_ops, + .parts = &rpm8660_smps_parts, + .supports_force_mode_auto = true, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8901_switch = { + .desc.ops = &switch_ops, + .parts = &rpm8660_switch_parts, +}; + +/* + * PM8921 regulators + */ +static const struct qcom_rpm_reg pm8921_pldo = { + .desc.linear_ranges = pldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges), + .desc.n_voltages = 161, + .desc.ops = &uV_ops, + .parts = &rpm8960_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = true, +}; + +static const struct qcom_rpm_reg pm8921_nldo = { + .desc.linear_ranges = nldo_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges), + .desc.n_voltages = 64, + .desc.ops = &uV_ops, + .parts = &rpm8960_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = true, +}; + +static const struct qcom_rpm_reg pm8921_nldo1200 = { + .desc.linear_ranges = nldo1200_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(nldo1200_ranges), + .desc.n_voltages = 124, + .desc.ops = &uV_ops, + .parts = &rpm8960_ldo_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = true, +}; + +static const struct qcom_rpm_reg pm8921_smps = { + .desc.linear_ranges = smps_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(smps_ranges), + .desc.n_voltages = 154, + .desc.ops = &uV_ops, + .parts = &rpm8960_smps_parts, + .supports_force_mode_auto = true, + .supports_force_mode_bypass = false, +}; + +static const struct qcom_rpm_reg pm8921_ncp = { + .desc.linear_ranges = ncp_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges), + .desc.n_voltages = 32, + .desc.ops = &uV_ops, + .parts = &rpm8960_ncp_parts, +}; + +static const struct qcom_rpm_reg pm8921_switch = { + .desc.ops = &switch_ops, + .parts = &rpm8960_switch_parts, +}; + +static const struct qcom_rpm_reg smb208_smps = { + .desc.linear_ranges = smb208_ranges, + .desc.n_linear_ranges = ARRAY_SIZE(smb208_ranges), + .desc.n_voltages = 235, + .desc.ops = &uV_ops, + .parts = &rpm8960_smps_parts, + .supports_force_mode_auto = false, + .supports_force_mode_bypass = false, +}; + +static int rpm_reg_set(struct qcom_rpm_reg *vreg, + const struct request_member *req, + const int value) +{ + if (req->mask == 0 || (value << req->shift) & ~req->mask) + return -EINVAL; + + vreg->val[req->word] &= ~req->mask; + vreg->val[req->word] |= value << req->shift; + + return 0; +} + +static int rpm_reg_of_parse_freq(struct device *dev, + struct device_node *node, + struct qcom_rpm_reg *vreg) +{ + static const int freq_table[] = { + 19200000, 9600000, 6400000, 4800000, 3840000, 3200000, 2740000, + 2400000, 2130000, 1920000, 1750000, 1600000, 1480000, 1370000, + 1280000, 1200000, + + }; + const char *key; + u32 freq; + int ret; + int i; + + key = "qcom,switch-mode-frequency"; + ret = of_property_read_u32(node, key, &freq); + if (ret) { + dev_err(dev, "regulator requires %s property\n", key); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(freq_table); i++) { + if (freq == freq_table[i]) { + rpm_reg_set(vreg, &vreg->parts->freq, i + 1); + return 0; + } + } + + dev_err(dev, "invalid frequency %d\n", freq); + return -EINVAL; +} + +static int rpm_reg_of_parse(struct device_node *node, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct qcom_rpm_reg *vreg = config->driver_data; + struct device *dev = config->dev; + const char *key; + u32 force_mode; + bool pwm; + u32 val; + int ret; + + key = "bias-pull-down"; + if (of_property_read_bool(node, key)) { + ret = rpm_reg_set(vreg, &vreg->parts->pd, 1); + if (ret) { + dev_err(dev, "%s is invalid", key); + return ret; + } + } + + if (vreg->parts->freq.mask) { + ret = rpm_reg_of_parse_freq(dev, node, vreg); + if (ret < 0) + return ret; + } + + if (vreg->parts->pm.mask) { + key = "qcom,power-mode-hysteretic"; + pwm = !of_property_read_bool(node, key); + + ret = rpm_reg_set(vreg, &vreg->parts->pm, pwm); + if (ret) { + dev_err(dev, "failed to set power mode\n"); + return ret; + } + } + + if (vreg->parts->fm.mask) { + force_mode = -1; + + key = "qcom,force-mode"; + ret = of_property_read_u32(node, key, &val); + if (ret == -EINVAL) { + val = QCOM_RPM_FORCE_MODE_NONE; + } else if (ret < 0) { + dev_err(dev, "failed to read %s\n", key); + return ret; + } + + /* + * If force-mode is encoded as 2 bits then the + * possible register values are: + * NONE, LPM, HPM + * otherwise: + * NONE, LPM, AUTO, HPM, BYPASS + */ + switch (val) { + case QCOM_RPM_FORCE_MODE_NONE: + force_mode = 0; + break; + case QCOM_RPM_FORCE_MODE_LPM: + force_mode = 1; + break; + case QCOM_RPM_FORCE_MODE_HPM: + if (FORCE_MODE_IS_2_BITS(vreg)) + force_mode = 2; + else + force_mode = 3; + break; + case QCOM_RPM_FORCE_MODE_AUTO: + if (vreg->supports_force_mode_auto) + force_mode = 2; + break; + case QCOM_RPM_FORCE_MODE_BYPASS: + if (vreg->supports_force_mode_bypass) + force_mode = 4; + break; + } + + if (force_mode == -1) { + dev_err(dev, "invalid force mode\n"); + return -EINVAL; + } + + ret = rpm_reg_set(vreg, &vreg->parts->fm, force_mode); + if (ret) { + dev_err(dev, "failed to set force mode\n"); + return ret; + } + } + + return 0; +} + +struct rpm_regulator_data { + const char *name; + int resource; + const struct qcom_rpm_reg *template; + const char *supply; +}; + +static const struct rpm_regulator_data rpm_pm8018_regulators[] = { + { "s1", QCOM_RPM_PM8018_SMPS1, &pm8018_smps, "vdd_s1" }, + { "s2", QCOM_RPM_PM8018_SMPS2, &pm8018_smps, "vdd_s2" }, + { "s3", QCOM_RPM_PM8018_SMPS3, &pm8018_smps, "vdd_s3" }, + { "s4", QCOM_RPM_PM8018_SMPS4, &pm8018_smps, "vdd_s4" }, + { "s5", QCOM_RPM_PM8018_SMPS5, &pm8018_smps, "vdd_s5" }, + + { "l2", QCOM_RPM_PM8018_LDO2, &pm8018_pldo, "vdd_l2" }, + { "l3", QCOM_RPM_PM8018_LDO3, &pm8018_pldo, "vdd_l3" }, + { "l4", QCOM_RPM_PM8018_LDO4, &pm8018_pldo, "vdd_l4" }, + { "l5", QCOM_RPM_PM8018_LDO5, &pm8018_pldo, "vdd_l5" }, + { "l6", QCOM_RPM_PM8018_LDO6, &pm8018_pldo, "vdd_l7" }, + { "l7", QCOM_RPM_PM8018_LDO7, &pm8018_pldo, "vdd_l7" }, + { "l8", QCOM_RPM_PM8018_LDO8, &pm8018_nldo, "vdd_l8" }, + { "l9", QCOM_RPM_PM8018_LDO9, &pm8921_nldo1200, + "vdd_l9_l10_l11_l12" }, + { "l10", QCOM_RPM_PM8018_LDO10, &pm8018_nldo, "vdd_l9_l10_l11_l12" }, + { "l11", QCOM_RPM_PM8018_LDO11, &pm8018_nldo, "vdd_l9_l10_l11_l12" }, + { "l12", QCOM_RPM_PM8018_LDO12, &pm8018_nldo, "vdd_l9_l10_l11_l12" }, + { "l14", QCOM_RPM_PM8018_LDO14, &pm8018_pldo, "vdd_l14" }, + + { "lvs1", QCOM_RPM_PM8018_LVS1, &pm8018_switch, "lvs1_in" }, + + { } +}; + +static const struct rpm_regulator_data rpm_pm8058_regulators[] = { + { "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" }, + { "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" }, + { "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" }, + { "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" }, + { "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" }, + + { "l0", QCOM_RPM_PM8058_LDO0, &pm8058_nldo, "vdd_l0_l1_lvs" }, + { "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" }, + { "l2", QCOM_RPM_PM8058_LDO2, &pm8058_pldo, "vdd_l2_l11_l12" }, + { "l3", QCOM_RPM_PM8058_LDO3, &pm8058_pldo, "vdd_l3_l4_l5" }, + { "l4", QCOM_RPM_PM8058_LDO4, &pm8058_pldo, "vdd_l3_l4_l5" }, + { "l5", QCOM_RPM_PM8058_LDO5, &pm8058_pldo, "vdd_l3_l4_l5" }, + { "l6", QCOM_RPM_PM8058_LDO6, &pm8058_pldo, "vdd_l6_l7" }, + { "l7", QCOM_RPM_PM8058_LDO7, &pm8058_pldo, "vdd_l6_l7" }, + { "l8", QCOM_RPM_PM8058_LDO8, &pm8058_pldo, "vdd_l8" }, + { "l9", QCOM_RPM_PM8058_LDO9, &pm8058_pldo, "vdd_l9" }, + { "l10", QCOM_RPM_PM8058_LDO10, &pm8058_pldo, "vdd_l10" }, + { "l11", QCOM_RPM_PM8058_LDO11, &pm8058_pldo, "vdd_l2_l11_l12" }, + { "l12", QCOM_RPM_PM8058_LDO12, &pm8058_pldo, "vdd_l2_l11_l12" }, + { "l13", QCOM_RPM_PM8058_LDO13, &pm8058_pldo, "vdd_l13_l16" }, + { "l14", QCOM_RPM_PM8058_LDO14, &pm8058_pldo, "vdd_l14_l15" }, + { "l15", QCOM_RPM_PM8058_LDO15, &pm8058_pldo, "vdd_l14_l15" }, + { "l16", QCOM_RPM_PM8058_LDO16, &pm8058_pldo, "vdd_l13_l16" }, + { "l17", QCOM_RPM_PM8058_LDO17, &pm8058_pldo, "vdd_l17_l18" }, + { "l18", QCOM_RPM_PM8058_LDO18, &pm8058_pldo, "vdd_l17_l18" }, + { "l19", QCOM_RPM_PM8058_LDO19, &pm8058_pldo, "vdd_l19_l20" }, + { "l20", QCOM_RPM_PM8058_LDO20, &pm8058_pldo, "vdd_l19_l20" }, + { "l21", QCOM_RPM_PM8058_LDO21, &pm8058_nldo, "vdd_l21" }, + { "l22", QCOM_RPM_PM8058_LDO22, &pm8058_nldo, "vdd_l22" }, + { "l23", QCOM_RPM_PM8058_LDO23, &pm8058_nldo, "vdd_l23_l24_l25" }, + { "l24", QCOM_RPM_PM8058_LDO24, &pm8058_nldo, "vdd_l23_l24_l25" }, + { "l25", QCOM_RPM_PM8058_LDO25, &pm8058_nldo, "vdd_l23_l24_l25" }, + + { "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" }, + { "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" }, + + { "ncp", QCOM_RPM_PM8058_NCP, &pm8058_ncp, "vdd_ncp" }, + { } +}; + +static const struct rpm_regulator_data rpm_pm8901_regulators[] = { + { "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" }, + { "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" }, + { "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" }, + { "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" }, + { "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" }, + + { "l0", QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" }, + { "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" }, + { "l2", QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" }, + { "l3", QCOM_RPM_PM8901_LDO3, &pm8901_pldo, "vdd_l3" }, + { "l4", QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" }, + { "l5", QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" }, + { "l6", QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" }, + + { "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" }, + { "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" }, + { "lvs2", QCOM_RPM_PM8901_LVS2, &pm8901_switch, "lvs2_in" }, + { "lvs3", QCOM_RPM_PM8901_LVS3, &pm8901_switch, "lvs3_in" }, + + { "mvs", QCOM_RPM_PM8901_MVS, &pm8901_switch, "mvs_in" }, + { } +}; + +static const struct rpm_regulator_data rpm_pm8921_regulators[] = { + { "s1", QCOM_RPM_PM8921_SMPS1, &pm8921_smps, "vdd_s1" }, + { "s2", QCOM_RPM_PM8921_SMPS2, &pm8921_smps, "vdd_s2" }, + { "s3", QCOM_RPM_PM8921_SMPS3, &pm8921_smps }, + { "s4", QCOM_RPM_PM8921_SMPS4, &pm8921_smps, "vdd_s4" }, + { "s7", QCOM_RPM_PM8921_SMPS7, &pm8921_smps, "vdd_s7" }, + { "s8", QCOM_RPM_PM8921_SMPS8, &pm8921_smps, "vdd_s8" }, + + { "l1", QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" }, + { "l2", QCOM_RPM_PM8921_LDO2, &pm8921_nldo, "vdd_l1_l2_l12_l18" }, + { "l3", QCOM_RPM_PM8921_LDO3, &pm8921_pldo, "vdd_l3_l15_l17" }, + { "l4", QCOM_RPM_PM8921_LDO4, &pm8921_pldo, "vdd_l4_l14" }, + { "l5", QCOM_RPM_PM8921_LDO5, &pm8921_pldo, "vdd_l5_l8_l16" }, + { "l6", QCOM_RPM_PM8921_LDO6, &pm8921_pldo, "vdd_l6_l7" }, + { "l7", QCOM_RPM_PM8921_LDO7, &pm8921_pldo, "vdd_l6_l7" }, + { "l8", QCOM_RPM_PM8921_LDO8, &pm8921_pldo, "vdd_l5_l8_l16" }, + { "l9", QCOM_RPM_PM8921_LDO9, &pm8921_pldo, "vdd_l9_l11" }, + { "l10", QCOM_RPM_PM8921_LDO10, &pm8921_pldo, "vdd_l10_l22" }, + { "l11", QCOM_RPM_PM8921_LDO11, &pm8921_pldo, "vdd_l9_l11" }, + { "l12", QCOM_RPM_PM8921_LDO12, &pm8921_nldo, "vdd_l1_l2_l12_l18" }, + { "l14", QCOM_RPM_PM8921_LDO14, &pm8921_pldo, "vdd_l4_l14" }, + { "l15", QCOM_RPM_PM8921_LDO15, &pm8921_pldo, "vdd_l3_l15_l17" }, + { "l16", QCOM_RPM_PM8921_LDO16, &pm8921_pldo, "vdd_l5_l8_l16" }, + { "l17", QCOM_RPM_PM8921_LDO17, &pm8921_pldo, "vdd_l3_l15_l17" }, + { "l18", QCOM_RPM_PM8921_LDO18, &pm8921_nldo, "vdd_l1_l2_l12_l18" }, + { "l21", QCOM_RPM_PM8921_LDO21, &pm8921_pldo, "vdd_l21_l23_l29" }, + { "l22", QCOM_RPM_PM8921_LDO22, &pm8921_pldo, "vdd_l10_l22" }, + { "l23", QCOM_RPM_PM8921_LDO23, &pm8921_pldo, "vdd_l21_l23_l29" }, + { "l24", QCOM_RPM_PM8921_LDO24, &pm8921_nldo1200, "vdd_l24" }, + { "l25", QCOM_RPM_PM8921_LDO25, &pm8921_nldo1200, "vdd_l25" }, + { "l26", QCOM_RPM_PM8921_LDO26, &pm8921_nldo1200, "vdd_l26" }, + { "l27", QCOM_RPM_PM8921_LDO27, &pm8921_nldo1200, "vdd_l27" }, + { "l28", QCOM_RPM_PM8921_LDO28, &pm8921_nldo1200, "vdd_l28" }, + { "l29", QCOM_RPM_PM8921_LDO29, &pm8921_pldo, "vdd_l21_l23_l29" }, + + { "lvs1", QCOM_RPM_PM8921_LVS1, &pm8921_switch, "vin_lvs1_3_6" }, + { "lvs2", QCOM_RPM_PM8921_LVS2, &pm8921_switch, "vin_lvs2" }, + { "lvs3", QCOM_RPM_PM8921_LVS3, &pm8921_switch, "vin_lvs1_3_6" }, + { "lvs4", QCOM_RPM_PM8921_LVS4, &pm8921_switch, "vin_lvs4_5_7" }, + { "lvs5", QCOM_RPM_PM8921_LVS5, &pm8921_switch, "vin_lvs4_5_7" }, + { "lvs6", QCOM_RPM_PM8921_LVS6, &pm8921_switch, "vin_lvs1_3_6" }, + { "lvs7", QCOM_RPM_PM8921_LVS7, &pm8921_switch, "vin_lvs4_5_7" }, + + { "usb-switch", QCOM_RPM_USB_OTG_SWITCH, &pm8921_switch, "vin_5vs" }, + { "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" }, + { "ncp", QCOM_RPM_PM8921_NCP, &pm8921_ncp, "vdd_ncp" }, + { } +}; + +static const struct rpm_regulator_data rpm_smb208_regulators[] = { + { "s1a", QCOM_RPM_SMB208_S1a, &smb208_smps, "vin_s1a" }, + { "s1b", QCOM_RPM_SMB208_S1b, &smb208_smps, "vin_s1b" }, + { "s2a", QCOM_RPM_SMB208_S2a, &smb208_smps, "vin_s2a" }, + { "s2b", QCOM_RPM_SMB208_S2b, &smb208_smps, "vin_s2b" }, + { } +}; + +static const struct of_device_id rpm_of_match[] = { + { .compatible = "qcom,rpm-pm8018-regulators", + .data = &rpm_pm8018_regulators }, + { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators }, + { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators }, + { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators }, + { .compatible = "qcom,rpm-smb208-regulators", .data = &rpm_smb208_regulators }, + { } +}; +MODULE_DEVICE_TABLE(of, rpm_of_match); + +static int rpm_reg_probe(struct platform_device *pdev) +{ + const struct rpm_regulator_data *reg; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct qcom_rpm_reg *vreg; + struct qcom_rpm *rpm; + + rpm = dev_get_drvdata(pdev->dev.parent); + if (!rpm) { + dev_err(&pdev->dev, "unable to retrieve handle to rpm\n"); + return -ENODEV; + } + + reg = device_get_match_data(&pdev->dev); + if (!reg) { + dev_err(&pdev->dev, "failed to match device\n"); + return -ENODEV; + } + + for (; reg->name; reg++) { + vreg = devm_kmemdup(&pdev->dev, reg->template, sizeof(*vreg), GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + mutex_init(&vreg->lock); + + vreg->dev = &pdev->dev; + vreg->resource = reg->resource; + vreg->rpm = rpm; + + vreg->desc.id = -1; + vreg->desc.owner = THIS_MODULE; + vreg->desc.type = REGULATOR_VOLTAGE; + vreg->desc.name = reg->name; + vreg->desc.supply_name = reg->supply; + vreg->desc.of_match = reg->name; + vreg->desc.of_parse_cb = rpm_reg_of_parse; + + config.dev = &pdev->dev; + config.driver_data = vreg; + rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", reg->name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver rpm_reg_driver = { + .probe = rpm_reg_probe, + .driver = { + .name = "qcom_rpm_reg", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(rpm_of_match), + }, +}; + +static int __init rpm_reg_init(void) +{ + return platform_driver_register(&rpm_reg_driver); +} +subsys_initcall(rpm_reg_init); + +static void __exit rpm_reg_exit(void) +{ + platform_driver_unregister(&rpm_reg_driver); +} +module_exit(rpm_reg_exit) + +MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c new file mode 100644 index 000000000..23ed594b5 --- /dev/null +++ b/drivers/regulator/qcom_smd-regulator.c @@ -0,0 +1,1548 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2015, Sony Mobile Communications AB. + * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include + +static struct qcom_smd_rpm *smd_vreg_rpm; + +struct qcom_rpm_reg { + struct device *dev; + u32 type; + u32 id; + + struct regulator_desc desc; + + int is_enabled; + int uV; + u32 load; + + unsigned int enabled_updated:1; + unsigned int uv_updated:1; + unsigned int load_updated:1; +}; + +struct rpm_regulator_req { + __le32 key; + __le32 nbytes; + __le32 value; +}; + +#define RPM_KEY_SWEN 0x6e657773 /* "swen" */ +#define RPM_KEY_UV 0x00007675 /* "uv" */ +#define RPM_KEY_MA 0x0000616d /* "ma" */ + +static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) +{ + struct rpm_regulator_req req[3]; + int reqlen = 0; + int ret; + + if (vreg->enabled_updated) { + req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN); + req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); + req[reqlen].value = cpu_to_le32(vreg->is_enabled); + reqlen++; + } + + if (vreg->uv_updated && vreg->is_enabled) { + req[reqlen].key = cpu_to_le32(RPM_KEY_UV); + req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); + req[reqlen].value = cpu_to_le32(vreg->uV); + reqlen++; + } + + if (vreg->load_updated && vreg->is_enabled) { + req[reqlen].key = cpu_to_le32(RPM_KEY_MA); + req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); + req[reqlen].value = cpu_to_le32(vreg->load / 1000); + reqlen++; + } + + if (!reqlen) + return 0; + + ret = qcom_rpm_smd_write(smd_vreg_rpm, QCOM_SMD_RPM_ACTIVE_STATE, + vreg->type, vreg->id, + req, sizeof(req[0]) * reqlen); + if (!ret) { + vreg->enabled_updated = 0; + vreg->uv_updated = 0; + vreg->load_updated = 0; + } + + return ret; +} + +static int rpm_reg_enable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + int ret; + + vreg->is_enabled = 1; + vreg->enabled_updated = 1; + + ret = rpm_reg_write_active(vreg); + if (ret) + vreg->is_enabled = 0; + + return ret; +} + +static int rpm_reg_is_enabled(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + + return vreg->is_enabled; +} + +static int rpm_reg_disable(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + int ret; + + vreg->is_enabled = 0; + vreg->enabled_updated = 1; + + ret = rpm_reg_write_active(vreg); + if (ret) + vreg->is_enabled = 1; + + return ret; +} + +static int rpm_reg_get_voltage(struct regulator_dev *rdev) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + + return vreg->uV; +} + +static int rpm_reg_set_voltage(struct regulator_dev *rdev, + int min_uV, + int max_uV, + unsigned *selector) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + int ret; + int old_uV = vreg->uV; + + vreg->uV = min_uV; + vreg->uv_updated = 1; + + ret = rpm_reg_write_active(vreg); + if (ret) + vreg->uV = old_uV; + + return ret; +} + +static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) +{ + struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); + u32 old_load = vreg->load; + int ret; + + vreg->load = load_uA; + vreg->load_updated = 1; + ret = rpm_reg_write_active(vreg); + if (ret) + vreg->load = old_load; + + return ret; +} + +static const struct regulator_ops rpm_smps_ldo_ops = { + .enable = rpm_reg_enable, + .disable = rpm_reg_disable, + .is_enabled = rpm_reg_is_enabled, + .list_voltage = regulator_list_voltage_linear_range, + + .get_voltage = rpm_reg_get_voltage, + .set_voltage = rpm_reg_set_voltage, + + .set_load = rpm_reg_set_load, +}; + +static const struct regulator_ops rpm_smps_ldo_ops_fixed = { + .enable = rpm_reg_enable, + .disable = rpm_reg_disable, + .is_enabled = rpm_reg_is_enabled, + + .get_voltage = rpm_reg_get_voltage, + .set_voltage = rpm_reg_set_voltage, + + .set_load = rpm_reg_set_load, +}; + +static const struct regulator_ops rpm_switch_ops = { + .enable = rpm_reg_enable, + .disable = rpm_reg_disable, + .is_enabled = rpm_reg_is_enabled, +}; + +static const struct regulator_ops rpm_bob_ops = { + .enable = rpm_reg_enable, + .disable = rpm_reg_disable, + .is_enabled = rpm_reg_is_enabled, + + .get_voltage = rpm_reg_get_voltage, + .set_voltage = rpm_reg_set_voltage, +}; + +static const struct regulator_ops rpm_mp5496_ops = { + .enable = rpm_reg_enable, + .disable = rpm_reg_disable, + .is_enabled = rpm_reg_is_enabled, + .list_voltage = regulator_list_voltage_linear_range, + + .get_voltage = rpm_reg_get_voltage, + .set_voltage = rpm_reg_set_voltage, +}; + +static const struct regulator_desc pma8084_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 159, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pma8084_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), + REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 262, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pma8084_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), + REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), + REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), + }, + .n_linear_ranges = 3, + .n_voltages = 164, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pma8084_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 64, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pma8084_switch = { + .ops = &rpm_switch_ops, +}; + +static const struct regulator_desc pm8226_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 159, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8226_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), + REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 262, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8226_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), + REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), + REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), + }, + .n_linear_ranges = 3, + .n_voltages = 164, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8226_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 64, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8226_switch = { + .ops = &rpm_switch_ops, +}; + +static const struct regulator_desc pm8x41_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 159, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8841_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), + REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 262, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8941_boost = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), + }, + .n_linear_ranges = 1, + .n_voltages = 31, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8941_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), + REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), + REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), + }, + .n_linear_ranges = 3, + .n_voltages = 164, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8941_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 64, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8941_lnldo = { + .fixed_uV = 1740000, + .n_voltages = 1, + .ops = &rpm_smps_ldo_ops_fixed, +}; + +static const struct regulator_desc pm8941_switch = { + .ops = &rpm_switch_ops, +}; + +static const struct regulator_desc pm8916_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8916_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 94, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8916_buck_lvo_smps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8916_buck_hvo_smps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000), + }, + .n_linear_ranges = 1, + .n_voltages = 32, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_ftsmps2p5 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000), + REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 461, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_ult_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 203, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_ult_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_pldo_lv = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000), + }, + .n_linear_ranges = 1, + .n_voltages = 17, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8950_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 165, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8953_lnldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000), + REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000), + }, + .n_linear_ranges = 2, + .n_voltages = 16, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8953_ult_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 94, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8994_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), + REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 159, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8994_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), + REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 350, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8994_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 64, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8994_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), + REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), + REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), + }, + .n_linear_ranges = 3, + .n_voltages = 164, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8994_switch = { + .ops = &rpm_switch_ops, +}; + +static const struct regulator_desc pm8994_lnldo = { + .fixed_uV = 1740000, + .n_voltages = 1, + .ops = &rpm_smps_ldo_ops_fixed, +}; + +static const struct regulator_desc pmi8994_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), + REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), + }, + .n_linear_ranges = 2, + .n_voltages = 350, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmi8994_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500), + REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000), + }, + .n_linear_ranges = 2, + .n_voltages = 142, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmi8994_bby = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000), + }, + .n_linear_ranges = 1, + .n_voltages = 45, + .ops = &rpm_bob_ops, +}; + +static const struct regulator_desc pm8998_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 259, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8998_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 216, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8998_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8998_pldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8998_pldo_lv = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm8998_switch = { + .ops = &rpm_switch_ops, +}; + +static const struct regulator_desc pmi8998_bob = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), + }, + .n_linear_ranges = 1, + .n_voltages = 84, + .ops = &rpm_bob_ops, +}; + +static const struct regulator_desc pm660_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000), + }, + .n_linear_ranges = 1, + .n_voltages = 200, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660_hfsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 217, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660_ht_nldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 125, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660_ht_lvpldo = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 63, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660_nldo660 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 124, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660_pldo660 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 256, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm660l_bob = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000), + }, + .n_linear_ranges = 1, + .n_voltages = 85, + .ops = &rpm_bob_ops, +}; + +static const struct regulator_desc pm6125_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 269, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmic5_ftsmps520 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 264, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pmic5_hfsmps515 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000), + }, + .n_linear_ranges = 1, + .n_voltages = 236, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_hfsmps3 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 216, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_nldo300 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_nldo1200 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_pldo50 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), + }, + .n_linear_ranges = 1, + .n_voltages = 129, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_pldo150 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), + }, + .n_linear_ranges = 1, + .n_voltages = 129, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pms405_pldo600 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 99, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc mp5496_smps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_mp5496_ops, +}; + +static const struct regulator_desc mp5496_ldoa2 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000), + }, + .n_linear_ranges = 1, + .n_voltages = 128, + .ops = &rpm_mp5496_ops, +}; + +static const struct regulator_desc pm2250_lvftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000), + }, + .n_linear_ranges = 1, + .n_voltages = 270, + .ops = &rpm_smps_ldo_ops, +}; + +static const struct regulator_desc pm2250_ftsmps = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000), + }, + .n_linear_ranges = 1, + .n_voltages = 270, + .ops = &rpm_smps_ldo_ops, +}; + +struct rpm_regulator_data { + const char *name; + u32 type; + u32 id; + const struct regulator_desc *desc; + const char *supply; +}; + +static const struct rpm_regulator_data rpm_mp5496_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &mp5496_smps, "s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smps, "s2" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &mp5496_ldoa2, "l5" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm2250_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm6125_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, + { "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" }, + { } +}; + +static const struct rpm_regulator_data rpm_pm660_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, + /* l4 is unaccessible on PM660 */ + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, + { } +}; + +static const struct rpm_regulator_data rpm_pm660l_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, + { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, + { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, + { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, + { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, + { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, + { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, + { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, + { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, + { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, + { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, + { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, + { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, + { } +}; + +static const struct rpm_regulator_data rpm_pm8019_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_pldo, "vdd_l2_l3" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_pldo, "vdd_l2_l3" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_pldo, "vdd_l4_l5_l6" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l4_l5_l6" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l4_l5_l6" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l7_l8_l11" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l7_l8_l11" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_nldo, "vdd_l9" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l10"}, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_pldo, "vdd_l7_l8_l11"}, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_nldo, "vdd_l12"}, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l13_l14"}, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l13_l14"}, + {} +}; + +static const struct rpm_regulator_data rpm_pm8150_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pmic5_ftsmps520, "vdd-s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pmic5_ftsmps520, "vdd-s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pmic5_ftsmps520, "vdd-s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd-s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd-s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pmic5_ftsmps520, "vdd-s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pmic5_ftsmps520, "vdd-s7" }, + { "s8", QCOM_SMD_RPM_SMPA, 8, &pmic5_ftsmps520, "vdd-s8" }, + { "s9", QCOM_SMD_RPM_SMPA, 9, &pmic5_ftsmps520, "vdd-s9" }, + { "s10", QCOM_SMD_RPM_SMPA, 10, &pmic5_ftsmps520, "vdd-s10" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd-l1-l8-l11" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_pldo660, "vdd-l2-l10" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd-l3-l4-l5-l18" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd-l3-l4-l5-l18" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd-l3-l4-l5-l18" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd-l6-l9" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_pldo660, "vdd-l7-l12-l14-l15" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd-l1-l8-l11" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd-l6-l9" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_pldo660, "vdd-l2-l10" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd-l1-l8-l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd-l7-l12-l14-l15" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_pldo660, "vdd-l13-l16-l17" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd-l7-l12-l14-l15" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd-l7-l12-l14-l15" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd-l13-l16-l17" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd-l13-l16-l17" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd-l3-l4-l5-l18" }, + { } +}; + +static const struct rpm_regulator_data rpm_pm8226_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" }, + { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" }, + { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" }, + { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, + { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8841_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" }, + { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8909_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8916_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, + {} +}; + +static const struct rpm_regulator_data rpm_pm8937_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, + /* S5 - S6 are managed by SPMI */ + + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1_l19" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l23" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l3" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l1_l19" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20_l21" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l20_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_nldo, "vdd_l2_l23" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8941_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost }, + + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, + + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" }, + { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" }, + { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" }, + + { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, + { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, + + {} +}; + +static const struct rpm_regulator_data rpm_pm8950_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" }, + /* S5 is managed via SPMI. */ + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" }, + + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" }, + /* L4 seems not to exist. */ + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"}, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, + /* L18 seems not to exist. */ + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" }, + /* L20 & L21 seem not to exist. */ + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8953_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, + + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" }, + {} +}; + +static const struct rpm_regulator_data rpm_pm8994_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" }, + { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" }, + { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" }, + { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" }, + { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" }, + { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, + { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" }, + { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" }, + { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" }, + { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" }, + { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" }, + { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" }, + { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" }, + { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" }, + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" }, + { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" }, + + {} +}; + +static const struct rpm_regulator_data rpm_pm8998_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" }, + { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" }, + { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" }, + { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" }, + { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" }, + { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" }, + { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" }, + { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" }, + { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" }, + { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" }, + { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" }, + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" }, + { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" }, + {} +}; + +static const struct rpm_regulator_data rpm_pma8084_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, + { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, + { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, + { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, + { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, + { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, + { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, + { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, + + { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, + { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, + { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, + { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, + { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, + { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, + { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, + { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, + { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, + { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, + { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, + { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, + + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, + { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, + { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, + { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, + { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, + + {} +}; + +static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, + { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, + {} +}; + +static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { + { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, + {} +}; + +static const struct rpm_regulator_data rpm_pmr735a_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPE, 1, &pmic5_ftsmps520, "vdd_s1"}, + { "s2", QCOM_SMD_RPM_SMPE, 2, &pmic5_ftsmps520, "vdd_s2"}, + { "s3", QCOM_SMD_RPM_SMPE, 3, &pmic5_hfsmps515, "vdd_s3"}, + { "l1", QCOM_SMD_RPM_LDOE, 1, &pm660_nldo660, "vdd_l1_l2"}, + { "l2", QCOM_SMD_RPM_LDOE, 2, &pm660_nldo660, "vdd_l1_l2"}, + { "l3", QCOM_SMD_RPM_LDOE, 3, &pm660_nldo660, "vdd_l3"}, + { "l4", QCOM_SMD_RPM_LDOE, 4, &pm660_ht_lvpldo, "vdd_l4"}, + { "l5", QCOM_SMD_RPM_LDOE, 5, &pm660_nldo660, "vdd_l5_l6"}, + { "l6", QCOM_SMD_RPM_LDOE, 6, &pm660_nldo660, "vdd_l5_l6"}, + { "l7", QCOM_SMD_RPM_LDOE, 7, &pm660_pldo660, "vdd_l7_bob"}, + {} +}; + +static const struct rpm_regulator_data rpm_pms405_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" }, + { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" }, + { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" }, + { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" }, + { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" }, + { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" }, + { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" }, + { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" }, + { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" }, + { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" }, + { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" }, + { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" }, + { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" }, + { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" }, + { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" }, + { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, + { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, + { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, + {} +}; + +static const struct of_device_id rpm_of_match[] = { + { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, + { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, + { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators }, + { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, + { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, + { .compatible = "qcom,rpm-pm8019-regulators", .data = &rpm_pm8019_regulators }, + { .compatible = "qcom,rpm-pm8150-regulators", .data = &rpm_pm8150_regulators }, + { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators }, + { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, + { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators }, + { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, + { .compatible = "qcom,rpm-pm8937-regulators", .data = &rpm_pm8937_regulators }, + { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, + { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, + { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, + { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, + { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, + { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, + { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, + { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, + { .compatible = "qcom,rpm-pmr735a-regulators", .data = &rpm_pmr735a_regulators }, + { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, + {} +}; +MODULE_DEVICE_TABLE(of, rpm_of_match); + +/** + * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator + * @vreg: Pointer to the individual qcom_smd-regulator resource + * @dev: Pointer to the top level qcom_smd-regulator PMIC device + * @node: Pointer to the individual qcom_smd-regulator resource + * device node + * @pmic_rpm_data: Pointer to a null-terminated array of qcom_smd-regulator + * resources defined for the top level PMIC device + * + * Return: 0 on success, or a negative error number on failure + */ +static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev, + struct device_node *node, + const struct rpm_regulator_data *pmic_rpm_data) +{ + struct regulator_config config = {}; + const struct rpm_regulator_data *rpm_data; + struct regulator_dev *rdev; + int ret; + + for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++) + if (of_node_name_eq(node, rpm_data->name)) + break; + + if (!rpm_data->name) { + dev_err(dev, "Unknown regulator %pOFn\n", node); + return -EINVAL; + } + + vreg->dev = dev; + vreg->type = rpm_data->type; + vreg->id = rpm_data->id; + + memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc)); + vreg->desc.name = rpm_data->name; + vreg->desc.supply_name = rpm_data->supply; + vreg->desc.owner = THIS_MODULE; + vreg->desc.type = REGULATOR_VOLTAGE; + vreg->desc.of_match = rpm_data->name; + + config.dev = dev; + config.of_node = node; + config.driver_data = vreg; + + rdev = devm_regulator_register(dev, &vreg->desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret); + return ret; + } + + return 0; +} + +static int rpm_reg_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct rpm_regulator_data *vreg_data; + struct qcom_rpm_reg *vreg; + struct qcom_smd_rpm *rpm; + int ret; + + rpm = dev_get_drvdata(pdev->dev.parent); + if (!rpm) { + dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n"); + return -ENODEV; + } + + if (smd_vreg_rpm && rpm != smd_vreg_rpm) + return dev_err_probe(dev, -EINVAL, "RPM mismatch\n"); + + smd_vreg_rpm = rpm; + + vreg_data = of_device_get_match_data(dev); + if (!vreg_data) + return -ENODEV; + + for_each_available_child_of_node_scoped(dev->of_node, node) { + vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + ret = rpm_regulator_init_vreg(vreg, dev, node, vreg_data); + if (ret < 0) + return ret; + } + + return 0; +} + +static struct platform_driver rpm_reg_driver = { + .probe = rpm_reg_probe, + .driver = { + .name = "qcom_rpm_smd_regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rpm_of_match, + }, +}; + +static int __init rpm_reg_init(void) +{ + return platform_driver_register(&rpm_reg_driver); +} +subsys_initcall(rpm_reg_init); + +static void __exit rpm_reg_exit(void) +{ + platform_driver_unregister(&rpm_reg_driver); +} +module_exit(rpm_reg_exit) + +MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c new file mode 100644 index 000000000..c1a41ce70 --- /dev/null +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -0,0 +1,2618 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Pin control enable input pins. */ +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00 +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01 +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02 +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04 +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08 +#define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10 + +/* Pin control high power mode input pins. */ +#define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00 +#define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01 +#define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02 +#define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04 +#define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08 +#define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10 +#define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20 + +/* + * Used with enable parameters to specify that hardware default register values + * should be left unaltered. + */ +#define SPMI_REGULATOR_USE_HW_DEFAULT 2 + +/* Soft start strength of a voltage switch type regulator */ +enum spmi_vs_soft_start_str { + SPMI_VS_SOFT_START_STR_0P05_UA = 0, + SPMI_VS_SOFT_START_STR_0P25_UA, + SPMI_VS_SOFT_START_STR_0P55_UA, + SPMI_VS_SOFT_START_STR_0P75_UA, + SPMI_VS_SOFT_START_STR_HW_DEFAULT, +}; + +/** + * struct spmi_regulator_init_data - spmi-regulator initialization data + * @pin_ctrl_enable: Bit mask specifying which hardware pins should be + * used to enable the regulator, if any + * Value should be an ORing of + * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If + * the bit specified by + * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is + * set, then pin control enable hardware registers + * will not be modified. + * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be + * used to force the regulator into high power + * mode, if any + * Value should be an ORing of + * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If + * the bit specified by + * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is + * set, then pin control mode hardware registers + * will not be modified. + * @vs_soft_start_strength: This parameter sets the soft start strength for + * voltage switch type regulators. Its value + * should be one of SPMI_VS_SOFT_START_STR_*. If + * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT, + * then the soft start strength will be left at its + * default hardware value. + */ +struct spmi_regulator_init_data { + unsigned pin_ctrl_enable; + unsigned pin_ctrl_hpm; + enum spmi_vs_soft_start_str vs_soft_start_strength; +}; + +/* These types correspond to unique register layouts. */ +enum spmi_regulator_logical_type { + SPMI_REGULATOR_LOGICAL_TYPE_SMPS, + SPMI_REGULATOR_LOGICAL_TYPE_LDO, + SPMI_REGULATOR_LOGICAL_TYPE_VS, + SPMI_REGULATOR_LOGICAL_TYPE_BOOST, + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS, + SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP, + SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO, + SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, + SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, + SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, + SPMI_REGULATOR_LOGICAL_TYPE_HFS430, + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3, + SPMI_REGULATOR_LOGICAL_TYPE_LDO_510, + SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS, +}; + +enum spmi_regulator_type { + SPMI_REGULATOR_TYPE_BUCK = 0x03, + SPMI_REGULATOR_TYPE_LDO = 0x04, + SPMI_REGULATOR_TYPE_VS = 0x05, + SPMI_REGULATOR_TYPE_BOOST = 0x1b, + SPMI_REGULATOR_TYPE_FTS = 0x1c, + SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f, + SPMI_REGULATOR_TYPE_ULT_LDO = 0x21, + SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22, +}; + +enum spmi_regulator_subtype { + SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08, + SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09, + SPMI_REGULATOR_SUBTYPE_N50 = 0x01, + SPMI_REGULATOR_SUBTYPE_N150 = 0x02, + SPMI_REGULATOR_SUBTYPE_N300 = 0x03, + SPMI_REGULATOR_SUBTYPE_N600 = 0x04, + SPMI_REGULATOR_SUBTYPE_N1200 = 0x05, + SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06, + SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07, + SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14, + SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15, + SPMI_REGULATOR_SUBTYPE_P50 = 0x08, + SPMI_REGULATOR_SUBTYPE_P150 = 0x09, + SPMI_REGULATOR_SUBTYPE_P300 = 0x0a, + SPMI_REGULATOR_SUBTYPE_P600 = 0x0b, + SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c, + SPMI_REGULATOR_SUBTYPE_LN = 0x10, + SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28, + SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29, + SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a, + SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b, + SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c, + SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d, + SPMI_REGULATOR_SUBTYPE_HT_N300_ST = 0x30, + SPMI_REGULATOR_SUBTYPE_HT_N600_ST = 0x31, + SPMI_REGULATOR_SUBTYPE_HT_N1200_ST = 0x32, + SPMI_REGULATOR_SUBTYPE_HT_LVP150 = 0x3b, + SPMI_REGULATOR_SUBTYPE_HT_LVP300 = 0x3c, + SPMI_REGULATOR_SUBTYPE_L660_N300_ST = 0x42, + SPMI_REGULATOR_SUBTYPE_L660_N600_ST = 0x43, + SPMI_REGULATOR_SUBTYPE_L660_P50 = 0x46, + SPMI_REGULATOR_SUBTYPE_L660_P150 = 0x47, + SPMI_REGULATOR_SUBTYPE_L660_P600 = 0x49, + SPMI_REGULATOR_SUBTYPE_L660_LVP150 = 0x4d, + SPMI_REGULATOR_SUBTYPE_L660_LVP600 = 0x4f, + SPMI_REGULATOR_SUBTYPE_LV100 = 0x01, + SPMI_REGULATOR_SUBTYPE_LV300 = 0x02, + SPMI_REGULATOR_SUBTYPE_MV300 = 0x08, + SPMI_REGULATOR_SUBTYPE_MV500 = 0x09, + SPMI_REGULATOR_SUBTYPE_HDMI = 0x10, + SPMI_REGULATOR_SUBTYPE_OTG = 0x11, + SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, + SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, + SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, + SPMI_REGULATOR_SUBTYPE_FTS426_CTL = 0x0a, + SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, + SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, + SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, + SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, + SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, + SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, + SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, + SPMI_REGULATOR_SUBTYPE_HT_P600 = 0x3d, + SPMI_REGULATOR_SUBTYPE_HFSMPS_510 = 0x0a, + SPMI_REGULATOR_SUBTYPE_FTSMPS_510 = 0x0b, + SPMI_REGULATOR_SUBTYPE_LV_P150_510 = 0x71, + SPMI_REGULATOR_SUBTYPE_LV_P300_510 = 0x72, + SPMI_REGULATOR_SUBTYPE_LV_P600_510 = 0x73, + SPMI_REGULATOR_SUBTYPE_N300_510 = 0x6a, + SPMI_REGULATOR_SUBTYPE_N600_510 = 0x6b, + SPMI_REGULATOR_SUBTYPE_N1200_510 = 0x6c, + SPMI_REGULATOR_SUBTYPE_MV_P50_510 = 0x7a, + SPMI_REGULATOR_SUBTYPE_MV_P150_510 = 0x7b, + SPMI_REGULATOR_SUBTYPE_MV_P600_510 = 0x7d, +}; + +enum spmi_common_regulator_registers { + SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01, + SPMI_COMMON_REG_TYPE = 0x04, + SPMI_COMMON_REG_SUBTYPE = 0x05, + SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40, + SPMI_COMMON_REG_VOLTAGE_SET = 0x41, + SPMI_COMMON_REG_MODE = 0x45, + SPMI_COMMON_REG_ENABLE = 0x46, + SPMI_COMMON_REG_PULL_DOWN = 0x48, + SPMI_COMMON_REG_SOFT_START = 0x4c, + SPMI_COMMON_REG_STEP_CTRL = 0x61, +}; + +/* + * Second common register layout used by newer devices starting with ftsmps426 + * Note that some of the registers from the first common layout remain + * unchanged and their definition is not duplicated. + */ +enum spmi_ftsmps426_regulator_registers { + SPMI_FTSMPS426_REG_VOLTAGE_LSB = 0x40, + SPMI_FTSMPS426_REG_VOLTAGE_MSB = 0x41, + SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB = 0x68, + SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, +}; + +/* + * Third common register layout + */ +enum spmi_hfsmps_regulator_registers { + SPMI_HFSMPS_REG_STEP_CTRL = 0x3c, + SPMI_HFSMPS_REG_PULL_DOWN = 0xa0, +}; + +enum spmi_vs_registers { + SPMI_VS_REG_OCP = 0x4a, + SPMI_VS_REG_SOFT_START = 0x4c, +}; + +enum spmi_boost_registers { + SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a, +}; + +enum spmi_boost_byp_registers { + SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b, +}; + +enum spmi_saw3_registers { + SAW3_SECURE = 0x00, + SAW3_ID = 0x04, + SAW3_SPM_STS = 0x0C, + SAW3_AVS_STS = 0x10, + SAW3_PMIC_STS = 0x14, + SAW3_RST = 0x18, + SAW3_VCTL = 0x1C, + SAW3_AVS_CTL = 0x20, + SAW3_AVS_LIMIT = 0x24, + SAW3_AVS_DLY = 0x28, + SAW3_AVS_HYSTERESIS = 0x2C, + SAW3_SPM_STS2 = 0x38, + SAW3_SPM_PMIC_DATA_3 = 0x4C, + SAW3_VERSION = 0xFD0, +}; + +/* Used for indexing into ctrl_reg. These are offsets from 0x40 */ +enum spmi_common_control_register_index { + SPMI_COMMON_IDX_VOLTAGE_RANGE = 0, + SPMI_COMMON_IDX_VOLTAGE_SET = 1, + SPMI_COMMON_IDX_MODE = 5, + SPMI_COMMON_IDX_ENABLE = 6, +}; + +/* Common regulator control register layout */ +#define SPMI_COMMON_ENABLE_MASK 0x80 +#define SPMI_COMMON_ENABLE 0x80 +#define SPMI_COMMON_DISABLE 0x00 +#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08 +#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04 +#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02 +#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01 +#define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f + +/* Common regulator mode register layout */ +#define SPMI_COMMON_MODE_HPM_MASK 0x80 +#define SPMI_COMMON_MODE_AUTO_MASK 0x40 +#define SPMI_COMMON_MODE_BYPASS_MASK 0x20 +#define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10 +#define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08 +#define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04 +#define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02 +#define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 +#define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f + +#define SPMI_FTSMPS426_MODE_BYPASS_MASK 3 +#define SPMI_FTSMPS426_MODE_RETENTION_MASK 4 +#define SPMI_FTSMPS426_MODE_LPM_MASK 5 +#define SPMI_FTSMPS426_MODE_AUTO_MASK 6 +#define SPMI_FTSMPS426_MODE_HPM_MASK 7 + +#define SPMI_FTSMPS426_MODE_MASK 0x07 + +/* Third common regulator mode register values */ +#define SPMI_HFSMPS_MODE_BYPASS_MASK 2 +#define SPMI_HFSMPS_MODE_RETENTION_MASK 3 +#define SPMI_HFSMPS_MODE_LPM_MASK 4 +#define SPMI_HFSMPS_MODE_AUTO_MASK 6 +#define SPMI_HFSMPS_MODE_HPM_MASK 7 + +#define SPMI_HFSMPS_MODE_MASK 0x07 + +/* Common regulator pull down control register layout */ +#define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 + +/* LDO regulator current limit control register layout */ +#define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80 + +/* LDO regulator soft start control register layout */ +#define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80 + +/* VS regulator over current protection control register layout */ +#define SPMI_VS_OCP_OVERRIDE 0x01 +#define SPMI_VS_OCP_NO_OVERRIDE 0x00 + +/* VS regulator soft start control register layout */ +#define SPMI_VS_SOFT_START_ENABLE_MASK 0x80 +#define SPMI_VS_SOFT_START_SEL_MASK 0x03 + +/* Boost regulator current limit control register layout */ +#define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80 +#define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07 + +#define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10 +#define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30 +#define SPMI_VS_OCP_FALL_DELAY_US 90 +#define SPMI_VS_OCP_FAULT_DELAY_US 20000 + +#define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18 +#define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3 +#define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07 +#define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0 + +/* Clock rate in kHz of the FTSMPS regulator reference clock. */ +#define SPMI_FTSMPS_CLOCK_RATE 19200 + +/* Minimum voltage stepper delay for each step. */ +#define SPMI_FTSMPS_STEP_DELAY 8 +#define SPMI_DEFAULT_STEP_DELAY 20 + +/* + * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to + * adjust the step rate in order to account for oscillator variance. + */ +#define SPMI_FTSMPS_STEP_MARGIN_NUM 4 +#define SPMI_FTSMPS_STEP_MARGIN_DEN 5 + +/* slew_rate has units of uV/us. */ +#define SPMI_HFSMPS_SLEW_RATE_38p4 38400 + +#define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 +#define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 + +/* Clock rate in kHz of the FTSMPS426 regulator reference clock. */ +#define SPMI_FTSMPS426_CLOCK_RATE 4800 + +#define SPMI_HFS430_CLOCK_RATE 1600 + +/* Minimum voltage stepper delay for each step. */ +#define SPMI_FTSMPS426_STEP_DELAY 2 + +/* + * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is + * used to adjust the step rate in order to account for oscillator variance. + */ +#define SPMI_FTSMPS426_STEP_MARGIN_NUM 10 +#define SPMI_FTSMPS426_STEP_MARGIN_DEN 11 + + +/* VSET value to decide the range of ULT SMPS */ +#define ULT_SMPS_RANGE_SPLIT 0x60 + +/** + * struct spmi_voltage_range - regulator set point voltage mapping description + * @min_uV: Minimum programmable output voltage resulting from + * set point register value 0x00 + * @max_uV: Maximum programmable output voltage + * @step_uV: Output voltage increase resulting from the set point + * register value increasing by 1 + * @set_point_min_uV: Minimum allowed voltage + * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order + * to pick which range should be used in the case of + * overlapping set points. + * @n_voltages: Number of preferred voltage set points present in this + * range + * @range_sel: Voltage range register value corresponding to this range + * + * The following relationships must be true for the values used in this struct: + * (max_uV - min_uV) % step_uV == 0 + * (set_point_min_uV - min_uV) % step_uV == 0* + * (set_point_max_uV - min_uV) % step_uV == 0* + * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1 + * + * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to + * specify that the voltage range has meaning, but is not preferred. + */ +struct spmi_voltage_range { + int min_uV; + int max_uV; + int step_uV; + int set_point_min_uV; + int set_point_max_uV; + unsigned n_voltages; + u8 range_sel; +}; + +/* + * The ranges specified in the spmi_voltage_set_points struct must be listed + * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV. + */ +struct spmi_voltage_set_points { + const struct spmi_voltage_range *range; + int count; + unsigned n_voltages; +}; + +struct spmi_regulator { + struct regulator_desc desc; + struct device *dev; + struct delayed_work ocp_work; + struct regmap *regmap; + struct spmi_voltage_set_points *set_points; + enum spmi_regulator_logical_type logical_type; + int ocp_irq; + int ocp_count; + int ocp_max_retries; + int ocp_retry_delay_ms; + int hpm_min_load; + int slew_rate; + ktime_t vs_enable_time; + u16 base; + struct list_head node; +}; + +struct spmi_regulator_mapping { + enum spmi_regulator_type type; + enum spmi_regulator_subtype subtype; + enum spmi_regulator_logical_type logical_type; + u32 revision_min; + u32 revision_max; + const struct regulator_ops *ops; + struct spmi_voltage_set_points *set_points; + int hpm_min_load; +}; + +struct spmi_regulator_data { + const char *name; + u16 base; + const char *supply; + const char *ocp; + u16 force_type; +}; + +#define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \ + _logical_type, _ops_val, _set_points_val, _hpm_min_load) \ + { \ + .type = SPMI_REGULATOR_TYPE_##_type, \ + .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ + .revision_min = _dig_major_min, \ + .revision_max = _dig_major_max, \ + .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \ + .ops = &spmi_##_ops_val##_ops, \ + .set_points = &_set_points_val##_set_points, \ + .hpm_min_load = _hpm_min_load, \ + } + +#define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \ + { \ + .type = SPMI_REGULATOR_TYPE_VS, \ + .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ + .revision_min = _dig_major_min, \ + .revision_max = _dig_major_max, \ + .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \ + .ops = &spmi_vs_ops, \ + } + +#define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \ + _set_point_max_uV, _max_uV, _step_uV) \ + { \ + .min_uV = _min_uV, \ + .max_uV = _max_uV, \ + .set_point_min_uV = _set_point_min_uV, \ + .set_point_max_uV = _set_point_max_uV, \ + .step_uV = _step_uV, \ + .range_sel = _range_sel, \ + .n_voltages = (_set_point_max_uV != 0) ? \ + ((_set_point_max_uV - _set_point_min_uV) / _step_uV) + 1 : \ + 0, \ + } + +#define DEFINE_SPMI_SET_POINTS(name) \ +struct spmi_voltage_set_points name##_set_points = { \ + .range = name##_ranges, \ + .count = ARRAY_SIZE(name##_ranges), \ +} + +/* + * These tables contain the physically available PMIC regulator voltage setpoint + * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed + * to ensure that the setpoints available to software are monotonically + * increasing and unique. The set_voltage callback functions expect these + * properties to hold. + */ +static const struct spmi_voltage_range pldo_ranges[] = { + SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), + SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000), + SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000), +}; + +static const struct spmi_voltage_range nldo1_ranges[] = { + SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), +}; + +static const struct spmi_voltage_range nldo2_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500), + SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250), + SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500), +}; + +static const struct spmi_voltage_range nldo3_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), + SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500), + SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500), +}; + +static const struct spmi_voltage_range ln_ldo_ranges[] = { + SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000), + SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000), +}; + +static const struct spmi_voltage_range smps_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), + SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000), +}; + +static const struct spmi_voltage_range ftsmps_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000), + SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000), +}; + +static const struct spmi_voltage_range ftsmps2p5_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000), + SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), +}; + +static const struct spmi_voltage_range ftsmps426_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 0, 320000, 1352000, 1352000, 4000), +}; + +static const struct spmi_voltage_range boost_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), +}; + +static const struct spmi_voltage_range boost_byp_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000), +}; + +static const struct spmi_voltage_range ult_lo_smps_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), + SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000), +}; + +static const struct spmi_voltage_range ult_ho_smps_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000), +}; + +static const struct spmi_voltage_range ult_nldo_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), +}; + +static const struct spmi_voltage_range ult_pldo_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), +}; + +static const struct spmi_voltage_range pldo660_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 3544000, 3544000, 8000), +}; + +static const struct spmi_voltage_range nldo660_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 1304000, 1304000, 8000), +}; + +static const struct spmi_voltage_range ht_lvpldo_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 2000000, 2000000, 8000), +}; + +static const struct spmi_voltage_range ht_nldo_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 312000, 312000, 1304000, 1304000, 8000), +}; + +static const struct spmi_voltage_range hfs430_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), +}; + +static const struct spmi_voltage_range ht_p150_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000), +}; + +static const struct spmi_voltage_range ht_p600_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000), +}; + +static const struct spmi_voltage_range nldo_510_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 1304000, 1304000, 8000), +}; + +static const struct spmi_voltage_range ftsmps510_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 300000, 300000, 1372000, 1372000, 4000), +}; + +static DEFINE_SPMI_SET_POINTS(pldo); +static DEFINE_SPMI_SET_POINTS(nldo1); +static DEFINE_SPMI_SET_POINTS(nldo2); +static DEFINE_SPMI_SET_POINTS(nldo3); +static DEFINE_SPMI_SET_POINTS(ln_ldo); +static DEFINE_SPMI_SET_POINTS(smps); +static DEFINE_SPMI_SET_POINTS(ftsmps); +static DEFINE_SPMI_SET_POINTS(ftsmps2p5); +static DEFINE_SPMI_SET_POINTS(ftsmps426); +static DEFINE_SPMI_SET_POINTS(boost); +static DEFINE_SPMI_SET_POINTS(boost_byp); +static DEFINE_SPMI_SET_POINTS(ult_lo_smps); +static DEFINE_SPMI_SET_POINTS(ult_ho_smps); +static DEFINE_SPMI_SET_POINTS(ult_nldo); +static DEFINE_SPMI_SET_POINTS(ult_pldo); +static DEFINE_SPMI_SET_POINTS(pldo660); +static DEFINE_SPMI_SET_POINTS(nldo660); +static DEFINE_SPMI_SET_POINTS(ht_lvpldo); +static DEFINE_SPMI_SET_POINTS(ht_nldo); +static DEFINE_SPMI_SET_POINTS(hfs430); +static DEFINE_SPMI_SET_POINTS(ht_p150); +static DEFINE_SPMI_SET_POINTS(ht_p600); +static DEFINE_SPMI_SET_POINTS(nldo_510); +static DEFINE_SPMI_SET_POINTS(ftsmps510); + +static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, + int len) +{ + return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); +} + +static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, + u8 *buf, int len) +{ + return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); +} + +static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, + u8 mask) +{ + return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); +} + +static int spmi_regulator_vs_enable(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + + if (vreg->ocp_irq) { + vreg->ocp_count = 0; + vreg->vs_enable_time = ktime_get(); + } + + return regulator_enable_regmap(rdev); +} + +static int spmi_regulator_vs_ocp(struct regulator_dev *rdev, int lim_uA, + int severity, bool enable) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 reg = SPMI_VS_OCP_OVERRIDE; + + if (lim_uA || !enable || severity != REGULATOR_SEVERITY_PROT) + return -EINVAL; + + return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, ®, 1); +} + +static int spmi_regulator_select_voltage(struct spmi_regulator *vreg, + int min_uV, int max_uV) +{ + const struct spmi_voltage_range *range; + int uV = min_uV; + int lim_min_uV, lim_max_uV, i, range_id, range_max_uV; + int selector, voltage_sel; + + /* Check if request voltage is outside of physically settable range. */ + lim_min_uV = vreg->set_points->range[0].set_point_min_uV; + lim_max_uV = + vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV; + + if (uV < lim_min_uV && max_uV >= lim_min_uV) + uV = lim_min_uV; + + if (uV < lim_min_uV || uV > lim_max_uV) { + dev_err(vreg->dev, + "request v=[%d, %d] is outside possible v=[%d, %d]\n", + min_uV, max_uV, lim_min_uV, lim_max_uV); + return -EINVAL; + } + + /* Find the range which uV is inside of. */ + for (i = vreg->set_points->count - 1; i > 0; i--) { + range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV; + if (uV > range_max_uV && range_max_uV > 0) + break; + } + + range_id = i; + range = &vreg->set_points->range[range_id]; + + /* + * Force uV to be an allowed set point by applying a ceiling function to + * the uV value. + */ + voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); + uV = voltage_sel * range->step_uV + range->min_uV; + + if (uV > max_uV) { + dev_err(vreg->dev, + "request v=[%d, %d] cannot be met by any set point; " + "next set point: %d\n", + min_uV, max_uV, uV); + return -EINVAL; + } + + selector = 0; + for (i = 0; i < range_id; i++) + selector += vreg->set_points->range[i].n_voltages; + selector += (uV - range->set_point_min_uV) / range->step_uV; + + return selector; +} + +static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg, + unsigned selector, u8 *range_sel, + u8 *voltage_sel) +{ + const struct spmi_voltage_range *range, *end; + unsigned offset; + + range = vreg->set_points->range; + end = range + vreg->set_points->count; + + for (; range < end; range++) { + if (selector < range->n_voltages) { + /* + * hardware selectors between set point min and real + * min are invalid so we ignore them + */ + offset = range->set_point_min_uV - range->min_uV; + offset /= range->step_uV; + *voltage_sel = selector + offset; + *range_sel = range->range_sel; + return 0; + } + + selector -= range->n_voltages; + } + + return -EINVAL; +} + +static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel, + const struct spmi_voltage_range *range) +{ + unsigned sw_sel = 0; + unsigned offset, max_hw_sel; + const struct spmi_voltage_range *r = vreg->set_points->range; + const struct spmi_voltage_range *end = r + vreg->set_points->count; + + for (; r < end; r++) { + if (r == range && range->n_voltages) { + /* + * hardware selectors between set point min and real + * min and between set point max and real max are + * invalid so we return an error if they're + * programmed into the hardware + */ + offset = range->set_point_min_uV - range->min_uV; + offset /= range->step_uV; + if (hw_sel < offset) + return -EINVAL; + + max_hw_sel = range->set_point_max_uV - range->min_uV; + max_hw_sel /= range->step_uV; + if (hw_sel > max_hw_sel) + return -EINVAL; + + return sw_sel + hw_sel - offset; + } + sw_sel += r->n_voltages; + } + + return -EINVAL; +} + +static const struct spmi_voltage_range * +spmi_regulator_find_range(struct spmi_regulator *vreg) +{ + u8 range_sel; + const struct spmi_voltage_range *range, *end; + + range = vreg->set_points->range; + end = range + vreg->set_points->count; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1); + + for (; range < end; range++) + if (range->range_sel == range_sel) + return range; + + return NULL; +} + +static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg, + int min_uV, int max_uV) +{ + const struct spmi_voltage_range *range; + int uV = min_uV; + int i, selector; + + range = spmi_regulator_find_range(vreg); + if (!range) + goto different_range; + + if (uV < range->min_uV && max_uV >= range->min_uV) + uV = range->min_uV; + + if (uV < range->min_uV || uV > range->max_uV) { + /* Current range doesn't support the requested voltage. */ + goto different_range; + } + + /* + * Force uV to be an allowed set point by applying a ceiling function to + * the uV value. + */ + uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); + uV = uV * range->step_uV + range->min_uV; + + if (uV > max_uV) { + /* + * No set point in the current voltage range is within the + * requested min_uV to max_uV range. + */ + goto different_range; + } + + selector = 0; + for (i = 0; i < vreg->set_points->count; i++) { + if (uV >= vreg->set_points->range[i].set_point_min_uV + && uV <= vreg->set_points->range[i].set_point_max_uV) { + selector += + (uV - vreg->set_points->range[i].set_point_min_uV) + / vreg->set_points->range[i].step_uV; + break; + } + + selector += vreg->set_points->range[i].n_voltages; + } + + if (selector >= vreg->set_points->n_voltages) + goto different_range; + + return selector; + +different_range: + return spmi_regulator_select_voltage(vreg, min_uV, max_uV); +} + +static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + + /* + * Favor staying in the current voltage range if possible. This avoids + * voltage spikes that occur when changing the voltage range. + */ + return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV); +} + +static int +spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + int ret; + u8 buf[2]; + u8 range_sel, voltage_sel; + + ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); + if (ret) + return ret; + + buf[0] = range_sel; + buf[1] = voltage_sel; + return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); +} + +static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, + unsigned selector); + +static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 buf[2]; + int mV; + + mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000; + + buf[0] = mV & 0xff; + buf[1] = mV >> 8; + return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); +} + +static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, unsigned int new_selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + int diff_uV; + + diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) - + spmi_regulator_common_list_voltage(rdev, old_selector)); + + return DIV_ROUND_UP(diff_uV, vreg->slew_rate); +} + +static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + const struct spmi_voltage_range *range; + u8 voltage_sel; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); + + range = spmi_regulator_find_range(vreg); + if (!range) + return -EINVAL; + + return spmi_hw_selector_to_sw(vreg, voltage_sel, range); +} + +static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + const struct spmi_voltage_range *range; + u8 buf[2]; + int uV; + + spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); + + uV = (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000; + range = vreg->set_points->range; + + return (uV - range->set_point_min_uV) / range->step_uV; +} + +static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + + return spmi_regulator_select_voltage(vreg, min_uV, max_uV); +} + +static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 sel = selector; + + /* + * Certain types of regulators do not have a range select register so + * only voltage set register needs to be written. + */ + return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1); +} + +static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 selector; + int ret; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1); + if (ret) + return ret; + + return selector; +} + +static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + int ret; + u8 range_sel, voltage_sel; + + ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); + if (ret) + return ret; + + /* + * Calculate VSET based on range + * In case of range 0: voltage_sel is a 7 bit value, can be written + * witout any modification. + * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to + * [011]. + */ + if (range_sel == 1) + voltage_sel |= ULT_SMPS_RANGE_SPLIT; + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET, + voltage_sel, 0xff); +} + +static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + const struct spmi_voltage_range *range; + u8 voltage_sel; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); + + range = spmi_regulator_find_range(vreg); + if (!range) + return -EINVAL; + + if (range->range_sel == 1) + voltage_sel &= ~ULT_SMPS_RANGE_SPLIT; + + return spmi_hw_selector_to_sw(vreg, voltage_sel, range); +} + +static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + int uV = 0; + int i; + + if (selector >= vreg->set_points->n_voltages) + return 0; + + for (i = 0; i < vreg->set_points->count; i++) { + if (selector < vreg->set_points->range[i].n_voltages) { + uV = selector * vreg->set_points->range[i].step_uV + + vreg->set_points->range[i].set_point_min_uV; + break; + } + + selector -= vreg->set_points->range[i].n_voltages; + } + + return uV; +} + +static int +spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 mask = SPMI_COMMON_MODE_BYPASS_MASK; + u8 val = 0; + + if (enable) + val = mask; + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); +} + +static int +spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 val; + int ret; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1); + *enable = val & SPMI_COMMON_MODE_BYPASS_MASK; + + return ret; +} + +static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 reg; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); + + reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; + + switch (reg) { + case SPMI_COMMON_MODE_HPM_MASK: + return REGULATOR_MODE_NORMAL; + case SPMI_COMMON_MODE_AUTO_MASK: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_IDLE; + } +} + +static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 reg; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); + + switch (reg) { + case SPMI_FTSMPS426_MODE_HPM_MASK: + return REGULATOR_MODE_NORMAL; + case SPMI_FTSMPS426_MODE_AUTO_MASK: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_IDLE; + } +} + +static unsigned int spmi_regulator_hfsmps_get_mode(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 reg; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); + + switch (reg) { + case SPMI_HFSMPS_MODE_HPM_MASK: + return REGULATOR_MODE_NORMAL; + case SPMI_HFSMPS_MODE_AUTO_MASK: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_IDLE; + } +} + +static int +spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; + u8 val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = SPMI_COMMON_MODE_HPM_MASK; + break; + case REGULATOR_MODE_FAST: + val = SPMI_COMMON_MODE_AUTO_MASK; + break; + default: + val = 0; + break; + } + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); +} + +static int +spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 mask = SPMI_FTSMPS426_MODE_MASK; + u8 val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = SPMI_FTSMPS426_MODE_HPM_MASK; + break; + case REGULATOR_MODE_FAST: + val = SPMI_FTSMPS426_MODE_AUTO_MASK; + break; + case REGULATOR_MODE_IDLE: + val = SPMI_FTSMPS426_MODE_LPM_MASK; + break; + default: + return -EINVAL; + } + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); +} + +static int +spmi_regulator_hfsmps_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 mask = SPMI_HFSMPS_MODE_MASK; + u8 val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = SPMI_HFSMPS_MODE_HPM_MASK; + break; + case REGULATOR_MODE_FAST: + val = SPMI_HFSMPS_MODE_AUTO_MASK; + break; + case REGULATOR_MODE_IDLE: + val = vreg->logical_type == + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3 ? + SPMI_HFSMPS_MODE_RETENTION_MASK : + SPMI_HFSMPS_MODE_LPM_MASK; + break; + default: + return -EINVAL; + } + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); +} + +static int +spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + unsigned int mode; + + if (load_uA >= vreg->hpm_min_load) + mode = REGULATOR_MODE_NORMAL; + else + mode = REGULATOR_MODE_IDLE; + + return spmi_regulator_common_set_mode(rdev, mode); +} + +static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, + mask, mask); +} + +static int spmi_regulator_hfsmps_set_pull_down(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; + + return spmi_vreg_update_bits(vreg, SPMI_HFSMPS_REG_PULL_DOWN, + mask, mask); +} + +static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK; + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START, + mask, mask); +} + +static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + enum spmi_regulator_logical_type type = vreg->logical_type; + unsigned int current_reg; + u8 reg; + u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK | + SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; + int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500; + + if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST) + current_reg = SPMI_BOOST_REG_CURRENT_LIMIT; + else + current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT; + + if (ilim_uA > max || ilim_uA <= 0) + return -EINVAL; + + reg = (ilim_uA - 1) / 500; + reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; + + return spmi_vreg_update_bits(vreg, current_reg, reg, mask); +} + +static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg) +{ + int ret; + + ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, + SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); + + vreg->vs_enable_time = ktime_get(); + + ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, + SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); + + return ret; +} + +static void spmi_regulator_vs_ocp_work(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct spmi_regulator *vreg + = container_of(dwork, struct spmi_regulator, ocp_work); + + spmi_regulator_vs_clear_ocp(vreg); +} + +static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data) +{ + struct spmi_regulator *vreg = data; + ktime_t ocp_irq_time; + s64 ocp_trigger_delay_us; + + ocp_irq_time = ktime_get(); + ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time, + vreg->vs_enable_time); + + /* + * Reset the OCP count if there is a large delay between switch enable + * and when OCP triggers. This is indicative of a hotplug event as + * opposed to a fault. + */ + if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US) + vreg->ocp_count = 0; + + /* Wait for switch output to settle back to 0 V after OCP triggered. */ + udelay(SPMI_VS_OCP_FALL_DELAY_US); + + vreg->ocp_count++; + + if (vreg->ocp_count == 1) { + /* Immediately clear the over current condition. */ + spmi_regulator_vs_clear_ocp(vreg); + } else if (vreg->ocp_count <= vreg->ocp_max_retries) { + /* Schedule the over current clear task to run later. */ + schedule_delayed_work(&vreg->ocp_work, + msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1); + } else { + dev_err(vreg->dev, + "OCP triggered %d times; no further retries\n", + vreg->ocp_count); + } + + return IRQ_HANDLED; +} + +#define SAW3_VCTL_DATA_MASK 0xFF +#define SAW3_VCTL_CLEAR_MASK 0x700FF +#define SAW3_AVS_CTL_EN_MASK 0x1 +#define SAW3_AVS_CTL_TGGL_MASK 0x8000000 +#define SAW3_AVS_CTL_CLEAR_MASK 0x7efc00 + +static struct regmap *saw_regmap; + +static void spmi_saw_set_vdd(void *data) +{ + u32 vctl, data3, avs_ctl, pmic_sts; + bool avs_enabled = false; + unsigned long timeout; + u8 voltage_sel = *(u8 *)data; + + regmap_read(saw_regmap, SAW3_AVS_CTL, &avs_ctl); + regmap_read(saw_regmap, SAW3_VCTL, &vctl); + regmap_read(saw_regmap, SAW3_SPM_PMIC_DATA_3, &data3); + + /* select the band */ + vctl &= ~SAW3_VCTL_CLEAR_MASK; + vctl |= (u32)voltage_sel; + + data3 &= ~SAW3_VCTL_CLEAR_MASK; + data3 |= (u32)voltage_sel; + + /* If AVS is enabled, switch it off during the voltage change */ + avs_enabled = SAW3_AVS_CTL_EN_MASK & avs_ctl; + if (avs_enabled) { + avs_ctl &= ~SAW3_AVS_CTL_TGGL_MASK; + regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); + } + + regmap_write(saw_regmap, SAW3_RST, 1); + regmap_write(saw_regmap, SAW3_VCTL, vctl); + regmap_write(saw_regmap, SAW3_SPM_PMIC_DATA_3, data3); + + timeout = jiffies + usecs_to_jiffies(100); + do { + regmap_read(saw_regmap, SAW3_PMIC_STS, &pmic_sts); + pmic_sts &= SAW3_VCTL_DATA_MASK; + if (pmic_sts == (u32)voltage_sel) + break; + + cpu_relax(); + + } while (time_before(jiffies, timeout)); + + /* After successful voltage change, switch the AVS back on */ + if (avs_enabled) { + pmic_sts &= 0x3f; + avs_ctl &= ~SAW3_AVS_CTL_CLEAR_MASK; + avs_ctl |= ((pmic_sts - 4) << 10); + avs_ctl |= (pmic_sts << 17); + avs_ctl |= SAW3_AVS_CTL_TGGL_MASK; + regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); + } +} + +static int +spmi_regulator_saw_set_voltage(struct regulator_dev *rdev, unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + int ret; + u8 range_sel, voltage_sel; + + ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); + if (ret) + return ret; + + if (0 != range_sel) { + dev_dbg(&rdev->dev, "range_sel = %02X voltage_sel = %02X", \ + range_sel, voltage_sel); + return -EINVAL; + } + + /* Always do the SAW register writes on the first CPU */ + return smp_call_function_single(0, spmi_saw_set_vdd, \ + &voltage_sel, true); +} + +static struct regulator_ops spmi_saw_ops = {}; + +static const struct regulator_ops spmi_smps_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_common_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_common_get_voltage, + .map_voltage = spmi_regulator_common_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + +static const struct regulator_ops spmi_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_common_set_voltage, + .get_voltage_sel = spmi_regulator_common_get_voltage, + .map_voltage = spmi_regulator_common_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_bypass = spmi_regulator_common_set_bypass, + .get_bypass = spmi_regulator_common_get_bypass, + .set_pull_down = spmi_regulator_common_set_pull_down, + .set_soft_start = spmi_regulator_common_set_soft_start, +}; + +static const struct regulator_ops spmi_ln_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_common_set_voltage, + .get_voltage_sel = spmi_regulator_common_get_voltage, + .map_voltage = spmi_regulator_common_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_bypass = spmi_regulator_common_set_bypass, + .get_bypass = spmi_regulator_common_get_bypass, +}; + +static const struct regulator_ops spmi_vs_ops = { + .enable = spmi_regulator_vs_enable, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_pull_down = spmi_regulator_common_set_pull_down, + .set_soft_start = spmi_regulator_common_set_soft_start, + .set_over_current_protection = spmi_regulator_vs_ocp, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, +}; + +static const struct regulator_ops spmi_boost_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_single_range_set_voltage, + .get_voltage_sel = spmi_regulator_single_range_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_input_current_limit = spmi_regulator_set_ilim, +}; + +static const struct regulator_ops spmi_ftsmps_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_common_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_common_get_voltage, + .map_voltage = spmi_regulator_common_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + +static const struct regulator_ops spmi_ult_lo_smps_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ult_lo_smps_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_ult_lo_smps_get_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + +static const struct regulator_ops spmi_ult_ho_smps_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_single_range_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_single_range_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + +static const struct regulator_ops spmi_ult_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_single_range_set_voltage, + .get_voltage_sel = spmi_regulator_single_range_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_common_set_mode, + .get_mode = spmi_regulator_common_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_bypass = spmi_regulator_common_set_bypass, + .get_bypass = spmi_regulator_common_get_bypass, + .set_pull_down = spmi_regulator_common_set_pull_down, + .set_soft_start = spmi_regulator_common_set_soft_start, +}; + +static const struct regulator_ops spmi_ftsmps426_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_ftsmps426_set_mode, + .get_mode = spmi_regulator_ftsmps426_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + +static const struct regulator_ops spmi_hfs430_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_ftsmps426_set_mode, + .get_mode = spmi_regulator_ftsmps426_get_mode, +}; + +static const struct regulator_ops spmi_hfsmps_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_hfsmps_set_mode, + .get_mode = spmi_regulator_hfsmps_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_hfsmps_set_pull_down, +}; + +/* Maximum possible digital major revision value */ +#define INF 0xFF + +static const struct spmi_regulator_mapping supported_regulators[] = { + /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ + SPMI_VREG(LDO, HT_P600, 0, INF, HFS430, hfs430, ht_p600, 10000), + SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), + SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), + SPMI_VREG(BUCK, HFS430, 0, 3, HFS430, hfs430, hfs430, 10000), + SPMI_VREG(BUCK, HFSMPS_510, 4, INF, HFSMPS, hfsmps, hfs430, 100000), + SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), + SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), + SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), + SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000), + SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000), + SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000), + SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000), + SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000), + SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000), + SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000), + SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0), + SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000), + SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000), + SPMI_VREG(LDO, HT_N300_ST, 0, INF, FTSMPS426, ftsmps426, + ht_nldo, 30000), + SPMI_VREG(LDO, HT_N600_ST, 0, INF, FTSMPS426, ftsmps426, + ht_nldo, 30000), + SPMI_VREG(LDO, HT_N1200_ST, 0, INF, FTSMPS426, ftsmps426, + ht_nldo, 30000), + SPMI_VREG(LDO, HT_LVP150, 0, INF, FTSMPS426, ftsmps426, + ht_lvpldo, 10000), + SPMI_VREG(LDO, HT_LVP300, 0, INF, FTSMPS426, ftsmps426, + ht_lvpldo, 10000), + SPMI_VREG(LDO, L660_N300_ST, 0, INF, FTSMPS426, ftsmps426, + nldo660, 10000), + SPMI_VREG(LDO, L660_N600_ST, 0, INF, FTSMPS426, ftsmps426, + nldo660, 10000), + SPMI_VREG(LDO, L660_P50, 0, INF, FTSMPS426, ftsmps426, + pldo660, 10000), + SPMI_VREG(LDO, L660_P150, 0, INF, FTSMPS426, ftsmps426, + pldo660, 10000), + SPMI_VREG(LDO, L660_P600, 0, INF, FTSMPS426, ftsmps426, + pldo660, 10000), + SPMI_VREG(LDO, L660_LVP150, 0, INF, FTSMPS426, ftsmps426, + ht_lvpldo, 10000), + SPMI_VREG(LDO, L660_LVP600, 0, INF, FTSMPS426, ftsmps426, + ht_lvpldo, 10000), + SPMI_VREG_VS(LV100, 0, INF), + SPMI_VREG_VS(LV300, 0, INF), + SPMI_VREG_VS(MV300, 0, INF), + SPMI_VREG_VS(MV500, 0, INF), + SPMI_VREG_VS(HDMI, 0, INF), + SPMI_VREG_VS(OTG, 0, INF), + SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), + SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), + SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), + SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000), + SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), + SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, + ult_lo_smps, 100000), + SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps, + ult_lo_smps, 100000), + SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps, + ult_lo_smps, 100000), + SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps, + ult_ho_smps, 100000), + SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), + SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), + SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), + SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), + SPMI_VREG(ULT_LDO, LV_P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), + SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), + SPMI_VREG(LDO, LV_P150_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), + SPMI_VREG(LDO, LV_P300_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), + SPMI_VREG(LDO, LV_P600_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), + SPMI_VREG(LDO, MV_P50_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), + SPMI_VREG(LDO, MV_P150_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), + SPMI_VREG(LDO, MV_P600_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), + SPMI_VREG(LDO, N300_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), + SPMI_VREG(LDO, N600_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), + SPMI_VREG(LDO, N1200_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), + SPMI_VREG(FTS, FTSMPS_510, 0, INF, FTSMPS3, hfsmps, ftsmps510, 100000), +}; + +static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) +{ + const struct spmi_voltage_range *range = points->range; + + for (; range < points->range + points->count; range++) + points->n_voltages += range->n_voltages; +} + +static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type) +{ + const struct spmi_regulator_mapping *mapping; + int ret, i; + u32 dig_major_rev; + u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1]; + u8 type, subtype; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version, + ARRAY_SIZE(version)); + if (ret) { + dev_dbg(vreg->dev, "could not read version registers\n"); + return ret; + } + dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV + - SPMI_COMMON_REG_DIG_MAJOR_REV]; + + if (!force_type) { + type = version[SPMI_COMMON_REG_TYPE - + SPMI_COMMON_REG_DIG_MAJOR_REV]; + subtype = version[SPMI_COMMON_REG_SUBTYPE - + SPMI_COMMON_REG_DIG_MAJOR_REV]; + } else { + type = force_type >> 8; + subtype = force_type; + } + + for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) { + mapping = &supported_regulators[i]; + if (mapping->type == type && mapping->subtype == subtype + && mapping->revision_min <= dig_major_rev + && mapping->revision_max >= dig_major_rev) + goto found; + } + + dev_err(vreg->dev, + "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n", + vreg->desc.name, type, subtype, dig_major_rev); + + return -ENODEV; + +found: + vreg->logical_type = mapping->logical_type; + vreg->set_points = mapping->set_points; + vreg->hpm_min_load = mapping->hpm_min_load; + vreg->desc.ops = mapping->ops; + + if (mapping->set_points) { + if (!mapping->set_points->n_voltages) + spmi_calculate_num_voltages(mapping->set_points); + vreg->desc.n_voltages = mapping->set_points->n_voltages; + } + + return 0; +} + +static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg) +{ + int ret; + u8 reg = 0; + int step, delay, slew_rate, step_delay; + const struct spmi_voltage_range *range; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); + if (ret) { + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); + return ret; + } + + range = spmi_regulator_find_range(vreg); + if (!range) + return -EINVAL; + + switch (vreg->logical_type) { + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: + step_delay = SPMI_FTSMPS_STEP_DELAY; + break; + default: + step_delay = SPMI_DEFAULT_STEP_DELAY; + break; + } + + step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK; + step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT; + + delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK; + delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT; + + /* slew_rate has units of uV/us */ + slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step); + slew_rate /= 1000 * (step_delay << delay); + slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; + slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; + + /* Ensure that the slew rate is greater than 0 */ + vreg->slew_rate = max(slew_rate, 1); + + return ret; +} + +static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg, + int clock_rate) +{ + int ret; + u8 reg = 0; + int delay, slew_rate; + const struct spmi_voltage_range *range = &vreg->set_points->range[0]; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); + if (ret) { + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); + return ret; + } + + delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; + delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; + + /* slew_rate has units of uV/us */ + slew_rate = clock_rate * range->step_uV; + slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay); + slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM; + slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN; + + /* Ensure that the slew rate is greater than 0 */ + vreg->slew_rate = max(slew_rate, 1); + + return ret; +} + +static int spmi_regulator_init_slew_rate_hfsmps(struct spmi_regulator *vreg) +{ + int ret; + u8 reg = 0; + int delay; + + ret = spmi_vreg_read(vreg, SPMI_HFSMPS_REG_STEP_CTRL, ®, 1); + if (ret) { + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); + return ret; + } + + delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; + delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; + + vreg->slew_rate = SPMI_HFSMPS_SLEW_RATE_38p4 >> delay; + + return ret; +} + +static int spmi_regulator_init_registers(struct spmi_regulator *vreg, + const struct spmi_regulator_init_data *data) +{ + int ret; + enum spmi_regulator_logical_type type; + u8 ctrl_reg[8], reg, mask; + + type = vreg->logical_type; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); + if (ret) + return ret; + + /* Set up enable pin control. */ + if (!(data->pin_ctrl_enable & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { + switch (type) { + case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_LDO: + case SPMI_REGULATOR_LOGICAL_TYPE_VS: + ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= + ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; + ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= + data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; + break; + default: + break; + } + } + + /* Set up mode pin control. */ + if (!(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { + switch (type) { + case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_LDO: + ctrl_reg[SPMI_COMMON_IDX_MODE] &= + ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; + ctrl_reg[SPMI_COMMON_IDX_MODE] |= + data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_VS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO: + ctrl_reg[SPMI_COMMON_IDX_MODE] &= + ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; + ctrl_reg[SPMI_COMMON_IDX_MODE] |= + data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; + break; + default: + break; + } + } + + /* Write back any control register values that were modified. */ + ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); + if (ret) + return ret; + + /* Set soft start strength and over current protection for VS. */ + if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) { + if (data->vs_soft_start_strength + != SPMI_VS_SOFT_START_STR_HW_DEFAULT) { + reg = data->vs_soft_start_strength + & SPMI_VS_SOFT_START_SEL_MASK; + mask = SPMI_VS_SOFT_START_SEL_MASK; + return spmi_vreg_update_bits(vreg, + SPMI_VS_REG_SOFT_START, + reg, mask); + } + } + + return 0; +} + +static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg, + struct device_node *node, struct spmi_regulator_init_data *data) +{ + /* + * Initialize configuration parameters to use hardware default in case + * no value is specified via device tree. + */ + data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT; + data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT; + data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT; + + /* These bindings are optional, so it is okay if they aren't found. */ + of_property_read_u32(node, "qcom,ocp-max-retries", + &vreg->ocp_max_retries); + of_property_read_u32(node, "qcom,ocp-retry-delay", + &vreg->ocp_retry_delay_ms); + of_property_read_u32(node, "qcom,pin-ctrl-enable", + &data->pin_ctrl_enable); + of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm); + of_property_read_u32(node, "qcom,vs-soft-start-strength", + &data->vs_soft_start_strength); +} + +static unsigned int spmi_regulator_of_map_mode(unsigned int mode) +{ + if (mode == 1) + return REGULATOR_MODE_NORMAL; + if (mode == 2) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_IDLE; +} + +static int spmi_regulator_of_parse(struct device_node *node, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct spmi_regulator_init_data data = { }; + struct spmi_regulator *vreg = config->driver_data; + struct device *dev = config->dev; + int ret; + + spmi_regulator_get_dt_config(vreg, node, &data); + + if (!vreg->ocp_max_retries) + vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES; + if (!vreg->ocp_retry_delay_ms) + vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS; + + ret = spmi_regulator_init_registers(vreg, &data); + if (ret) { + dev_err(dev, "common initialization failed, ret=%d\n", ret); + return ret; + } + + switch (vreg->logical_type) { + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: + ret = spmi_regulator_init_slew_rate(vreg); + if (ret) + return ret; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426: + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, + SPMI_FTSMPS426_CLOCK_RATE); + if (ret) + return ret; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_HFS430: + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, + SPMI_HFS430_CLOCK_RATE); + if (ret) + return ret; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3: + ret = spmi_regulator_init_slew_rate_hfsmps(vreg); + if (ret) + return ret; + break; + default: + break; + } + + if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS) + vreg->ocp_irq = 0; + + if (vreg->ocp_irq) { + ret = devm_request_irq(dev, vreg->ocp_irq, + spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp", + vreg); + if (ret < 0) { + dev_err(dev, "failed to request irq %d, ret=%d\n", + vreg->ocp_irq, ret); + return ret; + } + + ret = devm_delayed_work_autocancel(dev, &vreg->ocp_work, + spmi_regulator_vs_ocp_work); + if (ret) + return ret; + } + + return 0; +} + +static const struct spmi_regulator_data pm6125_regulators[] = { + { "s1", 0x1400, "vdd_s1" }, + { "s2", 0x1700, "vdd_s2" }, + { "s3", 0x1a00, "vdd_s3" }, + { "s4", 0x1d00, "vdd_s4" }, + { "s5", 0x2000, "vdd_s5" }, + { "s6", 0x2300, "vdd_s6" }, + { "s7", 0x2600, "vdd_s7" }, + { "s8", 0x2900, "vdd_s8" }, + { "l1", 0x4000, "vdd_l1_l7_l17_l18" }, + { "l2", 0x4100, "vdd_l2_l3_l4" }, + { "l3", 0x4200, "vdd_l2_l3_l4" }, + { "l4", 0x4300, "vdd_l2_l3_l4" }, + { "l5", 0x4400, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l6", 0x4500, "vdd_l6_l8" }, + { "l7", 0x4600, "vdd_l1_l7_l17_l18" }, + { "l8", 0x4700, "vdd_l6_l8" }, + { "l9", 0x4800, "vdd_l9_l11" }, + { "l10", 0x4900, "vdd_l10_l13_l14" }, + { "l11", 0x4a00, "vdd_l9_l11" }, + { "l12", 0x4b00, "vdd_l12_l16" }, + { "l13", 0x4c00, "vdd_l10_l13_l14" }, + { "l14", 0x4d00, "vdd_l10_l13_l14" }, + { "l15", 0x4e00, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l16", 0x4f00, "vdd_l12_l16" }, + { "l17", 0x5000, "vdd_l1_l7_l17_l18" }, + { "l18", 0x5100, "vdd_l1_l7_l17_l18" }, + { "l19", 0x5200, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l20", 0x5300, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l21", 0x5400, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l22", 0x5500, "vdd_l5_l15_l19_l20_l21_l22" }, + { "l23", 0x5600, "vdd_l23_l24" }, + { "l24", 0x5700, "vdd_l23_l24" }, +}; + +static const struct spmi_regulator_data pm660_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s3", }, + { "s5", 0x2000, "vdd_s5", }, + { "s6", 0x2300, "vdd_s6", }, + { "l1", 0x4000, "vdd_l1_l6_l7", }, + { "l2", 0x4100, "vdd_l2_l3", }, + { "l3", 0x4200, "vdd_l2_l3", }, + /* l4 is unaccessible on PM660 */ + { "l5", 0x4400, "vdd_l5", }, + { "l6", 0x4500, "vdd_l1_l6_l7", }, + { "l7", 0x4600, "vdd_l1_l6_l7", }, + { "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, + { "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", }, + { "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", }, + { "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", }, + { "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", }, + { "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", }, + { } +}; + +static const struct spmi_regulator_data pm660l_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "l1", 0x4000, "vdd_l1_l9_l10", }, + { "l2", 0x4100, "vdd_l2", }, + { "l3", 0x4200, "vdd_l3_l5_l7_l8", }, + { "l4", 0x4300, "vdd_l4_l6", }, + { "l5", 0x4400, "vdd_l3_l5_l7_l8", }, + { "l6", 0x4500, "vdd_l4_l6", }, + { "l7", 0x4600, "vdd_l3_l5_l7_l8", }, + { "l8", 0x4700, "vdd_l3_l5_l7_l8", }, + { "l9", 0x4800, "vdd_l1_l9_l10", }, + { "l10", 0x4900, "vdd_l1_l9_l10", }, + { } +}; + +static const struct spmi_regulator_data pm8004_regulators[] = { + { "s2", 0x1700, "vdd_s2", }, + { "s5", 0x2000, "vdd_s5", }, + { } +}; + +static const struct spmi_regulator_data pm8005_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { } +}; + +static const struct spmi_regulator_data pm8019_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "l1", 0x4000, "vdd_l1", }, + { "l2", 0x4100, "vdd_l2_l3", }, + { "l3", 0x4200, "vdd_l2_l3", }, + { "l4", 0x4300, "vdd_l4_l5_l6", }, + { "l5", 0x4400, "vdd_l4_l5_l6", }, + { "l6", 0x4500, "vdd_l4_l5_l6", }, + { "l7", 0x4600, "vdd_l7_l8_l11", }, + { "l8", 0x4700, "vdd_l7_l8_l11", }, + { "l9", 0x4800, "vdd_l9", }, + { "l10", 0x4900, "vdd_l10", }, + { "l11", 0x4a00, "vdd_l7_l8_l11", }, + { "l12", 0x4b00, "vdd_l12", }, + { "l13", 0x4c00, "vdd_l13_l14", }, + { "l14", 0x4d00, "vdd_l13_l14", }, + { } +}; + +static const struct spmi_regulator_data pm8226_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "l1", 0x4000, "vdd_l1_l2_l4_l5", }, + { "l2", 0x4100, "vdd_l1_l2_l4_l5", }, + { "l3", 0x4200, "vdd_l3_l24_l26", }, + { "l4", 0x4300, "vdd_l1_l2_l4_l5", }, + { "l5", 0x4400, "vdd_l1_l2_l4_l5", }, + { "l6", 0x4500, "vdd_l6_l7_l8_l9_l27", }, + { "l7", 0x4600, "vdd_l6_l7_l8_l9_l27", }, + { "l8", 0x4700, "vdd_l6_l7_l8_l9_l27", }, + { "l9", 0x4800, "vdd_l6_l7_l8_l9_l27", }, + { "l10", 0x4900, "vdd_l10_l11_l13", }, + { "l11", 0x4a00, "vdd_l10_l11_l13", }, + { "l12", 0x4b00, "vdd_l12_l14", }, + { "l13", 0x4c00, "vdd_l10_l11_l13", }, + { "l14", 0x4d00, "vdd_l12_l14", }, + { "l15", 0x4e00, "vdd_l15_l16_l17_l18", }, + { "l16", 0x4f00, "vdd_l15_l16_l17_l18", }, + { "l17", 0x5000, "vdd_l15_l16_l17_l18", }, + { "l18", 0x5100, "vdd_l15_l16_l17_l18", }, + { "l19", 0x5200, "vdd_l19_l20_l21_l22_l23_l28", }, + { "l20", 0x5300, "vdd_l19_l20_l21_l22_l23_l28", }, + { "l21", 0x5400, "vdd_l19_l20_l21_l22_l23_l28", }, + { "l22", 0x5500, "vdd_l19_l20_l21_l22_l23_l28", }, + { "l23", 0x5600, "vdd_l19_l20_l21_l22_l23_l28", }, + { "l24", 0x5700, "vdd_l3_l24_l26", }, + { "l25", 0x5800, "vdd_l25", }, + { "l26", 0x5900, "vdd_l3_l24_l26", }, + { "l27", 0x5a00, "vdd_l6_l7_l8_l9_l27", }, + { "l28", 0x5b00, "vdd_l19_l20_l21_l22_l23_l28", }, + { "lvs1", 0x8000, "vdd_lvs1", }, + { } +}; + +static const struct spmi_regulator_data pm8841_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 }, + { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 }, + { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 }, + { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 }, + { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 }, + { } +}; + +static const struct spmi_regulator_data pm8909_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "l1", 0x4000, "vdd_l1", }, + { "l2", 0x4100, "vdd_l2_l5", }, + { "l3", 0x4200, "vdd_l3_l6_l10", }, + { "l4", 0x4300, "vdd_l4_l7", }, + { "l5", 0x4400, "vdd_l2_l5", }, + { "l6", 0x4500, "vdd_l3_l6_l10", }, + { "l7", 0x4600, "vdd_l4_l7", }, + { "l8", 0x4700, "vdd_l8_l11_l15_l18", }, + { "l9", 0x4800, "vdd_l9_l12_l14_l17", }, + { "l10", 0x4900, "vdd_l3_l6_l10", }, + { "l11", 0x4a00, "vdd_l8_l11_l15_l18", }, + { "l12", 0x4b00, "vdd_l9_l12_l14_l17", }, + { "l13", 0x4c00, "vdd_l13", }, + { "l14", 0x4d00, "vdd_l9_l12_l14_l17", }, + { "l15", 0x4e00, "vdd_l8_l11_l15_l18", }, + { "l17", 0x5000, "vdd_l9_l12_l14_l17", }, + { "l18", 0x5100, "vdd_l8_l11_l15_l18", }, + { } +}; + +static const struct spmi_regulator_data pm8916_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "l1", 0x4000, "vdd_l1_l3", }, + { "l2", 0x4100, "vdd_l2", }, + { "l3", 0x4200, "vdd_l1_l3", }, + { "l4", 0x4300, "vdd_l4_l5_l6", }, + { "l5", 0x4400, "vdd_l4_l5_l6", }, + { "l6", 0x4500, "vdd_l4_l5_l6", }, + { "l7", 0x4600, "vdd_l7", }, + { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", }, + { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", }, + { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", }, + { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", }, + { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", }, + { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", }, + { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", }, + { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", }, + { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, + { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, + { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, + { } +}; + +static const struct spmi_regulator_data pm8937_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "s6", 0x2300, "vdd_s6", }, + { "l1", 0x4000, "vdd_l1_l19", }, + { "l2", 0x4100, "vdd_l2_l23", }, + { "l3", 0x4200, "vdd_l3", }, + { "l4", 0x4300, "vdd_l4_l5_l6_l7_l16", }, + { "l5", 0x4400, "vdd_l4_l5_l6_l7_l16", }, + { "l6", 0x4500, "vdd_l4_l5_l6_l7_l16", }, + { "l7", 0x4600, "vdd_l4_l5_l6_l7_l16", }, + { "l8", 0x4700, "vdd_l8_l11_l12_l17_l22", }, + { "l9", 0x4800, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l10", 0x4900, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l11", 0x4a00, "vdd_l8_l11_l12_l17_l22", }, + { "l12", 0x4b00, "vdd_l8_l11_l12_l17_l22", }, + { "l13", 0x4c00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l14", 0x4d00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l15", 0x4e00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l16", 0x4f00, "vdd_l4_l5_l6_l7_l16", }, + { "l17", 0x5000, "vdd_l8_l11_l12_l17_l22", }, + { "l18", 0x5100, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l19", 0x5200, "vdd_l1_l19", }, + { "l20", 0x5300, "vdd_l20_l21", }, + { "l21", 0x5400, "vdd_l21_l21", }, + { "l22", 0x5500, "vdd_l8_l11_l12_l17_l22", }, + { "l23", 0x5600, "vdd_l2_l23", }, + { } +}; + +static const struct spmi_regulator_data pm8941_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0xa000, }, + { "l1", 0x4000, "vdd_l1_l3", }, + { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, + { "l3", 0x4200, "vdd_l1_l3", }, + { "l4", 0x4300, "vdd_l4_l11", }, + { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, + { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, + { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, + { "l8", 0x4700, "vdd_l8_l16_l18_19", }, + { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, + { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, + { "l11", 0x4a00, "vdd_l4_l11", }, + { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, + { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, + { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, + { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, + { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, + { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, + { "l18", 0x5100, "vdd_l8_l16_l18_19", }, + { "l19", 0x5200, "vdd_l8_l16_l18_19", }, + { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, + { "l21", 0x5400, "vdd_l21", }, + { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, + { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, + { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, + { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, + { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, + { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, + { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, + { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, + { } +}; + +static const struct spmi_regulator_data pm8950_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "s6", 0x2300, "vdd_s6", }, + { "l1", 0x4000, "vdd_l1_l19", }, + { "l2", 0x4100, "vdd_l2_l23", }, + { "l3", 0x4200, "vdd_l3", }, + { "l4", 0x4300, "vdd_l4_l5_l6_l7_l16", }, + { "l5", 0x4400, "vdd_l4_l5_l6_l7_l16", }, + { "l6", 0x4500, "vdd_l4_l5_l6_l7_l16", }, + { "l7", 0x4600, "vdd_l4_l5_l6_l7_l16", }, + { "l8", 0x4700, "vdd_l8_l11_l12_l17_l22", }, + { "l9", 0x4800, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l10", 0x4900, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l11", 0x4a00, "vdd_l8_l11_l12_l17_l22", }, + { "l12", 0x4b00, "vdd_l8_l11_l12_l17_l22", }, + { "l13", 0x4c00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l14", 0x4d00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l15", 0x4e00, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l16", 0x4f00, "vdd_l4_l5_l6_l7_l16", }, + { "l17", 0x5000, "vdd_l8_l11_l12_l17_l22", }, + { "l18", 0x5100, "vdd_l9_l10_l13_l14_l15_l18", }, + { "l19", 0x5200, "vdd_l1_l19", }, + { "l20", 0x5300, "vdd_l20", }, + { "l21", 0x5400, "vdd_l21", }, + { "l22", 0x5500, "vdd_l8_l11_l12_l17_l22", }, + { "l23", 0x5600, "vdd_l2_l23", }, + { } +}; + +static const struct spmi_regulator_data pm8994_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "s6", 0x2300, "vdd_s6", }, + { "s7", 0x2600, "vdd_s7", }, + { "s8", 0x2900, "vdd_s8", }, + { "s9", 0x2c00, "vdd_s9", }, + { "s10", 0x2f00, "vdd_s10", }, + { "s11", 0x3200, "vdd_s11", }, + { "s12", 0x3500, "vdd_s12", }, + { "l1", 0x4000, "vdd_l1", }, + { "l2", 0x4100, "vdd_l2_l26_l28", }, + { "l3", 0x4200, "vdd_l3_l11", }, + { "l4", 0x4300, "vdd_l4_l27_l31", }, + { "l5", 0x4400, "vdd_l5_l7", }, + { "l6", 0x4500, "vdd_l6_l12_l32", }, + { "l7", 0x4600, "vdd_l5_l7", }, + { "l8", 0x4700, "vdd_l8_l16_l30", }, + { "l9", 0x4800, "vdd_l9_l10_l18_l22", }, + { "l10", 0x4900, "vdd_l9_l10_l18_l22", }, + { "l11", 0x4a00, "vdd_l3_l11", }, + { "l12", 0x4b00, "vdd_l6_l12_l32", }, + { "l13", 0x4c00, "vdd_l13_l19_l23_l24", }, + { "l14", 0x4d00, "vdd_l14_l15", }, + { "l15", 0x4e00, "vdd_l14_l15", }, + { "l16", 0x4f00, "vdd_l8_l16_l30", }, + { "l17", 0x5000, "vdd_l17_l29", }, + { "l18", 0x5100, "vdd_l9_l10_l18_l22", }, + { "l19", 0x5200, "vdd_l13_l19_l23_l24", }, + { "l20", 0x5300, "vdd_l20_l21", }, + { "l21", 0x5400, "vdd_l20_l21", }, + { "l22", 0x5500, "vdd_l9_l10_l18_l22", }, + { "l23", 0x5600, "vdd_l13_l19_l23_l24", }, + { "l24", 0x5700, "vdd_l13_l19_l23_l24", }, + { "l25", 0x5800, "vdd_l25", }, + { "l26", 0x5900, "vdd_l2_l26_l28", }, + { "l27", 0x5a00, "vdd_l4_l27_l31", }, + { "l28", 0x5b00, "vdd_l2_l26_l28", }, + { "l29", 0x5c00, "vdd_l17_l29", }, + { "l30", 0x5d00, "vdd_l8_l16_l30", }, + { "l31", 0x5e00, "vdd_l4_l27_l31", }, + { "l32", 0x5f00, "vdd_l6_l12_l32", }, + { "lvs1", 0x8000, "vdd_lvs_1_2", }, + { "lvs2", 0x8100, "vdd_lvs_1_2", }, + { } +}; + +static const struct spmi_regulator_data pma8084_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { "s5", 0x2000, "vdd_s5", }, + { "s6", 0x2300, "vdd_s6", }, + { "s7", 0x2600, "vdd_s7", }, + { "s8", 0x2900, "vdd_s8", }, + { "s9", 0x2c00, "vdd_s9", }, + { "s10", 0x2f00, "vdd_s10", }, + { "s11", 0x3200, "vdd_s11", }, + { "s12", 0x3500, "vdd_s12", }, + { "l1", 0x4000, "vdd_l1_l11", }, + { "l2", 0x4100, "vdd_l2_l3_l4_l27", }, + { "l3", 0x4200, "vdd_l2_l3_l4_l27", }, + { "l4", 0x4300, "vdd_l2_l3_l4_l27", }, + { "l5", 0x4400, "vdd_l5_l7", }, + { "l6", 0x4500, "vdd_l6_l12_l14_l15_l26", }, + { "l7", 0x4600, "vdd_l5_l7", }, + { "l8", 0x4700, "vdd_l8", }, + { "l9", 0x4800, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l10", 0x4900, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l11", 0x4a00, "vdd_l1_l11", }, + { "l12", 0x4b00, "vdd_l6_l12_l14_l15_l26", }, + { "l13", 0x4c00, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l14", 0x4d00, "vdd_l6_l12_l14_l15_l26", }, + { "l15", 0x4e00, "vdd_l6_l12_l14_l15_l26", }, + { "l16", 0x4f00, "vdd_l16_l25", }, + { "l17", 0x5000, "vdd_l17", }, + { "l18", 0x5100, "vdd_l18", }, + { "l19", 0x5200, "vdd_l19", }, + { "l20", 0x5300, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l21", 0x5400, "vdd_l21", }, + { "l22", 0x5500, "vdd_l22", }, + { "l23", 0x5600, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l24", 0x5700, "vdd_l9_l10_l13_l20_l23_l24", }, + { "l25", 0x5800, "vdd_l16_l25", }, + { "l26", 0x5900, "vdd_l6_l12_l14_l15_l26", }, + { "l27", 0x5a00, "vdd_l2_l3_l4_l27", }, + { "lvs1", 0x8000, "vdd_lvs1_2", }, + { "lvs2", 0x8100, "vdd_lvs1_2", }, + { "lvs3", 0x8200, "vdd_lvs3_4", }, + { "lvs4", 0x8300, "vdd_lvs3_4", }, + { "5vs1", 0x8400, "vdd_5vs1", }, + { } +}; + +static const struct spmi_regulator_data pmi8994_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "l1", 0x4000, "vdd_l1", }, + { } +}; + +static const struct spmi_regulator_data pmp8074_regulators[] = { + { "s1", 0x1400, "vdd_s1"}, + { "s2", 0x1700, "vdd_s2"}, + { "s3", 0x1a00, "vdd_s3"}, + { "s4", 0x1d00, "vdd_s4"}, + { "s5", 0x2000, "vdd_s5"}, + { "l1", 0x4000, "vdd_l1_l2"}, + { "l2", 0x4100, "vdd_l1_l2"}, + { "l3", 0x4200, "vdd_l3_l8"}, + { "l4", 0x4300, "vdd_l4"}, + { "l5", 0x4400, "vdd_l5_l6_l15"}, + { "l6", 0x4500, "vdd_l5_l6_l15"}, + { "l7", 0x4600, "vdd_l7"}, + { "l8", 0x4700, "vdd_l3_l8"}, + { "l9", 0x4800, "vdd_l9"}, + /* l10 is currently unsupported HT_P50 */ + { "l11", 0x4a00, "vdd_l10_l11_l12_l13"}, + { "l12", 0x4b00, "vdd_l10_l11_l12_l13"}, + { "l13", 0x4c00, "vdd_l10_l11_l12_l13"}, + { } +}; + +static const struct spmi_regulator_data pms405_regulators[] = { + { "s3", 0x1a00, "vdd_s3"}, + { } +}; + +static const struct of_device_id qcom_spmi_regulator_match[] = { + { .compatible = "qcom,pm6125-regulators", .data = &pm6125_regulators }, + { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators }, + { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators }, + { .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators }, + { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, + { .compatible = "qcom,pm8019-regulators", .data = &pm8019_regulators }, + { .compatible = "qcom,pm8226-regulators", .data = &pm8226_regulators }, + { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, + { .compatible = "qcom,pm8909-regulators", .data = &pm8909_regulators }, + { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, + { .compatible = "qcom,pm8937-regulators", .data = &pm8937_regulators }, + { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, + { .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators }, + { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, + { .compatible = "qcom,pma8084-regulators", .data = &pma8084_regulators }, + { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, + { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators }, + { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, + { } +}; +MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); + +static int qcom_spmi_regulator_probe(struct platform_device *pdev) +{ + const struct spmi_regulator_data *reg; + const struct spmi_voltage_range *range; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct spmi_regulator *vreg; + struct regmap *regmap; + const char *name; + struct device *dev = &pdev->dev; + struct device_node *node = pdev->dev.of_node; + struct device_node *syscon, *reg_node; + struct property *reg_prop; + int ret, lenp; + struct list_head *vreg_list; + + vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL); + if (!vreg_list) + return -ENOMEM; + INIT_LIST_HEAD(vreg_list); + platform_set_drvdata(pdev, vreg_list); + + regmap = dev_get_regmap(dev->parent, NULL); + if (!regmap) + return -ENODEV; + + reg = device_get_match_data(&pdev->dev); + if (!reg) + return -ENODEV; + + syscon = of_parse_phandle(node, "qcom,saw-reg", 0); + if (syscon) { + saw_regmap = syscon_node_to_regmap(syscon); + of_node_put(syscon); + if (IS_ERR(saw_regmap)) + dev_err(dev, "ERROR reading SAW regmap\n"); + } + + for (; reg->name; reg++) { + + if (saw_regmap) { + reg_node = of_get_child_by_name(node, reg->name); + reg_prop = of_find_property(reg_node, "qcom,saw-slave", + &lenp); + of_node_put(reg_node); + if (reg_prop) + continue; + } + + vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + vreg->dev = dev; + vreg->base = reg->base; + vreg->regmap = regmap; + if (reg->ocp) { + vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp); + if (vreg->ocp_irq < 0) + return vreg->ocp_irq; + } + vreg->desc.id = -1; + vreg->desc.owner = THIS_MODULE; + vreg->desc.type = REGULATOR_VOLTAGE; + vreg->desc.enable_reg = reg->base + SPMI_COMMON_REG_ENABLE; + vreg->desc.enable_mask = SPMI_COMMON_ENABLE_MASK; + vreg->desc.enable_val = SPMI_COMMON_ENABLE; + vreg->desc.name = name = reg->name; + vreg->desc.supply_name = reg->supply; + vreg->desc.of_match = reg->name; + vreg->desc.of_parse_cb = spmi_regulator_of_parse; + vreg->desc.of_map_mode = spmi_regulator_of_map_mode; + + ret = spmi_regulator_match(vreg, reg->force_type); + if (ret) + continue; + + if (saw_regmap) { + reg_node = of_get_child_by_name(node, reg->name); + if (of_property_read_bool(reg_node, "qcom,saw-leader")) { + spmi_saw_ops = *(vreg->desc.ops); + spmi_saw_ops.set_voltage_sel = + spmi_regulator_saw_set_voltage; + vreg->desc.ops = &spmi_saw_ops; + } + of_node_put(reg_node); + } + + if (vreg->set_points && vreg->set_points->count == 1) { + /* since there is only one range */ + range = vreg->set_points->range; + vreg->desc.uV_step = range->step_uV; + } + + config.dev = dev; + config.driver_data = vreg; + config.regmap = regmap; + rdev = devm_regulator_register(dev, &vreg->desc, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "failed to register %s\n", name); + return PTR_ERR(rdev); + } + + INIT_LIST_HEAD(&vreg->node); + list_add(&vreg->node, vreg_list); + } + + return 0; +} + +static struct platform_driver qcom_spmi_regulator_driver = { + .driver = { + .name = "qcom-spmi-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = qcom_spmi_regulator_match, + }, + .probe = qcom_spmi_regulator_probe, +}; +module_platform_driver(qcom_spmi_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:qcom-spmi-regulator"); diff --git a/drivers/regulator/qcom_usb_vbus-regulator.c b/drivers/regulator/qcom_usb_vbus-regulator.c new file mode 100644 index 000000000..9aea68876 --- /dev/null +++ b/drivers/regulator/qcom_usb_vbus-regulator.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Qualcomm PMIC VBUS output regulator driver +// +// Copyright (c) 2020, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include +#include +#include +#include +#include + +#define CMD_OTG 0x40 +#define OTG_EN BIT(0) +#define OTG_CURRENT_LIMIT_CFG 0x52 +#define OTG_CURRENT_LIMIT_MASK GENMASK(2, 0) +#define OTG_CFG 0x53 +#define OTG_EN_SRC_CFG BIT(1) + +#define PM4125_VBOOST_EN 0x50 +#define PM4125_VBOOST_SEL 0x52 +#define PM4125_VBOOST_CFG_MASK GENMASK(1, 0) +#define PM4125_VBOOST_CFG 0x56 +#define PM4125_VBOOST_EN_SRC_CFG BIT(0) + +struct qcom_usb_vbus_reg_data { + u16 cmd_otg; + u16 otg_cfg; + u8 otg_en_src_cfg; + u16 csel_reg; + u8 csel_mask; + const unsigned int *curr_table; + unsigned int n_current_limits; + u16 vsel_reg; + u8 vsel_mask; + const unsigned int *volt_table; + unsigned int n_voltages; + const struct regulator_ops *ops; +}; + +static const unsigned int curr_table[] = { + 500000, 1000000, 1500000, 2000000, 2500000, 3000000, +}; + +static const unsigned int pm4125_vboost_table[] = { + 4250000, 4500000, 4750000, 5000000, +}; + +static const struct regulator_ops qcom_usb_vbus_reg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .set_current_limit = regulator_set_current_limit_regmap, +}; + +static const struct qcom_usb_vbus_reg_data pm8150b_data = { + .cmd_otg = CMD_OTG, + .otg_cfg = OTG_CFG, + .otg_en_src_cfg = OTG_EN_SRC_CFG, + .csel_reg = OTG_CURRENT_LIMIT_CFG, + .csel_mask = OTG_CURRENT_LIMIT_MASK, + .curr_table = curr_table, + .n_current_limits = ARRAY_SIZE(curr_table), + .ops = &qcom_usb_vbus_reg_ops, +}; + +static const struct regulator_ops qcom_usb_vbus_pm4125_reg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct qcom_usb_vbus_reg_data pm4125_data = { + .cmd_otg = PM4125_VBOOST_EN, + .otg_cfg = PM4125_VBOOST_CFG, + .otg_en_src_cfg = PM4125_VBOOST_EN_SRC_CFG, + .vsel_reg = PM4125_VBOOST_SEL, + .vsel_mask = PM4125_VBOOST_CFG_MASK, + .volt_table = pm4125_vboost_table, + .n_voltages = ARRAY_SIZE(pm4125_vboost_table), + .ops = &qcom_usb_vbus_pm4125_reg_ops, +}; + +static int qcom_usb_vbus_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct qcom_usb_vbus_reg_data *data; + struct regulator_dev *rdev; + struct regulator_desc *rdesc; + struct regmap *regmap; + struct regulator_config config = { }; + struct regulator_init_data *init_data; + int ret; + u32 base; + + ret = of_property_read_u32(dev->of_node, "reg", &base); + if (ret < 0) { + dev_err(dev, "no base address found\n"); + return ret; + } + + data = of_device_get_match_data(dev); + if (!data) + return -EINVAL; + + regmap = dev_get_regmap(dev->parent, NULL); + if (!regmap) { + dev_err(dev, "Failed to get regmap\n"); + return -ENOENT; + } + + rdesc = devm_kzalloc(dev, sizeof(*rdesc), GFP_KERNEL); + if (!rdesc) + return -ENOMEM; + + rdesc->name = "usb_vbus"; + rdesc->ops = data->ops; + rdesc->owner = THIS_MODULE; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->enable_reg = base + data->cmd_otg; + rdesc->enable_mask = OTG_EN; + + if (data->curr_table) { + rdesc->curr_table = data->curr_table; + rdesc->n_current_limits = data->n_current_limits; + rdesc->csel_reg = base + data->csel_reg; + rdesc->csel_mask = data->csel_mask; + } + + if (data->volt_table) { + rdesc->volt_table = data->volt_table; + rdesc->n_voltages = data->n_voltages; + rdesc->vsel_reg = base + data->vsel_reg; + rdesc->vsel_mask = data->vsel_mask; + } + + init_data = of_get_regulator_init_data(dev, dev->of_node, rdesc); + if (!init_data) + return -ENOMEM; + + config.dev = dev; + config.init_data = init_data; + config.of_node = dev->of_node; + config.regmap = regmap; + + rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "not able to register vbus reg %d\n", ret); + return ret; + } + + /* Disable HW logic for VBUS enable */ + regmap_update_bits(regmap, base + data->otg_cfg, data->otg_en_src_cfg, 0); + + return 0; +} + +static const struct of_device_id qcom_usb_vbus_regulator_match[] = { + { .compatible = "qcom,pm8150b-vbus-reg", .data = &pm8150b_data }, + { .compatible = "qcom,pm4125-vbus-reg", .data = &pm4125_data }, + { } +}; +MODULE_DEVICE_TABLE(of, qcom_usb_vbus_regulator_match); + +static struct platform_driver qcom_usb_vbus_regulator_driver = { + .driver = { + .name = "qcom-usb-vbus-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = qcom_usb_vbus_regulator_match, + }, + .probe = qcom_usb_vbus_regulator_probe, +}; +module_platform_driver(qcom_usb_vbus_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm USB vbus regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c new file mode 100644 index 000000000..6982565c8 --- /dev/null +++ b/drivers/regulator/raa215300.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Renesas RAA215300 PMIC driver +// +// Copyright (C) 2023 Renesas Electronics Corporation +// + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RAA215300_FAULT_LATCHED_STATUS_1 0x59 +#define RAA215300_FAULT_LATCHED_STATUS_2 0x5a +#define RAA215300_FAULT_LATCHED_STATUS_3 0x5b +#define RAA215300_FAULT_LATCHED_STATUS_4 0x5c +#define RAA215300_FAULT_LATCHED_STATUS_6 0x5e + +#define RAA215300_INT_MASK_1 0x64 +#define RAA215300_INT_MASK_2 0x65 +#define RAA215300_INT_MASK_3 0x66 +#define RAA215300_INT_MASK_4 0x67 +#define RAA215300_INT_MASK_6 0x68 + +#define RAA215300_REG_BLOCK_EN 0x6c +#define RAA215300_HW_REV 0xf8 + +#define RAA215300_INT_MASK_1_ALL GENMASK(5, 0) +#define RAA215300_INT_MASK_2_ALL GENMASK(3, 0) +#define RAA215300_INT_MASK_3_ALL GENMASK(5, 0) +#define RAA215300_INT_MASK_4_ALL BIT(0) +#define RAA215300_INT_MASK_6_ALL GENMASK(7, 0) + +#define RAA215300_REG_BLOCK_EN_RTC_EN BIT(6) +#define RAA215300_RTC_DEFAULT_ADDR 0x6f + +static const struct regmap_config raa215300_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xff, +}; + +static void raa215300_rtc_unregister_device(void *data) +{ + i2c_unregister_device(data); +} + +static int raa215300_clk_present(struct i2c_client *client, const char *name) +{ + struct clk *clk; + + clk = devm_clk_get_optional(&client->dev, name); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + return !!clk; +} + +static int raa215300_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + const char *clkin_name = "clkin"; + unsigned int pmic_version, val; + const char *xin_name = "xin"; + const char *clk_name = NULL; + struct regmap *regmap; + int ret; + + regmap = devm_regmap_init_i2c(client, &raa215300_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "regmap i2c init failed\n"); + + ret = regmap_read(regmap, RAA215300_HW_REV, &pmic_version); + if (ret < 0) + return dev_err_probe(dev, ret, "HW rev read failed\n"); + + dev_dbg(dev, "RAA215300 PMIC version 0x%04x\n", pmic_version); + + /* Clear all blocks except RTC, if enabled */ + regmap_read(regmap, RAA215300_REG_BLOCK_EN, &val); + val &= RAA215300_REG_BLOCK_EN_RTC_EN; + regmap_write(regmap, RAA215300_REG_BLOCK_EN, val); + + /* Clear the latched registers */ + regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_1, &val); + regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_1, val); + regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_2, &val); + regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_2, val); + regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_3, &val); + regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_3, val); + regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_4, &val); + regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_4, val); + regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_6, &val); + regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_6, val); + + /* Mask all the PMIC interrupts */ + regmap_write(regmap, RAA215300_INT_MASK_1, RAA215300_INT_MASK_1_ALL); + regmap_write(regmap, RAA215300_INT_MASK_2, RAA215300_INT_MASK_2_ALL); + regmap_write(regmap, RAA215300_INT_MASK_3, RAA215300_INT_MASK_3_ALL); + regmap_write(regmap, RAA215300_INT_MASK_4, RAA215300_INT_MASK_4_ALL); + regmap_write(regmap, RAA215300_INT_MASK_6, RAA215300_INT_MASK_6_ALL); + + ret = raa215300_clk_present(client, xin_name); + if (ret < 0) { + return ret; + } else if (ret) { + clk_name = xin_name; + } else { + ret = raa215300_clk_present(client, clkin_name); + if (ret < 0) + return ret; + if (ret) + clk_name = clkin_name; + } + + if (clk_name) { + const char *name = pmic_version >= 0x12 ? "isl1208" : "raa215300_a0"; + struct device_node *np = client->dev.of_node; + u32 addr = RAA215300_RTC_DEFAULT_ADDR; + struct i2c_board_info info = {}; + struct i2c_client *rtc_client; + struct clk_hw *hw; + ssize_t size; + + hw = devm_clk_hw_register_fixed_rate(dev, clk_name, NULL, 0, 32768); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + ret = devm_clk_hw_register_clkdev(dev, hw, clk_name, NULL); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize clkdev\n"); + + if (np) { + int i; + + i = of_property_match_string(np, "reg-names", "rtc"); + if (i >= 0) + of_property_read_u32_index(np, "reg", i, &addr); + } + + info.addr = addr; + if (client->irq > 0) + info.irq = client->irq; + + size = strscpy(info.type, name, sizeof(info.type)); + if (size < 0) + return dev_err_probe(dev, size, + "Invalid device name: %s\n", name); + + /* Enable RTC block */ + regmap_update_bits(regmap, RAA215300_REG_BLOCK_EN, + RAA215300_REG_BLOCK_EN_RTC_EN, + RAA215300_REG_BLOCK_EN_RTC_EN); + + rtc_client = i2c_new_client_device(client->adapter, &info); + if (IS_ERR(rtc_client)) + return PTR_ERR(rtc_client); + + ret = devm_add_action_or_reset(dev, + raa215300_rtc_unregister_device, + rtc_client); + if (ret < 0) + return ret; + } + + return 0; +} + +static const struct of_device_id raa215300_dt_match[] = { + { .compatible = "renesas,raa215300" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, raa215300_dt_match); + +static struct i2c_driver raa215300_i2c_driver = { + .driver = { + .name = "raa215300", + .of_match_table = raa215300_dt_match, + }, + .probe = raa215300_i2c_probe, +}; +module_i2c_driver(raa215300_i2c_driver); + +MODULE_DESCRIPTION("Renesas RAA215300 PMIC driver"); +MODULE_AUTHOR("Fabrizio Castro "); +MODULE_AUTHOR("Biju Das "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rc5t583-regulator.c b/drivers/regulator/rc5t583-regulator.c new file mode 100644 index 000000000..a25a141e8 --- /dev/null +++ b/drivers/regulator/rc5t583-regulator.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for RICOH RC5T583 power management chip. + * + * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved. + * Author: Laxman dewangan + * + * based on code + * Copyright (C) 2011 RICOH COMPANY,LTD + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct rc5t583_regulator_info { + int deepsleep_id; + + /* Regulator register address.*/ + uint8_t reg_disc_reg; + uint8_t disc_bit; + uint8_t deepsleep_reg; + + /* Regulator specific turn-on delay and voltage settling time*/ + int enable_uv_per_us; + + /* Used by regulator core */ + struct regulator_desc desc; +}; + +static int rc5t583_regulator_enable_time(struct regulator_dev *rdev) +{ + struct rc5t583_regulator_info *reg_info = rdev_get_drvdata(rdev); + int vsel = regulator_get_voltage_sel_regmap(rdev); + int curr_uV = regulator_list_voltage_linear(rdev, vsel); + + return DIV_ROUND_UP(curr_uV, reg_info->enable_uv_per_us); +} + +static const struct regulator_ops rc5t583_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .enable_time = rc5t583_regulator_enable_time, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +#define RC5T583_REG(_id, _en_reg, _en_bit, _disc_reg, _disc_bit, \ + _vout_mask, _min_mv, _max_mv, _step_uV, _enable_mv) \ +{ \ + .reg_disc_reg = RC5T583_REG_##_disc_reg, \ + .disc_bit = _disc_bit, \ + .deepsleep_reg = RC5T583_REG_##_id##DAC_DS, \ + .enable_uv_per_us = _enable_mv * 1000, \ + .deepsleep_id = RC5T583_DS_##_id, \ + .desc = { \ + .name = "rc5t583-regulator-"#_id, \ + .id = RC5T583_REGULATOR_##_id, \ + .n_voltages = (_max_mv - _min_mv) * 1000 / _step_uV + 1, \ + .ops = &rc5t583_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = RC5T583_REG_##_id##DAC, \ + .vsel_mask = _vout_mask, \ + .enable_reg = RC5T583_REG_##_en_reg, \ + .enable_mask = BIT(_en_bit), \ + .min_uV = _min_mv * 1000, \ + .uV_step = _step_uV, \ + .ramp_delay = 40 * 1000, \ + }, \ +} + +static struct rc5t583_regulator_info rc5t583_reg_info[RC5T583_REGULATOR_MAX] = { + RC5T583_REG(DC0, DC0CTL, 0, DC0CTL, 1, 0x7F, 700, 1500, 12500, 4), + RC5T583_REG(DC1, DC1CTL, 0, DC1CTL, 1, 0x7F, 700, 1500, 12500, 14), + RC5T583_REG(DC2, DC2CTL, 0, DC2CTL, 1, 0x7F, 900, 2400, 12500, 14), + RC5T583_REG(DC3, DC3CTL, 0, DC3CTL, 1, 0x7F, 900, 2400, 12500, 14), + RC5T583_REG(LDO0, LDOEN2, 0, LDODIS2, 0, 0x7F, 900, 3400, 25000, 160), + RC5T583_REG(LDO1, LDOEN2, 1, LDODIS2, 1, 0x7F, 900, 3400, 25000, 160), + RC5T583_REG(LDO2, LDOEN2, 2, LDODIS2, 2, 0x7F, 900, 3400, 25000, 160), + RC5T583_REG(LDO3, LDOEN2, 3, LDODIS2, 3, 0x7F, 900, 3400, 25000, 160), + RC5T583_REG(LDO4, LDOEN2, 4, LDODIS2, 4, 0x3F, 750, 1500, 12500, 133), + RC5T583_REG(LDO5, LDOEN2, 5, LDODIS2, 5, 0x7F, 900, 3400, 25000, 267), + RC5T583_REG(LDO6, LDOEN2, 6, LDODIS2, 6, 0x7F, 900, 3400, 25000, 133), + RC5T583_REG(LDO7, LDOEN2, 7, LDODIS2, 7, 0x7F, 900, 3400, 25000, 233), + RC5T583_REG(LDO8, LDOEN1, 0, LDODIS1, 0, 0x7F, 900, 3400, 25000, 233), + RC5T583_REG(LDO9, LDOEN1, 1, LDODIS1, 1, 0x7F, 900, 3400, 25000, 133), +}; + +static int rc5t583_regulator_probe(struct platform_device *pdev) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(pdev->dev.parent); + struct rc5t583_platform_data *pdata = dev_get_platdata(rc5t583->dev); + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct rc5t583_regulator_info *ri; + int ret; + int id; + + if (!pdata) { + dev_err(&pdev->dev, "No platform data, exiting...\n"); + return -ENODEV; + } + + for (id = 0; id < RC5T583_REGULATOR_MAX; ++id) { + ri = &rc5t583_reg_info[id]; + + if (ri->deepsleep_id == RC5T583_DS_NONE) + goto skip_ext_pwr_config; + + ret = rc5t583_ext_power_req_config(rc5t583->dev, + ri->deepsleep_id, + pdata->regulator_ext_pwr_control[id], + pdata->regulator_deepsleep_slot[id]); + /* + * Configuring external control is not a major issue, + * just give warning. + */ + if (ret < 0) + dev_warn(&pdev->dev, + "Failed to configure ext control %d\n", id); + +skip_ext_pwr_config: + config.dev = &pdev->dev; + config.init_data = pdata->reg_init_data[id]; + config.driver_data = ri; + config.regmap = rc5t583->regmap; + + rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register regulator %s\n", + ri->desc.name); + return PTR_ERR(rdev); + } + } + return 0; +} + +static struct platform_driver rc5t583_regulator_driver = { + .driver = { + .name = "rc5t583-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = rc5t583_regulator_probe, +}; + +static int __init rc5t583_regulator_init(void) +{ + return platform_driver_register(&rc5t583_regulator_driver); +} +subsys_initcall(rc5t583_regulator_init); + +static void __exit rc5t583_regulator_exit(void) +{ + platform_driver_unregister(&rc5t583_regulator_driver); +} +module_exit(rc5t583_regulator_exit); + +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_DESCRIPTION("RC5T583 regulator driver"); +MODULE_ALIAS("platform:rc5t583-regulator"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/regnl.h b/drivers/regulator/regnl.h new file mode 100644 index 000000000..bcba16cc0 --- /dev/null +++ b/drivers/regulator/regnl.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Regulator event over netlink + * + * Author: Naresh Solanki + */ + +#ifndef __REGULATOR_EVENT_H +#define __REGULATOR_EVENT_H + +int reg_generate_netlink_event(const char *reg_name, u64 event); + +#endif diff --git a/drivers/regulator/renesas-usb-vbus-regulator.c b/drivers/regulator/renesas-usb-vbus-regulator.c new file mode 100644 index 000000000..9ba791bd7 --- /dev/null +++ b/drivers/regulator/renesas-usb-vbus-regulator.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Renesas USB VBUS output regulator driver +// +// Copyright (C) 2024 Renesas Electronics Corporation +// + +#include +#include +#include +#include +#include +#include + +static const struct regulator_ops rzg2l_usb_vbus_reg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_desc rzg2l_usb_vbus_rdesc = { + .name = "vbus", + .of_match = of_match_ptr("regulator-vbus"), + .ops = &rzg2l_usb_vbus_reg_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = 0, + .enable_mask = BIT(0), + .enable_is_inverted = true, + .fixed_uV = 5000000, + .n_voltages = 1, +}; + +static int rzg2l_usb_vbus_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = { }; + struct device *dev = &pdev->dev; + struct regulator_dev *rdev; + + config.regmap = dev_get_regmap(dev->parent, NULL); + if (!config.regmap) + return dev_err_probe(dev, -ENOENT, "Failed to get regmap\n"); + + config.dev = dev; + config.of_node = of_get_child_by_name(dev->parent->of_node, "regulator-vbus"); + if (!config.of_node) + return dev_err_probe(dev, -ENODEV, "regulator node not found\n"); + + rdev = devm_regulator_register(dev, &rzg2l_usb_vbus_rdesc, &config); + of_node_put(config.of_node); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "not able to register vbus regulator\n"); + + return 0; +} + +static struct platform_driver rzg2l_usb_vbus_regulator_driver = { + .probe = rzg2l_usb_vbus_regulator_probe, + .driver = { + .name = "rzg2l-usb-vbus-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; +module_platform_driver(rzg2l_usb_vbus_regulator_driver); + +MODULE_AUTHOR("Biju Das "); +MODULE_DESCRIPTION("Renesas RZ/G2L USB Vbus Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c new file mode 100644 index 000000000..1e9561534 --- /dev/null +++ b/drivers/regulator/rk808-regulator.c @@ -0,0 +1,2205 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for Rockchip RK80x and RK81x PMIC series + * + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + * Author: Chris Zhong + * Author: Zhang Qing + * Author: Xu Shengfei + * + * Copyright (C) 2016 PHYTEC Messtechnik GmbH + * + * Author: Wadim Egorov + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Field definitions */ +#define RK801_BUCK_VSEL_MASK 0x7f +#define RK801_LDO_VSEL_MASK 0x3f + +#define RK808_BUCK_VSEL_MASK 0x3f +#define RK808_BUCK4_VSEL_MASK 0xf +#define RK808_LDO_VSEL_MASK 0x1f + +#define RK809_BUCK5_VSEL_MASK 0x7 + +#define RK817_LDO_VSEL_MASK 0x7f +#define RK817_BOOST_VSEL_MASK 0x7 +#define RK817_BUCK_VSEL_MASK 0x7f + +#define RK818_BUCK_VSEL_MASK 0x3f +#define RK818_BUCK4_VSEL_MASK 0x1f +#define RK818_LDO_VSEL_MASK 0x1f +#define RK818_LDO3_ON_VSEL_MASK 0xf +#define RK818_BOOST_ON_VSEL_MASK 0xe0 + +#define RK806_DCDC_SLP_REG_OFFSET 0x0A +#define RK806_NLDO_SLP_REG_OFFSET 0x05 +#define RK806_PLDO_SLP_REG_OFFSET 0x06 + +#define RK806_BUCK_SEL_CNT 0xff +#define RK806_LDO_SEL_CNT 0xff + +/* Ramp rate definitions for buck1 / buck2 only */ +#define RK808_RAMP_RATE_OFFSET 3 +#define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET) +#define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET) +#define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET) +#define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET) +#define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET) + +#define RK808_DVS2_POL BIT(2) +#define RK808_DVS1_POL BIT(1) + +/* Offset from XXX_ON_VSEL to XXX_SLP_VSEL */ +#define RK808_SLP_REG_OFFSET 1 + +/* Offset from XXX_ON_VSEL to XXX_DVS_VSEL */ +#define RK808_DVS_REG_OFFSET 2 + +/* Offset from XXX_EN_REG to SLEEP_SET_OFF_XXX */ +#define RK808_SLP_SET_OFF_REG_OFFSET 2 + +/* max steps for increase voltage of Buck1/2, equal 100mv*/ +#define MAX_STEPS_ONE_TIME 8 + +#define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id))) +#define DISABLE_VAL(id) (BIT(4 + (id))) + +#define RK817_BOOST_DESC(_id, _match, _supply, _min, _max, _step, _vreg,\ + _vmask, _ereg, _emask, _enval, _disval, _etime, m_drop) \ + { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ + .enable_time = (_etime), \ + .min_dropout_uV = (m_drop) * 1000, \ + .ops = &rk817_boost_ops, \ + } + +#define RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _enval, _disval, _etime, _ops) \ + { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ + .owner = THIS_MODULE, \ + .min_uV = (_min) * 1000, \ + .uV_step = (_step) * 1000, \ + .vsel_reg = (_vreg), \ + .vsel_mask = (_vmask), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ + .enable_time = (_etime), \ + .ops = _ops, \ + } + +#define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, 0, 0, _etime, &rk805_reg_ops) + +#define RK806_REGULATOR(_name, _supply_name, _id, _ops,\ + _n_voltages, _vr, _er, _lr, ctrl_bit,\ + _rr, _rm, _rt)\ +[_id] = {\ + .name = _name,\ + .supply_name = _supply_name,\ + .of_match = of_match_ptr(_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .id = _id,\ + .ops = &_ops,\ + .type = REGULATOR_VOLTAGE,\ + .n_voltages = _n_voltages,\ + .linear_ranges = _lr,\ + .n_linear_ranges = ARRAY_SIZE(_lr),\ + .vsel_reg = _vr,\ + .vsel_mask = 0xff,\ + .enable_reg = _er,\ + .enable_mask = ENABLE_MASK(ctrl_bit),\ + .enable_val = ENABLE_MASK(ctrl_bit),\ + .disable_val = DISABLE_VAL(ctrl_bit),\ + .of_map_mode = rk8xx_regulator_of_map_mode,\ + .ramp_reg = _rr,\ + .ramp_mask = _rm,\ + .ramp_delay_table = _rt, \ + .n_ramp_values = ARRAY_SIZE(_rt), \ + .owner = THIS_MODULE,\ + } + +#define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) + +#define RK801_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk801_reg_ops) + +#define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk816_reg_ops) + +#define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk817_reg_ops) + +#define RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + _enval, _disval, _ops) \ + { \ + .name = (_match), \ + .supply_name = (_supply), \ + .of_match = of_match_ptr(_match), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .id = (_id), \ + .enable_reg = (_ereg), \ + .enable_mask = (_emask), \ + .enable_val = (_enval), \ + .disable_val = (_disval), \ + .owner = THIS_MODULE, \ + .ops = _ops \ + } + +#define RK801_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ + _disval) \ + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + _emask, _disval, &rk801_switch_ops) + +#define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ + _disval) \ + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + _emask, _disval, &rk817_switch_ops) + +#define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ + 0, 0, &rk808_switch_ops) + +struct rk8xx_register_bit { + u8 reg; + u8 bit; +}; + +#define RK8XX_REG_BIT(_reg, _bit) \ + { \ + .reg = _reg, \ + .bit = BIT(_bit), \ + } + +struct rk808_regulator_data { + struct gpio_desc *dvs_gpio[2]; +}; + +static const struct linear_range rk808_ldo3_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 13, 100000), + REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0), +}; + +#define RK809_BUCK5_SEL_CNT (8) + +static const struct linear_range rk809_buck5_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(1500000, 0, 0, 0), + REGULATOR_LINEAR_RANGE(1800000, 1, 3, 200000), + REGULATOR_LINEAR_RANGE(2800000, 4, 5, 200000), + REGULATOR_LINEAR_RANGE(3300000, 6, 7, 300000), +}; + +#define RK817_BUCK1_MIN0 500000 +#define RK817_BUCK1_MAX0 1500000 + +#define RK817_BUCK1_MIN1 1600000 +#define RK817_BUCK1_MAX1 2400000 + +#define RK817_BUCK3_MAX1 3400000 + +#define RK817_BUCK1_STP0 12500 +#define RK817_BUCK1_STP1 100000 + +#define RK817_BUCK1_SEL0 ((RK817_BUCK1_MAX0 - RK817_BUCK1_MIN0) /\ + RK817_BUCK1_STP0) +#define RK817_BUCK1_SEL1 ((RK817_BUCK1_MAX1 - RK817_BUCK1_MIN1) /\ + RK817_BUCK1_STP1) + +#define RK817_BUCK3_SEL1 ((RK817_BUCK3_MAX1 - RK817_BUCK1_MIN1) /\ + RK817_BUCK1_STP1) + +#define RK817_BUCK1_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK1_SEL1 + 1) +#define RK817_BUCK3_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK3_SEL1 + 1) + +static const struct linear_range rk817_buck1_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, + RK817_BUCK1_SEL_CNT, RK817_BUCK1_STP1), +}; + +static const struct linear_range rk817_buck3_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, + RK817_BUCK3_SEL_CNT, RK817_BUCK1_STP1), +}; + +static const unsigned int rk808_buck1_2_ramp_table[] = { + 2000, 4000, 6000, 10000 +}; + +/* RK817/RK809/RK816 (buck 1/2 only) */ +static const unsigned int rk817_buck1_4_ramp_table[] = { + 3000, 6300, 12500, 25000 +}; + +static int rk806_set_mode_dcdc(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int rid = rdev_get_id(rdev); + unsigned int ctr_bit, reg; + + reg = RK806_POWER_FPWM_EN0 + rid / 8; + ctr_bit = rid % 8; + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK << ctr_bit, + FPWM_MODE << ctr_bit); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK << ctr_bit, + AUTO_PWM_MODE << ctr_bit); + default: + dev_err(rdev_get_dev(rdev), "mode unsupported: %u\n", mode); + return -EINVAL; + } + + return 0; +} + +static unsigned int rk806_get_mode_dcdc(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + int ctr_bit, reg; + unsigned int val; + int err; + + reg = RK806_POWER_FPWM_EN0 + rid / 8; + ctr_bit = rid % 8; + + err = regmap_read(rdev->regmap, reg, &val); + if (err) + return err; + + if ((val >> ctr_bit) & FPWM_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static const struct rk8xx_register_bit rk806_dcdc_rate2[] = { + RK8XX_REG_BIT(0xEB, 0), + RK8XX_REG_BIT(0xEB, 1), + RK8XX_REG_BIT(0xEB, 2), + RK8XX_REG_BIT(0xEB, 3), + RK8XX_REG_BIT(0xEB, 4), + RK8XX_REG_BIT(0xEB, 5), + RK8XX_REG_BIT(0xEB, 6), + RK8XX_REG_BIT(0xEB, 7), + RK8XX_REG_BIT(0xEA, 0), + RK8XX_REG_BIT(0xEA, 1), +}; + +static const unsigned int rk806_ramp_delay_table_dcdc[] = { + 50000, 25000, 12500, 6250, 3125, 1560, 961, 390 +}; + +static int rk806_set_ramp_delay_dcdc(struct regulator_dev *rdev, int ramp_delay) +{ + int rid = rdev_get_id(rdev); + int regval, ramp_value, ret; + + ret = regulator_find_closest_bigger(ramp_delay, rdev->desc->ramp_delay_table, + rdev->desc->n_ramp_values, &ramp_value); + if (ret) { + dev_warn(rdev_get_dev(rdev), + "Can't set ramp-delay %u, setting %u\n", ramp_delay, + rdev->desc->ramp_delay_table[ramp_value]); + } + + regval = ramp_value << (ffs(rdev->desc->ramp_mask) - 1); + + ret = regmap_update_bits(rdev->regmap, rdev->desc->ramp_reg, + rdev->desc->ramp_mask, regval); + if (ret) + return ret; + + /* + * The above is effectively a copy of regulator_set_ramp_delay_regmap(), + * but that only stores the lower 2 bits for rk806 DCDC ramp. The MSB must + * be stored in a separate register, so this open codes the implementation + * to have access to the ramp_value. + */ + + regval = (ramp_value >> 2) & 0x1 ? rk806_dcdc_rate2[rid].bit : 0; + return regmap_update_bits(rdev->regmap, rk806_dcdc_rate2[rid].reg, + rk806_dcdc_rate2[rid].bit, + regval); +} + +static const unsigned int rk806_ramp_delay_table_ldo[] = { + 100000, 50000, 25000, 12500, 6280, 3120, 1900, 780 +}; + +static int rk806_set_suspend_voltage_range(struct regulator_dev *rdev, int reg_offset, int uv) +{ + int sel = regulator_map_voltage_linear_range(rdev, uv, uv); + unsigned int reg; + + if (sel < 0) + return -EINVAL; + + reg = rdev->desc->vsel_reg + reg_offset; + + return regmap_update_bits(rdev->regmap, reg, rdev->desc->vsel_mask, sel); +} + +static int rk806_set_suspend_voltage_range_dcdc(struct regulator_dev *rdev, int uv) +{ + return rk806_set_suspend_voltage_range(rdev, RK806_DCDC_SLP_REG_OFFSET, uv); +} + +static int rk806_set_suspend_voltage_range_nldo(struct regulator_dev *rdev, int uv) +{ + return rk806_set_suspend_voltage_range(rdev, RK806_NLDO_SLP_REG_OFFSET, uv); +} + +static int rk806_set_suspend_voltage_range_pldo(struct regulator_dev *rdev, int uv) +{ + return rk806_set_suspend_voltage_range(rdev, RK806_PLDO_SLP_REG_OFFSET, uv); +} + +static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) +{ + struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct gpio_desc *gpio = pdata->dvs_gpio[id]; + unsigned int val; + int ret; + + if (!gpio || gpiod_get_value(gpio) == 0) + return regulator_get_voltage_sel_regmap(rdev); + + ret = regmap_read(rdev->regmap, + rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET, + &val); + if (ret != 0) + return ret; + + val &= rdev->desc->vsel_mask; + val >>= ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev, + unsigned sel) +{ + int ret, delta_sel; + unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask; + + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (ret != 0) + return ret; + + tmp = val & ~mask; + old_sel = val & mask; + old_sel >>= ffs(mask) - 1; + delta_sel = sel - old_sel; + + /* + * If directly modify the register to change the voltage, we will face + * the risk of overshoot. Put it into a multi-step, can effectively + * avoid this problem, a step is 100mv here. + */ + while (delta_sel > MAX_STEPS_ONE_TIME) { + old_sel += MAX_STEPS_ONE_TIME; + val = old_sel << (ffs(mask) - 1); + val |= tmp; + + /* + * i2c is 400kHz (2.5us per bit) and we must transmit _at least_ + * 3 bytes (24 bits) plus start and stop so 26 bits. So we've + * got more than 65 us between each voltage change and thus + * won't ramp faster than ~1500 uV / us. + */ + ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); + delta_sel = sel - old_sel; + } + + sel <<= ffs(mask) - 1; + val = tmp | sel; + ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); + + /* + * When we change the voltage register directly, the ramp rate is about + * 100000uv/us, wait 1us to make sure the target voltage to be stable, + * so we needn't wait extra time after that. + */ + udelay(1); + + return ret; +} + +static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev, + unsigned sel) +{ + struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct gpio_desc *gpio = pdata->dvs_gpio[id]; + unsigned int reg = rdev->desc->vsel_reg; + unsigned old_sel; + int ret, gpio_level; + + if (!gpio) + return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel); + + gpio_level = gpiod_get_value(gpio); + if (gpio_level == 0) { + reg += RK808_DVS_REG_OFFSET; + ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel); + } else { + ret = regmap_read(rdev->regmap, + reg + RK808_DVS_REG_OFFSET, + &old_sel); + } + + if (ret != 0) + return ret; + + sel <<= ffs(rdev->desc->vsel_mask) - 1; + sel |= old_sel & ~rdev->desc->vsel_mask; + + ret = regmap_write(rdev->regmap, reg, sel); + if (ret) + return ret; + + gpiod_set_value(gpio, !gpio_level); + + return ret; +} + +static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct gpio_desc *gpio = pdata->dvs_gpio[id]; + + /* if there is no dvs1/2 pin, we don't need wait extra time here. */ + if (!gpio) + return 0; + + return regulator_set_voltage_time_sel(rdev, old_selector, new_selector); +} + +static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) +{ + unsigned int reg; + int sel = regulator_map_voltage_linear(rdev, uv, uv); + + if (sel < 0) + return -EINVAL; + + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, + sel); +} + +static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) +{ + unsigned int reg; + int sel = regulator_map_voltage_linear_range(rdev, uv, uv); + int ret; + + if (sel < 0) + return -EINVAL; + + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; + + ret = regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, + sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + + return ret; +} + +static int rk805_set_suspend_enable(struct regulator_dev *rdev) +{ + unsigned int reg; + + reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->enable_mask, + rdev->desc->enable_mask); +} + +static int rk805_set_suspend_disable(struct regulator_dev *rdev) +{ + unsigned int reg; + + reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->enable_mask, + 0); +} + +static const struct rk8xx_register_bit rk806_suspend_bits[] = { + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 0), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 1), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 2), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 3), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 4), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 5), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 6), + RK8XX_REG_BIT(RK806_POWER_SLP_EN0, 7), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 6), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 7), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 0), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 1), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 2), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 3), + RK8XX_REG_BIT(RK806_POWER_SLP_EN1, 4), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 1), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 2), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 3), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 4), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 5), + RK8XX_REG_BIT(RK806_POWER_SLP_EN2, 0), +}; + +static int rk806_set_suspend_enable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk806_suspend_bits[rid].reg, + rk806_suspend_bits[rid].bit, + rk806_suspend_bits[rid].bit); +} + +static int rk806_set_suspend_disable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk806_suspend_bits[rid].reg, + rk806_suspend_bits[rid].bit, 0); +} + +static int rk808_set_suspend_enable(struct regulator_dev *rdev) +{ + unsigned int reg; + + reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->enable_mask, + 0); +} + +static int rk808_set_suspend_disable(struct regulator_dev *rdev) +{ + unsigned int reg; + + reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->enable_mask, + rdev->desc->enable_mask); +} + +static const struct rk8xx_register_bit rk816_suspend_bits[] = { + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 4), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 6), +}; + +static int rk816_set_suspend_enable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, + rk816_suspend_bits[rid].bit); +} + +static int rk816_set_suspend_disable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, 0); +} + +static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, + unsigned int en) +{ + unsigned int reg; + int id = rdev_get_id(rdev); + unsigned int id_slp, msk, val; + + if (id >= RK817_ID_DCDC1 && id <= RK817_ID_DCDC4) + id_slp = id; + else if (id >= RK817_ID_LDO1 && id <= RK817_ID_LDO8) + id_slp = 8 + (id - RK817_ID_LDO1); + else if (id >= RK817_ID_LDO9 && id <= RK809_ID_SW2) + id_slp = 4 + (id - RK817_ID_LDO9); + else + return -EINVAL; + + reg = RK817_POWER_SLP_EN_REG(id_slp / 8); + + msk = BIT(id_slp % 8); + if (en) + val = msk; + else + val = 0; + + return regmap_update_bits(rdev->regmap, reg, msk, val); +} + +static int rk817_set_suspend_enable(struct regulator_dev *rdev) +{ + return rk817_set_suspend_enable_ctrl(rdev, 1); +} + +static int rk817_set_suspend_disable(struct regulator_dev *rdev) +{ + return rk817_set_suspend_enable_ctrl(rdev, 0); +} + +static int rk8xx_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int reg; + + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK, FPWM_MODE); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, reg, + PWM_MODE_MSK, AUTO_PWM_MODE); + default: + dev_err(&rdev->dev, "do not support this mode\n"); + return -EINVAL; + } + + return 0; +} + +static int rk8xx_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + PWM_MODE_MSK, FPWM_MODE); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + PWM_MODE_MSK, AUTO_PWM_MODE); + default: + dev_err(&rdev->dev, "do not support this mode\n"); + return -EINVAL; + } + + return 0; +} + +static unsigned int rk8xx_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int err; + + err = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); + if (err) + return err; + + if (val & FPWM_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int rk8xx_is_enabled_wmsk_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); + if (ret != 0) + return ret; + + /* add write mask bit */ + val |= (rdev->desc->enable_mask & 0xf0); + val &= rdev->desc->enable_mask; + + if (rdev->desc->enable_is_inverted) { + if (rdev->desc->enable_val) + return val != rdev->desc->enable_val; + return (val == 0); + } + if (rdev->desc->enable_val) + return val == rdev->desc->enable_val; + return val != 0; +} + +static unsigned int rk8xx_regulator_of_map_mode(unsigned int mode) +{ + switch (mode) { + case 1: + return REGULATOR_MODE_FAST; + case 2: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int rk801_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int err; + + err = regmap_read(rdev->regmap, RK801_POWER_FPWM_EN_REG, &val); + if (err) + return err; + + if (val & BIT(rdev->desc->id)) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int rk801_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int offset = rdev->desc->id; + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG, + BIT(offset), RK801_FPWM_MODE << offset); + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG, + BIT(offset), RK801_AUTO_PWM_MODE << offset); + default: + dev_err(&rdev->dev, "do not support this mode\n"); + return -EINVAL; + } + + return 0; +} + +static int rk801_set_suspend_voltage(struct regulator_dev *rdev, int uv) +{ + unsigned int reg; + int sel; + + if (rdev->desc->id < RK801_ID_LDO1) + sel = regulator_map_voltage_linear_range(rdev, uv, uv); + else + sel = regulator_map_voltage_linear(rdev, uv, uv); + if (sel < 0) + return -EINVAL; + + reg = rdev->desc->vsel_reg + RK801_SLP_REG_OFFSET; + + return regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, sel); +} + +static int rk801_set_suspend_enable(struct regulator_dev *rdev) +{ + return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG, + BIT(rdev->desc->id), BIT(rdev->desc->id)); +} + +static int rk801_set_suspend_disable(struct regulator_dev *rdev) +{ + return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG, + BIT(rdev->desc->id), 0); +} + +static int rk801_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + return regulator_set_voltage_time_sel(rdev, old_selector, + new_selector) + RK801_HW_SYNC_US; +} + +static const struct regulator_ops rk801_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = rk801_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk801_set_mode, + .get_mode = rk801_get_mode, + .set_suspend_voltage = rk801_set_suspend_voltage, + .set_suspend_enable = rk801_set_suspend_enable, + .set_suspend_disable = rk801_set_suspend_disable, +}; + +static const struct regulator_ops rk801_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_voltage = rk801_set_suspend_voltage, + .set_suspend_enable = rk801_set_suspend_enable, + .set_suspend_disable = rk801_set_suspend_disable, +}; + +static const struct regulator_ops rk801_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = rk801_set_suspend_enable, + .set_suspend_disable = rk801_set_suspend_disable, +}; + +static const struct regulator_ops rk805_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk805_set_suspend_enable, + .set_suspend_disable = rk805_set_suspend_disable, +}; + +static const struct regulator_ops rk805_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = rk805_set_suspend_enable, + .set_suspend_disable = rk805_set_suspend_disable, +}; + +static const struct regulator_ops rk806_ops_dcdc = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_mode = rk806_set_mode_dcdc, + .get_mode = rk806_get_mode_dcdc, + + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + + .set_suspend_mode = rk806_set_mode_dcdc, + .set_ramp_delay = rk806_set_ramp_delay_dcdc, + + .set_suspend_voltage = rk806_set_suspend_voltage_range_dcdc, + .set_suspend_enable = rk806_set_suspend_enable, + .set_suspend_disable = rk806_set_suspend_disable, +}; + +static const struct regulator_ops rk806_ops_nldo = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + + .set_ramp_delay = regulator_set_ramp_delay_regmap, + + .set_suspend_voltage = rk806_set_suspend_voltage_range_nldo, + .set_suspend_enable = rk806_set_suspend_enable, + .set_suspend_disable = rk806_set_suspend_disable, +}; + +static const struct regulator_ops rk806_ops_pldo = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + + .set_ramp_delay = regulator_set_ramp_delay_regmap, + + .set_suspend_voltage = rk806_set_suspend_voltage_range_pldo, + .set_suspend_enable = rk806_set_suspend_enable, + .set_suspend_disable = rk806_set_suspend_disable, +}; + +static const struct regulator_ops rk808_buck1_2_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = rk808_buck1_2_get_voltage_sel_regmap, + .set_voltage_sel = rk808_buck1_2_set_voltage_sel, + .set_voltage_time_sel = rk808_buck1_2_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk808_set_suspend_enable, + .set_suspend_disable = rk808_set_suspend_disable, +}; + +static const struct regulator_ops rk808_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk808_set_suspend_enable, + .set_suspend_disable = rk808_set_suspend_disable, +}; + +static const struct regulator_ops rk808_reg_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk808_set_suspend_enable, + .set_suspend_disable = rk808_set_suspend_disable, +}; + +static const struct regulator_ops rk808_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = rk808_set_suspend_enable, + .set_suspend_disable = rk808_set_suspend_disable, +}; + +static const struct linear_range rk805_buck_1_2_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(712500, 0, 59, 12500), + REGULATOR_LINEAR_RANGE(1800000, 60, 62, 200000), + REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), +}; + +static const struct regulator_ops rk809_buck5_ops_range = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static const struct regulator_ops rk816_buck1_2_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_buck4_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk817_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static const struct regulator_ops rk817_boost_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static const struct regulator_ops rk817_buck_ops_range = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static const struct regulator_ops rk817_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_enable = rk817_set_suspend_enable, + .set_suspend_disable = rk817_set_suspend_disable, +}; + +static const struct linear_range rk801_buck1_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */ + REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */ + REGULATOR_LINEAR_RANGE(3300000, 83, 83, 0), /* 3.3v */ + REGULATOR_LINEAR_RANGE(5000000, 84, 84, 0), /* 5.0v */ + REGULATOR_LINEAR_RANGE(5250000, 85, 85, 0), /* 5.25v */ +}; + +static const struct linear_range rk801_buck2_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 2, 50000), /* 0.8v - 0.9v */ + REGULATOR_LINEAR_RANGE(1800000, 3, 4, 400000), /* 1.8v - 2.2v */ + REGULATOR_LINEAR_RANGE(3300000, 5, 5, 0), /* 3.3v */ + REGULATOR_LINEAR_RANGE(5000000, 6, 6, 0), /* 5.0v */ + REGULATOR_LINEAR_RANGE(5250000, 7, 7, 0), /* 5.25v */ +}; + +static const struct linear_range rk801_buck4_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */ + REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */ + REGULATOR_LINEAR_RANGE(2500000, 83, 83, 0), /* 2.5v */ + REGULATOR_LINEAR_RANGE(2800000, 84, 84, 0), /* 2.8v */ + REGULATOR_LINEAR_RANGE(3000000, 85, 85, 0), /* 3.0v */ + REGULATOR_LINEAR_RANGE(3300000, 86, 86, 0), /* 3.3v */ +}; + +static const struct regulator_desc rk801_reg[] = { + { + .name = "dcdc1", + .supply_name = "vcc1", + .of_match = of_match_ptr("dcdc1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK801_ID_DCDC1, + .ops = &rk801_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 86, + .linear_ranges = rk801_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk801_buck1_voltage_ranges), + .vsel_reg = RK801_BUCK1_ON_VSEL_REG, + .vsel_mask = RK801_BUCK_VSEL_MASK, + .enable_reg = RK801_POWER_EN0_REG, + .enable_mask = ENABLE_MASK(RK801_ID_DCDC1), + .enable_val = ENABLE_MASK(RK801_ID_DCDC1), + .disable_val = DISABLE_VAL(RK801_ID_DCDC1), + .ramp_delay = 1000, + .of_map_mode = rk8xx_regulator_of_map_mode, + .enable_time = 400, + .owner = THIS_MODULE, + }, { + .name = "dcdc2", + .supply_name = "vcc2", + .of_match = of_match_ptr("dcdc2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK801_ID_DCDC2, + .ops = &rk801_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 8, + .linear_ranges = rk801_buck2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk801_buck2_voltage_ranges), + .vsel_reg = RK801_BUCK2_ON_VSEL_REG, + .vsel_mask = RK801_BUCK_VSEL_MASK, + .enable_reg = RK801_POWER_EN0_REG, + .enable_mask = ENABLE_MASK(RK801_ID_DCDC2), + .enable_val = ENABLE_MASK(RK801_ID_DCDC2), + .disable_val = DISABLE_VAL(RK801_ID_DCDC2), + .ramp_delay = 1000, + .of_map_mode = rk8xx_regulator_of_map_mode, + .enable_time = 400, + .owner = THIS_MODULE, + }, { + .name = "dcdc3", + .supply_name = "vcc3", + .of_match = of_match_ptr("dcdc3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK801_ID_DCDC3, + .ops = &rk801_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK801_POWER_EN0_REG, + .enable_mask = ENABLE_MASK(RK801_ID_DCDC3), + .enable_val = ENABLE_MASK(RK801_ID_DCDC3), + .disable_val = DISABLE_VAL(RK801_ID_DCDC3), + .of_map_mode = rk8xx_regulator_of_map_mode, + .enable_time = 400, + .owner = THIS_MODULE, + }, { + .name = "dcdc4", + .supply_name = "vcc4", + .of_match = of_match_ptr("dcdc4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK801_ID_DCDC4, + .ops = &rk801_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 87, + .linear_ranges = rk801_buck4_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk801_buck4_voltage_ranges), + .vsel_reg = RK801_BUCK4_ON_VSEL_REG, + .vsel_mask = RK801_BUCK_VSEL_MASK, + .enable_reg = RK801_POWER_EN0_REG, + .enable_mask = ENABLE_MASK(RK801_ID_DCDC4), + .enable_val = ENABLE_MASK(RK801_ID_DCDC4), + .disable_val = DISABLE_VAL(RK801_ID_DCDC4), + .ramp_delay = 1000, + .of_map_mode = rk8xx_regulator_of_map_mode, + .enable_time = 400, + .owner = THIS_MODULE, + }, + + RK801_DESC(RK801_ID_LDO1, "ldo1", "vcc5", 500, 3400, 50, + RK801_LDO1_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG, + ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK801_DESC(RK801_ID_LDO2, "ldo2", "vcc6", 500, 3400, 50, + RK801_LDO2_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG, + ENABLE_MASK(1), DISABLE_VAL(1), 400), + RK801_DESC_SWITCH(RK801_ID_SWITCH, "switch", "vcc7", RK801_POWER_EN1_REG, + ENABLE_MASK(2), DISABLE_VAL(2)), +}; + +static const struct regulator_desc rk805_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK805_ID_DCDC1, + .ops = &rk808_reg_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK805_BUCK1_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .enable_reg = RK805_DCDC_EN_REG, + .enable_mask = BIT(0), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK805_ID_DCDC2, + .ops = &rk808_reg_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK805_BUCK2_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .enable_reg = RK805_DCDC_EN_REG, + .enable_mask = BIT(1), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK805_ID_DCDC3, + .ops = &rk805_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK805_DCDC_EN_REG, + .enable_mask = BIT(2), + .owner = THIS_MODULE, + }, + + RK805_DESC(RK805_ID_DCDC4, "DCDC_REG4", "vcc4", 800, 3400, 100, + RK805_BUCK4_ON_VSEL_REG, RK818_BUCK4_VSEL_MASK, + RK805_DCDC_EN_REG, BIT(3), 0), + + RK805_DESC(RK805_ID_LDO1, "LDO_REG1", "vcc5", 800, 3400, 100, + RK805_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, + BIT(0), 400), + RK805_DESC(RK805_ID_LDO2, "LDO_REG2", "vcc5", 800, 3400, 100, + RK805_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, + BIT(1), 400), + RK805_DESC(RK805_ID_LDO3, "LDO_REG3", "vcc6", 800, 3400, 100, + RK805_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG, + BIT(2), 400), +}; + +static const struct linear_range rk806_buck_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 159, 6250), /* 500mV ~ 1500mV */ + REGULATOR_LINEAR_RANGE(1500000, 160, 235, 25000), /* 1500mV ~ 3400mV */ + REGULATOR_LINEAR_RANGE(3400000, 236, 255, 0), +}; + +static const struct linear_range rk806_ldo_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 231, 12500), /* 500mV ~ 3400mV */ + REGULATOR_LINEAR_RANGE(3400000, 232, 255, 0), +}; + +static const struct regulator_desc rk806_reg[] = { + RK806_REGULATOR("dcdc-reg1", "vcc1", RK806_ID_DCDC1, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK1_ON_VSEL, + RK806_POWER_EN0, rk806_buck_voltage_ranges, 0, + RK806_BUCK1_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg2", "vcc2", RK806_ID_DCDC2, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK2_ON_VSEL, + RK806_POWER_EN0, rk806_buck_voltage_ranges, 1, + RK806_BUCK2_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg3", "vcc3", RK806_ID_DCDC3, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK3_ON_VSEL, + RK806_POWER_EN0, rk806_buck_voltage_ranges, 2, + RK806_BUCK3_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg4", "vcc4", RK806_ID_DCDC4, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK4_ON_VSEL, + RK806_POWER_EN0, rk806_buck_voltage_ranges, 3, + RK806_BUCK4_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + + RK806_REGULATOR("dcdc-reg5", "vcc5", RK806_ID_DCDC5, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK5_ON_VSEL, + RK806_POWER_EN1, rk806_buck_voltage_ranges, 0, + RK806_BUCK5_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg6", "vcc6", RK806_ID_DCDC6, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK6_ON_VSEL, + RK806_POWER_EN1, rk806_buck_voltage_ranges, 1, + RK806_BUCK6_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg7", "vcc7", RK806_ID_DCDC7, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK7_ON_VSEL, + RK806_POWER_EN1, rk806_buck_voltage_ranges, 2, + RK806_BUCK7_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg8", "vcc8", RK806_ID_DCDC8, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK8_ON_VSEL, + RK806_POWER_EN1, rk806_buck_voltage_ranges, 3, + RK806_BUCK8_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + + RK806_REGULATOR("dcdc-reg9", "vcc9", RK806_ID_DCDC9, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK9_ON_VSEL, + RK806_POWER_EN2, rk806_buck_voltage_ranges, 0, + RK806_BUCK9_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + RK806_REGULATOR("dcdc-reg10", "vcc10", RK806_ID_DCDC10, rk806_ops_dcdc, + RK806_BUCK_SEL_CNT, RK806_BUCK10_ON_VSEL, + RK806_POWER_EN2, rk806_buck_voltage_ranges, 1, + RK806_BUCK10_CONFIG, 0xc0, rk806_ramp_delay_table_dcdc), + + RK806_REGULATOR("nldo-reg1", "vcc13", RK806_ID_NLDO1, rk806_ops_nldo, + RK806_LDO_SEL_CNT, RK806_NLDO1_ON_VSEL, + RK806_POWER_EN3, rk806_ldo_voltage_ranges, 0, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("nldo-reg2", "vcc13", RK806_ID_NLDO2, rk806_ops_nldo, + RK806_LDO_SEL_CNT, RK806_NLDO2_ON_VSEL, + RK806_POWER_EN3, rk806_ldo_voltage_ranges, 1, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("nldo-reg3", "vcc13", RK806_ID_NLDO3, rk806_ops_nldo, + RK806_LDO_SEL_CNT, RK806_NLDO3_ON_VSEL, + RK806_POWER_EN3, rk806_ldo_voltage_ranges, 2, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("nldo-reg4", "vcc14", RK806_ID_NLDO4, rk806_ops_nldo, + RK806_LDO_SEL_CNT, RK806_NLDO4_ON_VSEL, + RK806_POWER_EN3, rk806_ldo_voltage_ranges, 3, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + + RK806_REGULATOR("nldo-reg5", "vcc14", RK806_ID_NLDO5, rk806_ops_nldo, + RK806_LDO_SEL_CNT, RK806_NLDO5_ON_VSEL, + RK806_POWER_EN5, rk806_ldo_voltage_ranges, 2, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + + RK806_REGULATOR("pldo-reg1", "vcc11", RK806_ID_PLDO1, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO1_ON_VSEL, + RK806_POWER_EN4, rk806_ldo_voltage_ranges, 1, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("pldo-reg2", "vcc11", RK806_ID_PLDO2, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO2_ON_VSEL, + RK806_POWER_EN4, rk806_ldo_voltage_ranges, 2, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("pldo-reg3", "vcc11", RK806_ID_PLDO3, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO3_ON_VSEL, + RK806_POWER_EN4, rk806_ldo_voltage_ranges, 3, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + + RK806_REGULATOR("pldo-reg4", "vcc12", RK806_ID_PLDO4, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO4_ON_VSEL, + RK806_POWER_EN5, rk806_ldo_voltage_ranges, 0, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + RK806_REGULATOR("pldo-reg5", "vcc12", RK806_ID_PLDO5, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO5_ON_VSEL, + RK806_POWER_EN5, rk806_ldo_voltage_ranges, 1, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), + + RK806_REGULATOR("pldo-reg6", "vcca", RK806_ID_PLDO6, rk806_ops_pldo, + RK806_LDO_SEL_CNT, RK806_PLDO6_ON_VSEL, + RK806_POWER_EN4, rk806_ldo_voltage_ranges, 0, + 0xEA, 0x38, rk806_ramp_delay_table_ldo), +}; + + +static const struct regulator_desc rk808_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK808_ID_DCDC1, + .ops = &rk808_buck1_2_ops, + .type = REGULATOR_VOLTAGE, + .min_uV = 712500, + .uV_step = 12500, + .n_voltages = 64, + .vsel_reg = RK808_BUCK1_ON_VSEL_REG, + .vsel_mask = RK808_BUCK_VSEL_MASK, + .enable_reg = RK808_DCDC_EN_REG, + .enable_mask = BIT(0), + .ramp_reg = RK808_BUCK1_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk808_buck1_2_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk808_buck1_2_ramp_table), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK808_ID_DCDC2, + .ops = &rk808_buck1_2_ops, + .type = REGULATOR_VOLTAGE, + .min_uV = 712500, + .uV_step = 12500, + .n_voltages = 64, + .vsel_reg = RK808_BUCK2_ON_VSEL_REG, + .vsel_mask = RK808_BUCK_VSEL_MASK, + .enable_reg = RK808_DCDC_EN_REG, + .enable_mask = BIT(1), + .ramp_reg = RK808_BUCK2_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk808_buck1_2_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk808_buck1_2_ramp_table), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK808_ID_DCDC3, + .ops = &rk808_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK808_DCDC_EN_REG, + .enable_mask = BIT(2), + .owner = THIS_MODULE, + }, + RK8XX_DESC(RK808_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3300, 100, + RK808_BUCK4_ON_VSEL_REG, RK808_BUCK4_VSEL_MASK, + RK808_DCDC_EN_REG, BIT(3), 0), + RK8XX_DESC(RK808_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100, + RK808_LDO1_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(0), 400), + RK8XX_DESC(RK808_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100, + RK808_LDO2_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(1), 400), + { + .name = "LDO_REG3", + .supply_name = "vcc7", + .of_match = of_match_ptr("LDO_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK808_ID_LDO3, + .ops = &rk808_reg_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 16, + .linear_ranges = rk808_ldo3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges), + .vsel_reg = RK808_LDO3_ON_VSEL_REG, + .vsel_mask = RK808_BUCK4_VSEL_MASK, + .enable_reg = RK808_LDO_EN_REG, + .enable_mask = BIT(2), + .enable_time = 400, + .owner = THIS_MODULE, + }, + RK8XX_DESC(RK808_ID_LDO4, "LDO_REG4", "vcc9", 1800, 3400, 100, + RK808_LDO4_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(3), 400), + RK8XX_DESC(RK808_ID_LDO5, "LDO_REG5", "vcc9", 1800, 3400, 100, + RK808_LDO5_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(4), 400), + RK8XX_DESC(RK808_ID_LDO6, "LDO_REG6", "vcc10", 800, 2500, 100, + RK808_LDO6_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(5), 400), + RK8XX_DESC(RK808_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100, + RK808_LDO7_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(6), 400), + RK8XX_DESC(RK808_ID_LDO8, "LDO_REG8", "vcc11", 1800, 3400, 100, + RK808_LDO8_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG, + BIT(7), 400), + RK8XX_DESC_SWITCH(RK808_ID_SWITCH1, "SWITCH_REG1", "vcc8", + RK808_DCDC_EN_REG, BIT(5)), + RK8XX_DESC_SWITCH(RK808_ID_SWITCH2, "SWITCH_REG2", "vcc12", + RK808_DCDC_EN_REG, BIT(6)), +}; + +static const struct regulator_desc rk809_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC1, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC1), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC2, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC2), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC3, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .apply_reg = RK817_POWER_CONFIG, + .apply_bit = RK817_BUCK3_FB_RES_INTER, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC3), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG4", + .supply_name = "vcc4", + .of_match = of_match_ptr("DCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC4, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK3_SEL_CNT + 1, + .linear_ranges = rk817_buck3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC4), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + { + .name = "DCDC_REG5", + .supply_name = "vcc9", + .of_match = of_match_ptr("DCDC_REG5"), + .regulators_node = of_match_ptr("regulators"), + .id = RK809_ID_DCDC5, + .ops = &rk809_buck5_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK809_BUCK5_SEL_CNT, + .linear_ranges = rk809_buck5_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk809_buck5_voltage_ranges), + .vsel_reg = RK809_BUCK5_CONFIG(0), + .vsel_mask = RK809_BUCK5_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(3), + .enable_mask = ENABLE_MASK(1), + .enable_val = ENABLE_MASK(1), + .disable_val = DISABLE_VAL(1), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc9", + RK817_POWER_EN_REG(3), ENABLE_MASK(2), + DISABLE_VAL(2)), + RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc8", + RK817_POWER_EN_REG(3), ENABLE_MASK(3), + DISABLE_VAL(3)), +}; + +static const struct linear_range rk816_buck_4_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 26, 100000), + REGULATOR_LINEAR_RANGE(3500000, 27, 31, 0), +}; + +static const struct regulator_desc rk816_reg[] = { + { + .name = "dcdc1", + .supply_name = "vcc1", + .of_match = of_match_ptr("dcdc1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC1, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK1_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(4) | BIT(0), + .enable_val = BIT(4) | BIT(0), + .disable_val = BIT(4), + .ramp_reg = RK818_BUCK1_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc2", + .supply_name = "vcc2", + .of_match = of_match_ptr("dcdc2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC2, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK2_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(5) | BIT(1), + .enable_val = BIT(5) | BIT(1), + .disable_val = BIT(5), + .ramp_reg = RK818_BUCK2_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc3", + .supply_name = "vcc3", + .of_match = of_match_ptr("dcdc3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC3, + .ops = &rk808_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(6) | BIT(2), + .enable_val = BIT(6) | BIT(2), + .disable_val = BIT(6), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "dcdc4", + .supply_name = "vcc4", + .of_match = of_match_ptr("dcdc4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC4, + .ops = &rk816_buck4_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 32, + .linear_ranges = rk816_buck_4_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk816_buck_4_voltage_ranges), + .vsel_reg = RK818_BUCK4_ON_VSEL_REG, + .vsel_mask = RK818_BUCK4_VSEL_MASK, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(7) | BIT(3), + .enable_val = BIT(7) | BIT(3), + .disable_val = BIT(7), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK816_DESC(RK816_ID_LDO1, "ldo1", "vcc5", 800, 3400, 100, + RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO2, "ldo2", "vcc5", 800, 3400, 100, + RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(1), DISABLE_VAL(1), 400), + RK816_DESC(RK816_ID_LDO3, "ldo3", "vcc5", 800, 3400, 100, + RK818_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(2), DISABLE_VAL(2), 400), + RK816_DESC(RK816_ID_LDO4, "ldo4", "vcc6", 800, 3400, 100, + RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(3), DISABLE_VAL(3), 400), + RK816_DESC(RK816_ID_LDO5, "ldo5", "vcc6", 800, 3400, 100, + RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO6, "ldo6", "vcc6", 800, 3400, 100, + RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(1), DISABLE_VAL(1), 400), +}; + +static const struct regulator_desc rk817_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC1, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC1), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC2, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC2), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC3, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK1_SEL_CNT + 1, + .linear_ranges = rk817_buck1_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC3), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG4", + .supply_name = "vcc4", + .of_match = of_match_ptr("DCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK817_ID_DCDC4, + .ops = &rk817_buck_ops_range, + .type = REGULATOR_VOLTAGE, + .n_voltages = RK817_BUCK3_SEL_CNT + 1, + .linear_ranges = rk817_buck3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, + .vsel_mask = RK817_BUCK_VSEL_MASK, + .enable_reg = RK817_POWER_EN_REG(0), + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), + .ramp_reg = RK817_BUCK_CONFIG_REG(RK817_ID_DCDC4), + .ramp_mask = RK817_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(1), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(1), + DISABLE_VAL(1), 400), + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(2), + DISABLE_VAL(2), 400), + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(2), ENABLE_MASK(3), + DISABLE_VAL(3), 400), + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(0), + DISABLE_VAL(0), 400), + RK817_BOOST_DESC(RK817_ID_BOOST, "BOOST", "vcc8", 4700, 5400, 100, + RK817_BOOST_OTG_CFG, RK817_BOOST_VSEL_MASK, + RK817_POWER_EN_REG(3), ENABLE_MASK(1), ENABLE_MASK(1), + DISABLE_VAL(1), 400, 3500 - 5400), + RK817_DESC_SWITCH(RK817_ID_BOOST_OTG_SW, "OTG_SWITCH", "vcc9", + RK817_POWER_EN_REG(3), ENABLE_MASK(2), + DISABLE_VAL(2)), +}; + +static const struct regulator_desc rk818_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK818_ID_DCDC1, + .ops = &rk808_reg_ops, + .type = REGULATOR_VOLTAGE, + .min_uV = 712500, + .uV_step = 12500, + .n_voltages = 64, + .vsel_reg = RK818_BUCK1_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .enable_reg = RK818_DCDC_EN_REG, + .enable_mask = BIT(0), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK818_ID_DCDC2, + .ops = &rk808_reg_ops, + .type = REGULATOR_VOLTAGE, + .min_uV = 712500, + .uV_step = 12500, + .n_voltages = 64, + .vsel_reg = RK818_BUCK2_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .enable_reg = RK818_DCDC_EN_REG, + .enable_mask = BIT(1), + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK818_ID_DCDC3, + .ops = &rk808_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK818_DCDC_EN_REG, + .enable_mask = BIT(2), + .owner = THIS_MODULE, + }, + RK8XX_DESC(RK818_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3600, 100, + RK818_BUCK4_ON_VSEL_REG, RK818_BUCK4_VSEL_MASK, + RK818_DCDC_EN_REG, BIT(3), 0), + RK8XX_DESC(RK818_ID_BOOST, "DCDC_BOOST", "boost", 4700, 5400, 100, + RK818_BOOST_LDO9_ON_VSEL_REG, RK818_BOOST_ON_VSEL_MASK, + RK818_DCDC_EN_REG, BIT(4), 0), + RK8XX_DESC(RK818_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100, + RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(0), 400), + RK8XX_DESC(RK818_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100, + RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(1), 400), + { + .name = "LDO_REG3", + .supply_name = "vcc7", + .of_match = of_match_ptr("LDO_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK818_ID_LDO3, + .ops = &rk808_reg_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 16, + .linear_ranges = rk808_ldo3_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges), + .vsel_reg = RK818_LDO3_ON_VSEL_REG, + .vsel_mask = RK818_LDO3_ON_VSEL_MASK, + .enable_reg = RK818_LDO_EN_REG, + .enable_mask = BIT(2), + .enable_time = 400, + .owner = THIS_MODULE, + }, + RK8XX_DESC(RK818_ID_LDO4, "LDO_REG4", "vcc8", 1800, 3400, 100, + RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(3), 400), + RK8XX_DESC(RK818_ID_LDO5, "LDO_REG5", "vcc7", 1800, 3400, 100, + RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(4), 400), + RK8XX_DESC(RK818_ID_LDO6, "LDO_REG6", "vcc8", 800, 2500, 100, + RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(5), 400), + RK8XX_DESC(RK818_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100, + RK818_LDO7_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(6), 400), + RK8XX_DESC(RK818_ID_LDO8, "LDO_REG8", "vcc8", 1800, 3400, 100, + RK818_LDO8_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG, + BIT(7), 400), + RK8XX_DESC(RK818_ID_LDO9, "LDO_REG9", "vcc9", 1800, 3400, 100, + RK818_BOOST_LDO9_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK818_DCDC_EN_REG, BIT(5), 400), + RK8XX_DESC_SWITCH(RK818_ID_SWITCH, "SWITCH_REG", "vcc9", + RK818_DCDC_EN_REG, BIT(6)), + RK8XX_DESC_SWITCH(RK818_ID_HDMI_SWITCH, "HDMI_SWITCH", "h_5v", + RK818_H5V_EN_REG, BIT(0)), + RK8XX_DESC_SWITCH(RK818_ID_OTG_SWITCH, "OTG_SWITCH", "usb", + RK818_DCDC_EN_REG, BIT(7)), +}; + +static int rk808_regulator_dt_parse_pdata(struct device *dev, struct regmap *map, + struct rk808_regulator_data *pdata) +{ + struct device_node *np; + int tmp, ret = 0, i; + + np = of_get_child_by_name(dev->of_node, "regulators"); + if (!np) + return -ENXIO; + + for (i = 0; i < ARRAY_SIZE(pdata->dvs_gpio); i++) { + pdata->dvs_gpio[i] = + devm_gpiod_get_index_optional(dev, "dvs", i, GPIOD_OUT_LOW); + if (IS_ERR(pdata->dvs_gpio[i])) { + ret = dev_err_probe(dev, PTR_ERR(pdata->dvs_gpio[i]), + "failed to get dvs%d gpio\n", i); + goto dt_parse_end; + } + + if (!pdata->dvs_gpio[i]) { + dev_dbg(dev, "there is no dvs%d gpio\n", i); + continue; + } + + tmp = i ? RK808_DVS2_POL : RK808_DVS1_POL; + ret = regmap_update_bits(map, RK808_IO_POL_REG, tmp, + gpiod_is_active_low(pdata->dvs_gpio[i]) ? 0 : tmp); + } + +dt_parse_end: + of_node_put(np); + return ret; +} + +static int rk808_regulator_probe(struct platform_device *pdev) +{ + struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rk808_rdev; + struct rk808_regulator_data *pdata; + const struct regulator_desc *regulators; + struct regmap *regmap; + int ret, i, nregulators; + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + switch (rk808->variant) { + case RK801_ID: + regulators = rk801_reg; + nregulators = RK801_NUM_REGULATORS; + break; + case RK805_ID: + regulators = rk805_reg; + nregulators = RK805_NUM_REGULATORS; + break; + case RK806_ID: + regulators = rk806_reg; + nregulators = ARRAY_SIZE(rk806_reg); + break; + case RK808_ID: + /* DVS0/1 GPIOs are supported on the RK808 only */ + ret = rk808_regulator_dt_parse_pdata(&pdev->dev, regmap, pdata); + if (ret < 0) + return ret; + + regulators = rk808_reg; + nregulators = RK808_NUM_REGULATORS; + break; + case RK809_ID: + regulators = rk809_reg; + nregulators = RK809_NUM_REGULATORS; + break; + case RK816_ID: + regulators = rk816_reg; + nregulators = ARRAY_SIZE(rk816_reg); + break; + case RK817_ID: + regulators = rk817_reg; + nregulators = RK817_NUM_REGULATORS; + break; + case RK818_ID: + regulators = rk818_reg; + nregulators = RK818_NUM_REGULATORS; + break; + default: + return dev_err_probe(&pdev->dev, -EINVAL, + "unsupported RK8xx ID %lu\n", rk808->variant); + } + + platform_set_drvdata(pdev, pdata); + + config.dev = &pdev->dev; + config.driver_data = pdata; + config.regmap = regmap; + + /* Instantiate the regulators */ + for (i = 0; i < nregulators; i++) { + rk808_rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(rk808_rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rk808_rdev), + "failed to register %d regulator\n", i); + } + + return 0; +} + +static struct platform_driver rk808_regulator_driver = { + .probe = rk808_regulator_probe, + .driver = { + .name = "rk808-regulator", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +module_platform_driver(rk808_regulator_driver); + +MODULE_DESCRIPTION("Rockchip RK80x/RK81x PMIC series regulator driver"); +MODULE_AUTHOR("Tony xie "); +MODULE_AUTHOR("Chris Zhong "); +MODULE_AUTHOR("Zhang Qing "); +MODULE_AUTHOR("Wadim Egorov "); +MODULE_AUTHOR("Xu Shengfei "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:rk808-regulator"); diff --git a/drivers/regulator/rn5t618-regulator.c b/drivers/regulator/rn5t618-regulator.c new file mode 100644 index 000000000..91808e073 --- /dev/null +++ b/drivers/regulator/rn5t618-regulator.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for Ricoh RN5T618 PMIC + * + * Copyright (C) 2014 Beniamino Galvani + */ + +#include +#include +#include +#include +#include +#include +#include + +static const struct regulator_ops rn5t618_reg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +#define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ + { \ + .name = #rid, \ + .of_match = of_match_ptr(#rid), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = RN5T618_##rid, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .ops = &rn5t618_reg_ops, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .min_uV = (min), \ + .uV_step = (step), \ + .enable_reg = RN5T618_##ereg, \ + .enable_mask = (emask), \ + .vsel_reg = RN5T618_##vreg, \ + .vsel_mask = (vmask), \ + } + +static const struct regulator_desc rn5t567_regulators[] = { + /* DCDC */ + REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500), + /* LDO */ + REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000), + REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000), + /* LDO RTC */ + REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1200000, 3500000, 25000), + REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000), +}; + +static const struct regulator_desc rn5t618_regulators[] = { + /* DCDC */ + REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500), + /* LDO */ + REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000), + REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000), + /* LDO RTC */ + REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1700000, 3500000, 25000), + REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000), +}; + +static const struct regulator_desc rc5t619_regulators[] = { + /* DCDC */ + REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500), + REG(DCDC5, DC5CTL, BIT(0), DC5DAC, 0xff, 600000, 3500000, 12500), + /* LDO */ + REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 600000, 3500000, 25000), + REG(LDO6, LDOEN1, BIT(5), LDO6DAC, 0x7f, 600000, 3500000, 25000), + REG(LDO7, LDOEN1, BIT(6), LDO7DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO8, LDOEN1, BIT(7), LDO8DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO9, LDOEN2, BIT(0), LDO9DAC, 0x7f, 900000, 3500000, 25000), + REG(LDO10, LDOEN2, BIT(1), LDO10DAC, 0x7f, 900000, 3500000, 25000), + /* LDO RTC */ + REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1700000, 3500000, 25000), + REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000), +}; + +static int rn5t618_regulator_probe(struct platform_device *pdev) +{ + struct rn5t618 *rn5t618 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + const struct regulator_desc *regulators; + int i; + int num_regulators = 0; + + switch (rn5t618->variant) { + case RN5T567: + regulators = rn5t567_regulators; + num_regulators = ARRAY_SIZE(rn5t567_regulators); + break; + case RN5T618: + regulators = rn5t618_regulators; + num_regulators = ARRAY_SIZE(rn5t618_regulators); + break; + case RC5T619: + regulators = rc5t619_regulators; + num_regulators = ARRAY_SIZE(rc5t619_regulators); + break; + default: + return -EINVAL; + } + + config.dev = pdev->dev.parent; + config.regmap = rn5t618->regmap; + + for (i = 0; i < num_regulators; i++) { + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s regulator\n", + regulators[i].name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver rn5t618_regulator_driver = { + .probe = rn5t618_regulator_probe, + .driver = { + .name = "rn5t618-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +module_platform_driver(rn5t618_regulator_driver); + +MODULE_ALIAS("platform:rn5t618-regulator"); +MODULE_AUTHOR("Beniamino Galvani "); +MODULE_DESCRIPTION("RN5T618 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rohm-regulator.c b/drivers/regulator/rohm-regulator.c new file mode 100644 index 000000000..4b95ca019 --- /dev/null +++ b/drivers/regulator/rohm-regulator.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2020 ROHM Semiconductors + +#include +#include +#include +#include +#include +#include + +static int set_dvs_level(const struct regulator_desc *desc, + struct device_node *np, struct regmap *regmap, + char *prop, unsigned int reg, unsigned int mask, + unsigned int omask, unsigned int oreg) +{ + int ret, i; + uint32_t uv; + + ret = of_property_read_u32(np, prop, &uv); + if (ret) { + if (ret != -EINVAL) + return ret; + return 0; + } + /* If voltage is set to 0 => disable */ + if (uv == 0) { + if (omask) + return regmap_update_bits(regmap, oreg, omask, 0); + } + /* Some setups don't allow setting own voltage but do allow enabling */ + if (!mask) { + if (omask) + return regmap_update_bits(regmap, oreg, omask, omask); + + return -EINVAL; + } + for (i = 0; i < desc->n_voltages; i++) { + /* NOTE to next hacker - Does not support pickable ranges */ + if (desc->linear_range_selectors_bitfield) + return -EINVAL; + if (desc->n_linear_ranges) + ret = regulator_desc_list_voltage_linear_range(desc, i); + else + ret = regulator_desc_list_voltage_linear(desc, i); + if (ret < 0) + continue; + if (ret == uv) { + i <<= ffs(desc->vsel_mask) - 1; + + ret = regmap_update_bits(regmap, reg, mask, i); + if (omask && !ret) + ret = regmap_update_bits(regmap, oreg, omask, + omask); + break; + } + } + if (i == desc->n_voltages) + pr_warn("Unsupported %s voltage %u\n", prop, uv); + + return ret; +} + +int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, + struct device_node *np, + const struct regulator_desc *desc, + struct regmap *regmap) +{ + int i, ret = 0; + char *prop; + unsigned int reg, mask, omask, oreg = desc->enable_reg; + + for (i = 0; i < ROHM_DVS_LEVEL_VALID_AMOUNT && !ret; i++) { + int bit; + + bit = BIT(i); + if (dvs->level_map & bit) { + switch (bit) { + case ROHM_DVS_LEVEL_RUN: + prop = "rohm,dvs-run-voltage"; + reg = dvs->run_reg; + mask = dvs->run_mask; + omask = dvs->run_on_mask; + break; + case ROHM_DVS_LEVEL_IDLE: + prop = "rohm,dvs-idle-voltage"; + reg = dvs->idle_reg; + mask = dvs->idle_mask; + omask = dvs->idle_on_mask; + break; + case ROHM_DVS_LEVEL_SUSPEND: + prop = "rohm,dvs-suspend-voltage"; + reg = dvs->suspend_reg; + mask = dvs->suspend_mask; + omask = dvs->suspend_on_mask; + break; + case ROHM_DVS_LEVEL_LPSR: + prop = "rohm,dvs-lpsr-voltage"; + reg = dvs->lpsr_reg; + mask = dvs->lpsr_mask; + omask = dvs->lpsr_on_mask; + break; + case ROHM_DVS_LEVEL_SNVS: + prop = "rohm,dvs-snvs-voltage"; + reg = dvs->snvs_reg; + mask = dvs->snvs_mask; + omask = dvs->snvs_on_mask; + break; + default: + return -EINVAL; + } + ret = set_dvs_level(desc, np, regmap, prop, reg, mask, + omask, oreg); + } + } + return ret; +} +EXPORT_SYMBOL(rohm_regulator_set_dvs_levels); + +/* + * Few ROHM PMIC ICs have constrains on voltage changing: + * BD71837 - only buck 1-4 voltages can be changed when they are enabled. + * Other bucks and all LDOs must be disabled when voltage is changed. + * BD96801 - LDO voltage levels can be changed when LDOs are disabled. + */ +int rohm_regulator_set_voltage_sel_restricted(struct regulator_dev *rdev, + unsigned int sel) +{ + if (rdev->desc->ops->is_enabled(rdev)) + return -EBUSY; + + return regulator_set_voltage_sel_regmap(rdev, sel); +} +EXPORT_SYMBOL_GPL(rohm_regulator_set_voltage_sel_restricted); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("Generic helpers for ROHM PMIC regulator drivers"); diff --git a/drivers/regulator/rpi-panel-attiny-regulator.c b/drivers/regulator/rpi-panel-attiny-regulator.c new file mode 100644 index 000000000..3020839b9 --- /dev/null +++ b/drivers/regulator/rpi-panel-attiny-regulator.c @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Marek Vasut + * + * Based on rpi_touchscreen.c by Eric Anholt + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers of the Atmel microcontroller. */ +#define REG_ID 0x80 +#define REG_PORTA 0x81 +#define REG_PORTB 0x82 +#define REG_PORTC 0x83 +#define REG_POWERON 0x85 +#define REG_PWM 0x86 +#define REG_ADDR_L 0x8c +#define REG_ADDR_H 0x8d +#define REG_WRITE_DATA_H 0x90 +#define REG_WRITE_DATA_L 0x91 + +#define PA_LCD_DITHB BIT(0) +#define PA_LCD_MODE BIT(1) +#define PA_LCD_LR BIT(2) +#define PA_LCD_UD BIT(3) + +#define PB_BRIDGE_PWRDNX_N BIT(0) +#define PB_LCD_VCC_N BIT(1) +#define PB_LCD_MAIN BIT(7) + +#define PC_LED_EN BIT(0) +#define PC_RST_TP_N BIT(1) +#define PC_RST_LCD_N BIT(2) +#define PC_RST_BRIDGE_N BIT(3) + +enum gpio_signals { + RST_BRIDGE_N, /* TC358762 bridge reset */ + RST_TP_N, /* Touch controller reset */ + NUM_GPIO +}; + +struct gpio_signal_mappings { + unsigned int reg; + unsigned int mask; +}; + +static const struct gpio_signal_mappings mappings[NUM_GPIO] = { + [RST_BRIDGE_N] = { REG_PORTC, PC_RST_BRIDGE_N | PC_RST_LCD_N }, + [RST_TP_N] = { REG_PORTC, PC_RST_TP_N }, +}; + +struct attiny_lcd { + /* lock to serialise overall accesses to the Atmel */ + struct mutex lock; + struct regmap *regmap; + bool gpio_states[NUM_GPIO]; + u8 port_states[3]; + + struct gpio_chip gc; +}; + +static const struct regmap_config attiny_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .disable_locking = 1, + .max_register = REG_WRITE_DATA_L, + .cache_type = REGCACHE_MAPLE, +}; + +static int attiny_set_port_state(struct attiny_lcd *state, int reg, u8 val) +{ + state->port_states[reg - REG_PORTA] = val; + return regmap_write(state->regmap, reg, val); +}; + +static u8 attiny_get_port_state(struct attiny_lcd *state, int reg) +{ + return state->port_states[reg - REG_PORTA]; +}; + +static int attiny_lcd_power_enable(struct regulator_dev *rdev) +{ + struct attiny_lcd *state = rdev_get_drvdata(rdev); + + guard(mutex)(&state->lock); + + /* Ensure bridge, and tp stay in reset */ + attiny_set_port_state(state, REG_PORTC, 0); + usleep_range(5000, 10000); + + /* Default to the same orientation as the closed source + * firmware used for the panel. Runtime rotation + * configuration will be supported using VC4's plane + * orientation bits. + */ + attiny_set_port_state(state, REG_PORTA, PA_LCD_LR); + usleep_range(5000, 10000); + /* Main regulator on, and power to the panel (LCD_VCC_N) */ + attiny_set_port_state(state, REG_PORTB, PB_LCD_MAIN); + usleep_range(5000, 10000); + /* Bring controllers out of reset */ + attiny_set_port_state(state, REG_PORTC, PC_LED_EN); + + msleep(80); + + return 0; +} + +static int attiny_lcd_power_disable(struct regulator_dev *rdev) +{ + struct attiny_lcd *state = rdev_get_drvdata(rdev); + + guard(mutex)(&state->lock); + + regmap_write(rdev->regmap, REG_PWM, 0); + usleep_range(5000, 10000); + + attiny_set_port_state(state, REG_PORTA, 0); + usleep_range(5000, 10000); + attiny_set_port_state(state, REG_PORTB, PB_LCD_VCC_N); + usleep_range(5000, 10000); + attiny_set_port_state(state, REG_PORTC, 0); + msleep(30); + + return 0; +} + +static int attiny_lcd_power_is_enabled(struct regulator_dev *rdev) +{ + struct attiny_lcd *state = rdev_get_drvdata(rdev); + unsigned int data; + int ret = 0, i; + + scoped_guard(mutex, &state->lock) { + for (i = 0; i < 10; i++) { + ret = regmap_read(rdev->regmap, REG_PORTC, &data); + if (!ret) + break; + usleep_range(10000, 12000); + } + } + + if (ret < 0) + return ret; + + return data & PC_RST_BRIDGE_N; +} + +static const struct regulator_init_data attiny_regulator_default = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + +static const struct regulator_ops attiny_regulator_ops = { + .enable = attiny_lcd_power_enable, + .disable = attiny_lcd_power_disable, + .is_enabled = attiny_lcd_power_is_enabled, +}; + +static const struct regulator_desc attiny_regulator = { + .name = "tc358762-power", + .ops = &attiny_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}; + +static int attiny_update_status(struct backlight_device *bl) +{ + struct attiny_lcd *state = bl_get_data(bl); + struct regmap *regmap = state->regmap; + int brightness = backlight_get_brightness(bl); + int ret, i; + + guard(mutex)(&state->lock); + + for (i = 0; i < 10; i++) { + ret = regmap_write(regmap, REG_PWM, brightness); + if (!ret) + break; + } + + return ret; +} + +static const struct backlight_ops attiny_bl = { + .update_status = attiny_update_status, +}; + +static int attiny_gpio_get_direction(struct gpio_chip *gc, unsigned int off) +{ + return GPIO_LINE_DIRECTION_OUT; +} + +static int attiny_gpio_set(struct gpio_chip *gc, unsigned int off, int val) +{ + struct attiny_lcd *state = gpiochip_get_data(gc); + u8 last_val; + + guard(mutex)(&state->lock); + + last_val = attiny_get_port_state(state, mappings[off].reg); + if (val) + last_val |= mappings[off].mask; + else + last_val &= ~mappings[off].mask; + + attiny_set_port_state(state, mappings[off].reg, last_val); + + if (off == RST_BRIDGE_N && val) { + usleep_range(5000, 8000); + regmap_write(state->regmap, REG_ADDR_H, 0x04); + usleep_range(5000, 8000); + regmap_write(state->regmap, REG_ADDR_L, 0x7c); + usleep_range(5000, 8000); + regmap_write(state->regmap, REG_WRITE_DATA_H, 0x00); + usleep_range(5000, 8000); + regmap_write(state->regmap, REG_WRITE_DATA_L, 0x00); + + msleep(100); + } + + return 0; +} + +static int attiny_i2c_read(struct i2c_client *client, u8 reg, unsigned int *buf) +{ + struct i2c_msg msgs[1]; + u8 addr_buf[1] = { reg }; + u8 data_buf[1] = { 0, }; + int ret; + + /* Write register address */ + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = ARRAY_SIZE(addr_buf); + msgs[0].buf = addr_buf; + + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + usleep_range(5000, 10000); + + /* Read data from register */ + msgs[0].addr = client->addr; + msgs[0].flags = I2C_M_RD; + msgs[0].len = 1; + msgs[0].buf = data_buf; + + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + *buf = data_buf[0]; + return 0; +} + +/* + * I2C driver interface functions + */ +static int attiny_i2c_probe(struct i2c_client *i2c) +{ + struct backlight_properties props = { }; + struct regulator_config config = { }; + struct backlight_device *bl; + struct regulator_dev *rdev; + struct attiny_lcd *state; + struct regmap *regmap; + unsigned int data; + int ret; + + state = devm_kzalloc(&i2c->dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + ret = devm_mutex_init(&i2c->dev, &state->lock); + if (ret) + return ret; + + i2c_set_clientdata(i2c, state); + + regmap = devm_regmap_init_i2c(i2c, &attiny_regmap_config); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + ret = attiny_i2c_read(i2c, REG_ID, &data); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read REG_ID reg: %d\n", ret); + return ret; + } + + switch (data) { + case 0xde: /* ver 1 */ + case 0xc3: /* ver 2 */ + break; + default: + dev_err(&i2c->dev, "Unknown Atmel firmware revision: 0x%02x\n", data); + return -ENODEV; + } + + regmap_write(regmap, REG_POWERON, 0); + msleep(30); + regmap_write(regmap, REG_PWM, 0); + + config.dev = &i2c->dev; + config.regmap = regmap; + config.of_node = i2c->dev.of_node; + config.init_data = &attiny_regulator_default; + config.driver_data = state; + + rdev = devm_regulator_register(&i2c->dev, &attiny_regulator, &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register ATTINY regulator\n"); + return PTR_ERR(rdev); + } + + props.type = BACKLIGHT_RAW; + props.max_brightness = 0xff; + + state->regmap = regmap; + + bl = devm_backlight_device_register(&i2c->dev, dev_name(&i2c->dev), + &i2c->dev, state, &attiny_bl, + &props); + if (IS_ERR(bl)) + return PTR_ERR(bl); + + bl->props.brightness = 0xff; + + state->gc.parent = &i2c->dev; + state->gc.label = i2c->name; + state->gc.owner = THIS_MODULE; + state->gc.base = -1; + state->gc.ngpio = NUM_GPIO; + + state->gc.set = attiny_gpio_set; + state->gc.get_direction = attiny_gpio_get_direction; + state->gc.can_sleep = true; + + ret = devm_gpiochip_add_data(&i2c->dev, &state->gc, state); + if (ret) + dev_err(&i2c->dev, "Failed to create gpiochip: %d\n", ret); + + return ret; +} + +static const struct of_device_id attiny_dt_ids[] = { + { .compatible = "raspberrypi,7inch-touchscreen-panel-regulator" }, + {}, +}; +MODULE_DEVICE_TABLE(of, attiny_dt_ids); + +static struct i2c_driver attiny_regulator_driver = { + .driver = { + .name = "rpi_touchscreen_attiny", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = attiny_dt_ids, + }, + .probe = attiny_i2c_probe, +}; + +module_i2c_driver(attiny_regulator_driver); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("Regulator device driver for Raspberry Pi 7-inch touchscreen"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rpi-panel-v2-regulator.c b/drivers/regulator/rpi-panel-v2-regulator.c new file mode 100644 index 000000000..30b78aa75 --- /dev/null +++ b/drivers/regulator/rpi-panel-v2-regulator.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Raspberry Pi Ltd. + * Copyright (C) 2025 Marek Vasut + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers of the microcontroller. */ +#define REG_ID 0x01 +#define REG_POWERON 0x02 +#define REG_PWM 0x03 + +/* Bits for poweron register */ +#define LCD_RESET_BIT BIT(0) +#define CTP_RESET_BIT BIT(1) + +/* Bits for the PWM register */ +#define PWM_BL_ENABLE BIT(7) +#define PWM_BL_MASK GENMASK(4, 0) + +/* Treat LCD_RESET and CTP_RESET as GPIOs */ +#define NUM_GPIO 2 + +static const struct regmap_config rpi_panel_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = REG_PWM, + .can_sleep = true, +}; + +static int rpi_panel_v2_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct regmap *regmap = pwmchip_get_drvdata(chip); + unsigned int duty; + + if (state->polarity != PWM_POLARITY_NORMAL) + return -EINVAL; + + if (!state->enabled) + return regmap_write(regmap, REG_PWM, 0); + + duty = pwm_get_relative_duty_cycle(state, PWM_BL_MASK); + return regmap_write(regmap, REG_PWM, duty | PWM_BL_ENABLE); +} + +static const struct pwm_ops rpi_panel_v2_pwm_ops = { + .apply = rpi_panel_v2_pwm_apply, +}; + +/* + * I2C driver interface functions + */ +static int rpi_panel_v2_i2c_probe(struct i2c_client *i2c) +{ + struct gpio_regmap_config gconfig = { + .ngpio = NUM_GPIO, + .ngpio_per_reg = NUM_GPIO, + .parent = &i2c->dev, + .reg_set_base = REG_POWERON, + }; + struct regmap *regmap; + struct pwm_chip *pc; + int ret; + + pc = devm_pwmchip_alloc(&i2c->dev, 1, 0); + if (IS_ERR(pc)) + return PTR_ERR(pc); + + pc->ops = &rpi_panel_v2_pwm_ops; + + regmap = devm_regmap_init_i2c(i2c, &rpi_panel_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(regmap), "Failed to allocate regmap\n"); + + pwmchip_set_drvdata(pc, regmap); + + regmap_write(regmap, REG_POWERON, 0); + + gconfig.regmap = regmap; + ret = PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&i2c->dev, &gconfig)); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to create gpiochip\n"); + + i2c_set_clientdata(i2c, regmap); + + return devm_pwmchip_add(&i2c->dev, pc); +} + +static void rpi_panel_v2_i2c_shutdown(struct i2c_client *client) +{ + struct regmap *regmap = i2c_get_clientdata(client); + + regmap_write(regmap, REG_PWM, 0); + regmap_write(regmap, REG_POWERON, 0); +} + +static const struct of_device_id rpi_panel_v2_dt_ids[] = { + { .compatible = "raspberrypi,touchscreen-panel-regulator-v2" }, + { }, +}; +MODULE_DEVICE_TABLE(of, rpi_panel_v2_dt_ids); + +static struct i2c_driver rpi_panel_v2_regulator_driver = { + .driver = { + .name = "rpi_touchscreen_v2", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rpi_panel_v2_dt_ids, + }, + .probe = rpi_panel_v2_i2c_probe, + .shutdown = rpi_panel_v2_i2c_shutdown, +}; + +module_i2c_driver(rpi_panel_v2_regulator_driver); + +MODULE_AUTHOR("Dave Stevenson "); +MODULE_DESCRIPTION("Regulator device driver for Raspberry Pi 7-inch V2 touchscreen"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rt4801-regulator.c b/drivers/regulator/rt4801-regulator.c new file mode 100644 index 000000000..4955bfea4 --- /dev/null +++ b/drivers/regulator/rt4801-regulator.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include + +#define RT4801_REG_VOP 0x00 +#define RT4801_REG_VON 0x01 +#define RT4801_REG_APPS 0x03 + +#define VOUT_MASK 0x1F + +#define MIN_UV 4000000 +#define STEP_UV 100000 +#define MAX_UV 6000000 +#define N_VOLTAGES ((MAX_UV - MIN_UV) / STEP_UV + 1) + +#define DSV_OUT_POS 0 +#define DSV_OUT_NEG 1 +#define DSV_OUT_MAX 2 + +#define DSVP_ENABLE BIT(0) +#define DSVN_ENABLE BIT(1) +#define DSVALL_ENABLE (DSVP_ENABLE | DSVN_ENABLE) + +struct rt4801_priv { + struct device *dev; + struct gpio_desc *enable_gpios[DSV_OUT_MAX]; + unsigned int enable_flag; + unsigned int volt_sel[DSV_OUT_MAX]; +}; + +static int rt4801_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct rt4801_priv *priv = config->driver_data; + int id = desc->id; + + if (priv->enable_gpios[id]) { + dev_warn(priv->dev, "duplicated enable-gpios property\n"); + return 0; + } + priv->enable_gpios[id] = devm_fwnode_gpiod_get_index(priv->dev, + of_fwnode_handle(np), + "enable", 0, + GPIOD_OUT_HIGH, + "rt4801"); + if (IS_ERR(priv->enable_gpios[id])) + priv->enable_gpios[id] = NULL; + + return 0; +} + +static int rt4801_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector) +{ + struct rt4801_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev), ret; + + if (priv->enable_flag & BIT(id)) { + ret = regulator_set_voltage_sel_regmap(rdev, selector); + if (ret) + return ret; + } + + priv->volt_sel[id] = selector; + return 0; +} + +static int rt4801_get_voltage_sel(struct regulator_dev *rdev) +{ + struct rt4801_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + if (priv->enable_flag & BIT(id)) + return regulator_get_voltage_sel_regmap(rdev); + + return priv->volt_sel[id]; +} + +static int rt4801_enable(struct regulator_dev *rdev) +{ + struct rt4801_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev), ret; + + if (!priv->enable_gpios[id]) { + dev_warn(&rdev->dev, "no dedicated gpio can control\n"); + goto bypass_gpio; + } + + gpiod_set_value(priv->enable_gpios[id], 1); + +bypass_gpio: + ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, priv->volt_sel[id]); + if (ret) + return ret; + + priv->enable_flag |= BIT(id); + return 0; +} + +static int rt4801_disable(struct regulator_dev *rdev) +{ + struct rt4801_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + if (!priv->enable_gpios[id]) { + dev_warn(&rdev->dev, "no dedicated gpio can control\n"); + goto bypass_gpio; + } + + gpiod_set_value(priv->enable_gpios[id], 0); + +bypass_gpio: + priv->enable_flag &= ~BIT(id); + return 0; +} + +static int rt4801_is_enabled(struct regulator_dev *rdev) +{ + struct rt4801_priv *priv = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + + return !!(priv->enable_flag & BIT(id)); +} + +static const struct regulator_ops rt4801_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = rt4801_set_voltage_sel, + .get_voltage_sel = rt4801_get_voltage_sel, + .enable = rt4801_enable, + .disable = rt4801_disable, + .is_enabled = rt4801_is_enabled, +}; + +static const struct regulator_desc rt4801_regulator_descs[] = { + { + .name = "DSVP", + .ops = &rt4801_regulator_ops, + .of_match = of_match_ptr("DSVP"), + .of_parse_cb = rt4801_of_parse_cb, + .type = REGULATOR_VOLTAGE, + .id = DSV_OUT_POS, + .min_uV = MIN_UV, + .uV_step = STEP_UV, + .n_voltages = N_VOLTAGES, + .owner = THIS_MODULE, + .vsel_reg = RT4801_REG_VOP, + .vsel_mask = VOUT_MASK, + }, + { + .name = "DSVN", + .ops = &rt4801_regulator_ops, + .of_match = of_match_ptr("DSVN"), + .of_parse_cb = rt4801_of_parse_cb, + .type = REGULATOR_VOLTAGE, + .id = DSV_OUT_NEG, + .min_uV = MIN_UV, + .uV_step = STEP_UV, + .n_voltages = N_VOLTAGES, + .owner = THIS_MODULE, + .vsel_reg = RT4801_REG_VON, + .vsel_mask = VOUT_MASK, + }, +}; + +static const struct regmap_config rt4801_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT4801_REG_APPS, +}; + +static int rt4801_probe(struct i2c_client *i2c) +{ + struct rt4801_priv *priv; + struct regmap *regmap; + int i; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &i2c->dev; + /* bootloader will on, driver only reconfigure enable to all output high */ + priv->enable_flag = DSVALL_ENABLE; + + regmap = devm_regmap_init_i2c(i2c, &rt4801_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&i2c->dev, "Failed to init regmap\n"); + return PTR_ERR(regmap); + } + + for (i = 0; i < DSV_OUT_MAX; i++) { + priv->enable_gpios[i] = devm_gpiod_get_index_optional(&i2c->dev, + "enable", + i, + GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpios[i])) { + dev_err(&i2c->dev, "Failed to get gpios\n"); + return PTR_ERR(priv->enable_gpios[i]); + } + } + + for (i = 0; i < DSV_OUT_MAX; i++) { + const struct regulator_desc *desc = rt4801_regulator_descs + i; + struct regulator_config config = { .dev = &i2c->dev, .driver_data = priv, + .regmap = regmap, }; + struct regulator_dev *rdev; + unsigned int val; + int ret; + + /* initialize volt_sel variable */ + ret = regmap_read(regmap, desc->vsel_reg, &val); + if (ret) + return ret; + + priv->volt_sel[i] = val & desc->vsel_mask; + + rdev = devm_regulator_register(&i2c->dev, desc, &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register [%d] regulator\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id __maybe_unused rt4801_of_id[] = { + { .compatible = "richtek,rt4801", }, + { }, +}; +MODULE_DEVICE_TABLE(of, rt4801_of_id); + +static struct i2c_driver rt4801_driver = { + .driver = { + .name = "rt4801", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(rt4801_of_id), + }, + .probe = rt4801_probe, +}; +module_i2c_driver(rt4801_driver); + +MODULE_AUTHOR("ChiYuan Hwang "); +MODULE_DESCRIPTION("Richtek RT4801 Display Bias Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt4803.c b/drivers/regulator/rt4803.c new file mode 100644 index 000000000..34cd3f249 --- /dev/null +++ b/drivers/regulator/rt4803.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Richtek Technology Corp. + * + * Author: ChiYuan Huang + */ + +#include +#include +#include +#include +#include +#include +#include + +#define RT4803_AUTO_MODE 1 +#define RT4803_FPWM_MODE 2 + +#define RT4803_REG_CONFIG 0x01 +#define RT4803_REG_VSELL 0x02 +#define RT4803_REG_VSELH 0x03 +#define RT4803_REG_ILIM 0x04 +#define RT4803_REG_STAT 0x05 + +#define RT4803_MODE_MASK GENMASK(1, 0) +#define RT4803_VSEL_MASK GENMASK(4, 0) +#define RT4803_ILIM_MASK GENMASK(3, 0) +#define RT4803_TSD_MASK BIT(7) +#define RT4803_HOTDIE_MASK BIT(6) +#define RT4803_FAULT_MASK BIT(1) +#define RT4803_PGOOD_MASK BIT(0) + +#define RT4803_VOUT_MINUV 2850000 +#define RT4803_VOUT_STEPUV 50000 +#define RT4803_VOUT_NUM 32 + +static int rt4803_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int modeval; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + modeval = RT4803_AUTO_MODE; + break; + case REGULATOR_MODE_FAST: + modeval = RT4803_FPWM_MODE; + break; + default: + return -EINVAL; + } + + modeval <<= ffs(RT4803_MODE_MASK) - 1; + + return regmap_update_bits(regmap, RT4803_REG_CONFIG, RT4803_MODE_MASK, modeval); +} + +static unsigned int rt4803_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int modeval; + int ret; + + ret = regmap_read(regmap, RT4803_REG_CONFIG, &modeval); + if (ret) + return REGULATOR_MODE_INVALID; + + modeval >>= ffs(RT4803_MODE_MASK) - 1; + + switch (modeval) { + case RT4803_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RT4803_FPWM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int rt4803_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int state, events = 0; + int ret; + + ret = regmap_read(regmap, RT4803_REG_STAT, &state); + if (ret) + return ret; + + if (state & RT4803_PGOOD_MASK) + goto out_error_flag; + + if (state & RT4803_FAULT_MASK) + events |= REGULATOR_ERROR_FAIL; + + if (state & RT4803_HOTDIE_MASK) + events |= REGULATOR_ERROR_OVER_TEMP_WARN; + + if (state & RT4803_TSD_MASK) + events |= REGULATOR_ERROR_OVER_TEMP; + +out_error_flag: + *flags = events; + return 0; +} + +static int rt4803_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int reg, vsel; + + if (rdev->desc->vsel_reg == RT4803_REG_VSELL) + reg = RT4803_REG_VSELH; + else + reg = RT4803_REG_VSELL; + + vsel = (uV - rdev->desc->min_uV) / rdev->desc->uV_step; + vsel <<= ffs(RT4803_VSEL_MASK) - 1; + + return regmap_update_bits(regmap, reg, RT4803_VSEL_MASK, vsel); +} + +static const struct regulator_ops rt4803_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_mode = rt4803_set_mode, + .get_mode = rt4803_get_mode, + .get_error_flags = rt4803_get_error_flags, + .set_suspend_voltage = rt4803_set_suspend_voltage, +}; + +static unsigned int rt4803_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT4803_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RT4803_FPWM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regmap_config rt4803_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT4803_REG_STAT, +}; + +static int rt4803_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regmap *regmap; + struct regulator_desc *desc; + struct regulator_config cfg = {}; + struct regulator_dev *rdev; + bool vsel_act_high; + int ret; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(i2c, &rt4803_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + /* Always configure the input current limit to max 5A at initial */ + ret = regmap_update_bits(regmap, RT4803_REG_ILIM, RT4803_ILIM_MASK, 0xff); + if (ret) + return dev_err_probe(dev, ret, "Failed to config ILIM to max\n"); + + vsel_act_high = device_property_read_bool(dev, "richtek,vsel-active-high"); + + desc->name = "rt4803-regulator"; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + desc->ops = &rt4803_regulator_ops; + desc->min_uV = RT4803_VOUT_MINUV; + desc->uV_step = RT4803_VOUT_STEPUV; + desc->n_voltages = RT4803_VOUT_NUM; + desc->vsel_mask = RT4803_VSEL_MASK; + desc->of_map_mode = rt4803_of_map_mode; + if (vsel_act_high) + desc->vsel_reg = RT4803_REG_VSELH; + else + desc->vsel_reg = RT4803_REG_VSELL; + + cfg.dev = dev; + cfg.of_node = dev_of_node(dev); + cfg.init_data = of_get_regulator_init_data(dev, dev_of_node(dev), desc); + + rdev = devm_regulator_register(dev, desc, &cfg); + return PTR_ERR_OR_ZERO(rdev); +} + +static const struct of_device_id rt4803_device_match_table[] = { + { .compatible = "richtek,rt4803" }, + {} +}; +MODULE_DEVICE_TABLE(of, rt4803_device_match_table); + +static struct i2c_driver rt4803_driver = { + .driver = { + .name = "rt4803", + .of_match_table = rt4803_device_match_table, + }, + .probe = rt4803_probe, +}; +module_i2c_driver(rt4803_driver); + +MODULE_DESCRIPTION("Richtek RT4803 voltage regulator driver"); +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rt4831-regulator.c b/drivers/regulator/rt4831-regulator.c new file mode 100644 index 000000000..5c47fd57f --- /dev/null +++ b/drivers/regulator/rt4831-regulator.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + DSV_OUT_VLCM = 0, + DSV_OUT_VPOS, + DSV_OUT_VNEG, + DSV_OUT_MAX +}; + +#define RT4831_REG_DSVEN 0x09 +#define RT4831_REG_VLCM 0x0c +#define RT4831_REG_VPOS 0x0d +#define RT4831_REG_VNEG 0x0e +#define RT4831_REG_FLAGS 0x0f + +#define RT4831_VOLT_MASK GENMASK(5, 0) +#define RT4831_DSVMODE_SHIFT 5 +#define RT4831_DSVMODE_MASK GENMASK(7, 5) +#define RT4831_POSADEN_MASK BIT(4) +#define RT4831_NEGADEN_MASK BIT(3) +#define RT4831_POSEN_MASK BIT(2) +#define RT4831_NEGEN_MASK BIT(1) + +#define RT4831_OTP_MASK BIT(6) +#define RT4831_LCMOVP_MASK BIT(5) +#define RT4831_VPOSSCP_MASK BIT(3) +#define RT4831_VNEGSCP_MASK BIT(2) + +#define DSV_MODE_NORMAL (0x4 << RT4831_DSVMODE_SHIFT) +#define DSV_MODE_BYPASS (0x6 << RT4831_DSVMODE_SHIFT) +#define STEP_UV 50000 +#define VLCM_MIN_UV 4000000 +#define VLCM_MAX_UV 7150000 +#define VLCM_N_VOLTAGES ((VLCM_MAX_UV - VLCM_MIN_UV) / STEP_UV + 1) +#define VPN_MIN_UV 4000000 +#define VPN_MAX_UV 6500000 +#define VPN_N_VOLTAGES ((VPN_MAX_UV - VPN_MIN_UV) / STEP_UV + 1) + +static int rt4831_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int val, events = 0; + int ret; + + ret = regmap_read(regmap, RT4831_REG_FLAGS, &val); + if (ret) + return ret; + + if (val & RT4831_OTP_MASK) + events |= REGULATOR_ERROR_OVER_TEMP; + + if (rid == DSV_OUT_VLCM && (val & RT4831_LCMOVP_MASK)) + events |= REGULATOR_ERROR_OVER_CURRENT; + + if (rid == DSV_OUT_VPOS && (val & RT4831_VPOSSCP_MASK)) + events |= REGULATOR_ERROR_OVER_CURRENT; + + if (rid == DSV_OUT_VNEG && (val & RT4831_VNEGSCP_MASK)) + events |= REGULATOR_ERROR_OVER_CURRENT; + + *flags = events; + return 0; +} + +static const struct regulator_ops rt4831_dsvlcm_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, + .get_error_flags = rt4831_get_error_flags, +}; + +static const struct regulator_ops rt4831_dsvpn_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = rt4831_get_error_flags, +}; + +static const struct regulator_desc rt4831_regulator_descs[] = { + { + .name = "DSVLCM", + .ops = &rt4831_dsvlcm_ops, + .of_match = of_match_ptr("DSVLCM"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .id = DSV_OUT_VLCM, + .n_voltages = VLCM_N_VOLTAGES, + .min_uV = VLCM_MIN_UV, + .uV_step = STEP_UV, + .vsel_reg = RT4831_REG_VLCM, + .vsel_mask = RT4831_VOLT_MASK, + .bypass_reg = RT4831_REG_DSVEN, + .bypass_mask = RT4831_DSVMODE_MASK, + .bypass_val_on = DSV_MODE_BYPASS, + .bypass_val_off = DSV_MODE_NORMAL, + .owner = THIS_MODULE, + }, + { + .name = "DSVP", + .ops = &rt4831_dsvpn_ops, + .of_match = of_match_ptr("DSVP"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .id = DSV_OUT_VPOS, + .n_voltages = VPN_N_VOLTAGES, + .min_uV = VPN_MIN_UV, + .uV_step = STEP_UV, + .vsel_reg = RT4831_REG_VPOS, + .vsel_mask = RT4831_VOLT_MASK, + .enable_reg = RT4831_REG_DSVEN, + .enable_mask = RT4831_POSEN_MASK, + .active_discharge_reg = RT4831_REG_DSVEN, + .active_discharge_mask = RT4831_POSADEN_MASK, + .active_discharge_on = RT4831_POSADEN_MASK, + .owner = THIS_MODULE, + }, + { + .name = "DSVN", + .ops = &rt4831_dsvpn_ops, + .of_match = of_match_ptr("DSVN"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .id = DSV_OUT_VNEG, + .n_voltages = VPN_N_VOLTAGES, + .min_uV = VPN_MIN_UV, + .uV_step = STEP_UV, + .vsel_reg = RT4831_REG_VNEG, + .vsel_mask = RT4831_VOLT_MASK, + .enable_reg = RT4831_REG_DSVEN, + .enable_mask = RT4831_NEGEN_MASK, + .active_discharge_reg = RT4831_REG_DSVEN, + .active_discharge_mask = RT4831_NEGADEN_MASK, + .active_discharge_on = RT4831_NEGADEN_MASK, + .owner = THIS_MODULE, + } +}; + +static int rt4831_regulator_probe(struct platform_device *pdev) +{ + struct regmap *regmap; + struct regulator_dev *rdev; + struct regulator_config config = {}; + int i, ret; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "Failed to init regmap\n"); + return -ENODEV; + } + + /* Configure DSV mode to normal by default */ + ret = regmap_update_bits(regmap, RT4831_REG_DSVEN, RT4831_DSVMODE_MASK, DSV_MODE_NORMAL); + if (ret) { + dev_err(&pdev->dev, "Failed to configure dsv mode to normal\n"); + return ret; + } + + config.dev = pdev->dev.parent; + config.regmap = regmap; + + for (i = 0; i < DSV_OUT_MAX; i++) { + rdev = devm_regulator_register(&pdev->dev, rt4831_regulator_descs + i, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register %d regulator\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id rt4831_regulator_match[] = { + { .name = "rt4831-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, rt4831_regulator_match); + +static struct platform_driver rt4831_regulator_driver = { + .driver = { + .name = "rt4831-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = rt4831_regulator_match, + .probe = rt4831_regulator_probe, +}; +module_platform_driver(rt4831_regulator_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT4831 DSV Regulators driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt5033-regulator.c b/drivers/regulator/rt5033-regulator.c new file mode 100644 index 000000000..3aeab9a57 --- /dev/null +++ b/drivers/regulator/rt5033-regulator.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for the Richtek RT5033 + * + * Copyright (C) 2014 Samsung Electronics, Co., Ltd. + * Author: Beomho Seo + */ + +#include +#include +#include +#include +#include +#include + +static const struct linear_range rt5033_buck_ranges[] = { + REGULATOR_LINEAR_RANGE(1000000, 0, 20, 100000), + REGULATOR_LINEAR_RANGE(3000000, 21, 31, 0), +}; + +static const struct linear_range rt5033_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 18, 100000), + REGULATOR_LINEAR_RANGE(3000000, 19, 31, 0), +}; + +static const struct regulator_ops rt5033_safe_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static const struct regulator_ops rt5033_buck_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc rt5033_supported_regulators[] = { + [RT5033_BUCK] = { + .name = "BUCK", + .of_match = of_match_ptr("BUCK"), + .regulators_node = of_match_ptr("regulators"), + .id = RT5033_BUCK, + .ops = &rt5033_buck_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM, + .linear_ranges = rt5033_buck_ranges, + .n_linear_ranges = ARRAY_SIZE(rt5033_buck_ranges), + .enable_reg = RT5033_REG_CTRL, + .enable_mask = RT5033_CTRL_EN_BUCK_MASK, + .vsel_reg = RT5033_REG_BUCK_CTRL, + .vsel_mask = RT5033_BUCK_CTRL_MASK, + }, + [RT5033_LDO] = { + .name = "LDO", + .of_match = of_match_ptr("LDO"), + .regulators_node = of_match_ptr("regulators"), + .id = RT5033_LDO, + .ops = &rt5033_buck_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM, + .linear_ranges = rt5033_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(rt5033_ldo_ranges), + .enable_reg = RT5033_REG_CTRL, + .enable_mask = RT5033_CTRL_EN_LDO_MASK, + .vsel_reg = RT5033_REG_LDO_CTRL, + .vsel_mask = RT5033_LDO_CTRL_MASK, + }, + [RT5033_SAFE_LDO] = { + .name = "SAFE_LDO", + .of_match = of_match_ptr("SAFE_LDO"), + .regulators_node = of_match_ptr("regulators"), + .id = RT5033_SAFE_LDO, + .ops = &rt5033_safe_ldo_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 1, + .min_uV = RT5033_REGULATOR_SAFE_LDO_VOLTAGE, + .enable_reg = RT5033_REG_CTRL, + .enable_mask = RT5033_CTRL_EN_SAFE_LDO_MASK, + }, +}; + +static int rt5033_regulator_probe(struct platform_device *pdev) +{ + struct rt5033_dev *rt5033 = dev_get_drvdata(pdev->dev.parent); + int ret, i; + struct regulator_config config = {}; + + config.dev = rt5033->dev; + config.driver_data = rt5033; + + for (i = 0; i < ARRAY_SIZE(rt5033_supported_regulators); i++) { + struct regulator_dev *regulator; + + config.regmap = rt5033->regmap; + + regulator = devm_regulator_register(&pdev->dev, + &rt5033_supported_regulators[i], &config); + if (IS_ERR(regulator)) { + ret = PTR_ERR(regulator); + dev_err(&pdev->dev, + "Regulator init failed %d: with error: %d\n", + i, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id rt5033_regulator_id[] = { + { .name = "rt5033-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, rt5033_regulator_id); + +static struct platform_driver rt5033_regulator_driver = { + .driver = { + .name = "rt5033-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = rt5033_regulator_probe, + .id_table = rt5033_regulator_id, +}; +module_platform_driver(rt5033_regulator_driver); + +MODULE_DESCRIPTION("Richtek RT5033 Regulator driver"); +MODULE_AUTHOR("Beomho Seo "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rt5120-regulator.c b/drivers/regulator/rt5120-regulator.c new file mode 100644 index 000000000..a2a13ce2e --- /dev/null +++ b/drivers/regulator/rt5120-regulator.c @@ -0,0 +1,421 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT5120_REG_PGSTAT 0x03 +#define RT5120_REG_CH1VID 0x06 +#define RT5120_REG_CH1SLPVID 0x07 +#define RT5120_REG_ENABLE 0x08 +#define RT5120_REG_MODECTL 0x09 +#define RT5120_REG_UVOVPROT 0x0A +#define RT5120_REG_SLPCTL 0x0C +#define RT5120_REG_INTSTAT 0x1E +#define RT5120_REG_DISCHG 0x1F + +#define RT5120_OUTPG_MASK(rid) BIT(rid + 1) +#define RT5120_OUTUV_MASK(rid) BIT(rid + 9) +#define RT5120_OUTOV_MASK(rid) BIT(rid + 16) +#define RT5120_CH1VID_MASK GENMASK(6, 0) +#define RT5120_RIDEN_MASK(rid) BIT(rid + 1) +#define RT5120_RADEN_MASK(rid) BIT(rid) +#define RT5120_FPWM_MASK(rid) BIT(rid + 1) +#define RT5120_UVHICCUP_MASK BIT(1) +#define RT5120_OVHICCUP_MASK BIT(0) +#define RT5120_HOTDIE_MASK BIT(1) + +#define RT5120_BUCK1_MINUV 600000 +#define RT5120_BUCK1_MAXUV 1393750 +#define RT5120_BUCK1_STEPUV 6250 +#define RT5120_BUCK1_NUM_VOLT 0x80 + +#define RT5120_AUTO_MODE 0 +#define RT5120_FPWM_MODE 1 + +enum { + RT5120_REGULATOR_BUCK1 = 0, + RT5120_REGULATOR_BUCK2, + RT5120_REGULATOR_BUCK3, + RT5120_REGULATOR_BUCK4, + RT5120_REGULATOR_LDO, + RT5120_REGULATOR_EXTEN, + RT5120_MAX_REGULATOR +}; + +struct rt5120_priv { + struct device *dev; + struct regmap *regmap; + struct regulator_desc rdesc[RT5120_MAX_REGULATOR]; +}; + +static int rt5120_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int mask = RT5120_FPWM_MASK(rid), val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_FAST: + val = RT5120_FPWM_MASK(rid); + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT5120_REG_MODECTL, mask, val); +} + +static unsigned int rt5120_buck_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int ret, rid = rdev_get_id(rdev); + unsigned int val; + + ret = regmap_read(regmap, RT5120_REG_MODECTL, &val); + if (ret) + return REGULATOR_MODE_INVALID; + + if (val & RT5120_FPWM_MASK(rid)) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt5120_regulator_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int stat, hd_stat, cur_flags = 0; + int rid = rdev_get_id(rdev), ret; + + /* + * reg 0x03/0x04/0x05 to indicate PG/UV/OV + * use block read to descrease I/O xfer time + */ + ret = regmap_raw_read(regmap, RT5120_REG_PGSTAT, &stat, 3); + if (ret) + return ret; + + ret = regmap_read(regmap, RT5120_REG_INTSTAT, &hd_stat); + if (ret) + return ret; + + if (!(stat & RT5120_OUTPG_MASK(rid))) { + if (stat & RT5120_OUTUV_MASK(rid)) + cur_flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (stat & RT5120_OUTOV_MASK(rid)) + cur_flags |= REGULATOR_ERROR_REGULATION_OUT; + } + + if (hd_stat & RT5120_HOTDIE_MASK) + cur_flags |= REGULATOR_ERROR_OVER_TEMP; + + *flags = cur_flags; + return 0; +} + +static int rt5120_buck1_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int sel; + + if (uV < RT5120_BUCK1_MINUV || uV > RT5120_BUCK1_MAXUV) + return -EINVAL; + + sel = (uV - RT5120_BUCK1_MINUV) / RT5120_BUCK1_STEPUV; + return regmap_write(regmap, RT5120_REG_CH1SLPVID, sel); +} + +static int rt5120_regulator_set_suspend_enable(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int mask = RT5120_RIDEN_MASK(rid); + + return regmap_update_bits(regmap, RT5120_REG_SLPCTL, mask, mask); +} + +static int rt5120_regulator_set_suspend_disable(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int mask = RT5120_RIDEN_MASK(rid); + + return regmap_update_bits(regmap, RT5120_REG_SLPCTL, mask, 0); +} + +static const struct regulator_ops rt5120_buck1_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt5120_buck_set_mode, + .get_mode = rt5120_buck_get_mode, + .get_error_flags = rt5120_regulator_get_error_flags, + .set_suspend_voltage = rt5120_buck1_set_suspend_voltage, + .set_suspend_enable = rt5120_regulator_set_suspend_enable, + .set_suspend_disable = rt5120_regulator_set_suspend_disable, +}; + +static const struct regulator_ops rt5120_buck234_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt5120_buck_set_mode, + .get_mode = rt5120_buck_get_mode, + .get_error_flags = rt5120_regulator_get_error_flags, + .set_suspend_enable = rt5120_regulator_set_suspend_enable, + .set_suspend_disable = rt5120_regulator_set_suspend_disable, +}; + +static const struct regulator_ops rt5120_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = rt5120_regulator_get_error_flags, + .set_suspend_enable = rt5120_regulator_set_suspend_enable, + .set_suspend_disable = rt5120_regulator_set_suspend_disable, +}; + +static const struct regulator_ops rt5120_exten_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = rt5120_regulator_set_suspend_enable, + .set_suspend_disable = rt5120_regulator_set_suspend_disable, +}; + +static unsigned int rt5120_buck_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT5120_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RT5120_FPWM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static void rt5120_fillin_regulator_desc(struct regulator_desc *desc, int rid) +{ + static const char * const name[] = { + "buck1", "buck2", "buck3", "buck4", "ldo", "exten" }; + static const char * const sname[] = { + "vin1", "vin2", "vin3", "vin4", "vinldo", NULL }; + + /* Common regulator property */ + desc->name = name[rid]; + desc->supply_name = sname[rid]; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->id = rid; + desc->enable_reg = RT5120_REG_ENABLE; + desc->enable_mask = RT5120_RIDEN_MASK(rid); + desc->active_discharge_reg = RT5120_REG_DISCHG; + desc->active_discharge_mask = RT5120_RADEN_MASK(rid); + desc->active_discharge_on = RT5120_RADEN_MASK(rid); + /* Config n_voltages to 1 for all*/ + desc->n_voltages = 1; + + /* Only buck support mode change */ + if (rid >= RT5120_REGULATOR_BUCK1 && rid <= RT5120_REGULATOR_BUCK4) + desc->of_map_mode = rt5120_buck_of_map_mode; + + /* RID specific property init */ + switch (rid) { + case RT5120_REGULATOR_BUCK1: + /* Only buck1 support voltage change by I2C */ + desc->n_voltages = RT5120_BUCK1_NUM_VOLT; + desc->min_uV = RT5120_BUCK1_MINUV; + desc->uV_step = RT5120_BUCK1_STEPUV; + desc->vsel_reg = RT5120_REG_CH1VID; + desc->vsel_mask = RT5120_CH1VID_MASK; + desc->ops = &rt5120_buck1_ops; + break; + case RT5120_REGULATOR_BUCK2 ... RT5120_REGULATOR_BUCK4: + desc->ops = &rt5120_buck234_ops; + break; + case RT5120_REGULATOR_LDO: + desc->ops = &rt5120_ldo_ops; + break; + default: + desc->ops = &rt5120_exten_ops; + } +} + +static int rt5120_of_parse_cb(struct rt5120_priv *priv, int rid, + struct of_regulator_match *match) +{ + struct regulator_desc *desc = priv->rdesc + rid; + struct regulator_init_data *init_data = match->init_data; + + if (!init_data || rid == RT5120_REGULATOR_BUCK1) + return 0; + + if (init_data->constraints.min_uV != init_data->constraints.max_uV) { + dev_err(priv->dev, "Variable voltage for fixed regulator\n"); + return -EINVAL; + } + + desc->fixed_uV = init_data->constraints.min_uV; + return 0; +} + +static struct of_regulator_match rt5120_regu_match[RT5120_MAX_REGULATOR] = { + [RT5120_REGULATOR_BUCK1] = { .name = "buck1", }, + [RT5120_REGULATOR_BUCK2] = { .name = "buck2", }, + [RT5120_REGULATOR_BUCK3] = { .name = "buck3", }, + [RT5120_REGULATOR_BUCK4] = { .name = "buck4", }, + [RT5120_REGULATOR_LDO] = { .name = "ldo", }, + [RT5120_REGULATOR_EXTEN] = { .name = "exten", } +}; + +static int rt5120_parse_regulator_dt_data(struct rt5120_priv *priv) +{ + struct device *dev = priv->dev->parent; + struct device_node *reg_node; + int i, ret; + + for (i = 0; i < RT5120_MAX_REGULATOR; i++) { + rt5120_fillin_regulator_desc(priv->rdesc + i, i); + + rt5120_regu_match[i].desc = priv->rdesc + i; + } + + reg_node = of_get_child_by_name(dev->of_node, "regulators"); + if (!reg_node) { + dev_err(priv->dev, "Couldn't find 'regulators' node\n"); + return -ENODEV; + } + + ret = of_regulator_match(priv->dev, reg_node, rt5120_regu_match, + ARRAY_SIZE(rt5120_regu_match)); + + of_node_put(reg_node); + + if (ret < 0) { + dev_err(priv->dev, + "Error parsing regulator init data (%d)\n", ret); + return ret; + } + + for (i = 0; i < RT5120_MAX_REGULATOR; i++) { + ret = rt5120_of_parse_cb(priv, i, rt5120_regu_match + i); + if (ret) { + dev_err(priv->dev, "Failed in [%d] of_passe_cb\n", i); + return ret; + } + } + + return 0; +} + +static int rt5120_device_property_init(struct rt5120_priv *priv) +{ + struct device *dev = priv->dev->parent; + struct device_node *np = dev->of_node; + bool prot_enable; + unsigned int prot_enable_val = 0; + + /* Assign UV/OV HW protection behavior */ + prot_enable = of_property_read_bool(np, + "richtek,enable-undervolt-hiccup"); + if (prot_enable) + prot_enable_val |= RT5120_UVHICCUP_MASK; + + prot_enable = of_property_read_bool(np, + "richtek,enable-overvolt-hiccup"); + if (prot_enable) + prot_enable_val |= RT5120_OVHICCUP_MASK; + + return regmap_update_bits(priv->regmap, RT5120_REG_UVOVPROT, + RT5120_UVHICCUP_MASK | RT5120_OVHICCUP_MASK, + prot_enable_val); +} + +static int rt5120_regulator_probe(struct platform_device *pdev) +{ + struct rt5120_priv *priv; + struct regulator_dev *rdev; + struct regulator_config config = {}; + int i, ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) { + dev_err(&pdev->dev, "Failed to init regmap\n"); + return -ENODEV; + } + + ret = rt5120_device_property_init(priv); + if (ret) { + dev_err(&pdev->dev, "Failed to do property init\n"); + return ret; + } + + ret = rt5120_parse_regulator_dt_data(priv); + if (ret) { + dev_err(&pdev->dev, "Failed to parse dt data\n"); + return ret; + } + + config.dev = &pdev->dev; + config.regmap = priv->regmap; + + for (i = 0; i < RT5120_MAX_REGULATOR; i++) { + config.of_node = rt5120_regu_match[i].of_node; + config.init_data = rt5120_regu_match[i].init_data; + + rdev = devm_regulator_register(&pdev->dev, priv->rdesc + i, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "Failed to register regulator [%d]\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id rt5120_regulator_dev_table[] = { + { .name = "rt5120-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, rt5120_regulator_dev_table); + +static struct platform_driver rt5120_regulator_driver = { + .driver = { + .name = "rt5120-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .id_table = rt5120_regulator_dev_table, + .probe = rt5120_regulator_probe, +}; +module_platform_driver(rt5120_regulator_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT5120 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt5133-regulator.c b/drivers/regulator/rt5133-regulator.c new file mode 100644 index 000000000..129b1f13c --- /dev/null +++ b/drivers/regulator/rt5133-regulator.c @@ -0,0 +1,642 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2025 Richtek Technology Corp. +// Author: ChiYuan Huang +// Author: ShihChia Chang + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT5133_REG_CHIP_INFO 0x00 +#define RT5133_REG_RST_CTRL 0x06 +#define RT5133_REG_BASE_CTRL 0x09 +#define RT5133_REG_GPIO_CTRL 0x0B +#define RT5133_REG_BASE_EVT 0x10 +#define RT5133_REG_LDO_PGB_STAT 0x15 +#define RT5133_REG_BASE_MASK 0x16 +#define RT5133_REG_LDO_SHDN 0x19 +#define RT5133_REG_LDO_ON 0x1A +#define RT5133_REG_LDO_OFF 0x1B +#define RT5133_REG_LDO1_CTRL1 0x20 +#define RT5133_REG_LDO1_CTRL2 0x21 +#define RT5133_REG_LDO1_CTRL3 0x22 +#define RT5133_REG_LDO2_CTRL1 0x24 +#define RT5133_REG_LDO2_CTRL2 0x25 +#define RT5133_REG_LDO2_CTRL3 0x26 +#define RT5133_REG_LDO3_CTRL1 0x28 +#define RT5133_REG_LDO3_CTRL2 0x29 +#define RT5133_REG_LDO3_CTRL3 0x2A +#define RT5133_REG_LDO4_CTRL1 0x2C +#define RT5133_REG_LDO4_CTRL2 0x2D +#define RT5133_REG_LDO4_CTRL3 0x2E +#define RT5133_REG_LDO5_CTRL1 0x30 +#define RT5133_REG_LDO5_CTRL2 0x31 +#define RT5133_REG_LDO5_CTRL3 0x32 +#define RT5133_REG_LDO6_CTRL1 0x34 +#define RT5133_REG_LDO6_CTRL2 0x35 +#define RT5133_REG_LDO6_CTRL3 0x36 +#define RT5133_REG_LDO7_CTRL1 0x38 +#define RT5133_REG_LDO7_CTRL2 0x39 +#define RT5133_REG_LDO7_CTRL3 0x3A +#define RT5133_REG_LDO8_CTRL1 0x3C +#define RT5133_REG_LDO8_CTRL2 0x3D +#define RT5133_REG_LDO8_CTRL3 0x3E +#define RT5133_REG_LDO8_CTRL4 0x3F + +#define RT5133_LDO_REG_BASE(_id) (0x20 + ((_id) - 1) * 4) + +#define RT5133_VENDOR_ID_MASK GENMASK(7, 4) +#define RT5133_RESET_CODE 0xB1 + +#define RT5133_FOFF_BASE_MASK BIT(1) +#define RT5133_OCSHDN_ALL_MASK BIT(7) +#define RT5133_OCSHDN_ALL_SHIFT (7) +#define RT5133_PGBSHDN_ALL_MASK BIT(6) +#define RT5133_PGBSHDN_ALL_SHIFT (6) + +#define RT5133_OCPTSEL_MASK BIT(5) +#define RT5133_PGBPTSEL_MASK BIT(4) +#define RT5133_STBTDSEL_MASK GENMASK(1, 0) + +#define RT5133_LDO_ENABLE_MASK BIT(7) +#define RT5133_LDO_VSEL_MASK GENMASK(7, 5) +#define RT5133_LDO_AD_MASK BIT(2) +#define RT5133_LDO_SOFT_START_MASK GENMASK(1, 0) + +#define RT5133_GPIO_NR 3 + +#define RT5133_LDO_PGB_EVT_MASK GENMASK(23, 16) +#define RT5133_LDO_PGB_EVT_SHIFT 16 +#define RT5133_LDO_OC_EVT_MASK GENMASK(15, 8) +#define RT5133_LDO_OC_EVT_SHIFT 8 +#define RT5133_VREF_EVT_MASK BIT(6) +#define RT5133_BASE_EVT_MASK GENMASK(7, 0) +#define RT5133_INTR_CLR_MASK GENMASK(23, 0) +#define RT5133_INTR_BYTE_NR 3 + +#define RT5133_MAX_I2C_BLOCK_SIZE 1 + +#define RT5133_CRC8_POLYNOMIAL 0x7 + +#define RT5133_I2C_ADDR_LEN 1 +#define RT5133_PREDATA_LEN 2 +#define RT5133_I2C_CRC_LEN 1 +#define RT5133_REG_ADDR_LEN 1 +#define RT5133_I2C_DUMMY_LEN 1 + +#define I2C_ADDR_XLATE_8BIT(_addr, _rw) ((((_addr) & 0x7F) << 1) | (_rw)) + +enum { + RT5133_REGULATOR_BASE = 0, + RT5133_REGULATOR_LDO1, + RT5133_REGULATOR_LDO2, + RT5133_REGULATOR_LDO3, + RT5133_REGULATOR_LDO4, + RT5133_REGULATOR_LDO5, + RT5133_REGULATOR_LDO6, + RT5133_REGULATOR_LDO7, + RT5133_REGULATOR_LDO8, + RT5133_REGULATOR_MAX +}; + +struct chip_data { + const struct regulator_desc *regulators; + const u8 vendor_id; +}; + +struct rt5133_priv { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *enable_gpio; + struct regulator_dev *rdev[RT5133_REGULATOR_MAX]; + struct gpio_chip gc; + const struct chip_data *cdata; + unsigned int gpio_output_flag; + u8 crc8_tbls[CRC8_TABLE_SIZE]; +}; + +static const unsigned int vout_type1_tables[] = { + 1800000, 2500000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000 +}; + +static const unsigned int vout_type2_tables[] = { + 1700000, 1800000, 1900000, 2500000, 2700000, 2800000, 2900000, 3000000 +}; + +static const unsigned int vout_type3_tables[] = { + 900000, 950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1800000 +}; + +static const unsigned int vout_type4_tables[] = { + 855000, 900000, 950000, 1000000, 1040000, 1090000, 1140000, 1710000 +}; + +static const struct regulator_ops rt5133_regulator_ops = { + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_ops rt5133_base_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +#define RT5133_REGULATOR_DESC(_name, _node_name, vtables, _supply) \ +{\ + .name = #_name,\ + .id = RT5133_REGULATOR_##_name,\ + .of_match = of_match_ptr(#_node_name),\ + .regulators_node = of_match_ptr("regulators"),\ + .supply_name = _supply,\ + .type = REGULATOR_VOLTAGE,\ + .owner = THIS_MODULE,\ + .ops = &rt5133_regulator_ops,\ + .n_voltages = ARRAY_SIZE(vtables),\ + .volt_table = vtables,\ + .enable_reg = RT5133_REG_##_name##_CTRL1,\ + .enable_mask = RT5133_LDO_ENABLE_MASK,\ + .vsel_reg = RT5133_REG_##_name##_CTRL2,\ + .vsel_mask = RT5133_LDO_VSEL_MASK,\ + .active_discharge_reg = RT5133_REG_##_name##_CTRL3,\ + .active_discharge_mask = RT5133_LDO_AD_MASK,\ +} + +static const struct regulator_desc rt5133_regulators[] = { + /* For digital part, base current control */ + { + .name = "base", + .id = RT5133_REGULATOR_BASE, + .of_match = of_match_ptr("base"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &rt5133_base_regulator_ops, + .enable_reg = RT5133_REG_BASE_CTRL, + .enable_mask = RT5133_FOFF_BASE_MASK, + .enable_is_inverted = true, + }, + RT5133_REGULATOR_DESC(LDO1, ldo1, vout_type1_tables, "base"), + RT5133_REGULATOR_DESC(LDO2, ldo2, vout_type1_tables, "base"), + RT5133_REGULATOR_DESC(LDO3, ldo3, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO4, ldo4, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO5, ldo5, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO6, ldo6, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO7, ldo7, vout_type3_tables, "vin"), + RT5133_REGULATOR_DESC(LDO8, ldo8, vout_type3_tables, "vin"), +}; + +static const struct regulator_desc rt5133a_regulators[] = { + /* For digital part, base current control */ + { + .name = "base", + .id = RT5133_REGULATOR_BASE, + .of_match = of_match_ptr("base"), + .regulators_node = of_match_ptr("regulators"), + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &rt5133_base_regulator_ops, + .enable_reg = RT5133_REG_BASE_CTRL, + .enable_mask = RT5133_FOFF_BASE_MASK, + .enable_is_inverted = true, + }, + RT5133_REGULATOR_DESC(LDO1, ldo1, vout_type1_tables, "base"), + RT5133_REGULATOR_DESC(LDO2, ldo2, vout_type1_tables, "base"), + RT5133_REGULATOR_DESC(LDO3, ldo3, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO4, ldo4, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO5, ldo5, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO6, ldo6, vout_type2_tables, "base"), + RT5133_REGULATOR_DESC(LDO7, ldo7, vout_type3_tables, "vin"), + RT5133_REGULATOR_DESC(LDO8, ldo8, vout_type4_tables, "vin"), +}; + +static const struct chip_data regulator_data[] = { + { rt5133_regulators, 0x70}, + { rt5133a_regulators, 0x80}, +}; + +static int rt5133_gpio_direction_output(struct gpio_chip *gpio, + unsigned int offset, int value) +{ + struct rt5133_priv *priv = gpiochip_get_data(gpio); + + if (offset >= RT5133_GPIO_NR) + return -EINVAL; + + return regmap_update_bits(priv->regmap, RT5133_REG_GPIO_CTRL, + BIT(7 - offset) | BIT(3 - offset), + value ? BIT(7 - offset) | BIT(3 - offset) : 0); +} + +static int rt5133_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct rt5133_priv *priv = gpiochip_get_data(chip); + + return !!(priv->gpio_output_flag & BIT(offset)); +} + +static int rt5133_get_gpioen_mask(unsigned int offset, unsigned int *mask) +{ + if (offset >= RT5133_GPIO_NR) + return -EINVAL; + + *mask = (BIT(7 - offset) | BIT(3 - offset)); + + return 0; +} + +static int rt5133_gpio_set(struct gpio_chip *chip, unsigned int offset, int set_val) +{ + struct rt5133_priv *priv = gpiochip_get_data(chip); + unsigned int mask = 0, val = 0, next_flag = priv->gpio_output_flag; + int ret = 0; + + ret = rt5133_get_gpioen_mask(offset, &mask); + if (ret) { + dev_err(priv->dev, "%s get gpion en mask failed, offset(%d)\n", __func__, offset); + return ret; + } + + val = set_val ? mask : 0; + + if (set_val) + next_flag |= BIT(offset); + else + next_flag &= ~BIT(offset); + + ret = regmap_update_bits(priv->regmap, RT5133_REG_GPIO_CTRL, mask, val); + if (ret) { + dev_err(priv->dev, "Failed to set gpio [%d] val %d\n", offset, + set_val); + return ret; + } + + priv->gpio_output_flag = next_flag; + return 0; +} + +static irqreturn_t rt5133_intr_handler(int irq_number, void *data) +{ + struct rt5133_priv *priv = data; + u32 intr_evts = 0, handle_evts; + int i, ret; + + ret = regmap_bulk_read(priv->regmap, RT5133_REG_BASE_EVT, &intr_evts, + RT5133_INTR_BYTE_NR); + if (ret) { + dev_err(priv->dev, "%s, read event failed\n", __func__); + return IRQ_NONE; + } + + handle_evts = intr_evts & RT5133_BASE_EVT_MASK; + /* + * VREF_EVT is a special case, if base off + * this event will also be trigger. Skip it + */ + if (handle_evts & ~RT5133_VREF_EVT_MASK) + dev_dbg(priv->dev, "base event occurred [0x%02x]\n", + handle_evts); + + handle_evts = (intr_evts & RT5133_LDO_OC_EVT_MASK) >> + RT5133_LDO_OC_EVT_SHIFT; + + for (i = RT5133_REGULATOR_LDO1; i < RT5133_REGULATOR_MAX && handle_evts; i++) { + if (!(handle_evts & BIT(i - 1))) + continue; + regulator_notifier_call_chain(priv->rdev[i], + REGULATOR_EVENT_OVER_CURRENT, + &i); + } + + handle_evts = (intr_evts & RT5133_LDO_PGB_EVT_MASK) >> + RT5133_LDO_PGB_EVT_SHIFT; + for (i = RT5133_REGULATOR_LDO1; i < RT5133_REGULATOR_MAX && handle_evts; i++) { + if (!(handle_evts & BIT(i - 1))) + continue; + regulator_notifier_call_chain(priv->rdev[i], + REGULATOR_EVENT_FAIL, &i); + } + + ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_EVT, &intr_evts, + RT5133_INTR_BYTE_NR); + if (ret) + dev_err(priv->dev, "%s, clear event failed\n", __func__); + + return IRQ_HANDLED; +} + +static int rt5133_enable_interrupts(int irq_no, struct rt5133_priv *priv) +{ + u32 mask = RT5133_INTR_CLR_MASK; + int ret; + + /* Force to write clear all events */ + ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_EVT, &mask, + RT5133_INTR_BYTE_NR); + if (ret) { + dev_err(priv->dev, "Failed to clear all interrupts\n"); + return ret; + } + + /* Unmask all interrupts */ + mask = 0; + ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_MASK, &mask, + RT5133_INTR_BYTE_NR); + if (ret) { + dev_err(priv->dev, "Failed to unmask all interrupts\n"); + return ret; + } + + return devm_request_threaded_irq(priv->dev, irq_no, NULL, + rt5133_intr_handler, IRQF_ONESHOT, + dev_name(priv->dev), priv); +} + +static int rt5133_regmap_hw_read(void *context, const void *reg_buf, + size_t reg_size, void *val_buf, + size_t val_size) +{ + struct rt5133_priv *priv = context; + struct i2c_client *client = to_i2c_client(priv->dev); + u8 reg = *(u8 *)reg_buf, crc; + u8 *buf; + int buf_len = RT5133_PREDATA_LEN + val_size + RT5133_I2C_CRC_LEN; + int read_len, ret; + + buf = kzalloc(buf_len, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + buf[0] = I2C_ADDR_XLATE_8BIT(client->addr, I2C_SMBUS_READ); + buf[1] = reg; + + read_len = val_size + RT5133_I2C_CRC_LEN; + ret = i2c_smbus_read_i2c_block_data(client, reg, read_len, + buf + RT5133_PREDATA_LEN); + + if (ret < 0) + goto out_read_err; + + if (ret != read_len) { + ret = -EIO; + goto out_read_err; + } + + crc = crc8(priv->crc8_tbls, buf, RT5133_PREDATA_LEN + val_size, 0); + if (crc != buf[RT5133_PREDATA_LEN + val_size]) { + ret = -EIO; + goto out_read_err; + } + + memcpy(val_buf, buf + RT5133_PREDATA_LEN, val_size); + dev_dbg(priv->dev, "%s, reg = 0x%02x, data = 0x%02x\n", __func__, reg, *(u8 *)val_buf); + +out_read_err: + kfree(buf); + return (ret < 0) ? ret : 0; +} + +static int rt5133_regmap_hw_write(void *context, const void *data, size_t count) +{ + struct rt5133_priv *priv = context; + struct i2c_client *client = to_i2c_client(priv->dev); + u8 reg = *(u8 *)data, crc; + u8 *buf; + int buf_len = RT5133_I2C_ADDR_LEN + count + RT5133_I2C_CRC_LEN + + RT5133_I2C_DUMMY_LEN; + int write_len, ret; + + buf = kzalloc(buf_len, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + buf[0] = I2C_ADDR_XLATE_8BIT(client->addr, I2C_SMBUS_WRITE); + buf[1] = reg; + memcpy(buf + RT5133_PREDATA_LEN, data + RT5133_REG_ADDR_LEN, + count - RT5133_REG_ADDR_LEN); + + crc = crc8(priv->crc8_tbls, buf, RT5133_I2C_ADDR_LEN + count, 0); + buf[RT5133_I2C_ADDR_LEN + count] = crc; + + write_len = count - RT5133_REG_ADDR_LEN + RT5133_I2C_CRC_LEN + + RT5133_I2C_DUMMY_LEN; + ret = i2c_smbus_write_i2c_block_data(client, reg, write_len, + buf + RT5133_PREDATA_LEN); + + dev_dbg(priv->dev, "%s, reg = 0x%02x, data = 0x%02x\n", __func__, reg, + *(u8 *)(buf + RT5133_PREDATA_LEN)); + kfree(buf); + return ret; +} + +static const struct regmap_bus rt5133_regmap_bus = { + .read = rt5133_regmap_hw_read, + .write = rt5133_regmap_hw_write, + /* Due to crc, the block read/write length has the limit */ + .max_raw_read = RT5133_MAX_I2C_BLOCK_SIZE, + .max_raw_write = RT5133_MAX_I2C_BLOCK_SIZE, +}; + +static bool rt5133_is_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RT5133_REG_CHIP_INFO: + case RT5133_REG_BASE_EVT...RT5133_REG_LDO_PGB_STAT: + case RT5133_REG_LDO_ON...RT5133_REG_LDO_OFF: + case RT5133_REG_LDO1_CTRL1: + case RT5133_REG_LDO2_CTRL1: + case RT5133_REG_LDO3_CTRL1: + case RT5133_REG_LDO4_CTRL1: + case RT5133_REG_LDO5_CTRL1: + case RT5133_REG_LDO6_CTRL1: + case RT5133_REG_LDO7_CTRL1: + case RT5133_REG_LDO8_CTRL1: + return true; + default: + return false; + }; +} + +static const struct regmap_config rt5133_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT5133_REG_LDO8_CTRL4, + .cache_type = REGCACHE_FLAT, + .num_reg_defaults_raw = RT5133_REG_LDO8_CTRL4 + 1, + .volatile_reg = rt5133_is_volatile_reg, +}; + +static int rt5133_chip_reset(struct rt5133_priv *priv) +{ + int ret; + + ret = regmap_write(priv->regmap, RT5133_REG_RST_CTRL, + RT5133_RESET_CODE); + if (ret) + return ret; + + /* Wait for register reset to take effect */ + udelay(2); + + return 0; +} + +static int rt5133_validate_vendor_info(struct rt5133_priv *priv) +{ + unsigned int val = 0; + int i, ret; + + ret = regmap_read(priv->regmap, RT5133_REG_CHIP_INFO, &val); + if (ret) + return ret; + + for (i = 0; i < ARRAY_SIZE(regulator_data); i++) { + if ((val & RT5133_VENDOR_ID_MASK) == + regulator_data[i].vendor_id){ + priv->cdata = ®ulator_data[i]; + break; + } + } + if (!priv->cdata) { + dev_err(priv->dev, "Failed to find regulator match version\n"); + return -ENODEV; + } + + return 0; +} + +static int rt5133_parse_dt(struct rt5133_priv *priv) +{ + unsigned int val = 0; + int ret = 0; + + if (!device_property_read_bool(priv->dev, "richtek,oc-shutdown-all")) + val = 0; + else + val = 1 << RT5133_OCSHDN_ALL_SHIFT; + ret = regmap_update_bits(priv->regmap, RT5133_REG_LDO_SHDN, + RT5133_OCSHDN_ALL_MASK, val); + if (ret) + return ret; + + if (!device_property_read_bool(priv->dev, "richtek,pgb-shutdown-all")) + val = 0; + else + val = 1 << RT5133_PGBSHDN_ALL_SHIFT; + return regmap_update_bits(priv->regmap, RT5133_REG_LDO_SHDN, + RT5133_PGBSHDN_ALL_MASK, val); +} + +static int rt5133_probe(struct i2c_client *i2c) +{ + struct rt5133_priv *priv; + struct regulator_config config = {0}; + int i, ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &i2c->dev; + crc8_populate_msb(priv->crc8_tbls, RT5133_CRC8_POLYNOMIAL); + + priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable", + GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpio)) + dev_err(&i2c->dev, "Failed to request HWEN gpio, check if default en=high\n"); + + priv->regmap = devm_regmap_init(&i2c->dev, &rt5133_regmap_bus, priv, + &rt5133_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&i2c->dev, "Failed to register regmap\n"); + return PTR_ERR(priv->regmap); + } + + ret = rt5133_validate_vendor_info(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to check vendor info [%d]\n", ret); + return ret; + } + + ret = rt5133_chip_reset(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to execute sw reset\n"); + return ret; + } + + config.dev = &i2c->dev; + config.driver_data = priv; + config.regmap = priv->regmap; + + for (i = 0; i < RT5133_REGULATOR_MAX; i++) { + priv->rdev[i] = devm_regulator_register(&i2c->dev, + priv->cdata->regulators + i, + &config); + if (IS_ERR(priv->rdev[i])) { + dev_err(&i2c->dev, + "Failed to register [%d] regulator\n", i); + return PTR_ERR(priv->rdev[i]); + } + } + + ret = rt5133_parse_dt(priv); + if (ret) { + dev_err(&i2c->dev, "%s, Failed to parse dt\n", __func__); + return ret; + } + + priv->gc.label = dev_name(&i2c->dev); + priv->gc.parent = &i2c->dev; + priv->gc.base = -1; + priv->gc.ngpio = RT5133_GPIO_NR; + priv->gc.set = rt5133_gpio_set; + priv->gc.get = rt5133_gpio_get; + priv->gc.direction_output = rt5133_gpio_direction_output; + priv->gc.can_sleep = true; + + ret = devm_gpiochip_add_data(&i2c->dev, &priv->gc, priv); + if (ret) + return ret; + + ret = rt5133_enable_interrupts(i2c->irq, priv); + if (ret) { + dev_err(&i2c->dev, "enable interrupt failed\n"); + return ret; + } + + i2c_set_clientdata(i2c, priv); + + return ret; +} + +static const struct of_device_id __maybe_unused rt5133_of_match_table[] = { + { .compatible = "richtek,rt5133", }, + { } +}; +MODULE_DEVICE_TABLE(of, rt5133_of_match_table); + +static struct i2c_driver rt5133_driver = { + .driver = { + .name = "rt5133", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt5133_of_match_table, + }, + .probe = rt5133_probe, +}; +module_i2c_driver(rt5133_driver); + +MODULE_DESCRIPTION("RT5133 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt5190a-regulator.c b/drivers/regulator/rt5190a-regulator.c new file mode 100644 index 000000000..a53ed523b --- /dev/null +++ b/drivers/regulator/rt5190a-regulator.c @@ -0,0 +1,517 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT5190A_REG_MANUFACTURE 0x00 +#define RT5190A_REG_BUCK2VSEL 0x04 +#define RT5190A_REG_BUCK3VSEL 0x05 +#define RT5190A_REG_DCDCCNTL 0x06 +#define RT5190A_REG_ENABLE 0x07 +#define RT5190A_REG_DISCHARGE 0x09 +#define RT5190A_REG_PROTMODE 0x0A +#define RT5190A_REG_MUTECNTL 0x0B +#define RT5190A_REG_PGSTAT 0x0F +#define RT5190A_REG_OVINT 0x10 +#define RT5190A_REG_HOTDIEMASK 0x17 + +#define RT5190A_VSEL_MASK GENMASK(6, 0) +#define RT5190A_RID_BITMASK(rid) BIT(rid + 1) +#define RT5190A_BUCK1_DISCHG_MASK GENMASK(1, 0) +#define RT5190A_BUCK1_DISCHG_ONVAL 0x01 +#define RT5190A_OVERVOLT_MASK GENMASK(7, 0) +#define RT5190A_UNDERVOLT_MASK GENMASK(15, 8) +#define RT5190A_CH234OT_MASK BIT(29) +#define RT5190A_CHIPOT_MASK BIT(28) + +#define RT5190A_BUCK23_MINUV 600000 +#define RT5190A_BUCK23_MAXUV 1400000 +#define RT5190A_BUCK23_STEPUV 10000 +#define RT5190A_BUCK23_STEPNUM ((1400000 - 600000) / 10000 + 1) + +enum { + RT5190A_IDX_BUCK1 = 0, + RT5190A_IDX_BUCK2, + RT5190A_IDX_BUCK3, + RT5190A_IDX_BUCK4, + RT5190A_IDX_LDO, + RT5190A_MAX_IDX +}; + +struct rt5190a_priv { + struct device *dev; + struct regmap *regmap; + struct regulator_desc rdesc[RT5190A_MAX_IDX]; + struct regulator_dev *rdev[RT5190A_MAX_IDX]; +}; + +static int rt5190a_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int pgood_stat; + int ret; + + ret = regmap_read(regmap, RT5190A_REG_PGSTAT, &pgood_stat); + if (ret) + return ret; + + if (!(pgood_stat & RT5190A_RID_BITMASK(rid))) + *flags = REGULATOR_ERROR_FAIL; + else + *flags = 0; + + return 0; +} + +static int rt5190a_fixed_buck_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int mask = RT5190A_RID_BITMASK(rid), val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = mask; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT5190A_REG_DCDCCNTL, mask, val); +} + +static unsigned int rt5190a_fixed_buck_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int rid = rdev_get_id(rdev); + unsigned int val; + int ret; + + ret = regmap_read(regmap, RT5190A_REG_DCDCCNTL, &val); + if (ret) { + dev_err(&rdev->dev, "Failed to get mode [%d]\n", ret); + return ret; + } + + if (val & RT5190A_RID_BITMASK(rid)) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops rt5190a_ranged_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = rt5190a_get_error_flags, +}; + +static const struct regulator_ops rt5190a_fixed_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt5190a_fixed_buck_set_mode, + .get_mode = rt5190a_fixed_buck_get_mode, + .get_error_flags = rt5190a_get_error_flags, +}; + +static const struct regulator_ops rt5190a_fixed_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = rt5190a_get_error_flags, +}; + +static irqreturn_t rt5190a_irq_handler(int irq, void *data) +{ + struct rt5190a_priv *priv = data; + __le32 raws; + unsigned int events, fields; + static const struct { + unsigned int bitmask; + unsigned int report; + } event_tbl[] = { + { RT5190A_OVERVOLT_MASK, REGULATOR_ERROR_REGULATION_OUT }, + { RT5190A_UNDERVOLT_MASK, REGULATOR_ERROR_UNDER_VOLTAGE } + }; + int i, j, ret; + + ret = regmap_raw_read(priv->regmap, RT5190A_REG_OVINT, &raws, + sizeof(raws)); + if (ret) { + dev_err(priv->dev, "Failed to read events\n"); + return IRQ_NONE; + } + + events = le32_to_cpu(raws); + + ret = regmap_raw_write(priv->regmap, RT5190A_REG_OVINT, &raws, + sizeof(raws)); + if (ret) + dev_err(priv->dev, "Failed to write-clear events\n"); + + /* Handle OV,UV events */ + for (i = 0; i < ARRAY_SIZE(event_tbl); i++) { + fields = events & event_tbl[i].bitmask; + fields >>= ffs(event_tbl[i].bitmask) - 1; + + for (j = 0; j < RT5190A_MAX_IDX; j++) { + if (!(fields & RT5190A_RID_BITMASK(j))) + continue; + + regulator_notifier_call_chain(priv->rdev[j], + event_tbl[i].report, + NULL); + } + } + + /* Handle CH234 OT event */ + if (events & RT5190A_CH234OT_MASK) { + for (j = RT5190A_IDX_BUCK2; j < RT5190A_IDX_LDO; j++) { + regulator_notifier_call_chain(priv->rdev[j], + REGULATOR_ERROR_OVER_TEMP, + NULL); + } + } + + /* Warning if CHIP OT occur */ + if (events & RT5190A_CHIPOT_MASK) + dev_warn(priv->dev, "CHIP overheat\n"); + + return IRQ_HANDLED; +} + +static unsigned int rt5190a_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT5190A_OPMODE_AUTO: + return REGULATOR_MODE_NORMAL; + case RT5190A_OPMODE_FPWM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int rt5190a_of_parse_cb(struct rt5190a_priv *priv, int rid, + struct of_regulator_match *match) +{ + struct regulator_desc *desc = priv->rdesc + rid; + struct regulator_init_data *init_data = match->init_data; + struct device_node *np = match->of_node; + bool latchup_enable; + unsigned int mask = RT5190A_RID_BITMASK(rid), val; + + if (!init_data) + return 0; + + switch (rid) { + case RT5190A_IDX_BUCK1: + case RT5190A_IDX_BUCK4: + case RT5190A_IDX_LDO: + init_data->constraints.apply_uV = 0; + + if (init_data->constraints.min_uV == + init_data->constraints.max_uV) + desc->fixed_uV = init_data->constraints.min_uV; + else { + dev_err(priv->dev, + "Variable voltage for fixed regulator\n"); + return -EINVAL; + } + break; + default: + break; + } + + latchup_enable = of_property_read_bool(np, "richtek,latchup-enable"); + + /* latchup: 0, default hiccup: 1 */ + val = !latchup_enable ? mask : 0; + + return regmap_update_bits(priv->regmap, RT5190A_REG_PROTMODE, mask, val); +} + +static void rt5190a_fillin_regulator_desc(struct regulator_desc *desc, int rid) +{ + static const char * const regu_name[] = { "buck1", "buck2", + "buck3", "buck4", + "ldo" }; + static const char * const supply[] = { NULL, "vin2", "vin3", "vin4", + "vinldo" }; + + desc->name = regu_name[rid]; + desc->supply_name = supply[rid]; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->id = rid; + desc->enable_reg = RT5190A_REG_ENABLE; + desc->enable_mask = RT5190A_RID_BITMASK(rid); + desc->active_discharge_reg = RT5190A_REG_DISCHARGE; + desc->active_discharge_mask = RT5190A_RID_BITMASK(rid); + desc->active_discharge_on = RT5190A_RID_BITMASK(rid); + + switch (rid) { + case RT5190A_IDX_BUCK1: + desc->active_discharge_mask = RT5190A_BUCK1_DISCHG_MASK; + desc->active_discharge_on = RT5190A_BUCK1_DISCHG_ONVAL; + desc->n_voltages = 1; + desc->ops = &rt5190a_fixed_buck_ops; + desc->of_map_mode = rt5190a_of_map_mode; + break; + case RT5190A_IDX_BUCK2: + desc->vsel_reg = RT5190A_REG_BUCK2VSEL; + desc->vsel_mask = RT5190A_VSEL_MASK; + desc->min_uV = RT5190A_BUCK23_MINUV; + desc->uV_step = RT5190A_BUCK23_STEPUV; + desc->n_voltages = RT5190A_BUCK23_STEPNUM; + desc->ops = &rt5190a_ranged_buck_ops; + break; + case RT5190A_IDX_BUCK3: + desc->vsel_reg = RT5190A_REG_BUCK3VSEL; + desc->vsel_mask = RT5190A_VSEL_MASK; + desc->min_uV = RT5190A_BUCK23_MINUV; + desc->uV_step = RT5190A_BUCK23_STEPUV; + desc->n_voltages = RT5190A_BUCK23_STEPNUM; + desc->ops = &rt5190a_ranged_buck_ops; + break; + case RT5190A_IDX_BUCK4: + desc->n_voltages = 1; + desc->ops = &rt5190a_fixed_buck_ops; + desc->of_map_mode = rt5190a_of_map_mode; + break; + case RT5190A_IDX_LDO: + desc->n_voltages = 1; + desc->ops = &rt5190a_fixed_ldo_ops; + break; + } +} + +static struct of_regulator_match rt5190a_regulator_match[] = { + { .name = "buck1", }, + { .name = "buck2", }, + { .name = "buck3", }, + { .name = "buck4", }, + { .name = "ldo", } +}; + +static int rt5190a_parse_regulator_dt_data(struct rt5190a_priv *priv) +{ + struct device_node *regulator_np; + struct regulator_desc *reg_desc; + struct of_regulator_match *match; + int i, ret; + + for (i = 0; i < RT5190A_MAX_IDX; i++) { + reg_desc = priv->rdesc + i; + match = rt5190a_regulator_match + i; + + rt5190a_fillin_regulator_desc(reg_desc, i); + + match->desc = reg_desc; + } + + regulator_np = of_get_child_by_name(priv->dev->of_node, "regulators"); + if (!regulator_np) { + dev_err(priv->dev, "Could not find 'regulators' node\n"); + return -ENODEV; + } + + ret = of_regulator_match(priv->dev, regulator_np, + rt5190a_regulator_match, + ARRAY_SIZE(rt5190a_regulator_match)); + + of_node_put(regulator_np); + + if (ret < 0) { + dev_err(priv->dev, + "Error parsing regulator init data: %d\n", ret); + return ret; + } + + for (i = 0; i < RT5190A_MAX_IDX; i++) { + match = rt5190a_regulator_match + i; + + ret = rt5190a_of_parse_cb(priv, i, match); + if (ret) { + dev_err(priv->dev, "Failed in [%d] of_parse_cb\n", i); + return ret; + } + } + + return 0; +} + +static const struct reg_sequence rt5190a_init_patch[] = { + { 0x09, 0x3d, }, + { 0x0a, 0x3e, }, + { 0x0b, 0x01, }, + { 0x10, 0xff, }, + { 0x11, 0xff, }, + { 0x12, 0xff, }, + { 0x13, 0xff, }, + { 0x14, 0, }, + { 0x15, 0, }, + { 0x16, 0x3e, }, + { 0x17, 0, } +}; + +static int rt5190a_device_initialize(struct rt5190a_priv *priv) +{ + bool mute_enable; + int ret; + + ret = regmap_register_patch(priv->regmap, rt5190a_init_patch, + ARRAY_SIZE(rt5190a_init_patch)); + if (ret) { + dev_err(priv->dev, "Failed to do register patch\n"); + return ret; + } + + mute_enable = device_property_read_bool(priv->dev, + "richtek,mute-enable"); + + if (mute_enable) { + ret = regmap_write(priv->regmap, RT5190A_REG_MUTECNTL, 0x00); + if (ret) { + dev_err(priv->dev, "Failed to enable mute function\n"); + return ret; + } + } + + return 0; +} + +static int rt5190a_device_check(struct rt5190a_priv *priv) +{ + u16 devid; + int ret; + + ret = regmap_raw_read(priv->regmap, RT5190A_REG_MANUFACTURE, &devid, + sizeof(devid)); + if (ret) + return ret; + + if (devid) { + dev_err(priv->dev, "Incorrect device id 0x%04x\n", devid); + return -ENODEV; + } + + return 0; +} + +static const struct regmap_config rt5190a_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT5190A_REG_HOTDIEMASK, +}; + +static int rt5190a_probe(struct i2c_client *i2c) +{ + struct rt5190a_priv *priv; + struct regulator_config cfg = {}; + int i, ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &i2c->dev; + + priv->regmap = devm_regmap_init_i2c(i2c, &rt5190a_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&i2c->dev, "Failed to allocate regmap\n"); + return PTR_ERR(priv->regmap); + } + + ret = rt5190a_device_check(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to check device %d\n", ret); + return ret; + } + + ret = rt5190a_device_initialize(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to initialize the device\n"); + return ret; + } + + ret = rt5190a_parse_regulator_dt_data(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to parse regulator dt\n"); + return ret; + } + + cfg.dev = &i2c->dev; + cfg.regmap = priv->regmap; + + for (i = 0; i < RT5190A_MAX_IDX; i++) { + struct regulator_desc *desc = priv->rdesc + i; + struct of_regulator_match *match = rt5190a_regulator_match + i; + + cfg.init_data = match->init_data; + cfg.of_node = match->of_node; + + priv->rdev[i] = devm_regulator_register(&i2c->dev, desc, &cfg); + if (IS_ERR(priv->rdev[i])) { + dev_err(&i2c->dev, "Failed to register regulator %s\n", + desc->name); + return PTR_ERR(priv->rdev[i]); + } + } + + if (i2c->irq) { + ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + rt5190a_irq_handler, + IRQF_ONESHOT, + dev_name(&i2c->dev), priv); + if (ret) { + dev_err(&i2c->dev, "Failed to register interrupt\n"); + return ret; + } + } + + return 0; +} + +static const struct of_device_id __maybe_unused rt5190a_device_table[] = { + { .compatible = "richtek,rt5190a", }, + {} +}; +MODULE_DEVICE_TABLE(of, rt5190a_device_table); + +static struct i2c_driver rt5190a_driver = { + .driver = { + .name = "rt5190a", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt5190a_device_table, + }, + .probe = rt5190a_probe, +}; +module_i2c_driver(rt5190a_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT5190A Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt5739.c b/drivers/regulator/rt5739.c new file mode 100644 index 000000000..00706cba9 --- /dev/null +++ b/drivers/regulator/rt5739.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Device driver for RT5739 regulator + * + * Copyright (C) 2023 Richtek Technology Corp. + * + * Author: ChiYuan Huang + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT5739_AUTO_MODE 0 +#define RT5739_FPWM_MODE 1 + +#define RT5739_REG_NSEL0 0x00 +#define RT5739_REG_NSEL1 0x01 +#define RT5739_REG_CNTL1 0x02 +#define RT5739_REG_ID1 0x03 +#define RT5739_REG_ID2 0x04 +#define RT5739_REG_MON 0x05 +#define RT5739_REG_CNTL2 0x06 +#define RT5739_REG_CNTL4 0x08 + +#define RT5739_VSEL_MASK GENMASK(7, 0) +#define RT5739_MODEVSEL1_MASK BIT(1) +#define RT5739_MODEVSEL0_MASK BIT(0) +#define RT5739_VID_MASK GENMASK(7, 5) +#define RT5739_DID_MASK GENMASK(3, 0) +#define RT5739_ACTD_MASK BIT(7) +#define RT5739_ENVSEL1_MASK BIT(1) +#define RT5739_ENVSEL0_MASK BIT(0) + +#define RT5733_CHIPDIE_ID 0x1 +#define RT5733_VOLT_MINUV 270000 +#define RT5733_VOLT_MAXUV 1401250 +#define RT5733_VOLT_STPUV 6250 +#define RT5733_N_VOLTS 182 + +#define RT5739_VOLT_MINUV 300000 +#define RT5739_VOLT_MAXUV 1300000 +#define RT5739_VOLT_STPUV 5000 +#define RT5739_N_VOLTS 201 +#define RT5739_I2CRDY_TIMEUS 1000 + +static int rt5739_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mask, val; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + mask = RT5739_MODEVSEL0_MASK; + else + mask = RT5739_MODEVSEL1_MASK; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = mask; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT5739_REG_CNTL1, mask, val); +} + +static unsigned int rt5739_get_mode(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mask, val; + int ret; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + mask = RT5739_MODEVSEL0_MASK; + else + mask = RT5739_MODEVSEL1_MASK; + + ret = regmap_read(regmap, RT5739_REG_CNTL1, &val); + if (ret) + return REGULATOR_MODE_INVALID; + + if (val & mask) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt5739_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int reg, vsel; + int max_uV; + + max_uV = desc->min_uV + desc->uV_step * (desc->n_voltages - 1); + + if (uV < desc->min_uV || uV > max_uV) + return -EINVAL; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + reg = RT5739_REG_NSEL1; + else + reg = RT5739_REG_NSEL0; + + vsel = (uV - desc->min_uV) / desc->uV_step; + return regmap_write(regmap, reg, vsel); +} + +static int rt5739_set_suspend_enable(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mask; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + mask = RT5739_ENVSEL1_MASK; + else + mask = RT5739_ENVSEL0_MASK; + + return regmap_update_bits(regmap, desc->enable_reg, mask, mask); +} + +static int rt5739_set_suspend_disable(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mask; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + mask = RT5739_ENVSEL1_MASK; + else + mask = RT5739_ENVSEL0_MASK; + + return regmap_update_bits(regmap, desc->enable_reg, mask, 0); +} + +static int rt5739_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mask, val; + + if (desc->vsel_reg == RT5739_REG_NSEL0) + mask = RT5739_MODEVSEL1_MASK; + else + mask = RT5739_MODEVSEL0_MASK; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = mask; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT5739_REG_CNTL1, mask, val); +} + +static const struct regulator_ops rt5739_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt5739_set_mode, + .get_mode = rt5739_get_mode, + .set_suspend_voltage = rt5739_set_suspend_voltage, + .set_suspend_enable = rt5739_set_suspend_enable, + .set_suspend_disable = rt5739_set_suspend_disable, + .set_suspend_mode = rt5739_set_suspend_mode, +}; + +static unsigned int rt5739_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT5739_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RT5739_FPWM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static void rt5739_init_regulator_desc(struct regulator_desc *desc, + bool vsel_active_high, u8 did) +{ + /* Fixed */ + desc->name = "rt5739-regulator"; + desc->owner = THIS_MODULE; + desc->ops = &rt5739_regulator_ops; + desc->vsel_mask = RT5739_VSEL_MASK; + desc->enable_reg = RT5739_REG_CNTL2; + desc->active_discharge_reg = RT5739_REG_CNTL1; + desc->active_discharge_mask = RT5739_ACTD_MASK; + desc->active_discharge_on = RT5739_ACTD_MASK; + desc->of_map_mode = rt5739_of_map_mode; + + /* Assigned by vsel level */ + if (vsel_active_high) { + desc->vsel_reg = RT5739_REG_NSEL1; + desc->enable_mask = RT5739_ENVSEL1_MASK; + } else { + desc->vsel_reg = RT5739_REG_NSEL0; + desc->enable_mask = RT5739_ENVSEL0_MASK; + } + + /* Assigned by CHIPDIE ID */ + switch (did) { + case RT5733_CHIPDIE_ID: + desc->n_voltages = RT5733_N_VOLTS; + desc->min_uV = RT5733_VOLT_MINUV; + desc->uV_step = RT5733_VOLT_STPUV; + break; + default: + desc->n_voltages = RT5739_N_VOLTS; + desc->min_uV = RT5739_VOLT_MINUV; + desc->uV_step = RT5739_VOLT_STPUV; + break; + } +} + +static bool rt5739_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == RT5739_REG_MON; +} + +static const struct regmap_config rt5739_regmap_config = { + .name = "rt5739", + .reg_bits = 8, + .val_bits = 8, + .max_register = RT5739_REG_CNTL4, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = rt5739_volatile_reg, +}; + +static int rt5739_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regulator_desc *desc; + struct regmap *regmap; + struct gpio_desc *enable_gpio; + struct regulator_config cfg = {}; + struct regulator_dev *rdev; + bool vsel_acth; + unsigned int vid; + int ret; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(enable_gpio)) + return dev_err_probe(dev, PTR_ERR(enable_gpio), "Failed to get 'enable' gpio\n"); + else if (enable_gpio) + usleep_range(RT5739_I2CRDY_TIMEUS, RT5739_I2CRDY_TIMEUS + 1000); + + regmap = devm_regmap_init_i2c(i2c, &rt5739_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + ret = regmap_read(regmap, RT5739_REG_ID1, &vid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read VID\n"); + + /* RT5739: (VID & MASK) must be 0 */ + if (vid & RT5739_VID_MASK) + return dev_err_probe(dev, -ENODEV, "Incorrect VID (0x%02x)\n", vid); + + vsel_acth = device_property_read_bool(dev, "richtek,vsel-active-high"); + + rt5739_init_regulator_desc(desc, vsel_acth, vid & RT5739_DID_MASK); + + cfg.dev = dev; + cfg.of_node = dev_of_node(dev); + cfg.init_data = of_get_regulator_init_data(dev, dev_of_node(dev), desc); + rdev = devm_regulator_register(dev, desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n"); + + return 0; +} + +static const struct of_device_id rt5739_device_table[] = { + { .compatible = "richtek,rt5733" }, + { .compatible = "richtek,rt5739" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rt5739_device_table); + +static struct i2c_driver rt5739_driver = { + .driver = { + .name = "rt5739", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt5739_device_table, + }, + .probe = rt5739_probe, +}; +module_i2c_driver(rt5739_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT5739 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rt5759-regulator.c b/drivers/regulator/rt5759-regulator.c new file mode 100644 index 000000000..c2553dcee --- /dev/null +++ b/drivers/regulator/rt5759-regulator.c @@ -0,0 +1,371 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT5759_REG_VENDORINFO 0x00 +#define RT5759_REG_FREQ 0x01 +#define RT5759_REG_VSEL 0x02 +#define RT5759_REG_DCDCCTRL 0x03 +#define RT5759_REG_STATUS 0x04 +#define RT5759_REG_DCDCSET 0x05 +#define RT5759A_REG_WDTEN 0x42 + +#define RT5759_TSTEP_MASK GENMASK(3, 2) +#define RT5759_VSEL_MASK GENMASK(6, 0) +#define RT5759_DISCHARGE_MASK BIT(3) +#define RT5759_FPWM_MASK BIT(2) +#define RT5759_ENABLE_MASK BIT(1) +#define RT5759_OT_MASK BIT(1) +#define RT5759_UV_MASK BIT(0) +#define RT5957_OCLVL_MASK GENMASK(7, 6) +#define RT5759_OCLVL_SHIFT 6 +#define RT5957_OTLVL_MASK GENMASK(5, 4) +#define RT5759_OTLVL_SHIFT 4 +#define RT5759A_WDTEN_MASK BIT(1) + +#define RT5759_MANUFACTURER_ID 0x82 +/* vsel range 0x00 ~ 0x5A */ +#define RT5759_NUM_VOLTS 91 +#define RT5759_MIN_UV 600000 +#define RT5759_STEP_UV 10000 +#define RT5759A_STEP_UV 12500 +#define RT5759_MINSS_TIMEUS 1500 + +#define RT5759_PSKIP_MODE 0 +#define RT5759_FPWM_MODE 1 + +enum { + CHIP_TYPE_RT5759 = 0, + CHIP_TYPE_RT5759A, + CHIP_TYPE_MAX +}; + +struct rt5759_priv { + struct device *dev; + struct regmap *regmap; + struct regulator_desc desc; + unsigned long chip_type; +}; + +static int rt5759_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mode_val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + mode_val = 0; + break; + case REGULATOR_MODE_FAST: + mode_val = RT5759_FPWM_MASK; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT5759_REG_STATUS, RT5759_FPWM_MASK, + mode_val); +} + +static unsigned int rt5759_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int regval; + int ret; + + ret = regmap_read(regmap, RT5759_REG_DCDCCTRL, ®val); + if (ret) + return REGULATOR_MODE_INVALID; + + if (regval & RT5759_FPWM_MASK) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt5759_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int status, events = 0; + int ret; + + ret = regmap_read(regmap, RT5759_REG_STATUS, &status); + if (ret) + return ret; + + if (status & RT5759_OT_MASK) + events |= REGULATOR_ERROR_OVER_TEMP; + + if (status & RT5759_UV_MASK) + events |= REGULATOR_ERROR_UNDER_VOLTAGE; + + *flags = events; + return 0; +} + +static int rt5759_set_ocp(struct regulator_dev *rdev, int lim_uA, int severity, + bool enable) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int ocp_lvl[] = { 9800000, 10800000, 11800000 }; + unsigned int ocp_regval; + int i; + + /* Only support over current protection parameter */ + if (severity != REGULATOR_SEVERITY_PROT) + return 0; + + if (enable) { + /* Default ocp level is 10.8A */ + if (lim_uA == 0) + lim_uA = 10800000; + + for (i = 0; i < ARRAY_SIZE(ocp_lvl); i++) { + if (lim_uA <= ocp_lvl[i]) + break; + } + + if (i == ARRAY_SIZE(ocp_lvl)) + i = ARRAY_SIZE(ocp_lvl) - 1; + + ocp_regval = i + 1; + } else + ocp_regval = 0; + + return regmap_update_bits(regmap, RT5759_REG_DCDCSET, RT5957_OCLVL_MASK, + ocp_regval << RT5759_OCLVL_SHIFT); +} + +static int rt5759_set_otp(struct regulator_dev *rdev, int lim, int severity, + bool enable) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int otp_lvl[] = { 140, 150, 170 }; + unsigned int otp_regval; + int i; + + /* Only support over temperature protection parameter */ + if (severity != REGULATOR_SEVERITY_PROT) + return 0; + + if (enable) { + /* Default otp level is 150'c */ + if (lim == 0) + lim = 150; + + for (i = 0; i < ARRAY_SIZE(otp_lvl); i++) { + if (lim <= otp_lvl[i]) + break; + } + + if (i == ARRAY_SIZE(otp_lvl)) + i = ARRAY_SIZE(otp_lvl) - 1; + + otp_regval = i + 1; + } else + otp_regval = 0; + + return regmap_update_bits(regmap, RT5759_REG_DCDCSET, RT5957_OTLVL_MASK, + otp_regval << RT5759_OTLVL_SHIFT); +} + +static const struct regulator_ops rt5759_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt5759_set_mode, + .get_mode = rt5759_get_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_error_flags = rt5759_get_error_flags, + .set_over_current_protection = rt5759_set_ocp, + .set_thermal_protection = rt5759_set_otp, +}; + +static unsigned int rt5759_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT5759_FPWM_MODE: + return REGULATOR_MODE_FAST; + case RT5759_PSKIP_MODE: + return REGULATOR_MODE_NORMAL; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const unsigned int rt5759_ramp_table[] = { 20000, 15000, 10000, 5000 }; + +static int rt5759_regulator_register(struct rt5759_priv *priv) +{ + struct device_node *np = priv->dev->of_node; + struct regulator_desc *reg_desc = &priv->desc; + struct regulator_config reg_cfg; + struct regulator_dev *rdev; + int ret; + + reg_desc->name = "rt5759-buck"; + reg_desc->type = REGULATOR_VOLTAGE; + reg_desc->owner = THIS_MODULE; + reg_desc->ops = &rt5759_regulator_ops; + reg_desc->n_voltages = RT5759_NUM_VOLTS; + reg_desc->min_uV = RT5759_MIN_UV; + reg_desc->uV_step = RT5759_STEP_UV; + reg_desc->vsel_reg = RT5759_REG_VSEL; + reg_desc->vsel_mask = RT5759_VSEL_MASK; + reg_desc->enable_reg = RT5759_REG_DCDCCTRL; + reg_desc->enable_mask = RT5759_ENABLE_MASK; + reg_desc->active_discharge_reg = RT5759_REG_DCDCCTRL; + reg_desc->active_discharge_mask = RT5759_DISCHARGE_MASK; + reg_desc->active_discharge_on = RT5759_DISCHARGE_MASK; + reg_desc->ramp_reg = RT5759_REG_FREQ; + reg_desc->ramp_mask = RT5759_TSTEP_MASK; + reg_desc->ramp_delay_table = rt5759_ramp_table; + reg_desc->n_ramp_values = ARRAY_SIZE(rt5759_ramp_table); + reg_desc->enable_time = RT5759_MINSS_TIMEUS; + reg_desc->of_map_mode = rt5759_of_map_mode; + + /* + * RT5759 step uV = 10000 + * RT5759A step uV = 12500 + */ + if (priv->chip_type == CHIP_TYPE_RT5759A) + reg_desc->uV_step = RT5759A_STEP_UV; + + memset(®_cfg, 0, sizeof(reg_cfg)); + reg_cfg.dev = priv->dev; + reg_cfg.of_node = np; + reg_cfg.init_data = of_get_regulator_init_data(priv->dev, np, reg_desc); + reg_cfg.regmap = priv->regmap; + + rdev = devm_regulator_register(priv->dev, reg_desc, ®_cfg); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(priv->dev, "Failed to register regulator (%d)\n", ret); + return ret; + } + + return 0; +} + +static int rt5759_init_device_property(struct rt5759_priv *priv) +{ + unsigned int val = 0; + + /* + * Only RT5759A support external watchdog input + */ + if (priv->chip_type != CHIP_TYPE_RT5759A) + return 0; + + if (device_property_read_bool(priv->dev, "richtek,watchdog-enable")) + val = RT5759A_WDTEN_MASK; + + return regmap_update_bits(priv->regmap, RT5759A_REG_WDTEN, + RT5759A_WDTEN_MASK, val); +} + +static int rt5759_manufacturer_check(struct rt5759_priv *priv) +{ + unsigned int vendor; + int ret; + + ret = regmap_read(priv->regmap, RT5759_REG_VENDORINFO, &vendor); + if (ret) + return ret; + + if (vendor != RT5759_MANUFACTURER_ID) { + dev_err(priv->dev, "vendor info not correct (%d)\n", vendor); + return -EINVAL; + } + + return 0; +} + +static bool rt5759_is_accessible_reg(struct device *dev, unsigned int reg) +{ + struct rt5759_priv *priv = dev_get_drvdata(dev); + + if (reg <= RT5759_REG_DCDCSET) + return true; + + if (priv->chip_type == CHIP_TYPE_RT5759A && reg == RT5759A_REG_WDTEN) + return true; + + return false; +} + +static const struct regmap_config rt5759_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT5759A_REG_WDTEN, + .readable_reg = rt5759_is_accessible_reg, + .writeable_reg = rt5759_is_accessible_reg, +}; + +static int rt5759_probe(struct i2c_client *i2c) +{ + struct rt5759_priv *priv; + int ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &i2c->dev; + priv->chip_type = (unsigned long)of_device_get_match_data(&i2c->dev); + i2c_set_clientdata(i2c, priv); + + priv->regmap = devm_regmap_init_i2c(i2c, &rt5759_regmap_config); + if (IS_ERR(priv->regmap)) { + ret = PTR_ERR(priv->regmap); + dev_err(&i2c->dev, "Failed to allocate regmap (%d)\n", ret); + return ret; + } + + ret = rt5759_manufacturer_check(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to check device (%d)\n", ret); + return ret; + } + + ret = rt5759_init_device_property(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to init device (%d)\n", ret); + return ret; + } + + return rt5759_regulator_register(priv); +} + +static const struct of_device_id __maybe_unused rt5759_device_table[] = { + { .compatible = "richtek,rt5759", .data = (void *)CHIP_TYPE_RT5759 }, + { .compatible = "richtek,rt5759a", .data = (void *)CHIP_TYPE_RT5759A }, + {} +}; +MODULE_DEVICE_TABLE(of, rt5759_device_table); + +static struct i2c_driver rt5759_driver = { + .driver = { + .name = "rt5759", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(rt5759_device_table), + }, + .probe = rt5759_probe, +}; +module_i2c_driver(rt5759_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT5759 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt6160-regulator.c b/drivers/regulator/rt6160-regulator.c new file mode 100644 index 000000000..548ffdf53 --- /dev/null +++ b/drivers/regulator/rt6160-regulator.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT6160_MODE_AUTO 0 +#define RT6160_MODE_FPWM 1 + +#define RT6160_REG_CNTL 0x01 +#define RT6160_REG_STATUS 0x02 +#define RT6160_REG_DEVID 0x03 +#define RT6160_REG_VSELL 0x04 +#define RT6160_REG_VSELH 0x05 +#define RT6160_NUM_REGS (RT6160_REG_VSELH + 1) + +#define RT6160_FPWM_MASK BIT(3) +#define RT6160_RAMPRATE_MASK GENMASK(1, 0) +#define RT6160_VID_MASK GENMASK(7, 4) +#define RT6160_VSEL_MASK GENMASK(6, 0) +#define RT6160_HDSTAT_MASK BIT(4) +#define RT6160_UVSTAT_MASK BIT(3) +#define RT6160_OCSTAT_MASK BIT(2) +#define RT6160_TSDSTAT_MASK BIT(1) +#define RT6160_PGSTAT_MASK BIT(0) + +#define RT6160_VENDOR_ID 0xA0 +#define RT6166_VENDOR_ID 0xB0 +#define RT6160_VOUT_MINUV 2025000 +#define RT6160_VOUT_MAXUV 5200000 +#define RT6166_VOUT_MINUV 1800000 +#define RT6166_VOUD_MAXUV 4950000 +#define RT6160_VOUT_STPUV 25000 +#define RT6160_N_VOUTS ((RT6160_VOUT_MAXUV - RT6160_VOUT_MINUV) / RT6160_VOUT_STPUV + 1) + +#define RT6160_I2CRDY_TIMEUS 100 + +struct rt6160_priv { + struct regulator_desc desc; + struct gpio_desc *enable_gpio; + struct regmap *regmap; + bool enable_state; + uint8_t devid; +}; + +static const unsigned int rt6160_ramp_tables[] = { + 1000, 2500, 5000, 10000 +}; + +static int rt6160_enable(struct regulator_dev *rdev) +{ + struct rt6160_priv *priv = rdev_get_drvdata(rdev); + + if (!priv->enable_gpio) + return 0; + + gpiod_set_value_cansleep(priv->enable_gpio, 1); + priv->enable_state = true; + + usleep_range(RT6160_I2CRDY_TIMEUS, RT6160_I2CRDY_TIMEUS + 100); + + regcache_cache_only(priv->regmap, false); + return regcache_sync(priv->regmap); +} + +static int rt6160_disable(struct regulator_dev *rdev) +{ + struct rt6160_priv *priv = rdev_get_drvdata(rdev); + + if (!priv->enable_gpio) + return -EINVAL; + + /* Mark regcache as dirty and cache only before HW disabled */ + regcache_cache_only(priv->regmap, true); + regcache_mark_dirty(priv->regmap); + + priv->enable_state = false; + gpiod_set_value_cansleep(priv->enable_gpio, 0); + + return 0; +} + +static int rt6160_is_enabled(struct regulator_dev *rdev) +{ + struct rt6160_priv *priv = rdev_get_drvdata(rdev); + + return priv->enable_state ? 1 : 0; +} + +static int rt6160_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mode_val; + + switch (mode) { + case REGULATOR_MODE_FAST: + mode_val = RT6160_FPWM_MASK; + break; + case REGULATOR_MODE_NORMAL: + mode_val = 0; + break; + default: + dev_err(&rdev->dev, "mode not supported\n"); + return -EINVAL; + } + + return regmap_update_bits(regmap, RT6160_REG_CNTL, RT6160_FPWM_MASK, mode_val); +} + +static unsigned int rt6160_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + int ret; + + ret = regmap_read(regmap, RT6160_REG_CNTL, &val); + if (ret) + return ret; + + if (val & RT6160_FPWM_MASK) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt6160_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int suspend_vsel_reg; + int vsel; + + vsel = regulator_map_voltage_linear(rdev, uV, uV); + if (vsel < 0) + return vsel; + + if (rdev->desc->vsel_reg == RT6160_REG_VSELL) + suspend_vsel_reg = RT6160_REG_VSELH; + else + suspend_vsel_reg = RT6160_REG_VSELL; + + return regmap_update_bits(regmap, suspend_vsel_reg, + RT6160_VSEL_MASK, vsel); +} + +static int rt6160_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val, events = 0; + int ret; + + ret = regmap_read(regmap, RT6160_REG_STATUS, &val); + if (ret) + return ret; + + if (val & (RT6160_HDSTAT_MASK | RT6160_TSDSTAT_MASK)) + events |= REGULATOR_ERROR_OVER_TEMP; + + if (val & RT6160_UVSTAT_MASK) + events |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (val & RT6160_OCSTAT_MASK) + events |= REGULATOR_ERROR_OVER_CURRENT; + + if (val & RT6160_PGSTAT_MASK) + events |= REGULATOR_ERROR_FAIL; + + *flags = events; + return 0; +} + +static const struct regulator_ops rt6160_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + + .enable = rt6160_enable, + .disable = rt6160_disable, + .is_enabled = rt6160_is_enabled, + + .set_mode = rt6160_set_mode, + .get_mode = rt6160_get_mode, + .set_suspend_voltage = rt6160_set_suspend_voltage, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_error_flags = rt6160_get_error_flags, +}; + +static unsigned int rt6160_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT6160_MODE_FPWM: + return REGULATOR_MODE_FAST; + case RT6160_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + } + + return REGULATOR_MODE_INVALID; +} + +static bool rt6160_is_accessible_reg(struct device *dev, unsigned int reg) +{ + if (reg >= RT6160_REG_CNTL && reg <= RT6160_REG_VSELH) + return true; + return false; +} + +static bool rt6160_is_volatile_reg(struct device *dev, unsigned int reg) +{ + if (reg == RT6160_REG_STATUS) + return true; + return false; +} + +static const struct regmap_config rt6160_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT6160_REG_VSELH, + .num_reg_defaults_raw = RT6160_NUM_REGS, + .cache_type = REGCACHE_FLAT, + + .writeable_reg = rt6160_is_accessible_reg, + .readable_reg = rt6160_is_accessible_reg, + .volatile_reg = rt6160_is_volatile_reg, +}; + +static int rt6160_probe(struct i2c_client *i2c) +{ + struct rt6160_priv *priv; + struct regulator_config regulator_cfg = {}; + struct regulator_dev *rdev; + bool vsel_active_low; + unsigned int devid; + int ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + vsel_active_low = + device_property_present(&i2c->dev, "richtek,vsel-active-low"); + + priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpio)) { + dev_err(&i2c->dev, "Failed to get 'enable' gpio\n"); + return PTR_ERR(priv->enable_gpio); + } + priv->enable_state = true; + + usleep_range(RT6160_I2CRDY_TIMEUS, RT6160_I2CRDY_TIMEUS + 100); + + priv->regmap = devm_regmap_init_i2c(i2c, &rt6160_regmap_config); + if (IS_ERR(priv->regmap)) { + ret = PTR_ERR(priv->regmap); + dev_err(&i2c->dev, "Failed to init regmap (%d)\n", ret); + return ret; + } + + ret = regmap_read(priv->regmap, RT6160_REG_DEVID, &devid); + if (ret) + return ret; + + devid = devid & RT6160_VID_MASK; + + switch (devid) { + case RT6166_VENDOR_ID: + case RT6160_VENDOR_ID: + break; + default: + dev_err(&i2c->dev, "VID not correct [0x%02x]\n", devid); + return -ENODEV; + } + + priv->devid = devid; + + priv->desc.name = "rt6160-buckboost"; + priv->desc.type = REGULATOR_VOLTAGE; + priv->desc.owner = THIS_MODULE; + if (priv->devid == RT6166_VENDOR_ID) + priv->desc.min_uV = RT6166_VOUT_MINUV; + else + priv->desc.min_uV = RT6160_VOUT_MINUV; + priv->desc.uV_step = RT6160_VOUT_STPUV; + if (vsel_active_low) + priv->desc.vsel_reg = RT6160_REG_VSELL; + else + priv->desc.vsel_reg = RT6160_REG_VSELH; + priv->desc.vsel_mask = RT6160_VSEL_MASK; + priv->desc.n_voltages = RT6160_N_VOUTS; + priv->desc.ramp_reg = RT6160_REG_CNTL; + priv->desc.ramp_mask = RT6160_RAMPRATE_MASK; + priv->desc.ramp_delay_table = rt6160_ramp_tables; + priv->desc.n_ramp_values = ARRAY_SIZE(rt6160_ramp_tables); + priv->desc.of_map_mode = rt6160_of_map_mode; + priv->desc.ops = &rt6160_regulator_ops; + + regulator_cfg.dev = &i2c->dev; + regulator_cfg.of_node = i2c->dev.of_node; + regulator_cfg.regmap = priv->regmap; + regulator_cfg.driver_data = priv; + regulator_cfg.init_data = of_get_regulator_init_data(&i2c->dev, i2c->dev.of_node, + &priv->desc); + + rdev = devm_regulator_register(&i2c->dev, &priv->desc, ®ulator_cfg); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register regulator\n"); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id __maybe_unused rt6160_of_match_table[] = { + { .compatible = "richtek,rt6160", }, + {} +}; +MODULE_DEVICE_TABLE(of, rt6160_of_match_table); + +static struct i2c_driver rt6160_driver = { + .driver = { + .name = "rt6160", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt6160_of_match_table, + }, + .probe = rt6160_probe, +}; +module_i2c_driver(rt6160_driver); + +MODULE_DESCRIPTION("Richtek RT6160 voltage regulator driver"); +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt6190-regulator.c b/drivers/regulator/rt6190-regulator.c new file mode 100644 index 000000000..f2cd95400 --- /dev/null +++ b/drivers/regulator/rt6190-regulator.c @@ -0,0 +1,495 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Richtek Technology Corp. + * + * Author: ChiYuan Huang + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT6190_REG_VID 0x00 +#define RT6190_REG_OUTV 0x01 +#define RT6190_REG_OUTC 0x03 +#define RT6190_REG_SET1 0x0D +#define RT6190_REG_SET2 0x0E +#define RT6190_REG_SET4 0x10 +#define RT6190_REG_RATIO 0x11 +#define RT6190_REG_OUT_VOLT_L 0x12 +#define RT6190_REG_TEMP_H 0x1B +#define RT6190_REG_STAT1 0x1C +#define RT6190_REG_ALERT1 0x1E +#define RT6190_REG_ALERT2 0x1F +#define RT6190_REG_MASK2 0x21 +#define RT6190_REG_OCPEN 0x28 +#define RT6190_REG_SET5 0x29 +#define RT6190_REG_VBUSC_ADC 0x32 +#define RT6190_REG_BUSC_VOLT_L 0x33 +#define RT6190_REG_BUSC_VOLT_H 0x34 +#define RT6190_REG_STAT3 0x37 +#define RT6190_REG_ALERT3 0x38 +#define RT6190_REG_MASK3 0x39 + +#define RT6190_ENPWM_MASK BIT(7) +#define RT6190_ENDCHG_MASK BIT(4) +#define RT6190_ALERT_OTPEVT BIT(6) +#define RT6190_ALERT_UVPEVT BIT(5) +#define RT6190_ALERT_OVPEVT BIT(4) +#define RT6190_ENGCP_MASK BIT(1) +#define RT6190_FCCM_MASK BIT(7) + +#define RICHTEK_VID 0x82 +#define RT6190_OUT_MIN_UV 3000000 +#define RT6190_OUT_MAX_UV 32000000 +#define RT6190_OUT_STEP_UV 20000 +#define RT6190_OUT_N_VOLT (RT6190_OUT_MAX_UV / RT6190_OUT_STEP_UV + 1) +#define RT6190_OUTV_MINSEL 150 +#define RT6190_OUT_MIN_UA 306000 +#define RT6190_OUT_MAX_UA 12114000 +#define RT6190_OUT_STEP_UA 24000 +#define RT6190_OUTC_MINSEL 19 +#define RT6190_EN_TIME_US 500 + +#define RT6190_PSM_MODE 0 +#define RT6190_FCCM_MODE 1 + +struct rt6190_data { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *enable_gpio; + unsigned int cached_alert_evt; +}; + +static int rt6190_out_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_sel = cpu_to_le16(selector); + + return regmap_raw_write(regmap, RT6190_REG_OUTV, &le_sel, + sizeof(le_sel)); +} + +static int rt6190_out_get_voltage_sel(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_sel; + int ret; + + ret = regmap_raw_read(regmap, RT6190_REG_OUTV, &le_sel, sizeof(le_sel)); + + return ret ?: le16_to_cpu(le_sel); +} + +static int rt6190_out_enable(struct regulator_dev *rdev) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + u8 out_cfg[4]; + int ret; + + pm_runtime_get_sync(data->dev); + + /* + * From off to on, vout config will restore to IC default. + * Read vout configs before enable, and restore them after enable + */ + ret = regmap_raw_read(regmap, RT6190_REG_OUTV, out_cfg, + sizeof(out_cfg)); + if (ret) + return ret; + + ret = regulator_enable_regmap(rdev); + if (ret) + return ret; + + ret = regmap_raw_write(regmap, RT6190_REG_OUTV, out_cfg, + sizeof(out_cfg)); + if (ret) + return ret; + + return regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, + RT6190_ENGCP_MASK); +} + +static int rt6190_out_disable(struct regulator_dev *rdev) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + int ret; + + ret = regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, 0); + if (ret) + return ret; + + ret = regulator_disable_regmap(rdev); + if (ret) + return ret; + + /* cleared cached alert event */ + data->cached_alert_evt = 0; + + pm_runtime_put(data->dev); + + return 0; +} + +static int rt6190_out_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int csel, clim; + __le16 le_csel; + + if (min_uA < RT6190_OUT_MIN_UA || max_uA > RT6190_OUT_MAX_UA) + return -EINVAL; + + csel = DIV_ROUND_UP(min_uA - RT6190_OUT_MIN_UA, RT6190_OUT_STEP_UA); + + clim = RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel; + if (clim > max_uA) + return -EINVAL; + + csel += RT6190_OUTC_MINSEL; + le_csel = cpu_to_le16(csel); + + return regmap_raw_write(regmap, RT6190_REG_OUTC, &le_csel, + sizeof(le_csel)); +} + +static int rt6190_out_get_current_limit(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_csel; + int csel, ret; + + ret = regmap_raw_read(regmap, RT6190_REG_OUTC, &le_csel, + sizeof(le_csel)); + if (ret) + return ret; + + csel = le16_to_cpu(le_csel); + csel -= RT6190_OUTC_MINSEL; + + return RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel; +} + +static int rt6190_out_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = RT6190_FCCM_MASK; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT6190_REG_SET1, RT6190_FCCM_MASK, + val); +} + +static unsigned int rt6190_out_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int config; + int ret; + + ret = regmap_read(regmap, RT6190_REG_SET1, &config); + if (ret) + return REGULATOR_MODE_INVALID; + + if (config & RT6190_FCCM_MASK) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt6190_out_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + unsigned int state, rpt_flags = 0; + int ret; + + ret = regmap_read(data->regmap, RT6190_REG_STAT1, &state); + if (ret) + return ret; + + state |= data->cached_alert_evt; + + if (state & RT6190_ALERT_OTPEVT) + rpt_flags |= REGULATOR_ERROR_OVER_TEMP; + + if (state & RT6190_ALERT_UVPEVT) + rpt_flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (state & RT6190_ALERT_OVPEVT) + rpt_flags |= REGULATOR_ERROR_REGULATION_OUT; + + *flags = rpt_flags; + + return 0; +} + +static unsigned int rt6190_out_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT6190_PSM_MODE: + return REGULATOR_MODE_NORMAL; + case RT6190_FCCM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regulator_ops rt6190_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = rt6190_out_set_voltage_sel, + .get_voltage_sel = rt6190_out_get_voltage_sel, + .enable = rt6190_out_enable, + .disable = rt6190_out_disable, + .is_enabled = regulator_is_enabled_regmap, + .set_current_limit = rt6190_out_set_current_limit, + .get_current_limit = rt6190_out_get_current_limit, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt6190_out_set_mode, + .get_mode = rt6190_out_get_mode, + .get_error_flags = rt6190_out_get_error_flags, +}; + +static const struct regulator_desc rt6190_regulator_desc = { + .name = "rt6190-regulator", + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &rt6190_regulator_ops, + .min_uV = RT6190_OUT_MIN_UV, + .uV_step = RT6190_OUT_STEP_UV, + .n_voltages = RT6190_OUT_N_VOLT, + .linear_min_sel = RT6190_OUTV_MINSEL, + .enable_reg = RT6190_REG_SET2, + .enable_mask = RT6190_ENPWM_MASK, + .active_discharge_reg = RT6190_REG_SET2, + .active_discharge_mask = RT6190_ENDCHG_MASK, + .active_discharge_on = RT6190_ENDCHG_MASK, + .of_map_mode = rt6190_out_of_map_mode, +}; + +static bool rt6190_is_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RT6190_REG_OUT_VOLT_L ... RT6190_REG_ALERT2: + case RT6190_REG_BUSC_VOLT_L ... RT6190_REG_BUSC_VOLT_H: + case RT6190_REG_STAT3 ... RT6190_REG_ALERT3: + return true; + default: + return false; + } +} + +static const struct regmap_config rt6190_regmap_config = { + .name = "rt6190", + .cache_type = REGCACHE_FLAT, + .reg_bits = 8, + .val_bits = 8, + .max_register = RT6190_REG_MASK3, + .num_reg_defaults_raw = RT6190_REG_MASK3 + 1, + .volatile_reg = rt6190_is_volatile_reg, +}; + +static irqreturn_t rt6190_irq_handler(int irq, void *devid) +{ + struct regulator_dev *rdev = devid; + struct rt6190_data *data = rdev_get_drvdata(rdev); + unsigned int alert; + int ret; + + ret = regmap_read(data->regmap, RT6190_REG_ALERT1, &alert); + if (ret) + return IRQ_NONE; + + /* Write clear alert events */ + ret = regmap_write(data->regmap, RT6190_REG_ALERT1, alert); + if (ret) + return IRQ_NONE; + + data->cached_alert_evt |= alert; + + if (alert & RT6190_ALERT_OTPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_TEMP, NULL); + + if (alert & RT6190_ALERT_UVPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, NULL); + + if (alert & RT6190_ALERT_OVPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_REGULATION_OUT, NULL); + + return IRQ_HANDLED; +} + +static int rt6190_init_registers(struct regmap *regmap) +{ + int ret; + + /* Enable_ADC = 1 */ + ret = regmap_write(regmap, RT6190_REG_SET4, 0x82); + if (ret) + return ret; + + /* Config default VOUT ratio to be higher */ + ret = regmap_write(regmap, RT6190_REG_RATIO, 0x20); + + /* Mask unused alert */ + ret = regmap_write(regmap, RT6190_REG_MASK2, 0); + if (ret) + return ret; + + /* OCP config */ + ret = regmap_write(regmap, RT6190_REG_OCPEN, 0); + if (ret) + return ret; + + /* Enable VBUSC ADC */ + return regmap_write(regmap, RT6190_REG_VBUSC_ADC, 0x02); +} + +static int rt6190_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct rt6190_data *data; + struct gpio_desc *enable_gpio; + struct regmap *regmap; + struct regulator_dev *rdev; + struct regulator_config cfg = {}; + unsigned int vid; + int ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(enable_gpio)) + return dev_err_probe(dev, PTR_ERR(enable_gpio), "Failed to get 'enable' gpio\n"); + else if (enable_gpio) + usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2); + + regmap = devm_regmap_init_i2c(i2c, &rt6190_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + data->dev = dev; + data->enable_gpio = enable_gpio; + data->regmap = regmap; + i2c_set_clientdata(i2c, data); + + ret = regmap_read(regmap, RT6190_REG_VID, &vid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read VID\n"); + + if (vid != RICHTEK_VID) + return dev_err_probe(dev, -ENODEV, "Incorrect VID 0x%02x\n", vid); + + ret = rt6190_init_registers(regmap); + if (ret) + return dev_err_probe(dev, ret, "Failed to init registers\n"); + + pm_runtime_set_active(dev); + ret = devm_pm_runtime_enable(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to set pm_runtime enable\n"); + + cfg.dev = dev; + cfg.of_node = dev->of_node; + cfg.driver_data = data; + cfg.init_data = of_get_regulator_init_data(dev, dev->of_node, + &rt6190_regulator_desc); + + rdev = devm_regulator_register(dev, &rt6190_regulator_desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n"); + + if (i2c->irq) { + ret = devm_request_threaded_irq(dev, i2c->irq, NULL, + rt6190_irq_handler, + IRQF_ONESHOT, dev_name(dev), + rdev); + if (ret) + return dev_err_probe(dev, ret, "Failed to register interrupt\n"); + } + + return 0; +} + +static int rt6190_runtime_suspend(struct device *dev) +{ + struct rt6190_data *data = dev_get_drvdata(dev); + struct regmap *regmap = data->regmap; + + if (!data->enable_gpio) + return 0; + + regcache_cache_only(regmap, true); + regcache_mark_dirty(regmap); + + gpiod_set_value(data->enable_gpio, 0); + + return 0; +} + +static int rt6190_runtime_resume(struct device *dev) +{ + struct rt6190_data *data = dev_get_drvdata(dev); + struct regmap *regmap = data->regmap; + + if (!data->enable_gpio) + return 0; + + gpiod_set_value(data->enable_gpio, 1); + usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2); + + regcache_cache_only(regmap, false); + return regcache_sync(regmap); +} + +static const struct dev_pm_ops __maybe_unused rt6190_dev_pm = { + RUNTIME_PM_OPS(rt6190_runtime_suspend, rt6190_runtime_resume, NULL) +}; + +static const struct of_device_id rt6190_of_dev_table[] = { + { .compatible = "richtek,rt6190" }, + {} +}; +MODULE_DEVICE_TABLE(of, rt6190_of_dev_table); + +static struct i2c_driver rt6190_driver = { + .driver = { + .name = "rt6190", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt6190_of_dev_table, + .pm = pm_ptr(&rt6190_dev_pm), + }, + .probe = rt6190_probe, +}; +module_i2c_driver(rt6190_driver); + +MODULE_DESCRIPTION("Richtek RT6190 regulator driver"); +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rt6245-regulator.c b/drivers/regulator/rt6245-regulator.c new file mode 100644 index 000000000..5c0ee04e9 --- /dev/null +++ b/drivers/regulator/rt6245-regulator.c @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT6245_VIRT_OCLIMIT 0x00 +#define RT6245_VIRT_OTLEVEL 0x01 +#define RT6245_VIRT_PGDLYTIME 0x02 +#define RT6245_VIRT_SLEWRATE 0x03 +#define RT6245_VIRT_SWFREQ 0x04 +#define RT6245_VIRT_VOUT 0x05 + +#define RT6245_VOUT_MASK GENMASK(6, 0) +#define RT6245_SLEW_MASK GENMASK(2, 0) +#define RT6245_CHKSUM_MASK BIT(7) +#define RT6245_CODE_MASK GENMASK(6, 0) + +/* HW Enable + Soft start time */ +#define RT6245_ENTIME_IN_US 5000 + +#define RT6245_VOUT_MINUV 437500 +#define RT6245_VOUT_MAXUV 1387500 +#define RT6245_VOUT_STEPUV 12500 +#define RT6245_NUM_VOUT ((RT6245_VOUT_MAXUV - RT6245_VOUT_MINUV) / RT6245_VOUT_STEPUV + 1) + +struct rt6245_priv { + struct gpio_desc *enable_gpio; + bool enable_state; +}; + +static int rt6245_enable(struct regulator_dev *rdev) +{ + struct rt6245_priv *priv = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + int ret; + + if (!priv->enable_gpio) + return 0; + + gpiod_direction_output(priv->enable_gpio, 1); + usleep_range(RT6245_ENTIME_IN_US, RT6245_ENTIME_IN_US + 1000); + + regcache_cache_only(regmap, false); + ret = regcache_sync(regmap); + if (ret) { + regcache_cache_only(regmap, true); + gpiod_direction_output(priv->enable_gpio, 0); + return ret; + } + + priv->enable_state = true; + return 0; +} + +static int rt6245_disable(struct regulator_dev *rdev) +{ + struct rt6245_priv *priv = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + + if (!priv->enable_gpio) + return -EINVAL; + + regcache_cache_only(regmap, true); + regcache_mark_dirty(regmap); + + gpiod_direction_output(priv->enable_gpio, 0); + + priv->enable_state = false; + return 0; +} + +static int rt6245_is_enabled(struct regulator_dev *rdev) +{ + struct rt6245_priv *priv = rdev_get_drvdata(rdev); + + return priv->enable_state ? 1 : 0; +} + +static const struct regulator_ops rt6245_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .enable = rt6245_enable, + .disable = rt6245_disable, + .is_enabled = rt6245_is_enabled, +}; + +/* ramp delay dividend is 12500 uV/uS, and divisor from 1 to 8 */ +static const unsigned int rt6245_ramp_delay_table[] = { + 12500, 6250, 4167, 3125, 2500, 2083, 1786, 1562 +}; + +static const struct regulator_desc rt6245_regulator_desc = { + .name = "rt6245-regulator", + .ops = &rt6245_regulator_ops, + .type = REGULATOR_VOLTAGE, + .min_uV = RT6245_VOUT_MINUV, + .uV_step = RT6245_VOUT_STEPUV, + .n_voltages = RT6245_NUM_VOUT, + .ramp_delay_table = rt6245_ramp_delay_table, + .n_ramp_values = ARRAY_SIZE(rt6245_ramp_delay_table), + .owner = THIS_MODULE, + .vsel_reg = RT6245_VIRT_VOUT, + .vsel_mask = RT6245_VOUT_MASK, + .ramp_reg = RT6245_VIRT_SLEWRATE, + .ramp_mask = RT6245_SLEW_MASK, +}; + +static int rt6245_init_device_properties(struct device *dev) +{ + const struct { + const char *name; + unsigned int reg; + } rt6245_props[] = { + { "richtek,oc-level-select", RT6245_VIRT_OCLIMIT }, + { "richtek,ot-level-select", RT6245_VIRT_OTLEVEL }, + { "richtek,pgdly-time-select", RT6245_VIRT_PGDLYTIME }, + { "richtek,switch-freq-select", RT6245_VIRT_SWFREQ } + }; + struct regmap *regmap = dev_get_regmap(dev, NULL); + u8 propval; + int i, ret; + + for (i = 0; i < ARRAY_SIZE(rt6245_props); i++) { + ret = device_property_read_u8(dev, rt6245_props[i].name, &propval); + if (ret) + continue; + + ret = regmap_write(regmap, rt6245_props[i].reg, propval); + if (ret) { + dev_err(dev, "Fail to apply [%s:%d]\n", rt6245_props[i].name, propval); + return ret; + } + } + + return 0; +} + +static int rt6245_reg_write(void *context, unsigned int reg, unsigned int val) +{ + struct i2c_client *i2c = context; + static const u8 func_base[] = { 0x6F, 0x73, 0x78, 0x61, 0x7C, 0 }; + unsigned int code, bit_count; + + code = func_base[reg]; + code += val; + + /* xor checksum for bit 6 to 0 */ + bit_count = hweight8(code & RT6245_CODE_MASK); + if (bit_count % 2) + code |= RT6245_CHKSUM_MASK; + else + code &= ~RT6245_CHKSUM_MASK; + + return i2c_smbus_write_byte(i2c, code); +} + +static const struct reg_default rt6245_reg_defaults[] = { + /* Default over current 14A */ + { RT6245_VIRT_OCLIMIT, 2 }, + /* Default over temperature 150'c */ + { RT6245_VIRT_OTLEVEL, 0 }, + /* Default power good delay time 10us */ + { RT6245_VIRT_PGDLYTIME, 1 }, + /* Default slewrate 12.5mV/uS */ + { RT6245_VIRT_SLEWRATE, 0 }, + /* Default switch frequency 800KHz */ + { RT6245_VIRT_SWFREQ, 1 }, + /* Default voltage 750mV */ + { RT6245_VIRT_VOUT, 0x19 } +}; + +static const struct regmap_config rt6245_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RT6245_VIRT_VOUT, + .cache_type = REGCACHE_FLAT, + .reg_defaults = rt6245_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(rt6245_reg_defaults), + .reg_write = rt6245_reg_write, +}; + +static int rt6245_probe(struct i2c_client *i2c) +{ + struct rt6245_priv *priv; + struct regmap *regmap; + struct regulator_config regulator_cfg = {}; + struct regulator_dev *rdev; + int ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->enable_state = true; + + priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpio)) { + dev_err(&i2c->dev, "Failed to get 'enable' gpio\n"); + return PTR_ERR(priv->enable_gpio); + } + + usleep_range(RT6245_ENTIME_IN_US, RT6245_ENTIME_IN_US + 1000); + + regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt6245_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&i2c->dev, "Failed to initialize the regmap\n"); + return PTR_ERR(regmap); + } + + ret = rt6245_init_device_properties(&i2c->dev); + if (ret) { + dev_err(&i2c->dev, "Failed to initialize device properties\n"); + return ret; + } + + regulator_cfg.dev = &i2c->dev; + regulator_cfg.of_node = i2c->dev.of_node; + regulator_cfg.regmap = regmap; + regulator_cfg.driver_data = priv; + regulator_cfg.init_data = of_get_regulator_init_data(&i2c->dev, i2c->dev.of_node, + &rt6245_regulator_desc); + rdev = devm_regulator_register(&i2c->dev, &rt6245_regulator_desc, ®ulator_cfg); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register regulator\n"); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id __maybe_unused rt6245_of_match_table[] = { + { .compatible = "richtek,rt6245", }, + {} +}; +MODULE_DEVICE_TABLE(of, rt6245_of_match_table); + +static struct i2c_driver rt6245_driver = { + .driver = { + .name = "rt6245", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rt6245_of_match_table, + }, + .probe = rt6245_probe, +}; +module_i2c_driver(rt6245_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT6245 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rt8092.c b/drivers/regulator/rt8092.c new file mode 100644 index 000000000..2ea4872ad --- /dev/null +++ b/drivers/regulator/rt8092.c @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (c) 2025 Richtek Technology Corp. +// +// Author: ChiYuan Huang + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT8092_REG_MNTRPT 0x00 +#define RT8092_REG_VOUTH 0x10 +#define RT8092_REG_VOUTL 0x11 +#define RT8092_REG_PWMMODE 0x14 +#define RT8092_REG_EVENT 0x18 +#define RT8092_REG_VBANKH 0x1C +#define RT8092_REG_VBANKL 0x1D +#define RT8092_REG_VBOUND 0x1E + +#define RT8092_TSDEVT_MASK BIT(7) +#define RT8092_PGEVT_MASK BIT(0) +#define RT8092_VSEL_MASK GENMASK(6, 0) +#define RT8092_VOUTEN_MASK BIT(7) +#define RT8092_FPWML_MASK BIT(7) +#define RT8092_FPWMH_MASK BIT(6) +#define RT8092_OCPEVT_MASK BIT(7) +#define RT8092_SCPEVT_MASK BIT(4) +#define RT8092_VINUVEVT_MASK BIT(1) +#define RT8092_VBANK_MASK GENMASK(1, 0) + +#define RT8092_MODE_AUTO 0 +#define RT8092_MODE_FPWM 1 +#define RT8092_VOUT_BASEUV 303125 +#define RT8092_VOUT_STEPUV 3125 +#define RT8092_VOUT_MINSEL 15 +#define RT8092_NUM_VOLTS 128 +#define RT8092_INITSS_US 400 + +static int rt8092_get_vbank_index(struct regmap *regmap, bool vsel_high, unsigned int *vbank_idx) +{ + unsigned int vbank_reg = vsel_high ? RT8092_REG_VBANKH : RT8092_REG_VBANKL; + unsigned int index; + int ret; + + ret = regmap_read(regmap, vbank_reg, &index); + if (ret) + return ret; + + *vbank_idx = FIELD_GET(RT8092_VBANK_MASK, index); + return 0; +} + +static int rt8092_set_operating_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mode_mask, mode_val; + + mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK; + + switch (mode) { + case REGULATOR_MODE_FAST: + mode_val = mode_mask; + break; + case REGULATOR_MODE_NORMAL: + mode_val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val); +} + +static unsigned int rt8092_get_operating_mode(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mode_mask, mode_val; + int ret; + + mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK; + + ret = regmap_read(regmap, RT8092_REG_PWMMODE, &mode_val); + if (ret) + return REGULATOR_MODE_INVALID; + + return mode_val & mode_mask ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static int rt8092_get_error_flags(struct regulator_dev *rdev, unsigned int *flags) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mntrpt, evtrpt, events = 0; + int ret; + + ret = regmap_read(regmap, RT8092_REG_MNTRPT, &mntrpt); + if (ret) + return ret; + + ret = regmap_read(regmap, RT8092_REG_EVENT, &evtrpt); + if (ret) + return ret; + + if (!(mntrpt & RT8092_PGEVT_MASK) || evtrpt & RT8092_VINUVEVT_MASK) + events |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (mntrpt & RT8092_TSDEVT_MASK) + events |= REGULATOR_ERROR_OVER_TEMP; + + if (evtrpt & RT8092_OCPEVT_MASK) + events |= REGULATOR_ERROR_OVER_CURRENT; + + if (evtrpt & RT8092_SCPEVT_MASK) + events |= REGULATOR_ERROR_FAIL; + + *flags = events; + return 0; +} + + +static int rt8092_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int vsel_reg, vsel_val, vbank_idx; + bool vsel_high; + int ret; + + vsel_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH; + vsel_high = desc->vsel_reg == RT8092_REG_VOUTH; + + ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx); + if (ret) + return ret; + + /* VOUT = (BASEUV + STEPUV * VSEL) * 2^vbank_idx */ + uV >>= vbank_idx; + if (uV < RT8092_VOUT_BASEUV) + return -EINVAL; + + vsel_val = (uV - RT8092_VOUT_BASEUV) / RT8092_VOUT_STEPUV; + if (vsel_val < RT8092_VOUT_MINSEL || vsel_val >= RT8092_NUM_VOLTS) + return -EINVAL; + + return regmap_update_bits(regmap, vsel_reg, RT8092_VSEL_MASK, vsel_val); +} + +static int rt8092_set_suspend_enable(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int enable_reg; + + enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH; + return regmap_set_bits(regmap, enable_reg, RT8092_VOUTEN_MASK); +} + +static int rt8092_set_suspend_disable(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int enable_reg; + + enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH; + return regmap_clear_bits(regmap, enable_reg, RT8092_VOUTEN_MASK); +} + +static int rt8092_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct regulator_desc *desc = rdev->desc; + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int mode_mask, mode_val; + + mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWML_MASK : RT8092_FPWMH_MASK; + + switch (mode) { + case REGULATOR_MODE_FAST: + mode_val = mode_mask; + break; + case REGULATOR_MODE_NORMAL: + mode_val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val); +} + +static const struct regulator_ops rt8092_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rt8092_set_operating_mode, + .get_mode = rt8092_get_operating_mode, + .get_error_flags = rt8092_get_error_flags, + .set_suspend_voltage = rt8092_set_suspend_voltage, + .set_suspend_enable = rt8092_set_suspend_enable, + .set_suspend_disable = rt8092_set_suspend_disable, + .set_suspend_mode = rt8092_set_suspend_mode, +}; + +static unsigned int rt8092_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT8092_MODE_AUTO: + return REGULATOR_MODE_NORMAL; + case RT8092_MODE_FPWM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regmap_config rt8092_regmap_cfg = { + .name = "rt8092", + .reg_bits = 8, + .val_bits = 8, + .max_register = RT8092_REG_VBOUND, +}; + +static int rt8092_probe(struct i2c_client *i2c) +{ + unsigned int vbank_idx, min_uV, step_uV; + struct regulator_config cfg = {}; + struct device *dev = &i2c->dev; + struct regulator_desc *desc; + struct regulator_dev *rdev; + struct gpio_desc *enable; + struct regmap *regmap; + bool vsel_high; + int ret; + + desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + enable = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(enable)) + return dev_err_probe(dev, PTR_ERR(enable), "Failed get 'enable' gpio\n"); + + regmap = devm_regmap_init_i2c(i2c, &rt8092_regmap_cfg); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + vsel_high = device_property_read_bool(dev, "richtek,vsel-active-high"); + + ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx); + if (ret) + return dev_err_probe(dev, ret, "Failed to get VOUT bank index\n"); + + /* + * step VOUT = STEP_UV * 2^vbank_idx + * min VOUT = (BASEUV + STEPUV * VMIN_SEL) * 2^vbank_idx + */ + step_uV = RT8092_VOUT_STEPUV << vbank_idx; + min_uV = (RT8092_VOUT_BASEUV + RT8092_VOUT_STEPUV * RT8092_VOUT_MINSEL) << vbank_idx; + + desc->name = "rt8092"; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->ops = &rt8092_regulator_ops; + desc->n_voltages = RT8092_NUM_VOLTS; + desc->min_uV = min_uV; + desc->uV_step = step_uV; + desc->linear_min_sel = RT8092_VOUT_MINSEL; + desc->enable_reg = desc->vsel_reg = vsel_high ? RT8092_REG_VOUTH : RT8092_REG_VOUTL; + desc->vsel_mask = RT8092_VSEL_MASK; + desc->enable_mask = RT8092_VOUTEN_MASK; + desc->enable_time = RT8092_INITSS_US; + desc->of_map_mode = rt8092_of_map_mode; + + cfg.dev = dev; + cfg.of_node = dev_of_node(dev); + cfg.init_data = of_get_regulator_init_data(dev, dev_of_node(dev), desc); + + rdev = devm_regulator_register(dev, desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n"); + + return 0; +} + +static const struct of_device_id rt8092_device_tables[] = { + { .compatible = "richtek,rt8092" }, + {} +}; +MODULE_DEVICE_TABLE(of, rt8092_device_tables); + +static struct i2c_driver rt8092_driver = { + .driver = { + .name = "rt8092", + .of_match_table = rt8092_device_tables, + }, + .probe = rt8092_probe, +}; +module_i2c_driver(rt8092_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT8092 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rtmv20-regulator.c b/drivers/regulator/rtmv20-regulator.c new file mode 100644 index 000000000..3d8d29f87 --- /dev/null +++ b/drivers/regulator/rtmv20-regulator.c @@ -0,0 +1,438 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RTMV20_REG_DEVINFO 0x00 +#define RTMV20_REG_PULSEDELAY 0x01 +#define RTMV20_REG_PULSEWIDTH 0x03 +#define RTMV20_REG_LDCTRL1 0x05 +#define RTMV20_REG_ESPULSEWIDTH 0x06 +#define RTMV20_REG_ESLDCTRL1 0x08 +#define RTMV20_REG_LBP 0x0A +#define RTMV20_REG_LDCTRL2 0x0B +#define RTMV20_REG_FSIN1CTRL1 0x0D +#define RTMV20_REG_FSIN1CTRL3 0x0F +#define RTMV20_REG_FSIN2CTRL1 0x10 +#define RTMV20_REG_FSIN2CTRL3 0x12 +#define RTMV20_REG_ENCTRL 0x13 +#define RTMV20_REG_STRBVSYNDLYL 0x29 +#define RTMV20_REG_LDIRQ 0x30 +#define RTMV20_REG_LDSTAT 0x40 +#define RTMV20_REG_LDMASK 0x50 +#define RTMV20_MAX_REGS (RTMV20_REG_LDMASK + 1) + +#define RTMV20_VID_MASK GENMASK(7, 4) +#define RICHTEK_VID 0x80 +#define RTMV20_LDCURR_MASK GENMASK(7, 0) +#define RTMV20_DELAY_MASK GENMASK(9, 0) +#define RTMV20_WIDTH_MASK GENMASK(13, 0) +#define RTMV20_WIDTH2_MASK GENMASK(7, 0) +#define RTMV20_LBPLVL_MASK GENMASK(3, 0) +#define RTMV20_LBPEN_MASK BIT(7) +#define RTMV20_STROBEPOL_MASK BIT(0) +#define RTMV20_VSYNPOL_MASK BIT(1) +#define RTMV20_FSINEN_MASK BIT(7) +#define RTMV20_ESEN_MASK BIT(6) +#define RTMV20_FSINOUT_MASK BIT(2) +#define LDENABLE_MASK (BIT(3) | BIT(0)) + +#define OTPEVT_MASK BIT(4) +#define SHORTEVT_MASK BIT(3) +#define OPENEVT_MASK BIT(2) +#define LBPEVT_MASK BIT(1) +#define OCPEVT_MASK BIT(0) +#define FAILEVT_MASK (SHORTEVT_MASK | OPENEVT_MASK | LBPEVT_MASK) + +#define RTMV20_LSW_MINUA 0 +#define RTMV20_LSW_MAXUA 6000000 +#define RTMV20_LSW_STEPUA 30000 + +#define RTMV20_LSW_DEFAULTUA 3000000 + +#define RTMV20_I2CRDY_TIMEUS 200 +#define RTMV20_CSRDY_TIMEUS 2000 + +struct rtmv20_priv { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *enable_gpio; + struct regulator_dev *rdev; +}; + +static int rtmv20_lsw_enable(struct regulator_dev *rdev) +{ + struct rtmv20_priv *priv = rdev_get_drvdata(rdev); + int ret; + + gpiod_set_value(priv->enable_gpio, 1); + + /* Wait for I2C can be accessed */ + usleep_range(RTMV20_I2CRDY_TIMEUS, RTMV20_I2CRDY_TIMEUS + 100); + + /* HW re-enable, disable cache only and sync regcache here */ + regcache_cache_only(priv->regmap, false); + ret = regcache_sync(priv->regmap); + if (ret) + return ret; + + return regulator_enable_regmap(rdev); +} + +static int rtmv20_lsw_disable(struct regulator_dev *rdev) +{ + struct rtmv20_priv *priv = rdev_get_drvdata(rdev); + int ret; + + ret = regulator_disable_regmap(rdev); + if (ret) + return ret; + + /* Mark the regcache as dirty and cache only before HW disabled */ + regcache_cache_only(priv->regmap, true); + regcache_mark_dirty(priv->regmap); + + gpiod_set_value(priv->enable_gpio, 0); + + return 0; +} + +static int rtmv20_lsw_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + int sel; + + if (min_uA > RTMV20_LSW_MAXUA || max_uA < RTMV20_LSW_MINUA) + return -EINVAL; + + if (max_uA > RTMV20_LSW_MAXUA) + max_uA = RTMV20_LSW_MAXUA; + + sel = (max_uA - RTMV20_LSW_MINUA) / RTMV20_LSW_STEPUA; + + /* Ensure the selected setting is still in range */ + if ((sel * RTMV20_LSW_STEPUA + RTMV20_LSW_MINUA) < min_uA) + return -EINVAL; + + sel <<= ffs(rdev->desc->csel_mask) - 1; + + return regmap_update_bits(rdev->regmap, rdev->desc->csel_reg, + rdev->desc->csel_mask, sel); +} + +static int rtmv20_lsw_get_current_limit(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->csel_reg, &val); + if (ret) + return ret; + + val &= rdev->desc->csel_mask; + val >>= ffs(rdev->desc->csel_mask) - 1; + + return val * RTMV20_LSW_STEPUA + RTMV20_LSW_MINUA; +} + +static const struct regulator_ops rtmv20_regulator_ops = { + .set_current_limit = rtmv20_lsw_set_current_limit, + .get_current_limit = rtmv20_lsw_get_current_limit, + .enable = rtmv20_lsw_enable, + .disable = rtmv20_lsw_disable, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_desc rtmv20_lsw_desc = { + .name = "rtmv20,lsw", + .of_match = of_match_ptr("lsw"), + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, + .ops = &rtmv20_regulator_ops, + .csel_reg = RTMV20_REG_LDCTRL1, + .csel_mask = RTMV20_LDCURR_MASK, + .enable_reg = RTMV20_REG_ENCTRL, + .enable_mask = LDENABLE_MASK, + .enable_time = RTMV20_CSRDY_TIMEUS, +}; + +static irqreturn_t rtmv20_irq_handler(int irq, void *data) +{ + struct rtmv20_priv *priv = data; + unsigned int val; + int ret; + + ret = regmap_read(priv->regmap, RTMV20_REG_LDIRQ, &val); + if (ret) { + dev_err(priv->dev, "Failed to get irq flags\n"); + return IRQ_NONE; + } + + if (val & OTPEVT_MASK) + regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_TEMP, NULL); + + if (val & OCPEVT_MASK) + regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); + + if (val & FAILEVT_MASK) + regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_FAIL, NULL); + + return IRQ_HANDLED; +} + +static u32 clamp_to_selector(u32 val, u32 min, u32 max, u32 step) +{ + u32 retval = clamp_val(val, min, max); + + return (retval - min) / step; +} + +static int rtmv20_properties_init(struct rtmv20_priv *priv) +{ + const struct { + const char *name; + u32 def; + u32 min; + u32 max; + u32 step; + u32 addr; + u32 mask; + } props[] = { + { "richtek,ld-pulse-delay-us", 0, 0, 100000, 100, RTMV20_REG_PULSEDELAY, + RTMV20_DELAY_MASK }, + { "richtek,ld-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_PULSEWIDTH, + RTMV20_WIDTH_MASK }, + { "richtek,fsin1-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN1CTRL1, + RTMV20_DELAY_MASK }, + { "richtek,fsin1-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN1CTRL3, + RTMV20_WIDTH2_MASK }, + { "richtek,fsin2-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN2CTRL1, + RTMV20_DELAY_MASK }, + { "richtek,fsin2-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN2CTRL3, + RTMV20_WIDTH2_MASK }, + { "richtek,es-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_ESPULSEWIDTH, + RTMV20_WIDTH_MASK }, + { "richtek,es-ld-current-microamp", 3000000, 0, 6000000, 30000, + RTMV20_REG_ESLDCTRL1, RTMV20_LDCURR_MASK }, + { "richtek,lbp-level-microvolt", 2700000, 2400000, 3700000, 100000, RTMV20_REG_LBP, + RTMV20_LBPLVL_MASK }, + { "richtek,lbp-enable", 0, 0, 1, 1, RTMV20_REG_LBP, RTMV20_LBPEN_MASK }, + { "richtek,strobe-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, + RTMV20_STROBEPOL_MASK }, + { "richtek,vsync-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, + RTMV20_VSYNPOL_MASK }, + { "richtek,fsin-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINEN_MASK }, + { "richtek,fsin-output", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINOUT_MASK }, + { "richtek,es-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_ESEN_MASK }, + }; + int i, ret; + + for (i = 0; i < ARRAY_SIZE(props); i++) { + __be16 bval16; + u16 val16; + u32 temp; + int significant_bit = fls(props[i].mask); + int shift = ffs(props[i].mask) - 1; + + if (props[i].max > 1) { + ret = device_property_read_u32(priv->dev, props[i].name, &temp); + if (ret) + temp = props[i].def; + } else + temp = device_property_read_bool(priv->dev, props[i].name); + + temp = clamp_to_selector(temp, props[i].min, props[i].max, props[i].step); + + /* If significant bit is over 8, two byte access, others one */ + if (significant_bit > 8) { + ret = regmap_raw_read(priv->regmap, props[i].addr, &bval16, sizeof(bval16)); + if (ret) + return ret; + + val16 = be16_to_cpu(bval16); + val16 &= ~props[i].mask; + val16 |= (temp << shift); + bval16 = cpu_to_be16(val16); + + ret = regmap_raw_write(priv->regmap, props[i].addr, &bval16, + sizeof(bval16)); + } else { + ret = regmap_update_bits(priv->regmap, props[i].addr, props[i].mask, + temp << shift); + } + + if (ret) + return ret; + } + + return 0; +} + +static int rtmv20_check_chip_exist(struct rtmv20_priv *priv) +{ + unsigned int val; + int ret; + + ret = regmap_read(priv->regmap, RTMV20_REG_DEVINFO, &val); + if (ret) + return ret; + + if ((val & RTMV20_VID_MASK) != RICHTEK_VID) + return -ENODEV; + + return 0; +} + +static bool rtmv20_is_accessible_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RTMV20_REG_DEVINFO ... RTMV20_REG_STRBVSYNDLYL: + case RTMV20_REG_LDIRQ: + case RTMV20_REG_LDSTAT: + case RTMV20_REG_LDMASK: + return true; + } + return false; +} + +static bool rtmv20_is_volatile_reg(struct device *dev, unsigned int reg) +{ + if (reg == RTMV20_REG_LDIRQ || reg == RTMV20_REG_LDSTAT) + return true; + return false; +} + +static const struct regmap_config rtmv20_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_MAPLE, + .max_register = RTMV20_REG_LDMASK, + .num_reg_defaults_raw = RTMV20_MAX_REGS, + + .writeable_reg = rtmv20_is_accessible_reg, + .readable_reg = rtmv20_is_accessible_reg, + .volatile_reg = rtmv20_is_volatile_reg, +}; + +static int rtmv20_probe(struct i2c_client *i2c) +{ + struct rtmv20_priv *priv; + struct regulator_config config = {}; + int ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &i2c->dev; + + /* Before regmap register, configure HW enable to make I2C accessible */ + priv->enable_gpio = devm_gpiod_get(&i2c->dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpio)) { + dev_err(&i2c->dev, "Failed to get enable gpio\n"); + return PTR_ERR(priv->enable_gpio); + } + + /* Wait for I2C can be accessed */ + usleep_range(RTMV20_I2CRDY_TIMEUS, RTMV20_I2CRDY_TIMEUS + 100); + + priv->regmap = devm_regmap_init_i2c(i2c, &rtmv20_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&i2c->dev, "Failed to allocate register map\n"); + return PTR_ERR(priv->regmap); + } + + ret = rtmv20_check_chip_exist(priv); + if (ret) { + dev_err(&i2c->dev, "Chip vendor info is not matched\n"); + return ret; + } + + ret = rtmv20_properties_init(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to init properties\n"); + return ret; + } + + /* + * keep in shutdown mode to minimize the current consumption + * and also mark regcache as dirty + */ + regcache_cache_only(priv->regmap, true); + regcache_mark_dirty(priv->regmap); + gpiod_set_value(priv->enable_gpio, 0); + + config.dev = &i2c->dev; + config.regmap = priv->regmap; + config.driver_data = priv; + priv->rdev = devm_regulator_register(&i2c->dev, &rtmv20_lsw_desc, &config); + if (IS_ERR(priv->rdev)) { + dev_err(&i2c->dev, "Failed to register regulator\n"); + return PTR_ERR(priv->rdev); + } + + /* Unmask all events before IRQ registered */ + ret = regmap_write(priv->regmap, RTMV20_REG_LDMASK, 0); + if (ret) + return ret; + + return devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rtmv20_irq_handler, + IRQF_ONESHOT, dev_name(&i2c->dev), priv); +} + +static int __maybe_unused rtmv20_suspend(struct device *dev) +{ + struct i2c_client *i2c = to_i2c_client(dev); + + /* + * When system suspend, disable irq to prevent interrupt trigger + * during I2C bus suspend + */ + disable_irq(i2c->irq); + if (device_may_wakeup(dev)) + enable_irq_wake(i2c->irq); + + return 0; +} + +static int __maybe_unused rtmv20_resume(struct device *dev) +{ + struct i2c_client *i2c = to_i2c_client(dev); + + /* Enable irq after I2C bus already resume */ + enable_irq(i2c->irq); + if (device_may_wakeup(dev)) + disable_irq_wake(i2c->irq); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(rtmv20_pm, rtmv20_suspend, rtmv20_resume); + +static const struct of_device_id __maybe_unused rtmv20_of_id[] = { + { .compatible = "richtek,rtmv20", }, + {} +}; +MODULE_DEVICE_TABLE(of, rtmv20_of_id); + +static struct i2c_driver rtmv20_driver = { + .driver = { + .name = "rtmv20", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(rtmv20_of_id), + .pm = &rtmv20_pm, + }, + .probe = rtmv20_probe, +}; +module_i2c_driver(rtmv20_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RTMV20 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rtq2134-regulator.c b/drivers/regulator/rtq2134-regulator.c new file mode 100644 index 000000000..b7372cb2b --- /dev/null +++ b/drivers/regulator/rtq2134-regulator.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include + +enum { + RTQ2134_IDX_BUCK1 = 0, + RTQ2134_IDX_BUCK2, + RTQ2134_IDX_BUCK3, + RTQ2134_IDX_MAX +}; + +#define RTQ2134_AUTO_MODE 0 +#define RTQ2134_FCCM_MODE 1 + +#define RTQ2134_BUCK_DVS0_CTRL 0 +#define RTQ2134_BUCK_VSEL_CTRL 2 + +#define RTQ2134_REG_IO_CHIPNAME 0x01 +#define RTQ2134_REG_FLT_RECORDTEMP 0x13 +#define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id)) +#define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id)) +#define RTQ2134_REG_BUCK1_CFG0 0x42 +#define RTQ2134_REG_BUCK1_DVS0CFG1 0x48 +#define RTQ2134_REG_BUCK1_DVS0CFG0 0x49 +#define RTQ2134_REG_BUCK1_DVS1CFG1 0x4A +#define RTQ2134_REG_BUCK1_DVS1CFG0 0x4B +#define RTQ2134_REG_BUCK1_DVSCFG 0x52 +#define RTQ2134_REG_BUCK1_RSPCFG 0x54 +#define RTQ2134_REG_BUCK2_CFG0 0x5F +#define RTQ2134_REG_BUCK2_DVS0CFG1 0x62 +#define RTQ2134_REG_BUCK2_DVS0CFG0 0x63 +#define RTQ2134_REG_BUCK2_DVS1CFG1 0x64 +#define RTQ2134_REG_BUCK2_DVS1CFG0 0x65 +#define RTQ2134_REG_BUCK2_DVSCFG 0x6C +#define RTQ2134_REG_BUCK2_RSPCFG 0x6E +#define RTQ2134_REG_BUCK3_CFG0 0x79 +#define RTQ2134_REG_BUCK3_DVS0CFG1 0x7C +#define RTQ2134_REG_BUCK3_DVS0CFG0 0x7D +#define RTQ2134_REG_BUCK3_DVS1CFG1 0x7E +#define RTQ2134_REG_BUCK3_DVS1CFG0 0x7F +#define RTQ2134_REG_BUCK3_DVSCFG 0x86 +#define RTQ2134_REG_BUCK3_RSPCFG 0x88 +#define RTQ2134_REG_BUCK3_SLEWCTRL 0x89 + +#define RTQ2134_VOUT_MAXNUM 256 +#define RTQ2134_VOUT_MASK 0xFF +#define RTQ2134_VOUTEN_MASK BIT(0) +#define RTQ2134_ACTDISCHG_MASK BIT(0) +#define RTQ2134_RSPUP_MASK GENMASK(6, 4) +#define RTQ2134_FCCM_MASK BIT(5) +#define RTQ2134_UVHICCUP_MASK BIT(3) +#define RTQ2134_BUCKDVS_CTRL_MASK GENMASK(1, 0) +#define RTQ2134_CHIPOT_MASK BIT(2) +#define RTQ2134_BUCKOV_MASK BIT(5) +#define RTQ2134_BUCKUV_MASK BIT(4) + +struct rtq2134_regulator_desc { + struct regulator_desc desc; + /* Extension for proprietary register and mask */ + unsigned int mode_reg; + unsigned int mode_mask; + unsigned int suspend_enable_reg; + unsigned int suspend_enable_mask; + unsigned int suspend_vsel_reg; + unsigned int suspend_vsel_mask; + unsigned int suspend_mode_reg; + unsigned int suspend_mode_mask; + unsigned int dvs_ctrl_reg; +}; + +static int rtq2134_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + unsigned int val; + + if (mode == REGULATOR_MODE_NORMAL) + val = RTQ2134_AUTO_MODE; + else if (mode == REGULATOR_MODE_FAST) + val = RTQ2134_FCCM_MODE; + else + return -EINVAL; + + val <<= ffs(desc->mode_mask) - 1; + return regmap_update_bits(rdev->regmap, desc->mode_reg, desc->mode_mask, + val); +} + +static unsigned int rtq2134_buck_get_mode(struct regulator_dev *rdev) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + unsigned int mode; + int ret; + + ret = regmap_read(rdev->regmap, desc->mode_reg, &mode); + if (ret) + return ret; + + if (mode & desc->mode_mask) + return REGULATOR_MODE_FAST; + return REGULATOR_MODE_NORMAL; +} + +static int rtq2134_buck_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + int sel; + + sel = regulator_map_voltage_linear_range(rdev, uV, uV); + if (sel < 0) + return sel; + + sel <<= ffs(desc->suspend_vsel_mask) - 1; + + return regmap_update_bits(rdev->regmap, desc->suspend_vsel_reg, + desc->suspend_vsel_mask, sel); +} + +static int rtq2134_buck_set_suspend_enable(struct regulator_dev *rdev) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + unsigned int val = desc->suspend_enable_mask; + + return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg, + desc->suspend_enable_mask, val); +} + +static int rtq2134_buck_set_suspend_disable(struct regulator_dev *rdev) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + + return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg, + desc->suspend_enable_mask, 0); +} + +static int rtq2134_buck_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct rtq2134_regulator_desc *desc = + (struct rtq2134_regulator_desc *)rdev->desc; + unsigned int val; + + if (mode == REGULATOR_MODE_NORMAL) + val = RTQ2134_AUTO_MODE; + else if (mode == REGULATOR_MODE_FAST) + val = RTQ2134_FCCM_MODE; + else + return -EINVAL; + + val <<= ffs(desc->suspend_mode_mask) - 1; + return regmap_update_bits(rdev->regmap, desc->suspend_mode_reg, + desc->suspend_mode_mask, val); +} + +static int rtq2134_buck_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + int rid = rdev_get_id(rdev); + unsigned int chip_error, buck_error, events = 0; + int ret; + + ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDTEMP, + &chip_error); + if (ret) { + dev_err(&rdev->dev, "Failed to get chip error flag\n"); + return ret; + } + + ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDBUCK(rid), + &buck_error); + if (ret) { + dev_err(&rdev->dev, "Failed to get buck error flag\n"); + return ret; + } + + if (chip_error & RTQ2134_CHIPOT_MASK) + events |= REGULATOR_ERROR_OVER_TEMP; + + if (buck_error & RTQ2134_BUCKUV_MASK) + events |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (buck_error & RTQ2134_BUCKOV_MASK) + events |= REGULATOR_ERROR_REGULATION_OUT; + + *flags = events; + return 0; +} + +static const struct regulator_ops rtq2134_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_mode = rtq2134_buck_set_mode, + .get_mode = rtq2134_buck_get_mode, + .set_suspend_voltage = rtq2134_buck_set_suspend_voltage, + .set_suspend_enable = rtq2134_buck_set_suspend_enable, + .set_suspend_disable = rtq2134_buck_set_suspend_disable, + .set_suspend_mode = rtq2134_buck_set_suspend_mode, + .get_error_flags = rtq2134_buck_get_error_flags, +}; + +static const struct linear_range rtq2134_buck_vout_ranges[] = { + REGULATOR_LINEAR_RANGE(300000, 0, 200, 5000), + REGULATOR_LINEAR_RANGE(1310000, 201, 255, 10000) +}; + +static unsigned int rtq2134_buck_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RTQ2134_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RTQ2134_FCCM_MODE: + return REGULATOR_MODE_FAST; + } + + return REGULATOR_MODE_INVALID; +} + +static int rtq2134_buck_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) +{ + struct rtq2134_regulator_desc *rdesc = + (struct rtq2134_regulator_desc *)desc; + int rid = desc->id; + bool uv_shutdown, vsel_dvs; + unsigned int val; + int ret; + + vsel_dvs = of_property_read_bool(np, "richtek,use-vsel-dvs"); + if (vsel_dvs) + val = RTQ2134_BUCK_VSEL_CTRL; + else + val = RTQ2134_BUCK_DVS0_CTRL; + + ret = regmap_update_bits(cfg->regmap, rdesc->dvs_ctrl_reg, + RTQ2134_BUCKDVS_CTRL_MASK, val); + if (ret) + return ret; + + uv_shutdown = of_property_read_bool(np, "richtek,uv-shutdown"); + if (uv_shutdown) + val = 0; + else + val = RTQ2134_UVHICCUP_MASK; + + return regmap_update_bits(cfg->regmap, RTQ2134_REG_FLT_BUCKCTRL(rid), + RTQ2134_UVHICCUP_MASK, val); +} + +static const unsigned int rtq2134_buck_ramp_delay_table[] = { + 0, 16000, 0, 8000, 4000, 2000, 1000, 500 +}; + +#define RTQ2134_BUCK_DESC(_id) { \ + .desc = { \ + .name = "rtq2134_buck" #_id, \ + .of_match = of_match_ptr("buck" #_id), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = RTQ2134_IDX_BUCK##_id, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .ops = &rtq2134_buck_ops, \ + .n_voltages = RTQ2134_VOUT_MAXNUM, \ + .linear_ranges = rtq2134_buck_vout_ranges, \ + .n_linear_ranges = ARRAY_SIZE(rtq2134_buck_vout_ranges), \ + .vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \ + .vsel_mask = RTQ2134_VOUT_MASK, \ + .enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \ + .enable_mask = RTQ2134_VOUTEN_MASK, \ + .active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \ + .active_discharge_mask = RTQ2134_ACTDISCHG_MASK, \ + .active_discharge_on = RTQ2134_ACTDISCHG_MASK, \ + .ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \ + .ramp_mask = RTQ2134_RSPUP_MASK, \ + .ramp_delay_table = rtq2134_buck_ramp_delay_table, \ + .n_ramp_values = ARRAY_SIZE(rtq2134_buck_ramp_delay_table), \ + .of_map_mode = rtq2134_buck_of_map_mode, \ + .of_parse_cb = rtq2134_buck_of_parse_cb, \ + }, \ + .mode_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \ + .mode_mask = RTQ2134_FCCM_MASK, \ + .suspend_mode_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \ + .suspend_mode_mask = RTQ2134_FCCM_MASK, \ + .suspend_enable_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \ + .suspend_enable_mask = RTQ2134_VOUTEN_MASK, \ + .suspend_vsel_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG1, \ + .suspend_vsel_mask = RTQ2134_VOUT_MASK, \ + .dvs_ctrl_reg = RTQ2134_REG_BUCK##_id##_DVSCFG, \ +} + +static const struct rtq2134_regulator_desc rtq2134_regulator_descs[] = { + RTQ2134_BUCK_DESC(1), + RTQ2134_BUCK_DESC(2), + RTQ2134_BUCK_DESC(3) +}; + +static bool rtq2134_is_accissible_reg(struct device *dev, unsigned int reg) +{ + if (reg >= RTQ2134_REG_IO_CHIPNAME && reg <= RTQ2134_REG_BUCK3_SLEWCTRL) + return true; + return false; +} + +static const struct regmap_config rtq2134_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RTQ2134_REG_BUCK3_SLEWCTRL, + + .readable_reg = rtq2134_is_accissible_reg, + .writeable_reg = rtq2134_is_accissible_reg, +}; + +static int rtq2134_probe(struct i2c_client *i2c) +{ + struct regmap *regmap; + struct regulator_dev *rdev; + struct regulator_config regulator_cfg = {}; + int i; + + regmap = devm_regmap_init_i2c(i2c, &rtq2134_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&i2c->dev, "Failed to allocate regmap\n"); + return PTR_ERR(regmap); + } + + regulator_cfg.dev = &i2c->dev; + regulator_cfg.regmap = regmap; + for (i = 0; i < ARRAY_SIZE(rtq2134_regulator_descs); i++) { + rdev = devm_regulator_register(&i2c->dev, + &rtq2134_regulator_descs[i].desc, + ®ulator_cfg); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to init %d regulator\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id __maybe_unused rtq2134_device_tables[] = { + { .compatible = "richtek,rtq2134", }, + {} +}; +MODULE_DEVICE_TABLE(of, rtq2134_device_tables); + +static struct i2c_driver rtq2134_driver = { + .driver = { + .name = "rtq2134", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rtq2134_device_tables, + }, + .probe = rtq2134_probe, +}; +module_i2c_driver(rtq2134_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RTQ2134 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/rtq2208-regulator.c b/drivers/regulator/rtq2208-regulator.c new file mode 100644 index 000000000..b4eb5d3eb --- /dev/null +++ b/drivers/regulator/rtq2208-regulator.c @@ -0,0 +1,672 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register */ +#define RTQ2208_REG_FSOUTB_CNTL 0x11 +#define RTQ2208_REG_GLOBAL_INT1 0x12 +#define RTQ2208_REG_FLT_RECORDBUCK_CB 0x18 +#define RTQ2208_REG_GLOBAL_INT1_MASK 0x1D +#define RTQ2208_REG_FLT_MASKBUCK_CB 0x1F +#define RTQ2208_REG_BUCK_C_CFG0 0x32 +#define RTQ2208_REG_BUCK_B_CFG0 0x42 +#define RTQ2208_REG_BUCK_A_CFG0 0x52 +#define RTQ2208_REG_BUCK_D_CFG0 0x62 +#define RTQ2208_REG_BUCK_G_CFG0 0x72 +#define RTQ2208_REG_BUCK_F_CFG0 0x82 +#define RTQ2208_REG_BUCK_E_CFG0 0x92 +#define RTQ2208_REG_BUCK_H_CFG0 0xA2 +#define RTQ2208_REG_LDO1_CFG 0xB1 +#define RTQ2208_REG_LDO2_CFG 0xC1 +#define RTQ2208_REG_LDO_DVS_CTRL 0xD0 +#define RTQ2208_REG_HIDDEN_BUCKPH 0x55 +#define RTQ2208_REG_HIDDEN_LDOCFG0 0x8F +#define RTQ2208_REG_HIDDEN_LDOCFG1 0x96 +#define RTQ2208_REG_HIDDEN0 0xFE +#define RTQ2208_REG_HIDDEN1 0xFF + +/* Mask */ +#define RTQ2208_MTP_SEL_RO_MASK BIT(7) +#define RTQ2208_BUCK_NR_MTP_SEL_MASK GENMASK(7, 0) +#define RTQ2208_BUCK_EN_NR_MTP_SEL0_MASK BIT(0) +#define RTQ2208_BUCK_EN_NR_MTP_SEL1_MASK BIT(1) +#define RTQ2208_BUCK_RSPUP_MASK GENMASK(6, 4) +#define RTQ2208_BUCK_RSPDN_MASK GENMASK(2, 0) +#define RTQ2208_BUCK_NRMODE_MASK BIT(5) +#define RTQ2208_BUCK_STRMODE_MASK BIT(5) +#define RTQ2208_BUCK_EN_STR_MASK BIT(0) +#define RTQ2208_LDO_EN_STR_MASK BIT(7) +#define RTQ2208_EN_DIS_MASK BIT(0) +#define RTQ2208_BUCK_RAMP_SEL_MASK GENMASK(2, 0) +#define RTQ2208_HD_INT_MASK BIT(0) +#define RTQ2208_LDO1_DISCHG_EN_MASK BIT(4) +#define RTQ2208_LDO1_VOSEL_SD_MASK BIT(5) +#define RTQ2208_LDO2_DISCHG_EN_MASK BIT(6) +#define RTQ2208_LDO2_VOSEL_SD_MASK BIT(7) +#define RTQ2208_MASK_BUCKPH_GROUP1 GENMASK(6, 4) +#define RTQ2208_MASK_BUCKPH_GROUP2 GENMASK(2, 0) +#define RTQ2208_MASK_LDO2_OPT0 BIT(7) +#define RTQ2208_MASK_LDO2_OPT1 BIT(7) +#define RTQ2208_MASK_LDO1_FIXED BIT(6) + +/* Size */ +#define RTQ2208_VOUT_MAXNUM 256 +#define RTQ2208_BUCK_NUM_IRQ_REGS 5 +#define RTQ2208_STS_NUM_IRQ_REGS 2 + +/* Value */ +#define RTQ2208_RAMP_VALUE_MIN_uV 500 +#define RTQ2208_RAMP_VALUE_MAX_uV 16000 + +#define RTQ2208_BUCK_MASK(uv_irq, ov_irq) (1 << ((uv_irq) % 8) | 1 << ((ov_irq) % 8)) + +enum { + RTQ2208_BUCK_B = 0, + RTQ2208_BUCK_C, + RTQ2208_BUCK_D, + RTQ2208_BUCK_A, + RTQ2208_BUCK_F, + RTQ2208_BUCK_G, + RTQ2208_BUCK_H, + RTQ2208_BUCK_E, + RTQ2208_LDO2, + RTQ2208_LDO1, + RTQ2208_LDO_MAX, +}; + +enum { + RTQ2208_AUTO_MODE = 0, + RTQ2208_FCCM, +}; + +struct rtq2208_regulator_desc { + struct regulator_desc desc; + unsigned int mtp_sel_reg; + unsigned int mtp_sel_mask; + unsigned int mode_reg; + unsigned int mode_mask; + unsigned int suspend_config_reg; + unsigned int suspend_enable_mask; + unsigned int suspend_mode_mask; +}; + +struct rtq2208_rdev_map { + struct regulator_dev *rdev[RTQ2208_LDO_MAX]; + struct regmap *regmap; + struct device *dev; +}; + +/* set Normal Auto/FCCM mode */ +static int rtq2208_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int val, shift; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = RTQ2208_AUTO_MODE; + break; + case REGULATOR_MODE_FAST: + val = RTQ2208_FCCM; + break; + default: + return -EINVAL; + } + + shift = ffs(rdesc->mode_mask) - 1; + return regmap_update_bits(rdev->regmap, rdesc->mode_reg, + rdesc->mode_mask, val << shift); +} + +static unsigned int rtq2208_get_mode(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int mode_val; + int ret; + + ret = regmap_read(rdev->regmap, rdesc->mode_reg, &mode_val); + if (ret) + return REGULATOR_MODE_INVALID; + + return (mode_val & rdesc->mode_mask) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static int rtq2208_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + const struct regulator_desc *desc = rdev->desc; + unsigned int sel = 0, val; + + ramp_delay = max(ramp_delay, RTQ2208_RAMP_VALUE_MIN_uV); + ramp_delay = min(ramp_delay, RTQ2208_RAMP_VALUE_MAX_uV); + + ramp_delay /= RTQ2208_RAMP_VALUE_MIN_uV; + + /* + * fls(ramp_delay) - 1: doing LSB shift, let it starts from 0 + * + * RTQ2208_BUCK_RAMP_SEL_MASK - sel: doing descending order shifting. + * Because the relation of seleltion and value is like that + * + * seletion: value + * 010: 16mv + * ... + * 111: 0.5mv + * + * For example, if I would like to select 16mv, the fls(ramp_delay) - 1 will be 0b010, + * and I need to use 0b111 - sel to do the shifting + */ + + sel = fls(ramp_delay) - 1; + sel = RTQ2208_BUCK_RAMP_SEL_MASK - sel; + + val = FIELD_PREP(RTQ2208_BUCK_RSPUP_MASK, sel) | FIELD_PREP(RTQ2208_BUCK_RSPDN_MASK, sel); + + return regmap_update_bits(rdev->regmap, desc->ramp_reg, + RTQ2208_BUCK_RSPUP_MASK | RTQ2208_BUCK_RSPDN_MASK, val); +} + +static int rtq2208_set_suspend_enable(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + + return regmap_set_bits(rdev->regmap, rdesc->suspend_config_reg, rdesc->suspend_enable_mask); +} + +static int rtq2208_set_suspend_disable(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + + return regmap_update_bits(rdev->regmap, rdesc->suspend_config_reg, rdesc->suspend_enable_mask, 0); +} + +static int rtq2208_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int val, shift; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = RTQ2208_AUTO_MODE; + break; + case REGULATOR_MODE_FAST: + val = RTQ2208_FCCM; + break; + default: + return -EINVAL; + } + + shift = ffs(rdesc->suspend_mode_mask) - 1; + + return regmap_update_bits(rdev->regmap, rdesc->suspend_config_reg, + rdesc->suspend_mode_mask, val << shift); +} + +static const struct regulator_ops rtq2208_regulator_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_mode = rtq2208_set_mode, + .get_mode = rtq2208_get_mode, + .set_ramp_delay = rtq2208_set_ramp_delay, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_suspend_enable = rtq2208_set_suspend_enable, + .set_suspend_disable = rtq2208_set_suspend_disable, + .set_suspend_mode = rtq2208_set_suspend_mode, +}; + +static const struct regulator_ops rtq2208_regulator_ldo_fix_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_suspend_enable = rtq2208_set_suspend_enable, + .set_suspend_disable = rtq2208_set_suspend_disable, +}; + +static const struct regulator_ops rtq2208_regulator_ldo_adj_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_suspend_enable = rtq2208_set_suspend_enable, + .set_suspend_disable = rtq2208_set_suspend_disable, +}; + +static const unsigned int rtq2208_ldo_volt_table[] = { + 1800000, + 3300000, +}; + +static unsigned int rtq2208_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RTQ2208_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RTQ2208_FCCM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int rtq2208_init_irq_mask(struct rtq2208_rdev_map *rdev_map, unsigned int *buck_masks) +{ + unsigned char buck_clr_masks[5] = {0x33, 0x33, 0x33, 0x33, 0x33}, + sts_clr_masks[2] = {0xE7, 0xF7}, sts_masks[2] = {0xE6, 0xF6}; + int ret; + + /* write clear all buck irq once */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, buck_clr_masks, 5); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to clr buck irqs\n"); + + /* write clear general irq once */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, sts_clr_masks, 2); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to clr general irqs\n"); + + /* unmask buck ov/uv irq */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_MASKBUCK_CB, buck_masks, 5); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to unmask buck irqs\n"); + + /* unmask needed general irq */ + return regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1_MASK, sts_masks, 2); +} + +static irqreturn_t rtq2208_irq_handler(int irqno, void *devid) +{ + unsigned char buck_flags[RTQ2208_BUCK_NUM_IRQ_REGS], sts_flags[RTQ2208_STS_NUM_IRQ_REGS]; + int ret = 0, i, uv_bit, ov_bit; + struct rtq2208_rdev_map *rdev_map = devid; + struct regulator_dev *rdev; + + if (!rdev_map) + return IRQ_NONE; + + /* read irq event */ + ret = regmap_bulk_read(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, + buck_flags, ARRAY_SIZE(buck_flags)); + if (ret) + return IRQ_NONE; + + ret = regmap_bulk_read(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, + sts_flags, ARRAY_SIZE(sts_flags)); + if (ret) + return IRQ_NONE; + + /* clear irq event */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, + buck_flags, ARRAY_SIZE(buck_flags)); + if (ret) + return IRQ_NONE; + + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, + sts_flags, ARRAY_SIZE(sts_flags)); + if (ret) + return IRQ_NONE; + + for (i = 0; i < RTQ2208_LDO_MAX; i++) { + if (!rdev_map->rdev[i]) + continue; + + rdev = rdev_map->rdev[i]; + /* uv irq */ + uv_bit = (i & 1) ? 4 : 0; + if (buck_flags[i >> 1] & (1 << uv_bit)) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_UNDER_VOLTAGE, NULL); + /* ov irq */ + ov_bit = uv_bit + 1; + if (buck_flags[i >> 1] & (1 << ov_bit)) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_REGULATION_OUT, NULL); + + /* hd irq */ + if (sts_flags[1] & RTQ2208_HD_INT_MASK) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_OVER_TEMP, NULL); + } + + return IRQ_HANDLED; +} + +#define BUCK_INFO(_name, _id) \ +{ \ + .name = _name, \ + .base = RTQ2208_REG_BUCK_##_id##_CFG0, \ + .enable_reg = BUCK_RG_SHIFT(RTQ2208_REG_BUCK_##_id##_CFG0, 2), \ + .dis_reg = RTQ2208_REG_BUCK_##_id##_CFG0, \ +} + +#define LDO_INFO(_name, _id) \ +{ \ + .name = _name, \ + .base = RTQ2208_REG_LDO##_id##_CFG, \ + .enable_reg = RTQ2208_REG_LDO##_id##_CFG, \ + .dis_mask = RTQ2208_LDO##_id##_DISCHG_EN_MASK, \ + .dis_on = RTQ2208_LDO##_id##_DISCHG_EN_MASK, \ + .vsel_mask = RTQ2208_LDO##_id##_VOSEL_SD_MASK, \ +} + +#define BUCK_RG_SHIFT(_base, _shift) (_base + _shift) +#define VSEL_SHIFT(_sel) (_sel ? 3 : 1) +#define MTP_SEL_MASK(_sel) RTQ2208_BUCK_EN_NR_MTP_SEL##_sel##_MASK + +static const struct linear_range rtq2208_vout_range[] = { + REGULATOR_LINEAR_RANGE(400000, 0, 180, 5000), + REGULATOR_LINEAR_RANGE(1310000, 181, 255, 10000), +}; + +static void rtq2208_init_regulator_desc(struct rtq2208_regulator_desc *rdesc, int mtp_sel, int idx, + unsigned int ldo1_fixed, unsigned int ldo2_fixed) +{ + struct regulator_desc *desc; + unsigned int fixed_uV; + static const struct { + char *name; + int base; + int enable_reg; + int dis_reg; + int dis_mask; + int dis_on; + int vsel_mask; + } regulator_info[] = { + BUCK_INFO("buck-b", B), + BUCK_INFO("buck-c", C), + BUCK_INFO("buck-d", D), + BUCK_INFO("buck-a", A), + BUCK_INFO("buck-f", F), + BUCK_INFO("buck-g", G), + BUCK_INFO("buck-h", H), + BUCK_INFO("buck-e", E), + LDO_INFO("ldo2", 2), + LDO_INFO("ldo1", 1), + }, *curr_info; + + curr_info = regulator_info + idx; + desc = &rdesc->desc; + desc->name = curr_info->name; + desc->of_match = of_match_ptr(curr_info->name); + desc->regulators_node = of_match_ptr("regulators"); + desc->id = idx; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->enable_mask = mtp_sel ? MTP_SEL_MASK(1) : MTP_SEL_MASK(0); + desc->enable_reg = curr_info->enable_reg; + desc->active_discharge_off = 0; + + rdesc->mode_mask = RTQ2208_BUCK_NRMODE_MASK; + + switch (idx) { + case RTQ2208_BUCK_B ... RTQ2208_BUCK_E: + /* init buck desc */ + desc->ops = &rtq2208_regulator_buck_ops; + desc->vsel_reg = curr_info->base + VSEL_SHIFT(mtp_sel); + desc->vsel_mask = RTQ2208_BUCK_NR_MTP_SEL_MASK; + desc->n_voltages = RTQ2208_VOUT_MAXNUM; + desc->linear_ranges = rtq2208_vout_range; + desc->n_linear_ranges = ARRAY_SIZE(rtq2208_vout_range); + desc->ramp_reg = BUCK_RG_SHIFT(curr_info->base, 5); + desc->of_map_mode = rtq2208_of_map_mode; + desc->active_discharge_reg = curr_info->dis_reg; + desc->active_discharge_on = RTQ2208_EN_DIS_MASK; + desc->active_discharge_mask = RTQ2208_EN_DIS_MASK; + + rdesc->mode_reg = BUCK_RG_SHIFT(curr_info->base, 2); + rdesc->suspend_config_reg = BUCK_RG_SHIFT(curr_info->base, 4); + rdesc->suspend_enable_mask = RTQ2208_BUCK_EN_STR_MASK; + rdesc->suspend_mode_mask = RTQ2208_BUCK_STRMODE_MASK; + break; + default: + fixed_uV = idx == RTQ2208_LDO2 ? ldo2_fixed : ldo1_fixed; + if (fixed_uV) { + desc->n_voltages = 1; + desc->fixed_uV = fixed_uV; + desc->ops = &rtq2208_regulator_ldo_fix_ops; + } else { + desc->n_voltages = ARRAY_SIZE(rtq2208_ldo_volt_table); + desc->volt_table = rtq2208_ldo_volt_table; + desc->ops = &rtq2208_regulator_ldo_adj_ops; + } + + /* init ldo desc */ + desc->active_discharge_reg = RTQ2208_REG_LDO_DVS_CTRL; + desc->active_discharge_on = curr_info->dis_on; + desc->active_discharge_mask = curr_info->dis_mask; + desc->vsel_reg = RTQ2208_REG_LDO_DVS_CTRL; + desc->vsel_mask = curr_info->vsel_mask; + + rdesc->suspend_config_reg = curr_info->base; + rdesc->suspend_enable_mask = RTQ2208_LDO_EN_STR_MASK; + break; + } +} + +static int rtq2208_parse_regulator_dt_data(int n_regulator, const unsigned int *regulator_idx_table, + struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX], struct device *dev, + unsigned int ldo1_fixed, unsigned int ldo2_fixed) +{ + struct regmap *regmap = dev_get_regmap(dev, NULL); + int mtp_sel, i, idx; + + /* get mtp_sel0 or mtp_sel1 */ + mtp_sel = regmap_test_bits(regmap, RTQ2208_REG_FSOUTB_CNTL, RTQ2208_MTP_SEL_RO_MASK); + if (mtp_sel < 0) + return dev_err_probe(dev, mtp_sel, "Failed to init mtp_sel state\n"); + + for (i = 0; i < n_regulator; i++) { + idx = regulator_idx_table[i]; + + rdesc[i] = devm_kcalloc(dev, 1, sizeof(*rdesc[0]), GFP_KERNEL); + if (!rdesc[i]) + return -ENOMEM; + + rtq2208_init_regulator_desc(rdesc[i], mtp_sel, idx, ldo1_fixed, ldo2_fixed); + } + + return 0; + +} + +static int rtq2208_regulator_check(struct device *dev, int *num, int *regulator_idx_table, + unsigned int *buck_masks, unsigned int *ldo1_fixed_uV, + unsigned int *ldo2_fixed_uV) +{ + struct regmap *regmap = dev_get_regmap(dev, NULL); + bool rtq2208_used_table[RTQ2208_LDO_MAX] = {0}; + u8 entry_key[] = { 0x69, 0x01 }; + unsigned int buck_phase, ldo_cfg0, ldo_cfg1; + int i, ret; + u8 mask; + + ret = regmap_raw_write(regmap, RTQ2208_REG_HIDDEN0, entry_key, ARRAY_SIZE(entry_key)); + if (ret) + return dev_err_probe(dev, ret, "Failed to enter hidden page\n"); + + ret = regmap_read(regmap, RTQ2208_REG_HIDDEN_BUCKPH, &buck_phase); + if (ret) + return dev_err_probe(dev, ret, "Failed to read buck phase configuration\n"); + + ret = regmap_read(regmap, RTQ2208_REG_HIDDEN_LDOCFG0, &ldo_cfg0); + if (ret) + return dev_err_probe(dev, ret, "Failed to read ldo cfg0\n"); + + ret = regmap_read(regmap, RTQ2208_REG_HIDDEN_LDOCFG1, &ldo_cfg1); + if (ret) + return dev_err_probe(dev, ret, "Failed to read ldo cfg1\n"); + + ret = regmap_write(regmap, RTQ2208_REG_HIDDEN1, 0x00); + if (ret) + return dev_err_probe(dev, ret, "Failed to exit hidden page\n"); + + dev_info(dev, "BUCK Phase 0x%x\n", buck_phase); + /* + * Use buck phase configuration to assign used table mask + * GROUP1 GROUP2 + * 0 -> 2P + 2P BC FG + * 1 -> 2P + 1P + 1P BCA FGE + * 2 -> 1P + 1P + 1P + 1P BCDA FGHE + * 3 -> 3P + 1P BC FG + * others -> 4P C G + */ + switch (FIELD_GET(RTQ2208_MASK_BUCKPH_GROUP1, buck_phase)) { + case 2: + rtq2208_used_table[RTQ2208_BUCK_D] = true; + fallthrough; + case 1: + rtq2208_used_table[RTQ2208_BUCK_A] = true; + fallthrough; + case 0: + case 3: + rtq2208_used_table[RTQ2208_BUCK_B] = true; + fallthrough; + default: + rtq2208_used_table[RTQ2208_BUCK_C] = true; + break; + } + + switch (FIELD_GET(RTQ2208_MASK_BUCKPH_GROUP2, buck_phase)) { + case 2: + rtq2208_used_table[RTQ2208_BUCK_H] = true; + fallthrough; + case 1: + rtq2208_used_table[RTQ2208_BUCK_E] = true; + fallthrough; + case 0: + case 3: + rtq2208_used_table[RTQ2208_BUCK_F] = true; + fallthrough; + default: + rtq2208_used_table[RTQ2208_BUCK_G] = true; + break; + } + + *ldo1_fixed_uV = FIELD_GET(RTQ2208_MASK_LDO1_FIXED, ldo_cfg1) ? 1200000 : 0; + + if (!FIELD_GET(RTQ2208_MASK_LDO2_OPT0, ldo_cfg0) && + !FIELD_GET(RTQ2208_MASK_LDO2_OPT1, ldo_cfg1)) + *ldo2_fixed_uV = 0; + else if (FIELD_GET(RTQ2208_MASK_LDO2_OPT1, ldo_cfg1)) + *ldo2_fixed_uV = 900000; + else + *ldo2_fixed_uV = 1200000; + + /* By default, LDO1 & LDO2 are always used */ + rtq2208_used_table[RTQ2208_LDO1] = rtq2208_used_table[RTQ2208_LDO2] = true; + + for (i = 0; i < RTQ2208_LDO_MAX; i++) { + if (!rtq2208_used_table[i]) + continue; + + regulator_idx_table[(*num)++] = i; + + mask = RTQ2208_BUCK_MASK(4 * i, 4 * i + 1); + buck_masks[i >> 1] &= ~mask; + } + + return 0; +} + +static const struct regmap_config rtq2208_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xFF, +}; + +static int rtq2208_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regmap *regmap; + struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX]; + struct regulator_dev *rdev; + struct regulator_config cfg = {}; + struct rtq2208_rdev_map *rdev_map; + int i, ret = 0, idx, n_regulator = 0; + unsigned int regulator_idx_table[RTQ2208_LDO_MAX], + buck_masks[RTQ2208_BUCK_NUM_IRQ_REGS] = {0x33, 0x33, 0x33, 0x33, 0x33}; + unsigned int ldo1_fixed_uV, ldo2_fixed_uV; + + rdev_map = devm_kzalloc(dev, sizeof(struct rtq2208_rdev_map), GFP_KERNEL); + if (!rdev_map) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(i2c, &rtq2208_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to allocate regmap\n"); + + /* get needed regulator */ + ret = rtq2208_regulator_check(dev, &n_regulator, regulator_idx_table, buck_masks, + &ldo1_fixed_uV, &ldo2_fixed_uV); + if (ret) + return dev_err_probe(dev, ret, "Failed to check used regulators\n"); + + rdev_map->regmap = regmap; + rdev_map->dev = dev; + + cfg.dev = dev; + + /* init regulator desc */ + ret = rtq2208_parse_regulator_dt_data(n_regulator, regulator_idx_table, rdesc, dev, + ldo1_fixed_uV, ldo2_fixed_uV); + if (ret) + return ret; + + for (i = 0; i < n_regulator; i++) { + idx = regulator_idx_table[i]; + + /* register regulator */ + rdev = devm_regulator_register(dev, &rdesc[i]->desc, &cfg); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + rdev_map->rdev[idx] = rdev; + } + + /* init interrupt mask */ + ret = rtq2208_init_irq_mask(rdev_map, buck_masks); + if (ret) + return ret; + + /* register interrupt */ + return devm_request_threaded_irq(dev, i2c->irq, NULL, rtq2208_irq_handler, + IRQF_ONESHOT, dev_name(dev), rdev_map); +} + +static const struct of_device_id rtq2208_device_tables[] = { + { .compatible = "richtek,rtq2208" }, + {} +}; +MODULE_DEVICE_TABLE(of, rtq2208_device_tables); + +static struct i2c_driver rtq2208_driver = { + .driver = { + .name = "rtq2208", + .of_match_table = rtq2208_device_tables, + }, + .probe = rtq2208_probe, +}; +module_i2c_driver(rtq2208_driver); + +MODULE_AUTHOR("Alina Yu "); +MODULE_DESCRIPTION("Richtek RTQ2208 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/rtq6752-regulator.c b/drivers/regulator/rtq6752-regulator.c new file mode 100644 index 000000000..618904ede --- /dev/null +++ b/drivers/regulator/rtq6752-regulator.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + RTQ6752_IDX_PAVDD = 0, + RTQ6752_IDX_NAVDD = 1, + RTQ6752_IDX_MAX +}; + +#define RTQ6752_REG_PAVDD 0x00 +#define RTQ6752_REG_NAVDD 0x01 +#define RTQ6752_REG_PAVDDONDLY 0x07 +#define RTQ6752_REG_PAVDDSSTIME 0x08 +#define RTQ6752_REG_NAVDDONDLY 0x0D +#define RTQ6752_REG_NAVDDSSTIME 0x0E +#define RTQ6752_REG_OPTION1 0x12 +#define RTQ6752_REG_CHSWITCH 0x16 +#define RTQ6752_REG_FAULT 0x1D + +#define RTQ6752_VOUT_MASK GENMASK(5, 0) +#define RTQ6752_NAVDDEN_MASK BIT(3) +#define RTQ6752_PAVDDEN_MASK BIT(0) +#define RTQ6752_PAVDDAD_MASK BIT(4) +#define RTQ6752_NAVDDAD_MASK BIT(3) +#define RTQ6752_PAVDDF_MASK BIT(3) +#define RTQ6752_NAVDDF_MASK BIT(0) +#define RTQ6752_ENABLE_MASK (BIT(RTQ6752_IDX_MAX) - 1) + +#define RTQ6752_VOUT_MINUV 5000000 +#define RTQ6752_VOUT_STEPUV 50000 +#define RTQ6752_VOUT_NUM 47 +#define RTQ6752_I2CRDY_TIMEUS 1000 +#define RTQ6752_MINSS_TIMEUS 5000 + +struct rtq6752_priv { + struct regmap *regmap; + struct gpio_desc *enable_gpio; + struct mutex lock; + unsigned char enable_flag; +}; + +static int rtq6752_set_vdd_enable(struct regulator_dev *rdev) +{ + struct rtq6752_priv *priv = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev), ret; + + mutex_lock(&priv->lock); + if (!priv->enable_flag) { + if (priv->enable_gpio) { + gpiod_set_value(priv->enable_gpio, 1); + + usleep_range(RTQ6752_I2CRDY_TIMEUS, + RTQ6752_I2CRDY_TIMEUS + 100); + } + + regcache_cache_only(priv->regmap, false); + ret = regcache_sync(priv->regmap); + if (ret) { + mutex_unlock(&priv->lock); + return ret; + } + } + + priv->enable_flag |= BIT(rid); + mutex_unlock(&priv->lock); + + return regulator_enable_regmap(rdev); +} + +static int rtq6752_set_vdd_disable(struct regulator_dev *rdev) +{ + struct rtq6752_priv *priv = rdev_get_drvdata(rdev); + int rid = rdev_get_id(rdev), ret; + + ret = regulator_disable_regmap(rdev); + if (ret) + return ret; + + mutex_lock(&priv->lock); + priv->enable_flag &= ~BIT(rid); + + if (!priv->enable_flag) { + regcache_cache_only(priv->regmap, true); + regcache_mark_dirty(priv->regmap); + + if (priv->enable_gpio) + gpiod_set_value(priv->enable_gpio, 0); + + } + mutex_unlock(&priv->lock); + + return 0; +} + +static int rtq6752_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + unsigned int val, events = 0; + static const unsigned int fault_mask[] = { + RTQ6752_PAVDDF_MASK, RTQ6752_NAVDDF_MASK }; + int rid = rdev_get_id(rdev), ret; + + ret = regmap_read(rdev->regmap, RTQ6752_REG_FAULT, &val); + if (ret) + return ret; + + if (val & fault_mask[rid]) + events = REGULATOR_ERROR_REGULATION_OUT; + + *flags = events; + return 0; +} + +static const struct regulator_ops rtq6752_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = rtq6752_set_vdd_enable, + .disable = rtq6752_set_vdd_disable, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .get_error_flags = rtq6752_get_error_flags, +}; + +static const struct regulator_desc rtq6752_regulator_descs[] = { + { + .name = "rtq6752-pavdd", + .of_match = of_match_ptr("pavdd"), + .regulators_node = of_match_ptr("regulators"), + .id = RTQ6752_IDX_PAVDD, + .n_voltages = RTQ6752_VOUT_NUM, + .ops = &rtq6752_regulator_ops, + .owner = THIS_MODULE, + .min_uV = RTQ6752_VOUT_MINUV, + .uV_step = RTQ6752_VOUT_STEPUV, + .enable_time = RTQ6752_MINSS_TIMEUS, + .vsel_reg = RTQ6752_REG_PAVDD, + .vsel_mask = RTQ6752_VOUT_MASK, + .enable_reg = RTQ6752_REG_CHSWITCH, + .enable_mask = RTQ6752_PAVDDEN_MASK, + .active_discharge_reg = RTQ6752_REG_OPTION1, + .active_discharge_mask = RTQ6752_PAVDDAD_MASK, + .active_discharge_off = RTQ6752_PAVDDAD_MASK, + }, + { + .name = "rtq6752-navdd", + .of_match = of_match_ptr("navdd"), + .regulators_node = of_match_ptr("regulators"), + .id = RTQ6752_IDX_NAVDD, + .n_voltages = RTQ6752_VOUT_NUM, + .ops = &rtq6752_regulator_ops, + .owner = THIS_MODULE, + .min_uV = RTQ6752_VOUT_MINUV, + .uV_step = RTQ6752_VOUT_STEPUV, + .enable_time = RTQ6752_MINSS_TIMEUS, + .vsel_reg = RTQ6752_REG_NAVDD, + .vsel_mask = RTQ6752_VOUT_MASK, + .enable_reg = RTQ6752_REG_CHSWITCH, + .enable_mask = RTQ6752_NAVDDEN_MASK, + .active_discharge_reg = RTQ6752_REG_OPTION1, + .active_discharge_mask = RTQ6752_NAVDDAD_MASK, + .active_discharge_off = RTQ6752_NAVDDAD_MASK, + } +}; + +static int rtq6752_init_device_properties(struct rtq6752_priv *priv) +{ + u8 raw_vals[] = { 0, 0 }; + int ret; + + /* Configure PAVDD on and softstart delay time to the minimum */ + ret = regmap_raw_write(priv->regmap, RTQ6752_REG_PAVDDONDLY, raw_vals, + ARRAY_SIZE(raw_vals)); + if (ret) + return ret; + + /* Configure NAVDD on and softstart delay time to the minimum */ + return regmap_raw_write(priv->regmap, RTQ6752_REG_NAVDDONDLY, raw_vals, + ARRAY_SIZE(raw_vals)); +} + +static bool rtq6752_is_volatile_reg(struct device *dev, unsigned int reg) +{ + if (reg == RTQ6752_REG_FAULT) + return true; + return false; +} + +static const struct reg_default rtq6752_reg_defaults[] = { + { RTQ6752_REG_PAVDD, 0x14 }, + { RTQ6752_REG_NAVDD, 0x14 }, + { RTQ6752_REG_PAVDDONDLY, 0x01 }, + { RTQ6752_REG_PAVDDSSTIME, 0x01 }, + { RTQ6752_REG_NAVDDONDLY, 0x01 }, + { RTQ6752_REG_NAVDDSSTIME, 0x01 }, + { RTQ6752_REG_OPTION1, 0x07 }, + { RTQ6752_REG_CHSWITCH, 0x29 }, +}; + +static const struct regmap_config rtq6752_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_MAPLE, + .max_register = RTQ6752_REG_FAULT, + .reg_defaults = rtq6752_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(rtq6752_reg_defaults), + .volatile_reg = rtq6752_is_volatile_reg, +}; + +static int rtq6752_probe(struct i2c_client *i2c) +{ + struct rtq6752_priv *priv; + struct regulator_config reg_cfg = {}; + struct regulator_dev *rdev; + int i, ret; + + priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->lock); + + priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable", + GPIOD_OUT_HIGH); + if (IS_ERR(priv->enable_gpio)) { + dev_err(&i2c->dev, "Failed to get 'enable' gpio\n"); + return PTR_ERR(priv->enable_gpio); + } + + usleep_range(RTQ6752_I2CRDY_TIMEUS, RTQ6752_I2CRDY_TIMEUS + 100); + /* Default EN pin to high, PAVDD and NAVDD will be on */ + priv->enable_flag = RTQ6752_ENABLE_MASK; + + priv->regmap = devm_regmap_init_i2c(i2c, &rtq6752_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&i2c->dev, "Failed to init regmap\n"); + return PTR_ERR(priv->regmap); + } + + ret = rtq6752_init_device_properties(priv); + if (ret) { + dev_err(&i2c->dev, "Failed to init device properties\n"); + return ret; + } + + reg_cfg.dev = &i2c->dev; + reg_cfg.regmap = priv->regmap; + reg_cfg.driver_data = priv; + + for (i = 0; i < ARRAY_SIZE(rtq6752_regulator_descs); i++) { + rdev = devm_regulator_register(&i2c->dev, + rtq6752_regulator_descs + i, + ®_cfg); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to init %d regulator\n", i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct of_device_id __maybe_unused rtq6752_device_table[] = { + { .compatible = "richtek,rtq6752", }, + {} +}; +MODULE_DEVICE_TABLE(of, rtq6752_device_table); + +static struct i2c_driver rtq6752_driver = { + .driver = { + .name = "rtq6752", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = rtq6752_device_table, + }, + .probe = rtq6752_probe, +}; +module_i2c_driver(rtq6752_driver); + +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RTQ6752 Regulator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/s2dos05-regulator.c b/drivers/regulator/s2dos05-regulator.c new file mode 100644 index 000000000..6e25f6634 --- /dev/null +++ b/drivers/regulator/s2dos05-regulator.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// s2dos05.c - Regulator driver for the Samsung s2dos05 +// +// Copyright (C) 2025 Dzmitry Sankouski + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct s2dos05_data { + struct regmap *regmap; + struct device *dev; +}; + +#define _BUCK(macro) S2DOS05_BUCK##macro +#define _buck_ops(num) s2dos05_ops##num +#define _LDO(macro) S2DOS05_LDO##macro +#define _REG(ctrl) S2DOS05_REG##ctrl +#define _ldo_ops(num) s2dos05_ops##num +#define _MASK(macro) S2DOS05_ENABLE_MASK##macro +#define _TIME(macro) S2DOS05_ENABLE_TIME##macro + +#define BUCK_DESC(_name, _id, _ops, m, s, v, e, em, t, a) { \ + .name = _name, \ + .id = _id, \ + .ops = _ops, \ + .of_match = of_match_ptr(_name), \ + .of_match_full_name = true, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = m, \ + .uV_step = s, \ + .n_voltages = S2DOS05_BUCK_N_VOLTAGES, \ + .vsel_reg = v, \ + .vsel_mask = S2DOS05_BUCK_VSEL_MASK, \ + .enable_reg = e, \ + .enable_mask = em, \ + .enable_time = t, \ + .active_discharge_off = 0, \ + .active_discharge_on = S2DOS05_BUCK_FD_MASK, \ + .active_discharge_reg = a, \ + .active_discharge_mask = S2DOS05_BUCK_FD_MASK \ +} + +#define LDO_DESC(_name, _id, _ops, m, s, v, e, em, t, a) { \ + .name = _name, \ + .id = _id, \ + .ops = _ops, \ + .of_match = of_match_ptr(_name), \ + .of_match_full_name = true, \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = m, \ + .uV_step = s, \ + .n_voltages = S2DOS05_LDO_N_VOLTAGES, \ + .vsel_reg = v, \ + .vsel_mask = S2DOS05_LDO_VSEL_MASK, \ + .enable_reg = e, \ + .enable_mask = em, \ + .enable_time = t, \ + .active_discharge_off = 0, \ + .active_discharge_on = S2DOS05_LDO_FD_MASK, \ + .active_discharge_reg = a, \ + .active_discharge_mask = S2DOS05_LDO_FD_MASK \ +} + +static const struct regulator_ops s2dos05_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static const struct regulator_desc regulators[S2DOS05_REGULATOR_MAX] = { + // name, id, ops, min_uv, uV_step, vsel_reg, enable_reg + LDO_DESC("ldo1", _LDO(1), &_ldo_ops(), _LDO(_MIN1), + _LDO(_STEP1), _REG(_LDO1_CFG), + _REG(_EN), _MASK(_L1), _TIME(_LDO), _REG(_LDO1_CFG)), + LDO_DESC("ldo2", _LDO(2), &_ldo_ops(), _LDO(_MIN1), + _LDO(_STEP1), _REG(_LDO2_CFG), + _REG(_EN), _MASK(_L2), _TIME(_LDO), _REG(_LDO2_CFG)), + LDO_DESC("ldo3", _LDO(3), &_ldo_ops(), _LDO(_MIN2), + _LDO(_STEP1), _REG(_LDO3_CFG), + _REG(_EN), _MASK(_L3), _TIME(_LDO), _REG(_LDO3_CFG)), + LDO_DESC("ldo4", _LDO(4), &_ldo_ops(), _LDO(_MIN2), + _LDO(_STEP1), _REG(_LDO4_CFG), + _REG(_EN), _MASK(_L4), _TIME(_LDO), _REG(_LDO4_CFG)), + BUCK_DESC("buck", _BUCK(1), &_buck_ops(), _BUCK(_MIN1), + _BUCK(_STEP1), _REG(_BUCK_VOUT), + _REG(_EN), _MASK(_B1), _TIME(_BUCK), _REG(_BUCK_CFG)), +}; + +static int s2dos05_pmic_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct s2dos05_data *s2dos05; + struct regulator_config config = { }; + unsigned int rdev_num = ARRAY_SIZE(regulators); + + s2dos05 = devm_kzalloc(dev, sizeof(*s2dos05), GFP_KERNEL); + if (!s2dos05) + return -ENOMEM; + + platform_set_drvdata(pdev, s2dos05); + + s2dos05->regmap = iodev->regmap_pmic; + s2dos05->dev = dev; + if (!dev->of_node) + device_set_of_node_from_dev(dev, dev->parent); + + config.dev = dev; + config.driver_data = s2dos05; + + for (int i = 0; i < rdev_num; i++) { + struct regulator_dev *regulator; + + regulator = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(regulator)) { + return dev_err_probe(&pdev->dev, PTR_ERR(regulator), + "regulator init failed for %d\n", i); + } + } + + return 0; +} + +static const struct platform_device_id s2dos05_pmic_id[] = { + { .name = "s2dos05-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, s2dos05_pmic_id); + +static struct platform_driver s2dos05_platform_driver = { + .driver = { + .name = "s2dos05", + }, + .probe = s2dos05_pmic_probe, + .id_table = s2dos05_pmic_id, +}; +module_platform_driver(s2dos05_platform_driver); + +MODULE_AUTHOR("Dzmitry Sankouski "); +MODULE_DESCRIPTION("Samsung S2DOS05 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c new file mode 100644 index 000000000..817150386 --- /dev/null +++ b/drivers/regulator/s2mpa01.c @@ -0,0 +1,390 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (c) 2013 Samsung Electronics Co., Ltd +// http://www.samsung.com + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct s2mpa01_info { + int ramp_delay24; + int ramp_delay3; + int ramp_delay5; + int ramp_delay16; + int ramp_delay7; + int ramp_delay8910; +}; + +static int get_ramp_delay(int ramp_delay) +{ + unsigned char cnt = 0; + + ramp_delay /= 6250; + + while (true) { + ramp_delay = ramp_delay >> 1; + if (ramp_delay == 0) + break; + cnt++; + } + + if (cnt > 3) + cnt = 3; + + return cnt; +} + +static int s2mpa01_regulator_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct s2mpa01_info *s2mpa01 = rdev_get_drvdata(rdev); + unsigned int ramp_delay = 0; + int old_volt, new_volt; + + switch (rdev_get_id(rdev)) { + case S2MPA01_BUCK2: + case S2MPA01_BUCK4: + ramp_delay = s2mpa01->ramp_delay24; + break; + case S2MPA01_BUCK3: + ramp_delay = s2mpa01->ramp_delay3; + break; + case S2MPA01_BUCK5: + ramp_delay = s2mpa01->ramp_delay5; + break; + case S2MPA01_BUCK1: + case S2MPA01_BUCK6: + ramp_delay = s2mpa01->ramp_delay16; + break; + case S2MPA01_BUCK7: + ramp_delay = s2mpa01->ramp_delay7; + break; + case S2MPA01_BUCK8: + case S2MPA01_BUCK9: + case S2MPA01_BUCK10: + ramp_delay = s2mpa01->ramp_delay8910; + break; + } + + if (ramp_delay == 0) + ramp_delay = rdev->desc->ramp_delay; + + old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); + new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); + + return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay); +} + +static int s2mpa01_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + struct s2mpa01_info *s2mpa01 = rdev_get_drvdata(rdev); + unsigned int ramp_val, ramp_shift, ramp_reg = S2MPA01_REG_RAMP2; + unsigned int ramp_enable = 1, enable_shift = 0; + int ret; + + switch (rdev_get_id(rdev)) { + case S2MPA01_BUCK1: + enable_shift = S2MPA01_BUCK1_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mpa01->ramp_delay16) + s2mpa01->ramp_delay16 = ramp_delay; + else + ramp_delay = s2mpa01->ramp_delay16; + + ramp_shift = S2MPA01_BUCK16_RAMP_SHIFT; + break; + case S2MPA01_BUCK2: + enable_shift = S2MPA01_BUCK2_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mpa01->ramp_delay24) + s2mpa01->ramp_delay24 = ramp_delay; + else + ramp_delay = s2mpa01->ramp_delay24; + + ramp_shift = S2MPA01_BUCK24_RAMP_SHIFT; + ramp_reg = S2MPA01_REG_RAMP1; + break; + case S2MPA01_BUCK3: + enable_shift = S2MPA01_BUCK3_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + s2mpa01->ramp_delay3 = ramp_delay; + ramp_shift = S2MPA01_BUCK3_RAMP_SHIFT; + ramp_reg = S2MPA01_REG_RAMP1; + break; + case S2MPA01_BUCK4: + enable_shift = S2MPA01_BUCK4_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mpa01->ramp_delay24) + s2mpa01->ramp_delay24 = ramp_delay; + else + ramp_delay = s2mpa01->ramp_delay24; + + ramp_shift = S2MPA01_BUCK24_RAMP_SHIFT; + ramp_reg = S2MPA01_REG_RAMP1; + break; + case S2MPA01_BUCK5: + s2mpa01->ramp_delay5 = ramp_delay; + ramp_shift = S2MPA01_BUCK5_RAMP_SHIFT; + break; + case S2MPA01_BUCK6: + if (ramp_delay > s2mpa01->ramp_delay16) + s2mpa01->ramp_delay16 = ramp_delay; + else + ramp_delay = s2mpa01->ramp_delay16; + + ramp_shift = S2MPA01_BUCK16_RAMP_SHIFT; + break; + case S2MPA01_BUCK7: + s2mpa01->ramp_delay7 = ramp_delay; + ramp_shift = S2MPA01_BUCK7_RAMP_SHIFT; + break; + case S2MPA01_BUCK8: + case S2MPA01_BUCK9: + case S2MPA01_BUCK10: + if (ramp_delay > s2mpa01->ramp_delay8910) + s2mpa01->ramp_delay8910 = ramp_delay; + else + ramp_delay = s2mpa01->ramp_delay8910; + + ramp_shift = S2MPA01_BUCK8910_RAMP_SHIFT; + break; + default: + return 0; + } + + if (!ramp_enable) + goto ramp_disable; + + /* Ramp delay can be enabled/disabled only for buck[1234] */ + if (rdev_get_id(rdev) >= S2MPA01_BUCK1 && + rdev_get_id(rdev) <= S2MPA01_BUCK4) { + ret = regmap_update_bits(rdev->regmap, S2MPA01_REG_RAMP1, + 1 << enable_shift, 1 << enable_shift); + if (ret) { + dev_err(&rdev->dev, "failed to enable ramp rate\n"); + return ret; + } + } + + ramp_val = get_ramp_delay(ramp_delay); + + return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, + ramp_val << ramp_shift); + +ramp_disable: + return regmap_update_bits(rdev->regmap, S2MPA01_REG_RAMP1, + 1 << enable_shift, 0); +} + +static const struct regulator_ops s2mpa01_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +static const struct regulator_ops s2mpa01_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = s2mpa01_regulator_set_voltage_time_sel, + .set_ramp_delay = s2mpa01_set_ramp_delay, +}; + +#define regulator_desc_ldo(num, step) { \ + .name = "LDO"#num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = S2MPA01_LDO##num, \ + .ops = &s2mpa01_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_800_MV, \ + .uV_step = step, \ + .n_voltages = S2MPA01_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPA01_REG_L1CTRL + num - 1, \ + .vsel_mask = S2MPA01_LDO_VSEL_MASK, \ + .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \ + .enable_mask = S2MPA01_ENABLE_MASK \ +} + +#define regulator_desc_buck1_4(num) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = S2MPA01_BUCK##num, \ + .ops = &s2mpa01_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_600_MV, \ + .uV_step = STEP_6_25_MV, \ + .n_voltages = S2MPA01_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPA01_RAMP_DELAY, \ + .vsel_reg = S2MPA01_REG_B1CTRL2 + (num - 1) * 2, \ + .vsel_mask = S2MPA01_BUCK_VSEL_MASK, \ + .enable_reg = S2MPA01_REG_B1CTRL1 + (num - 1) * 2, \ + .enable_mask = S2MPA01_ENABLE_MASK \ +} + +#define regulator_desc_buck5 { \ + .name = "BUCK5", \ + .of_match = of_match_ptr("BUCK5"), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = S2MPA01_BUCK5, \ + .ops = &s2mpa01_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_800_MV, \ + .uV_step = STEP_6_25_MV, \ + .n_voltages = S2MPA01_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPA01_RAMP_DELAY, \ + .vsel_reg = S2MPA01_REG_B5CTRL2, \ + .vsel_mask = S2MPA01_BUCK_VSEL_MASK, \ + .enable_reg = S2MPA01_REG_B5CTRL1, \ + .enable_mask = S2MPA01_ENABLE_MASK \ +} + +#define regulator_desc_buck6_10(num, min, step) { \ + .name = "BUCK"#num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = S2MPA01_BUCK##num, \ + .ops = &s2mpa01_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = S2MPA01_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPA01_RAMP_DELAY, \ + .vsel_reg = S2MPA01_REG_B6CTRL2 + (num - 6) * 2, \ + .vsel_mask = S2MPA01_BUCK_VSEL_MASK, \ + .enable_reg = S2MPA01_REG_B6CTRL1 + (num - 6) * 2, \ + .enable_mask = S2MPA01_ENABLE_MASK \ +} + +static const struct regulator_desc regulators[] = { + regulator_desc_ldo(1, STEP_25_MV), + regulator_desc_ldo(2, STEP_50_MV), + regulator_desc_ldo(3, STEP_50_MV), + regulator_desc_ldo(4, STEP_50_MV), + regulator_desc_ldo(5, STEP_25_MV), + regulator_desc_ldo(6, STEP_25_MV), + regulator_desc_ldo(7, STEP_50_MV), + regulator_desc_ldo(8, STEP_50_MV), + regulator_desc_ldo(9, STEP_50_MV), + regulator_desc_ldo(10, STEP_50_MV), + regulator_desc_ldo(11, STEP_50_MV), + regulator_desc_ldo(12, STEP_50_MV), + regulator_desc_ldo(13, STEP_50_MV), + regulator_desc_ldo(14, STEP_50_MV), + regulator_desc_ldo(15, STEP_50_MV), + regulator_desc_ldo(16, STEP_50_MV), + regulator_desc_ldo(17, STEP_50_MV), + regulator_desc_ldo(18, STEP_50_MV), + regulator_desc_ldo(19, STEP_50_MV), + regulator_desc_ldo(20, STEP_50_MV), + regulator_desc_ldo(21, STEP_50_MV), + regulator_desc_ldo(22, STEP_50_MV), + regulator_desc_ldo(23, STEP_50_MV), + regulator_desc_ldo(24, STEP_50_MV), + regulator_desc_ldo(25, STEP_50_MV), + regulator_desc_ldo(26, STEP_25_MV), + regulator_desc_buck1_4(1), + regulator_desc_buck1_4(2), + regulator_desc_buck1_4(3), + regulator_desc_buck1_4(4), + regulator_desc_buck5, + regulator_desc_buck6_10(6, MIN_600_MV, STEP_6_25_MV), + regulator_desc_buck6_10(7, MIN_600_MV, STEP_6_25_MV), + regulator_desc_buck6_10(8, MIN_800_MV, STEP_12_5_MV), + regulator_desc_buck6_10(9, MIN_1500_MV, STEP_12_5_MV), + regulator_desc_buck6_10(10, MIN_1000_MV, STEP_12_5_MV), +}; + +static int s2mpa01_pmic_probe(struct platform_device *pdev) +{ + struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct s2mpa01_info *s2mpa01; + int i; + + s2mpa01 = devm_kzalloc(&pdev->dev, sizeof(*s2mpa01), GFP_KERNEL); + if (!s2mpa01) + return -ENOMEM; + + config.dev = iodev->dev; + config.regmap = iodev->regmap_pmic; + config.driver_data = s2mpa01; + + for (i = 0; i < S2MPA01_REGULATOR_MAX; i++) { + struct regulator_dev *rdev; + + rdev = devm_regulator_register(&pdev->dev, + ®ulators[i], &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "regulator init failed for %d\n", + i); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id s2mpa01_pmic_id[] = { + { .name = "s2mpa01-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, s2mpa01_pmic_id); + +static struct platform_driver s2mpa01_pmic_driver = { + .driver = { + .name = "s2mpa01-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = s2mpa01_pmic_probe, + .id_table = s2mpa01_pmic_id, +}; + +module_platform_driver(s2mpa01_pmic_driver); + +/* Module information */ +MODULE_AUTHOR("Sangbeom Kim "); +MODULE_AUTHOR("Sachin Kamat "); +MODULE_DESCRIPTION("Samsung S2MPA01 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c new file mode 100644 index 000000000..0fb54617b --- /dev/null +++ b/drivers/regulator/s2mps11.c @@ -0,0 +1,2295 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (c) 2012-2014 Samsung Electronics Co., Ltd +// http://www.samsung.com + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + S2MPG10_REGULATOR_OPS_STD, + S2MPG10_REGULATOR_OPS_EXTCONTROL, +}; + +/* The highest number of possible regulators for supported devices. */ +#define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX +struct s2mps11_info { + int ramp_delay2; + int ramp_delay34; + int ramp_delay5; + int ramp_delay16; + int ramp_delay7810; + int ramp_delay9; + + enum sec_device_type dev_type; + + /* + * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether + * the suspend mode was enabled. + */ + DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX); +}; + +#define to_s2mpg10_regulator_desc(x) container_of((x), struct s2mpg10_regulator_desc, desc) + +struct s2mpg10_regulator_desc { + struct regulator_desc desc; + + /* Ramp rate during enable, valid for bucks only. */ + unsigned int enable_ramp_rate; + + /* Registers for external control of rail. */ + unsigned int pctrlsel_reg; + unsigned int pctrlsel_mask; + /* Populated from DT. */ + unsigned int pctrlsel_val; +}; + +static int get_ramp_delay(int ramp_delay) +{ + unsigned char cnt = 0; + + ramp_delay /= 6250; + + while (true) { + ramp_delay = ramp_delay >> 1; + if (ramp_delay == 0) + break; + cnt++; + } + + if (cnt > 3) + cnt = 3; + + return cnt; +} + +static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); + int rdev_id = rdev_get_id(rdev); + unsigned int ramp_delay = 0; + int old_volt, new_volt; + + switch (rdev_id) { + case S2MPS11_BUCK2: + ramp_delay = s2mps11->ramp_delay2; + break; + case S2MPS11_BUCK3: + case S2MPS11_BUCK4: + ramp_delay = s2mps11->ramp_delay34; + break; + case S2MPS11_BUCK5: + ramp_delay = s2mps11->ramp_delay5; + break; + case S2MPS11_BUCK6: + case S2MPS11_BUCK1: + ramp_delay = s2mps11->ramp_delay16; + break; + case S2MPS11_BUCK7: + case S2MPS11_BUCK8: + case S2MPS11_BUCK10: + ramp_delay = s2mps11->ramp_delay7810; + break; + case S2MPS11_BUCK9: + ramp_delay = s2mps11->ramp_delay9; + } + + if (ramp_delay == 0) + ramp_delay = rdev->desc->ramp_delay; + + old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); + new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); + + return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay); +} + +static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); + unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK; + unsigned int ramp_enable = 1, enable_shift = 0; + int rdev_id = rdev_get_id(rdev); + int ret; + + switch (rdev_id) { + case S2MPS11_BUCK1: + if (ramp_delay > s2mps11->ramp_delay16) + s2mps11->ramp_delay16 = ramp_delay; + else + ramp_delay = s2mps11->ramp_delay16; + + ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; + break; + case S2MPS11_BUCK2: + enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + s2mps11->ramp_delay2 = ramp_delay; + ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT; + ramp_reg = S2MPS11_REG_RAMP; + break; + case S2MPS11_BUCK3: + enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mps11->ramp_delay34) + s2mps11->ramp_delay34 = ramp_delay; + else + ramp_delay = s2mps11->ramp_delay34; + + ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; + ramp_reg = S2MPS11_REG_RAMP; + break; + case S2MPS11_BUCK4: + enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mps11->ramp_delay34) + s2mps11->ramp_delay34 = ramp_delay; + else + ramp_delay = s2mps11->ramp_delay34; + + ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; + ramp_reg = S2MPS11_REG_RAMP; + break; + case S2MPS11_BUCK5: + s2mps11->ramp_delay5 = ramp_delay; + ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT; + break; + case S2MPS11_BUCK6: + enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT; + if (!ramp_delay) { + ramp_enable = 0; + break; + } + + if (ramp_delay > s2mps11->ramp_delay16) + s2mps11->ramp_delay16 = ramp_delay; + else + ramp_delay = s2mps11->ramp_delay16; + + ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; + break; + case S2MPS11_BUCK7: + case S2MPS11_BUCK8: + case S2MPS11_BUCK10: + if (ramp_delay > s2mps11->ramp_delay7810) + s2mps11->ramp_delay7810 = ramp_delay; + else + ramp_delay = s2mps11->ramp_delay7810; + + ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT; + break; + case S2MPS11_BUCK9: + s2mps11->ramp_delay9 = ramp_delay; + ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT; + break; + default: + return 0; + } + + if (!ramp_enable) + goto ramp_disable; + + /* Ramp delay can be enabled/disabled only for buck[2346] */ + if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) || + rdev_id == S2MPS11_BUCK6) { + ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, + 1 << enable_shift, 1 << enable_shift); + if (ret) { + dev_err(&rdev->dev, "failed to enable ramp rate\n"); + return ret; + } + } + + ramp_val = get_ramp_delay(ramp_delay); + + return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, + ramp_val << ramp_shift); + +ramp_disable: + return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, + 1 << enable_shift, 0); +} + +static int s2mps11_regulator_enable(struct regulator_dev *rdev) +{ + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); + int rdev_id = rdev_get_id(rdev); + unsigned int val; + + switch (s2mps11->dev_type) { + case S2MPS11X: + if (test_bit(rdev_id, s2mps11->suspend_state)) + val = S2MPS14_ENABLE_SUSPEND; + else + val = rdev->desc->enable_mask; + break; + case S2MPS13X: + case S2MPS14X: + if (test_bit(rdev_id, s2mps11->suspend_state)) + val = S2MPS14_ENABLE_SUSPEND; + else if (rdev->ena_pin) + val = S2MPS14_ENABLE_EXT_CONTROL; + else + val = rdev->desc->enable_mask; + break; + case S2MPU02: + if (test_bit(rdev_id, s2mps11->suspend_state)) + val = S2MPU02_ENABLE_SUSPEND; + else + val = rdev->desc->enable_mask; + break; + case S2MPU05: + val = rdev->desc->enable_mask; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, val); +} + +static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev) +{ + int ret; + unsigned int val, state; + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); + int rdev_id = rdev_get_id(rdev); + + /* Below LDO should be always on or does not support suspend mode. */ + switch (s2mps11->dev_type) { + case S2MPS11X: + switch (rdev_id) { + case S2MPS11_LDO2: + case S2MPS11_LDO36: + case S2MPS11_LDO37: + case S2MPS11_LDO38: + return 0; + default: + state = S2MPS14_ENABLE_SUSPEND; + break; + } + break; + case S2MPS13X: + case S2MPS14X: + switch (rdev_id) { + case S2MPS14_LDO3: + return 0; + default: + state = S2MPS14_ENABLE_SUSPEND; + break; + } + break; + case S2MPU02: + switch (rdev_id) { + case S2MPU02_LDO13: + case S2MPU02_LDO14: + case S2MPU02_LDO15: + case S2MPU02_LDO17: + case S2MPU02_BUCK7: + state = S2MPU02_DISABLE_SUSPEND; + break; + default: + state = S2MPU02_ENABLE_SUSPEND; + break; + } + break; + default: + return -EINVAL; + } + + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); + if (ret < 0) + return ret; + + set_bit(rdev_id, s2mps11->suspend_state); + /* + * Don't enable suspend mode if regulator is already disabled because + * this would effectively for a short time turn on the regulator after + * resuming. + * However we still want to toggle the suspend_state bit for regulator + * in case if it got enabled before suspending the system. + */ + if (!(val & rdev->desc->enable_mask)) + return 0; + + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, state); +} + +static int s2mps11_of_parse_gpiod(struct device_node *np, + const char *con_id, bool optional, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct gpio_desc *ena_gpiod; + int ret; + + ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), con_id, 0, + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE, + desc->name + ? : dev_name(config->dev)); + if (IS_ERR(ena_gpiod)) { + ret = PTR_ERR(ena_gpiod); + + /* Ignore all errors except probe defer. */ + if (ret == -EPROBE_DEFER) + return ret; + + if (ret == -ENOENT) { + if (optional) + return 0; + + dev_info(config->dev, + "No entry for control GPIO for %d/%s in node %pOF\n", + desc->id, desc->name, np); + } else { + dev_warn_probe(config->dev, ret, + "Failed to get control GPIO for %d/%s in node %pOF\n", + desc->id, desc->name, np); + } + + return 0; + } + + dev_info(config->dev, "Using GPIO for ext-control over %d/%s\n", + desc->id, desc->name); + + config->ena_gpiod = ena_gpiod; + + return 0; +} + +static int s2mps11_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + const struct s2mps11_info *s2mps11 = config->driver_data; + + if (s2mps11->dev_type == S2MPS14X) + switch (desc->id) { + case S2MPS14_LDO10: + case S2MPS14_LDO11: + case S2MPS14_LDO12: + break; + + default: + return 0; + } + else + return 0; + + return s2mps11_of_parse_gpiod(np, "samsung,ext-control", false, desc, + config); +} + +static int s2mpg10_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + const struct s2mps11_info *s2mps11 = config->driver_data; + struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc); + static const u32 ext_control_s2mpg10[] = { + [S2MPG10_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN, + [S2MPG10_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF, + [S2MPG10_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N, + [S2MPG10_EXTCTRL_CPUCL1_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN, + [S2MPG10_EXTCTRL_CPUCL1_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2, + [S2MPG10_EXTCTRL_CPUCL2_EN] = S2MPG10_PCTRLSEL_CPUCL2_EN, + [S2MPG10_EXTCTRL_CPUCL2_EN2] = S2MPG10_PCTRLSEL_CPUCL2_EN2, + [S2MPG10_EXTCTRL_TPU_EN] = S2MPG10_PCTRLSEL_TPU_EN, + [S2MPG10_EXTCTRL_TPU_EN2] = S2MPG10_PCTRLSEL_TPU_EN2, + [S2MPG10_EXTCTRL_TCXO_ON] = S2MPG10_PCTRLSEL_TCXO_ON, + [S2MPG10_EXTCTRL_TCXO_ON2] = S2MPG10_PCTRLSEL_TCXO_ON2, + [S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2, + [S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN, + }; + static const u32 ext_control_s2mpg11[] = { + [S2MPG11_EXTCTRL_PWREN] = S2MPG11_PCTRLSEL_PWREN, + [S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG11_PCTRLSEL_PWREN_MIF, + [S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG11_PCTRLSEL_AP_ACTIVE_N, + [S2MPG11_EXTCTRL_G3D_EN] = S2MPG11_PCTRLSEL_G3D_EN, + [S2MPG11_EXTCTRL_G3D_EN2] = S2MPG11_PCTRLSEL_G3D_EN2, + [S2MPG11_EXTCTRL_AOC_VDD] = S2MPG11_PCTRLSEL_AOC_VDD, + [S2MPG11_EXTCTRL_AOC_RET] = S2MPG11_PCTRLSEL_AOC_RET, + [S2MPG11_EXTCTRL_UFS_EN] = S2MPG11_PCTRLSEL_UFS_EN, + [S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG11_PCTRLSEL_LDO13S_EN, + }; + u32 ext_control; + + if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11) + return 0; + + if (of_property_read_u32(np, "samsung,ext-control", &ext_control)) + return 0; + + switch (s2mps11->dev_type) { + case S2MPG10: + switch (desc->id) { + case S2MPG10_BUCK1 ... S2MPG10_BUCK7: + case S2MPG10_BUCK10: + case S2MPG10_LDO3 ... S2MPG10_LDO19: + if (ext_control > S2MPG10_EXTCTRL_TCXO_ON2) + return -EINVAL; + break; + + case S2MPG10_LDO20: + if (ext_control < S2MPG10_EXTCTRL_LDO20M_EN2 || + ext_control > S2MPG10_EXTCTRL_LDO20M_EN) + return -EINVAL; + break; + + default: + return -EINVAL; + } + + ext_control = ext_control_s2mpg10[ext_control]; + break; + + case S2MPG11: + switch (desc->id) { + case S2MPG11_BUCK1 ... S2MPG11_BUCK3: + case S2MPG11_BUCK5: + case S2MPG11_BUCK8: + case S2MPG11_BUCK9: + case S2MPG11_BUCKD: + case S2MPG11_BUCKA: + case S2MPG11_LDO1: + case S2MPG11_LDO2: + case S2MPG11_LDO8: + case S2MPG11_LDO13: + if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN) + return -EINVAL; + break; + + default: + return -EINVAL; + } + + ext_control = ext_control_s2mpg11[ext_control]; + break; + + default: + return -EINVAL; + } + + /* + * If the regulator should be configured for external control, then: + * 1) the PCTRLSELx register needs to be set accordingly + * 2) regulator_desc::enable_val needs to be: + * a) updated and + * b) written to the hardware + * 3) we switch to the ::ops that provide an empty ::enable() and no + * ::disable() implementations + * + * Points 1) and 2b) will be handled in _probe(), after + * devm_regulator_register() returns, so that we can properly act on + * failures, since the regulator core ignores most return values from + * this parse callback. + */ + s2mpg10_desc->pctrlsel_val = ext_control; + s2mpg10_desc->pctrlsel_val <<= (ffs(s2mpg10_desc->pctrlsel_mask) - 1); + + s2mpg10_desc->desc.enable_val = S2MPG10_PMIC_CTRL_ENABLE_EXT; + s2mpg10_desc->desc.enable_val <<= (ffs(desc->enable_mask) - 1); + + ++s2mpg10_desc->desc.ops; + + return s2mps11_of_parse_gpiod(np, "enable", true, desc, config); +} + +static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11, + struct regulator_dev *rdev) +{ + const struct s2mpg10_regulator_desc *s2mpg10_desc; + int ret; + + switch (s2mps11->dev_type) { + case S2MPG10: + case S2MPG11: + s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc); + break; + + default: + return 0; + } + + ret = regmap_update_bits(rdev_get_regmap(rdev), + s2mpg10_desc->pctrlsel_reg, + s2mpg10_desc->pctrlsel_mask, + s2mpg10_desc->pctrlsel_val); + if (ret) + return dev_err_probe(rdev_get_dev(rdev), ret, + "failed to configure pctrlsel for %s\n", + rdev->desc->name); + + /* + * When using external control, the enable bit of the regulator still + * needs to be set. The actual state will still be determined by the + * external signal. + */ + ret = regulator_enable_regmap(rdev); + if (ret) + return dev_err_probe(rdev_get_dev(rdev), ret, + "failed to enable regulator %s\n", + rdev->desc->name); + + return 0; +} + +static int s2mpg10_regulator_enable_nop(struct regulator_dev *rdev) +{ + /* + * We need to provide this, otherwise the regulator core's enable on + * this regulator will return a failure and subsequently disable our + * parent regulator. + */ + return 0; +} + +static int s2mpg10_regulator_buck_enable_time(struct regulator_dev *rdev) +{ + const struct s2mpg10_regulator_desc * const s2mpg10_desc = + to_s2mpg10_regulator_desc(rdev->desc); + const struct regulator_ops * const ops = rdev->desc->ops; + int vsel, curr_uV; + + vsel = ops->get_voltage_sel(rdev); + if (vsel < 0) + return vsel; + + curr_uV = ops->list_voltage(rdev, vsel); + if (curr_uV < 0) + return curr_uV; + + return (rdev->desc->enable_time + + DIV_ROUND_UP(curr_uV, s2mpg10_desc->enable_ramp_rate)); +} + +static int s2mpg1x_regulator_buck_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uV, + unsigned int ramp_reg, + unsigned int ramp_mask) +{ + unsigned int ramp_sel, ramp_rate; + int ret; + + if (old_uV == new_uV) + return 0; + + ret = regmap_read(rdev->regmap, ramp_reg, &ramp_sel); + if (ret) + return ret; + + ramp_sel &= ramp_mask; + ramp_sel >>= ffs(ramp_mask) - 1; + if (ramp_sel >= rdev->desc->n_ramp_values || + !rdev->desc->ramp_delay_table) + return -EINVAL; + + ramp_rate = rdev->desc->ramp_delay_table[ramp_sel]; + + return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_rate); +} + +static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uV) +{ + unsigned int ramp_reg; + + ramp_reg = rdev->desc->ramp_reg; + if (old_uV > new_uV) + /* The downwards ramp is at a different offset. */ + ramp_reg += S2MPG10_PMIC_DVS_RAMP4 - S2MPG10_PMIC_DVS_RAMP1; + + return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, + ramp_reg, + rdev->desc->ramp_mask); +} + +static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uV) +{ + unsigned int ramp_mask; + + ramp_mask = rdev->desc->ramp_mask; + if (old_uV > new_uV) + /* The downwards mask is at a different position. */ + ramp_mask >>= 2; + + return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, + rdev->desc->ramp_reg, + ramp_mask); +} + +/* + * We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because + * only if the latter is != NULL, the regulator core will call neither during + * DVS if the regulator is disabled. If the latter is NULL, the core always + * calls the ::set_voltage_time() callback, which would give incorrect results + * if the regulator is off. + * At the same time, we do need ::set_voltage_time() due to differing upwards + * and downwards ramps and we can not make that code dependent on the regulator + * enable state, as that would break regulator_set_voltage_time() which + * expects a correct result no matter the enable state. + */ +static const struct regulator_ops s2mpg10_reg_buck_ops[] = { + [S2MPG10_REGULATOR_OPS_STD] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .enable_time = s2mpg10_regulator_buck_enable_time, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + }, + [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .enable = s2mpg10_regulator_enable_nop, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + } +}; + +#define s2mpg10_buck_to_ramp_mask(n) (GENMASK(1, 0) << (((n) % 4) * 2)) + +/* + * The ramp_delay during enable is fixed (12.5mV/μs), while the ramp during + * DVS can be adjusted. Linux can adjust the ramp delay via DT, in which case + * the regulator core will modify the regulator's constraints and call our + * .set_ramp_delay() which updates the DVS ramp in ramp_reg. + * For enable, our .enable_time() unconditionally uses enable_ramp_rate + * (12.5mV/μs) while our ::set_voltage_time() takes the value in ramp_reg + * into account. + */ +#define regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, _ops, \ + _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ + _r_reg, _r_mask, _r_table, _r_table_sz, \ + _en_time) { \ + .name = "buck" _name, \ + .supply_name = _supply, \ + .of_match = of_match_ptr("buck" _name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = s2mpg10_of_parse_cb, \ + .id = _id, \ + .ops = &(_ops)[0], \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .linear_ranges = _vrange, \ + .n_linear_ranges = ARRAY_SIZE(_vrange), \ + .n_voltages = _vrange##_count, \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _en_reg, \ + .enable_mask = _en_mask, \ + .ramp_reg = _r_reg, \ + .ramp_mask = _r_mask, \ + .ramp_delay_table = _r_table, \ + .n_ramp_values = _r_table_sz, \ + .enable_time = _en_time, /* + V/enable_ramp_rate */ \ +} + +#define regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg) \ + regulator_desc_s2mpg1x_buck_cmn(#_num "m", S2MPG10_BUCK##_num, \ + "vinb"#_num "m", s2mpg10_reg_buck_ops, _vrange, \ + S2MPG10_PMIC_B##_num##M_OUT1, GENMASK(7, 0), \ + S2MPG10_PMIC_B##_num##M_CTRL, GENMASK(7, 6), \ + S2MPG10_PMIC_##_r_reg, \ + s2mpg10_buck_to_ramp_mask(S2MPG10_BUCK##_num \ + - S2MPG10_BUCK1), \ + s2mpg10_buck_ramp_table, \ + ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) + +#define s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg) \ + .desc = regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg), \ + .enable_ramp_rate = 12500 + +#define s2mpg10_regulator_desc_buck_gpio(_num, _vrange, _r_reg, \ + _pc_reg, _pc_mask) \ + [S2MPG10_BUCK##_num] = { \ + s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ + .pctrlsel_reg = S2MPG10_PMIC_##_pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +#define s2mpg10_regulator_desc_buck(_num, _vrange, _r_reg) \ + [S2MPG10_BUCK##_num] = { \ + s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ + } + +/* ops for S2MPG1x LDO regulators without ramp control */ +static const struct regulator_ops s2mpg10_reg_ldo_ops[] = { + [S2MPG10_REGULATOR_OPS_STD] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + }, + [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .enable = s2mpg10_regulator_enable_nop, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + } +}; + +/* ops for S2MPG1x LDO regulators that have ramp control */ +static const struct regulator_ops s2mpg10_reg_ldo_ramp_ops[] = { + [S2MPG10_REGULATOR_OPS_STD] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + }, + [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .enable = s2mpg10_regulator_enable_nop, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + } +}; + +#define regulator_desc_s2mpg1x_ldo_cmn(_name, _id, _supply, _ops, \ + _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz) { \ + .name = "ldo" _name, \ + .supply_name = _supply, \ + .of_match = of_match_ptr("ldo" _name), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = s2mpg10_of_parse_cb, \ + .id = _id, \ + .ops = &(_ops)[0], \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .linear_ranges = _vrange, \ + .n_linear_ranges = ARRAY_SIZE(_vrange), \ + .n_voltages = _vrange##_count, \ + .vsel_reg = _vsel_reg, \ + .vsel_mask = _vsel_mask, \ + .enable_reg = _en_reg, \ + .enable_mask = _en_mask, \ + .ramp_delay = _ramp_delay, \ + .ramp_reg = _r_reg, \ + .ramp_mask = _r_mask, \ + .ramp_delay_table = _r_table, \ + .n_ramp_values = _r_table_sz, \ + .enable_time = 130, /* startup 20+-10 + ramp 30..100μs */ \ +} + +#define s2mpg10_regulator_desc_ldo_cmn(_num, _supply, _ops, _vrange, \ + _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ + _pc_reg, _pc_mask) \ + [S2MPG10_LDO##_num] = { \ + .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "m", \ + S2MPG10_LDO##_num, _supply, _ops, \ + _vrange, \ + S2MPG10_PMIC_L##_num##M_##_vsel_reg_sfx, \ + _vsel_mask, \ + S2MPG10_PMIC_##_en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, \ + _r_table_sz), \ + .pctrlsel_reg = _pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +/* standard LDO via LxM_CTRL */ +#define s2mpg10_regulator_desc_ldo(_num, _supply, _vrange) \ + s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ + L##_num##M_CTRL, BIT(7), \ + 0, 0, 0, NULL, 0, \ + 0, 0) + +/* standard LDO but possibly GPIO controlled */ +#define s2mpg10_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ + _pc_reg, _pc_mask) \ + s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ + L##_num##M_CTRL, GENMASK(7, 6), \ + 0, 0, 0, NULL, 0, \ + S2MPG10_PMIC_##_pc_reg, _pc_mask) + +/* LDO with ramp support and possibly GPIO controlled */ +#define s2mpg10_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ + _en_mask, _r_reg, _pc_reg, _pc_mask) \ + s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ + LDO_CTRL2, _en_mask, \ + 6250, S2MPG10_PMIC_##_r_reg, GENMASK(1, 0), \ + s2mpg10_ldo_ramp_table, \ + ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ + S2MPG10_PMIC_##_pc_reg, _pc_mask) + +#define S2MPG10_VOLTAGE_RANGE(_prefix, _idx, _offs_uV, _min_uV, \ + _max_uV, _step_uV) \ +static const struct linear_range _prefix##_vranges##_idx[] = { \ + REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \ +}; \ +static const unsigned int _prefix##_vranges##_idx##_count = \ + ((((_max_uV) - (_offs_uV)) / (_step_uV)) + 1) + +/* voltage range for s2mpg10 BUCK 1, 2, 3, 4, 5, 7, 8, 9, 10 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); + +/* voltage range for s2mpg10 BUCK 6 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 6, 200000, 450000, 1350000, STEP_6_25_MV); + +static const unsigned int s2mpg10_buck_ramp_table[] = { + 6250, 12500, 25000 +}; + +/* voltage range for s2mpg10 LDO 1, 11, 12 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 1, 300000, 700000, 1300000, STEP_12_5_MV); + +/* voltage range for s2mpg10 LDO 2, 4, 9, 14, 18, 19, 20, 23, 25, 29, 30, 31 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 2, 700000, 1600000, 1950000, STEP_25_MV); + +/* voltage range for s2mpg10 LDO 3, 5, 6, 8, 16, 17, 24, 28 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 3, 725000, 725000, 1300000, STEP_12_5_MV); + +/* voltage range for s2mpg10 LDO 7 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 7, 300000, 450000, 1300000, STEP_12_5_MV); + +/* voltage range for s2mpg10 LDO 13, 15 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 13, 300000, 450000, 950000, STEP_12_5_MV); + +/* voltage range for s2mpg10 LDO 10 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 10, 1800000, 1800000, 3350000, STEP_25_MV); + +/* voltage range for s2mpg10 LDO 21, 22, 26, 27 */ +S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 21, 1800000, 2500000, 3300000, STEP_25_MV); + +/* possible ramp values for s2mpg10 LDO 1, 7, 11, 12, 13, 15 */ +static const unsigned int s2mpg10_ldo_ramp_table[] = { + 6250, 12500 +}; + +static const struct s2mpg10_regulator_desc s2mpg10_regulators[] = { + s2mpg10_regulator_desc_buck_gpio(1, s2mpg10_buck_vranges1, DVS_RAMP1, + PCTRLSEL1, GENMASK(3, 0)), + s2mpg10_regulator_desc_buck_gpio(2, s2mpg10_buck_vranges1, DVS_RAMP1, + PCTRLSEL1, GENMASK(7, 4)), + s2mpg10_regulator_desc_buck_gpio(3, s2mpg10_buck_vranges1, DVS_RAMP1, + PCTRLSEL2, GENMASK(3, 0)), + s2mpg10_regulator_desc_buck_gpio(4, s2mpg10_buck_vranges1, DVS_RAMP1, + PCTRLSEL2, GENMASK(7, 4)), + s2mpg10_regulator_desc_buck_gpio(5, s2mpg10_buck_vranges1, DVS_RAMP2, + PCTRLSEL3, GENMASK(3, 0)), + s2mpg10_regulator_desc_buck_gpio(6, s2mpg10_buck_vranges6, DVS_RAMP2, + PCTRLSEL3, GENMASK(7, 4)), + s2mpg10_regulator_desc_buck_gpio(7, s2mpg10_buck_vranges1, DVS_RAMP2, + PCTRLSEL4, GENMASK(3, 0)), + s2mpg10_regulator_desc_buck(8, s2mpg10_buck_vranges1, DVS_RAMP2), + s2mpg10_regulator_desc_buck(9, s2mpg10_buck_vranges1, DVS_RAMP3), + s2mpg10_regulator_desc_buck_gpio(10, s2mpg10_buck_vranges1, DVS_RAMP3, + PCTRLSEL4, GENMASK(7, 4)), + /* + * Standard LDO via LxM_CTRL but non-standard (greater) V-range and with + * ramp support. + */ + s2mpg10_regulator_desc_ldo_cmn(1, "vinl3m", s2mpg10_reg_ldo_ramp_ops, + s2mpg10_ldo_vranges1, + CTRL, GENMASK(6, 0), + L1M_CTRL, BIT(7), + 6250, S2MPG10_PMIC_DVS_RAMP6, + GENMASK(5, 4), s2mpg10_ldo_ramp_table, + ARRAY_SIZE(s2mpg10_ldo_ramp_table), + 0, 0), + s2mpg10_regulator_desc_ldo(2, "vinl9m", s2mpg10_ldo_vranges2), + s2mpg10_regulator_desc_ldo_gpio(3, "vinl4m", s2mpg10_ldo_vranges3, + PCTRLSEL5, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(4, "vinl9m", s2mpg10_ldo_vranges2, + PCTRLSEL5, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_gpio(5, "vinl3m", s2mpg10_ldo_vranges3, + PCTRLSEL6, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(6, "vinl7m", s2mpg10_ldo_vranges3, + PCTRLSEL6, GENMASK(7, 4)), + /* + * Ramp support, possibly GPIO controlled, non-standard (greater) V- + * range and enable reg & mask. + */ + s2mpg10_regulator_desc_ldo_cmn(7, "vinl3m", s2mpg10_reg_ldo_ramp_ops, + s2mpg10_ldo_vranges7, + CTRL, GENMASK(6, 0), + LDO_CTRL1, GENMASK(4, 3), + 6250, S2MPG10_PMIC_DVS_RAMP6, + GENMASK(7, 6), s2mpg10_ldo_ramp_table, + ARRAY_SIZE(s2mpg10_ldo_ramp_table), + S2MPG10_PMIC_PCTRLSEL7, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(8, "vinl4m", s2mpg10_ldo_vranges3, + PCTRLSEL7, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_gpio(9, "vinl10m", s2mpg10_ldo_vranges2, + PCTRLSEL8, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(10, "vinl15m", s2mpg10_ldo_vranges10, + PCTRLSEL8, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_ramp(11, "vinl7m", s2mpg10_ldo_vranges1, + GENMASK(1, 0), DVS_SYNC_CTRL3, + PCTRLSEL9, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_ramp(12, "vinl8m", s2mpg10_ldo_vranges1, + GENMASK(3, 2), DVS_SYNC_CTRL4, + PCTRLSEL9, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_ramp(13, "vinl1m", s2mpg10_ldo_vranges13, + GENMASK(5, 4), DVS_SYNC_CTRL5, + PCTRLSEL10, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(14, "vinl10m", s2mpg10_ldo_vranges2, + PCTRLSEL10, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_ramp(15, "vinl2m", s2mpg10_ldo_vranges13, + GENMASK(7, 6), DVS_SYNC_CTRL6, + PCTRLSEL11, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(16, "vinl5m", s2mpg10_ldo_vranges3, + PCTRLSEL11, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_gpio(17, "vinl6m", s2mpg10_ldo_vranges3, + PCTRLSEL12, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(18, "vinl10m", s2mpg10_ldo_vranges2, + PCTRLSEL12, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo_gpio(19, "vinl10m", s2mpg10_ldo_vranges2, + PCTRLSEL13, GENMASK(3, 0)), + s2mpg10_regulator_desc_ldo_gpio(20, "vinl10m", s2mpg10_ldo_vranges2, + PCTRLSEL13, GENMASK(7, 4)), + s2mpg10_regulator_desc_ldo(21, "vinl14m", s2mpg10_ldo_vranges21), + s2mpg10_regulator_desc_ldo(22, "vinl15m", s2mpg10_ldo_vranges21), + s2mpg10_regulator_desc_ldo(23, "vinl11m", s2mpg10_ldo_vranges2), + s2mpg10_regulator_desc_ldo(24, "vinl7m", s2mpg10_ldo_vranges3), + s2mpg10_regulator_desc_ldo(25, "vinl10m", s2mpg10_ldo_vranges2), + s2mpg10_regulator_desc_ldo(26, "vinl15m", s2mpg10_ldo_vranges21), + s2mpg10_regulator_desc_ldo(27, "vinl15m", s2mpg10_ldo_vranges21), + s2mpg10_regulator_desc_ldo(28, "vinl7m", s2mpg10_ldo_vranges3), + s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2), + s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2), + s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2) +}; + +static const struct regulator_ops s2mpg11_reg_buck_ops[] = { + [S2MPG10_REGULATOR_OPS_STD] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable_time = s2mpg10_regulator_buck_enable_time, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + }, + [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .enable = s2mpg10_regulator_enable_nop, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable_time = s2mpg10_regulator_buck_enable_time, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + } +}; + +#define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4)) + +#define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \ + _vsel_reg, _en_reg, _en_mask, _r_reg) \ + regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \ + s2mpg11_reg_buck_ops, _vrange, \ + S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \ + S2MPG11_PMIC_##_en_reg, _en_mask, \ + S2MPG11_PMIC_##_r_reg, \ + s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \ + s2mpg10_buck_ramp_table, \ + ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) + +#define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg, _en_rrate) \ + .desc = regulator_desc_s2mpg11_buckx(#_num"s", \ + S2MPG11_BUCK##_num, "vinb"#_num"s", \ + _vrange, \ + B##_num##S_##_vsel_reg_sfx, \ + B##_num##S_CTRL, _en_mask, \ + _r_reg), \ + .enable_ramp_rate = _en_rrate + +#define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg) \ + [S2MPG11_BUCK##_num] = { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ + } + +#define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \ + [S2MPG11_BUCK##_num] = { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ + .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +#define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg) \ + [S2MPG11_BUCK##_num] = { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 25000), \ + } + +#define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \ + _pc_reg, _pc_mask) \ + [S2MPG11_BUCK##_num] = { \ + .desc = regulator_desc_s2mpg11_buckx(#_num_lower, \ + S2MPG11_BUCK##_num, "vinb"#_num_lower, \ + s2mpg11_buck_vranges##_num_lower, \ + BUCK##_num##_OUT, \ + BUCK##_num##_CTRL, GENMASK(7, 6), \ + _r_reg), \ + .enable_ramp_rate = 25000, \ + .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +#define s2mpg11_regulator_desc_buckboost() \ + [S2MPG11_BUCKBOOST] = { \ + .desc = regulator_desc_s2mpg1x_buck_cmn("boost", \ + S2MPG11_BUCKBOOST, "vinbb", \ + s2mpg10_reg_ldo_ops, \ + s2mpg11_buck_vrangesboost, \ + S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \ + S2MPG11_PMIC_BB_CTRL, BIT(7), \ + 0, 0, NULL, 0, 35), \ + .enable_ramp_rate = 17500, \ + } + +#define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \ + _vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ + _pc_reg, _pc_mask) \ + [S2MPG11_LDO##_num] = { \ + .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \ + S2MPG11_LDO##_num, _supply, _ops, \ + _vrange, \ + S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \ + _vsel_mask, \ + S2MPG11_PMIC_##_en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, \ + _r_table_sz), \ + .pctrlsel_reg = _pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +/* standard LDO via LxM_CTRL */ +#define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ + L##_num##S_CTRL, BIT(7), \ + 0, 0, 0, NULL, 0, \ + 0, 0) + +/* standard LDO but possibly GPIO controlled */ +#define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ + _pc_reg, _pc_mask) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ + L##_num##S_CTRL, GENMASK(7, 6), \ + 0, 0, 0, NULL, 0, \ + S2MPG11_PMIC_##_pc_reg, _pc_mask) + +/* LDO with ramp support and possibly GPIO controlled */ +#define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ + _en_mask, _r_reg, _pc_reg, _pc_mask) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ + s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ + LDO_CTRL1, _en_mask, \ + 6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \ + s2mpg10_ldo_ramp_table, \ + ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ + S2MPG11_PMIC_##_pc_reg, _pc_mask) + +/* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 5 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 6 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 7 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK D */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK A */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK BOOST */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost, + 2600000, 3000000, 3600000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 1, 2 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV); + +/* voltage range for s2mpg11 LDO 4, 6 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV); + +/* voltage range for s2mpg11 LDO 5 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 8 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800); + +/* voltage range for s2mpg11 LDO 9 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 13 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV); + +static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = { + s2mpg11_regulator_desc_buckboost(), + s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP1, + PCTRLSEL1, GENMASK(3, 0)), + s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP1, + PCTRLSEL1, GENMASK(7, 4)), + s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP2, + PCTRLSEL2, GENMASK(3, 0)), + s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1, + OUT, BIT(7), DVS_RAMP2), + s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5, + OUT, GENMASK(7, 6), DVS_RAMP3, + PCTRLSEL2, GENMASK(7, 4)), + s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6, + OUT1, BIT(7), DVS_RAMP3), + s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7, + OUT1, BIT(7), DVS_RAMP4), + s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP4, + PCTRLSEL3, GENMASK(3, 0)), + s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP5, + PCTRLSEL3, GENMASK(7, 4)), + s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1, + OUT, BIT(7), DVS_RAMP5), + s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)), + s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)), + s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1, + GENMASK(5, 4), DVS_SYNC_CTRL1, + PCTRLSEL5, GENMASK(3, 0)), + s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1, + GENMASK(7, 6), DVS_SYNC_CTRL2, + PCTRLSEL5, GENMASK(7, 4)), + s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4), + s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5), + s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4), + s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8, + PCTRLSEL6, GENMASK(3, 0)), + s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9), + s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13, + PCTRLSEL6, GENMASK(7, 4)), + s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3) +}; + +static const struct regulator_ops s2mps11_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = s2mps11_regulator_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, +}; + +static const struct regulator_ops s2mps11_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = s2mps11_regulator_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel, + .set_ramp_delay = s2mps11_set_ramp_delay, + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, +}; + +#define regulator_desc_s2mps11_ldo(num, step) { \ + .name = "LDO"#num, \ + .id = S2MPS11_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps11_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .ramp_delay = RAMP_DELAY_12_MVUS, \ + .min_uV = MIN_800_MV, \ + .uV_step = step, \ + .n_voltages = S2MPS11_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \ + .vsel_mask = S2MPS11_LDO_VSEL_MASK, \ + .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \ + .enable_mask = S2MPS11_ENABLE_MASK \ +} + +#define regulator_desc_s2mps11_buck1_4(num) { \ + .name = "BUCK"#num, \ + .id = S2MPS11_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps11_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_650_MV, \ + .uV_step = STEP_6_25_MV, \ + .linear_min_sel = 8, \ + .n_voltages = S2MPS11_BUCK12346_N_VOLTAGES, \ + .ramp_delay = S2MPS11_RAMP_DELAY, \ + .vsel_reg = S2MPS11_REG_B1CTRL2 + (num - 1) * 2, \ + .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS11_REG_B1CTRL1 + (num - 1) * 2, \ + .enable_mask = S2MPS11_ENABLE_MASK \ +} + +#define regulator_desc_s2mps11_buck5 { \ + .name = "BUCK5", \ + .id = S2MPS11_BUCK5, \ + .of_match = of_match_ptr("BUCK5"), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps11_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_650_MV, \ + .uV_step = STEP_6_25_MV, \ + .linear_min_sel = 8, \ + .n_voltages = S2MPS11_BUCK5_N_VOLTAGES, \ + .ramp_delay = S2MPS11_RAMP_DELAY, \ + .vsel_reg = S2MPS11_REG_B5CTRL2, \ + .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS11_REG_B5CTRL1, \ + .enable_mask = S2MPS11_ENABLE_MASK \ +} + +#define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) { \ + .name = "BUCK"#num, \ + .id = S2MPS11_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps11_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .linear_min_sel = min_sel, \ + .n_voltages = voltages, \ + .ramp_delay = S2MPS11_RAMP_DELAY, \ + .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \ + .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS11_REG_B6CTRL1 + (num - 6) * 2, \ + .enable_mask = S2MPS11_ENABLE_MASK \ +} + +#define regulator_desc_s2mps11_buck9 { \ + .name = "BUCK9", \ + .id = S2MPS11_BUCK9, \ + .of_match = of_match_ptr("BUCK9"), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps11_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = MIN_3000_MV, \ + .uV_step = STEP_25_MV, \ + .n_voltages = S2MPS11_BUCK9_N_VOLTAGES, \ + .ramp_delay = S2MPS11_RAMP_DELAY, \ + .vsel_reg = S2MPS11_REG_B9CTRL2, \ + .vsel_mask = S2MPS11_BUCK9_VSEL_MASK, \ + .enable_reg = S2MPS11_REG_B9CTRL1, \ + .enable_mask = S2MPS11_ENABLE_MASK \ +} + +static const struct regulator_desc s2mps11_regulators[] = { + regulator_desc_s2mps11_ldo(1, STEP_25_MV), + regulator_desc_s2mps11_ldo(2, STEP_50_MV), + regulator_desc_s2mps11_ldo(3, STEP_50_MV), + regulator_desc_s2mps11_ldo(4, STEP_50_MV), + regulator_desc_s2mps11_ldo(5, STEP_50_MV), + regulator_desc_s2mps11_ldo(6, STEP_25_MV), + regulator_desc_s2mps11_ldo(7, STEP_50_MV), + regulator_desc_s2mps11_ldo(8, STEP_50_MV), + regulator_desc_s2mps11_ldo(9, STEP_50_MV), + regulator_desc_s2mps11_ldo(10, STEP_50_MV), + regulator_desc_s2mps11_ldo(11, STEP_25_MV), + regulator_desc_s2mps11_ldo(12, STEP_50_MV), + regulator_desc_s2mps11_ldo(13, STEP_50_MV), + regulator_desc_s2mps11_ldo(14, STEP_50_MV), + regulator_desc_s2mps11_ldo(15, STEP_50_MV), + regulator_desc_s2mps11_ldo(16, STEP_50_MV), + regulator_desc_s2mps11_ldo(17, STEP_50_MV), + regulator_desc_s2mps11_ldo(18, STEP_50_MV), + regulator_desc_s2mps11_ldo(19, STEP_50_MV), + regulator_desc_s2mps11_ldo(20, STEP_50_MV), + regulator_desc_s2mps11_ldo(21, STEP_50_MV), + regulator_desc_s2mps11_ldo(22, STEP_25_MV), + regulator_desc_s2mps11_ldo(23, STEP_25_MV), + regulator_desc_s2mps11_ldo(24, STEP_50_MV), + regulator_desc_s2mps11_ldo(25, STEP_50_MV), + regulator_desc_s2mps11_ldo(26, STEP_50_MV), + regulator_desc_s2mps11_ldo(27, STEP_25_MV), + regulator_desc_s2mps11_ldo(28, STEP_50_MV), + regulator_desc_s2mps11_ldo(29, STEP_50_MV), + regulator_desc_s2mps11_ldo(30, STEP_50_MV), + regulator_desc_s2mps11_ldo(31, STEP_50_MV), + regulator_desc_s2mps11_ldo(32, STEP_50_MV), + regulator_desc_s2mps11_ldo(33, STEP_50_MV), + regulator_desc_s2mps11_ldo(34, STEP_50_MV), + regulator_desc_s2mps11_ldo(35, STEP_25_MV), + regulator_desc_s2mps11_ldo(36, STEP_50_MV), + regulator_desc_s2mps11_ldo(37, STEP_50_MV), + regulator_desc_s2mps11_ldo(38, STEP_50_MV), + regulator_desc_s2mps11_buck1_4(1), + regulator_desc_s2mps11_buck1_4(2), + regulator_desc_s2mps11_buck1_4(3), + regulator_desc_s2mps11_buck1_4(4), + regulator_desc_s2mps11_buck5, + regulator_desc_s2mps11_buck67810(6, MIN_650_MV, STEP_6_25_MV, 8, + S2MPS11_BUCK12346_N_VOLTAGES), + regulator_desc_s2mps11_buck67810(7, MIN_750_MV, STEP_12_5_MV, 0, + S2MPS11_BUCK7810_N_VOLTAGES), + regulator_desc_s2mps11_buck67810(8, MIN_750_MV, STEP_12_5_MV, 0, + S2MPS11_BUCK7810_N_VOLTAGES), + regulator_desc_s2mps11_buck9, + regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV, 0, + S2MPS11_BUCK7810_N_VOLTAGES), +}; + +static const struct regulator_ops s2mps14_reg_ops; + +#define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \ + .name = "LDO"#num, \ + .id = S2MPS13_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .linear_min_sel = min_sel, \ + .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPS13_REG_L1CTRL + num - 1, \ + .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ + .enable_reg = S2MPS13_REG_L1CTRL + num - 1, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +#define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \ + .name = "BUCK"#num, \ + .id = S2MPS13_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .linear_min_sel = min_sel, \ + .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPS13_REG_B1OUT + (num - 1) * 2, \ + .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +#define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \ + .name = "BUCK"#num, \ + .id = S2MPS13_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .linear_min_sel = min_sel, \ + .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ + .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +#define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \ + .name = "BUCK"#num, \ + .id = S2MPS13_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .linear_min_sel = min_sel, \ + .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ + .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ + .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS13_REG_B1CTRL + (num) * 2 - 1, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +static const struct regulator_desc s2mps13_regulators[] = { + regulator_desc_s2mps13_ldo(1, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(2, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(3, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(4, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(5, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(6, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(7, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(8, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(9, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(11, MIN_800_MV, STEP_25_MV, 0x10), + regulator_desc_s2mps13_ldo(12, MIN_800_MV, STEP_25_MV, 0x10), + regulator_desc_s2mps13_ldo(13, MIN_800_MV, STEP_25_MV, 0x10), + regulator_desc_s2mps13_ldo(14, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(15, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(23, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(24, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(36, MIN_800_MV, STEP_12_5_MV, 0x00), + regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV, 0x08), + regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV, 0x0C), + regulator_desc_s2mps13_buck(1, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck(2, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck(3, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck(4, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck(5, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck(6, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck7(7, MIN_500_MV, STEP_6_25_MV, 0x10), + regulator_desc_s2mps13_buck8_10(8, MIN_1000_MV, STEP_12_5_MV, 0x20), + regulator_desc_s2mps13_buck8_10(9, MIN_1000_MV, STEP_12_5_MV, 0x20), + regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10), +}; + +static const struct regulator_ops s2mps14_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = s2mps11_regulator_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, +}; + +#define regulator_desc_s2mps14_ldo(num, min, step) { \ + .name = "LDO"#num, \ + .id = S2MPS14_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = s2mps11_of_parse_cb, \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \ + .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ + .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +#define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \ + .name = "BUCK"#num, \ + .id = S2MPS14_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .of_parse_cb = s2mps11_of_parse_cb, \ + .ops = &s2mps14_reg_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ + .linear_min_sel = min_sel, \ + .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \ + .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \ + .enable_mask = S2MPS14_ENABLE_MASK \ +} + +static const struct regulator_desc s2mps14_regulators[] = { + regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV), + regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV), + regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV, + S2MPS14_BUCK1235_START_SEL), + regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV, + S2MPS14_BUCK1235_START_SEL), + regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV, + S2MPS14_BUCK1235_START_SEL), + regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV, + S2MPS14_BUCK4_START_SEL), + regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV, + S2MPS14_BUCK1235_START_SEL), +}; + +static const struct regulator_ops s2mps15_reg_ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops s2mps15_reg_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, +}; + +#define regulator_desc_s2mps15_ldo(num, range) { \ + .name = "LDO"#num, \ + .id = S2MPS15_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps15_reg_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .linear_ranges = range, \ + .n_linear_ranges = ARRAY_SIZE(range), \ + .n_voltages = S2MPS15_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPS15_REG_L1CTRL + num - 1, \ + .vsel_mask = S2MPS15_LDO_VSEL_MASK, \ + .enable_reg = S2MPS15_REG_L1CTRL + num - 1, \ + .enable_mask = S2MPS15_ENABLE_MASK \ +} + +#define regulator_desc_s2mps15_buck(num, range) { \ + .name = "BUCK"#num, \ + .id = S2MPS15_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mps15_reg_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .linear_ranges = range, \ + .n_linear_ranges = ARRAY_SIZE(range), \ + .ramp_delay = 12500, \ + .n_voltages = S2MPS15_BUCK_N_VOLTAGES, \ + .vsel_reg = S2MPS15_REG_B1CTRL2 + ((num - 1) * 2), \ + .vsel_mask = S2MPS15_BUCK_VSEL_MASK, \ + .enable_reg = S2MPS15_REG_B1CTRL1 + ((num - 1) * 2), \ + .enable_mask = S2MPS15_ENABLE_MASK \ +} + +/* voltage range for s2mps15 LDO 3, 5, 15, 16, 18, 20, 23 and 27 */ +static const struct linear_range s2mps15_ldo_voltage_ranges1[] = { + REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000), +}; + +/* voltage range for s2mps15 LDO 2, 6, 14, 17, 19, 21, 24 and 25 */ +static const struct linear_range s2mps15_ldo_voltage_ranges2[] = { + REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000), +}; + +/* voltage range for s2mps15 LDO 4, 11, 12, 13, 22 and 26 */ +static const struct linear_range s2mps15_ldo_voltage_ranges3[] = { + REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500), +}; + +/* voltage range for s2mps15 LDO 7, 8, 9 and 10 */ +static const struct linear_range s2mps15_ldo_voltage_ranges4[] = { + REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000), +}; + +/* voltage range for s2mps15 LDO 1 */ +static const struct linear_range s2mps15_ldo_voltage_ranges5[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500), +}; + +/* voltage range for s2mps15 BUCK 1, 2, 3, 4, 5, 6 and 7 */ +static const struct linear_range s2mps15_buck_voltage_ranges1[] = { + REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250), +}; + +/* voltage range for s2mps15 BUCK 8, 9 and 10 */ +static const struct linear_range s2mps15_buck_voltage_ranges2[] = { + REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500), +}; + +static const struct regulator_desc s2mps15_regulators[] = { + regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5), + regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4), + regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4), + regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4), + regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4), + regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2), + regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3), + regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1), + regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1), + regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2), + regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2), + regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2), +}; + +static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11, + struct regulator_dev *rdev) +{ + int ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + S2MPS14_ENABLE_EXT_CONTROL); + if (ret < 0) + return dev_err_probe(rdev_get_dev(rdev), ret, + "failed to enable GPIO control over %d/%s\n", + rdev->desc->id, rdev->desc->name); + return 0; +} + +static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + unsigned int ramp_val, ramp_shift, ramp_reg; + int rdev_id = rdev_get_id(rdev); + + switch (rdev_id) { + case S2MPU02_BUCK1: + ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT; + break; + case S2MPU02_BUCK2: + ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT; + break; + case S2MPU02_BUCK3: + ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT; + break; + case S2MPU02_BUCK4: + ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT; + break; + default: + return 0; + } + ramp_reg = S2MPU02_REG_RAMP1; + ramp_val = get_ramp_delay(ramp_delay); + + return regmap_update_bits(rdev->regmap, ramp_reg, + S2MPU02_BUCK1234_RAMP_MASK << ramp_shift, + ramp_val << ramp_shift); +} + +static const struct regulator_ops s2mpu02_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = s2mps11_regulator_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, +}; + +static const struct regulator_ops s2mpu02_buck_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = s2mps11_regulator_enable, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, + .set_ramp_delay = s2mpu02_set_ramp_delay, +}; + +#define regulator_desc_s2mpu02_ldo1(num) { \ + .name = "LDO"#num, \ + .id = S2MPU02_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_LDO_MIN_900MV, \ + .uV_step = S2MPU02_LDO_STEP_12_5MV, \ + .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ + .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPU02_REG_L1CTRL, \ + .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_L1CTRL, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_ldo2(num) { \ + .name = "LDO"#num, \ + .id = S2MPU02_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_LDO_MIN_1050MV, \ + .uV_step = S2MPU02_LDO_STEP_25MV, \ + .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ + .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPU02_REG_L2CTRL1, \ + .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_L2CTRL1, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_ldo3(num) { \ + .name = "LDO"#num, \ + .id = S2MPU02_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_LDO_MIN_900MV, \ + .uV_step = S2MPU02_LDO_STEP_12_5MV, \ + .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ + .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_ldo4(num) { \ + .name = "LDO"#num, \ + .id = S2MPU02_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_LDO_MIN_1050MV, \ + .uV_step = S2MPU02_LDO_STEP_25MV, \ + .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ + .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_ldo5(num) { \ + .name = "LDO"#num, \ + .id = S2MPU02_LDO##num, \ + .of_match = of_match_ptr("LDO"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_LDO_MIN_1600MV, \ + .uV_step = S2MPU02_LDO_STEP_50MV, \ + .linear_min_sel = S2MPU02_LDO_GROUP3_START_SEL, \ + .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ + .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} + +#define regulator_desc_s2mpu02_buck1234(num) { \ + .name = "BUCK"#num, \ + .id = S2MPU02_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_BUCK1234_MIN_600MV, \ + .uV_step = S2MPU02_BUCK1234_STEP_6_25MV, \ + .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ + .linear_min_sel = S2MPU02_BUCK1234_START_SEL, \ + .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPU02_REG_B1CTRL2 + (num - 1) * 2, \ + .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_B1CTRL1 + (num - 1) * 2, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_buck5(num) { \ + .name = "BUCK"#num, \ + .id = S2MPU02_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_BUCK5_MIN_1081_25MV, \ + .uV_step = S2MPU02_BUCK5_STEP_6_25MV, \ + .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ + .linear_min_sel = S2MPU02_BUCK5_START_SEL, \ + .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPU02_REG_B5CTRL2, \ + .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_B5CTRL1, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_buck6(num) { \ + .name = "BUCK"#num, \ + .id = S2MPU02_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_BUCK6_MIN_1700MV, \ + .uV_step = S2MPU02_BUCK6_STEP_2_50MV, \ + .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ + .linear_min_sel = S2MPU02_BUCK6_START_SEL, \ + .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPU02_REG_B6CTRL2, \ + .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_B6CTRL1, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} +#define regulator_desc_s2mpu02_buck7(num) { \ + .name = "BUCK"#num, \ + .id = S2MPU02_BUCK##num, \ + .of_match = of_match_ptr("BUCK"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU02_BUCK7_MIN_900MV, \ + .uV_step = S2MPU02_BUCK7_STEP_6_25MV, \ + .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ + .linear_min_sel = S2MPU02_BUCK7_START_SEL, \ + .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ + .vsel_reg = S2MPU02_REG_B7CTRL2, \ + .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ + .enable_reg = S2MPU02_REG_B7CTRL1, \ + .enable_mask = S2MPU02_ENABLE_MASK \ +} + +static const struct regulator_desc s2mpu02_regulators[] = { + regulator_desc_s2mpu02_ldo1(1), + regulator_desc_s2mpu02_ldo2(2), + regulator_desc_s2mpu02_ldo4(3), + regulator_desc_s2mpu02_ldo5(4), + regulator_desc_s2mpu02_ldo4(5), + regulator_desc_s2mpu02_ldo3(6), + regulator_desc_s2mpu02_ldo3(7), + regulator_desc_s2mpu02_ldo4(8), + regulator_desc_s2mpu02_ldo5(9), + regulator_desc_s2mpu02_ldo3(10), + regulator_desc_s2mpu02_ldo4(11), + regulator_desc_s2mpu02_ldo5(12), + regulator_desc_s2mpu02_ldo5(13), + regulator_desc_s2mpu02_ldo5(14), + regulator_desc_s2mpu02_ldo5(15), + regulator_desc_s2mpu02_ldo5(16), + regulator_desc_s2mpu02_ldo4(17), + regulator_desc_s2mpu02_ldo5(18), + regulator_desc_s2mpu02_ldo3(19), + regulator_desc_s2mpu02_ldo4(20), + regulator_desc_s2mpu02_ldo5(21), + regulator_desc_s2mpu02_ldo5(22), + regulator_desc_s2mpu02_ldo5(23), + regulator_desc_s2mpu02_ldo4(24), + regulator_desc_s2mpu02_ldo5(25), + regulator_desc_s2mpu02_ldo4(26), + regulator_desc_s2mpu02_ldo5(27), + regulator_desc_s2mpu02_ldo5(28), + regulator_desc_s2mpu02_buck1234(1), + regulator_desc_s2mpu02_buck1234(2), + regulator_desc_s2mpu02_buck1234(3), + regulator_desc_s2mpu02_buck1234(4), + regulator_desc_s2mpu02_buck5(5), + regulator_desc_s2mpu02_buck6(6), + regulator_desc_s2mpu02_buck7(7), +}; + +#define regulator_desc_s2mpu05_ldo_reg(num, min, step, reg) { \ + .name = "ldo"#num, \ + .id = S2MPU05_LDO##num, \ + .of_match = of_match_ptr("ldo"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = min, \ + .uV_step = step, \ + .n_voltages = S2MPU05_LDO_N_VOLTAGES, \ + .vsel_reg = reg, \ + .vsel_mask = S2MPU05_LDO_VSEL_MASK, \ + .enable_reg = reg, \ + .enable_mask = S2MPU05_ENABLE_MASK, \ + .enable_time = S2MPU05_ENABLE_TIME_LDO \ +} + +#define regulator_desc_s2mpu05_ldo(num, reg, min, step) \ + regulator_desc_s2mpu05_ldo_reg(num, min, step, S2MPU05_REG_L##num##reg) + +#define regulator_desc_s2mpu05_ldo1(num, reg) \ + regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP1) + +#define regulator_desc_s2mpu05_ldo2(num, reg) \ + regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP2) + +#define regulator_desc_s2mpu05_ldo3(num, reg) \ + regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN2, S2MPU05_LDO_STEP2) + +#define regulator_desc_s2mpu05_ldo4(num, reg) \ + regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN3, S2MPU05_LDO_STEP2) + +#define regulator_desc_s2mpu05_buck(num, which) { \ + .name = "buck"#num, \ + .id = S2MPU05_BUCK##num, \ + .of_match = of_match_ptr("buck"#num), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &s2mpu02_buck_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = S2MPU05_BUCK_MIN##which, \ + .uV_step = S2MPU05_BUCK_STEP##which, \ + .n_voltages = S2MPU05_BUCK_N_VOLTAGES, \ + .vsel_reg = S2MPU05_REG_B##num##CTRL2, \ + .vsel_mask = S2MPU05_BUCK_VSEL_MASK, \ + .enable_reg = S2MPU05_REG_B##num##CTRL1, \ + .enable_mask = S2MPU05_ENABLE_MASK, \ + .enable_time = S2MPU05_ENABLE_TIME_BUCK##num \ +} + +#define regulator_desc_s2mpu05_buck123(num) regulator_desc_s2mpu05_buck(num, 1) +#define regulator_desc_s2mpu05_buck45(num) regulator_desc_s2mpu05_buck(num, 2) + +static const struct regulator_desc s2mpu05_regulators[] = { + regulator_desc_s2mpu05_ldo4(1, CTRL), + regulator_desc_s2mpu05_ldo3(2, CTRL), + regulator_desc_s2mpu05_ldo2(3, CTRL), + regulator_desc_s2mpu05_ldo1(4, CTRL), + regulator_desc_s2mpu05_ldo1(5, CTRL), + regulator_desc_s2mpu05_ldo1(6, CTRL), + regulator_desc_s2mpu05_ldo2(7, CTRL), + regulator_desc_s2mpu05_ldo3(8, CTRL), + regulator_desc_s2mpu05_ldo4(9, CTRL1), + regulator_desc_s2mpu05_ldo4(10, CTRL), + /* LDOs 11-24 are used for CP. They aren't documented. */ + regulator_desc_s2mpu05_ldo2(25, CTRL), + regulator_desc_s2mpu05_ldo3(26, CTRL), + regulator_desc_s2mpu05_ldo2(27, CTRL), + regulator_desc_s2mpu05_ldo3(28, CTRL), + regulator_desc_s2mpu05_ldo3(29, CTRL), + regulator_desc_s2mpu05_ldo2(30, CTRL), + regulator_desc_s2mpu05_ldo3(31, CTRL), + regulator_desc_s2mpu05_ldo3(32, CTRL), + regulator_desc_s2mpu05_ldo3(33, CTRL), + regulator_desc_s2mpu05_ldo3(34, CTRL), + regulator_desc_s2mpu05_ldo3(35, CTRL), + regulator_desc_s2mpu05_buck123(1), + regulator_desc_s2mpu05_buck123(2), + regulator_desc_s2mpu05_buck123(3), + regulator_desc_s2mpu05_buck45(4), + regulator_desc_s2mpu05_buck45(5), +}; + +static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11, + struct regulator_dev *rdev) +{ + int ret; + + switch (s2mps11->dev_type) { + case S2MPS14X: + if (!rdev->ena_pin) + return 0; + + ret = s2mps14_pmic_enable_ext_control(s2mps11, rdev); + break; + + case S2MPG10: + case S2MPG11: + /* + * If desc.enable_val is != 0, then external control was + * requested. We can not test s2mpg10_desc::ext_control, + * because 0 is a valid value. + */ + if (!rdev->desc->enable_val) + return 0; + + ret = s2mpg10_enable_ext_control(s2mps11, rdev); + break; + + default: + return 0; + } + + return ret; +} + +static int s2mps11_pmic_probe(struct platform_device *pdev) +{ + struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct s2mps11_info *s2mps11; + unsigned int rdev_num; + int i, ret; + const struct regulator_desc *regulators; + const struct s2mpg10_regulator_desc *s2mpg1x_regulators = NULL; + + s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info), + GFP_KERNEL); + if (!s2mps11) + return -ENOMEM; + + s2mps11->dev_type = platform_get_device_id(pdev)->driver_data; + switch (s2mps11->dev_type) { + case S2MPG10: + rdev_num = ARRAY_SIZE(s2mpg10_regulators); + s2mpg1x_regulators = s2mpg10_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPG11: + rdev_num = ARRAY_SIZE(s2mpg11_regulators); + s2mpg1x_regulators = s2mpg11_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPS11X: + rdev_num = ARRAY_SIZE(s2mps11_regulators); + regulators = s2mps11_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mps11_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPS13X: + rdev_num = ARRAY_SIZE(s2mps13_regulators); + regulators = s2mps13_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mps13_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPS14X: + rdev_num = ARRAY_SIZE(s2mps14_regulators); + regulators = s2mps14_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mps14_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPS15X: + rdev_num = ARRAY_SIZE(s2mps15_regulators); + regulators = s2mps15_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mps15_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPU02: + rdev_num = ARRAY_SIZE(s2mpu02_regulators); + regulators = s2mpu02_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mpu02_regulators) > S2MPS_REGULATOR_MAX); + break; + case S2MPU05: + rdev_num = ARRAY_SIZE(s2mpu05_regulators); + regulators = s2mpu05_regulators; + BUILD_BUG_ON(ARRAY_SIZE(s2mpu05_regulators) > S2MPS_REGULATOR_MAX); + break; + default: + return dev_err_probe(&pdev->dev, -ENODEV, + "Unsupported device type %d\n", + s2mps11->dev_type); + } + + if (s2mpg1x_regulators) { + size_t regulators_sz = rdev_num * sizeof(*s2mpg1x_regulators); + + s2mpg1x_regulators = devm_kmemdup(&pdev->dev, + s2mpg1x_regulators, + regulators_sz, + GFP_KERNEL); + if (!s2mpg1x_regulators) + return -ENOMEM; + } + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + platform_set_drvdata(pdev, s2mps11); + + config.dev = &pdev->dev; + config.regmap = iodev->regmap_pmic; + config.driver_data = s2mps11; + for (i = 0; i < rdev_num; i++) { + const struct regulator_desc *rdesc; + struct regulator_dev *regulator; + + if (s2mpg1x_regulators) + rdesc = &s2mpg1x_regulators[i].desc; + else + rdesc = ®ulators[i]; + + regulator = devm_regulator_register(&pdev->dev, + rdesc, &config); + if (IS_ERR(regulator)) + return dev_err_probe(&pdev->dev, PTR_ERR(regulator), + "regulator init failed for %d/%s\n", + rdesc->id, rdesc->name); + + ret = s2mps11_handle_ext_control(s2mps11, regulator); + if (ret < 0) + return ret; + } + + return 0; +} + +static const struct platform_device_id s2mps11_pmic_id[] = { + { .name = "s2mpg10-regulator", .driver_data = S2MPG10 }, + { .name = "s2mpg11-regulator", .driver_data = S2MPG11 }, + { .name = "s2mps11-regulator", .driver_data = S2MPS11X }, + { .name = "s2mps13-regulator", .driver_data = S2MPS13X }, + { .name = "s2mps14-regulator", .driver_data = S2MPS14X }, + { .name = "s2mps15-regulator", .driver_data = S2MPS15X }, + { .name = "s2mpu02-regulator", .driver_data = S2MPU02 }, + { .name = "s2mpu05-regulator", .driver_data = S2MPU05 }, + { } +}; +MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id); + +static struct platform_driver s2mps11_pmic_driver = { + .driver = { + .name = "s2mps11-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = s2mps11_pmic_probe, + .id_table = s2mps11_pmic_id, +}; + +module_platform_driver(s2mps11_pmic_driver); + +/* Module information */ +MODULE_AUTHOR("Sangbeom Kim "); +MODULE_DESCRIPTION("Samsung S2MPS11/14/15/S2MPU02/05 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/s5m8767.c b/drivers/regulator/s5m8767.c new file mode 100644 index 000000000..2794245d4 --- /dev/null +++ b/drivers/regulator/s5m8767.c @@ -0,0 +1,937 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (c) 2011 Samsung Electronics Co., Ltd +// http://www.samsung.com + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define S5M8767_OPMODE_NORMAL_MODE 0x1 + +struct s5m8767_info { + struct device *dev; + struct sec_pmic_dev *iodev; + int num_regulators; + struct sec_opmode_data *opmode; + + int ramp_delay; + bool buck2_ramp; + bool buck3_ramp; + bool buck4_ramp; + + bool buck2_gpiodvs; + bool buck3_gpiodvs; + bool buck4_gpiodvs; + u8 buck2_vol[8]; + u8 buck3_vol[8]; + u8 buck4_vol[8]; + struct gpio_desc *buck_gpios[3]; + struct gpio_desc *buck_ds[3]; + int buck_gpioindex; +}; + +struct sec_voltage_desc { + int max; + int min; + int step; +}; + +static const struct sec_voltage_desc buck_voltage_val1 = { + .max = 2225000, + .min = 650000, + .step = 6250, +}; + +static const struct sec_voltage_desc buck_voltage_val2 = { + .max = 1600000, + .min = 600000, + .step = 6250, +}; + +static const struct sec_voltage_desc buck_voltage_val3 = { + .max = 3000000, + .min = 750000, + .step = 12500, +}; + +static const struct sec_voltage_desc ldo_voltage_val1 = { + .max = 3950000, + .min = 800000, + .step = 50000, +}; + +static const struct sec_voltage_desc ldo_voltage_val2 = { + .max = 2375000, + .min = 800000, + .step = 25000, +}; + +static const struct sec_voltage_desc *reg_voltage_map[] = { + [S5M8767_LDO1] = &ldo_voltage_val2, + [S5M8767_LDO2] = &ldo_voltage_val2, + [S5M8767_LDO3] = &ldo_voltage_val1, + [S5M8767_LDO4] = &ldo_voltage_val1, + [S5M8767_LDO5] = &ldo_voltage_val1, + [S5M8767_LDO6] = &ldo_voltage_val2, + [S5M8767_LDO7] = &ldo_voltage_val2, + [S5M8767_LDO8] = &ldo_voltage_val2, + [S5M8767_LDO9] = &ldo_voltage_val1, + [S5M8767_LDO10] = &ldo_voltage_val1, + [S5M8767_LDO11] = &ldo_voltage_val1, + [S5M8767_LDO12] = &ldo_voltage_val1, + [S5M8767_LDO13] = &ldo_voltage_val1, + [S5M8767_LDO14] = &ldo_voltage_val1, + [S5M8767_LDO15] = &ldo_voltage_val2, + [S5M8767_LDO16] = &ldo_voltage_val1, + [S5M8767_LDO17] = &ldo_voltage_val1, + [S5M8767_LDO18] = &ldo_voltage_val1, + [S5M8767_LDO19] = &ldo_voltage_val1, + [S5M8767_LDO20] = &ldo_voltage_val1, + [S5M8767_LDO21] = &ldo_voltage_val1, + [S5M8767_LDO22] = &ldo_voltage_val1, + [S5M8767_LDO23] = &ldo_voltage_val1, + [S5M8767_LDO24] = &ldo_voltage_val1, + [S5M8767_LDO25] = &ldo_voltage_val1, + [S5M8767_LDO26] = &ldo_voltage_val1, + [S5M8767_LDO27] = &ldo_voltage_val1, + [S5M8767_LDO28] = &ldo_voltage_val1, + [S5M8767_BUCK1] = &buck_voltage_val1, + [S5M8767_BUCK2] = &buck_voltage_val2, + [S5M8767_BUCK3] = &buck_voltage_val2, + [S5M8767_BUCK4] = &buck_voltage_val2, + [S5M8767_BUCK5] = &buck_voltage_val1, + [S5M8767_BUCK6] = &buck_voltage_val1, + [S5M8767_BUCK7] = &buck_voltage_val3, + [S5M8767_BUCK8] = &buck_voltage_val3, + [S5M8767_BUCK9] = &buck_voltage_val3, +}; + +static const unsigned int s5m8767_opmode_reg[][4] = { + /* {OFF, ON, LOWPOWER, SUSPEND} */ + /* LDO1 ... LDO28 */ + {0x0, 0x3, 0x2, 0x1}, /* LDO1 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x0, 0x0, 0x0}, + {0x0, 0x3, 0x2, 0x1}, /* LDO5 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* LDO10 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* LDO15 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x0, 0x0, 0x0}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* LDO20 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x0, 0x0, 0x0}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* LDO25 */ + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* LDO28 */ + + /* BUCK1 ... BUCK9 */ + {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */ + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */ + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x1, 0x1}, + {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */ +}; + +static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id, + int *reg, int *enable_ctrl) +{ + int i; + unsigned int mode; + + switch (reg_id) { + case S5M8767_LDO1 ... S5M8767_LDO2: + *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); + break; + case S5M8767_LDO3 ... S5M8767_LDO28: + *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); + break; + case S5M8767_BUCK1: + *reg = S5M8767_REG_BUCK1CTRL1; + break; + case S5M8767_BUCK2 ... S5M8767_BUCK4: + *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; + break; + case S5M8767_BUCK5: + *reg = S5M8767_REG_BUCK5CTRL1; + break; + case S5M8767_BUCK6 ... S5M8767_BUCK9: + *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; + break; + default: + return -EINVAL; + } + + for (i = 0; i < s5m8767->num_regulators; i++) { + if (s5m8767->opmode[i].id == reg_id) { + mode = s5m8767->opmode[i].mode; + break; + } + } + + if (i >= s5m8767->num_regulators) + return -EINVAL; + + *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT; + + return 0; +} + +static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767) +{ + int reg; + + switch (reg_id) { + case S5M8767_LDO1 ... S5M8767_LDO2: + reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); + break; + case S5M8767_LDO3 ... S5M8767_LDO28: + reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); + break; + case S5M8767_BUCK1: + reg = S5M8767_REG_BUCK1CTRL2; + break; + case S5M8767_BUCK2: + reg = S5M8767_REG_BUCK2DVS1; + if (s5m8767->buck2_gpiodvs) + reg += s5m8767->buck_gpioindex; + break; + case S5M8767_BUCK3: + reg = S5M8767_REG_BUCK3DVS1; + if (s5m8767->buck3_gpiodvs) + reg += s5m8767->buck_gpioindex; + break; + case S5M8767_BUCK4: + reg = S5M8767_REG_BUCK4DVS1; + if (s5m8767->buck4_gpiodvs) + reg += s5m8767->buck_gpioindex; + break; + case S5M8767_BUCK5: + reg = S5M8767_REG_BUCK5CTRL2; + break; + case S5M8767_BUCK6 ... S5M8767_BUCK9: + reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2; + break; + default: + return -EINVAL; + } + + return reg; +} + +static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc, + int min_vol) +{ + int selector = 0; + + if (desc == NULL) + return -EINVAL; + + if (min_vol > desc->max) + return -EINVAL; + + if (min_vol < desc->min) + min_vol = desc->min; + + selector = DIV_ROUND_UP(min_vol - desc->min, desc->step); + + if (desc->min + desc->step * selector > desc->max) + return -EINVAL; + + return selector; +} + +static inline int s5m8767_set_high(struct s5m8767_info *s5m8767) +{ + int temp_index = s5m8767->buck_gpioindex; + + gpiod_set_value(s5m8767->buck_gpios[0], !!(temp_index & BIT(2))); + gpiod_set_value(s5m8767->buck_gpios[1], !!(temp_index & BIT(1))); + gpiod_set_value(s5m8767->buck_gpios[2], !!(temp_index & BIT(0))); + + return 0; +} + +static inline int s5m8767_set_low(struct s5m8767_info *s5m8767) +{ + int temp_index = s5m8767->buck_gpioindex; + + gpiod_set_value(s5m8767->buck_gpios[2], !!(temp_index & BIT(0))); + gpiod_set_value(s5m8767->buck_gpios[1], !!(temp_index & BIT(1))); + gpiod_set_value(s5m8767->buck_gpios[0], !!(temp_index & BIT(2))); + + return 0; +} + +static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, + unsigned selector) +{ + struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); + int reg_id = rdev_get_id(rdev); + int old_index, index = 0; + u8 *buck234_vol = NULL; + + switch (reg_id) { + case S5M8767_LDO1 ... S5M8767_LDO28: + break; + case S5M8767_BUCK1 ... S5M8767_BUCK6: + if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs) + buck234_vol = &s5m8767->buck2_vol[0]; + else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs) + buck234_vol = &s5m8767->buck3_vol[0]; + else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs) + buck234_vol = &s5m8767->buck4_vol[0]; + break; + case S5M8767_BUCK7 ... S5M8767_BUCK8: + return -EINVAL; + case S5M8767_BUCK9: + break; + default: + return -EINVAL; + } + + /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */ + if (buck234_vol) { + while (*buck234_vol != selector) { + buck234_vol++; + index++; + } + old_index = s5m8767->buck_gpioindex; + s5m8767->buck_gpioindex = index; + + if (index > old_index) + return s5m8767_set_high(s5m8767); + else + return s5m8767_set_low(s5m8767); + } else { + return regulator_set_voltage_sel_regmap(rdev, selector); + } +} + +static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_sel, + unsigned int new_sel) +{ + struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); + + if ((old_sel < new_sel) && s5m8767->ramp_delay) + return DIV_ROUND_UP(rdev->desc->uV_step * (new_sel - old_sel), + s5m8767->ramp_delay * 1000); + return 0; +} + +static const struct regulator_ops s5m8767_ops = { + .list_voltage = regulator_list_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = s5m8767_set_voltage_sel, + .set_voltage_time_sel = s5m8767_set_voltage_time_sel, +}; + +static const struct regulator_ops s5m8767_buck78_ops = { + .list_voltage = regulator_list_voltage_linear, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +#define s5m8767_regulator_desc(_name) { \ + .name = #_name, \ + .id = S5M8767_##_name, \ + .ops = &s5m8767_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ +} + +#define s5m8767_regulator_buck78_desc(_name) { \ + .name = #_name, \ + .id = S5M8767_##_name, \ + .ops = &s5m8767_buck78_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ +} + +static struct regulator_desc regulators[] = { + s5m8767_regulator_desc(LDO1), + s5m8767_regulator_desc(LDO2), + s5m8767_regulator_desc(LDO3), + s5m8767_regulator_desc(LDO4), + s5m8767_regulator_desc(LDO5), + s5m8767_regulator_desc(LDO6), + s5m8767_regulator_desc(LDO7), + s5m8767_regulator_desc(LDO8), + s5m8767_regulator_desc(LDO9), + s5m8767_regulator_desc(LDO10), + s5m8767_regulator_desc(LDO11), + s5m8767_regulator_desc(LDO12), + s5m8767_regulator_desc(LDO13), + s5m8767_regulator_desc(LDO14), + s5m8767_regulator_desc(LDO15), + s5m8767_regulator_desc(LDO16), + s5m8767_regulator_desc(LDO17), + s5m8767_regulator_desc(LDO18), + s5m8767_regulator_desc(LDO19), + s5m8767_regulator_desc(LDO20), + s5m8767_regulator_desc(LDO21), + s5m8767_regulator_desc(LDO22), + s5m8767_regulator_desc(LDO23), + s5m8767_regulator_desc(LDO24), + s5m8767_regulator_desc(LDO25), + s5m8767_regulator_desc(LDO26), + s5m8767_regulator_desc(LDO27), + s5m8767_regulator_desc(LDO28), + s5m8767_regulator_desc(BUCK1), + s5m8767_regulator_desc(BUCK2), + s5m8767_regulator_desc(BUCK3), + s5m8767_regulator_desc(BUCK4), + s5m8767_regulator_desc(BUCK5), + s5m8767_regulator_desc(BUCK6), + s5m8767_regulator_buck78_desc(BUCK7), + s5m8767_regulator_buck78_desc(BUCK8), + s5m8767_regulator_desc(BUCK9), +}; + +/* + * Enable GPIO control over BUCK9 in regulator_config for that regulator. + */ +static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767, + struct sec_regulator_data *rdata, + struct regulator_config *config) +{ + int i, mode = 0; + + if (rdata->id != S5M8767_BUCK9) + return; + + /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */ + for (i = 0; i < s5m8767->num_regulators; i++) { + const struct sec_opmode_data *opmode = &s5m8767->opmode[i]; + if (opmode->id == rdata->id) { + mode = s5m8767_opmode_reg[rdata->id][opmode->mode]; + break; + } + } + if (mode != S5M8767_ENCTRL_USE_GPIO) { + dev_warn(s5m8767->dev, + "ext-control for %pOFn: mismatched op_mode (%x), ignoring\n", + rdata->reg_node, mode); + return; + } + + if (!rdata->ext_control_gpiod) { + dev_warn(s5m8767->dev, + "ext-control for %pOFn: GPIO not valid, ignoring\n", + rdata->reg_node); + return; + } + + config->ena_gpiod = rdata->ext_control_gpiod; +} + +/* + * Turn on GPIO control over BUCK9. + */ +static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767, + struct regulator_dev *rdev) +{ + int id = rdev_get_id(rdev); + int ret, reg, enable_ctrl; + + if (id != S5M8767_BUCK9) + return -EINVAL; + + ret = s5m8767_get_register(s5m8767, id, ®, &enable_ctrl); + if (ret) + return ret; + + return regmap_update_bits(s5m8767->iodev->regmap_pmic, + reg, S5M8767_ENCTRL_MASK, + S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT); +} + + +#ifdef CONFIG_OF +static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, + struct sec_platform_data *pdata) +{ + struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct device_node *pmic_np, *reg_np; + struct sec_regulator_data *rdata; + struct sec_opmode_data *rmode; + unsigned int i, dvs_voltage_nr = 8; + + pmic_np = iodev->dev->of_node; + if (!pmic_np) { + dev_err(iodev->dev, "could not find pmic sub-node\n"); + return -ENODEV; + } + + struct device_node *regulators_np __free(device_node) = of_get_child_by_name(pmic_np, + "regulators"); + if (!regulators_np) { + dev_err(iodev->dev, "could not find regulators sub-node\n"); + return -EINVAL; + } + + /* count the number of regulators to be supported in pmic */ + pdata->num_regulators = of_get_child_count(regulators_np); + + rdata = devm_kcalloc(&pdev->dev, + pdata->num_regulators, sizeof(*rdata), + GFP_KERNEL); + if (!rdata) + return -ENOMEM; + + rmode = devm_kcalloc(&pdev->dev, + pdata->num_regulators, sizeof(*rmode), + GFP_KERNEL); + if (!rmode) + return -ENOMEM; + + pdata->regulators = rdata; + pdata->opmode = rmode; + for_each_child_of_node(regulators_np, reg_np) { + for (i = 0; i < ARRAY_SIZE(regulators); i++) + if (of_node_name_eq(reg_np, regulators[i].name)) + break; + + if (i == ARRAY_SIZE(regulators)) { + dev_warn(iodev->dev, + "don't know how to configure regulator %pOFn\n", + reg_np); + continue; + } + + rdata->ext_control_gpiod = devm_fwnode_gpiod_get( + &pdev->dev, + of_fwnode_handle(reg_np), + "s5m8767,pmic-ext-control", + GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, + "s5m8767"); + if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) { + rdata->ext_control_gpiod = NULL; + } else if (IS_ERR(rdata->ext_control_gpiod)) { + of_node_put(reg_np); + return PTR_ERR(rdata->ext_control_gpiod); + } + + rdata->id = i; + rdata->initdata = of_get_regulator_init_data( + &pdev->dev, reg_np, + ®ulators[i]); + rdata->reg_node = reg_np; + rdata++; + rmode->id = i; + if (of_property_read_u32(reg_np, "op_mode", + &rmode->mode)) { + dev_warn(iodev->dev, + "no op_mode property at %pOF\n", + reg_np); + + rmode->mode = S5M8767_OPMODE_NORMAL_MODE; + } + rmode++; + } + + if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs")) { + pdata->buck2_gpiodvs = true; + + if (of_property_read_u32_array(pmic_np, + "s5m8767,pmic-buck2-dvs-voltage", + pdata->buck2_voltage, dvs_voltage_nr)) { + dev_err(iodev->dev, "buck2 voltages not specified\n"); + return -EINVAL; + } + } + + if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs")) { + pdata->buck3_gpiodvs = true; + + if (of_property_read_u32_array(pmic_np, + "s5m8767,pmic-buck3-dvs-voltage", + pdata->buck3_voltage, dvs_voltage_nr)) { + dev_err(iodev->dev, "buck3 voltages not specified\n"); + return -EINVAL; + } + } + + if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs")) { + pdata->buck4_gpiodvs = true; + + if (of_property_read_u32_array(pmic_np, + "s5m8767,pmic-buck4-dvs-voltage", + pdata->buck4_voltage, dvs_voltage_nr)) { + dev_err(iodev->dev, "buck4 voltages not specified\n"); + return -EINVAL; + } + } + + if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || + pdata->buck4_gpiodvs) { + if (of_property_read_u32(pmic_np, + "s5m8767,pmic-buck-default-dvs-idx", + &pdata->buck_default_idx)) { + pdata->buck_default_idx = 0; + } else { + if (pdata->buck_default_idx >= 8) { + pdata->buck_default_idx = 0; + dev_info(iodev->dev, + "invalid value for default dvs index, use 0\n"); + } + } + } + + pdata->buck2_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck2-ramp-enable"); + pdata->buck3_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck3-ramp-enable"); + pdata->buck4_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck4-ramp-enable"); + + if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable + || pdata->buck4_ramp_enable) { + if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay", + &pdata->buck_ramp_delay)) + pdata->buck_ramp_delay = 0; + } + + return 0; +} +#else +static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, + struct sec_platform_data *pdata) +{ + return 0; +} +#endif /* CONFIG_OF */ + +static int s5m8767_pmic_probe(struct platform_device *pdev) +{ + struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct sec_platform_data *pdata = iodev->pdata; + struct regulator_config config = { }; + struct s5m8767_info *s5m8767; + int i, ret, buck_init; + const char *gpiods_names[3] = { "S5M8767 DS2", "S5M8767 DS3", "S5M8767 DS4" }; + const char *gpiodvs_names[3] = { "S5M8767 SET1", "S5M8767 SET2", "S5M8767 SET3" }; + + if (!pdata) { + dev_err(pdev->dev.parent, "Platform data not supplied\n"); + return -ENODEV; + } + + if (iodev->dev->of_node) { + ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata); + if (ret) + return ret; + } + + if (pdata->buck2_gpiodvs) { + if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) { + dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); + return -EINVAL; + } + } + + if (pdata->buck3_gpiodvs) { + if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) { + dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); + return -EINVAL; + } + } + + if (pdata->buck4_gpiodvs) { + if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) { + dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); + return -EINVAL; + } + } + + s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info), + GFP_KERNEL); + if (!s5m8767) + return -ENOMEM; + + s5m8767->dev = &pdev->dev; + s5m8767->iodev = iodev; + s5m8767->num_regulators = pdata->num_regulators; + platform_set_drvdata(pdev, s5m8767); + + s5m8767->buck_gpioindex = pdata->buck_default_idx; + s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs; + s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs; + s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs; + + s5m8767->ramp_delay = pdata->buck_ramp_delay; + s5m8767->buck2_ramp = pdata->buck2_ramp_enable; + s5m8767->buck3_ramp = pdata->buck3_ramp_enable; + s5m8767->buck4_ramp = pdata->buck4_ramp_enable; + s5m8767->opmode = pdata->opmode; + + buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, + pdata->buck2_init); + + regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2, + buck_init); + + buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, + pdata->buck3_init); + + regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2, + buck_init); + + buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, + pdata->buck4_init); + + regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2, + buck_init); + + for (i = 0; i < 8; i++) { + if (s5m8767->buck2_gpiodvs) { + s5m8767->buck2_vol[i] = + s5m8767_convert_voltage_to_sel( + &buck_voltage_val2, + pdata->buck2_voltage[i]); + } + + if (s5m8767->buck3_gpiodvs) { + s5m8767->buck3_vol[i] = + s5m8767_convert_voltage_to_sel( + &buck_voltage_val2, + pdata->buck3_voltage[i]); + } + + if (s5m8767->buck4_gpiodvs) { + s5m8767->buck4_vol[i] = + s5m8767_convert_voltage_to_sel( + &buck_voltage_val2, + pdata->buck4_voltage[i]); + } + } + + if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || + pdata->buck4_gpiodvs) { + for (i = 0; i < 3; i++) { + enum gpiod_flags flags; + + if (s5m8767->buck_gpioindex & BIT(2 - i)) + flags = GPIOD_OUT_HIGH; + else + flags = GPIOD_OUT_LOW; + + s5m8767->buck_gpios[i] = devm_gpiod_get_index(iodev->dev, + "s5m8767,pmic-buck-dvs", i, + flags); + if (IS_ERR(s5m8767->buck_gpios[i])) { + return dev_err_probe(iodev->dev, PTR_ERR(s5m8767->buck_gpios[i]), + "invalid gpio[%d]\n", i); + } + + gpiod_set_consumer_name(s5m8767->buck_gpios[i], gpiodvs_names[i]); + } + } + + for (i = 0; i < 3; i++) { + s5m8767->buck_ds[i] = devm_gpiod_get_index(iodev->dev, + "s5m8767,pmic-buck-ds", i, + GPIOD_OUT_LOW); + if (IS_ERR(s5m8767->buck_ds[i])) { + return dev_err_probe(iodev->dev, PTR_ERR(s5m8767->buck_ds[i]), + "can't get GPIO %d\n", i); + } + gpiod_set_consumer_name(s5m8767->buck_ds[i], gpiods_names[i]); + } + + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK2CTRL, 1 << 1, + (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1)); + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK3CTRL, 1 << 1, + (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1)); + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK4CTRL, 1 << 1, + (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1)); + + /* Initialize GPIO DVS registers */ + for (i = 0; i < 8; i++) { + if (s5m8767->buck2_gpiodvs) { + regmap_write(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK2DVS1 + i, + s5m8767->buck2_vol[i]); + } + + if (s5m8767->buck3_gpiodvs) { + regmap_write(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK3DVS1 + i, + s5m8767->buck3_vol[i]); + } + + if (s5m8767->buck4_gpiodvs) { + regmap_write(s5m8767->iodev->regmap_pmic, + S5M8767_REG_BUCK4DVS1 + i, + s5m8767->buck4_vol[i]); + } + } + + if (s5m8767->buck2_ramp) + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_DVSRAMP, 0x08, 0x08); + + if (s5m8767->buck3_ramp) + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_DVSRAMP, 0x04, 0x04); + + if (s5m8767->buck4_ramp) + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_DVSRAMP, 0x02, 0x02); + + if (s5m8767->buck2_ramp || s5m8767->buck3_ramp + || s5m8767->buck4_ramp) { + unsigned int val; + switch (s5m8767->ramp_delay) { + case 5: + val = S5M8767_DVS_BUCK_RAMP_5; + break; + case 10: + val = S5M8767_DVS_BUCK_RAMP_10; + break; + case 25: + val = S5M8767_DVS_BUCK_RAMP_25; + break; + case 50: + val = S5M8767_DVS_BUCK_RAMP_50; + break; + case 100: + val = S5M8767_DVS_BUCK_RAMP_100; + break; + default: + val = S5M8767_DVS_BUCK_RAMP_10; + } + regmap_update_bits(s5m8767->iodev->regmap_pmic, + S5M8767_REG_DVSRAMP, + S5M8767_DVS_BUCK_RAMP_MASK, + val << S5M8767_DVS_BUCK_RAMP_SHIFT); + } + + for (i = 0; i < pdata->num_regulators; i++) { + const struct sec_voltage_desc *desc; + unsigned int id = pdata->regulators[i].id; + int enable_reg, enable_val; + struct regulator_dev *rdev; + + BUILD_BUG_ON(ARRAY_SIZE(regulators) != ARRAY_SIZE(reg_voltage_map)); + if (WARN_ON_ONCE(id >= ARRAY_SIZE(regulators))) + continue; + + desc = reg_voltage_map[id]; + if (desc) { + regulators[id].n_voltages = + (desc->max - desc->min) / desc->step + 1; + regulators[id].min_uV = desc->min; + regulators[id].uV_step = desc->step; + regulators[id].vsel_reg = + s5m8767_get_vsel_reg(id, s5m8767); + if (id < S5M8767_BUCK1) + regulators[id].vsel_mask = 0x3f; + else + regulators[id].vsel_mask = 0xff; + + ret = s5m8767_get_register(s5m8767, id, &enable_reg, + &enable_val); + if (ret) { + dev_err(s5m8767->dev, "error reading registers\n"); + return ret; + } + regulators[id].enable_reg = enable_reg; + regulators[id].enable_mask = S5M8767_ENCTRL_MASK; + regulators[id].enable_val = enable_val; + } + + config.dev = s5m8767->dev; + config.init_data = pdata->regulators[i].initdata; + config.driver_data = s5m8767; + config.regmap = iodev->regmap_pmic; + config.of_node = pdata->regulators[i].reg_node; + config.ena_gpiod = NULL; + if (pdata->regulators[i].ext_control_gpiod) { + /* Assigns config.ena_gpiod */ + s5m8767_regulator_config_ext_control(s5m8767, + &pdata->regulators[i], &config); + + /* + * Hand the GPIO descriptor management over to the + * regulator core, remove it from devres management. + */ + devm_gpiod_unhinge(s5m8767->dev, config.ena_gpiod); + } + rdev = devm_regulator_register(&pdev->dev, ®ulators[id], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(s5m8767->dev, "regulator init failed for %d\n", + id); + return ret; + } + + if (pdata->regulators[i].ext_control_gpiod) { + ret = s5m8767_enable_ext_control(s5m8767, rdev); + if (ret < 0) { + dev_err(s5m8767->dev, + "failed to enable gpio control over %s: %d\n", + rdev->desc->name, ret); + return ret; + } + } + } + + return 0; +} + +static const struct platform_device_id s5m8767_pmic_id[] = { + { .name = "s5m8767-pmic" }, + { } +}; +MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id); + +static struct platform_driver s5m8767_pmic_driver = { + .driver = { + .name = "s5m8767-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = s5m8767_pmic_probe, + .id_table = s5m8767_pmic_id, +}; +module_platform_driver(s5m8767_pmic_driver); + +/* Module information */ +MODULE_AUTHOR("Sangbeom Kim "); +MODULE_DESCRIPTION("Samsung S5M8767 Regulator Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/sc2730-regulator.c b/drivers/regulator/sc2730-regulator.c new file mode 100644 index 000000000..166b19ed5 --- /dev/null +++ b/drivers/regulator/sc2730-regulator.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2021 Unisoc Inc. + */ + +#include +#include +#include +#include +#include +#include + +/* + * SC2730 regulator base address + */ +#define SC2730_REGULATOR_BASE 0x1800 + +/* + * SC2730 regulator lock register + */ +#define SC2730_WR_UNLOCK_VALUE 0x6e7f +#define SC2730_PWR_WR_PROT (SC2730_REGULATOR_BASE + 0x3d0) + +/* + * SC2730 enable register + */ +#define SC2730_POWER_PD_SW (SC2730_REGULATOR_BASE + 0x01c) +#define SC2730_LDO_VDDRF18_PD (SC2730_REGULATOR_BASE + 0x10c) +#define SC2730_LDO_VDDCAMIO_PD (SC2730_REGULATOR_BASE + 0x118) +#define SC2730_LDO_VDDWCN_PD (SC2730_REGULATOR_BASE + 0x11c) +#define SC2730_LDO_VDDCAMD1_PD (SC2730_REGULATOR_BASE + 0x128) +#define SC2730_LDO_VDDCAMD0_PD (SC2730_REGULATOR_BASE + 0x134) +#define SC2730_LDO_VDDRF1V25_PD (SC2730_REGULATOR_BASE + 0x140) +#define SC2730_LDO_AVDD12_PD (SC2730_REGULATOR_BASE + 0x14c) +#define SC2730_LDO_VDDCAMA0_PD (SC2730_REGULATOR_BASE + 0x158) +#define SC2730_LDO_VDDCAMA1_PD (SC2730_REGULATOR_BASE + 0x164) +#define SC2730_LDO_VDDCAMMOT_PD (SC2730_REGULATOR_BASE + 0x170) +#define SC2730_LDO_VDDSIM2_PD (SC2730_REGULATOR_BASE + 0x194) +#define SC2730_LDO_VDDEMMCCORE_PD (SC2730_REGULATOR_BASE + 0x1a0) +#define SC2730_LDO_VDDSDCORE_PD (SC2730_REGULATOR_BASE + 0x1ac) +#define SC2730_LDO_VDDSDIO_PD (SC2730_REGULATOR_BASE + 0x1b8) +#define SC2730_LDO_VDDWIFIPA_PD (SC2730_REGULATOR_BASE + 0x1d0) +#define SC2730_LDO_VDDUSB33_PD (SC2730_REGULATOR_BASE + 0x1e8) +#define SC2730_LDO_VDDLDO0_PD (SC2730_REGULATOR_BASE + 0x1f4) +#define SC2730_LDO_VDDLDO1_PD (SC2730_REGULATOR_BASE + 0x200) +#define SC2730_LDO_VDDLDO2_PD (SC2730_REGULATOR_BASE + 0x20c) +#define SC2730_LDO_VDDKPLED_PD (SC2730_REGULATOR_BASE + 0x38c) + +/* + * SC2730 enable mask + */ +#define SC2730_DCDC_CPU_PD_MASK BIT(4) +#define SC2730_DCDC_GPU_PD_MASK BIT(3) +#define SC2730_DCDC_CORE_PD_MASK BIT(5) +#define SC2730_DCDC_MODEM_PD_MASK BIT(11) +#define SC2730_DCDC_MEM_PD_MASK BIT(6) +#define SC2730_DCDC_MEMQ_PD_MASK BIT(12) +#define SC2730_DCDC_GEN0_PD_MASK BIT(8) +#define SC2730_DCDC_GEN1_PD_MASK BIT(7) +#define SC2730_DCDC_SRAM_PD_MASK BIT(13) +#define SC2730_LDO_AVDD18_PD_MASK BIT(2) +#define SC2730_LDO_VDDRF18_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMIO_PD_MASK BIT(0) +#define SC2730_LDO_VDDWCN_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMD1_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMD0_PD_MASK BIT(0) +#define SC2730_LDO_VDDRF1V25_PD_MASK BIT(0) +#define SC2730_LDO_AVDD12_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMA0_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMA1_PD_MASK BIT(0) +#define SC2730_LDO_VDDCAMMOT_PD_MASK BIT(0) +#define SC2730_LDO_VDDSIM2_PD_MASK BIT(0) +#define SC2730_LDO_VDDEMMCCORE_PD_MASK BIT(0) +#define SC2730_LDO_VDDSDCORE_PD_MASK BIT(0) +#define SC2730_LDO_VDDSDIO_PD_MASK BIT(0) +#define SC2730_LDO_VDD28_PD_MASK BIT(1) +#define SC2730_LDO_VDDWIFIPA_PD_MASK BIT(0) +#define SC2730_LDO_VDD18_DCXO_PD_MASK BIT(10) +#define SC2730_LDO_VDDUSB33_PD_MASK BIT(0) +#define SC2730_LDO_VDDLDO0_PD_MASK BIT(0) +#define SC2730_LDO_VDDLDO1_PD_MASK BIT(0) +#define SC2730_LDO_VDDLDO2_PD_MASK BIT(0) +#define SC2730_LDO_VDDKPLED_PD_MASK BIT(15) + +/* + * SC2730 vsel register + */ +#define SC2730_DCDC_CPU_VOL (SC2730_REGULATOR_BASE + 0x44) +#define SC2730_DCDC_GPU_VOL (SC2730_REGULATOR_BASE + 0x54) +#define SC2730_DCDC_CORE_VOL (SC2730_REGULATOR_BASE + 0x64) +#define SC2730_DCDC_MODEM_VOL (SC2730_REGULATOR_BASE + 0x74) +#define SC2730_DCDC_MEM_VOL (SC2730_REGULATOR_BASE + 0x84) +#define SC2730_DCDC_MEMQ_VOL (SC2730_REGULATOR_BASE + 0x94) +#define SC2730_DCDC_GEN0_VOL (SC2730_REGULATOR_BASE + 0xa4) +#define SC2730_DCDC_GEN1_VOL (SC2730_REGULATOR_BASE + 0xb4) +#define SC2730_DCDC_SRAM_VOL (SC2730_REGULATOR_BASE + 0xdc) +#define SC2730_LDO_AVDD18_VOL (SC2730_REGULATOR_BASE + 0x104) +#define SC2730_LDO_VDDRF18_VOL (SC2730_REGULATOR_BASE + 0x110) +#define SC2730_LDO_VDDCAMIO_VOL (SC2730_REGULATOR_BASE + 0x28) +#define SC2730_LDO_VDDWCN_VOL (SC2730_REGULATOR_BASE + 0x120) +#define SC2730_LDO_VDDCAMD1_VOL (SC2730_REGULATOR_BASE + 0x12c) +#define SC2730_LDO_VDDCAMD0_VOL (SC2730_REGULATOR_BASE + 0x138) +#define SC2730_LDO_VDDRF1V25_VOL (SC2730_REGULATOR_BASE + 0x144) +#define SC2730_LDO_AVDD12_VOL (SC2730_REGULATOR_BASE + 0x150) +#define SC2730_LDO_VDDCAMA0_VOL (SC2730_REGULATOR_BASE + 0x15c) +#define SC2730_LDO_VDDCAMA1_VOL (SC2730_REGULATOR_BASE + 0x168) +#define SC2730_LDO_VDDCAMMOT_VOL (SC2730_REGULATOR_BASE + 0x174) +#define SC2730_LDO_VDDSIM2_VOL (SC2730_REGULATOR_BASE + 0x198) +#define SC2730_LDO_VDDEMMCCORE_VOL (SC2730_REGULATOR_BASE + 0x1a4) +#define SC2730_LDO_VDDSDCORE_VOL (SC2730_REGULATOR_BASE + 0x1b0) +#define SC2730_LDO_VDDSDIO_VOL (SC2730_REGULATOR_BASE + 0x1bc) +#define SC2730_LDO_VDD28_VOL (SC2730_REGULATOR_BASE + 0x1c8) +#define SC2730_LDO_VDDWIFIPA_VOL (SC2730_REGULATOR_BASE + 0x1d4) +#define SC2730_LDO_VDD18_DCXO_VOL (SC2730_REGULATOR_BASE + 0x1e0) +#define SC2730_LDO_VDDUSB33_VOL (SC2730_REGULATOR_BASE + 0x1ec) +#define SC2730_LDO_VDDLDO0_VOL (SC2730_REGULATOR_BASE + 0x1f8) +#define SC2730_LDO_VDDLDO1_VOL (SC2730_REGULATOR_BASE + 0x204) +#define SC2730_LDO_VDDLDO2_VOL (SC2730_REGULATOR_BASE + 0x210) +#define SC2730_LDO_VDDKPLED_VOL (SC2730_REGULATOR_BASE + 0x38c) + +/* + * SC2730 vsel register mask + */ +#define SC2730_DCDC_CPU_VOL_MASK GENMASK(8, 0) +#define SC2730_DCDC_GPU_VOL_MASK GENMASK(8, 0) +#define SC2730_DCDC_CORE_VOL_MASK GENMASK(8, 0) +#define SC2730_DCDC_MODEM_VOL_MASK GENMASK(8, 0) +#define SC2730_DCDC_MEM_VOL_MASK GENMASK(7, 0) +#define SC2730_DCDC_MEMQ_VOL_MASK GENMASK(8, 0) +#define SC2730_DCDC_GEN0_VOL_MASK GENMASK(7, 0) +#define SC2730_DCDC_GEN1_VOL_MASK GENMASK(7, 0) +#define SC2730_DCDC_SRAM_VOL_MASK GENMASK(8, 0) +#define SC2730_LDO_AVDD18_VOL_MASK GENMASK(5, 0) +#define SC2730_LDO_VDDRF18_VOL_MASK GENMASK(5, 0) +#define SC2730_LDO_VDDCAMIO_VOL_MASK GENMASK(5, 0) +#define SC2730_LDO_VDDWCN_VOL_MASK GENMASK(5, 0) +#define SC2730_LDO_VDDCAMD1_VOL_MASK GENMASK(4, 0) +#define SC2730_LDO_VDDCAMD0_VOL_MASK GENMASK(4, 0) +#define SC2730_LDO_VDDRF1V25_VOL_MASK GENMASK(4, 0) +#define SC2730_LDO_AVDD12_VOL_MASK GENMASK(4, 0) +#define SC2730_LDO_VDDCAMA0_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDCAMA1_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDCAMMOT_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDSIM2_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDEMMCCORE_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDSDCORE_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDSDIO_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDD28_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDWIFIPA_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDD18_DCXO_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDUSB33_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDLDO0_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDLDO1_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDLDO2_VOL_MASK GENMASK(7, 0) +#define SC2730_LDO_VDDKPLED_VOL_MASK GENMASK(14, 7) + +enum sc2730_regulator_id { + SC2730_DCDC_CPU, + SC2730_DCDC_GPU, + SC2730_DCDC_CORE, + SC2730_DCDC_MODEM, + SC2730_DCDC_MEM, + SC2730_DCDC_MEMQ, + SC2730_DCDC_GEN0, + SC2730_DCDC_GEN1, + SC2730_DCDC_SRAM, + SC2730_LDO_AVDD18, + SC2730_LDO_VDDRF18, + SC2730_LDO_VDDCAMIO, + SC2730_LDO_VDDWCN, + SC2730_LDO_VDDCAMD1, + SC2730_LDO_VDDCAMD0, + SC2730_LDO_VDDRF1V25, + SC2730_LDO_AVDD12, + SC2730_LDO_VDDCAMA0, + SC2730_LDO_VDDCAMA1, + SC2730_LDO_VDDCAMMOT, + SC2730_LDO_VDDSIM2, + SC2730_LDO_VDDEMMCCORE, + SC2730_LDO_VDDSDCORE, + SC2730_LDO_VDDSDIO, + SC2730_LDO_VDD28, + SC2730_LDO_VDDWIFIPA, + SC2730_LDO_VDD18_DCXO, + SC2730_LDO_VDDUSB33, + SC2730_LDO_VDDLDO0, + SC2730_LDO_VDDLDO1, + SC2730_LDO_VDDLDO2, + SC2730_LDO_VDDKPLED, +}; + +static const struct regulator_ops sc2730_regu_linear_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +#define SC2730_REGU_LINEAR(_id, of_name, en_reg, en_mask, vreg, vmask, \ + vstep, vmin, vmax) { \ + .name = #_id, \ + .of_match = of_name, \ + .regulators_node = "regulators", \ + .ops = &sc2730_regu_linear_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = SC2730_##_id, \ + .owner = THIS_MODULE, \ + .min_uV = vmin, \ + .n_voltages = ((vmax) - (vmin)) / (vstep) + 1, \ + .uV_step = vstep, \ + .enable_is_inverted = true, \ + .enable_val = 0, \ + .enable_reg = en_reg, \ + .enable_mask = en_mask, \ + .vsel_reg = vreg, \ + .vsel_mask = vmask, \ + .linear_min_sel = 0, \ +} + +static const struct regulator_desc regulators[] = { + SC2730_REGU_LINEAR(DCDC_CPU, "dcdc-cpu", SC2730_POWER_PD_SW, + SC2730_DCDC_CPU_PD_MASK, SC2730_DCDC_CPU_VOL, + SC2730_DCDC_CPU_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(DCDC_GPU, "dcdc-gpu", SC2730_POWER_PD_SW, + SC2730_DCDC_GPU_PD_MASK, SC2730_DCDC_GPU_VOL, + SC2730_DCDC_GPU_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(DCDC_CORE, "dcdc-core", SC2730_POWER_PD_SW, + SC2730_DCDC_CORE_PD_MASK, SC2730_DCDC_CORE_VOL, + SC2730_DCDC_CORE_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(DCDC_MODEM, "dcdc-modem", SC2730_POWER_PD_SW, + SC2730_DCDC_MODEM_PD_MASK, SC2730_DCDC_MODEM_VOL, + SC2730_DCDC_MODEM_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(DCDC_MEM, "dcdc-mem", SC2730_POWER_PD_SW, + SC2730_DCDC_MEM_PD_MASK, SC2730_DCDC_MEM_VOL, + SC2730_DCDC_MEM_VOL_MASK, 6250, 0, 1593750), + SC2730_REGU_LINEAR(DCDC_MEMQ, "dcdc-memq", SC2730_POWER_PD_SW, + SC2730_DCDC_MEMQ_PD_MASK, SC2730_DCDC_MEMQ_VOL, + SC2730_DCDC_MEMQ_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(DCDC_GEN0, "dcdc-gen0", SC2730_POWER_PD_SW, + SC2730_DCDC_GEN0_PD_MASK, SC2730_DCDC_GEN0_VOL, + SC2730_DCDC_GEN0_VOL_MASK, 9375, 20000, 2410625), + SC2730_REGU_LINEAR(DCDC_GEN1, "dcdc-gen1", SC2730_POWER_PD_SW, + SC2730_DCDC_GEN1_PD_MASK, SC2730_DCDC_GEN1_VOL, + SC2730_DCDC_GEN1_VOL_MASK, 6250, 50000, 1643750), + SC2730_REGU_LINEAR(DCDC_SRAM, "dcdc-sram", SC2730_POWER_PD_SW, + SC2730_DCDC_SRAM_PD_MASK, SC2730_DCDC_SRAM_VOL, + SC2730_DCDC_SRAM_VOL_MASK, 3125, 0, 1596875), + SC2730_REGU_LINEAR(LDO_AVDD18, "ldo-avdd18", SC2730_POWER_PD_SW, + SC2730_LDO_AVDD18_PD_MASK, SC2730_LDO_AVDD18_VOL, + SC2730_LDO_AVDD18_VOL_MASK, 10000, 1175000, 1805000), + SC2730_REGU_LINEAR(LDO_VDDRF18, "ldo-vddrf18", SC2730_LDO_VDDRF18_PD, + SC2730_LDO_VDDRF18_PD_MASK, SC2730_LDO_VDDRF18_VOL, + SC2730_LDO_VDDRF18_VOL_MASK, 10000, 1175000, 1805000), + SC2730_REGU_LINEAR(LDO_VDDCAMIO, "ldo-vddcamio", SC2730_LDO_VDDCAMIO_PD, + SC2730_LDO_VDDCAMIO_PD_MASK, SC2730_LDO_VDDCAMIO_VOL, + SC2730_LDO_VDDCAMIO_VOL_MASK, 10000, 1200000, 1830000), + SC2730_REGU_LINEAR(LDO_VDDWCN, "ldo-vddwcn", SC2730_LDO_VDDWCN_PD, + SC2730_LDO_VDDWCN_PD_MASK, SC2730_LDO_VDDWCN_VOL, + SC2730_LDO_VDDWCN_VOL_MASK, 15000, 900000, 1845000), + SC2730_REGU_LINEAR(LDO_VDDCAMD1, "ldo-vddcamd1", SC2730_LDO_VDDCAMD1_PD, + SC2730_LDO_VDDCAMD1_PD_MASK, SC2730_LDO_VDDCAMD1_VOL, + SC2730_LDO_VDDCAMD1_VOL_MASK, 15000, 900000, 1365000), + SC2730_REGU_LINEAR(LDO_VDDCAMD0, "ldo-vddcamd0", SC2730_LDO_VDDCAMD0_PD, + SC2730_LDO_VDDCAMD0_PD_MASK, SC2730_LDO_VDDCAMD0_VOL, + SC2730_LDO_VDDCAMD0_VOL_MASK, 15000, 900000, 1365000), + SC2730_REGU_LINEAR(LDO_VDDRF1V25, "ldo-vddrf1v25", SC2730_LDO_VDDRF1V25_PD, + SC2730_LDO_VDDRF1V25_PD_MASK, SC2730_LDO_VDDRF1V25_VOL, + SC2730_LDO_VDDRF1V25_VOL_MASK, 15000, 900000, 1365000), + SC2730_REGU_LINEAR(LDO_AVDD12, "ldo-avdd12", SC2730_LDO_AVDD12_PD, + SC2730_LDO_AVDD12_PD_MASK, SC2730_LDO_AVDD12_VOL, + SC2730_LDO_AVDD12_VOL_MASK, 15000, 900000, 1365000), + SC2730_REGU_LINEAR(LDO_VDDCAMA0, "ldo-vddcama0", SC2730_LDO_VDDCAMA0_PD, + SC2730_LDO_VDDCAMA0_PD_MASK, SC2730_LDO_VDDCAMA0_VOL, + SC2730_LDO_VDDCAMA0_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDCAMA1, "ldo-vddcama1", SC2730_LDO_VDDCAMA1_PD, + SC2730_LDO_VDDCAMA1_PD_MASK, SC2730_LDO_VDDCAMA1_VOL, + SC2730_LDO_VDDCAMA1_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDCAMMOT, "ldo-vddcammot", SC2730_LDO_VDDCAMMOT_PD, + SC2730_LDO_VDDCAMMOT_PD_MASK, SC2730_LDO_VDDCAMMOT_VOL, + SC2730_LDO_VDDCAMMOT_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDSIM2, "ldo-vddsim2", SC2730_LDO_VDDSIM2_PD, + SC2730_LDO_VDDSIM2_PD_MASK, SC2730_LDO_VDDSIM2_VOL, + SC2730_LDO_VDDSIM2_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDEMMCCORE, "ldo-vddemmccore", SC2730_LDO_VDDEMMCCORE_PD, + SC2730_LDO_VDDEMMCCORE_PD_MASK, SC2730_LDO_VDDEMMCCORE_VOL, + SC2730_LDO_VDDEMMCCORE_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDSDCORE, "ldo-vddsdcore", SC2730_LDO_VDDSDCORE_PD, + SC2730_LDO_VDDSDCORE_PD_MASK, SC2730_LDO_VDDSDCORE_VOL, + SC2730_LDO_VDDSDCORE_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDSDIO, "ldo-vddsdio", SC2730_LDO_VDDSDIO_PD, + SC2730_LDO_VDDSDIO_PD_MASK, SC2730_LDO_VDDSDIO_VOL, + SC2730_LDO_VDDSDIO_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDD28, "ldo-vdd28", SC2730_POWER_PD_SW, + SC2730_LDO_VDD28_PD_MASK, SC2730_LDO_VDD28_VOL, + SC2730_LDO_VDD28_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDWIFIPA, "ldo-vddwifipa", SC2730_LDO_VDDWIFIPA_PD, + SC2730_LDO_VDDWIFIPA_PD_MASK, SC2730_LDO_VDDWIFIPA_VOL, + SC2730_LDO_VDDWIFIPA_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDD18_DCXO, "ldo-vdd18-dcxo", SC2730_POWER_PD_SW, + SC2730_LDO_VDD18_DCXO_PD_MASK, SC2730_LDO_VDD18_DCXO_VOL, + SC2730_LDO_VDD18_DCXO_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDUSB33, "ldo-vddusb33", SC2730_LDO_VDDUSB33_PD, + SC2730_LDO_VDDUSB33_PD_MASK, SC2730_LDO_VDDUSB33_VOL, + SC2730_LDO_VDDUSB33_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDLDO0, "ldo-vddldo0", SC2730_LDO_VDDLDO0_PD, + SC2730_LDO_VDDLDO0_PD_MASK, SC2730_LDO_VDDLDO0_VOL, + SC2730_LDO_VDDLDO0_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDLDO1, "ldo-vddldo1", SC2730_LDO_VDDLDO1_PD, + SC2730_LDO_VDDLDO1_PD_MASK, SC2730_LDO_VDDLDO1_VOL, + SC2730_LDO_VDDLDO1_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDLDO2, "ldo-vddldo2", SC2730_LDO_VDDLDO2_PD, + SC2730_LDO_VDDLDO2_PD_MASK, SC2730_LDO_VDDLDO2_VOL, + SC2730_LDO_VDDLDO2_VOL_MASK, 10000, 1200000, 3750000), + SC2730_REGU_LINEAR(LDO_VDDKPLED, "ldo-vddkpled", SC2730_LDO_VDDKPLED_PD, + SC2730_LDO_VDDKPLED_PD_MASK, SC2730_LDO_VDDKPLED_VOL, + SC2730_LDO_VDDKPLED_VOL_MASK, 10000, 1200000, 3750000), +}; + +static int sc2730_regulator_unlock(struct regmap *regmap) +{ + return regmap_write(regmap, SC2730_PWR_WR_PROT, SC2730_WR_UNLOCK_VALUE); +} + +static int sc2730_regulator_probe(struct platform_device *pdev) +{ + int i, ret; + struct regmap *regmap; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return dev_err_probe(&pdev->dev, -ENODEV, "failed to get regmap\n"); + + ret = sc2730_regulator_unlock(regmap); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to release regulator lock\n"); + + config.dev = pdev->dev.parent; + config.regmap = regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], &config); + if (IS_ERR(rdev)) { + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "failed to register regulator %s\n", + regulators[i].name); + } + } + + return 0; +} + +static const struct platform_device_id sc2730_regulator_id_table[] = { + { .name = "sc2730-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, sc2730_regulator_id_table); + +static struct platform_driver sc2730_regulator_driver = { + .driver = { + .name = "sc2730-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = sc2730_regulator_probe, + .id_table = sc2730_regulator_id_table, +}; + +module_platform_driver(sc2730_regulator_driver); + +MODULE_AUTHOR("Zhongfa Wang "); +MODULE_DESCRIPTION("Spreadtrum SC2730 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/sc2731-regulator.c b/drivers/regulator/sc2731-regulator.c new file mode 100644 index 000000000..5447e1a47 --- /dev/null +++ b/drivers/regulator/sc2731-regulator.c @@ -0,0 +1,257 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017 Spreadtrum Communications Inc. + */ + +#include +#include +#include +#include +#include +#include + +/* + * SC2731 regulator lock register + */ +#define SC2731_PWR_WR_PROT 0xf0c +#define SC2731_WR_UNLOCK_VALUE 0x6e7f + +/* + * SC2731 enable register + */ +#define SC2731_POWER_PD_SW 0xc28 +#define SC2731_LDO_CAMA0_PD 0xcfc +#define SC2731_LDO_CAMA1_PD 0xd04 +#define SC2731_LDO_CAMMOT_PD 0xd0c +#define SC2731_LDO_VLDO_PD 0xd6c +#define SC2731_LDO_EMMCCORE_PD 0xd2c +#define SC2731_LDO_SDCORE_PD 0xd74 +#define SC2731_LDO_SDIO_PD 0xd70 +#define SC2731_LDO_WIFIPA_PD 0xd4c +#define SC2731_LDO_USB33_PD 0xd5c +#define SC2731_LDO_CAMD0_PD 0xd7c +#define SC2731_LDO_CAMD1_PD 0xd84 +#define SC2731_LDO_CON_PD 0xd8c +#define SC2731_LDO_CAMIO_PD 0xd94 +#define SC2731_LDO_SRAM_PD 0xd78 + +/* + * SC2731 enable mask + */ +#define SC2731_DCDC_CPU0_PD_MASK BIT(4) +#define SC2731_DCDC_CPU1_PD_MASK BIT(3) +#define SC2731_DCDC_RF_PD_MASK BIT(11) +#define SC2731_LDO_CAMA0_PD_MASK BIT(0) +#define SC2731_LDO_CAMA1_PD_MASK BIT(0) +#define SC2731_LDO_CAMMOT_PD_MASK BIT(0) +#define SC2731_LDO_VLDO_PD_MASK BIT(0) +#define SC2731_LDO_EMMCCORE_PD_MASK BIT(0) +#define SC2731_LDO_SDCORE_PD_MASK BIT(0) +#define SC2731_LDO_SDIO_PD_MASK BIT(0) +#define SC2731_LDO_WIFIPA_PD_MASK BIT(0) +#define SC2731_LDO_USB33_PD_MASK BIT(0) +#define SC2731_LDO_CAMD0_PD_MASK BIT(0) +#define SC2731_LDO_CAMD1_PD_MASK BIT(0) +#define SC2731_LDO_CON_PD_MASK BIT(0) +#define SC2731_LDO_CAMIO_PD_MASK BIT(0) +#define SC2731_LDO_SRAM_PD_MASK BIT(0) + +/* + * SC2731 vsel register + */ +#define SC2731_DCDC_CPU0_VOL 0xc54 +#define SC2731_DCDC_CPU1_VOL 0xc64 +#define SC2731_DCDC_RF_VOL 0xcb8 +#define SC2731_LDO_CAMA0_VOL 0xd00 +#define SC2731_LDO_CAMA1_VOL 0xd08 +#define SC2731_LDO_CAMMOT_VOL 0xd10 +#define SC2731_LDO_VLDO_VOL 0xd28 +#define SC2731_LDO_EMMCCORE_VOL 0xd30 +#define SC2731_LDO_SDCORE_VOL 0xd38 +#define SC2731_LDO_SDIO_VOL 0xd40 +#define SC2731_LDO_WIFIPA_VOL 0xd50 +#define SC2731_LDO_USB33_VOL 0xd60 +#define SC2731_LDO_CAMD0_VOL 0xd80 +#define SC2731_LDO_CAMD1_VOL 0xd88 +#define SC2731_LDO_CON_VOL 0xd90 +#define SC2731_LDO_CAMIO_VOL 0xd98 +#define SC2731_LDO_SRAM_VOL 0xdB0 + +/* + * SC2731 vsel register mask + */ +#define SC2731_DCDC_CPU0_VOL_MASK GENMASK(8, 0) +#define SC2731_DCDC_CPU1_VOL_MASK GENMASK(8, 0) +#define SC2731_DCDC_RF_VOL_MASK GENMASK(8, 0) +#define SC2731_LDO_CAMA0_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_CAMA1_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_CAMMOT_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_VLDO_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_EMMCCORE_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_SDCORE_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_SDIO_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_WIFIPA_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_USB33_VOL_MASK GENMASK(7, 0) +#define SC2731_LDO_CAMD0_VOL_MASK GENMASK(6, 0) +#define SC2731_LDO_CAMD1_VOL_MASK GENMASK(6, 0) +#define SC2731_LDO_CON_VOL_MASK GENMASK(6, 0) +#define SC2731_LDO_CAMIO_VOL_MASK GENMASK(6, 0) +#define SC2731_LDO_SRAM_VOL_MASK GENMASK(6, 0) + +enum sc2731_regulator_id { + SC2731_BUCK_CPU0, + SC2731_BUCK_CPU1, + SC2731_BUCK_RF, + SC2731_LDO_CAMA0, + SC2731_LDO_CAMA1, + SC2731_LDO_CAMMOT, + SC2731_LDO_VLDO, + SC2731_LDO_EMMCCORE, + SC2731_LDO_SDCORE, + SC2731_LDO_SDIO, + SC2731_LDO_WIFIPA, + SC2731_LDO_USB33, + SC2731_LDO_CAMD0, + SC2731_LDO_CAMD1, + SC2731_LDO_CON, + SC2731_LDO_CAMIO, + SC2731_LDO_SRAM, +}; + +static const struct regulator_ops sc2731_regu_linear_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +#define SC2731_REGU_LINEAR(_id, en_reg, en_mask, vreg, vmask, \ + vstep, vmin, vmax) { \ + .name = #_id, \ + .of_match = of_match_ptr(#_id), \ + .ops = &sc2731_regu_linear_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = SC2731_##_id, \ + .owner = THIS_MODULE, \ + .min_uV = vmin, \ + .n_voltages = ((vmax) - (vmin)) / (vstep) + 1, \ + .uV_step = vstep, \ + .enable_is_inverted = true, \ + .enable_val = 0, \ + .enable_reg = en_reg, \ + .enable_mask = en_mask, \ + .vsel_reg = vreg, \ + .vsel_mask = vmask, \ +} + +static const struct regulator_desc regulators[] = { + SC2731_REGU_LINEAR(BUCK_CPU0, SC2731_POWER_PD_SW, + SC2731_DCDC_CPU0_PD_MASK, SC2731_DCDC_CPU0_VOL, + SC2731_DCDC_CPU0_VOL_MASK, 3125, 400000, 1996875), + SC2731_REGU_LINEAR(BUCK_CPU1, SC2731_POWER_PD_SW, + SC2731_DCDC_CPU1_PD_MASK, SC2731_DCDC_CPU1_VOL, + SC2731_DCDC_CPU1_VOL_MASK, 3125, 400000, 1996875), + SC2731_REGU_LINEAR(BUCK_RF, SC2731_POWER_PD_SW, SC2731_DCDC_RF_PD_MASK, + SC2731_DCDC_RF_VOL, SC2731_DCDC_RF_VOL_MASK, + 3125, 600000, 2196875), + SC2731_REGU_LINEAR(LDO_CAMA0, SC2731_LDO_CAMA0_PD, + SC2731_LDO_CAMA0_PD_MASK, SC2731_LDO_CAMA0_VOL, + SC2731_LDO_CAMA0_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_CAMA1, SC2731_LDO_CAMA1_PD, + SC2731_LDO_CAMA1_PD_MASK, SC2731_LDO_CAMA1_VOL, + SC2731_LDO_CAMA1_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_CAMMOT, SC2731_LDO_CAMMOT_PD, + SC2731_LDO_CAMMOT_PD_MASK, SC2731_LDO_CAMMOT_VOL, + SC2731_LDO_CAMMOT_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_VLDO, SC2731_LDO_VLDO_PD, + SC2731_LDO_VLDO_PD_MASK, SC2731_LDO_VLDO_VOL, + SC2731_LDO_VLDO_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_EMMCCORE, SC2731_LDO_EMMCCORE_PD, + SC2731_LDO_EMMCCORE_PD_MASK, SC2731_LDO_EMMCCORE_VOL, + SC2731_LDO_EMMCCORE_VOL_MASK, 10000, 1200000, + 3750000), + SC2731_REGU_LINEAR(LDO_SDCORE, SC2731_LDO_SDCORE_PD, + SC2731_LDO_SDCORE_PD_MASK, SC2731_LDO_SDCORE_VOL, + SC2731_LDO_SDCORE_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_SDIO, SC2731_LDO_SDIO_PD, + SC2731_LDO_SDIO_PD_MASK, SC2731_LDO_SDIO_VOL, + SC2731_LDO_SDIO_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_WIFIPA, SC2731_LDO_WIFIPA_PD, + SC2731_LDO_WIFIPA_PD_MASK, SC2731_LDO_WIFIPA_VOL, + SC2731_LDO_WIFIPA_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_USB33, SC2731_LDO_USB33_PD, + SC2731_LDO_USB33_PD_MASK, SC2731_LDO_USB33_VOL, + SC2731_LDO_USB33_VOL_MASK, 10000, 1200000, 3750000), + SC2731_REGU_LINEAR(LDO_CAMD0, SC2731_LDO_CAMD0_PD, + SC2731_LDO_CAMD0_PD_MASK, SC2731_LDO_CAMD0_VOL, + SC2731_LDO_CAMD0_VOL_MASK, 6250, 1000000, 1793750), + SC2731_REGU_LINEAR(LDO_CAMD1, SC2731_LDO_CAMD1_PD, + SC2731_LDO_CAMD1_PD_MASK, SC2731_LDO_CAMD1_VOL, + SC2731_LDO_CAMD1_VOL_MASK, 6250, 1000000, 1793750), + SC2731_REGU_LINEAR(LDO_CON, SC2731_LDO_CON_PD, + SC2731_LDO_CON_PD_MASK, SC2731_LDO_CON_VOL, + SC2731_LDO_CON_VOL_MASK, 6250, 1000000, 1793750), + SC2731_REGU_LINEAR(LDO_CAMIO, SC2731_LDO_CAMIO_PD, + SC2731_LDO_CAMIO_PD_MASK, SC2731_LDO_CAMIO_VOL, + SC2731_LDO_CAMIO_VOL_MASK, 6250, 1000000, 1793750), + SC2731_REGU_LINEAR(LDO_SRAM, SC2731_LDO_SRAM_PD, + SC2731_LDO_SRAM_PD_MASK, SC2731_LDO_SRAM_VOL, + SC2731_LDO_SRAM_VOL_MASK, 6250, 1000000, 1793750), +}; + +static int sc2731_regulator_unlock(struct regmap *regmap) +{ + return regmap_write(regmap, SC2731_PWR_WR_PROT, + SC2731_WR_UNLOCK_VALUE); +} + +static int sc2731_regulator_probe(struct platform_device *pdev) +{ + int i, ret; + struct regmap *regmap; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "failed to get regmap.\n"); + return -ENODEV; + } + + ret = sc2731_regulator_unlock(regmap); + if (ret) { + dev_err(&pdev->dev, "failed to release regulator lock\n"); + return ret; + } + + config.dev = &pdev->dev; + config.regmap = regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + regulators[i].name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static struct platform_driver sc2731_regulator_driver = { + .driver = { + .name = "sc27xx-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = sc2731_regulator_probe, +}; + +module_platform_driver(sc2731_regulator_driver); + +MODULE_AUTHOR("Chen Junhui "); +MODULE_DESCRIPTION("Spreadtrum SC2731 regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/scmi-regulator.c b/drivers/regulator/scmi-regulator.c new file mode 100644 index 000000000..c005e65ba --- /dev/null +++ b/drivers/regulator/scmi-regulator.c @@ -0,0 +1,421 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// System Control and Management Interface (SCMI) based regulator driver +// +// Copyright (C) 2020-2021 ARM Ltd. +// +// Implements a regulator driver on top of the SCMI Voltage Protocol. +// +// The ARM SCMI Protocol aims in general to hide as much as possible all the +// underlying operational details while providing an abstracted interface for +// its users to operate upon: as a consequence the resulting operational +// capabilities and configurability of this regulator device are much more +// limited than the ones usually available on a standard physical regulator. +// +// The supported SCMI regulator ops are restricted to the bare minimum: +// +// - 'status_ops': enable/disable/is_enabled +// - 'voltage_ops': get_voltage_sel/set_voltage_sel +// list_voltage/map_voltage +// +// Each SCMI regulator instance is associated, through the means of a proper DT +// entry description, to a specific SCMI Voltage Domain. + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct scmi_voltage_proto_ops *voltage_ops; + +struct scmi_regulator { + u32 id; + struct scmi_device *sdev; + struct scmi_protocol_handle *ph; + struct regulator_dev *rdev; + struct device_node *of_node; + struct regulator_desc desc; + struct regulator_config conf; +}; + +struct scmi_regulator_info { + int num_doms; + struct scmi_regulator **sregv; +}; + +static int scmi_reg_enable(struct regulator_dev *rdev) +{ + struct scmi_regulator *sreg = rdev_get_drvdata(rdev); + + return voltage_ops->config_set(sreg->ph, sreg->id, + SCMI_VOLTAGE_ARCH_STATE_ON); +} + +static int scmi_reg_disable(struct regulator_dev *rdev) +{ + struct scmi_regulator *sreg = rdev_get_drvdata(rdev); + + return voltage_ops->config_set(sreg->ph, sreg->id, + SCMI_VOLTAGE_ARCH_STATE_OFF); +} + +static int scmi_reg_is_enabled(struct regulator_dev *rdev) +{ + int ret; + u32 config; + struct scmi_regulator *sreg = rdev_get_drvdata(rdev); + + ret = voltage_ops->config_get(sreg->ph, sreg->id, &config); + if (ret) { + dev_err(&sreg->sdev->dev, + "Error %d reading regulator %s status.\n", + ret, sreg->desc.name); + return ret; + } + + return config & SCMI_VOLTAGE_ARCH_STATE_ON; +} + +static int scmi_reg_get_voltage_sel(struct regulator_dev *rdev) +{ + int ret; + s32 volt_uV; + struct scmi_regulator *sreg = rdev_get_drvdata(rdev); + + ret = voltage_ops->level_get(sreg->ph, sreg->id, &volt_uV); + if (ret) + return ret; + + return sreg->desc.ops->map_voltage(rdev, volt_uV, volt_uV); +} + +static int scmi_reg_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + s32 volt_uV; + struct scmi_regulator *sreg = rdev_get_drvdata(rdev); + + volt_uV = sreg->desc.ops->list_voltage(rdev, selector); + if (volt_uV <= 0) + return -EINVAL; + + return voltage_ops->level_set(sreg->ph, sreg->id, 0x0, volt_uV); +} + +static const struct regulator_ops scmi_reg_fixed_ops = { + .enable = scmi_reg_enable, + .disable = scmi_reg_disable, + .is_enabled = scmi_reg_is_enabled, +}; + +static const struct regulator_ops scmi_reg_linear_ops = { + .enable = scmi_reg_enable, + .disable = scmi_reg_disable, + .is_enabled = scmi_reg_is_enabled, + .get_voltage_sel = scmi_reg_get_voltage_sel, + .set_voltage_sel = scmi_reg_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, +}; + +static const struct regulator_ops scmi_reg_discrete_ops = { + .enable = scmi_reg_enable, + .disable = scmi_reg_disable, + .is_enabled = scmi_reg_is_enabled, + .get_voltage_sel = scmi_reg_get_voltage_sel, + .set_voltage_sel = scmi_reg_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, +}; + +static int +scmi_config_linear_regulator_mappings(struct scmi_regulator *sreg, + const struct scmi_voltage_info *vinfo) +{ + s32 delta_uV; + + /* + * Note that SCMI voltage domains describable by linear ranges + * (segments) {low, high, step} are guaranteed to come in one single + * triplet by the SCMI Voltage Domain protocol support itself. + */ + + delta_uV = (vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_HIGH] - + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW]); + + /* Rule out buggy negative-intervals answers from fw */ + if (delta_uV < 0) { + dev_err(&sreg->sdev->dev, + "Invalid volt-range %d-%duV for domain %d\n", + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW], + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_HIGH], + sreg->id); + return -EINVAL; + } + + if (!delta_uV) { + /* Just one fixed voltage exposed by SCMI */ + sreg->desc.fixed_uV = + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW]; + sreg->desc.n_voltages = 1; + sreg->desc.ops = &scmi_reg_fixed_ops; + } else { + /* One simple linear mapping. */ + sreg->desc.min_uV = + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW]; + sreg->desc.uV_step = + vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_STEP]; + sreg->desc.linear_min_sel = 0; + sreg->desc.n_voltages = (delta_uV / sreg->desc.uV_step) + 1; + sreg->desc.ops = &scmi_reg_linear_ops; + } + + return 0; +} + +static int +scmi_config_discrete_regulator_mappings(struct scmi_regulator *sreg, + const struct scmi_voltage_info *vinfo) +{ + /* Discrete non linear levels are mapped to volt_table */ + sreg->desc.n_voltages = vinfo->num_levels; + + if (sreg->desc.n_voltages > 1) { + sreg->desc.volt_table = (const unsigned int *)vinfo->levels_uv; + sreg->desc.ops = &scmi_reg_discrete_ops; + } else { + sreg->desc.fixed_uV = vinfo->levels_uv[0]; + sreg->desc.ops = &scmi_reg_fixed_ops; + } + + return 0; +} + +static int scmi_regulator_common_init(struct scmi_regulator *sreg) +{ + int ret; + struct device *dev = &sreg->sdev->dev; + const struct scmi_voltage_info *vinfo; + + vinfo = voltage_ops->info_get(sreg->ph, sreg->id); + if (!vinfo) { + dev_warn(dev, "Failure to get voltage domain %d\n", + sreg->id); + return -ENODEV; + } + + /* + * Regulator framework does not fully support negative voltages + * so we discard any voltage domain reported as supporting negative + * voltages: as a consequence each levels_uv entry is guaranteed to + * be non-negative from here on. + */ + if (vinfo->negative_volts_allowed) { + dev_warn(dev, "Negative voltages NOT supported...skip %s\n", + sreg->of_node->full_name); + return -EOPNOTSUPP; + } + + sreg->desc.name = devm_kasprintf(dev, GFP_KERNEL, "%s", vinfo->name); + if (!sreg->desc.name) + return -ENOMEM; + + sreg->desc.id = sreg->id; + sreg->desc.type = REGULATOR_VOLTAGE; + sreg->desc.owner = THIS_MODULE; + sreg->desc.of_match_full_name = true; + sreg->desc.of_match = sreg->of_node->full_name; + sreg->desc.regulators_node = "regulators"; + if (vinfo->segmented) + ret = scmi_config_linear_regulator_mappings(sreg, vinfo); + else + ret = scmi_config_discrete_regulator_mappings(sreg, vinfo); + if (ret) + return ret; + + /* + * Using the scmi device here to have DT searched from Voltage + * protocol node down. + */ + sreg->conf.dev = dev; + + /* Store for later retrieval via rdev_get_drvdata() */ + sreg->conf.driver_data = sreg; + + return 0; +} + +static int process_scmi_regulator_of_node(struct scmi_device *sdev, + struct scmi_protocol_handle *ph, + struct device_node *np, + struct scmi_regulator_info *rinfo) +{ + u32 dom; + int ret; + + ret = of_property_read_u32(np, "reg", &dom); + if (ret) + return ret; + + if (dom >= rinfo->num_doms) + return -ENODEV; + + if (rinfo->sregv[dom]) { + dev_err(&sdev->dev, + "SCMI Voltage Domain %d already in use. Skipping: %s\n", + dom, np->full_name); + return -EINVAL; + } + + rinfo->sregv[dom] = devm_kzalloc(&sdev->dev, + sizeof(struct scmi_regulator), + GFP_KERNEL); + if (!rinfo->sregv[dom]) + return -ENOMEM; + + rinfo->sregv[dom]->id = dom; + rinfo->sregv[dom]->sdev = sdev; + rinfo->sregv[dom]->ph = ph; + + /* get hold of good nodes */ + of_node_get(np); + rinfo->sregv[dom]->of_node = np; + + dev_dbg(&sdev->dev, + "Found SCMI Regulator entry -- OF node [%d] -> %s\n", + dom, np->full_name); + + return 0; +} + +static int scmi_regulator_probe(struct scmi_device *sdev) +{ + int d, ret, num_doms; + struct device_node *np; + const struct scmi_handle *handle = sdev->handle; + struct scmi_regulator_info *rinfo; + struct scmi_protocol_handle *ph; + + if (!handle) + return -ENODEV; + + voltage_ops = handle->devm_protocol_get(sdev, + SCMI_PROTOCOL_VOLTAGE, &ph); + if (IS_ERR(voltage_ops)) + return PTR_ERR(voltage_ops); + + num_doms = voltage_ops->num_domains_get(ph); + if (!num_doms) + return 0; + + if (num_doms < 0) { + dev_err(&sdev->dev, "failed to get voltage domains - err:%d\n", + num_doms); + + return num_doms; + } + + rinfo = devm_kzalloc(&sdev->dev, sizeof(*rinfo), GFP_KERNEL); + if (!rinfo) + return -ENOMEM; + + /* Allocate pointers array for all possible domains */ + rinfo->sregv = devm_kcalloc(&sdev->dev, num_doms, + sizeof(void *), GFP_KERNEL); + if (!rinfo->sregv) + return -ENOMEM; + + rinfo->num_doms = num_doms; + + /* + * Start collecting into rinfo->sregv possibly good SCMI Regulators as + * described by a well-formed DT entry and associated with an existing + * plausible SCMI Voltage Domain number, all belonging to this SCMI + * platform instance node (handle->dev->of_node). + */ + of_node_get(handle->dev->of_node); + np = of_find_node_by_name(handle->dev->of_node, "regulators"); + for_each_child_of_node_scoped(np, child) { + ret = process_scmi_regulator_of_node(sdev, ph, child, rinfo); + /* abort on any mem issue */ + if (ret == -ENOMEM) { + of_node_put(np); + return ret; + } + } + of_node_put(np); + /* + * Register a regulator for each valid regulator-DT-entry that we + * can successfully reach via SCMI and has a valid associated voltage + * domain. + */ + for (d = 0; d < num_doms; d++) { + struct scmi_regulator *sreg = rinfo->sregv[d]; + + /* Skip empty slots */ + if (!sreg) + continue; + + ret = scmi_regulator_common_init(sreg); + /* Skip invalid voltage domains */ + if (ret) + continue; + + sreg->rdev = devm_regulator_register(&sdev->dev, &sreg->desc, + &sreg->conf); + if (IS_ERR(sreg->rdev)) { + sreg->rdev = NULL; + continue; + } + + dev_info(&sdev->dev, + "Regulator %s registered for domain [%d]\n", + sreg->desc.name, sreg->id); + } + + dev_set_drvdata(&sdev->dev, rinfo); + + return 0; +} + +static void scmi_regulator_remove(struct scmi_device *sdev) +{ + int d; + struct scmi_regulator_info *rinfo; + + rinfo = dev_get_drvdata(&sdev->dev); + if (!rinfo) + return; + + for (d = 0; d < rinfo->num_doms; d++) { + if (!rinfo->sregv[d]) + continue; + of_node_put(rinfo->sregv[d]->of_node); + } +} + +static const struct scmi_device_id scmi_regulator_id_table[] = { + { SCMI_PROTOCOL_VOLTAGE, "regulator" }, + { }, +}; +MODULE_DEVICE_TABLE(scmi, scmi_regulator_id_table); + +static struct scmi_driver scmi_drv = { + .name = "scmi-regulator", + .probe = scmi_regulator_probe, + .remove = scmi_regulator_remove, + .id_table = scmi_regulator_id_table, +}; + +module_scmi_driver(scmi_drv); + +MODULE_AUTHOR("Cristian Marussi "); +MODULE_DESCRIPTION("ARM SCMI regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/sgm3804-regulator.c b/drivers/regulator/sgm3804-regulator.c new file mode 100644 index 000000000..a34c9418b --- /dev/null +++ b/drivers/regulator/sgm3804-regulator.c @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// SGMicro SGM3804 regulator Driver +// +// Copyright (C) 2025 Kancy Joe +// Copyright (C) 2026 Linaro Limited +// Author: Neil Armstrong + +#include +#include +#include +#include +#include +#include +#include + +#define SGM3804_POS_RAIL_VOLTAGE_REG 0x0 +#define SGM3804_NEG_RAIL_VOLTAGE_REG 0x1 +#define SGM3804_RAIL_DISCHARGE_REG 0x3 + +#define RAIL_VOLTAGE_MASK GENMASK(5, 0) + +#define POS_RAIL_DISCHARGE_EN BIT(1) +#define NEG_RAIL_DISCHARGE_EN BIT(0) + +#define RAIL_VOLTAGE_INVALID RAIL_VOLTAGE_MASK +#define RAIL_DISCHARGE_REG_DEFAULT (POS_RAIL_DISCHARGE_EN | NEG_RAIL_DISCHARGE_EN) + +#define SGM3804_VOLTAGES_MAX_SELECTOR 0x2f + +enum { + SGM3804_POS_RAIL = 0, + SGM3804_NEG_RAIL, + SGM3804_RAIL_COUNT, +}; + +/* + * The registers are only writable when the gpio is enabled, so + * we need to use the cache for read operations and set the regmap + * as cache_only when both GPIOs are down. + */ +struct sgm3804_data { + struct regmap *regmap; + /* Protects the regcache state update */ + struct mutex lock; + struct gpio_desc *gpios[SGM3804_RAIL_COUNT]; +}; + +static const struct linear_range sgm3804_voltages[] = { + REGULATOR_LINEAR_RANGE(2400000, 0x20, 0x2f, 100000), + REGULATOR_LINEAR_RANGE(4000000, 0x00, 0x17, 100000), +}; + +/* + * The cache is populated with those hardware default values + * so the regmap_update_bits operation will use the cached + * value to build a new register value and write it when GPIOs + * are enabled. + */ +static const struct reg_default sgm3804_reg_defaults[] = { + { SGM3804_POS_RAIL_VOLTAGE_REG, RAIL_VOLTAGE_INVALID }, + { SGM3804_NEG_RAIL_VOLTAGE_REG, RAIL_VOLTAGE_INVALID }, + { SGM3804_RAIL_DISCHARGE_REG, RAIL_DISCHARGE_REG_DEFAULT }, +}; + +/* Registers are only writable */ +static bool sgm3804_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case SGM3804_POS_RAIL_VOLTAGE_REG: + case SGM3804_NEG_RAIL_VOLTAGE_REG: + case SGM3804_RAIL_DISCHARGE_REG: + return true; + default: + return false; + } +} + +/* + * Since all registers are only writeable, regmap will only read from the cache data. + */ +static bool sgm3804_readable_reg(struct device *dev, unsigned int reg) +{ + return false; +} + +static const struct regmap_config sgm3804_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x03, + .writeable_reg = sgm3804_writeable_reg, + .readable_reg = sgm3804_readable_reg, + .cache_type = REGCACHE_MAPLE, + .reg_defaults = sgm3804_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(sgm3804_reg_defaults), +}; + +static int sgm3804_sync_regcache_state(struct sgm3804_data *ctx) +{ + guard(mutex)(&ctx->lock); + + /* If both GPIOs are down, IC is powered down and I2C writes will fail */ + if (!gpiod_get_value_cansleep(ctx->gpios[SGM3804_POS_RAIL]) && + !gpiod_get_value_cansleep(ctx->gpios[SGM3804_NEG_RAIL])) { + regcache_cache_only(ctx->regmap, true); + regcache_mark_dirty(ctx->regmap); + } else { + int ret; + + /* At least a GPIO is up, we can write registers */ + regcache_cache_only(ctx->regmap, false); + ret = regcache_sync(ctx->regmap); + if (ret) { + regcache_cache_only(ctx->regmap, true); + return ret; + } + } + + return 0; +} + +static int sgm3804_get_voltage_sel(struct regulator_dev *rdev) +{ + int ret; + + ret = regulator_get_voltage_sel_regmap(rdev); + if (ret < 0) + return ret; + + /* Force setting a voltage on probe */ + if (ret == RAIL_VOLTAGE_INVALID) + return -ENOTRECOVERABLE; + + return ret; +} + +static int sgm3804_enable(struct regulator_dev *rdev) +{ + struct sgm3804_data *ctx = rdev->reg_data; + int ret; + + ret = gpiod_set_value_cansleep(ctx->gpios[rdev_get_id(rdev)], 1); + if (ret) + return ret; + + ret = sgm3804_sync_regcache_state(ctx); + if (ret) + goto err; + + return 0; + +err: + gpiod_set_value_cansleep(ctx->gpios[rdev_get_id(rdev)], 0); + return ret; +} + +static int sgm3804_disable(struct regulator_dev *rdev) +{ + struct sgm3804_data *ctx = rdev->reg_data; + int ret; + + ret = gpiod_set_value_cansleep(ctx->gpios[rdev_get_id(rdev)], 0); + if (ret) + return ret; + + return sgm3804_sync_regcache_state(ctx); +} + +static int sgm3804_is_enabled(struct regulator_dev *rdev) +{ + struct sgm3804_data *ctx = rdev->reg_data; + + return gpiod_get_value_cansleep(ctx->gpios[rdev_get_id(rdev)]); +} + +static const struct regulator_ops sgm3804_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = sgm3804_get_voltage_sel, + .set_active_discharge = regulator_set_active_discharge_regmap, + .enable = sgm3804_enable, + .disable = sgm3804_disable, + .is_enabled = sgm3804_is_enabled, +}; + +static const struct regulator_desc sgm3804_regulator_desc[] = { + /* Positive Output */ + { + .name = "pos", + .of_match = "pos", + .supply_name = "vin", + .id = SGM3804_POS_RAIL, + .ops = &sgm3804_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = sgm3804_voltages, + .n_linear_ranges = ARRAY_SIZE(sgm3804_voltages), + .n_voltages = SGM3804_VOLTAGES_MAX_SELECTOR + 1, + .vsel_reg = SGM3804_POS_RAIL_VOLTAGE_REG, + .vsel_mask = RAIL_VOLTAGE_MASK, + .active_discharge_on = POS_RAIL_DISCHARGE_EN, + .active_discharge_mask = POS_RAIL_DISCHARGE_EN, + .active_discharge_reg = SGM3804_RAIL_DISCHARGE_REG, + .enable_time = 40000, + .owner = THIS_MODULE, + }, + /* Negative Output */ + { + .name = "neg", + .of_match = "neg", + .supply_name = "vin", + .id = SGM3804_NEG_RAIL, + .ops = &sgm3804_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = sgm3804_voltages, + .n_linear_ranges = ARRAY_SIZE(sgm3804_voltages), + .n_voltages = SGM3804_VOLTAGES_MAX_SELECTOR + 1, + .vsel_reg = SGM3804_NEG_RAIL_VOLTAGE_REG, + .vsel_mask = RAIL_VOLTAGE_MASK, + .active_discharge_on = NEG_RAIL_DISCHARGE_EN, + .active_discharge_mask = NEG_RAIL_DISCHARGE_EN, + .active_discharge_reg = SGM3804_RAIL_DISCHARGE_REG, + .enable_time = 40000, + .owner = THIS_MODULE, + }, +}; + +static int sgm3804_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct sgm3804_data *ctx; + int ret, i; + + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + mutex_init(&ctx->lock); + + ctx->regmap = devm_regmap_init_i2c(i2c, &sgm3804_regmap_config); + if (IS_ERR(ctx->regmap)) + return dev_err_probe(dev, PTR_ERR(ctx->regmap), + "failed to init regmap\n"); + + /* Get enable GPIOs */ + for (i = 0; i < ARRAY_SIZE(sgm3804_regulator_desc); i++) { + const struct regulator_desc *reg = &sgm3804_regulator_desc[i]; + struct fwnode_handle *child; + + child = device_get_named_child_node(dev, reg->of_match); + if (!child) { + dev_err(dev, "missing child '%s'\n", reg->of_match); + return -EINVAL; + } + + ctx->gpios[i] = devm_fwnode_gpiod_get(dev, child, "enable", + GPIOD_ASIS, reg->name); + fwnode_handle_put(child); + if (IS_ERR(ctx->gpios[i])) + return dev_err_probe(dev, PTR_ERR(ctx->gpios[i]), + "failed to get '%s' enable GPIO\n", + reg->name); + } + + ret = sgm3804_sync_regcache_state(ctx); + if (ret) + return ret; + + for (i = 0; i < ARRAY_SIZE(sgm3804_regulator_desc); i++) { + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = dev; + config.regmap = ctx->regmap; + config.of_node = dev_of_node(dev); + config.driver_data = ctx; + rdev = devm_regulator_register(dev, &sgm3804_regulator_desc[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "failed to register regulator %d\n", i); + } + + return 0; +} + +static const struct i2c_device_id sgm3804_id[] = { + { .name = "sgm3804" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sgm3804_id); + +static const struct of_device_id sgm3804_of_match[] = { + { .compatible = "sgmicro,sgm3804" }, + { } +}; +MODULE_DEVICE_TABLE(of, sgm3804_of_match); + +static struct i2c_driver sgm3804_regulator_driver = { + .driver = { + .name = "sgm3804", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = sgm3804_of_match, + }, + .probe = sgm3804_probe, + .id_table = sgm3804_id, +}; + +module_i2c_driver(sgm3804_regulator_driver); + +MODULE_DESCRIPTION("SGMicro SGM3804 regulator Driver"); +MODULE_AUTHOR("Kancy Joe "); +MODULE_AUTHOR("Neil Armstrong "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/sky81452-regulator.c b/drivers/regulator/sky81452-regulator.c new file mode 100644 index 000000000..359e83e37 --- /dev/null +++ b/drivers/regulator/sky81452-regulator.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// sky81452-regulator.c SKY81452 regulator driver +// +// Copyright 2014 Skyworks Solutions Inc. +// Author : Gyungoh Yoo + +#include +#include +#include +#include +#include +#include +#include +#include + +/* registers */ +#define SKY81452_REG1 0x01 +#define SKY81452_REG3 0x03 + +/* bit mask */ +#define SKY81452_LEN 0x40 +#define SKY81452_LOUT 0x1F + +static const struct regulator_ops sky81452_reg_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct linear_range sky81452_reg_ranges[] = { + REGULATOR_LINEAR_RANGE(4500000, 0, 14, 250000), + REGULATOR_LINEAR_RANGE(9000000, 15, 31, 1000000), +}; + +static const struct regulator_desc sky81452_reg = { + .name = "LOUT", + .of_match = of_match_ptr("lout"), + .regulators_node = of_match_ptr("regulator"), + .ops = &sky81452_reg_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = SKY81452_LOUT + 1, + .linear_ranges = sky81452_reg_ranges, + .n_linear_ranges = ARRAY_SIZE(sky81452_reg_ranges), + .vsel_reg = SKY81452_REG3, + .vsel_mask = SKY81452_LOUT, + .enable_reg = SKY81452_REG1, + .enable_mask = SKY81452_LEN, +}; + +static int sky81452_reg_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + const struct regulator_init_data *init_data = dev_get_platdata(dev); + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = dev->parent; + config.init_data = init_data; + config.of_node = dev->of_node; + config.regmap = dev_get_drvdata(dev->parent); + + rdev = devm_regulator_register(dev, &sky81452_reg, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "failed to register. err=%ld\n", PTR_ERR(rdev)); + return PTR_ERR(rdev); + } + + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static struct platform_driver sky81452_reg_driver = { + .driver = { + .name = "sky81452-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = sky81452_reg_probe, +}; + +module_platform_driver(sky81452_reg_driver); + +MODULE_DESCRIPTION("Skyworks SKY81452 Regulator driver"); +MODULE_AUTHOR("Gyungoh Yoo "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/slg51000-regulator.c b/drivers/regulator/slg51000-regulator.c new file mode 100644 index 000000000..d682764cd --- /dev/null +++ b/drivers/regulator/slg51000-regulator.c @@ -0,0 +1,519 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// SLG51000 High PSRR, Multi-Output Regulators +// Copyright (C) 2019 Dialog Semiconductor +// +// Author: Eric Jeong + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "slg51000-regulator.h" + +#define SLG51000_SCTL_EVT 7 +#define SLG51000_MAX_EVT_REGISTER 8 +#define SLG51000_LDOHP_LV_MIN 1200000 +#define SLG51000_LDOHP_HV_MIN 2400000 + +enum slg51000_regulators { + SLG51000_REGULATOR_LDO1 = 0, + SLG51000_REGULATOR_LDO2, + SLG51000_REGULATOR_LDO3, + SLG51000_REGULATOR_LDO4, + SLG51000_REGULATOR_LDO5, + SLG51000_REGULATOR_LDO6, + SLG51000_REGULATOR_LDO7, + SLG51000_MAX_REGULATORS, +}; + +struct slg51000 { + struct device *dev; + struct regmap *regmap; + struct regulator_desc *rdesc[SLG51000_MAX_REGULATORS]; + struct regulator_dev *rdev[SLG51000_MAX_REGULATORS]; + struct gpio_desc *cs_gpiod; + int chip_irq; +}; + +struct slg51000_evt_sta { + unsigned int ereg; + unsigned int sreg; +}; + +static const struct slg51000_evt_sta es_reg[SLG51000_MAX_EVT_REGISTER] = { + {SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS}, + {SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS}, + {SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS}, + {SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS}, + {SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS}, + {SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS}, + {SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS}, + {SLG51000_SYSCTL_EVENT, SLG51000_SYSCTL_STATUS}, +}; + +static const struct regmap_range slg51000_writeable_ranges[] = { + regmap_reg_range(SLG51000_SYSCTL_MATRIX_CONF_A, + SLG51000_SYSCTL_MATRIX_CONF_A), + regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), + regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), + regmap_reg_range(SLG51000_LDO1_IRQ_MASK, SLG51000_LDO1_IRQ_MASK), + regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), + regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), + regmap_reg_range(SLG51000_LDO2_IRQ_MASK, SLG51000_LDO2_IRQ_MASK), + regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), + regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), + regmap_reg_range(SLG51000_LDO3_IRQ_MASK, SLG51000_LDO3_IRQ_MASK), + regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), + regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), + regmap_reg_range(SLG51000_LDO4_IRQ_MASK, SLG51000_LDO4_IRQ_MASK), + regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), + regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), + regmap_reg_range(SLG51000_LDO5_IRQ_MASK, SLG51000_LDO5_IRQ_MASK), + regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), + regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), + regmap_reg_range(SLG51000_LDO6_IRQ_MASK, SLG51000_LDO6_IRQ_MASK), + regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), + regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), + regmap_reg_range(SLG51000_LDO7_IRQ_MASK, SLG51000_LDO7_IRQ_MASK), + regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), +}; + +static const struct regmap_range slg51000_readable_ranges[] = { + regmap_reg_range(SLG51000_SYSCTL_PATN_ID_B0, + SLG51000_SYSCTL_PATN_ID_B2), + regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_A, + SLG51000_SYSCTL_SYS_CONF_A), + regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_D, + SLG51000_SYSCTL_MATRIX_CONF_B), + regmap_reg_range(SLG51000_SYSCTL_REFGEN_CONF_C, + SLG51000_SYSCTL_UVLO_CONF_A), + regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_IRQ_MASK), + regmap_reg_range(SLG51000_IO_GPIO1_CONF, SLG51000_IO_GPIO_STATUS), + regmap_reg_range(SLG51000_LUTARRAY_LUT_VAL_0, + SLG51000_LUTARRAY_LUT_VAL_11), + regmap_reg_range(SLG51000_MUXARRAY_INPUT_SEL_0, + SLG51000_MUXARRAY_INPUT_SEL_63), + regmap_reg_range(SLG51000_PWRSEQ_RESOURCE_EN_0, + SLG51000_PWRSEQ_INPUT_SENSE_CONF_B), + regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), + regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), + regmap_reg_range(SLG51000_LDO1_MISC1, SLG51000_LDO1_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_IRQ_MASK), + regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), + regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), + regmap_reg_range(SLG51000_LDO2_MISC1, SLG51000_LDO2_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_IRQ_MASK), + regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), + regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), + regmap_reg_range(SLG51000_LDO3_CONF1, SLG51000_LDO3_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_IRQ_MASK), + regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), + regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), + regmap_reg_range(SLG51000_LDO4_CONF1, SLG51000_LDO4_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_IRQ_MASK), + regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), + regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), + regmap_reg_range(SLG51000_LDO5_TRIM2, SLG51000_LDO5_TRIM2), + regmap_reg_range(SLG51000_LDO5_CONF1, SLG51000_LDO5_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_IRQ_MASK), + regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), + regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), + regmap_reg_range(SLG51000_LDO6_TRIM2, SLG51000_LDO6_TRIM2), + regmap_reg_range(SLG51000_LDO6_CONF1, SLG51000_LDO6_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_IRQ_MASK), + regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), + regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), + regmap_reg_range(SLG51000_LDO7_CONF1, SLG51000_LDO7_VSEL_ACTUAL), + regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_IRQ_MASK), + regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), + regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), + regmap_reg_range(SLG51000_OTP_LOCK_OTP_PROG, SLG51000_OTP_LOCK_CTRL), + regmap_reg_range(SLG51000_LOCK_GLOBAL_LOCK_CTRL1, + SLG51000_LOCK_GLOBAL_LOCK_CTRL1), +}; + +static const struct regmap_range slg51000_volatile_ranges[] = { + regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_STATUS), + regmap_reg_range(SLG51000_IO_GPIO_STATUS, SLG51000_IO_GPIO_STATUS), + regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS), + regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS), + regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS), + regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS), + regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS), + regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS), + regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS), + regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), +}; + +static const struct regmap_access_table slg51000_writeable_table = { + .yes_ranges = slg51000_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(slg51000_writeable_ranges), +}; + +static const struct regmap_access_table slg51000_readable_table = { + .yes_ranges = slg51000_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(slg51000_readable_ranges), +}; + +static const struct regmap_access_table slg51000_volatile_table = { + .yes_ranges = slg51000_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(slg51000_volatile_ranges), +}; + +static const struct regmap_config slg51000_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x8000, + .wr_table = &slg51000_writeable_table, + .rd_table = &slg51000_readable_table, + .volatile_table = &slg51000_volatile_table, +}; + +static const struct regulator_ops slg51000_regl_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops slg51000_switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int slg51000_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct gpio_desc *ena_gpiod; + + ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0, + GPIOD_OUT_LOW | + GPIOD_FLAGS_BIT_NONEXCLUSIVE, + "gpio-en-ldo"); + if (!IS_ERR(ena_gpiod)) + config->ena_gpiod = ena_gpiod; + + return 0; +} + +#define SLG51000_REGL_DESC(_id, _name, _s_name, _min, _step) \ + [SLG51000_REGULATOR_##_id] = { \ + .name = #_name, \ + .supply_name = _s_name, \ + .id = SLG51000_REGULATOR_##_id, \ + .of_match = of_match_ptr(#_name), \ + .of_parse_cb = slg51000_of_parse_cb, \ + .ops = &slg51000_regl_ops, \ + .regulators_node = of_match_ptr("regulators"), \ + .n_voltages = 256, \ + .min_uV = _min, \ + .uV_step = _step, \ + .linear_min_sel = 0, \ + .vsel_mask = SLG51000_VSEL_MASK, \ + .vsel_reg = SLG51000_##_id##_VSEL, \ + .enable_reg = SLG51000_SYSCTL_MATRIX_CONF_A, \ + .enable_mask = BIT(SLG51000_REGULATOR_##_id), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static struct regulator_desc regls_desc[SLG51000_MAX_REGULATORS] = { + SLG51000_REGL_DESC(LDO1, ldo1, NULL, 2400000, 5000), + SLG51000_REGL_DESC(LDO2, ldo2, NULL, 2400000, 5000), + SLG51000_REGL_DESC(LDO3, ldo3, "vin3", 1200000, 10000), + SLG51000_REGL_DESC(LDO4, ldo4, "vin4", 1200000, 10000), + SLG51000_REGL_DESC(LDO5, ldo5, "vin5", 400000, 5000), + SLG51000_REGL_DESC(LDO6, ldo6, "vin6", 400000, 5000), + SLG51000_REGL_DESC(LDO7, ldo7, "vin7", 1200000, 10000), +}; + +static int slg51000_regulator_init(struct slg51000 *chip) +{ + struct regulator_config config = { }; + struct regulator_desc *rdesc; + unsigned int reg, val; + u8 vsel_range[2]; + int id, ret = 0; + const unsigned int min_regs[SLG51000_MAX_REGULATORS] = { + SLG51000_LDO1_MINV, SLG51000_LDO2_MINV, SLG51000_LDO3_MINV, + SLG51000_LDO4_MINV, SLG51000_LDO5_MINV, SLG51000_LDO6_MINV, + SLG51000_LDO7_MINV, + }; + + for (id = 0; id < SLG51000_MAX_REGULATORS; id++) { + chip->rdesc[id] = ®ls_desc[id]; + rdesc = chip->rdesc[id]; + config.regmap = chip->regmap; + config.dev = chip->dev; + config.driver_data = chip; + + ret = regmap_bulk_read(chip->regmap, min_regs[id], + vsel_range, 2); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read the MIN register\n"); + return ret; + } + + switch (id) { + case SLG51000_REGULATOR_LDO1: + case SLG51000_REGULATOR_LDO2: + if (id == SLG51000_REGULATOR_LDO1) + reg = SLG51000_LDO1_MISC1; + else + reg = SLG51000_LDO2_MISC1; + + ret = regmap_read(chip->regmap, reg, &val); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read voltage range of ldo%d\n", + id + 1); + return ret; + } + + rdesc->linear_min_sel = vsel_range[0]; + rdesc->n_voltages = vsel_range[1] + 1; + if (val & SLG51000_SEL_VRANGE_MASK) + rdesc->min_uV = SLG51000_LDOHP_HV_MIN + + (vsel_range[0] + * rdesc->uV_step); + else + rdesc->min_uV = SLG51000_LDOHP_LV_MIN + + (vsel_range[0] + * rdesc->uV_step); + break; + + case SLG51000_REGULATOR_LDO5: + case SLG51000_REGULATOR_LDO6: + if (id == SLG51000_REGULATOR_LDO5) + reg = SLG51000_LDO5_TRIM2; + else + reg = SLG51000_LDO6_TRIM2; + + ret = regmap_read(chip->regmap, reg, &val); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read LDO mode register\n"); + return ret; + } + + if (val & SLG51000_SEL_BYP_MODE_MASK) { + rdesc->ops = &slg51000_switch_ops; + rdesc->n_voltages = 0; + rdesc->min_uV = 0; + rdesc->uV_step = 0; + rdesc->linear_min_sel = 0; + break; + } + fallthrough; /* to the check below */ + + default: + rdesc->linear_min_sel = vsel_range[0]; + rdesc->n_voltages = vsel_range[1] + 1; + rdesc->min_uV = rdesc->min_uV + + (vsel_range[0] * rdesc->uV_step); + break; + } + + chip->rdev[id] = devm_regulator_register(chip->dev, rdesc, + &config); + if (IS_ERR(chip->rdev[id])) { + ret = PTR_ERR(chip->rdev[id]); + dev_err(chip->dev, + "Failed to register regulator(%s):%d\n", + chip->rdesc[id]->name, ret); + return ret; + } + } + + return 0; +} + +static irqreturn_t slg51000_irq_handler(int irq, void *data) +{ + struct slg51000 *chip = data; + struct regmap *regmap = chip->regmap; + enum { R0 = 0, R1, R2, REG_MAX }; + u8 evt[SLG51000_MAX_EVT_REGISTER][REG_MAX]; + int ret, i, handled = IRQ_NONE; + unsigned int evt_otp, mask_otp; + + /* Read event[R0], status[R1] and mask[R2] register */ + for (i = 0; i < SLG51000_MAX_EVT_REGISTER; i++) { + ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read event registers(%d)\n", ret); + return IRQ_NONE; + } + } + + ret = regmap_read(regmap, SLG51000_OTP_EVENT, &evt_otp); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read otp event registers(%d)\n", ret); + return IRQ_NONE; + } + + ret = regmap_read(regmap, SLG51000_OTP_IRQ_MASK, &mask_otp); + if (ret < 0) { + dev_err(chip->dev, + "Failed to read otp mask register(%d)\n", ret); + return IRQ_NONE; + } + + if ((evt_otp & SLG51000_EVT_CRC_MASK) && + !(mask_otp & SLG51000_IRQ_CRC_MASK)) { + dev_info(chip->dev, + "OTP has been read or OTP crc is not zero\n"); + handled = IRQ_HANDLED; + } + + for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { + if (!(evt[i][R2] & SLG51000_IRQ_ILIM_FLAG_MASK) && + (evt[i][R0] & SLG51000_EVT_ILIM_FLAG_MASK)) { + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_OVER_CURRENT, NULL); + + if (evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) + dev_warn(chip->dev, + "Over-current limit(ldo%d)\n", i + 1); + handled = IRQ_HANDLED; + } + } + + if (!(evt[SLG51000_SCTL_EVT][R2] & SLG51000_IRQ_HIGH_TEMP_WARN_MASK) && + (evt[SLG51000_SCTL_EVT][R0] & SLG51000_EVT_HIGH_TEMP_WARN_MASK)) { + for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { + if (!(evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) && + (evt[i][R1] & SLG51000_STA_VOUT_OK_FLAG_MASK)) { + regulator_notifier_call_chain(chip->rdev[i], + REGULATOR_EVENT_OVER_TEMP, NULL); + } + } + handled = IRQ_HANDLED; + if (evt[SLG51000_SCTL_EVT][R1] & + SLG51000_STA_HIGH_TEMP_WARN_MASK) + dev_warn(chip->dev, "High temperature warning!\n"); + } + + return handled; +} + +static void slg51000_clear_fault_log(struct slg51000 *chip) +{ + unsigned int val = 0; + int ret = 0; + + ret = regmap_read(chip->regmap, SLG51000_SYSCTL_FAULT_LOG1, &val); + if (ret < 0) { + dev_err(chip->dev, "Failed to read Fault log register\n"); + return; + } + + if (val & SLG51000_FLT_OVER_TEMP_MASK) + dev_dbg(chip->dev, "Fault log: FLT_OVER_TEMP\n"); + if (val & SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK) + dev_dbg(chip->dev, "Fault log: FLT_POWER_SEQ_CRASH_REQ\n"); + if (val & SLG51000_FLT_RST_MASK) + dev_dbg(chip->dev, "Fault log: FLT_RST\n"); + if (val & SLG51000_FLT_POR_MASK) + dev_dbg(chip->dev, "Fault log: FLT_POR\n"); +} + +static int slg51000_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct slg51000 *chip; + struct gpio_desc *cs_gpiod; + int error, ret; + + chip = devm_kzalloc(dev, sizeof(struct slg51000), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + cs_gpiod = devm_gpiod_get_optional(dev, "dlg,cs", + GPIOD_OUT_HIGH | + GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(cs_gpiod)) + return PTR_ERR(cs_gpiod); + + if (cs_gpiod) { + dev_info(dev, "Found chip selector property\n"); + chip->cs_gpiod = cs_gpiod; + } + + usleep_range(10000, 11000); + + i2c_set_clientdata(client, chip); + chip->chip_irq = client->irq; + chip->dev = dev; + chip->regmap = devm_regmap_init_i2c(client, &slg51000_regmap_config); + if (IS_ERR(chip->regmap)) { + error = PTR_ERR(chip->regmap); + dev_err(dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + ret = slg51000_regulator_init(chip); + if (ret < 0) { + dev_err(chip->dev, "Failed to init regulator(%d)\n", ret); + return ret; + } + + slg51000_clear_fault_log(chip); + + if (chip->chip_irq) { + ret = devm_request_threaded_irq(dev, chip->chip_irq, NULL, + slg51000_irq_handler, + (IRQF_TRIGGER_HIGH | + IRQF_ONESHOT), + "slg51000-irq", chip); + if (ret != 0) { + dev_err(dev, "Failed to request IRQ: %d\n", + chip->chip_irq); + return ret; + } + } else { + dev_info(dev, "No IRQ configured\n"); + } + + return ret; +} + +static const struct i2c_device_id slg51000_i2c_id[] = { + { .name = "slg51000" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, slg51000_i2c_id); + +static struct i2c_driver slg51000_regulator_driver = { + .driver = { + .name = "slg51000-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = slg51000_i2c_probe, + .id_table = slg51000_i2c_id, +}; + +module_i2c_driver(slg51000_regulator_driver); + +MODULE_AUTHOR("Eric Jeong "); +MODULE_DESCRIPTION("SLG51000 regulator driver"); +MODULE_LICENSE("GPL"); + diff --git a/drivers/regulator/slg51000-regulator.h b/drivers/regulator/slg51000-regulator.h new file mode 100644 index 000000000..20feb7f91 --- /dev/null +++ b/drivers/regulator/slg51000-regulator.h @@ -0,0 +1,505 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * SLG51000 High PSRR, Multi-Output Regulators + * Copyright (C) 2019 Dialog Semiconductor + * + * Author: Eric Jeong + */ + +#ifndef __SLG51000_REGISTERS_H__ +#define __SLG51000_REGISTERS_H__ + +/* Registers */ + +#define SLG51000_SYSCTL_PATN_ID_B0 0x1105 +#define SLG51000_SYSCTL_PATN_ID_B1 0x1106 +#define SLG51000_SYSCTL_PATN_ID_B2 0x1107 +#define SLG51000_SYSCTL_SYS_CONF_A 0x1109 +#define SLG51000_SYSCTL_SYS_CONF_D 0x110c +#define SLG51000_SYSCTL_MATRIX_CONF_A 0x110d +#define SLG51000_SYSCTL_MATRIX_CONF_B 0x110e +#define SLG51000_SYSCTL_REFGEN_CONF_C 0x1111 +#define SLG51000_SYSCTL_UVLO_CONF_A 0x1112 +#define SLG51000_SYSCTL_FAULT_LOG1 0x1115 +#define SLG51000_SYSCTL_EVENT 0x1116 +#define SLG51000_SYSCTL_STATUS 0x1117 +#define SLG51000_SYSCTL_IRQ_MASK 0x1118 +#define SLG51000_IO_GPIO1_CONF 0x1500 +#define SLG51000_IO_GPIO2_CONF 0x1501 +#define SLG51000_IO_GPIO3_CONF 0x1502 +#define SLG51000_IO_GPIO4_CONF 0x1503 +#define SLG51000_IO_GPIO5_CONF 0x1504 +#define SLG51000_IO_GPIO6_CONF 0x1505 +#define SLG51000_IO_GPIO_STATUS 0x1506 +#define SLG51000_LUTARRAY_LUT_VAL_0 0x1600 +#define SLG51000_LUTARRAY_LUT_VAL_1 0x1601 +#define SLG51000_LUTARRAY_LUT_VAL_2 0x1602 +#define SLG51000_LUTARRAY_LUT_VAL_3 0x1603 +#define SLG51000_LUTARRAY_LUT_VAL_4 0x1604 +#define SLG51000_LUTARRAY_LUT_VAL_5 0x1605 +#define SLG51000_LUTARRAY_LUT_VAL_6 0x1606 +#define SLG51000_LUTARRAY_LUT_VAL_7 0x1607 +#define SLG51000_LUTARRAY_LUT_VAL_8 0x1608 +#define SLG51000_LUTARRAY_LUT_VAL_9 0x1609 +#define SLG51000_LUTARRAY_LUT_VAL_10 0x160a +#define SLG51000_LUTARRAY_LUT_VAL_11 0x160b +#define SLG51000_MUXARRAY_INPUT_SEL_0 0x1700 +#define SLG51000_MUXARRAY_INPUT_SEL_1 0x1701 +#define SLG51000_MUXARRAY_INPUT_SEL_2 0x1702 +#define SLG51000_MUXARRAY_INPUT_SEL_3 0x1703 +#define SLG51000_MUXARRAY_INPUT_SEL_4 0x1704 +#define SLG51000_MUXARRAY_INPUT_SEL_5 0x1705 +#define SLG51000_MUXARRAY_INPUT_SEL_6 0x1706 +#define SLG51000_MUXARRAY_INPUT_SEL_7 0x1707 +#define SLG51000_MUXARRAY_INPUT_SEL_8 0x1708 +#define SLG51000_MUXARRAY_INPUT_SEL_9 0x1709 +#define SLG51000_MUXARRAY_INPUT_SEL_10 0x170a +#define SLG51000_MUXARRAY_INPUT_SEL_11 0x170b +#define SLG51000_MUXARRAY_INPUT_SEL_12 0x170c +#define SLG51000_MUXARRAY_INPUT_SEL_13 0x170d +#define SLG51000_MUXARRAY_INPUT_SEL_14 0x170e +#define SLG51000_MUXARRAY_INPUT_SEL_15 0x170f +#define SLG51000_MUXARRAY_INPUT_SEL_16 0x1710 +#define SLG51000_MUXARRAY_INPUT_SEL_17 0x1711 +#define SLG51000_MUXARRAY_INPUT_SEL_18 0x1712 +#define SLG51000_MUXARRAY_INPUT_SEL_19 0x1713 +#define SLG51000_MUXARRAY_INPUT_SEL_20 0x1714 +#define SLG51000_MUXARRAY_INPUT_SEL_21 0x1715 +#define SLG51000_MUXARRAY_INPUT_SEL_22 0x1716 +#define SLG51000_MUXARRAY_INPUT_SEL_23 0x1717 +#define SLG51000_MUXARRAY_INPUT_SEL_24 0x1718 +#define SLG51000_MUXARRAY_INPUT_SEL_25 0x1719 +#define SLG51000_MUXARRAY_INPUT_SEL_26 0x171a +#define SLG51000_MUXARRAY_INPUT_SEL_27 0x171b +#define SLG51000_MUXARRAY_INPUT_SEL_28 0x171c +#define SLG51000_MUXARRAY_INPUT_SEL_29 0x171d +#define SLG51000_MUXARRAY_INPUT_SEL_30 0x171e +#define SLG51000_MUXARRAY_INPUT_SEL_31 0x171f +#define SLG51000_MUXARRAY_INPUT_SEL_32 0x1720 +#define SLG51000_MUXARRAY_INPUT_SEL_33 0x1721 +#define SLG51000_MUXARRAY_INPUT_SEL_34 0x1722 +#define SLG51000_MUXARRAY_INPUT_SEL_35 0x1723 +#define SLG51000_MUXARRAY_INPUT_SEL_36 0x1724 +#define SLG51000_MUXARRAY_INPUT_SEL_37 0x1725 +#define SLG51000_MUXARRAY_INPUT_SEL_38 0x1726 +#define SLG51000_MUXARRAY_INPUT_SEL_39 0x1727 +#define SLG51000_MUXARRAY_INPUT_SEL_40 0x1728 +#define SLG51000_MUXARRAY_INPUT_SEL_41 0x1729 +#define SLG51000_MUXARRAY_INPUT_SEL_42 0x172a +#define SLG51000_MUXARRAY_INPUT_SEL_43 0x172b +#define SLG51000_MUXARRAY_INPUT_SEL_44 0x172c +#define SLG51000_MUXARRAY_INPUT_SEL_45 0x172d +#define SLG51000_MUXARRAY_INPUT_SEL_46 0x172e +#define SLG51000_MUXARRAY_INPUT_SEL_47 0x172f +#define SLG51000_MUXARRAY_INPUT_SEL_48 0x1730 +#define SLG51000_MUXARRAY_INPUT_SEL_49 0x1731 +#define SLG51000_MUXARRAY_INPUT_SEL_50 0x1732 +#define SLG51000_MUXARRAY_INPUT_SEL_51 0x1733 +#define SLG51000_MUXARRAY_INPUT_SEL_52 0x1734 +#define SLG51000_MUXARRAY_INPUT_SEL_53 0x1735 +#define SLG51000_MUXARRAY_INPUT_SEL_54 0x1736 +#define SLG51000_MUXARRAY_INPUT_SEL_55 0x1737 +#define SLG51000_MUXARRAY_INPUT_SEL_56 0x1738 +#define SLG51000_MUXARRAY_INPUT_SEL_57 0x1739 +#define SLG51000_MUXARRAY_INPUT_SEL_58 0x173a +#define SLG51000_MUXARRAY_INPUT_SEL_59 0x173b +#define SLG51000_MUXARRAY_INPUT_SEL_60 0x173c +#define SLG51000_MUXARRAY_INPUT_SEL_61 0x173d +#define SLG51000_MUXARRAY_INPUT_SEL_62 0x173e +#define SLG51000_MUXARRAY_INPUT_SEL_63 0x173f +#define SLG51000_PWRSEQ_RESOURCE_EN_0 0x1900 +#define SLG51000_PWRSEQ_RESOURCE_EN_1 0x1901 +#define SLG51000_PWRSEQ_RESOURCE_EN_2 0x1902 +#define SLG51000_PWRSEQ_RESOURCE_EN_3 0x1903 +#define SLG51000_PWRSEQ_RESOURCE_EN_4 0x1904 +#define SLG51000_PWRSEQ_RESOURCE_EN_5 0x1905 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP0 0x1906 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN0 0x1907 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP1 0x1908 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN1 0x1909 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP2 0x190a +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN2 0x190b +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP3 0x190c +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN3 0x190d +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP4 0x190e +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN4 0x190f +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP5 0x1910 +#define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN5 0x1911 +#define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_A 0x1912 +#define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_B 0x1913 +#define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_C 0x1914 +#define SLG51000_PWRSEQ_INPUT_SENSE_CONF_A 0x1915 +#define SLG51000_PWRSEQ_INPUT_SENSE_CONF_B 0x1916 +#define SLG51000_LDO1_VSEL 0x2000 +#define SLG51000_LDO1_MINV 0x2060 +#define SLG51000_LDO1_MAXV 0x2061 +#define SLG51000_LDO1_MISC1 0x2064 +#define SLG51000_LDO1_VSEL_ACTUAL 0x2065 +#define SLG51000_LDO1_EVENT 0x20c0 +#define SLG51000_LDO1_STATUS 0x20c1 +#define SLG51000_LDO1_IRQ_MASK 0x20c2 +#define SLG51000_LDO2_VSEL 0x2200 +#define SLG51000_LDO2_MINV 0x2260 +#define SLG51000_LDO2_MAXV 0x2261 +#define SLG51000_LDO2_MISC1 0x2264 +#define SLG51000_LDO2_VSEL_ACTUAL 0x2265 +#define SLG51000_LDO2_EVENT 0x22c0 +#define SLG51000_LDO2_STATUS 0x22c1 +#define SLG51000_LDO2_IRQ_MASK 0x22c2 +#define SLG51000_LDO3_VSEL 0x2300 +#define SLG51000_LDO3_MINV 0x2360 +#define SLG51000_LDO3_MAXV 0x2361 +#define SLG51000_LDO3_CONF1 0x2364 +#define SLG51000_LDO3_CONF2 0x2365 +#define SLG51000_LDO3_VSEL_ACTUAL 0x2366 +#define SLG51000_LDO3_EVENT 0x23c0 +#define SLG51000_LDO3_STATUS 0x23c1 +#define SLG51000_LDO3_IRQ_MASK 0x23c2 +#define SLG51000_LDO4_VSEL 0x2500 +#define SLG51000_LDO4_MINV 0x2560 +#define SLG51000_LDO4_MAXV 0x2561 +#define SLG51000_LDO4_CONF1 0x2564 +#define SLG51000_LDO4_CONF2 0x2565 +#define SLG51000_LDO4_VSEL_ACTUAL 0x2566 +#define SLG51000_LDO4_EVENT 0x25c0 +#define SLG51000_LDO4_STATUS 0x25c1 +#define SLG51000_LDO4_IRQ_MASK 0x25c2 +#define SLG51000_LDO5_VSEL 0x2700 +#define SLG51000_LDO5_MINV 0x2760 +#define SLG51000_LDO5_MAXV 0x2761 +#define SLG51000_LDO5_TRIM2 0x2763 +#define SLG51000_LDO5_CONF1 0x2765 +#define SLG51000_LDO5_CONF2 0x2766 +#define SLG51000_LDO5_VSEL_ACTUAL 0x2767 +#define SLG51000_LDO5_EVENT 0x27c0 +#define SLG51000_LDO5_STATUS 0x27c1 +#define SLG51000_LDO5_IRQ_MASK 0x27c2 +#define SLG51000_LDO6_VSEL 0x2900 +#define SLG51000_LDO6_MINV 0x2960 +#define SLG51000_LDO6_MAXV 0x2961 +#define SLG51000_LDO6_TRIM2 0x2963 +#define SLG51000_LDO6_CONF1 0x2965 +#define SLG51000_LDO6_CONF2 0x2966 +#define SLG51000_LDO6_VSEL_ACTUAL 0x2967 +#define SLG51000_LDO6_EVENT 0x29c0 +#define SLG51000_LDO6_STATUS 0x29c1 +#define SLG51000_LDO6_IRQ_MASK 0x29c2 +#define SLG51000_LDO7_VSEL 0x3100 +#define SLG51000_LDO7_MINV 0x3160 +#define SLG51000_LDO7_MAXV 0x3161 +#define SLG51000_LDO7_CONF1 0x3164 +#define SLG51000_LDO7_CONF2 0x3165 +#define SLG51000_LDO7_VSEL_ACTUAL 0x3166 +#define SLG51000_LDO7_EVENT 0x31c0 +#define SLG51000_LDO7_STATUS 0x31c1 +#define SLG51000_LDO7_IRQ_MASK 0x31c2 +#define SLG51000_OTP_EVENT 0x782b +#define SLG51000_OTP_IRQ_MASK 0x782d +#define SLG51000_OTP_LOCK_OTP_PROG 0x78fe +#define SLG51000_OTP_LOCK_CTRL 0x78ff +#define SLG51000_LOCK_GLOBAL_LOCK_CTRL1 0x8000 + +/* Register Bit Fields */ + +/* SLG51000_SYSCTL_PATTERN_ID_BYTE0 = 0x1105 */ +#define SLG51000_PATTERN_ID_BYTE0_SHIFT 0 +#define SLG51000_PATTERN_ID_BYTE0_MASK (0xff << 0) + +/* SLG51000_SYSCTL_PATTERN_ID_BYTE1 = 0x1106 */ +#define SLG51000_PATTERN_ID_BYTE1_SHIFT 0 +#define SLG51000_PATTERN_ID_BYTE1_MASK (0xff << 0) + +/* SLG51000_SYSCTL_PATTERN_ID_BYTE2 = 0x1107 */ +#define SLG51000_PATTERN_ID_BYTE2_SHIFT 0 +#define SLG51000_PATTERN_ID_BYTE2_MASK (0xff << 0) + +/* SLG51000_SYSCTL_SYS_CONF_A = 0x1109 */ +#define SLG51000_I2C_ADDRESS_SHIFT 0 +#define SLG51000_I2C_ADDRESS_MASK (0x7f << 0) +#define SLG51000_I2C_DISABLE_SHIFT 7 +#define SLG51000_I2C_DISABLE_MASK (0x01 << 7) + +/* SLG51000_SYSCTL_SYS_CONF_D = 0x110c */ +#define SLG51000_CS_T_DEB_SHIFT 6 +#define SLG51000_CS_T_DEB_MASK (0x03 << 6) +#define SLG51000_I2C_CLR_MODE_SHIFT 5 +#define SLG51000_I2C_CLR_MODE_MASK (0x01 << 5) + +/* SLG51000_SYSCTL_MATRIX_CTRL_CONF_A = 0x110d */ +#define SLG51000_RESOURCE_CTRL_SHIFT 0 +#define SLG51000_RESOURCE_CTRL_MASK (0xff << 0) + +/* SLG51000_SYSCTL_MATRIX_CTRL_CONF_B = 0x110e */ +#define SLG51000_MATRIX_EVENT_SENSE_SHIFT 0 +#define SLG51000_MATRIX_EVENT_SENSE_MASK (0x07 << 0) + +/* SLG51000_SYSCTL_REFGEN_CONF_C = 0x1111 */ +#define SLG51000_REFGEN_SEL_TEMP_WARN_DEBOUNCE_SHIFT 2 +#define SLG51000_REFGEN_SEL_TEMP_WARN_DEBOUNCE_MASK (0x03 << 2) +#define SLG51000_REFGEN_SEL_TEMP_WARN_THR_SHIFT 0 +#define SLG51000_REFGEN_SEL_TEMP_WARN_THR_MASK (0x03 << 0) + +/* SLG51000_SYSCTL_UVLO_CONF_A = 0x1112 */ +#define SLG51000_VMON_UVLO_SEL_THR_SHIFT 0 +#define SLG51000_VMON_UVLO_SEL_THR_MASK (0x1f << 0) + +/* SLG51000_SYSCTL_FAULT_LOG1 = 0x1115 */ +#define SLG51000_FLT_POR_SHIFT 5 +#define SLG51000_FLT_POR_MASK (0x01 << 5) +#define SLG51000_FLT_RST_SHIFT 4 +#define SLG51000_FLT_RST_MASK (0x01 << 4) +#define SLG51000_FLT_POWER_SEQ_CRASH_REQ_SHIFT 2 +#define SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK (0x01 << 2) +#define SLG51000_FLT_OVER_TEMP_SHIFT 1 +#define SLG51000_FLT_OVER_TEMP_MASK (0x01 << 1) + +/* SLG51000_SYSCTL_EVENT = 0x1116 */ +#define SLG51000_EVT_MATRIX_SHIFT 1 +#define SLG51000_EVT_MATRIX_MASK (0x01 << 1) +#define SLG51000_EVT_HIGH_TEMP_WARN_SHIFT 0 +#define SLG51000_EVT_HIGH_TEMP_WARN_MASK (0x01 << 0) + +/* SLG51000_SYSCTL_STATUS = 0x1117 */ +#define SLG51000_STA_MATRIX_SHIFT 1 +#define SLG51000_STA_MATRIX_MASK (0x01 << 1) +#define SLG51000_STA_HIGH_TEMP_WARN_SHIFT 0 +#define SLG51000_STA_HIGH_TEMP_WARN_MASK (0x01 << 0) + +/* SLG51000_SYSCTL_IRQ_MASK = 0x1118 */ +#define SLG51000_IRQ_MATRIX_SHIFT 1 +#define SLG51000_IRQ_MATRIX_MASK (0x01 << 1) +#define SLG51000_IRQ_HIGH_TEMP_WARN_SHIFT 0 +#define SLG51000_IRQ_HIGH_TEMP_WARN_MASK (0x01 << 0) + +/* SLG51000_IO_GPIO1_CONF ~ SLG51000_IO_GPIO5_CONF = + * 0x1500, 0x1501, 0x1502, 0x1503, 0x1504 + */ +#define SLG51000_GPIO_DIR_SHIFT 7 +#define SLG51000_GPIO_DIR_MASK (0x01 << 7) +#define SLG51000_GPIO_SENS_SHIFT 5 +#define SLG51000_GPIO_SENS_MASK (0x03 << 5) +#define SLG51000_GPIO_INVERT_SHIFT 4 +#define SLG51000_GPIO_INVERT_MASK (0x01 << 4) +#define SLG51000_GPIO_BYP_SHIFT 3 +#define SLG51000_GPIO_BYP_MASK (0x01 << 3) +#define SLG51000_GPIO_T_DEB_SHIFT 1 +#define SLG51000_GPIO_T_DEB_MASK (0x03 << 1) +#define SLG51000_GPIO_LEVEL_SHIFT 0 +#define SLG51000_GPIO_LEVEL_MASK (0x01 << 0) + +/* SLG51000_IO_GPIO6_CONF = 0x1505 */ +#define SLG51000_GPIO6_SENS_SHIFT 5 +#define SLG51000_GPIO6_SENS_MASK (0x03 << 5) +#define SLG51000_GPIO6_INVERT_SHIFT 4 +#define SLG51000_GPIO6_INVERT_MASK (0x01 << 4) +#define SLG51000_GPIO6_T_DEB_SHIFT 1 +#define SLG51000_GPIO6_T_DEB_MASK (0x03 << 1) +#define SLG51000_GPIO6_LEVEL_SHIFT 0 +#define SLG51000_GPIO6_LEVEL_MASK (0x01 << 0) + +/* SLG51000_IO_GPIO_STATUS = 0x1506 */ +#define SLG51000_GPIO6_STATUS_SHIFT 5 +#define SLG51000_GPIO6_STATUS_MASK (0x01 << 5) +#define SLG51000_GPIO5_STATUS_SHIFT 4 +#define SLG51000_GPIO5_STATUS_MASK (0x01 << 4) +#define SLG51000_GPIO4_STATUS_SHIFT 3 +#define SLG51000_GPIO4_STATUS_MASK (0x01 << 3) +#define SLG51000_GPIO3_STATUS_SHIFT 2 +#define SLG51000_GPIO3_STATUS_MASK (0x01 << 2) +#define SLG51000_GPIO2_STATUS_SHIFT 1 +#define SLG51000_GPIO2_STATUS_MASK (0x01 << 1) +#define SLG51000_GPIO1_STATUS_SHIFT 0 +#define SLG51000_GPIO1_STATUS_MASK (0x01 << 0) + +/* SLG51000_LUTARRAY_LUT_VAL_0 ~ SLG51000_LUTARRAY_LUT_VAL_11 + * 0x1600, 0x1601, 0x1602, 0x1603, 0x1604, 0x1605, + * 0x1606, 0x1607, 0x1608, 0x1609, 0x160a, 0x160b + */ +#define SLG51000_LUT_VAL_SHIFT 0 +#define SLG51000_LUT_VAL_MASK (0xff << 0) + +/* SLG51000_MUXARRAY_INPUT_SEL_0 ~ SLG51000_MUXARRAY_INPUT_SEL_63 + * 0x1700, 0x1701, 0x1702, 0x1703, 0x1704, 0x1705, + * 0x1706, 0x1707, 0x1708, 0x1709, 0x170a, 0x170b, + * 0x170c, 0x170d, 0x170e, 0x170f, 0x1710, 0x1711, + * 0x1712, 0x1713, 0x1714, 0x1715, 0x1716, 0x1717, + * 0x1718, 0x1719, 0x171a, 0x171b, 0x171c, 0x171d, + * 0x171e, 0x171f, 0x1720, 0x1721, 0x1722, 0x1723, + * 0x1724, 0x1725, 0x1726, 0x1727, 0x1728, 0x1729, + * 0x173a, 0x173b, 0x173c, 0x173d, 0x173e, 0x173f, + */ +#define SLG51000_INPUT_SEL_SHIFT 0 +#define SLG51000_INPUT_SEL_MASK (0x3f << 0) + +/* SLG51000_PWRSEQ_RESOURCE_EN_0 ~ SLG51000_PWRSEQ_RESOURCE_EN_5 + * 0x1900, 0x1901, 0x1902, 0x1903, 0x1904, 0x1905 + */ +#define SLG51000_RESOURCE_EN_DOWN0_SHIFT 4 +#define SLG51000_RESOURCE_EN_DOWN0_MASK (0x07 << 4) +#define SLG51000_RESOURCE_EN_UP0_SHIFT 0 +#define SLG51000_RESOURCE_EN_UP0_MASK (0x07 << 0) + +/* SLG51000_PWRSEQ_SLOT_TIME_MIN_UP0 ~ SLG51000_PWRSEQ_SLOT_TIME_MIN_UP5 + * 0x1906, 0x1908, 0x190a, 0x190c, 0x190e, 0x1910 + */ +#define SLG51000_SLOT_TIME_MIN_UP_SHIFT 0 +#define SLG51000_SLOT_TIME_MIN_UP_MASK (0xff << 0) + +/* SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN0 ~ SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN5 + * 0x1907, 0x1909, 0x190b, 0x190d, 0x190f, 0x1911 + */ +#define SLG51000_SLOT_TIME_MIN_DOWN_SHIFT 0 +#define SLG51000_SLOT_TIME_MIN_DOWN_MASK (0xff << 0) + +/* SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_A ~ SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_C + * 0x1912, 0x1913, 0x1914 + */ +#define SLG51000_SLOT_TIME_MAX_DOWN1_SHIFT 6 +#define SLG51000_SLOT_TIME_MAX_DOWN1_MASK (0x03 << 6) +#define SLG51000_SLOT_TIME_MAX_UP1_SHIFT 4 +#define SLG51000_SLOT_TIME_MAX_UP1_MASK (0x03 << 4) +#define SLG51000_SLOT_TIME_MAX_DOWN0_SHIFT 2 +#define SLG51000_SLOT_TIME_MAX_DOWN0_MASK (0x03 << 2) +#define SLG51000_SLOT_TIME_MAX_UP0_SHIFT 0 +#define SLG51000_SLOT_TIME_MAX_UP0_MASK (0x03 << 0) + +/* SLG51000_PWRSEQ_INPUT_SENSE_CONF_A = 0x1915 */ +#define SLG51000_TRIG_UP_SENSE_SHIFT 6 +#define SLG51000_TRIG_UP_SENSE_MASK (0x01 << 6) +#define SLG51000_UP_EN_SENSE5_SHIFT 5 +#define SLG51000_UP_EN_SENSE5_MASK (0x01 << 5) +#define SLG51000_UP_EN_SENSE4_SHIFT 4 +#define SLG51000_UP_EN_SENSE4_MASK (0x01 << 4) +#define SLG51000_UP_EN_SENSE3_SHIFT 3 +#define SLG51000_UP_EN_SENSE3_MASK (0x01 << 3) +#define SLG51000_UP_EN_SENSE2_SHIFT 2 +#define SLG51000_UP_EN_SENSE2_MASK (0x01 << 2) +#define SLG51000_UP_EN_SENSE1_SHIFT 1 +#define SLG51000_UP_EN_SENSE1_MASK (0x01 << 1) +#define SLG51000_UP_EN_SENSE0_SHIFT 0 +#define SLG51000_UP_EN_SENSE0_MASK (0x01 << 0) + +/* SLG51000_PWRSEQ_INPUT_SENSE_CONF_B = 0x1916 */ +#define SLG51000_CRASH_DETECT_SENSE_SHIFT 7 +#define SLG51000_CRASH_DETECT_SENSE_MASK (0x01 << 7) +#define SLG51000_TRIG_DOWN_SENSE_SHIFT 6 +#define SLG51000_TRIG_DOWN_SENSE_MASK (0x01 << 6) +#define SLG51000_DOWN_EN_SENSE5_SHIFT 5 +#define SLG51000_DOWN_EN_SENSE5_MASK (0x01 << 5) +#define SLG51000_DOWN_EN_SENSE4_SHIFT 4 +#define SLG51000_DOWN_EN_SENSE4_MASK (0x01 << 4) +#define SLG51000_DOWN_EN_SENSE3_SHIFT 3 +#define SLG51000_DOWN_EN_SENSE3_MASK (0x01 << 3) +#define SLG51000_DOWN_EN_SENSE2_SHIFT 2 +#define SLG51000_DOWN_EN_SENSE2_MASK (0x01 << 2) +#define SLG51000_DOWN_EN_SENSE1_SHIFT 1 +#define SLG51000_DOWN_EN_SENSE1_MASK (0x01 << 1) +#define SLG51000_DOWN_EN_SENSE0_SHIFT 0 +#define SLG51000_DOWN_EN_SENSE0_MASK (0x01 << 0) + +/* SLG51000_LDO1_VSEL ~ SLG51000_LDO7_VSEL = + * 0x2000, 0x2200, 0x2300, 0x2500, 0x2700, 0x2900, 0x3100 + */ +#define SLG51000_VSEL_SHIFT 0 +#define SLG51000_VSEL_MASK (0xff << 0) + +/* SLG51000_LDO1_MINV ~ SLG51000_LDO7_MINV = + * 0x2060, 0x2260, 0x2360, 0x2560, 0x2760, 0x2960, 0x3160 + */ +#define SLG51000_MINV_SHIFT 0 +#define SLG51000_MINV_MASK (0xff << 0) + +/* SLG51000_LDO1_MAXV ~ SLG51000_LDO7_MAXV = + * 0x2061, 0x2261, 0x2361, 0x2561, 0x2761, 0x2961, 0x3161 + */ +#define SLG51000_MAXV_SHIFT 0 +#define SLG51000_MAXV_MASK (0xff << 0) + +/* SLG51000_LDO1_MISC1 = 0x2064, SLG51000_LDO2_MISC1 = 0x2264 */ +#define SLG51000_SEL_VRANGE_SHIFT 0 +#define SLG51000_SEL_VRANGE_MASK (0x01 << 0) + +/* SLG51000_LDO1_VSEL_ACTUAL ~ SLG51000_LDO7_VSEL_ACTUAL = + * 0x2065, 0x2265, 0x2366, 0x2566, 0x2767, 0x2967, 0x3166 + */ +#define SLG51000_VSEL_ACTUAL_SHIFT 0 +#define SLG51000_VSEL_ACTUAL_MASK (0xff << 0) + +/* SLG51000_LDO1_EVENT ~ SLG51000_LDO7_EVENT = + * 0x20c0, 0x22c0, 0x23c0, 0x25c0, 0x27c0, 0x29c0, 0x31c0 + */ +#define SLG51000_EVT_ILIM_FLAG_SHIFT 0 +#define SLG51000_EVT_ILIM_FLAG_MASK (0x01 << 0) +#define SLG51000_EVT_VOUT_OK_FLAG_SHIFT 1 +#define SLG51000_EVT_VOUT_OK_FLAG_MASK (0x01 << 1) + +/* SLG51000_LDO1_STATUS ~ SLG51000_LDO7_STATUS = + * 0x20c1, 0x22c1, 0x23c1, 0x25c1, 0x27c1, 0x29c1, 0x31c1 + */ +#define SLG51000_STA_ILIM_FLAG_SHIFT 0 +#define SLG51000_STA_ILIM_FLAG_MASK (0x01 << 0) +#define SLG51000_STA_VOUT_OK_FLAG_SHIFT 1 +#define SLG51000_STA_VOUT_OK_FLAG_MASK (0x01 << 1) + +/* SLG51000_LDO1_IRQ_MASK ~ SLG51000_LDO7_IRQ_MASK = + * 0x20c2, 0x22c2, 0x23c2, 0x25c2, 0x27c2, 0x29c2, 0x31c2 + */ +#define SLG51000_IRQ_ILIM_FLAG_SHIFT 0 +#define SLG51000_IRQ_ILIM_FLAG_MASK (0x01 << 0) + +/* SLG51000_LDO3_CONF1 ~ SLG51000_LDO7_CONF1 = + * 0x2364, 0x2564, 0x2765, 0x2965, 0x3164 + */ +#define SLG51000_SEL_START_ILIM_SHIFT 0 +#define SLG51000_SEL_START_ILIM_MASK (0x7f << 0) + +/* SLG51000_LDO3_CONF2 ~ SLG51000_LDO7_CONF2 = + * 0x2365, 0x2565, 0x2766, 0x2966, 0x3165 + */ +#define SLG51000_SEL_FUNC_ILIM_SHIFT 0 +#define SLG51000_SEL_FUNC_ILIM_MASK (0x7f << 0) + +/* SLG51000_LDO5_TRIM2 = 0x2763, SLG51000_LDO6_TRIM2 = 0x2963 */ +#define SLG51000_SEL_BYP_SLEW_RATE_SHIFT 2 +#define SLG51000_SEL_BYP_SLEW_RATE_MASK (0x03 << 2) +#define SLG51000_SEL_BYP_VGATE_SHIFT 1 +#define SLG51000_SEL_BYP_VGATE_MASK (0x01 << 1) +#define SLG51000_SEL_BYP_MODE_SHIFT 0 +#define SLG51000_SEL_BYP_MODE_MASK (0x01 << 0) + +/* SLG51000_OTP_EVENT = 0x782b */ +#define SLG51000_EVT_CRC_SHIFT 0 +#define SLG51000_EVT_CRC_MASK (0x01 << 0) + +/* SLG51000_OTP_IRQ_MASK = 0x782d */ +#define SLG51000_IRQ_CRC_SHIFT 0 +#define SLG51000_IRQ_CRC_MASK (0x01 << 0) + +/* SLG51000_OTP_LOCK_OTP_PROG = 0x78fe */ +#define SLG51000_LOCK_OTP_PROG_SHIFT 0 +#define SLG51000_LOCK_OTP_PROG_MASK (0x01 << 0) + +/* SLG51000_OTP_LOCK_CTRL = 0x78ff */ +#define SLG51000_LOCK_DFT_SHIFT 1 +#define SLG51000_LOCK_DFT_MASK (0x01 << 1) +#define SLG51000_LOCK_RWT_SHIFT 0 +#define SLG51000_LOCK_RWT_MASK (0x01 << 0) + +/* SLG51000_LOCK_GLOBAL_LOCK_CTRL1 = 0x8000 */ +#define SLG51000_LDO7_LOCK_SHIFT 7 +#define SLG51000_LDO7_LOCK_MASK (0x01 << 7) +#define SLG51000_LDO6_LOCK_SHIFT 6 +#define SLG51000_LDO6_LOCK_MASK (0x01 << 6) +#define SLG51000_LDO5_LOCK_SHIFT 5 +#define SLG51000_LDO5_LOCK_MASK (0x01 << 5) +#define SLG51000_LDO4_LOCK_SHIFT 4 +#define SLG51000_LDO4_LOCK_MASK (0x01 << 4) +#define SLG51000_LDO3_LOCK_SHIFT 3 +#define SLG51000_LDO3_LOCK_MASK (0x01 << 3) +#define SLG51000_LDO2_LOCK_SHIFT 2 +#define SLG51000_LDO2_LOCK_MASK (0x01 << 2) +#define SLG51000_LDO1_LOCK_SHIFT 1 +#define SLG51000_LDO1_LOCK_MASK (0x01 << 1) + +#endif /* __SLG51000_REGISTERS_H__ */ + diff --git a/drivers/regulator/spacemit-p1.c b/drivers/regulator/spacemit-p1.c new file mode 100644 index 000000000..57e6e00a7 --- /dev/null +++ b/drivers/regulator/spacemit-p1.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for regulators found in the SpacemiT P1 PMIC + * + * Copyright (C) 2025 by RISCstar Solutions Corporation. All rights reserved. + * Derived from code from SpacemiT. + * Copyright (c) 2023, SPACEMIT Co., Ltd + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MOD_NAME "spacemit-p1-regulator" + +enum p1_regulator_id { + P1_BUCK1, + P1_BUCK2, + P1_BUCK3, + P1_BUCK4, + P1_BUCK5, + P1_BUCK6, + + P1_ALDO1, + P1_ALDO2, + P1_ALDO3, + P1_ALDO4, + + P1_DLDO1, + P1_DLDO2, + P1_DLDO3, + P1_DLDO4, + P1_DLDO5, + P1_DLDO6, + P1_DLDO7, +}; + +static const struct regulator_ops p1_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +/* Selector value 255 can be used to disable the buck converter on sleep */ +static const struct linear_range p1_buck_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 170, 5000), + REGULATOR_LINEAR_RANGE(1375000, 171, 254, 25000), +}; + +/* Selector value 0 can be used for suspend */ +static const struct linear_range p1_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 11, 127, 25000), +}; + +/* These define the voltage selector field for buck and LDO regulators */ +#define BUCK_MASK GENMASK(7, 0) +#define LDO_MASK GENMASK(6, 0) + +#define P1_ID(_TYPE, _n) P1_ ## _TYPE ## _n +#define P1_ENABLE_REG(_off, _n) ((_off) + 3 * ((_n) - 1)) + +#define P1_REG_DESC(_TYPE, _type, _n, _s, _off, _mask, _nv, _ranges) \ + { \ + .name = #_type #_n, \ + .supply_name = _s, \ + .of_match = of_match_ptr(#_type #_n), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = P1_ID(_TYPE, _n), \ + .n_voltages = _nv, \ + .ops = &p1_regulator_ops, \ + .owner = THIS_MODULE, \ + .linear_ranges = _ranges, \ + .n_linear_ranges = ARRAY_SIZE(_ranges), \ + .vsel_reg = P1_ENABLE_REG(_off, _n) + 1, \ + .vsel_mask = _mask, \ + .enable_reg = P1_ENABLE_REG(_off, _n), \ + .enable_mask = BIT(0), \ + } + +#define P1_BUCK_DESC(_n) \ + P1_REG_DESC(BUCK, buck, _n, "vin" #_n, 0x47, BUCK_MASK, 255, p1_buck_ranges) + +#define P1_ALDO_DESC(_n) \ + P1_REG_DESC(ALDO, aldo, _n, "aldoin", 0x5b, LDO_MASK, 128, p1_ldo_ranges) + +#define P1_DLDO1_DESC(_n) \ + P1_REG_DESC(DLDO, dldo, _n, "dldoin1", 0x67, LDO_MASK, 128, p1_ldo_ranges) + +#define P1_DLDO2_DESC(_n) \ + P1_REG_DESC(DLDO, dldo, _n, "dldoin2", 0x67, LDO_MASK, 128, p1_ldo_ranges) + +static const struct regulator_desc p1_regulator_desc[] = { + P1_BUCK_DESC(1), + P1_BUCK_DESC(2), + P1_BUCK_DESC(3), + P1_BUCK_DESC(4), + P1_BUCK_DESC(5), + P1_BUCK_DESC(6), + + P1_ALDO_DESC(1), + P1_ALDO_DESC(2), + P1_ALDO_DESC(3), + P1_ALDO_DESC(4), + + P1_DLDO1_DESC(1), + P1_DLDO1_DESC(2), + P1_DLDO1_DESC(3), + P1_DLDO1_DESC(4), + P1_DLDO2_DESC(5), + P1_DLDO2_DESC(6), + P1_DLDO2_DESC(7), +}; + +static int p1_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config = { }; + struct device *dev = &pdev->dev; + u32 i; + + /* + * The parent device (PMIC) owns the regmap. Since we don't + * provide one in the config structure, that one will be used. + */ + config.dev = dev->parent; + + for (i = 0; i < ARRAY_SIZE(p1_regulator_desc); i++) { + const struct regulator_desc *desc = &p1_regulator_desc[i]; + struct regulator_dev *rdev; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "error registering regulator %s\n", + desc->name); + } + + return 0; +} + +static struct platform_driver p1_regulator_driver = { + .probe = p1_regulator_probe, + .driver = { + .name = MOD_NAME, + }, +}; + +module_platform_driver(p1_regulator_driver); + +MODULE_DESCRIPTION("SpacemiT P1 regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" MOD_NAME); diff --git a/drivers/regulator/stm32-booster.c b/drivers/regulator/stm32-booster.c new file mode 100644 index 000000000..2cdc7f047 --- /dev/null +++ b/drivers/regulator/stm32-booster.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) STMicroelectronics 2019 +// Author(s): Fabrice Gasnier . + +#include +#include +#include +#include +#include +#include +#include + +/* STM32H7 SYSCFG register */ +#define STM32H7_SYSCFG_PMCR 0x04 +#define STM32H7_SYSCFG_BOOSTE_MASK BIT(8) + +/* STM32MP1 SYSCFG has set and clear registers */ +#define STM32MP1_SYSCFG_PMCSETR 0x04 +#define STM32MP1_SYSCFG_PMCCLRR 0x44 +#define STM32MP1_SYSCFG_EN_BOOSTER_MASK BIT(8) + +static const struct regulator_ops stm32h7_booster_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_desc stm32h7_booster_desc = { + .name = "booster", + .supply_name = "vdda", + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .fixed_uV = 3300000, + .ramp_delay = 66000, /* up to 50us to stabilize */ + .ops = &stm32h7_booster_ops, + .enable_reg = STM32H7_SYSCFG_PMCR, + .enable_mask = STM32H7_SYSCFG_BOOSTE_MASK, + .owner = THIS_MODULE, +}; + +static int stm32mp1_booster_enable(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCSETR, + STM32MP1_SYSCFG_EN_BOOSTER_MASK); +} + +static int stm32mp1_booster_disable(struct regulator_dev *rdev) +{ + return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCCLRR, + STM32MP1_SYSCFG_EN_BOOSTER_MASK); +} + +static const struct regulator_ops stm32mp1_booster_ops = { + .enable = stm32mp1_booster_enable, + .disable = stm32mp1_booster_disable, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_desc stm32mp1_booster_desc = { + .name = "booster", + .supply_name = "vdda", + .n_voltages = 1, + .type = REGULATOR_VOLTAGE, + .fixed_uV = 3300000, + .ramp_delay = 66000, + .ops = &stm32mp1_booster_ops, + .enable_reg = STM32MP1_SYSCFG_PMCSETR, + .enable_mask = STM32MP1_SYSCFG_EN_BOOSTER_MASK, + .owner = THIS_MODULE, +}; + +static int stm32_booster_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = pdev->dev.of_node; + struct regulator_config config = { }; + const struct regulator_desc *desc; + struct regulator_dev *rdev; + struct regmap *regmap; + int ret; + + regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + desc = device_get_match_data(dev); + + config.regmap = regmap; + config.dev = dev; + config.of_node = np; + config.init_data = of_get_regulator_init_data(dev, np, desc); + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "register failed with error %d\n", ret); + return ret; + } + + return 0; +} + +static const struct of_device_id __maybe_unused stm32_booster_of_match[] = { + { + .compatible = "st,stm32h7-booster", + .data = (void *)&stm32h7_booster_desc + }, { + .compatible = "st,stm32mp1-booster", + .data = (void *)&stm32mp1_booster_desc + }, { + }, +}; +MODULE_DEVICE_TABLE(of, stm32_booster_of_match); + +static struct platform_driver stm32_booster_driver = { + .probe = stm32_booster_probe, + .driver = { + .name = "stm32-booster", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(stm32_booster_of_match), + }, +}; +module_platform_driver(stm32_booster_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Fabrice Gasnier "); +MODULE_DESCRIPTION("STMicroelectronics STM32 booster regulator driver"); +MODULE_ALIAS("platform:stm32-booster"); diff --git a/drivers/regulator/stm32-pwr.c b/drivers/regulator/stm32-pwr.c new file mode 100644 index 000000000..b7aeef6e0 --- /dev/null +++ b/drivers/regulator/stm32-pwr.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) STMicroelectronics 2019 +// Authors: Gabriel Fernandez +// Pascal Paillet . + +#include +#include +#include +#include +#include +#include +#include + +/* + * Registers description + */ +#define REG_PWR_CR3 0x0C + +#define USB_3_3_EN BIT(24) +#define USB_3_3_RDY BIT(26) +#define REG_1_8_EN BIT(28) +#define REG_1_8_RDY BIT(29) +#define REG_1_1_EN BIT(30) +#define REG_1_1_RDY BIT(31) + +/* list of supported regulators */ +enum { + PWR_REG11, + PWR_REG18, + PWR_USB33, + STM32PWR_REG_NUM_REGS +}; + +static u32 ready_mask_table[STM32PWR_REG_NUM_REGS] = { + [PWR_REG11] = REG_1_1_RDY, + [PWR_REG18] = REG_1_8_RDY, + [PWR_USB33] = USB_3_3_RDY, +}; + +struct stm32_pwr_reg { + void __iomem *base; + u32 ready_mask; +}; + +static int stm32_pwr_reg_is_ready(struct regulator_dev *rdev) +{ + struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); + u32 val; + + val = readl_relaxed(priv->base + REG_PWR_CR3); + + return (val & priv->ready_mask); +} + +static int stm32_pwr_reg_is_enabled(struct regulator_dev *rdev) +{ + struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); + u32 val; + + val = readl_relaxed(priv->base + REG_PWR_CR3); + + return (val & rdev->desc->enable_mask); +} + +static int stm32_pwr_reg_enable(struct regulator_dev *rdev) +{ + struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); + int ret; + u32 val; + + val = readl_relaxed(priv->base + REG_PWR_CR3); + val |= rdev->desc->enable_mask; + writel_relaxed(val, priv->base + REG_PWR_CR3); + + /* use an arbitrary timeout of 20ms */ + ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, val, + 100, 20 * 1000); + if (ret) + dev_err(&rdev->dev, "regulator enable timed out!\n"); + + return ret; +} + +static int stm32_pwr_reg_disable(struct regulator_dev *rdev) +{ + struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); + int ret; + u32 val; + + val = readl_relaxed(priv->base + REG_PWR_CR3); + val &= ~rdev->desc->enable_mask; + writel_relaxed(val, priv->base + REG_PWR_CR3); + + /* use an arbitrary timeout of 20ms */ + ret = readx_poll_timeout(stm32_pwr_reg_is_enabled, rdev, val, !val, + 100, 20 * 1000); + if (ret) + dev_err(&rdev->dev, "regulator disable timed out!\n"); + + return ret; +} + +static const struct regulator_ops stm32_pwr_reg_ops = { + .enable = stm32_pwr_reg_enable, + .disable = stm32_pwr_reg_disable, + .is_enabled = stm32_pwr_reg_is_enabled, +}; + +#define PWR_REG(_id, _name, _volt, _en, _supply) \ + [_id] = { \ + .id = _id, \ + .name = _name, \ + .of_match = of_match_ptr(_name), \ + .n_voltages = 1, \ + .type = REGULATOR_VOLTAGE, \ + .fixed_uV = _volt, \ + .ops = &stm32_pwr_reg_ops, \ + .enable_mask = _en, \ + .owner = THIS_MODULE, \ + .supply_name = _supply, \ + } \ + +static const struct regulator_desc stm32_pwr_desc[] = { + PWR_REG(PWR_REG11, "reg11", 1100000, REG_1_1_EN, "vdd"), + PWR_REG(PWR_REG18, "reg18", 1800000, REG_1_8_EN, "vdd"), + PWR_REG(PWR_USB33, "usb33", 3300000, USB_3_3_EN, "vdd_3v3_usbfs"), +}; + +static int stm32_pwr_regulator_probe(struct platform_device *pdev) +{ + struct stm32_pwr_reg *priv; + void __iomem *base; + struct regulator_dev *rdev; + struct regulator_config config = { }; + int i, ret = 0; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) { + dev_err(&pdev->dev, "Unable to map IO memory\n"); + return PTR_ERR(base); + } + + config.dev = &pdev->dev; + + for (i = 0; i < STM32PWR_REG_NUM_REGS; i++) { + priv = devm_kzalloc(&pdev->dev, sizeof(struct stm32_pwr_reg), + GFP_KERNEL); + if (!priv) + return -ENOMEM; + priv->base = base; + priv->ready_mask = ready_mask_table[i]; + config.driver_data = priv; + + rdev = devm_regulator_register(&pdev->dev, + &stm32_pwr_desc[i], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, + "Failed to register regulator: %d\n", ret); + break; + } + } + return ret; +} + +static const struct of_device_id __maybe_unused stm32_pwr_of_match[] = { + { .compatible = "st,stm32mp1,pwr-reg", }, + { .compatible = "st,stm32mp13-pwr-reg", }, + {}, +}; +MODULE_DEVICE_TABLE(of, stm32_pwr_of_match); + +static struct platform_driver stm32_pwr_driver = { + .probe = stm32_pwr_regulator_probe, + .driver = { + .name = "stm32-pwr-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(stm32_pwr_of_match), + }, +}; +module_platform_driver(stm32_pwr_driver); + +MODULE_DESCRIPTION("STM32MP1 PWR voltage regulator driver"); +MODULE_AUTHOR("Pascal Paillet "); diff --git a/drivers/regulator/stm32-vrefbuf.c b/drivers/regulator/stm32-vrefbuf.c new file mode 100644 index 000000000..9e391206f --- /dev/null +++ b/drivers/regulator/stm32-vrefbuf.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) STMicroelectronics 2017 + * + * Author: Fabrice Gasnier + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* STM32 VREFBUF registers */ +#define STM32_VREFBUF_CSR 0x00 + +/* STM32 VREFBUF CSR bitfields */ +#define STM32_VRS GENMASK(6, 4) +#define STM32_VRR BIT(3) +#define STM32_HIZ BIT(1) +#define STM32_ENVR BIT(0) + +#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10 + +struct stm32_vrefbuf { + void __iomem *base; + struct clk *clk; + struct device *dev; +}; + +static const unsigned int stm32_vrefbuf_voltages[] = { + /* Matches resp. VRS = 000b, 001b, 010b, 011b */ + 2500000, 2048000, 1800000, 1500000, +}; + +static int stm32_vrefbuf_enable(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + u32 val; + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret < 0) + return ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_HIZ) | STM32_ENVR; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + /* + * Vrefbuf startup time depends on external capacitor: wait here for + * VRR to be set. That means output has reached expected value. + * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as + * arbitrary timeout. + */ + ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, + val & STM32_VRR, 650, 10000); + if (ret) { + dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n"); + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_ENVR) | STM32_HIZ; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + } + + pm_runtime_put_autosuspend(priv->dev); + + return ret; +} + +static int stm32_vrefbuf_disable(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + u32 val; + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret < 0) + return ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val &= ~STM32_ENVR; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + pm_runtime_put_autosuspend(priv->dev); + + return 0; +} + +static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret < 0) + return ret; + + ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR; + + pm_runtime_put_autosuspend(priv->dev); + + return ret; +} + +static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev, + unsigned sel) +{ + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + u32 val; + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret < 0) + return ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel); + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + pm_runtime_put_autosuspend(priv->dev); + + return 0; +} + +static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + u32 val; + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret < 0) + return ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + ret = FIELD_GET(STM32_VRS, val); + + pm_runtime_put_autosuspend(priv->dev); + + return ret; +} + +static const struct regulator_ops stm32_vrefbuf_volt_ops = { + .enable = stm32_vrefbuf_enable, + .disable = stm32_vrefbuf_disable, + .is_enabled = stm32_vrefbuf_is_enabled, + .get_voltage_sel = stm32_vrefbuf_get_voltage_sel, + .set_voltage_sel = stm32_vrefbuf_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_desc stm32_vrefbuf_regu = { + .name = "vref", + .supply_name = "vdda", + .volt_table = stm32_vrefbuf_voltages, + .n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages), + .ops = &stm32_vrefbuf_volt_ops, + .off_on_delay = 1000, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}; + +static int stm32_vrefbuf_probe(struct platform_device *pdev) +{ + struct stm32_vrefbuf *priv; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + priv->dev = &pdev->dev; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, + STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + ret = clk_prepare_enable(priv->clk); + if (ret) { + dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret); + goto err_pm_stop; + } + + config.dev = &pdev->dev; + config.driver_data = priv; + config.of_node = pdev->dev.of_node; + config.init_data = of_get_regulator_init_data(&pdev->dev, + pdev->dev.of_node, + &stm32_vrefbuf_regu); + + rdev = regulator_register(&pdev->dev, &stm32_vrefbuf_regu, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(&pdev->dev, "register failed with error %d\n", ret); + goto err_clk_dis; + } + platform_set_drvdata(pdev, rdev); + + pm_runtime_put_autosuspend(&pdev->dev); + + return 0; + +err_clk_dis: + clk_disable_unprepare(priv->clk); +err_pm_stop: + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); + + return ret; +} + +static void stm32_vrefbuf_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + + pm_runtime_get_sync(&pdev->dev); + regulator_unregister(rdev); + clk_disable_unprepare(priv->clk); + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); +}; + +static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + + clk_disable_unprepare(priv->clk); + + return 0; +} + +static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev) +{ + struct regulator_dev *rdev = dev_get_drvdata(dev); + struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); + + return clk_prepare_enable(priv->clk); +} + +static const struct dev_pm_ops stm32_vrefbuf_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend, + stm32_vrefbuf_runtime_resume, + NULL) +}; + +static const struct of_device_id __maybe_unused stm32_vrefbuf_of_match[] = { + { .compatible = "st,stm32-vrefbuf", }, + {}, +}; +MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match); + +static struct platform_driver stm32_vrefbuf_driver = { + .probe = stm32_vrefbuf_probe, + .remove = stm32_vrefbuf_remove, + .driver = { + .name = "stm32-vrefbuf", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(stm32_vrefbuf_of_match), + .pm = &stm32_vrefbuf_pm_ops, + }, +}; +module_platform_driver(stm32_vrefbuf_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Fabrice Gasnier "); +MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver"); +MODULE_ALIAS("platform:stm32-vrefbuf"); diff --git a/drivers/regulator/stpmic1_regulator.c b/drivers/regulator/stpmic1_regulator.c new file mode 100644 index 000000000..a498df7cb --- /dev/null +++ b/drivers/regulator/stpmic1_regulator.c @@ -0,0 +1,651 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) STMicroelectronics 2018 +// Author: Pascal Paillet for STMicroelectronics. + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/** + * struct stpmic1_regulator_cfg - this structure is used as driver data + * @desc: regulator framework description + * @mask_reset_reg: mask reset register address + * @mask_reset_mask: mask rank and mask reset register mask + * @icc_reg: icc register address + * @icc_mask: icc register mask + */ +struct stpmic1_regulator_cfg { + struct regulator_desc desc; + u8 mask_reset_reg; + u8 mask_reset_mask; + u8 icc_reg; + u8 icc_mask; +}; + +static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode); +static unsigned int stpmic1_get_mode(struct regulator_dev *rdev); +static int stpmic1_set_icc(struct regulator_dev *rdev, int lim, int severity, + bool enable); +static unsigned int stpmic1_map_mode(unsigned int mode); + +enum { + STPMIC1_BUCK1 = 0, + STPMIC1_BUCK2 = 1, + STPMIC1_BUCK3 = 2, + STPMIC1_BUCK4 = 3, + STPMIC1_LDO1 = 4, + STPMIC1_LDO2 = 5, + STPMIC1_LDO3 = 6, + STPMIC1_LDO4 = 7, + STPMIC1_LDO5 = 8, + STPMIC1_LDO6 = 9, + STPMIC1_VREF_DDR = 10, + STPMIC1_BOOST = 11, + STPMIC1_VBUS_OTG = 12, + STPMIC1_SW_OUT = 13, +}; + +/* Enable time worst case is 5000mV/(2250uV/uS) */ +#define PMIC_ENABLE_TIME_US 2200 +/* Ramp delay worst case is (2250uV/uS) */ +#define PMIC_RAMP_DELAY 2200 + +static const struct linear_range buck1_ranges[] = { + REGULATOR_LINEAR_RANGE(725000, 0, 4, 0), + REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000), + REGULATOR_LINEAR_RANGE(1500000, 37, 63, 0), +}; + +static const struct linear_range buck2_ranges[] = { + REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0), + REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0), + REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0), + REGULATOR_LINEAR_RANGE(1150000, 22, 23, 0), + REGULATOR_LINEAR_RANGE(1200000, 24, 25, 0), + REGULATOR_LINEAR_RANGE(1250000, 26, 27, 0), + REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0), + REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0), + REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0), + REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0), + REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0), +}; + +static const struct linear_range buck3_ranges[] = { + REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0), + REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0), + REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0), + REGULATOR_LINEAR_RANGE(1300000, 28, 31, 0), + REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0), + REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000), + REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0), +}; + +static const struct linear_range buck4_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000), + REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0), + REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0), + REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0), + REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0), + REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000), + REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0), +}; + +static const struct linear_range ldo1_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), + REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), + REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0), +}; + +static const struct linear_range ldo2_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), + REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), + REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0), +}; + +static const struct linear_range ldo3_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), + REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), + REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0), + /* with index 31 LDO3 is in DDR mode */ + REGULATOR_LINEAR_RANGE(500000, 31, 31, 0), +}; + +static const struct linear_range ldo5_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), + REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000), + REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0), +}; + +static const struct linear_range ldo6_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000), + REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0), +}; + +static const struct regulator_ops stpmic1_ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_over_current_protection = stpmic1_set_icc, +}; + +static const struct regulator_ops stpmic1_ldo3_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_iterate, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, + .set_over_current_protection = stpmic1_set_icc, +}; + +static const struct regulator_ops stpmic1_ldo4_fixed_regul_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_over_current_protection = stpmic1_set_icc, +}; + +static const struct regulator_ops stpmic1_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_pull_down = regulator_set_pull_down_regmap, + .set_mode = stpmic1_set_mode, + .get_mode = stpmic1_get_mode, + .set_over_current_protection = stpmic1_set_icc, +}; + +static const struct regulator_ops stpmic1_vref_ddr_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops stpmic1_boost_regul_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_over_current_protection = stpmic1_set_icc, +}; + +static const struct regulator_ops stpmic1_switch_regul_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_over_current_protection = stpmic1_set_icc, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +#define REG_LDO(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 32, \ + .ops = &stpmic1_ldo_ops, \ + .linear_ranges = base ## _ranges, \ + .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = ids##_ACTIVE_CR, \ + .vsel_mask = LDO_VOLTAGE_MASK, \ + .enable_reg = ids##_ACTIVE_CR, \ + .enable_mask = LDO_ENABLE_MASK, \ + .enable_val = 1, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .ramp_delay = PMIC_RAMP_DELAY, \ + .supply_name = #base, \ +} + +#define REG_LDO3(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 32, \ + .ops = &stpmic1_ldo3_ops, \ + .linear_ranges = ldo3_ranges, \ + .n_linear_ranges = ARRAY_SIZE(ldo3_ranges), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = LDO3_ACTIVE_CR, \ + .vsel_mask = LDO_VOLTAGE_MASK, \ + .enable_reg = LDO3_ACTIVE_CR, \ + .enable_mask = LDO_ENABLE_MASK, \ + .enable_val = 1, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .ramp_delay = PMIC_RAMP_DELAY, \ + .bypass_reg = LDO3_ACTIVE_CR, \ + .bypass_mask = LDO_BYPASS_MASK, \ + .bypass_val_on = LDO_BYPASS_MASK, \ + .bypass_val_off = 0, \ + .supply_name = #base, \ +} + +#define REG_LDO4(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 1, \ + .ops = &stpmic1_ldo4_fixed_regul_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 3300000, \ + .fixed_uV = 3300000, \ + .enable_reg = LDO4_ACTIVE_CR, \ + .enable_mask = LDO_ENABLE_MASK, \ + .enable_val = 1, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .ramp_delay = PMIC_RAMP_DELAY, \ + .supply_name = #base, \ +} + +#define REG_BUCK(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .ops = &stpmic1_buck_ops, \ + .n_voltages = 64, \ + .linear_ranges = base ## _ranges, \ + .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = ids##_ACTIVE_CR, \ + .vsel_mask = BUCK_VOLTAGE_MASK, \ + .enable_reg = ids##_ACTIVE_CR, \ + .enable_mask = BUCK_ENABLE_MASK, \ + .enable_val = 1, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .ramp_delay = PMIC_RAMP_DELAY, \ + .of_map_mode = stpmic1_map_mode, \ + .pull_down_reg = ids##_PULL_DOWN_REG, \ + .pull_down_mask = ids##_PULL_DOWN_MASK, \ + .supply_name = #base, \ +} + +#define REG_VREF_DDR(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 1, \ + .ops = &stpmic1_vref_ddr_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 500000, \ + .fixed_uV = 500000, \ + .enable_reg = VREF_DDR_ACTIVE_CR, \ + .enable_mask = BUCK_ENABLE_MASK, \ + .enable_val = 1, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .supply_name = #base, \ +} + +#define REG_BOOST(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 1, \ + .ops = &stpmic1_boost_regul_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 0, \ + .fixed_uV = 5000000, \ + .enable_reg = BST_SW_CR, \ + .enable_mask = BOOST_ENABLED, \ + .enable_val = BOOST_ENABLED, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .supply_name = #base, \ +} + +#define REG_VBUS_OTG(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 1, \ + .ops = &stpmic1_switch_regul_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 0, \ + .fixed_uV = 5000000, \ + .enable_reg = BST_SW_CR, \ + .enable_mask = USBSW_OTG_SWITCH_ENABLED, \ + .enable_val = USBSW_OTG_SWITCH_ENABLED, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .supply_name = #base, \ + .active_discharge_reg = BST_SW_CR, \ + .active_discharge_mask = VBUS_OTG_DISCHARGE, \ + .active_discharge_on = VBUS_OTG_DISCHARGE, \ +} + +#define REG_SW_OUT(ids, base) { \ + .name = #ids, \ + .id = STPMIC1_##ids, \ + .n_voltages = 1, \ + .ops = &stpmic1_switch_regul_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = 0, \ + .fixed_uV = 5000000, \ + .enable_reg = BST_SW_CR, \ + .enable_mask = SWIN_SWOUT_ENABLED, \ + .enable_val = SWIN_SWOUT_ENABLED, \ + .disable_val = 0, \ + .enable_time = PMIC_ENABLE_TIME_US, \ + .supply_name = #base, \ + .active_discharge_reg = BST_SW_CR, \ + .active_discharge_mask = SW_OUT_DISCHARGE, \ + .active_discharge_on = SW_OUT_DISCHARGE, \ +} + +static const struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = { + [STPMIC1_BUCK1] = { + .desc = REG_BUCK(BUCK1, buck1), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(0), + .mask_reset_reg = BUCKS_MASK_RESET_CR, + .mask_reset_mask = BIT(0), + }, + [STPMIC1_BUCK2] = { + .desc = REG_BUCK(BUCK2, buck2), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(1), + .mask_reset_reg = BUCKS_MASK_RESET_CR, + .mask_reset_mask = BIT(1), + }, + [STPMIC1_BUCK3] = { + .desc = REG_BUCK(BUCK3, buck3), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(2), + .mask_reset_reg = BUCKS_MASK_RESET_CR, + .mask_reset_mask = BIT(2), + }, + [STPMIC1_BUCK4] = { + .desc = REG_BUCK(BUCK4, buck4), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(3), + .mask_reset_reg = BUCKS_MASK_RESET_CR, + .mask_reset_mask = BIT(3), + }, + [STPMIC1_LDO1] = { + .desc = REG_LDO(LDO1, ldo1), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(0), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(0), + }, + [STPMIC1_LDO2] = { + .desc = REG_LDO(LDO2, ldo2), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(1), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(1), + }, + [STPMIC1_LDO3] = { + .desc = REG_LDO3(LDO3, ldo3), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(2), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(2), + }, + [STPMIC1_LDO4] = { + .desc = REG_LDO4(LDO4, ldo4), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(3), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(3), + }, + [STPMIC1_LDO5] = { + .desc = REG_LDO(LDO5, ldo5), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(4), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(4), + }, + [STPMIC1_LDO6] = { + .desc = REG_LDO(LDO6, ldo6), + .icc_reg = LDOS_ICCTO_CR, + .icc_mask = BIT(5), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(5), + }, + [STPMIC1_VREF_DDR] = { + .desc = REG_VREF_DDR(VREF_DDR, vref_ddr), + .mask_reset_reg = LDOS_MASK_RESET_CR, + .mask_reset_mask = BIT(6), + }, + [STPMIC1_BOOST] = { + .desc = REG_BOOST(BOOST, boost), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(6), + }, + [STPMIC1_VBUS_OTG] = { + .desc = REG_VBUS_OTG(VBUS_OTG, pwr_sw1), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(4), + }, + [STPMIC1_SW_OUT] = { + .desc = REG_SW_OUT(SW_OUT, pwr_sw2), + .icc_reg = BUCKS_ICCTO_CR, + .icc_mask = BIT(5), + }, +}; + +static unsigned int stpmic1_map_mode(unsigned int mode) +{ + switch (mode) { + case STPMIC1_BUCK_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case STPMIC1_BUCK_MODE_LP: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +static unsigned int stpmic1_get_mode(struct regulator_dev *rdev) +{ + int value; + struct regmap *regmap = rdev_get_regmap(rdev); + + regmap_read(regmap, rdev->desc->enable_reg, &value); + + if (value & STPMIC1_BUCK_MODE_LP) + return REGULATOR_MODE_STANDBY; + + return REGULATOR_MODE_NORMAL; +} + +static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + int value; + struct regmap *regmap = rdev_get_regmap(rdev); + + switch (mode) { + case REGULATOR_MODE_NORMAL: + value = STPMIC1_BUCK_MODE_NORMAL; + break; + case REGULATOR_MODE_STANDBY: + value = STPMIC1_BUCK_MODE_LP; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, rdev->desc->enable_reg, + STPMIC1_BUCK_MODE_LP, value); +} + +static int stpmic1_set_icc(struct regulator_dev *rdev, int lim, int severity, + bool enable) +{ + struct stpmic1_regulator_cfg *cfg = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + + /* + * The code seems like one bit in a register controls whether OCP is + * enabled. So we might be able to turn it off here is if that + * was requested. I won't support this because I don't have the HW. + * Feel free to try and implement if you have the HW and need kernel + * to disable this. + * + * Also, I don't know if limit can be configured or if we support + * error/warning instead of protect. So I just keep existing logic + * and assume no. + */ + if (lim || severity != REGULATOR_SEVERITY_PROT || !enable) + return -EINVAL; + + /* enable switch off in case of over current */ + return regmap_update_bits(regmap, cfg->icc_reg, cfg->icc_mask, + cfg->icc_mask); +} + +static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data) +{ + struct regulator_dev *rdev = (struct regulator_dev *)data; + + /* Send an overcurrent notification */ + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_OVER_CURRENT, + NULL); + + return IRQ_HANDLED; +} + +#define MATCH(_name, _id) \ + [STPMIC1_##_id] = { \ + .name = #_name, \ + .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \ + } + +static struct of_regulator_match stpmic1_matches[] = { + MATCH(buck1, BUCK1), + MATCH(buck2, BUCK2), + MATCH(buck3, BUCK3), + MATCH(buck4, BUCK4), + MATCH(ldo1, LDO1), + MATCH(ldo2, LDO2), + MATCH(ldo3, LDO3), + MATCH(ldo4, LDO4), + MATCH(ldo5, LDO5), + MATCH(ldo6, LDO6), + MATCH(vref_ddr, VREF_DDR), + MATCH(boost, BOOST), + MATCH(pwr_sw1, VBUS_OTG), + MATCH(pwr_sw2, SW_OUT), +}; + +static int stpmic1_regulator_register(struct platform_device *pdev, int id, + struct of_regulator_match *match, + const struct stpmic1_regulator_cfg *cfg) +{ + struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent); + struct regulator_dev *rdev; + struct regulator_config config = {}; + int ret = 0; + int irq; + + config.dev = &pdev->dev; + config.init_data = match->init_data; + config.of_node = match->of_node; + config.regmap = pmic_dev->regmap; + config.driver_data = (void *)cfg; + + rdev = devm_regulator_register(&pdev->dev, &cfg->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s regulator\n", + cfg->desc.name); + return PTR_ERR(rdev); + } + + /* set mask reset */ + if (of_property_read_bool(config.of_node, "st,mask-reset") && + cfg->mask_reset_reg != 0) { + ret = regmap_update_bits(pmic_dev->regmap, + cfg->mask_reset_reg, + cfg->mask_reset_mask, + cfg->mask_reset_mask); + if (ret) { + dev_err(&pdev->dev, "set mask reset failed\n"); + return ret; + } + } + + /* setup an irq handler for over-current detection */ + irq = of_irq_get(config.of_node, 0); + if (irq > 0) { + ret = devm_request_threaded_irq(&pdev->dev, + irq, NULL, + stpmic1_curlim_irq_handler, + IRQF_ONESHOT | IRQF_SHARED, + pdev->name, rdev); + if (ret) { + dev_err(&pdev->dev, "Request IRQ failed\n"); + return ret; + } + } + return 0; +} + +static int stpmic1_regulator_probe(struct platform_device *pdev) +{ + int i, ret; + + ret = of_regulator_match(&pdev->dev, pdev->dev.of_node, stpmic1_matches, + ARRAY_SIZE(stpmic1_matches)); + if (ret < 0) { + dev_err(&pdev->dev, + "Error in PMIC regulator device tree node"); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) { + ret = stpmic1_regulator_register(pdev, i, &stpmic1_matches[i], + &stpmic1_regulator_cfgs[i]); + if (ret < 0) + return ret; + } + + dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n"); + + return 0; +} + +static const struct of_device_id of_pmic_regulator_match[] = { + { .compatible = "st,stpmic1-regulators" }, + { }, +}; + +MODULE_DEVICE_TABLE(of, of_pmic_regulator_match); + +static struct platform_driver stpmic1_regulator_driver = { + .driver = { + .name = "stpmic1-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(of_pmic_regulator_match), + }, + .probe = stpmic1_regulator_probe, +}; + +module_platform_driver(stpmic1_regulator_driver); + +MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver"); +MODULE_AUTHOR("Pascal Paillet "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/stw481x-vmmc.c b/drivers/regulator/stw481x-vmmc.c new file mode 100644 index 000000000..3958d906b --- /dev/null +++ b/drivers/regulator/stw481x-vmmc.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for STw4810/STw4811 VMMC regulator. + * + * Copyright (C) 2013 ST-Ericsson SA + * Written on behalf of Linaro for ST-Ericsson + * + * Author: Linus Walleij + */ + +#include +#include +#include +#include +#include +#include +#include + +static const unsigned int stw481x_vmmc_voltages[] = { + 1800000, + 1800000, + 2850000, + 3000000, + 1850000, + 2600000, + 2700000, + 3300000, +}; + +static const struct regulator_ops stw481x_vmmc_ops = { + .list_voltage = regulator_list_voltage_table, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc vmmc_regulator = { + .name = "VMMC", + .id = 0, + .ops = &stw481x_vmmc_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(stw481x_vmmc_voltages), + .volt_table = stw481x_vmmc_voltages, + .enable_time = 200, /* FIXME: look this up */ + .enable_reg = STW_CONF1, + .enable_mask = STW_CONF1_PDN_VMMC | STW_CONF1_MMC_LS_STATUS, + .enable_val = STW_CONF1_PDN_VMMC, + .vsel_reg = STW_CONF1, + .vsel_mask = STW_CONF1_VMMC_MASK, +}; + +static int stw481x_vmmc_regulator_probe(struct platform_device *pdev) +{ + struct stw481x *stw481x = dev_get_platdata(&pdev->dev); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int ret; + + /* First disable the external VMMC if it's active */ + ret = regmap_update_bits(stw481x->map, STW_CONF2, + STW_CONF2_VMMC_EXT, 0); + if (ret) { + dev_err(&pdev->dev, "could not disable external VMMC\n"); + return ret; + } + + /* Register VMMC regulator */ + config.dev = &pdev->dev; + config.driver_data = stw481x; + config.regmap = stw481x->map; + config.of_node = pdev->dev.of_node; + config.init_data = of_get_regulator_init_data(&pdev->dev, + pdev->dev.of_node, + &vmmc_regulator); + + rdev = devm_regulator_register(&pdev->dev, &vmmc_regulator, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "error initializing STw481x VMMC regulator\n"); + return PTR_ERR(rdev); + } + + dev_info(&pdev->dev, "initialized STw481x VMMC regulator\n"); + return 0; +} + +static const struct of_device_id stw481x_vmmc_match[] = { + { .compatible = "st,stw481x-vmmc", }, + {}, +}; + +static struct platform_driver stw481x_vmmc_regulator_driver = { + .driver = { + .name = "stw481x-vmmc-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = stw481x_vmmc_match, + }, + .probe = stw481x_vmmc_regulator_probe, +}; + +module_platform_driver(stw481x_vmmc_regulator_driver); diff --git a/drivers/regulator/sun20i-regulator.c b/drivers/regulator/sun20i-regulator.c new file mode 100644 index 000000000..e09be4485 --- /dev/null +++ b/drivers/regulator/sun20i-regulator.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (c) 2021-2022 Samuel Holland +// + +#include +#include +#include +#include +#include +#include +#include + +#define SUN20I_SYS_LDO_CTRL_REG 0x150 + +struct sun20i_regulator_data { + const struct regulator_desc *descs; + unsigned int ndescs; +}; + +/* regulator_list_voltage_linear() modified for the non-integral uV_step. */ +static int sun20i_d1_system_ldo_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct regulator_desc *desc = rdev->desc; + unsigned int fraction, uV; + + if (selector >= desc->n_voltages) + return -EINVAL; + + uV = desc->min_uV + (desc->uV_step * selector); + fraction = selector + (desc->min_uV % 4); + + if (uV > 1606667) + uV += 6667; + else + fraction++; + + /* Produce correctly-rounded absolute voltages. */ + return uV + (fraction / 3); +} + +static const struct regulator_ops sun20i_d1_system_ldo_ops = { + .list_voltage = sun20i_d1_system_ldo_list_voltage, + .map_voltage = regulator_map_voltage_ascend, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_desc sun20i_d1_system_ldo_descs[] = { + { + .name = "ldoa", + .supply_name = "ldo-in", + .of_match = "ldoa", + .ops = &sun20i_d1_system_ldo_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 32, + .min_uV = 1593333, + .uV_step = 13333, /* repeating */ + .vsel_reg = SUN20I_SYS_LDO_CTRL_REG, + .vsel_mask = GENMASK(7, 0), + }, + { + .name = "ldob", + .supply_name = "ldo-in", + .of_match = "ldob", + .ops = &sun20i_d1_system_ldo_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 64, + .min_uV = 1166666, + .uV_step = 13333, /* repeating */ + .vsel_reg = SUN20I_SYS_LDO_CTRL_REG, + .vsel_mask = GENMASK(15, 8), + }, +}; + +static const struct sun20i_regulator_data sun20i_d1_system_ldos = { + .descs = sun20i_d1_system_ldo_descs, + .ndescs = ARRAY_SIZE(sun20i_d1_system_ldo_descs), +}; + +static struct regmap *sun20i_regulator_get_regmap(struct device *dev) +{ + struct regmap *regmap; + + /* + * First try the syscon interface. The system control device is not + * compatible with "syscon", so fall back to getting the regmap from + * its platform device. This is ugly, but required for devicetree + * backward compatibility. + */ + regmap = syscon_node_to_regmap(dev->parent->of_node); + if (!IS_ERR(regmap)) + return regmap; + + regmap = dev_get_regmap(dev->parent, NULL); + if (regmap) + return regmap; + + return ERR_PTR(-EPROBE_DEFER); +} + +static int sun20i_regulator_probe(struct platform_device *pdev) +{ + const struct sun20i_regulator_data *data; + struct device *dev = &pdev->dev; + struct regulator_config config; + struct regmap *regmap; + + data = of_device_get_match_data(dev); + if (!data) + return -EINVAL; + + regmap = sun20i_regulator_get_regmap(dev); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to get regmap\n"); + + config = (struct regulator_config) { + .dev = dev, + .regmap = regmap, + }; + + for (unsigned int i = 0; i < data->ndescs; ++i) { + const struct regulator_desc *desc = &data->descs[i]; + struct regulator_dev *rdev; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct of_device_id sun20i_regulator_of_match[] = { + { + .compatible = "allwinner,sun20i-d1-system-ldos", + .data = &sun20i_d1_system_ldos, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, sun20i_regulator_of_match); + +static struct platform_driver sun20i_regulator_driver = { + .probe = sun20i_regulator_probe, + .driver = { + .name = "sun20i-regulator", + .of_match_table = sun20i_regulator_of_match, + }, +}; +module_platform_driver(sun20i_regulator_driver); + +MODULE_AUTHOR("Samuel Holland "); +MODULE_DESCRIPTION("Allwinner D1 internal LDO driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/sy7636a-regulator.c b/drivers/regulator/sy7636a-regulator.c new file mode 100644 index 000000000..c44c445ea --- /dev/null +++ b/drivers/regulator/sy7636a-regulator.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Functions to access SY3686A power management chip voltages +// +// Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/ +// +// Authors: Lars Ivar Miljeteig +// Alistair Francis + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct sy7636a_data { + struct regmap *regmap; + struct gpio_desc *pgood_gpio; + struct gpio_desc *en_gpio; + struct gpio_desc *vcom_en_gpio; +}; + +static int sy7636a_get_vcom_voltage_op(struct regulator_dev *rdev) +{ + int ret; + unsigned int val, val_h; + + ret = regmap_read(rdev->regmap, SY7636A_REG_VCOM_ADJUST_CTRL_L, &val); + if (ret) + return ret; + + ret = regmap_read(rdev->regmap, SY7636A_REG_VCOM_ADJUST_CTRL_H, &val_h); + if (ret) + return ret; + + val |= (val_h << VCOM_ADJUST_CTRL_SHIFT); + + return (val & VCOM_ADJUST_CTRL_MASK) * VCOM_ADJUST_CTRL_SCAL; +} + +static int sy7636a_get_status(struct regulator_dev *rdev) +{ + struct sy7636a_data *data = dev_get_drvdata(rdev->dev.parent); + int ret = 0; + + ret = gpiod_get_value_cansleep(data->pgood_gpio); + if (ret < 0) + dev_err(&rdev->dev, "Failed to read pgood gpio: %d\n", ret); + + return ret; +} + +static const struct regulator_ops sy7636a_vcom_volt_ops = { + .get_voltage = sy7636a_get_vcom_voltage_op, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_status = sy7636a_get_status, +}; + +static const struct regulator_desc desc = { + .name = "vcom", + .id = 0, + .ops = &sy7636a_vcom_volt_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = SY7636A_REG_OPERATION_MODE_CRL, + .enable_mask = SY7636A_OPERATION_MODE_CRL_ONOFF, + .regulators_node = of_match_ptr("regulators"), + .of_match = of_match_ptr("vcom"), +}; + +static int sy7636a_regulator_probe(struct platform_device *pdev) +{ + struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL); + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct gpio_desc *gdp; + struct sy7636a_data *data; + int ret; + + if (!regmap) + return -EPROBE_DEFER; + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + gdp = devm_gpiod_get(&pdev->dev, "epd-pwr-good", GPIOD_IN); + if (IS_ERR(gdp)) { + dev_err(&pdev->dev, "Power good GPIO fault %ld\n", PTR_ERR(gdp)); + return PTR_ERR(gdp); + } + + data = devm_kzalloc(&pdev->dev, sizeof(struct sy7636a_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = regmap; + data->pgood_gpio = gdp; + + ret = devm_regulator_get_enable_optional(&pdev->dev, "vin"); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to get vin regulator\n"); + + data->en_gpio = devm_gpiod_get_optional(&pdev->dev, "enable", + GPIOD_OUT_HIGH); + if (IS_ERR(data->en_gpio)) + return dev_err_probe(&pdev->dev, + PTR_ERR(data->en_gpio), + "failed to get en gpio\n"); + + /* Let VCOM just follow the default power on sequence */ + data->vcom_en_gpio = devm_gpiod_get_optional(&pdev->dev, + "vcom-en", GPIOD_OUT_LOW); + if (IS_ERR(data->vcom_en_gpio)) + return dev_err_probe(&pdev->dev, + PTR_ERR(data->vcom_en_gpio), + "failed to get vcom-en gpio\n"); + + /* if chip was not enabled, give it time to wake up */ + if (data->en_gpio) + usleep_range(2500, 4000); + + platform_set_drvdata(pdev, data); + + ret = regmap_write(regmap, SY7636A_REG_POWER_ON_DELAY_TIME, 0x0); + if (ret) { + dev_err(pdev->dev.parent, "Failed to initialize regulator: %d\n", ret); + return ret; + } + + config.dev = &pdev->dev; + config.regmap = regmap; + + rdev = devm_regulator_register(&pdev->dev, &desc, &config); + if (IS_ERR(rdev)) { + dev_err(pdev->dev.parent, "Failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct platform_device_id sy7636a_regulator_id_table[] = { + { .name = "sy7636a-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, sy7636a_regulator_id_table); + +static struct platform_driver sy7636a_regulator_driver = { + .driver = { + .name = "sy7636a-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = sy7636a_regulator_probe, + .id_table = sy7636a_regulator_id_table, +}; +module_platform_driver(sy7636a_regulator_driver); + +MODULE_AUTHOR("Lars Ivar Miljeteig "); +MODULE_DESCRIPTION("SY7636A voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/sy8106a-regulator.c b/drivers/regulator/sy8106a-regulator.c new file mode 100644 index 000000000..b2b835c60 --- /dev/null +++ b/drivers/regulator/sy8106a-regulator.c @@ -0,0 +1,153 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// sy8106a-regulator.c - Regulator device driver for SY8106A +// +// Copyright (C) 2016 OndÅ™ej Jirman +// Copyright (c) 2017-2018 Icenowy Zheng + +#include +#include +#include +#include +#include +#include + +#define SY8106A_REG_VOUT1_SEL 0x01 +#define SY8106A_REG_VOUT_COM 0x02 +#define SY8106A_REG_VOUT1_SEL_MASK 0x7f +#define SY8106A_DISABLE_REG BIT(0) +/* + * The I2C controlled voltage will only work when this bit is set; otherwise + * it will behave like a fixed regulator. + */ +#define SY8106A_GO_BIT BIT(7) + +static const struct regmap_config sy8106a_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct regulator_ops sy8106a_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + /* Enabling/disabling the regulator is not yet implemented */ +}; + +/* Default limits measured in millivolts */ +#define SY8106A_MIN_MV 680 +#define SY8106A_MAX_MV 1950 +#define SY8106A_STEP_MV 10 + +static const struct regulator_desc sy8106a_reg = { + .name = "SY8106A", + .id = 0, + .ops = &sy8106a_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = ((SY8106A_MAX_MV - SY8106A_MIN_MV) / SY8106A_STEP_MV) + 1, + .min_uV = (SY8106A_MIN_MV * 1000), + .uV_step = (SY8106A_STEP_MV * 1000), + .vsel_reg = SY8106A_REG_VOUT1_SEL, + .vsel_mask = SY8106A_REG_VOUT1_SEL_MASK, + /* + * This ramp_delay is a conservative default value which works on + * H3/H5 boards VDD-CPUX situations. + */ + .ramp_delay = 200, + .owner = THIS_MODULE, +}; + +/* + * I2C driver interface functions + */ +static int sy8106a_i2c_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regulator_dev *rdev; + struct regulator_config config = { }; + struct regmap *regmap; + unsigned int reg, vsel; + u32 fixed_voltage; + int error; + + error = of_property_read_u32(dev->of_node, "silergy,fixed-microvolt", + &fixed_voltage); + if (error) + return error; + + if (fixed_voltage < SY8106A_MIN_MV * 1000 || + fixed_voltage > SY8106A_MAX_MV * 1000) + return -EINVAL; + + regmap = devm_regmap_init_i2c(i2c, &sy8106a_regmap_config); + if (IS_ERR(regmap)) { + error = PTR_ERR(regmap); + dev_err(dev, "Failed to allocate register map: %d\n", error); + return error; + } + + config.dev = &i2c->dev; + config.regmap = regmap; + + config.of_node = dev->of_node; + config.init_data = of_get_regulator_init_data(dev, dev->of_node, + &sy8106a_reg); + + if (!config.init_data) + return -ENOMEM; + + /* Ensure GO_BIT is enabled when probing */ + error = regmap_read(regmap, SY8106A_REG_VOUT1_SEL, ®); + if (error) + return error; + + if (!(reg & SY8106A_GO_BIT)) { + vsel = (fixed_voltage / 1000 - SY8106A_MIN_MV) / + SY8106A_STEP_MV; + + error = regmap_write(regmap, SY8106A_REG_VOUT1_SEL, + vsel | SY8106A_GO_BIT); + if (error) + return error; + } + + /* Probe regulator */ + rdev = devm_regulator_register(&i2c->dev, &sy8106a_reg, &config); + if (IS_ERR(rdev)) { + error = PTR_ERR(rdev); + dev_err(&i2c->dev, "Failed to register SY8106A regulator: %d\n", error); + return error; + } + + return 0; +} + +static const struct of_device_id sy8106a_i2c_of_match[] = { + { .compatible = "silergy,sy8106a" }, + { }, +}; +MODULE_DEVICE_TABLE(of, sy8106a_i2c_of_match); + +static const struct i2c_device_id sy8106a_i2c_id[] = { + { .name = "sy8106a" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sy8106a_i2c_id); + +static struct i2c_driver sy8106a_regulator_driver = { + .driver = { + .name = "sy8106a", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = sy8106a_i2c_of_match, + }, + .probe = sy8106a_i2c_probe, + .id_table = sy8106a_i2c_id, +}; + +module_i2c_driver(sy8106a_regulator_driver); + +MODULE_AUTHOR("OndÅ™ej Jirman "); +MODULE_AUTHOR("Icenowy Zheng "); +MODULE_DESCRIPTION("Regulator device driver for Silergy SY8106A"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/sy8824x.c b/drivers/regulator/sy8824x.c new file mode 100644 index 000000000..3f07e7da9 --- /dev/null +++ b/drivers/regulator/sy8824x.c @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// SY8824C/SY8824E regulator driver +// +// Copyright (C) 2019 Synaptics Incorporated +// +// Author: Jisheng Zhang + +#include +#include +#include +#include +#include +#include + +#define SY8824C_BUCK_EN (1 << 7) +#define SY8824C_MODE (1 << 6) + +struct sy8824_config { + /* registers */ + unsigned int vol_reg; + unsigned int mode_reg; + unsigned int enable_reg; + /* Voltage range and step(linear) */ + unsigned int vsel_min; + unsigned int vsel_step; + unsigned int vsel_count; + const struct regmap_config *config; +}; + +struct sy8824_device_info { + struct device *dev; + struct regulator_desc desc; + struct regulator_init_data *regulator; + const struct sy8824_config *cfg; +}; + +static int sy8824_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct sy8824_device_info *di = rdev_get_drvdata(rdev); + const struct sy8824_config *cfg = di->cfg; + + switch (mode) { + case REGULATOR_MODE_FAST: + regmap_update_bits(rdev->regmap, cfg->mode_reg, + SY8824C_MODE, SY8824C_MODE); + break; + case REGULATOR_MODE_NORMAL: + regmap_update_bits(rdev->regmap, cfg->mode_reg, + SY8824C_MODE, 0); + break; + default: + return -EINVAL; + } + return 0; +} + +static unsigned int sy8824_get_mode(struct regulator_dev *rdev) +{ + struct sy8824_device_info *di = rdev_get_drvdata(rdev); + const struct sy8824_config *cfg = di->cfg; + u32 val; + int ret = 0; + + ret = regmap_read(rdev->regmap, cfg->mode_reg, &val); + if (ret < 0) + return ret; + if (val & SY8824C_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops sy8824_regulator_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = sy8824_set_mode, + .get_mode = sy8824_get_mode, +}; + +static int sy8824_regulator_register(struct sy8824_device_info *di, + struct regulator_config *config) +{ + struct regulator_desc *rdesc = &di->desc; + const struct sy8824_config *cfg = di->cfg; + struct regulator_dev *rdev; + + rdesc->name = "sy8824-reg"; + rdesc->supply_name = "vin"; + rdesc->ops = &sy8824_regulator_ops; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->n_voltages = cfg->vsel_count; + rdesc->enable_reg = cfg->enable_reg; + rdesc->enable_mask = SY8824C_BUCK_EN; + rdesc->min_uV = cfg->vsel_min; + rdesc->uV_step = cfg->vsel_step; + rdesc->vsel_reg = cfg->vol_reg; + rdesc->vsel_mask = cfg->vsel_count - 1; + rdesc->owner = THIS_MODULE; + + rdev = devm_regulator_register(di->dev, &di->desc, config); + return PTR_ERR_OR_ZERO(rdev); +} + +static const struct regmap_config sy8824_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .num_reg_defaults_raw = 1, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config sy20276_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .num_reg_defaults_raw = 2, + .cache_type = REGCACHE_FLAT, +}; + +static int sy8824_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct sy8824_device_info *di; + struct regulator_config config = { }; + struct regmap *regmap; + int ret; + + di = devm_kzalloc(dev, sizeof(struct sy8824_device_info), GFP_KERNEL); + if (!di) + return -ENOMEM; + + di->regulator = of_get_regulator_init_data(dev, np, &di->desc); + if (!di->regulator) { + dev_err(dev, "Platform data not found!\n"); + return -EINVAL; + } + + di->dev = dev; + di->cfg = i2c_get_match_data(client); + + regmap = devm_regmap_init_i2c(client, di->cfg->config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + i2c_set_clientdata(client, di); + + config.dev = di->dev; + config.init_data = di->regulator; + config.regmap = regmap; + config.driver_data = di; + config.of_node = np; + + ret = sy8824_regulator_register(di, &config); + if (ret < 0) + dev_err(dev, "Failed to register regulator!\n"); + return ret; +} + +static const struct sy8824_config sy8824c_cfg = { + .vol_reg = 0x00, + .mode_reg = 0x00, + .enable_reg = 0x00, + .vsel_min = 762500, + .vsel_step = 12500, + .vsel_count = 64, + .config = &sy8824_regmap_config, +}; + +static const struct sy8824_config sy8824e_cfg = { + .vol_reg = 0x00, + .mode_reg = 0x00, + .enable_reg = 0x00, + .vsel_min = 700000, + .vsel_step = 12500, + .vsel_count = 64, + .config = &sy8824_regmap_config, +}; + +static const struct sy8824_config sy20276_cfg = { + .vol_reg = 0x00, + .mode_reg = 0x01, + .enable_reg = 0x01, + .vsel_min = 600000, + .vsel_step = 10000, + .vsel_count = 128, + .config = &sy20276_regmap_config, +}; + +static const struct sy8824_config sy20278_cfg = { + .vol_reg = 0x00, + .mode_reg = 0x01, + .enable_reg = 0x01, + .vsel_min = 762500, + .vsel_step = 12500, + .vsel_count = 64, + .config = &sy20276_regmap_config, +}; + +static const struct of_device_id sy8824_dt_ids[] = { + { .compatible = "silergy,sy8824c", .data = &sy8824c_cfg }, + { .compatible = "silergy,sy8824e", .data = &sy8824e_cfg }, + { .compatible = "silergy,sy20276", .data = &sy20276_cfg }, + { .compatible = "silergy,sy20278", .data = &sy20278_cfg }, + { } +}; +MODULE_DEVICE_TABLE(of, sy8824_dt_ids); + +static const struct i2c_device_id sy8824_id[] = { + { .name = "sy8824c", .driver_data = (kernel_ulong_t)&sy8824c_cfg }, + { .name = "sy8824e", .driver_data = (kernel_ulong_t)&sy8824e_cfg }, + { .name = "sy20276", .driver_data = (kernel_ulong_t)&sy20276_cfg }, + { .name = "sy20278", .driver_data = (kernel_ulong_t)&sy20278_cfg }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sy8824_id); + +static struct i2c_driver sy8824_regulator_driver = { + .driver = { + .name = "sy8824-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = sy8824_dt_ids, + }, + .probe = sy8824_i2c_probe, + .id_table = sy8824_id, +}; +module_i2c_driver(sy8824_regulator_driver); + +MODULE_AUTHOR("Jisheng Zhang "); +MODULE_DESCRIPTION("SY8824C/SY8824E regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/sy8827n.c b/drivers/regulator/sy8827n.c new file mode 100644 index 000000000..a1cac8cc3 --- /dev/null +++ b/drivers/regulator/sy8827n.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// SY8827N regulator driver +// +// Copyright (C) 2020 Synaptics Incorporated +// +// Author: Jisheng Zhang + +#include +#include +#include +#include +#include +#include +#include + +#define SY8827N_VSEL0 0 +#define SY8827N_BUCK_EN (1 << 7) +#define SY8827N_MODE (1 << 6) +#define SY8827N_VSEL1 1 +#define SY8827N_CTRL 2 +#define SY8827N_ID1 3 +#define SY8827N_ID2 4 +#define SY8827N_PGOOD 5 +#define SY8827N_MAX (SY8827N_PGOOD + 1) + +#define SY8827N_NVOLTAGES 64 +#define SY8827N_VSELMIN 600000 +#define SY8827N_VSELSTEP 12500 + +struct sy8827n_device_info { + struct device *dev; + struct regulator_desc desc; + struct regulator_init_data *regulator; + struct gpio_desc *en_gpio; + unsigned int vsel_reg; +}; + +static int sy8827n_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct sy8827n_device_info *di = rdev_get_drvdata(rdev); + + switch (mode) { + case REGULATOR_MODE_FAST: + regmap_update_bits(rdev->regmap, di->vsel_reg, + SY8827N_MODE, SY8827N_MODE); + break; + case REGULATOR_MODE_NORMAL: + regmap_update_bits(rdev->regmap, di->vsel_reg, + SY8827N_MODE, 0); + break; + default: + return -EINVAL; + } + return 0; +} + +static unsigned int sy8827n_get_mode(struct regulator_dev *rdev) +{ + struct sy8827n_device_info *di = rdev_get_drvdata(rdev); + u32 val; + int ret = 0; + + ret = regmap_read(rdev->regmap, di->vsel_reg, &val); + if (ret < 0) + return ret; + if (val & SY8827N_MODE) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops sy8827n_regulator_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .map_voltage = regulator_map_voltage_linear, + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = sy8827n_set_mode, + .get_mode = sy8827n_get_mode, +}; + +static int sy8827n_regulator_register(struct sy8827n_device_info *di, + struct regulator_config *config) +{ + struct regulator_desc *rdesc = &di->desc; + struct regulator_dev *rdev; + + rdesc->name = "sy8827n-reg"; + rdesc->supply_name = "vin"; + rdesc->ops = &sy8827n_regulator_ops; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->n_voltages = SY8827N_NVOLTAGES; + rdesc->enable_reg = di->vsel_reg; + rdesc->enable_mask = SY8827N_BUCK_EN; + rdesc->min_uV = SY8827N_VSELMIN; + rdesc->uV_step = SY8827N_VSELSTEP; + rdesc->vsel_reg = di->vsel_reg; + rdesc->vsel_mask = rdesc->n_voltages - 1; + rdesc->owner = THIS_MODULE; + + rdev = devm_regulator_register(di->dev, &di->desc, config); + return PTR_ERR_OR_ZERO(rdev); +} + +static bool sy8827n_volatile_reg(struct device *dev, unsigned int reg) +{ + if (reg == SY8827N_PGOOD) + return true; + return false; +} + +static const struct regmap_config sy8827n_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_reg = sy8827n_volatile_reg, + .num_reg_defaults_raw = SY8827N_MAX, + .cache_type = REGCACHE_FLAT, +}; + +static int sy8827n_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct sy8827n_device_info *di; + struct regulator_config config = { }; + struct regmap *regmap; + int ret; + + di = devm_kzalloc(dev, sizeof(struct sy8827n_device_info), GFP_KERNEL); + if (!di) + return -ENOMEM; + + di->regulator = of_get_regulator_init_data(dev, np, &di->desc); + if (!di->regulator) { + dev_err(dev, "Platform data not found!\n"); + return -EINVAL; + } + + di->en_gpio = devm_gpiod_get_optional(dev, "enable", + GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(di->en_gpio)) + return PTR_ERR(di->en_gpio); + + if (of_property_read_bool(np, "silergy,vsel-state-high")) + di->vsel_reg = SY8827N_VSEL1; + else + di->vsel_reg = SY8827N_VSEL0; + + di->dev = dev; + + regmap = devm_regmap_init_i2c(client, &sy8827n_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "Failed to allocate regmap!\n"); + return PTR_ERR(regmap); + } + i2c_set_clientdata(client, di); + + config.dev = di->dev; + config.init_data = di->regulator; + config.regmap = regmap; + config.driver_data = di; + config.of_node = np; + + ret = sy8827n_regulator_register(di, &config); + if (ret < 0) + dev_err(dev, "Failed to register regulator!\n"); + return ret; +} + +static const struct of_device_id sy8827n_dt_ids[] = { + { + .compatible = "silergy,sy8827n", + }, + { } +}; +MODULE_DEVICE_TABLE(of, sy8827n_dt_ids); + +static const struct i2c_device_id sy8827n_id[] = { + { .name = "sy8827n" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sy8827n_id); + +static struct i2c_driver sy8827n_regulator_driver = { + .driver = { + .name = "sy8827n-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = sy8827n_dt_ids, + }, + .probe = sy8827n_i2c_probe, + .id_table = sy8827n_id, +}; +module_i2c_driver(sy8827n_regulator_driver); + +MODULE_AUTHOR("Jisheng Zhang "); +MODULE_DESCRIPTION("SY8827N regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/ti-abb-regulator.c b/drivers/regulator/ti-abb-regulator.c new file mode 100644 index 000000000..04133510e --- /dev/null +++ b/drivers/regulator/ti-abb-regulator.c @@ -0,0 +1,884 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Texas Instruments SoC Adaptive Body Bias(ABB) Regulator + * + * Copyright (C) 2011 Texas Instruments, Inc. + * Mike Turquette + * + * Copyright (C) 2012-2013 Texas Instruments, Inc. + * Andrii Tseglytskyi + * Nishanth Menon + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * ABB LDO operating states: + * NOMINAL_OPP: bypasses the ABB LDO + * FAST_OPP: sets ABB LDO to Forward Body-Bias + * SLOW_OPP: sets ABB LDO to Reverse Body-Bias + */ +#define TI_ABB_NOMINAL_OPP 0 +#define TI_ABB_FAST_OPP 1 +#define TI_ABB_SLOW_OPP 3 + +/** + * struct ti_abb_info - ABB information per voltage setting + * @opp_sel: one of TI_ABB macro + * @vset: (optional) vset value that LDOVBB needs to be overridden with. + * + * Array of per voltage entries organized in the same order as regulator_desc's + * volt_table list. (selector is used to index from this array) + */ +struct ti_abb_info { + u32 opp_sel; + u32 vset; +}; + +/** + * struct ti_abb_reg - Register description for ABB block + * @setup_off: setup register offset from base + * @control_off: control register offset from base + * @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask + * @fbb_sel_mask: setup register- FBB sel mask + * @rbb_sel_mask: setup register- RBB sel mask + * @sr2_en_mask: setup register- enable mask + * @opp_change_mask: control register - mask to trigger LDOVBB change + * @opp_sel_mask: control register - mask for mode to operate + */ +struct ti_abb_reg { + u32 setup_off; + u32 control_off; + + /* Setup register fields */ + u32 sr2_wtcnt_value_mask; + u32 fbb_sel_mask; + u32 rbb_sel_mask; + u32 sr2_en_mask; + + /* Control register fields */ + u32 opp_change_mask; + u32 opp_sel_mask; +}; + +/** + * struct ti_abb - ABB instance data + * @rdesc: regulator descriptor + * @clk: clock(usually sysclk) supplying ABB block + * @base: base address of ABB block + * @setup_reg: setup register of ABB block + * @control_reg: control register of ABB block + * @int_base: interrupt register base address + * @efuse_base: (optional) efuse base address for ABB modes + * @ldo_base: (optional) LDOVBB vset override base address + * @regs: pointer to struct ti_abb_reg for ABB block + * @txdone_mask: mask on int_base for tranxdone interrupt + * @ldovbb_override_mask: mask to ldo_base for overriding default LDO VBB + * vset with value from efuse + * @ldovbb_vset_mask: mask to ldo_base for providing the VSET override + * @info: array to per voltage ABB configuration + * @current_info_idx: current index to info + * @settling_time: SoC specific settling time for LDO VBB + */ +struct ti_abb { + struct regulator_desc rdesc; + struct clk *clk; + void __iomem *base; + void __iomem *setup_reg; + void __iomem *control_reg; + void __iomem *int_base; + void __iomem *efuse_base; + void __iomem *ldo_base; + + const struct ti_abb_reg *regs; + u32 txdone_mask; + u32 ldovbb_override_mask; + u32 ldovbb_vset_mask; + + struct ti_abb_info *info; + int current_info_idx; + + u32 settling_time; +}; + +/** + * ti_abb_rmw() - handy wrapper to set specific register bits + * @mask: mask for register field + * @value: value shifted to mask location and written + * @reg: register address + * + * Return: final register value (may be unused) + */ +static inline u32 ti_abb_rmw(u32 mask, u32 value, void __iomem *reg) +{ + u32 val; + + val = readl(reg); + val &= ~mask; + val |= (value << __ffs(mask)) & mask; + writel(val, reg); + + return val; +} + +/** + * ti_abb_check_txdone() - handy wrapper to check ABB tranxdone status + * @abb: pointer to the abb instance + * + * Return: true or false + */ +static inline bool ti_abb_check_txdone(const struct ti_abb *abb) +{ + return !!(readl(abb->int_base) & abb->txdone_mask); +} + +/** + * ti_abb_clear_txdone() - handy wrapper to clear ABB tranxdone status + * @abb: pointer to the abb instance + */ +static inline void ti_abb_clear_txdone(const struct ti_abb *abb) +{ + writel(abb->txdone_mask, abb->int_base); +}; + +/** + * ti_abb_wait_txdone() - waits for ABB tranxdone event + * @dev: device + * @abb: pointer to the abb instance + * + * Return: 0 on success or -ETIMEDOUT if the event is not cleared on time. + */ +static int ti_abb_wait_txdone(struct device *dev, struct ti_abb *abb) +{ + int timeout = 0; + bool status; + + while (timeout++ <= abb->settling_time) { + status = ti_abb_check_txdone(abb); + if (status) + return 0; + + udelay(1); + } + + dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n", + __func__, timeout, readl(abb->int_base)); + return -ETIMEDOUT; +} + +/** + * ti_abb_clear_all_txdone() - clears ABB tranxdone event + * @dev: device + * @abb: pointer to the abb instance + * + * Return: 0 on success or -ETIMEDOUT if the event is not cleared on time. + */ +static int ti_abb_clear_all_txdone(struct device *dev, const struct ti_abb *abb) +{ + int timeout = 0; + bool status; + + while (timeout++ <= abb->settling_time) { + ti_abb_clear_txdone(abb); + + status = ti_abb_check_txdone(abb); + if (!status) + return 0; + + udelay(1); + } + + dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n", + __func__, timeout, readl(abb->int_base)); + return -ETIMEDOUT; +} + +/** + * ti_abb_program_ldovbb() - program LDOVBB register for override value + * @dev: device + * @abb: pointer to the abb instance + * @info: ABB info to program + */ +static void ti_abb_program_ldovbb(struct device *dev, const struct ti_abb *abb, + struct ti_abb_info *info) +{ + u32 val; + + val = readl(abb->ldo_base); + /* clear up previous values */ + val &= ~(abb->ldovbb_override_mask | abb->ldovbb_vset_mask); + + switch (info->opp_sel) { + case TI_ABB_SLOW_OPP: + case TI_ABB_FAST_OPP: + val |= abb->ldovbb_override_mask; + val |= info->vset << __ffs(abb->ldovbb_vset_mask); + break; + } + + writel(val, abb->ldo_base); +} + +/** + * ti_abb_set_opp() - Setup ABB and LDO VBB for required bias + * @rdev: regulator device + * @abb: pointer to the abb instance + * @info: ABB info to program + * + * Return: 0 on success or appropriate error value when fails + */ +static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb, + struct ti_abb_info *info) +{ + const struct ti_abb_reg *regs = abb->regs; + struct device *dev = &rdev->dev; + int ret; + + ret = ti_abb_clear_all_txdone(dev, abb); + if (ret) + goto out; + + ti_abb_rmw(regs->fbb_sel_mask | regs->rbb_sel_mask, 0, abb->setup_reg); + + switch (info->opp_sel) { + case TI_ABB_SLOW_OPP: + ti_abb_rmw(regs->rbb_sel_mask, 1, abb->setup_reg); + break; + case TI_ABB_FAST_OPP: + ti_abb_rmw(regs->fbb_sel_mask, 1, abb->setup_reg); + break; + } + + /* program next state of ABB ldo */ + ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, abb->control_reg); + + /* + * program LDO VBB vset override if needed for !bypass mode + * XXX: Do not switch sequence - for !bypass, LDO override reset *must* + * be performed *before* switch to bias mode else VBB glitches. + */ + if (abb->ldo_base && info->opp_sel != TI_ABB_NOMINAL_OPP) + ti_abb_program_ldovbb(dev, abb, info); + + /* Initiate ABB ldo change */ + ti_abb_rmw(regs->opp_change_mask, 1, abb->control_reg); + + /* Wait for ABB LDO to complete transition to new Bias setting */ + ret = ti_abb_wait_txdone(dev, abb); + if (ret) + goto out; + + ret = ti_abb_clear_all_txdone(dev, abb); + if (ret) + goto out; + + /* + * Reset LDO VBB vset override bypass mode + * XXX: Do not switch sequence - for bypass, LDO override reset *must* + * be performed *after* switch to bypass else VBB glitches. + */ + if (abb->ldo_base && info->opp_sel == TI_ABB_NOMINAL_OPP) + ti_abb_program_ldovbb(dev, abb, info); + +out: + return ret; +} + +/** + * ti_abb_set_voltage_sel() - regulator accessor function to set ABB LDO + * @rdev: regulator device + * @sel: selector to index into required ABB LDO settings (maps to + * regulator descriptor's volt_table) + * + * Return: 0 on success or appropriate error value when fails + */ +static int ti_abb_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + const struct regulator_desc *desc = rdev->desc; + struct ti_abb *abb = rdev_get_drvdata(rdev); + struct device *dev = &rdev->dev; + struct ti_abb_info *info, *oinfo; + int ret = 0; + + if (!abb) { + dev_err_ratelimited(dev, "%s: No regulator drvdata\n", + __func__); + return -ENODEV; + } + + if (!desc->n_voltages || !abb->info) { + dev_err_ratelimited(dev, + "%s: No valid voltage table entries?\n", + __func__); + return -EINVAL; + } + + if (sel >= desc->n_voltages) { + dev_err(dev, "%s: sel idx(%d) >= n_voltages(%d)\n", __func__, + sel, desc->n_voltages); + return -EINVAL; + } + + /* If we are in the same index as we were, nothing to do here! */ + if (sel == abb->current_info_idx) { + dev_dbg(dev, "%s: Already at sel=%d\n", __func__, sel); + return ret; + } + + info = &abb->info[sel]; + /* + * When Linux kernel is starting up, we aren't sure of the + * Bias configuration that bootloader has configured. + * So, we get to know the actual setting the first time + * we are asked to transition. + */ + if (abb->current_info_idx == -EINVAL) + goto just_set_abb; + + /* If data is exactly the same, then just update index, no change */ + oinfo = &abb->info[abb->current_info_idx]; + if (!memcmp(info, oinfo, sizeof(*info))) { + dev_dbg(dev, "%s: Same data new idx=%d, old idx=%d\n", __func__, + sel, abb->current_info_idx); + goto out; + } + +just_set_abb: + ret = ti_abb_set_opp(rdev, abb, info); + +out: + if (!ret) + abb->current_info_idx = sel; + else + dev_err_ratelimited(dev, + "%s: Volt[%d] idx[%d] mode[%d] Fail(%d)\n", + __func__, desc->volt_table[sel], sel, + info->opp_sel, ret); + return ret; +} + +/** + * ti_abb_get_voltage_sel() - Regulator accessor to get current ABB LDO setting + * @rdev: regulator device + * + * Return: 0 on success or appropriate error value when fails + */ +static int ti_abb_get_voltage_sel(struct regulator_dev *rdev) +{ + const struct regulator_desc *desc = rdev->desc; + struct ti_abb *abb = rdev_get_drvdata(rdev); + struct device *dev = &rdev->dev; + + if (!abb) { + dev_err_ratelimited(dev, "%s: No regulator drvdata\n", + __func__); + return -ENODEV; + } + + if (!desc->n_voltages || !abb->info) { + dev_err_ratelimited(dev, + "%s: No valid voltage table entries?\n", + __func__); + return -EINVAL; + } + + if (abb->current_info_idx >= (int)desc->n_voltages) { + dev_err(dev, "%s: Corrupted data? idx(%d) >= n_voltages(%d)\n", + __func__, abb->current_info_idx, desc->n_voltages); + return -EINVAL; + } + + return abb->current_info_idx; +} + +/** + * ti_abb_init_timings() - setup ABB clock timing for the current platform + * @dev: device + * @abb: pointer to the abb instance + * + * Return: 0 if timing is updated, else returns error result. + */ +static int ti_abb_init_timings(struct device *dev, struct ti_abb *abb) +{ + u32 clock_cycles; + u32 clk_rate, sr2_wt_cnt_val, cycle_rate; + const struct ti_abb_reg *regs = abb->regs; + int ret; + char *pname = "ti,settling-time"; + + /* read device tree properties */ + ret = of_property_read_u32(dev->of_node, pname, &abb->settling_time); + if (ret) { + dev_err(dev, "Unable to get property '%s'(%d)\n", pname, ret); + return ret; + } + + /* ABB LDO cannot be settle in 0 time */ + if (!abb->settling_time) { + dev_err(dev, "Invalid property:'%s' set as 0!\n", pname); + return -EINVAL; + } + + pname = "ti,clock-cycles"; + ret = of_property_read_u32(dev->of_node, pname, &clock_cycles); + if (ret) { + dev_err(dev, "Unable to get property '%s'(%d)\n", pname, ret); + return ret; + } + /* ABB LDO cannot be settle in 0 clock cycles */ + if (!clock_cycles) { + dev_err(dev, "Invalid property:'%s' set as 0!\n", pname); + return -EINVAL; + } + + abb->clk = devm_clk_get(dev, NULL); + if (IS_ERR(abb->clk)) { + ret = PTR_ERR(abb->clk); + dev_err(dev, "%s: Unable to get clk(%d)\n", __func__, ret); + return ret; + } + + /* + * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a + * transition and must be programmed with the correct time at boot. + * The value programmed into the register is the number of SYS_CLK + * clock cycles that match a given wall time profiled for the ldo. + * This value depends on: + * settling time of ldo in micro-seconds (varies per OMAP family) + * # of clock cycles per SYS_CLK period (varies per OMAP family) + * the SYS_CLK frequency in MHz (varies per board) + * The formula is: + * + * ldo settling time (in micro-seconds) + * SR2_WTCNT_VALUE = ------------------------------------------ + * (# system clock cycles) * (sys_clk period) + * + * Put another way: + * + * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate)) + * + * To avoid dividing by zero multiply both "# clock cycles" and + * "settling time" by 10 such that the final result is the one we want. + */ + + /* Convert SYS_CLK rate to MHz & prevent divide by zero */ + clk_rate = DIV_ROUND_CLOSEST(clk_get_rate(abb->clk), 1000000); + + /* Calculate cycle rate */ + cycle_rate = DIV_ROUND_CLOSEST(clock_cycles * 10, clk_rate); + + /* Calculate SR2_WTCNT_VALUE */ + sr2_wt_cnt_val = DIV_ROUND_CLOSEST(abb->settling_time * 10, cycle_rate); + + dev_dbg(dev, "%s: Clk_rate=%ld, sr2_cnt=0x%08x\n", __func__, + clk_get_rate(abb->clk), sr2_wt_cnt_val); + + ti_abb_rmw(regs->sr2_wtcnt_value_mask, sr2_wt_cnt_val, abb->setup_reg); + + return 0; +} + +/** + * ti_abb_init_table() - Initialize ABB table from device tree + * @dev: device + * @abb: pointer to the abb instance + * @rinit_data: regulator initdata + * + * Return: 0 on success or appropriate error value when fails + */ +static int ti_abb_init_table(struct device *dev, struct ti_abb *abb, + struct regulator_init_data *rinit_data) +{ + struct ti_abb_info *info; + const u32 num_values = 6; + char *pname = "ti,abb_info"; + u32 i; + unsigned int *volt_table; + int num_entries, min_uV = INT_MAX, max_uV = 0; + struct regulation_constraints *c = &rinit_data->constraints; + + /* + * Each abb_info is a set of n-tuple, where n is num_values, consisting + * of voltage and a set of detection logic for ABB information for that + * voltage to apply. + */ + num_entries = of_property_count_u32_elems(dev->of_node, pname); + if (num_entries < 0) { + dev_err(dev, "No '%s' property?\n", pname); + return num_entries; + } + + if (!num_entries || (num_entries % num_values)) { + dev_err(dev, "All '%s' list entries need %d vals\n", pname, + num_values); + return -EINVAL; + } + num_entries /= num_values; + + info = devm_kcalloc(dev, num_entries, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + abb->info = info; + + volt_table = devm_kcalloc(dev, num_entries, sizeof(unsigned int), + GFP_KERNEL); + if (!volt_table) + return -ENOMEM; + + abb->rdesc.n_voltages = num_entries; + abb->rdesc.volt_table = volt_table; + /* We do not know where the OPP voltage is at the moment */ + abb->current_info_idx = -EINVAL; + + for (i = 0; i < num_entries; i++, info++, volt_table++) { + u32 efuse_offset, rbb_mask, fbb_mask, vset_mask; + u32 efuse_val; + + /* NOTE: num_values should equal to entries picked up here */ + of_property_read_u32_index(dev->of_node, pname, i * num_values, + volt_table); + of_property_read_u32_index(dev->of_node, pname, + i * num_values + 1, &info->opp_sel); + of_property_read_u32_index(dev->of_node, pname, + i * num_values + 2, &efuse_offset); + of_property_read_u32_index(dev->of_node, pname, + i * num_values + 3, &rbb_mask); + of_property_read_u32_index(dev->of_node, pname, + i * num_values + 4, &fbb_mask); + of_property_read_u32_index(dev->of_node, pname, + i * num_values + 5, &vset_mask); + + dev_dbg(dev, + "[%d]v=%d ABB=%d ef=0x%x rbb=0x%x fbb=0x%x vset=0x%x\n", + i, *volt_table, info->opp_sel, efuse_offset, rbb_mask, + fbb_mask, vset_mask); + + /* Find min/max for voltage set */ + if (min_uV > *volt_table) + min_uV = *volt_table; + if (max_uV < *volt_table) + max_uV = *volt_table; + + if (!abb->efuse_base) { + /* Ignore invalid data, but warn to help cleanup */ + if (efuse_offset || rbb_mask || fbb_mask || vset_mask) + dev_err(dev, "prop '%s': v=%d,bad efuse/mask\n", + pname, *volt_table); + goto check_abb; + } + + efuse_val = readl(abb->efuse_base + efuse_offset); + + /* Use ABB recommendation from Efuse */ + if (efuse_val & rbb_mask) + info->opp_sel = TI_ABB_SLOW_OPP; + else if (efuse_val & fbb_mask) + info->opp_sel = TI_ABB_FAST_OPP; + else if (rbb_mask || fbb_mask) + info->opp_sel = TI_ABB_NOMINAL_OPP; + + dev_dbg(dev, + "[%d]v=%d efusev=0x%x final ABB=%d\n", + i, *volt_table, efuse_val, info->opp_sel); + + /* Use recommended Vset bits from Efuse */ + if (!abb->ldo_base) { + if (vset_mask) + dev_err(dev, "prop'%s':v=%d vst=%x LDO base?\n", + pname, *volt_table, vset_mask); + continue; + } + info->vset = (efuse_val & vset_mask) >> __ffs(vset_mask); + dev_dbg(dev, "[%d]v=%d vset=%x\n", i, *volt_table, info->vset); +check_abb: + switch (info->opp_sel) { + case TI_ABB_NOMINAL_OPP: + case TI_ABB_FAST_OPP: + case TI_ABB_SLOW_OPP: + /* Valid values */ + break; + default: + dev_err(dev, "%s:[%d]v=%d, ABB=%d is invalid! Abort!\n", + __func__, i, *volt_table, info->opp_sel); + return -EINVAL; + } + } + + /* Setup the min/max voltage constraints from the supported list */ + c->min_uV = min_uV; + c->max_uV = max_uV; + + return 0; +} + +static const struct regulator_ops ti_abb_reg_ops = { + .list_voltage = regulator_list_voltage_table, + + .set_voltage_sel = ti_abb_set_voltage_sel, + .get_voltage_sel = ti_abb_get_voltage_sel, +}; + +/* Default ABB block offsets, IF this changes in future, create new one */ +static const struct ti_abb_reg abb_regs_v1 = { + /* WARNING: registers are wrongly documented in TRM */ + .setup_off = 0x04, + .control_off = 0x00, + + .sr2_wtcnt_value_mask = (0xff << 8), + .fbb_sel_mask = (0x01 << 2), + .rbb_sel_mask = (0x01 << 1), + .sr2_en_mask = (0x01 << 0), + + .opp_change_mask = (0x01 << 2), + .opp_sel_mask = (0x03 << 0), +}; + +static const struct ti_abb_reg abb_regs_v2 = { + .setup_off = 0x00, + .control_off = 0x04, + + .sr2_wtcnt_value_mask = (0xff << 8), + .fbb_sel_mask = (0x01 << 2), + .rbb_sel_mask = (0x01 << 1), + .sr2_en_mask = (0x01 << 0), + + .opp_change_mask = (0x01 << 2), + .opp_sel_mask = (0x03 << 0), +}; + +static const struct ti_abb_reg abb_regs_generic = { + .sr2_wtcnt_value_mask = (0xff << 8), + .fbb_sel_mask = (0x01 << 2), + .rbb_sel_mask = (0x01 << 1), + .sr2_en_mask = (0x01 << 0), + + .opp_change_mask = (0x01 << 2), + .opp_sel_mask = (0x03 << 0), +}; + +static const struct of_device_id ti_abb_of_match[] = { + {.compatible = "ti,abb-v1", .data = &abb_regs_v1}, + {.compatible = "ti,abb-v2", .data = &abb_regs_v2}, + {.compatible = "ti,abb-v3", .data = &abb_regs_generic}, + { }, +}; + +MODULE_DEVICE_TABLE(of, ti_abb_of_match); + +/** + * ti_abb_probe() - Initialize an ABB ldo instance + * @pdev: ABB platform device + * + * Initializes an individual ABB LDO for required Body-Bias. ABB is used to + * additional bias supply to SoC modules for power savings or mandatory stability + * configuration at certain Operating Performance Points(OPPs). + * + * Return: 0 on success or appropriate error value when fails + */ +static int ti_abb_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *res; + struct ti_abb *abb; + struct regulator_init_data *initdata = NULL; + struct regulator_dev *rdev = NULL; + struct regulator_desc *desc; + struct regulation_constraints *c; + struct regulator_config config = { }; + char *pname; + int ret = 0; + + abb = devm_kzalloc(dev, sizeof(struct ti_abb), GFP_KERNEL); + if (!abb) + return -ENOMEM; + + abb->regs = device_get_match_data(dev); + if (!abb->regs) { + dev_err(dev, "%s: Bad data in match\n", __func__); + return -EINVAL; + } + + /* Map ABB resources */ + if (abb->regs->setup_off || abb->regs->control_off) { + abb->base = devm_platform_ioremap_resource_byname(pdev, "base-address"); + if (IS_ERR(abb->base)) + return PTR_ERR(abb->base); + + abb->setup_reg = abb->base + abb->regs->setup_off; + abb->control_reg = abb->base + abb->regs->control_off; + + } else { + abb->control_reg = devm_platform_ioremap_resource_byname(pdev, "control-address"); + if (IS_ERR(abb->control_reg)) + return PTR_ERR(abb->control_reg); + + abb->setup_reg = devm_platform_ioremap_resource_byname(pdev, "setup-address"); + if (IS_ERR(abb->setup_reg)) + return PTR_ERR(abb->setup_reg); + } + + pname = "int-address"; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname); + if (!res) { + dev_err(dev, "Missing '%s' IO resource\n", pname); + return -ENODEV; + } + /* + * The MPU interrupt status register (PRM_IRQSTATUS_MPU) is + * shared between regulator-abb-{ivahd,dspeve,gpu} driver + * instances. Therefore use devm_ioremap() rather than + * devm_platform_ioremap_resource_byname() to avoid busy + * resource region conflicts. + */ + abb->int_base = devm_ioremap(dev, res->start, + resource_size(res)); + if (!abb->int_base) { + dev_err(dev, "Unable to map '%s'\n", pname); + return -ENOMEM; + } + + /* Map Optional resources */ + pname = "efuse-address"; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname); + if (!res) { + dev_dbg(dev, "Missing '%s' IO resource\n", pname); + ret = -ENODEV; + goto skip_opt; + } + + /* + * We may have shared efuse register offsets which are read-only + * between domains + */ + abb->efuse_base = devm_ioremap(dev, res->start, + resource_size(res)); + if (!abb->efuse_base) { + dev_err(dev, "Unable to map '%s'\n", pname); + return -ENOMEM; + } + + pname = "ldo-address"; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname); + if (!res) { + dev_dbg(dev, "Missing '%s' IO resource\n", pname); + ret = -ENODEV; + goto skip_opt; + } + abb->ldo_base = devm_ioremap_resource(dev, res); + if (IS_ERR(abb->ldo_base)) + return PTR_ERR(abb->ldo_base); + + /* IF ldo_base is set, the following are mandatory */ + pname = "ti,ldovbb-override-mask"; + ret = + of_property_read_u32(pdev->dev.of_node, pname, + &abb->ldovbb_override_mask); + if (ret) { + dev_err(dev, "Missing '%s' (%d)\n", pname, ret); + return ret; + } + if (!abb->ldovbb_override_mask) { + dev_err(dev, "Invalid property:'%s' set as 0!\n", pname); + return -EINVAL; + } + + pname = "ti,ldovbb-vset-mask"; + ret = + of_property_read_u32(pdev->dev.of_node, pname, + &abb->ldovbb_vset_mask); + if (ret) { + dev_err(dev, "Missing '%s' (%d)\n", pname, ret); + return ret; + } + if (!abb->ldovbb_vset_mask) { + dev_err(dev, "Invalid property:'%s' set as 0!\n", pname); + return -EINVAL; + } + +skip_opt: + pname = "ti,tranxdone-status-mask"; + ret = + of_property_read_u32(pdev->dev.of_node, pname, + &abb->txdone_mask); + if (ret) { + dev_err(dev, "Missing '%s' (%d)\n", pname, ret); + return ret; + } + if (!abb->txdone_mask) { + dev_err(dev, "Invalid property:'%s' set as 0!\n", pname); + return -EINVAL; + } + + initdata = of_get_regulator_init_data(dev, pdev->dev.of_node, + &abb->rdesc); + if (!initdata) { + dev_err(dev, "%s: Unable to alloc regulator init data\n", + __func__); + return -ENOMEM; + } + + /* init ABB opp_sel table */ + ret = ti_abb_init_table(dev, abb, initdata); + if (ret) + return ret; + + /* init ABB timing */ + ret = ti_abb_init_timings(dev, abb); + if (ret) + return ret; + + desc = &abb->rdesc; + desc->name = dev_name(dev); + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->ops = &ti_abb_reg_ops; + + c = &initdata->constraints; + if (desc->n_voltages > 1) + c->valid_ops_mask |= REGULATOR_CHANGE_VOLTAGE; + c->always_on = true; + + config.dev = dev; + config.init_data = initdata; + config.driver_data = abb; + config.of_node = pdev->dev.of_node; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "%s: failed to register regulator(%d)\n", + __func__, ret); + return ret; + } + platform_set_drvdata(pdev, rdev); + + /* Enable the ldo if not already done by bootloader */ + ti_abb_rmw(abb->regs->sr2_en_mask, 1, abb->setup_reg); + + return 0; +} + +MODULE_ALIAS("platform:ti_abb"); + +static struct platform_driver ti_abb_driver = { + .probe = ti_abb_probe, + .driver = { + .name = "ti_abb", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = ti_abb_of_match, + }, +}; +module_platform_driver(ti_abb_driver); + +MODULE_DESCRIPTION("Texas Instruments ABB LDO regulator driver"); +MODULE_AUTHOR("Texas Instruments Inc."); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps51632-regulator.c b/drivers/regulator/tps51632-regulator.c new file mode 100644 index 000000000..8459b49ec --- /dev/null +++ b/drivers/regulator/tps51632-regulator.c @@ -0,0 +1,364 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps51632-regulator.c -- TI TPS51632 + * + * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless + * Controller with serial VID control and DVFS. + * + * Copyright (c) 2012, NVIDIA Corporation. + * + * Author: Laxman Dewangan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register definitions */ +#define TPS51632_VOLTAGE_SELECT_REG 0x0 +#define TPS51632_VOLTAGE_BASE_REG 0x1 +#define TPS51632_OFFSET_REG 0x2 +#define TPS51632_IMON_REG 0x3 +#define TPS51632_VMAX_REG 0x4 +#define TPS51632_DVFS_CONTROL_REG 0x5 +#define TPS51632_POWER_STATE_REG 0x6 +#define TPS51632_SLEW_REGS 0x7 +#define TPS51632_FAULT_REG 0x14 + +#define TPS51632_MAX_REG 0x15 + +#define TPS51632_VOUT_MASK 0x7F +#define TPS51632_VOUT_OFFSET_MASK 0x1F +#define TPS51632_VMAX_MASK 0x7F +#define TPS51632_VMAX_LOCK 0x80 + +/* TPS51632_DVFS_CONTROL_REG */ +#define TPS51632_DVFS_PWMEN 0x1 +#define TPS51632_DVFS_STEP_20 0x2 +#define TPS51632_DVFS_VMAX_PG 0x4 +#define TPS51632_DVFS_PWMRST 0x8 +#define TPS51632_DVFS_OCA_EN 0x10 +#define TPS51632_DVFS_FCCM 0x20 + +/* TPS51632_POWER_STATE_REG */ +#define TPS51632_POWER_STATE_MASK 0x03 +#define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0 +#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1 +#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2 + +#define TPS51632_MIN_VOLTAGE 500000 +#define TPS51632_MAX_VOLTAGE 1520000 +#define TPS51632_VOLTAGE_STEP_10mV 10000 +#define TPS51632_VOLTAGE_STEP_20mV 20000 +#define TPS51632_MAX_VSEL 0x7F +#define TPS51632_MIN_VSEL 0x19 +#define TPS51632_DEFAULT_RAMP_DELAY 6000 +#define TPS51632_VOLT_VSEL(uV) \ + (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \ + TPS51632_VOLTAGE_STEP_10mV) + \ + TPS51632_MIN_VSEL) + +/* TPS51632 chip information */ +struct tps51632_chip { + struct device *dev; + struct regulator_desc desc; + struct regulator_dev *rdev; + struct regmap *regmap; +}; + +static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev, + int ramp_delay) +{ + struct tps51632_chip *tps = rdev_get_drvdata(rdev); + int bit; + int ret; + + if (ramp_delay == 0) + bit = 0; + else + bit = DIV_ROUND_UP(ramp_delay, 6000) - 1; + + ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit)); + if (ret < 0) + dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret); + return ret; +} + +static const struct regulator_ops tps51632_dcdc_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = tps51632_dcdc_set_ramp_delay, +}; + +static int tps51632_init_dcdc(struct tps51632_chip *tps, + struct tps51632_regulator_platform_data *pdata) +{ + int ret; + uint8_t control = 0; + int vsel; + + if (!pdata->enable_pwm_dvfs) + goto skip_pwm_config; + + control |= TPS51632_DVFS_PWMEN; + vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV); + ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel); + if (ret < 0) { + dev_err(tps->dev, "BASE reg write failed, err %d\n", ret); + return ret; + } + + if (pdata->dvfs_step_20mV) + control |= TPS51632_DVFS_STEP_20; + + if (pdata->max_voltage_uV) { + unsigned int vmax; + /** + * TPS51632 hw behavior: VMAX register can be write only + * once as it get locked after first write. The lock get + * reset only when device is power-reset. + * Write register only when lock bit is not enabled. + */ + ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax); + if (ret < 0) { + dev_err(tps->dev, "VMAX read failed, err %d\n", ret); + return ret; + } + if (!(vmax & TPS51632_VMAX_LOCK)) { + vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV); + ret = regmap_write(tps->regmap, TPS51632_VMAX_REG, + vsel); + if (ret < 0) { + dev_err(tps->dev, + "VMAX write failed, err %d\n", ret); + return ret; + } + } + } + +skip_pwm_config: + ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control); + if (ret < 0) + dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret); + return ret; +} + +static bool is_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TPS51632_OFFSET_REG: + case TPS51632_FAULT_REG: + case TPS51632_IMON_REG: + return true; + default: + return false; + } +} + +static bool is_read_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x08 ... 0x0F: + return false; + default: + return true; + } +} + +static bool is_write_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TPS51632_VOLTAGE_SELECT_REG: + case TPS51632_VOLTAGE_BASE_REG: + case TPS51632_VMAX_REG: + case TPS51632_DVFS_CONTROL_REG: + case TPS51632_POWER_STATE_REG: + case TPS51632_SLEW_REGS: + return true; + default: + return false; + } +} + +static const struct regmap_config tps51632_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = is_write_reg, + .readable_reg = is_read_reg, + .volatile_reg = is_volatile_reg, + .max_register = TPS51632_MAX_REG - 1, + .cache_type = REGCACHE_MAPLE, +}; + +#if defined(CONFIG_OF) +static const struct of_device_id tps51632_of_match[] = { + { .compatible = "ti,tps51632",}, + {}, +}; +MODULE_DEVICE_TABLE(of, tps51632_of_match); + +static struct tps51632_regulator_platform_data * + of_get_tps51632_platform_data(struct device *dev, + const struct regulator_desc *desc) +{ + struct tps51632_regulator_platform_data *pdata; + struct device_node *np = dev->of_node; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node, + desc); + if (!pdata->reg_init_data) { + dev_err(dev, "Not able to get OF regulator init data\n"); + return NULL; + } + + pdata->enable_pwm_dvfs = + of_property_read_bool(np, "ti,enable-pwm-dvfs"); + pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV"); + + pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? : + TPS51632_MIN_VOLTAGE; + pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? : + TPS51632_MAX_VOLTAGE; + return pdata; +} +#else +static struct tps51632_regulator_platform_data * + of_get_tps51632_platform_data(struct device *dev, + const struct regulator_desc *desc) +{ + return NULL; +} +#endif + +static int tps51632_probe(struct i2c_client *client) +{ + struct tps51632_regulator_platform_data *pdata; + struct regulator_dev *rdev; + struct tps51632_chip *tps; + int ret; + struct regulator_config config = { }; + + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + tps->dev = &client->dev; + tps->desc.name = client->name; + tps->desc.id = 0; + tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY; + tps->desc.min_uV = TPS51632_MIN_VOLTAGE; + tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV; + tps->desc.linear_min_sel = TPS51632_MIN_VSEL; + tps->desc.n_voltages = TPS51632_MAX_VSEL + 1; + tps->desc.ops = &tps51632_dcdc_ops; + tps->desc.type = REGULATOR_VOLTAGE; + tps->desc.owner = THIS_MODULE; + + pdata = dev_get_platdata(&client->dev); + if (!pdata && client->dev.of_node) + pdata = of_get_tps51632_platform_data(&client->dev, &tps->desc); + if (!pdata) { + dev_err(&client->dev, "No Platform data\n"); + return -EINVAL; + } + + if (pdata->enable_pwm_dvfs) { + if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) || + (pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) { + dev_err(&client->dev, "Invalid base_voltage_uV setting\n"); + return -EINVAL; + } + + if ((pdata->max_voltage_uV) && + ((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) || + (pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) { + dev_err(&client->dev, "Invalid max_voltage_uV setting\n"); + return -EINVAL; + } + } + + if (pdata->enable_pwm_dvfs) + tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG; + else + tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG; + tps->desc.vsel_mask = TPS51632_VOUT_MASK; + + tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config); + if (IS_ERR(tps->regmap)) { + ret = PTR_ERR(tps->regmap); + dev_err(&client->dev, "regmap init failed, err %d\n", ret); + return ret; + } + i2c_set_clientdata(client, tps); + + ret = tps51632_init_dcdc(tps, pdata); + if (ret < 0) { + dev_err(tps->dev, "Init failed, err = %d\n", ret); + return ret; + } + + /* Register the regulators */ + config.dev = &client->dev; + config.init_data = pdata->reg_init_data; + config.driver_data = tps; + config.regmap = tps->regmap; + config.of_node = client->dev.of_node; + + rdev = devm_regulator_register(&client->dev, &tps->desc, &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "regulator register failed\n"); + return PTR_ERR(rdev); + } + + tps->rdev = rdev; + return 0; +} + +static const struct i2c_device_id tps51632_id[] = { + { .name = "tps51632" }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, tps51632_id); + +static struct i2c_driver tps51632_i2c_driver = { + .driver = { + .name = "tps51632", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(tps51632_of_match), + }, + .probe = tps51632_probe, + .id_table = tps51632_id, +}; + +static int __init tps51632_init(void) +{ + return i2c_add_driver(&tps51632_i2c_driver); +} +subsys_initcall(tps51632_init); + +static void __exit tps51632_cleanup(void) +{ + i2c_del_driver(&tps51632_i2c_driver); +} +module_exit(tps51632_cleanup); + +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_DESCRIPTION("TPS51632 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps6105x-regulator.c b/drivers/regulator/tps6105x-regulator.c new file mode 100644 index 000000000..a09c6ae6a --- /dev/null +++ b/drivers/regulator/tps6105x-regulator.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for TPS61050/61052 boost converters, typically used for white LEDs + * or audio amplifiers. + * + * Copyright (C) 2011 ST-Ericsson SA + * Written on behalf of Linaro for ST-Ericsson + * + * Author: Linus Walleij + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const unsigned int tps6105x_voltages[] = { + 4500000, + 5000000, + 5250000, + 5000000, /* There is an additional 5V */ +}; + +static const struct regulator_ops tps6105x_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct regulator_desc tps6105x_regulator_desc = { + .name = "tps6105x-boost", + .of_match = of_match_ptr("regulator"), + .ops = &tps6105x_regulator_ops, + .type = REGULATOR_VOLTAGE, + .id = 0, + .owner = THIS_MODULE, + .n_voltages = ARRAY_SIZE(tps6105x_voltages), + .volt_table = tps6105x_voltages, + .vsel_reg = TPS6105X_REG_0, + .vsel_mask = TPS6105X_REG0_VOLTAGE_MASK, + .enable_reg = TPS6105X_REG_0, + .enable_mask = TPS6105X_REG0_MODE_MASK, + .enable_val = TPS6105X_REG0_MODE_VOLTAGE << + TPS6105X_REG0_MODE_SHIFT, +}; + +/* + * Registers the chip as a voltage regulator + */ +static int tps6105x_regulator_probe(struct platform_device *pdev) +{ + struct tps6105x *tps6105x = dev_get_platdata(&pdev->dev); + struct tps6105x_platform_data *pdata = tps6105x->pdata; + struct regulator_config config = { }; + int ret; + + /* This instance is not set for regulator mode so bail out */ + if (pdata->mode != TPS6105X_MODE_VOLTAGE) { + dev_info(&pdev->dev, + "chip not in voltage mode mode, exit probe\n"); + return 0; + } + + config.dev = &tps6105x->client->dev; + config.init_data = pdata->regulator_data; + config.driver_data = tps6105x; + config.of_node = pdev->dev.parent->of_node; + config.regmap = tps6105x->regmap; + + /* Register regulator with framework */ + tps6105x->regulator = devm_regulator_register(&pdev->dev, + &tps6105x_regulator_desc, + &config); + if (IS_ERR(tps6105x->regulator)) { + ret = PTR_ERR(tps6105x->regulator); + dev_err(&tps6105x->client->dev, + "failed to register regulator\n"); + return ret; + } + platform_set_drvdata(pdev, tps6105x); + + return 0; +} + +static struct platform_driver tps6105x_regulator_driver = { + .driver = { + .name = "tps6105x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps6105x_regulator_probe, +}; + +static __init int tps6105x_regulator_init(void) +{ + return platform_driver_register(&tps6105x_regulator_driver); +} +subsys_initcall(tps6105x_regulator_init); + +static __exit void tps6105x_regulator_exit(void) +{ + platform_driver_unregister(&tps6105x_regulator_driver); +} +module_exit(tps6105x_regulator_exit); + +MODULE_AUTHOR("Linus Walleij "); +MODULE_DESCRIPTION("TPS6105x regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:tps6105x-regulator"); diff --git a/drivers/regulator/tps62360-regulator.c b/drivers/regulator/tps62360-regulator.c new file mode 100644 index 000000000..00f19082c --- /dev/null +++ b/drivers/regulator/tps62360-regulator.c @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps62360.c -- TI tps62360 + * + * Driver for processor core supply tps62360, tps62361B, tps62362 and tps62363. + * + * Copyright (c) 2012, NVIDIA Corporation. + * + * Author: Laxman Dewangan + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register definitions */ +#define REG_VSET0 0 +#define REG_VSET1 1 +#define REG_VSET2 2 +#define REG_VSET3 3 +#define REG_CONTROL 4 +#define REG_TEMP 5 +#define REG_RAMPCTRL 6 +#define REG_CHIPID 8 + +#define FORCE_PWM_ENABLE BIT(7) + +enum chips {TPS62360, TPS62361, TPS62362, TPS62363}; + +#define TPS62360_BASE_VOLTAGE 770000 +#define TPS62360_N_VOLTAGES 64 + +#define TPS62361_BASE_VOLTAGE 500000 +#define TPS62361_N_VOLTAGES 128 + +/* tps 62360 chip information */ +struct tps62360_chip { + struct device *dev; + struct regulator_desc desc; + struct regulator_dev *rdev; + struct regmap *regmap; + struct gpio_desc *vsel0_gpio; + struct gpio_desc *vsel1_gpio; + u8 voltage_reg_mask; + bool en_internal_pulldn; + bool en_discharge; + bool valid_gpios; + int lru_index[4]; + int curr_vset_vsel[4]; + int curr_vset_id; +}; + +/* + * find_voltage_set_register: Find new voltage configuration register + * (VSET) id. + * The finding of the new VSET register will be based on the LRU mechanism. + * Each VSET register will have different voltage configured . This + * Function will look if any of the VSET register have requested voltage set + * or not. + * - If it is already there then it will make that register as most + * recently used and return as found so that caller need not to set + * the VSET register but need to set the proper gpios to select this + * VSET register. + * - If requested voltage is not found then it will use the least + * recently mechanism to get new VSET register for new configuration + * and will return not_found so that caller need to set new VSET + * register and then gpios (both). + */ +static bool find_voltage_set_register(struct tps62360_chip *tps, + int req_vsel, int *vset_reg_id) +{ + int i; + bool found = false; + int new_vset_reg = tps->lru_index[3]; + int found_index = 3; + + for (i = 0; i < 4; ++i) { + if (tps->curr_vset_vsel[tps->lru_index[i]] == req_vsel) { + new_vset_reg = tps->lru_index[i]; + found_index = i; + found = true; + goto update_lru_index; + } + } + +update_lru_index: + for (i = found_index; i > 0; i--) + tps->lru_index[i] = tps->lru_index[i - 1]; + + tps->lru_index[0] = new_vset_reg; + *vset_reg_id = new_vset_reg; + return found; +} + +static int tps62360_dcdc_get_voltage_sel(struct regulator_dev *dev) +{ + struct tps62360_chip *tps = rdev_get_drvdata(dev); + int vsel; + unsigned int data; + int ret; + + ret = regmap_read(tps->regmap, REG_VSET0 + tps->curr_vset_id, &data); + if (ret < 0) { + dev_err(tps->dev, "%s(): register %d read failed with err %d\n", + __func__, REG_VSET0 + tps->curr_vset_id, ret); + return ret; + } + vsel = (int)data & tps->voltage_reg_mask; + return vsel; +} + +static int tps62360_dcdc_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct tps62360_chip *tps = rdev_get_drvdata(dev); + int ret; + bool found = false; + int new_vset_id = tps->curr_vset_id; + + /* + * If gpios are available to select the VSET register then least + * recently used register for new configuration. + */ + if (tps->valid_gpios) + found = find_voltage_set_register(tps, selector, &new_vset_id); + + if (!found) { + ret = regmap_update_bits(tps->regmap, REG_VSET0 + new_vset_id, + tps->voltage_reg_mask, selector); + if (ret < 0) { + dev_err(tps->dev, + "%s(): register %d update failed with err %d\n", + __func__, REG_VSET0 + new_vset_id, ret); + return ret; + } + tps->curr_vset_id = new_vset_id; + tps->curr_vset_vsel[new_vset_id] = selector; + } + + /* Select proper VSET register vio gpios */ + if (tps->valid_gpios) { + gpiod_set_value_cansleep(tps->vsel0_gpio, new_vset_id & 0x1); + gpiod_set_value_cansleep(tps->vsel1_gpio, + (new_vset_id >> 1) & 0x1); + } + return 0; +} + +static int tps62360_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct tps62360_chip *tps = rdev_get_drvdata(rdev); + int i; + int val; + int ret; + + /* Enable force PWM mode in FAST mode only. */ + switch (mode) { + case REGULATOR_MODE_FAST: + val = FORCE_PWM_ENABLE; + break; + + case REGULATOR_MODE_NORMAL: + val = 0; + break; + + default: + return -EINVAL; + } + + if (!tps->valid_gpios) { + ret = regmap_update_bits(tps->regmap, + REG_VSET0 + tps->curr_vset_id, FORCE_PWM_ENABLE, val); + if (ret < 0) + dev_err(tps->dev, + "%s(): register %d update failed with err %d\n", + __func__, REG_VSET0 + tps->curr_vset_id, ret); + return ret; + } + + /* If gpios are valid then all register set need to be control */ + for (i = 0; i < 4; ++i) { + ret = regmap_update_bits(tps->regmap, + REG_VSET0 + i, FORCE_PWM_ENABLE, val); + if (ret < 0) { + dev_err(tps->dev, + "%s(): register %d update failed with err %d\n", + __func__, REG_VSET0 + i, ret); + return ret; + } + } + return ret; +} + +static unsigned int tps62360_get_mode(struct regulator_dev *rdev) +{ + struct tps62360_chip *tps = rdev_get_drvdata(rdev); + unsigned int data; + int ret; + + ret = regmap_read(tps->regmap, REG_VSET0 + tps->curr_vset_id, &data); + if (ret < 0) { + dev_err(tps->dev, "%s(): register %d read failed with err %d\n", + __func__, REG_VSET0 + tps->curr_vset_id, ret); + return ret; + } + return (data & FORCE_PWM_ENABLE) ? + REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops tps62360_dcdc_ops = { + .get_voltage_sel = tps62360_dcdc_get_voltage_sel, + .set_voltage_sel = tps62360_dcdc_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_mode = tps62360_set_mode, + .get_mode = tps62360_get_mode, +}; + +static int tps62360_init_dcdc(struct tps62360_chip *tps, + struct tps62360_regulator_platform_data *pdata) +{ + int ret; + unsigned int ramp_ctrl; + + /* Initialize internal pull up/down control */ + if (tps->en_internal_pulldn) + ret = regmap_write(tps->regmap, REG_CONTROL, 0xE0); + else + ret = regmap_write(tps->regmap, REG_CONTROL, 0x0); + if (ret < 0) { + dev_err(tps->dev, + "%s(): register %d write failed with err %d\n", + __func__, REG_CONTROL, ret); + return ret; + } + + /* Reset output discharge path to reduce power consumption */ + ret = regmap_update_bits(tps->regmap, REG_RAMPCTRL, BIT(2), 0); + if (ret < 0) { + dev_err(tps->dev, + "%s(): register %d update failed with err %d\n", + __func__, REG_RAMPCTRL, ret); + return ret; + } + + /* Get ramp value from ramp control register */ + ret = regmap_read(tps->regmap, REG_RAMPCTRL, &ramp_ctrl); + if (ret < 0) { + dev_err(tps->dev, + "%s(): register %d read failed with err %d\n", + __func__, REG_RAMPCTRL, ret); + return ret; + } + ramp_ctrl = (ramp_ctrl >> 5) & 0x7; + + /* ramp mV/us = 32/(2^ramp_ctrl) */ + tps->desc.ramp_delay = DIV_ROUND_UP(32000, BIT(ramp_ctrl)); + return ret; +} + +static const struct regmap_config tps62360_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = REG_CHIPID, + .cache_type = REGCACHE_MAPLE, +}; + +static struct tps62360_regulator_platform_data * + of_get_tps62360_platform_data(struct device *dev, + const struct regulator_desc *desc) +{ + struct tps62360_regulator_platform_data *pdata; + struct device_node *np = dev->of_node; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node, + desc); + if (!pdata->reg_init_data) { + dev_err(dev, "Not able to get OF regulator init data\n"); + return NULL; + } + + pdata->vsel0_def_state = of_property_read_bool(np, "ti,vsel0-state-high"); + pdata->vsel1_def_state = of_property_read_bool(np, "ti,vsel1-state-high"); + pdata->en_internal_pulldn = of_property_read_bool(np, "ti,enable-pull-down"); + pdata->en_discharge = of_property_read_bool(np, "ti,enable-vout-discharge"); + + return pdata; +} + +#if defined(CONFIG_OF) +static const struct of_device_id tps62360_of_match[] = { + { .compatible = "ti,tps62360", .data = (void *)TPS62360}, + { .compatible = "ti,tps62361", .data = (void *)TPS62361}, + { .compatible = "ti,tps62362", .data = (void *)TPS62362}, + { .compatible = "ti,tps62363", .data = (void *)TPS62363}, + {}, +}; +MODULE_DEVICE_TABLE(of, tps62360_of_match); +#endif + +static int tps62360_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct regulator_config config = { }; + struct tps62360_regulator_platform_data *pdata; + struct regulator_dev *rdev; + struct tps62360_chip *tps; + int ret; + int i; + int chip_id; + int gpio_flags; + + pdata = dev_get_platdata(&client->dev); + + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + tps->desc.name = client->name; + tps->desc.id = 0; + tps->desc.ops = &tps62360_dcdc_ops; + tps->desc.type = REGULATOR_VOLTAGE; + tps->desc.owner = THIS_MODULE; + tps->desc.uV_step = 10000; + + if (client->dev.of_node) { + const struct of_device_id *match; + match = of_match_device(of_match_ptr(tps62360_of_match), + &client->dev); + if (!match) { + dev_err(&client->dev, "Error: No device match found\n"); + return -ENODEV; + } + chip_id = (int)(long)match->data; + if (!pdata) + pdata = of_get_tps62360_platform_data(&client->dev, + &tps->desc); + } else if (id) { + chip_id = id->driver_data; + } else { + dev_err(&client->dev, "No device tree match or id table match found\n"); + return -ENODEV; + } + + if (!pdata) { + dev_err(&client->dev, "%s(): Platform data not found\n", + __func__); + return -EIO; + } + + tps->en_discharge = pdata->en_discharge; + tps->en_internal_pulldn = pdata->en_internal_pulldn; + tps->dev = &client->dev; + + switch (chip_id) { + case TPS62360: + case TPS62362: + tps->desc.min_uV = TPS62360_BASE_VOLTAGE; + tps->voltage_reg_mask = 0x3F; + tps->desc.n_voltages = TPS62360_N_VOLTAGES; + break; + case TPS62361: + case TPS62363: + tps->desc.min_uV = TPS62361_BASE_VOLTAGE; + tps->voltage_reg_mask = 0x7F; + tps->desc.n_voltages = TPS62361_N_VOLTAGES; + break; + default: + return -ENODEV; + } + + tps->regmap = devm_regmap_init_i2c(client, &tps62360_regmap_config); + if (IS_ERR(tps->regmap)) { + ret = PTR_ERR(tps->regmap); + dev_err(&client->dev, + "%s(): regmap allocation failed with err %d\n", + __func__, ret); + return ret; + } + i2c_set_clientdata(client, tps); + + tps->curr_vset_id = (pdata->vsel1_def_state & 1) * 2 + + (pdata->vsel0_def_state & 1); + tps->lru_index[0] = tps->curr_vset_id; + tps->valid_gpios = false; + + gpio_flags = (pdata->vsel0_def_state) ? + GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + tps->vsel0_gpio = devm_gpiod_get_optional(&client->dev, "vsel0", gpio_flags); + if (IS_ERR(tps->vsel0_gpio)) { + dev_err(&client->dev, + "%s(): Could not obtain vsel0 GPIO: %ld\n", + __func__, PTR_ERR(tps->vsel0_gpio)); + return PTR_ERR(tps->vsel0_gpio); + } + + gpio_flags = (pdata->vsel1_def_state) ? + GPIOD_OUT_HIGH : GPIOD_OUT_LOW; + tps->vsel1_gpio = devm_gpiod_get_optional(&client->dev, "vsel1", gpio_flags); + if (IS_ERR(tps->vsel1_gpio)) { + dev_err(&client->dev, + "%s(): Could not obtain vsel1 GPIO: %ld\n", + __func__, PTR_ERR(tps->vsel1_gpio)); + return PTR_ERR(tps->vsel1_gpio); + } + + if (tps->vsel0_gpio != NULL && tps->vsel1_gpio != NULL) { + tps->valid_gpios = true; + + /* + * Initialize the lru index with vset_reg id + * The index 0 will be most recently used and + * set with the tps->curr_vset_id */ + for (i = 0; i < 4; ++i) + tps->lru_index[i] = i; + tps->lru_index[0] = tps->curr_vset_id; + tps->lru_index[tps->curr_vset_id] = 0; + } + + ret = tps62360_init_dcdc(tps, pdata); + if (ret < 0) { + dev_err(tps->dev, "%s(): Init failed with err = %d\n", + __func__, ret); + return ret; + } + + config.dev = &client->dev; + config.init_data = pdata->reg_init_data; + config.driver_data = tps; + config.of_node = client->dev.of_node; + + /* Register the regulators */ + rdev = devm_regulator_register(&client->dev, &tps->desc, &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, + "%s(): regulator register failed with err %s\n", + __func__, id->name); + return PTR_ERR(rdev); + } + + tps->rdev = rdev; + return 0; +} + +static void tps62360_shutdown(struct i2c_client *client) +{ + struct tps62360_chip *tps = i2c_get_clientdata(client); + int st; + + if (!tps->en_discharge) + return; + + /* Configure the output discharge path */ + st = regmap_update_bits(tps->regmap, REG_RAMPCTRL, BIT(2), BIT(2)); + if (st < 0) + dev_err(tps->dev, + "%s(): register %d update failed with err %d\n", + __func__, REG_RAMPCTRL, st); +} + +static const struct i2c_device_id tps62360_id[] = { + { .name = "tps62360", .driver_data = TPS62360 }, + { .name = "tps62361", .driver_data = TPS62361 }, + { .name = "tps62362", .driver_data = TPS62362 }, + { .name = "tps62363", .driver_data = TPS62363 }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, tps62360_id); + +static struct i2c_driver tps62360_i2c_driver = { + .driver = { + .name = "tps62360", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(tps62360_of_match), + }, + .probe = tps62360_probe, + .shutdown = tps62360_shutdown, + .id_table = tps62360_id, +}; + +static int __init tps62360_init(void) +{ + return i2c_add_driver(&tps62360_i2c_driver); +} +subsys_initcall(tps62360_init); + +static void __exit tps62360_cleanup(void) +{ + i2c_del_driver(&tps62360_i2c_driver); +} +module_exit(tps62360_cleanup); + +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_DESCRIPTION("TPS6236x voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps6286x-regulator.c b/drivers/regulator/tps6286x-regulator.c new file mode 100644 index 000000000..1ab53bee9 --- /dev/null +++ b/drivers/regulator/tps6286x-regulator.c @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright Axis Communications AB + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TPS6286X_VOUT1 0x01 +#define TPS6286X_VOUT1_VO1_SET GENMASK(7, 0) + +#define TPS6286X_CONTROL 0x03 +#define TPS6286X_CONTROL_FPWM BIT(4) +#define TPS6286X_CONTROL_SWEN BIT(5) + +#define TPS6286X_STATUS 0x05 + +#define TPS6286X_MIN_MV 400 +#define TPS6286X_MAX_MV 1675 +#define TPS6286X_STEP_MV 5 + +static bool tps6286x_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == TPS6286X_STATUS; +} + +static const struct regmap_config tps6286x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = tps6286x_volatile_reg, +}; + +static int tps6286x_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_FAST: + val = TPS6286X_CONTROL_FPWM; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, TPS6286X_CONTROL, + TPS6286X_CONTROL_FPWM, val); +} + +static unsigned int tps6286x_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, TPS6286X_CONTROL, &val); + if (ret < 0) + return 0; + + return (val & TPS6286X_CONTROL_FPWM) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops tps6286x_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps6286x_set_mode, + .get_mode = tps6286x_get_mode, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, +}; + +static unsigned int tps6286x_of_map_mode(unsigned int mode) +{ + switch (mode) { + case TPS62864_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case TPS62864_MODE_FPWM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regulator_desc tps6286x_reg = { + .name = "tps6286x", + .of_match = "SW", + .owner = THIS_MODULE, + .ops = &tps6286x_regulator_ops, + .of_map_mode = tps6286x_of_map_mode, + .regulators_node = "regulators", + .type = REGULATOR_VOLTAGE, + .n_voltages = ((TPS6286X_MAX_MV - TPS6286X_MIN_MV) / TPS6286X_STEP_MV) + 1, + .min_uV = TPS6286X_MIN_MV * 1000, + .uV_step = TPS6286X_STEP_MV * 1000, + .vsel_reg = TPS6286X_VOUT1, + .vsel_mask = TPS6286X_VOUT1_VO1_SET, + .enable_reg = TPS6286X_CONTROL, + .enable_mask = TPS6286X_CONTROL_SWEN, + .ramp_delay = 1000, + /* tDelay + tRamp, rounded up */ + .enable_time = 3000, +}; + +static const struct of_device_id tps6286x_dt_ids[] = { + { .compatible = "ti,tps62864", }, + { .compatible = "ti,tps62866", }, + { .compatible = "ti,tps62868", }, + { .compatible = "ti,tps62869", }, + { } +}; +MODULE_DEVICE_TABLE(of, tps6286x_dt_ids); + +static int tps6286x_i2c_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regulator_config config = {}; + struct regulator_dev *rdev; + struct regmap *regmap; + + regmap = devm_regmap_init_i2c(i2c, &tps6286x_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + config.dev = &i2c->dev; + config.of_node = dev->of_node; + config.regmap = regmap; + + rdev = devm_regulator_register(&i2c->dev, &tps6286x_reg, &config); + if (IS_ERR(rdev)) { + dev_err(&i2c->dev, "Failed to register tps6286x regulator\n"); + return PTR_ERR(rdev); + } + + return 0; +} + +static const struct i2c_device_id tps6286x_i2c_id[] = { + { .name = "tps62864" }, + { .name = "tps62866" }, + { .name = "tps62868" }, + { .name = "tps62869" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, tps6286x_i2c_id); + +static struct i2c_driver tps6286x_regulator_driver = { + .driver = { + .name = "tps6286x", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = tps6286x_dt_ids, + }, + .probe = tps6286x_i2c_probe, + .id_table = tps6286x_i2c_id, +}; + +module_i2c_driver(tps6286x_regulator_driver); + +MODULE_DESCRIPTION("TI TPS6286x Power Regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps6287x-regulator.c b/drivers/regulator/tps6287x-regulator.c new file mode 100644 index 000000000..e6403398f --- /dev/null +++ b/drivers/regulator/tps6287x-regulator.c @@ -0,0 +1,253 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Axis Communications AB + * + * Driver for Texas Instruments TPS6287x PMIC. + * Datasheet: https://www.ti.com/lit/ds/symlink/tps62873.pdf + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS6287X_VSET 0x00 +#define TPS6287X_CTRL1 0x01 +#define TPS6287X_CTRL1_VRAMP GENMASK(1, 0) +#define TPS6287X_CTRL1_FPWMEN BIT(4) +#define TPS6287X_CTRL1_SWEN BIT(5) +#define TPS6287X_CTRL2 0x02 +#define TPS6287X_CTRL2_VRANGE GENMASK(3, 2) +#define TPS6287X_CTRL3 0x03 +#define TPS6287X_STATUS 0x04 + +static bool tps6287x_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == TPS6287X_STATUS; +} + +static const struct regmap_config tps6287x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = TPS6287X_STATUS, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = tps6287x_volatile_reg, +}; + +static const struct linear_range tps6287x_voltage_ranges[] = { + LINEAR_RANGE(400000, 0, 0xFF, 1250), + LINEAR_RANGE(400000, 0, 0xFF, 2500), + LINEAR_RANGE(400000, 0, 0xFF, 5000), + LINEAR_RANGE(800000, 0, 0xFF, 10000), +}; + +static const unsigned int tps6287x_voltage_range_sel[] = { + 0x0, 0x1, 0x2, 0x3 +}; + +static const unsigned int tps6287x_voltage_range_prefix[] = { + 0x000, 0x100, 0x200, 0x300 +}; + +static const unsigned int tps6287x_ramp_table[] = { + 10000, 5000, 1250, 500 +}; + +struct tps6287x_reg_data { + int range; +}; + +static int tps6287x_best_range(struct regulator_config *config, const struct regulator_desc *desc) +{ + const struct linear_range *r; + int i; + + if (!config->init_data->constraints.apply_uV) + return -1; + + for (i = 0; i < desc->n_linear_ranges; i++) { + r = &desc->linear_ranges[i]; + if (r->min <= config->init_data->constraints.min_uV && + config->init_data->constraints.max_uV <= linear_range_get_max_value(r)) + return i; + } + return -1; +} + +static int tps6287x_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = 0; + break; + case REGULATOR_MODE_FAST: + val = TPS6287X_CTRL1_FPWMEN; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(rdev->regmap, TPS6287X_CTRL1, + TPS6287X_CTRL1_FPWMEN, val); +} + +static unsigned int tps6287x_get_mode(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, TPS6287X_CTRL1, &val); + if (ret < 0) + return 0; + + return (val & TPS6287X_CTRL1_FPWMEN) ? REGULATOR_MODE_FAST : + REGULATOR_MODE_NORMAL; +} + +static unsigned int tps6287x_of_map_mode(unsigned int mode) +{ + switch (mode) { + case REGULATOR_MODE_NORMAL: + case REGULATOR_MODE_FAST: + return mode; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int tps6287x_map_voltage(struct regulator_dev *rdev, int min_uV, int max_uV) +{ + struct tps6287x_reg_data *data = (struct tps6287x_reg_data *)rdev->reg_data; + struct linear_range selected_range; + int selector, voltage; + + if (!data || data->range == -1) + return regulator_map_voltage_pickable_linear_range(rdev, min_uV, max_uV); + + selected_range = rdev->desc->linear_ranges[data->range]; + selector = DIV_ROUND_UP(min_uV - selected_range.min, selected_range.step); + if (selector < selected_range.min_sel || selector > selected_range.max_sel) + return -EINVAL; + + selector |= tps6287x_voltage_range_prefix[data->range]; + voltage = rdev->desc->ops->list_voltage(rdev, selector); + if (voltage < min_uV || voltage > max_uV) + return -EINVAL; + + return selector; +} + +static const struct regulator_ops tps6287x_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps6287x_set_mode, + .get_mode = tps6287x_get_mode, + .is_enabled = regulator_is_enabled_regmap, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = tps6287x_map_voltage, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_desc tps6287x_reg = { + .name = "tps6287x", + .owner = THIS_MODULE, + .ops = &tps6287x_regulator_ops, + .of_map_mode = tps6287x_of_map_mode, + .type = REGULATOR_VOLTAGE, + .enable_reg = TPS6287X_CTRL1, + .enable_mask = TPS6287X_CTRL1_SWEN, + .vsel_reg = TPS6287X_VSET, + .vsel_mask = 0xFF, + .vsel_range_reg = TPS6287X_CTRL2, + .vsel_range_mask = TPS6287X_CTRL2_VRANGE, + .range_applied_by_vsel = true, + .ramp_reg = TPS6287X_CTRL1, + .ramp_mask = TPS6287X_CTRL1_VRAMP, + .ramp_delay_table = tps6287x_ramp_table, + .n_ramp_values = ARRAY_SIZE(tps6287x_ramp_table), + .n_voltages = 256 * ARRAY_SIZE(tps6287x_voltage_ranges), + .linear_ranges = tps6287x_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(tps6287x_voltage_ranges), + .linear_range_selectors_bitfield = tps6287x_voltage_range_sel, +}; + +static int tps6287x_i2c_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regulator_config config = {}; + struct tps6287x_reg_data *reg_data; + struct regulator_dev *rdev; + + reg_data = devm_kzalloc(dev, sizeof(struct tps6287x_reg_data), GFP_KERNEL); + + if (!reg_data) + return -ENOMEM; + + config.regmap = devm_regmap_init_i2c(i2c, &tps6287x_regmap_config); + if (IS_ERR(config.regmap)) { + dev_err(dev, "Failed to init i2c\n"); + return PTR_ERR(config.regmap); + } + + config.dev = dev; + config.of_node = dev->of_node; + config.init_data = of_get_regulator_init_data(dev, dev->of_node, + &tps6287x_reg); + + reg_data->range = tps6287x_best_range(&config, &tps6287x_reg); + + rdev = devm_regulator_register(dev, &tps6287x_reg, &config); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator\n"); + return PTR_ERR(rdev); + } + + rdev->reg_data = (void *)reg_data; + dev_dbg(dev, "Probed regulator\n"); + + return 0; +} + +static const struct of_device_id tps6287x_dt_ids[] = { + { .compatible = "ti,tps62870", }, + { .compatible = "ti,tps62871", }, + { .compatible = "ti,tps62872", }, + { .compatible = "ti,tps62873", }, + { } +}; + +MODULE_DEVICE_TABLE(of, tps6287x_dt_ids); + +static const struct i2c_device_id tps6287x_i2c_id[] = { + { .name = "tps62870" }, + { .name = "tps62871" }, + { .name = "tps62872" }, + { .name = "tps62873" }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, tps6287x_i2c_id); + +static struct i2c_driver tps6287x_regulator_driver = { + .driver = { + .name = "tps6287x", + .of_match_table = tps6287x_dt_ids, + }, + .probe = tps6287x_i2c_probe, + .id_table = tps6287x_i2c_id, +}; + +module_i2c_driver(tps6287x_regulator_driver); + +MODULE_AUTHOR("MÃ¥rten Lindahl "); +MODULE_DESCRIPTION("Regulator driver for TI TPS6287X PMIC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/tps65023-regulator.c b/drivers/regulator/tps65023-regulator.c new file mode 100644 index 000000000..5a2fc57cd --- /dev/null +++ b/drivers/regulator/tps65023-regulator.c @@ -0,0 +1,358 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps65023-regulator.c + * + * Supports TPS65023 Regulator + * + * Copyright (C) 2009 Texas Instrument Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register definitions */ +#define TPS65023_REG_VERSION 0 +#define TPS65023_REG_PGOODZ 1 +#define TPS65023_REG_MASK 2 +#define TPS65023_REG_REG_CTRL 3 +#define TPS65023_REG_CON_CTRL 4 +#define TPS65023_REG_CON_CTRL2 5 +#define TPS65023_REG_DEF_CORE 6 +#define TPS65023_REG_DEFSLEW 7 +#define TPS65023_REG_LDO_CTRL 8 + +/* PGOODZ bitfields */ +#define TPS65023_PGOODZ_PWRFAILZ BIT(7) +#define TPS65023_PGOODZ_LOWBATTZ BIT(6) +#define TPS65023_PGOODZ_VDCDC1 BIT(5) +#define TPS65023_PGOODZ_VDCDC2 BIT(4) +#define TPS65023_PGOODZ_VDCDC3 BIT(3) +#define TPS65023_PGOODZ_LDO2 BIT(2) +#define TPS65023_PGOODZ_LDO1 BIT(1) + +/* MASK bitfields */ +#define TPS65023_MASK_PWRFAILZ BIT(7) +#define TPS65023_MASK_LOWBATTZ BIT(6) +#define TPS65023_MASK_VDCDC1 BIT(5) +#define TPS65023_MASK_VDCDC2 BIT(4) +#define TPS65023_MASK_VDCDC3 BIT(3) +#define TPS65023_MASK_LDO2 BIT(2) +#define TPS65023_MASK_LDO1 BIT(1) + +/* REG_CTRL bitfields */ +#define TPS65023_REG_CTRL_VDCDC1_EN BIT(5) +#define TPS65023_REG_CTRL_VDCDC2_EN BIT(4) +#define TPS65023_REG_CTRL_VDCDC3_EN BIT(3) +#define TPS65023_REG_CTRL_LDO2_EN BIT(2) +#define TPS65023_REG_CTRL_LDO1_EN BIT(1) + +/* REG_CTRL2 bitfields */ +#define TPS65023_REG_CTRL2_GO BIT(7) +#define TPS65023_REG_CTRL2_CORE_ADJ BIT(6) +#define TPS65023_REG_CTRL2_DCDC2 BIT(2) +#define TPS65023_REG_CTRL2_DCDC1 BIT(1) +#define TPS65023_REG_CTRL2_DCDC3 BIT(0) + +/* Number of step-down converters available */ +#define TPS65023_NUM_DCDC 3 +/* Number of LDO voltage regulators available */ +#define TPS65023_NUM_LDO 2 +/* Number of total regulators available */ +#define TPS65023_NUM_REGULATOR (TPS65023_NUM_DCDC + TPS65023_NUM_LDO) + +/* DCDCs */ +#define TPS65023_DCDC_1 0 +#define TPS65023_DCDC_2 1 +#define TPS65023_DCDC_3 2 +/* LDOs */ +#define TPS65023_LDO_1 3 +#define TPS65023_LDO_2 4 + +#define TPS65023_MAX_REG_ID TPS65023_LDO_2 + +#define TPS65023_REGULATOR_DCDC(_num, _t, _em) \ + { \ + .name = "VDCDC"#_num, \ + .of_match = of_match_ptr("VDCDC"#_num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = TPS65023_DCDC_##_num, \ + .n_voltages = ARRAY_SIZE(_t), \ + .ops = &tps65023_dcdc_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .volt_table = _t, \ + .vsel_reg = TPS65023_REG_DEF_CORE, \ + .vsel_mask = ARRAY_SIZE(_t) - 1, \ + .enable_mask = _em, \ + .enable_reg = TPS65023_REG_REG_CTRL, \ + .apply_reg = TPS65023_REG_CON_CTRL2, \ + .apply_bit = TPS65023_REG_CTRL2_GO, \ + } \ + +#define TPS65023_REGULATOR_LDO(_num, _t, _vm) \ + { \ + .name = "LDO"#_num, \ + .of_match = of_match_ptr("LDO"#_num), \ + .regulators_node = of_match_ptr("regulators"), \ + .id = TPS65023_LDO_##_num, \ + .n_voltages = ARRAY_SIZE(_t), \ + .ops = &tps65023_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .volt_table = _t, \ + .vsel_reg = TPS65023_REG_LDO_CTRL, \ + .vsel_mask = _vm, \ + .enable_mask = 1 << (_num), \ + .enable_reg = TPS65023_REG_REG_CTRL, \ + } \ + +/* Supported voltage values for regulators */ +static const unsigned int VCORE_VSEL_table[] = { + 800000, 825000, 850000, 875000, + 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, + 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, + 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, + 1500000, 1525000, 1550000, 1600000, +}; + +static const unsigned int DCDC_FIXED_3300000_VSEL_table[] = { + 3300000, +}; + +static const unsigned int DCDC_FIXED_1800000_VSEL_table[] = { + 1800000, +}; + +/* Supported voltage values for LDO regulators for tps65020 */ +static const unsigned int TPS65020_LDO_VSEL_table[] = { + 1000000, 1050000, 1100000, 1300000, + 1800000, 2500000, 3000000, 3300000, +}; + +/* Supported voltage values for LDO regulators + * for tps65021 and tps65023 */ +static const unsigned int TPS65023_LDO1_VSEL_table[] = { + 1000000, 1100000, 1300000, 1800000, + 2200000, 2600000, 2800000, 3150000, +}; + +static const unsigned int TPS65023_LDO2_VSEL_table[] = { + 1050000, 1200000, 1300000, 1800000, + 2500000, 2800000, 3000000, 3300000, +}; + +/* PMIC details */ +struct tps_pmic { + struct regulator_dev *rdev[TPS65023_NUM_REGULATOR]; + const struct tps_driver_data *driver_data; + struct regmap *regmap; +}; + +/* Struct passed as driver data */ +struct tps_driver_data { + const struct regulator_desc *desc; + u8 core_regulator; +}; + +static int tps65023_dcdc_get_voltage_sel(struct regulator_dev *dev) +{ + struct tps_pmic *tps = rdev_get_drvdata(dev); + int dcdc = rdev_get_id(dev); + + if (dcdc < TPS65023_DCDC_1 || dcdc > TPS65023_DCDC_3) + return -EINVAL; + + if (dcdc != tps->driver_data->core_regulator) + return 0; + + return regulator_get_voltage_sel_regmap(dev); +} + +static int tps65023_dcdc_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct tps_pmic *tps = rdev_get_drvdata(dev); + int dcdc = rdev_get_id(dev); + + if (dcdc != tps->driver_data->core_regulator) + return -EINVAL; + + return regulator_set_voltage_sel_regmap(dev, selector); +} + +/* Operations permitted on VDCDCx */ +static const struct regulator_ops tps65023_dcdc_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = tps65023_dcdc_get_voltage_sel, + .set_voltage_sel = tps65023_dcdc_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, +}; + +/* Operations permitted on LDOx */ +static const struct regulator_ops tps65023_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, +}; + +static const struct regmap_config tps65023_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct regulator_desc tps65020_regulators[] = { + TPS65023_REGULATOR_DCDC(1, DCDC_FIXED_3300000_VSEL_table, 0x20), + TPS65023_REGULATOR_DCDC(2, DCDC_FIXED_1800000_VSEL_table, 0x10), + TPS65023_REGULATOR_DCDC(3, VCORE_VSEL_table, 0x08), + TPS65023_REGULATOR_LDO(1, TPS65020_LDO_VSEL_table, 0x07), + TPS65023_REGULATOR_LDO(2, TPS65020_LDO_VSEL_table, 0x70), +}; + +static const struct regulator_desc tps65021_regulators[] = { + TPS65023_REGULATOR_DCDC(1, DCDC_FIXED_3300000_VSEL_table, 0x20), + TPS65023_REGULATOR_DCDC(2, DCDC_FIXED_1800000_VSEL_table, 0x10), + TPS65023_REGULATOR_DCDC(3, VCORE_VSEL_table, 0x08), + TPS65023_REGULATOR_LDO(1, TPS65023_LDO1_VSEL_table, 0x07), + TPS65023_REGULATOR_LDO(2, TPS65023_LDO2_VSEL_table, 0x70), +}; + +static const struct regulator_desc tps65023_regulators[] = { + TPS65023_REGULATOR_DCDC(1, VCORE_VSEL_table, 0x20), + TPS65023_REGULATOR_DCDC(2, DCDC_FIXED_3300000_VSEL_table, 0x10), + TPS65023_REGULATOR_DCDC(3, DCDC_FIXED_1800000_VSEL_table, 0x08), + TPS65023_REGULATOR_LDO(1, TPS65023_LDO1_VSEL_table, 0x07), + TPS65023_REGULATOR_LDO(2, TPS65023_LDO2_VSEL_table, 0x70), +}; + +static const struct tps_driver_data tps65020_drv_data = { + .desc = tps65020_regulators, + .core_regulator = TPS65023_DCDC_3, +}; + +static const struct tps_driver_data tps65021_drv_data = { + .desc = tps65021_regulators, + .core_regulator = TPS65023_DCDC_3, +}; + +static const struct tps_driver_data tps65023_drv_data = { + .desc = tps65023_regulators, + .core_regulator = TPS65023_DCDC_1, +}; + +static int tps_65023_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct regulator_init_data *init_data = dev_get_platdata(&client->dev); + struct regulator_config config = { }; + struct tps_pmic *tps; + int i; + int error; + + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + tps->driver_data = (struct tps_driver_data *)id->driver_data; + + tps->regmap = devm_regmap_init_i2c(client, &tps65023_regmap_config); + if (IS_ERR(tps->regmap)) { + error = PTR_ERR(tps->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + error); + return error; + } + + /* common for all regulators */ + config.dev = &client->dev; + config.driver_data = tps; + config.regmap = tps->regmap; + + for (i = 0; i < TPS65023_NUM_REGULATOR; i++) { + if (init_data) + config.init_data = &init_data[i]; + + /* Register the regulators */ + tps->rdev[i] = devm_regulator_register(&client->dev, + &tps->driver_data->desc[i], &config); + if (IS_ERR(tps->rdev[i])) { + dev_err(&client->dev, "failed to register %s\n", + id->name); + return PTR_ERR(tps->rdev[i]); + } + } + + i2c_set_clientdata(client, tps); + + /* Enable setting output voltage by I2C */ + regmap_update_bits(tps->regmap, TPS65023_REG_CON_CTRL2, + TPS65023_REG_CTRL2_CORE_ADJ, 0); + + return 0; +} + +static const struct of_device_id __maybe_unused tps65023_of_match[] = { + { .compatible = "ti,tps65020", .data = &tps65020_drv_data}, + { .compatible = "ti,tps65021", .data = &tps65021_drv_data}, + { .compatible = "ti,tps65023", .data = &tps65023_drv_data}, + {}, +}; +MODULE_DEVICE_TABLE(of, tps65023_of_match); + +static const struct i2c_device_id tps_65023_id[] = { + { + .name = "tps65023", + .driver_data = (kernel_ulong_t)&tps65023_drv_data, + }, { + .name = "tps65021", + .driver_data = (kernel_ulong_t)&tps65021_drv_data, + }, { + .name = "tps65020", + .driver_data = (kernel_ulong_t)&tps65020_drv_data, + }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, tps_65023_id); + +static struct i2c_driver tps_65023_i2c_driver = { + .driver = { + .name = "tps65023", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(tps65023_of_match), + }, + .probe = tps_65023_probe, + .id_table = tps_65023_id, +}; + +static int __init tps_65023_init(void) +{ + return i2c_add_driver(&tps_65023_i2c_driver); +} +subsys_initcall(tps_65023_init); + +static void __exit tps_65023_cleanup(void) +{ + i2c_del_driver(&tps_65023_i2c_driver); +} +module_exit(tps_65023_cleanup); + +MODULE_AUTHOR("Texas Instruments"); +MODULE_DESCRIPTION("TPS65023 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps6507x-regulator.c b/drivers/regulator/tps6507x-regulator.c new file mode 100644 index 000000000..6655d9c31 --- /dev/null +++ b/drivers/regulator/tps6507x-regulator.c @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps6507x-regulator.c + * + * Regulator driver for TPS65073 PMIC + * + * Copyright (C) 2009 Texas Instrument Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* DCDC's */ +#define TPS6507X_DCDC_1 0 +#define TPS6507X_DCDC_2 1 +#define TPS6507X_DCDC_3 2 +/* LDOs */ +#define TPS6507X_LDO_1 3 +#define TPS6507X_LDO_2 4 + +#define TPS6507X_MAX_REG_ID TPS6507X_LDO_2 + +/* Number of step-down converters available */ +#define TPS6507X_NUM_DCDC 3 +/* Number of LDO voltage regulators available */ +#define TPS6507X_NUM_LDO 2 +/* Number of total regulators available */ +#define TPS6507X_NUM_REGULATOR (TPS6507X_NUM_DCDC + TPS6507X_NUM_LDO) + +/* Supported voltage values for regulators (in microVolts) */ +static const unsigned int VDCDCx_VSEL_table[] = { + 725000, 750000, 775000, 800000, + 825000, 850000, 875000, 900000, + 925000, 950000, 975000, 1000000, + 1025000, 1050000, 1075000, 1100000, + 1125000, 1150000, 1175000, 1200000, + 1225000, 1250000, 1275000, 1300000, + 1325000, 1350000, 1375000, 1400000, + 1425000, 1450000, 1475000, 1500000, + 1550000, 1600000, 1650000, 1700000, + 1750000, 1800000, 1850000, 1900000, + 1950000, 2000000, 2050000, 2100000, + 2150000, 2200000, 2250000, 2300000, + 2350000, 2400000, 2450000, 2500000, + 2550000, 2600000, 2650000, 2700000, + 2750000, 2800000, 2850000, 2900000, + 3000000, 3100000, 3200000, 3300000, +}; + +static const unsigned int LDO1_VSEL_table[] = { + 1000000, 1100000, 1200000, 1250000, + 1300000, 1350000, 1400000, 1500000, + 1600000, 1800000, 2500000, 2750000, + 2800000, 3000000, 3100000, 3300000, +}; + +/* The voltage mapping table for LDO2 is the same as VDCDCx */ +#define LDO2_VSEL_table VDCDCx_VSEL_table + +struct tps_info { + const char *name; + u8 table_len; + const unsigned int *table; + + /* Does DCDC high or the low register defines output voltage? */ + bool defdcdc_default; +}; + +static struct tps_info tps6507x_pmic_regs[] = { + { + .name = "VDCDC1", + .table_len = ARRAY_SIZE(VDCDCx_VSEL_table), + .table = VDCDCx_VSEL_table, + }, + { + .name = "VDCDC2", + .table_len = ARRAY_SIZE(VDCDCx_VSEL_table), + .table = VDCDCx_VSEL_table, + }, + { + .name = "VDCDC3", + .table_len = ARRAY_SIZE(VDCDCx_VSEL_table), + .table = VDCDCx_VSEL_table, + }, + { + .name = "LDO1", + .table_len = ARRAY_SIZE(LDO1_VSEL_table), + .table = LDO1_VSEL_table, + }, + { + .name = "LDO2", + .table_len = ARRAY_SIZE(LDO2_VSEL_table), + .table = LDO2_VSEL_table, + }, +}; + +struct tps6507x_pmic { + struct regulator_desc desc[TPS6507X_NUM_REGULATOR]; + struct tps6507x_dev *mfd; + struct tps_info *info[TPS6507X_NUM_REGULATOR]; + struct mutex io_lock; +}; +static inline int tps6507x_pmic_read(struct tps6507x_pmic *tps, u8 reg) +{ + u8 val; + int err; + + err = tps->mfd->read_dev(tps->mfd, reg, 1, &val); + + if (err) + return err; + + return val; +} + +static inline int tps6507x_pmic_write(struct tps6507x_pmic *tps, u8 reg, u8 val) +{ + return tps->mfd->write_dev(tps->mfd, reg, 1, &val); +} + +static int tps6507x_pmic_set_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask) +{ + int err, data; + + mutex_lock(&tps->io_lock); + + data = tps6507x_pmic_read(tps, reg); + if (data < 0) { + dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg); + err = data; + goto out; + } + + data |= mask; + err = tps6507x_pmic_write(tps, reg, data); + if (err) + dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg); + +out: + mutex_unlock(&tps->io_lock); + return err; +} + +static int tps6507x_pmic_clear_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask) +{ + int err, data; + + mutex_lock(&tps->io_lock); + + data = tps6507x_pmic_read(tps, reg); + if (data < 0) { + dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg); + err = data; + goto out; + } + + data &= ~mask; + err = tps6507x_pmic_write(tps, reg, data); + if (err) + dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg); + +out: + mutex_unlock(&tps->io_lock); + return err; +} + +static int tps6507x_pmic_reg_read(struct tps6507x_pmic *tps, u8 reg) +{ + int data; + + mutex_lock(&tps->io_lock); + + data = tps6507x_pmic_read(tps, reg); + if (data < 0) + dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg); + + mutex_unlock(&tps->io_lock); + return data; +} + +static int tps6507x_pmic_reg_write(struct tps6507x_pmic *tps, u8 reg, u8 val) +{ + int err; + + mutex_lock(&tps->io_lock); + + err = tps6507x_pmic_write(tps, reg, val); + if (err < 0) + dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg); + + mutex_unlock(&tps->io_lock); + return err; +} + +static int tps6507x_pmic_is_enabled(struct regulator_dev *dev) +{ + struct tps6507x_pmic *tps = rdev_get_drvdata(dev); + int data, rid = rdev_get_id(dev); + u8 shift; + + if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2) + return -EINVAL; + + shift = TPS6507X_MAX_REG_ID - rid; + data = tps6507x_pmic_reg_read(tps, TPS6507X_REG_CON_CTRL1); + + if (data < 0) + return data; + else + return (data & 1< TPS6507X_LDO_2) + return -EINVAL; + + shift = TPS6507X_MAX_REG_ID - rid; + return tps6507x_pmic_set_bits(tps, TPS6507X_REG_CON_CTRL1, 1 << shift); +} + +static int tps6507x_pmic_disable(struct regulator_dev *dev) +{ + struct tps6507x_pmic *tps = rdev_get_drvdata(dev); + int rid = rdev_get_id(dev); + u8 shift; + + if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2) + return -EINVAL; + + shift = TPS6507X_MAX_REG_ID - rid; + return tps6507x_pmic_clear_bits(tps, TPS6507X_REG_CON_CTRL1, + 1 << shift); +} + +static int tps6507x_pmic_get_voltage_sel(struct regulator_dev *dev) +{ + struct tps6507x_pmic *tps = rdev_get_drvdata(dev); + int data, rid = rdev_get_id(dev); + u8 reg, mask; + + switch (rid) { + case TPS6507X_DCDC_1: + reg = TPS6507X_REG_DEFDCDC1; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_DCDC_2: + if (tps->info[rid]->defdcdc_default) + reg = TPS6507X_REG_DEFDCDC2_HIGH; + else + reg = TPS6507X_REG_DEFDCDC2_LOW; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_DCDC_3: + if (tps->info[rid]->defdcdc_default) + reg = TPS6507X_REG_DEFDCDC3_HIGH; + else + reg = TPS6507X_REG_DEFDCDC3_LOW; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_LDO_1: + reg = TPS6507X_REG_LDO_CTRL1; + mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK; + break; + case TPS6507X_LDO_2: + reg = TPS6507X_REG_DEFLDO2; + mask = TPS6507X_REG_DEFLDO2_LDO2_MASK; + break; + default: + return -EINVAL; + } + + data = tps6507x_pmic_reg_read(tps, reg); + if (data < 0) + return data; + + data &= mask; + return data; +} + +static int tps6507x_pmic_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct tps6507x_pmic *tps = rdev_get_drvdata(dev); + int data, rid = rdev_get_id(dev); + u8 reg, mask; + + switch (rid) { + case TPS6507X_DCDC_1: + reg = TPS6507X_REG_DEFDCDC1; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_DCDC_2: + if (tps->info[rid]->defdcdc_default) + reg = TPS6507X_REG_DEFDCDC2_HIGH; + else + reg = TPS6507X_REG_DEFDCDC2_LOW; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_DCDC_3: + if (tps->info[rid]->defdcdc_default) + reg = TPS6507X_REG_DEFDCDC3_HIGH; + else + reg = TPS6507X_REG_DEFDCDC3_LOW; + mask = TPS6507X_DEFDCDCX_DCDC_MASK; + break; + case TPS6507X_LDO_1: + reg = TPS6507X_REG_LDO_CTRL1; + mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK; + break; + case TPS6507X_LDO_2: + reg = TPS6507X_REG_DEFLDO2; + mask = TPS6507X_REG_DEFLDO2_LDO2_MASK; + break; + default: + return -EINVAL; + } + + data = tps6507x_pmic_reg_read(tps, reg); + if (data < 0) + return data; + + data &= ~mask; + data |= selector; + + return tps6507x_pmic_reg_write(tps, reg, data); +} + +static const struct regulator_ops tps6507x_pmic_ops = { + .is_enabled = tps6507x_pmic_is_enabled, + .enable = tps6507x_pmic_enable, + .disable = tps6507x_pmic_disable, + .get_voltage_sel = tps6507x_pmic_get_voltage_sel, + .set_voltage_sel = tps6507x_pmic_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, +}; + +static int tps6507x_pmic_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct tps6507x_pmic *tps = config->driver_data; + struct tps_info *info = tps->info[desc->id]; + u32 prop; + int ret; + + ret = of_property_read_u32(np, "ti,defdcdc_default", &prop); + if (!ret) + info->defdcdc_default = prop; + + return 0; +} + +static int tps6507x_pmic_probe(struct platform_device *pdev) +{ + struct tps6507x_dev *tps6507x_dev = dev_get_drvdata(pdev->dev.parent); + struct tps_info *info = &tps6507x_pmic_regs[0]; + struct regulator_config config = { }; + struct regulator_init_data *init_data = NULL; + struct regulator_dev *rdev; + struct tps6507x_pmic *tps; + struct tps6507x_board *tps_board; + int i; + + /** + * tps_board points to pmic related constants + * coming from the board-evm file. + */ + + tps_board = dev_get_platdata(tps6507x_dev->dev); + if (tps_board) + init_data = tps_board->tps6507x_pmic_init_data; + + tps = devm_kzalloc(&pdev->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + mutex_init(&tps->io_lock); + + /* common for all regulators */ + tps->mfd = tps6507x_dev; + + for (i = 0; i < TPS6507X_NUM_REGULATOR; i++, info++) { + /* Register the regulators */ + tps->info[i] = info; + if (init_data && init_data[i].driver_data) { + struct tps6507x_reg_platform_data *data = + init_data[i].driver_data; + info->defdcdc_default = data->defdcdc_default; + } + + tps->desc[i].name = info->name; + tps->desc[i].of_match = of_match_ptr(info->name); + tps->desc[i].regulators_node = of_match_ptr("regulators"); + tps->desc[i].of_parse_cb = tps6507x_pmic_of_parse_cb; + tps->desc[i].id = i; + tps->desc[i].n_voltages = info->table_len; + tps->desc[i].volt_table = info->table; + tps->desc[i].ops = &tps6507x_pmic_ops; + tps->desc[i].type = REGULATOR_VOLTAGE; + tps->desc[i].owner = THIS_MODULE; + + config.dev = tps6507x_dev->dev; + config.init_data = init_data; + config.driver_data = tps; + + rdev = devm_regulator_register(&pdev->dev, &tps->desc[i], + &config); + if (IS_ERR(rdev)) { + dev_err(tps6507x_dev->dev, + "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + } + + tps6507x_dev->pmic = tps; + platform_set_drvdata(pdev, tps6507x_dev); + + return 0; +} + +static struct platform_driver tps6507x_pmic_driver = { + .driver = { + .name = "tps6507x-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps6507x_pmic_probe, +}; + +static int __init tps6507x_pmic_init(void) +{ + return platform_driver_register(&tps6507x_pmic_driver); +} +subsys_initcall(tps6507x_pmic_init); + +static void __exit tps6507x_pmic_cleanup(void) +{ + platform_driver_unregister(&tps6507x_pmic_driver); +} +module_exit(tps6507x_pmic_cleanup); + +MODULE_AUTHOR("Texas Instruments"); +MODULE_DESCRIPTION("TPS6507x voltage regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:tps6507x-pmic"); diff --git a/drivers/regulator/tps65086-regulator.c b/drivers/regulator/tps65086-regulator.c new file mode 100644 index 000000000..94bf96856 --- /dev/null +++ b/drivers/regulator/tps65086-regulator.c @@ -0,0 +1,419 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ + * + * Author: Andrew F. Davis + * + * Based on the TPS65912 driver + */ + +#include +#include +#include +#include + +#include + +enum tps65086_regulators { BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, LDOA1, + LDOA2, LDOA3, VTT, SWA1, SWB1, SWB2 }; + +/* Selector for regulator configuration regarding PMIC chip ID. */ +enum tps65086_ids { + TPS6508640 = 0, + TPS65086401, + TPS6508641, + TPS65086470, +}; + +#define TPS65086_REGULATOR(_name, _of, _id, _nv, _vr, _vm, _er, _em, _lr, _dr, _dm) \ + [_id] = { \ + .desc = { \ + .name = _name, \ + .of_match = of_match_ptr(_of), \ + .regulators_node = "regulators", \ + .of_parse_cb = tps65086_of_parse_cb, \ + .id = _id, \ + .ops = ®_ops, \ + .n_voltages = _nv, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .volt_table = NULL, \ + .linear_ranges = _lr, \ + .n_linear_ranges = ARRAY_SIZE(_lr), \ + }, \ + .decay_reg = _dr, \ + .decay_mask = _dm, \ + } + +#define TPS65086_SWITCH(_name, _of, _id, _er, _em) \ + [_id] = { \ + .desc = { \ + .name = _name, \ + .of_match = of_match_ptr(_of), \ + .regulators_node = "regulators", \ + .of_parse_cb = tps65086_of_parse_cb, \ + .id = _id, \ + .ops = &switch_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + }, \ + } + + +#define TPS65086_REGULATOR_CONFIG(_chip_id, _config) \ + [_chip_id] = { \ + .config = _config, \ + .num_elems = ARRAY_SIZE(_config), \ + } + +struct tps65086_regulator { + struct regulator_desc desc; + unsigned int decay_reg; + unsigned int decay_mask; +}; + +struct tps65086_regulator_config { + struct tps65086_regulator * const config; + const unsigned int num_elems; +}; + +static const struct linear_range tps65086_10mv_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(410000, 0x1, 0x7F, 10000), +}; + +static const struct linear_range tps65086_buck126_25mv_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x18, 0), + REGULATOR_LINEAR_RANGE(1025000, 0x19, 0x7F, 25000), +}; + +static const struct linear_range tps65086_buck345_25mv_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(425000, 0x1, 0x7F, 25000), +}; + +static const struct linear_range tps65086_ldoa1_ranges[] = { + REGULATOR_LINEAR_RANGE(1350000, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(1500000, 0x1, 0x7, 100000), + REGULATOR_LINEAR_RANGE(2300000, 0x8, 0xB, 100000), + REGULATOR_LINEAR_RANGE(2850000, 0xC, 0xD, 150000), + REGULATOR_LINEAR_RANGE(3300000, 0xE, 0xE, 0), +}; + +static const struct linear_range tps65086_ldoa23_ranges[] = { + REGULATOR_LINEAR_RANGE(700000, 0x0, 0xD, 50000), + REGULATOR_LINEAR_RANGE(1400000, 0xE, 0xF, 100000), +}; + +/* Operations permitted on regulators */ +static const struct regulator_ops reg_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, +}; + +/* Operations permitted on load switches */ +static const struct regulator_ops switch_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int tps65086_of_parse_cb(struct device_node *dev, + const struct regulator_desc *desc, + struct regulator_config *config); + +static struct tps65086_regulator tps6508640_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), + TPS65086_SWITCH("SWB2", "swb2", SWB2, TPS65086_LDOA1CTRL, BIT(0)), +}; + +static struct tps65086_regulator tps65086401_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), +}; + +static struct tps65086_regulator tps6508641_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), +}; + +static struct tps65086_regulator tps65086470_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_LDOA1CTRL, BIT(0), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), + TPS65086_SWITCH("SWB2", "swb2", SWB2, TPS65086_SWVTT_EN, BIT(7)), +}; + +static const struct tps65086_regulator_config regulator_configs[] = { + TPS65086_REGULATOR_CONFIG(TPS6508640, tps6508640_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS65086401, tps65086401_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS6508641, tps6508641_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS65086470, tps65086470_regulator_config) +}; + +static int tps65086_of_parse_cb(struct device_node *node, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct tps65086 * const tps = dev_get_drvdata(config->dev); + struct tps65086_regulator *regulators = tps->reg_config->config; + int ret; + + /* Check for 25mV step mode */ + if (of_property_read_bool(node, "ti,regulator-step-size-25mv")) { + switch (desc->id) { + case BUCK1: + case BUCK2: + case BUCK6: + regulators[desc->id].desc.linear_ranges = + tps65086_buck126_25mv_ranges; + regulators[desc->id].desc.n_linear_ranges = + ARRAY_SIZE(tps65086_buck126_25mv_ranges); + break; + case BUCK3: + case BUCK4: + case BUCK5: + regulators[desc->id].desc.linear_ranges = + tps65086_buck345_25mv_ranges; + regulators[desc->id].desc.n_linear_ranges = + ARRAY_SIZE(tps65086_buck345_25mv_ranges); + break; + default: + dev_warn(config->dev, "25mV step mode only valid for BUCK regulators\n"); + } + } + + /* Check for decay mode */ + if (desc->id <= BUCK6 && of_property_read_bool(node, "ti,regulator-decay")) { + ret = regmap_write_bits(config->regmap, + regulators[desc->id].decay_reg, + regulators[desc->id].decay_mask, + regulators[desc->id].decay_mask); + if (ret) { + dev_err(config->dev, "Error setting decay\n"); + return ret; + } + } + + return 0; +} + +static int tps65086_regulator_probe(struct platform_device *pdev) +{ + struct tps65086 *tps = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + unsigned int selector_reg_config; + struct regulator_dev *rdev; + int i; + + /* Select regulator configuration for used PMIC device */ + switch (tps->chip_id) { + case TPS6508640_ID: + selector_reg_config = TPS6508640; + break; + case TPS65086401_ID: + selector_reg_config = TPS65086401; + break; + case TPS6508641_ID: + selector_reg_config = TPS6508641; + break; + case TPS65086470_ID: + selector_reg_config = TPS65086470; + break; + default: + dev_err(tps->dev, "Unknown device ID. Cannot determine regulator config.\n"); + return -ENODEV; + } + tps->reg_config = ®ulator_configs[selector_reg_config]; + + platform_set_drvdata(pdev, tps); + + config.dev = &pdev->dev; + config.dev->of_node = tps->dev->of_node; + config.driver_data = tps; + config.regmap = tps->regmap; + + for (i = 0; i < tps->reg_config->num_elems; ++i) { + struct regulator_desc * const desc_ptr = &tps->reg_config->config[i].desc; + + dev_dbg(tps->dev, "Index: %u; Regulator name: \"%s\"; Regulator ID: %d\n", + i, desc_ptr->name, desc_ptr->id); + + rdev = devm_regulator_register(&pdev->dev, desc_ptr, &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "failed to register %d \"%s\" regulator\n", + i, desc_ptr->name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id tps65086_regulator_id_table[] = { + { .name = "tps65086-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, tps65086_regulator_id_table); + +static struct platform_driver tps65086_regulator_driver = { + .driver = { + .name = "tps65086-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65086_regulator_probe, + .id_table = tps65086_regulator_id_table, +}; +module_platform_driver(tps65086_regulator_driver); + +MODULE_AUTHOR("Andrew F. Davis "); +MODULE_DESCRIPTION("TPS65086 Regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps65090-regulator.c b/drivers/regulator/tps65090-regulator.c new file mode 100644 index 000000000..8f916ee36 --- /dev/null +++ b/drivers/regulator/tps65090-regulator.c @@ -0,0 +1,534 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for tps65090 power management chip. + * + * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. + + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_CTRL_READ_TRIES 5 +#define MAX_FET_ENABLE_TRIES 1000 + +#define CTRL_EN_BIT 0 /* Regulator enable bit, active high */ +#define CTRL_WT_BIT 2 /* Regulator wait time 0 bit */ +#define CTRL_PG_BIT 4 /* Regulator power good bit, 1=good */ +#define CTRL_TO_BIT 7 /* Regulator timeout bit, 1=wait */ + +#define MAX_OVERCURRENT_WAIT 3 /* Overcurrent wait must be <= this */ + +/** + * struct tps65090_regulator - Per-regulator data for a tps65090 regulator + * + * @dev: Pointer to our device. + * @desc: The struct regulator_desc for the regulator. + * @rdev: The struct regulator_dev for the regulator. + * @overcurrent_wait_valid: True if overcurrent_wait is valid. + * @overcurrent_wait: For FETs, the value to put in the WTFET bitfield. + */ + +struct tps65090_regulator { + struct device *dev; + struct regulator_desc *desc; + struct regulator_dev *rdev; + bool overcurrent_wait_valid; + int overcurrent_wait; +}; + +static const struct regulator_ops tps65090_ext_control_ops = { +}; + +/** + * tps65090_reg_set_overcurrent_wait - Setup overcurrent wait + * + * This will set the overcurrent wait time based on what's in the regulator + * info. + * + * @ri: Overall regulator data + * @rdev: Regulator device + * + * Return: 0 if no error, non-zero if there was an error writing the register. + */ +static int tps65090_reg_set_overcurrent_wait(struct tps65090_regulator *ri, + struct regulator_dev *rdev) +{ + int ret; + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + MAX_OVERCURRENT_WAIT << CTRL_WT_BIT, + ri->overcurrent_wait << CTRL_WT_BIT); + if (ret) { + dev_err(&rdev->dev, "Error updating overcurrent wait %#x\n", + rdev->desc->enable_reg); + } + + return ret; +} + +/** + * tps65090_try_enable_fet - Try to enable a FET + * + * @rdev: Regulator device + * + * Return: 0 if ok, -ENOTRECOVERABLE if the FET power good bit did not get + * set, or some other -ve value if another error occurred (e.g. i2c error) + */ +static int tps65090_try_enable_fet(struct regulator_dev *rdev) +{ + unsigned int control; + int ret, i; + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + rdev->desc->enable_mask); + if (ret < 0) { + dev_err(&rdev->dev, "Error in updating reg %#x\n", + rdev->desc->enable_reg); + return ret; + } + + for (i = 0; i < MAX_CTRL_READ_TRIES; i++) { + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, + &control); + if (ret < 0) + return ret; + + if (!(control & BIT(CTRL_TO_BIT))) + break; + + usleep_range(1000, 1500); + } + if (!(control & BIT(CTRL_PG_BIT))) + return -ENOTRECOVERABLE; + + return 0; +} + +/** + * tps65090_fet_enable - Enable a FET, trying a few times if it fails + * + * Some versions of the tps65090 have issues when turning on the FETs. + * This function goes through several steps to ensure the best chance of the + * FET going on. Specifically: + * - We'll make sure that we bump the "overcurrent wait" to the maximum, which + * increases the chances that we'll turn on properly. + * - We'll retry turning the FET on multiple times (turning off in between). + * + * @rdev: Regulator device + * + * Return: 0 if ok, non-zero if it fails. + */ +static int tps65090_fet_enable(struct regulator_dev *rdev) +{ + int ret, tries; + + /* + * Try enabling multiple times until we succeed since sometimes the + * first try times out. + */ + tries = 0; + while (true) { + ret = tps65090_try_enable_fet(rdev); + if (!ret) + break; + if (ret != -ENOTRECOVERABLE || tries == MAX_FET_ENABLE_TRIES) + goto err; + + /* Try turning the FET off (and then on again) */ + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, 0); + if (ret) + goto err; + + tries++; + } + + if (tries) + dev_warn(&rdev->dev, "reg %#x enable ok after %d tries\n", + rdev->desc->enable_reg, tries); + + return 0; +err: + dev_warn(&rdev->dev, "reg %#x enable failed\n", rdev->desc->enable_reg); + WARN_ON(1); + + return ret; +} + +static const struct regulator_ops tps65090_reg_control_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops tps65090_fet_control_ops = { + .enable = tps65090_fet_enable, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops tps65090_ldo_ops = { +}; + +#define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \ +{ \ + .name = "TPS65090_RAILS"#_id, \ + .supply_name = _sname, \ + .id = TPS65090_REGULATOR_##_id, \ + .n_voltages = _nvolt, \ + .ops = &_ops, \ + .fixed_uV = _volt, \ + .enable_reg = _en_reg, \ + .enable_val = _en_bits, \ + .enable_mask = _en_bits, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ +} + +#define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \ + tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 1, _volt, _ops) + +#define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \ + tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 0, 0, _ops) + +static struct regulator_desc tps65090_regulator_desc[] = { + tps65090_REG_FIXEDV(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT), 5000000, + tps65090_reg_control_ops), + tps65090_REG_FIXEDV(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 3300000, + tps65090_reg_control_ops), + tps65090_REG_SWITCH(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT), + tps65090_reg_control_ops), + + tps65090_REG_SWITCH(FET1, "infet1", 0x0F, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET2, "infet2", 0x10, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET3, "infet3", 0x11, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET4, "infet4", 0x12, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET5, "infet5", 0x13, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET6, "infet6", 0x14, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + tps65090_REG_SWITCH(FET7, "infet7", 0x15, + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), + tps65090_fet_control_ops), + + tps65090_REG_FIXEDV(LDO1, "vsys-l1", 0, 0, 5000000, + tps65090_ldo_ops), + tps65090_REG_FIXEDV(LDO2, "vsys-l2", 0, 0, 3300000, + tps65090_ldo_ops), +}; + +static inline bool is_dcdc(int id) +{ + switch (id) { + case TPS65090_REGULATOR_DCDC1: + case TPS65090_REGULATOR_DCDC2: + case TPS65090_REGULATOR_DCDC3: + return true; + default: + return false; + } +} + +static int tps65090_config_ext_control( + struct tps65090_regulator *ri, bool enable) +{ + int ret; + struct device *parent = ri->dev->parent; + unsigned int reg_en_reg = ri->desc->enable_reg; + + if (enable) + ret = tps65090_set_bits(parent, reg_en_reg, 1); + else + ret = tps65090_clr_bits(parent, reg_en_reg, 1); + if (ret < 0) + dev_err(ri->dev, "Error in updating reg 0x%x\n", reg_en_reg); + return ret; +} + +static int tps65090_regulator_disable_ext_control( + struct tps65090_regulator *ri, + struct tps65090_regulator_plat_data *tps_pdata) +{ + int ret = 0; + struct device *parent = ri->dev->parent; + unsigned int reg_en_reg = ri->desc->enable_reg; + + /* + * First enable output for internal control if require. + * And then disable external control. + */ + if (tps_pdata->reg_init_data->constraints.always_on || + tps_pdata->reg_init_data->constraints.boot_on) { + ret = tps65090_set_bits(parent, reg_en_reg, 0); + if (ret < 0) { + dev_err(ri->dev, "Error in set reg 0x%x\n", reg_en_reg); + return ret; + } + } + return tps65090_config_ext_control(ri, false); +} + +#ifdef CONFIG_OF +static struct of_regulator_match tps65090_matches[] = { + { .name = "dcdc1", }, + { .name = "dcdc2", }, + { .name = "dcdc3", }, + { .name = "fet1", }, + { .name = "fet2", }, + { .name = "fet3", }, + { .name = "fet4", }, + { .name = "fet5", }, + { .name = "fet6", }, + { .name = "fet7", }, + { .name = "ldo1", }, + { .name = "ldo2", }, +}; + +static struct tps65090_platform_data *tps65090_parse_dt_reg_data( + struct platform_device *pdev, + struct of_regulator_match **tps65090_reg_matches) +{ + struct tps65090_platform_data *tps65090_pdata; + struct device_node *np = pdev->dev.parent->of_node; + struct device_node *regulators; + int idx = 0, ret; + struct tps65090_regulator_plat_data *reg_pdata; + + tps65090_pdata = devm_kzalloc(&pdev->dev, sizeof(*tps65090_pdata), + GFP_KERNEL); + if (!tps65090_pdata) + return ERR_PTR(-ENOMEM); + + reg_pdata = devm_kcalloc(&pdev->dev, + TPS65090_REGULATOR_MAX, sizeof(*reg_pdata), + GFP_KERNEL); + if (!reg_pdata) + return ERR_PTR(-ENOMEM); + + regulators = of_get_child_by_name(np, "regulators"); + if (!regulators) { + dev_err(&pdev->dev, "regulator node not found\n"); + return ERR_PTR(-ENODEV); + } + + ret = of_regulator_match(&pdev->dev, regulators, tps65090_matches, + ARRAY_SIZE(tps65090_matches)); + of_node_put(regulators); + if (ret < 0) { + dev_err(&pdev->dev, + "Error parsing regulator init data: %d\n", ret); + return ERR_PTR(ret); + } + + *tps65090_reg_matches = tps65090_matches; + for (idx = 0; idx < ARRAY_SIZE(tps65090_matches); idx++) { + struct regulator_init_data *ri_data; + struct tps65090_regulator_plat_data *rpdata; + struct device_node *np; + + rpdata = ®_pdata[idx]; + ri_data = tps65090_matches[idx].init_data; + if (!ri_data) + continue; + + np = tps65090_matches[idx].of_node; + if (!np) + continue; + + rpdata->reg_init_data = ri_data; + rpdata->enable_ext_control = of_property_read_bool(np, + "ti,enable-ext-control"); + if (rpdata->enable_ext_control) { + enum gpiod_flags gflags; + + if (ri_data->constraints.always_on || + ri_data->constraints.boot_on) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_LOW; + gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE; + + rpdata->gpiod = devm_fwnode_gpiod_get( + &pdev->dev, + of_fwnode_handle(np), + "dcdc-ext-control", + gflags, + "tps65090"); + if (PTR_ERR(rpdata->gpiod) == -ENOENT) { + dev_err(&pdev->dev, + "could not find DCDC external control GPIO\n"); + rpdata->gpiod = NULL; + } else if (IS_ERR(rpdata->gpiod)) + return ERR_CAST(rpdata->gpiod); + } + + if (of_property_read_u32(np, "ti,overcurrent-wait", + &rpdata->overcurrent_wait) == 0) + rpdata->overcurrent_wait_valid = true; + + tps65090_pdata->reg_pdata[idx] = rpdata; + } + return tps65090_pdata; +} +#else +static inline struct tps65090_platform_data *tps65090_parse_dt_reg_data( + struct platform_device *pdev, + struct of_regulator_match **tps65090_reg_matches) +{ + *tps65090_reg_matches = NULL; + return NULL; +} +#endif + +static int tps65090_regulator_probe(struct platform_device *pdev) +{ + struct tps65090 *tps65090_mfd = dev_get_drvdata(pdev->dev.parent); + struct tps65090_regulator *ri = NULL; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct tps65090_regulator_plat_data *tps_pdata; + struct tps65090_regulator *pmic; + struct tps65090_platform_data *tps65090_pdata; + struct of_regulator_match *tps65090_reg_matches = NULL; + int num; + int ret; + + dev_dbg(&pdev->dev, "Probing regulator\n"); + + tps65090_pdata = dev_get_platdata(pdev->dev.parent); + if (!tps65090_pdata && tps65090_mfd->dev->of_node) + tps65090_pdata = tps65090_parse_dt_reg_data(pdev, + &tps65090_reg_matches); + if (IS_ERR_OR_NULL(tps65090_pdata)) { + dev_err(&pdev->dev, "Platform data missing\n"); + return tps65090_pdata ? PTR_ERR(tps65090_pdata) : -EINVAL; + } + + pmic = devm_kcalloc(&pdev->dev, + TPS65090_REGULATOR_MAX, sizeof(*pmic), + GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + for (num = 0; num < TPS65090_REGULATOR_MAX; num++) { + tps_pdata = tps65090_pdata->reg_pdata[num]; + + ri = &pmic[num]; + ri->dev = &pdev->dev; + ri->desc = &tps65090_regulator_desc[num]; + if (tps_pdata) { + ri->overcurrent_wait_valid = + tps_pdata->overcurrent_wait_valid; + ri->overcurrent_wait = tps_pdata->overcurrent_wait; + } + + /* + * TPS5090 DCDC support the control from external digital input. + * Configure it as per platform data. + */ + if (tps_pdata && is_dcdc(num) && tps_pdata->reg_init_data) { + if (tps_pdata->enable_ext_control) { + config.ena_gpiod = tps_pdata->gpiod; + ri->desc->ops = &tps65090_ext_control_ops; + } else { + ret = tps65090_regulator_disable_ext_control( + ri, tps_pdata); + if (ret < 0) { + dev_err(&pdev->dev, + "failed disable ext control\n"); + return ret; + } + } + } + + config.dev = pdev->dev.parent; + config.driver_data = ri; + config.regmap = tps65090_mfd->rmap; + if (tps_pdata) + config.init_data = tps_pdata->reg_init_data; + else + config.init_data = NULL; + if (tps65090_reg_matches) + config.of_node = tps65090_reg_matches[num].of_node; + else + config.of_node = NULL; + + /* + * Hand the GPIO descriptor management over to the regulator + * core, remove it from devres management. + */ + if (config.ena_gpiod) + devm_gpiod_unhinge(&pdev->dev, config.ena_gpiod); + rdev = devm_regulator_register(&pdev->dev, ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + ri->desc->name); + return PTR_ERR(rdev); + } + ri->rdev = rdev; + + if (ri->overcurrent_wait_valid) { + ret = tps65090_reg_set_overcurrent_wait(ri, rdev); + if (ret < 0) + return ret; + } + + /* Enable external control if it is require */ + if (tps_pdata && is_dcdc(num) && tps_pdata->reg_init_data && + tps_pdata->enable_ext_control) { + ret = tps65090_config_ext_control(ri, true); + if (ret < 0) + return ret; + } + } + + platform_set_drvdata(pdev, pmic); + return 0; +} + +static struct platform_driver tps65090_regulator_driver = { + .driver = { + .name = "tps65090-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65090_regulator_probe, +}; + +static int __init tps65090_regulator_init(void) +{ + return platform_driver_register(&tps65090_regulator_driver); +} +subsys_initcall(tps65090_regulator_init); + +static void __exit tps65090_regulator_exit(void) +{ + platform_driver_unregister(&tps65090_regulator_driver); +} +module_exit(tps65090_regulator_exit); + +MODULE_DESCRIPTION("tps65090 regulator driver"); +MODULE_AUTHOR("Venu Byravarasu "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:tps65090-pmic"); diff --git a/drivers/regulator/tps65132-regulator.c b/drivers/regulator/tps65132-regulator.c new file mode 100644 index 000000000..fecda3fd8 --- /dev/null +++ b/drivers/regulator/tps65132-regulator.c @@ -0,0 +1,291 @@ +/* + * TI TPS65132 Regulator driver + * + * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved. + * + * Author: Venkat Reddy Talla + * Laxman Dewangan + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, + * whether express or implied; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS65132_REG_VPOS 0x00 +#define TPS65132_REG_VNEG 0x01 +#define TPS65132_REG_APPS_DISP_DISN 0x03 +#define TPS65132_REG_CONTROL 0x0FF + +#define TPS65132_VOUT_MASK 0x1F +#define TPS65132_VOUT_N_VOLTAGE 0x15 +#define TPS65132_VOUT_VMIN 4000000 +#define TPS65132_VOUT_VMAX 6000000 +#define TPS65132_VOUT_STEP 100000 + +#define TPS65132_REG_APPS_DIS_VPOS BIT(0) +#define TPS65132_REG_APPS_DIS_VNEG BIT(1) + +#define TPS65132_REGULATOR_ID_VPOS 0 +#define TPS65132_REGULATOR_ID_VNEG 1 +#define TPS65132_MAX_REGULATORS 2 + +#define TPS65132_ACT_DIS_TIME_SLACK 1000 + +struct tps65132_reg_pdata { + struct gpio_desc *en_gpiod; + struct gpio_desc *act_dis_gpiod; + unsigned int act_dis_time_us; + int ena_gpio_state; +}; + +struct tps65132_regulator { + struct device *dev; + struct tps65132_reg_pdata reg_pdata[TPS65132_MAX_REGULATORS]; +}; + +static int tps65132_regulator_enable(struct regulator_dev *rdev) +{ + struct tps65132_regulator *tps = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id]; + int ret; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 1); + rpdata->ena_gpio_state = 1; + } + + /* Hardware automatically enable discharge bit in enable */ + if (rdev->constraints->active_discharge == + REGULATOR_ACTIVE_DISCHARGE_DISABLE) { + ret = regulator_set_active_discharge_regmap(rdev, false); + if (ret < 0) { + dev_err(tps->dev, "Failed to disable active discharge: %d\n", + ret); + return ret; + } + } + + return 0; +} + +static int tps65132_regulator_disable(struct regulator_dev *rdev) +{ + struct tps65132_regulator *tps = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 0); + rpdata->ena_gpio_state = 0; + } + + if (!IS_ERR(rpdata->act_dis_gpiod)) { + gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 1); + usleep_range(rpdata->act_dis_time_us, rpdata->act_dis_time_us + + TPS65132_ACT_DIS_TIME_SLACK); + gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 0); + } + + return 0; +} + +static int tps65132_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct tps65132_regulator *tps = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) + return rpdata->ena_gpio_state; + + return 1; +} + +static const struct regulator_ops tps65132_regulator_ops = { + .enable = tps65132_regulator_enable, + .disable = tps65132_regulator_disable, + .is_enabled = tps65132_regulator_is_enabled, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static int tps65132_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct tps65132_regulator *tps = config->driver_data; + struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[desc->id]; + int ret; + + rpdata->en_gpiod = devm_fwnode_gpiod_get(tps->dev, of_fwnode_handle(np), + "enable", GPIOD_ASIS, + "enable"); + if (IS_ERR(rpdata->en_gpiod)) { + ret = PTR_ERR(rpdata->en_gpiod); + + /* Ignore the error other than probe defer */ + if (ret == -EPROBE_DEFER) + return ret; + return 0; + } + + rpdata->act_dis_gpiod = devm_fwnode_gpiod_get(tps->dev, + of_fwnode_handle(np), + "active-discharge", + GPIOD_ASIS, + "active-discharge"); + if (IS_ERR(rpdata->act_dis_gpiod)) { + ret = PTR_ERR(rpdata->act_dis_gpiod); + + /* Ignore the error other than probe defer */ + if (ret == -EPROBE_DEFER) + return ret; + + return 0; + } + + ret = of_property_read_u32(np, "ti,active-discharge-time-us", + &rpdata->act_dis_time_us); + if (ret < 0) { + dev_err(tps->dev, "Failed to read active discharge time:%d\n", + ret); + return ret; + } + + return 0; +} + +#define TPS65132_REGULATOR_DESC(_id, _name) \ + [TPS65132_REGULATOR_ID_##_id] = { \ + .name = "tps65132-"#_name, \ + .supply_name = "vin", \ + .id = TPS65132_REGULATOR_ID_##_id, \ + .of_match = of_match_ptr(#_name), \ + .of_parse_cb = tps65132_of_parse_cb, \ + .ops = &tps65132_regulator_ops, \ + .n_voltages = TPS65132_VOUT_N_VOLTAGE, \ + .min_uV = TPS65132_VOUT_VMIN, \ + .uV_step = TPS65132_VOUT_STEP, \ + .enable_time = 500, \ + .vsel_mask = TPS65132_VOUT_MASK, \ + .vsel_reg = TPS65132_REG_##_id, \ + .active_discharge_off = 0, \ + .active_discharge_on = TPS65132_REG_APPS_DIS_##_id, \ + .active_discharge_mask = TPS65132_REG_APPS_DIS_##_id, \ + .active_discharge_reg = TPS65132_REG_APPS_DISP_DISN, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc tps_regs_desc[TPS65132_MAX_REGULATORS] = { + TPS65132_REGULATOR_DESC(VPOS, outp), + TPS65132_REGULATOR_DESC(VNEG, outn), +}; + +static const struct regmap_range tps65132_no_reg_ranges[] = { + regmap_reg_range(TPS65132_REG_APPS_DISP_DISN + 1, + TPS65132_REG_CONTROL - 1), +}; + +static const struct regmap_access_table tps65132_no_reg_table = { + .no_ranges = tps65132_no_reg_ranges, + .n_no_ranges = ARRAY_SIZE(tps65132_no_reg_ranges), +}; + +static const struct regmap_config tps65132_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = TPS65132_REG_CONTROL, + .cache_type = REGCACHE_NONE, + .rd_table = &tps65132_no_reg_table, + .wr_table = &tps65132_no_reg_table, +}; + +static int tps65132_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct tps65132_regulator *tps; + struct regulator_dev *rdev; + struct regmap *rmap; + struct regulator_config config = { }; + int id; + int ret; + + tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + rmap = devm_regmap_init_i2c(client, &tps65132_regmap_config); + if (IS_ERR(rmap)) { + ret = PTR_ERR(rmap); + dev_err(dev, "regmap init failed: %d\n", ret); + return ret; + } + + i2c_set_clientdata(client, tps); + tps->dev = dev; + + for (id = 0; id < TPS65132_MAX_REGULATORS; ++id) { + config.regmap = rmap; + config.dev = dev; + config.driver_data = tps; + + rdev = devm_regulator_register(dev, &tps_regs_desc[id], + &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "regulator %s register failed: %d\n", + tps_regs_desc[id].name, ret); + return ret; + } + } + return 0; +} + +static const struct i2c_device_id tps65132_id[] = { + { .name = "tps65132" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, tps65132_id); + +static const struct of_device_id __maybe_unused tps65132_of_match[] = { + { .compatible = "ti,tps65132" }, + {}, +}; +MODULE_DEVICE_TABLE(of, tps65132_of_match); + +static struct i2c_driver tps65132_i2c_driver = { + .driver = { + .name = "tps65132", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(tps65132_of_match), + }, + .probe = tps65132_probe, + .id_table = tps65132_id, +}; + +module_i2c_driver(tps65132_i2c_driver); + +MODULE_DESCRIPTION("tps65132 regulator driver"); +MODULE_AUTHOR("Venkat Reddy Talla "); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps65185.c b/drivers/regulator/tps65185.c new file mode 100644 index 000000000..6a3130177 --- /dev/null +++ b/drivers/regulator/tps65185.c @@ -0,0 +1,466 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (C) 2025 Andreas Kemnade + +/* Datasheet: https://www.ti.com/lit/gpn/tps65185 */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS65185_REG_TMST_VALUE 0 +#define TPS65185_REG_ENABLE 1 +#define TPS65185_REG_VADJ 2 +#define TPS65185_REG_VCOM1 3 +#define TPS65185_REG_VCOM2 4 +#define TPS65185_REG_INT_EN1 5 +#define TPS65185_REG_INT_EN2 6 +#define TPS65185_REG_INT1 7 +#define TPS65185_REG_INT2 8 +#define TPS65185_REG_TMST1 0xd +#define TPS65185_REG_TMST2 0xe +#define TPS65185_REG_PG 0xf +#define TPS65185_REG_REVID 0x10 + +#define TPS65185_READ_THERM BIT(7) +#define TPS65185_CONV_END BIT(5) + +#define TPS65185_ENABLE_ACTIVE BIT(7) +#define TPS65185_ENABLE_STANDBY BIT(6) + +#define PGOOD_TIMEOUT_MSECS 200 + +struct tps65185_data { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *pgood_gpio; + struct gpio_desc *pwrup_gpio; + struct gpio_desc *vcom_ctrl_gpio; + struct gpio_desc *wakeup_gpio; + struct completion pgood_completion; + int pgood_irq; + struct completion tmst_completion; +}; + +static const struct hwmon_channel_info *tps65185_info[] = { + HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), + NULL +}; + +static int tps65185_hwmon_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *temp) +{ + struct tps65185_data *data = dev_get_drvdata(dev); + unsigned int val; + int ret; + + reinit_completion(&data->tmst_completion); + /* start acquisition */ + regmap_update_bits(data->regmap, TPS65185_REG_TMST1, + TPS65185_READ_THERM, TPS65185_READ_THERM); + wait_for_completion_timeout(&data->tmst_completion, + msecs_to_jiffies(PGOOD_TIMEOUT_MSECS)); + ret = regmap_read(data->regmap, TPS65185_REG_TMST1, &val); + if (!(val & TPS65185_CONV_END)) + return -ETIMEDOUT; + + ret = regmap_read(data->regmap, TPS65185_REG_TMST_VALUE, &val); + if (ret) + return ret; + + *temp = (s8)val * 1000; + + return 0; +} + +static umode_t tps65185_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static const struct hwmon_ops tps65185_hwmon_ops = { + .is_visible = tps65185_hwmon_is_visible, + .read = tps65185_hwmon_read, +}; + +static const struct hwmon_chip_info tps65185_chip_info = { + .ops = &tps65185_hwmon_ops, + .info = tps65185_info, +}; + +static bool tps65185_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TPS65185_REG_TMST_VALUE: + case TPS65185_REG_ENABLE: + case TPS65185_REG_VCOM2: + case TPS65185_REG_INT1: + case TPS65185_REG_INT2: + case TPS65185_REG_TMST1: + return true; + default: + return false; + } +} + +static const struct regmap_config regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x10, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = tps65185_volatile_reg, +}; + +static const struct regulator_ops tps65185_v3p3ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int tps65185_check_powergood(struct regulator_dev *rdev) +{ + struct tps65185_data *data = rdev_get_drvdata(rdev); + + return gpiod_get_value_cansleep(data->pgood_gpio); +} + +static int tps65185_vposneg_get_voltage_sel(struct regulator_dev *rdev) +{ + int ret; + + ret = regulator_get_voltage_sel_regmap(rdev); + if (ret < 0) + return ret; + + /* highest value is lowest voltage */ + return 6 - ret; +} + +static int tps65185_vposneg_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector) +{ + return regulator_set_voltage_sel_regmap(rdev, 6 - selector); +} + +static irqreturn_t pgood_handler(int irq, void *dev_id) +{ + struct tps65185_data *data = dev_id; + + complete(&data->pgood_completion); + + return IRQ_HANDLED; +} + +static int tps65185_vposneg_enable(struct regulator_dev *rdev) +{ + struct tps65185_data *data = rdev_get_drvdata(rdev); + int ret; + + reinit_completion(&data->pgood_completion); + if (data->pwrup_gpio) + ret = gpiod_set_value_cansleep(data->pwrup_gpio, 1); + else + ret = regmap_update_bits(data->regmap, TPS65185_REG_ENABLE, + TPS65185_ENABLE_ACTIVE, + TPS65185_ENABLE_ACTIVE); + + if (ret) + return ret; + + dev_dbg(data->dev, "turning on..."); + wait_for_completion_timeout(&data->pgood_completion, + msecs_to_jiffies(PGOOD_TIMEOUT_MSECS)); + dev_dbg(data->dev, "turned on"); + ret = gpiod_get_value_cansleep(data->pgood_gpio); + if (ret < 0) + return ret; + if (!ret) + return -ETIMEDOUT; + + return 0; +} + +static int tps65185_vposneg_disable(struct regulator_dev *rdev) +{ + struct tps65185_data *data = rdev_get_drvdata(rdev); + int ret; + + if (data->pwrup_gpio) + ret = gpiod_set_value_cansleep(data->pwrup_gpio, 0); + else + ret = regmap_update_bits(data->regmap, TPS65185_REG_ENABLE, + TPS65185_ENABLE_STANDBY, + TPS65185_ENABLE_STANDBY); + + return ret; +} + +static int tps65185_vcom_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector) +{ + struct tps65185_data *data = rdev_get_drvdata(rdev); + int ret; + + ret = regmap_update_bits(data->regmap, TPS65185_REG_VCOM2, BIT(0), selector >> 8); + if (ret < 0) + return ret; + + return regmap_write(data->regmap, TPS65185_REG_VCOM1, selector & 0xFF); +} + +static int tps65185_vcom_get_voltage_sel(struct regulator_dev *rdev) +{ + struct tps65185_data *data = rdev_get_drvdata(rdev); + int ret; + unsigned int sel, sel2; + + ret = regmap_read(data->regmap, TPS65185_REG_VCOM1, &sel); + if (ret < 0) + return ret; + + ret = regmap_read(data->regmap, TPS65185_REG_VCOM2, &sel2); + if (ret < 0) + return ret; + + if (sel2 & BIT(0)) + sel |= 0x100; + + return sel; +} + +static const struct regulator_ops tps65185_vcom_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = tps65185_vcom_set_voltage_sel, + .get_voltage_sel = tps65185_vcom_get_voltage_sel, +}; + +static const struct regulator_ops tps65185_vposneg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = tps65185_vposneg_enable, + .disable = tps65185_vposneg_disable, + .is_enabled = tps65185_check_powergood, + .set_voltage_sel = tps65185_vposneg_set_voltage_sel, + .get_voltage_sel = tps65185_vposneg_get_voltage_sel, +}; + +static const struct regulator_desc regulators[] = { + { + .name = "v3p3", + .of_match = of_match_ptr("v3p3"), + .regulators_node = of_match_ptr("regulators"), + .id = 0, + .ops = &tps65185_v3p3ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = TPS65185_REG_ENABLE, + .enable_mask = BIT(5), + .n_voltages = 1, + .min_uV = 3300000, + }, + { + .name = "vposneg", + .of_match = of_match_ptr("vposneg"), + .regulators_node = of_match_ptr("regulators"), + .id = 1, + .ops = &tps65185_vposneg_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 4, + .vsel_reg = TPS65185_REG_VADJ, + .vsel_mask = 0x7, + .min_uV = 14250000, + .uV_step = 250000, + } +}; + +static const struct regulator_desc vcom_regulator_desc = { + .name = "vcom", + .of_match = of_match_ptr("vcom"), + .regulators_node = of_match_ptr("regulators"), + .supply_name = "vposneg", + .id = 2, + .ops = &tps65185_vcom_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .n_voltages = 511, + .min_uV = 0, + .uV_step = 10000, +}; + +static irqreturn_t tps65185_irq_thread(int irq, void *dev_id) +{ + struct tps65185_data *data = dev_id; + unsigned int int_status_1, int_status_2; + int ret; + + /* read both status to have irq cleared */ + ret = regmap_read(data->regmap, TPS65185_REG_INT1, &int_status_1); + if (ret) + return IRQ_NONE; + + ret = regmap_read(data->regmap, TPS65185_REG_INT2, &int_status_2); + if (ret) + return IRQ_NONE; + + if (int_status_2 & BIT(0)) + complete(&data->tmst_completion); + + dev_dbg(data->dev, "irq status %02x %02x\n", int_status_1, int_status_2); + + if (int_status_1 || int_status_2) + return IRQ_HANDLED; + + return IRQ_NONE; +} + +static int tps65185_probe(struct i2c_client *client) +{ + struct tps65185_data *data; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int ret = 0; + int i; + + data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = devm_regmap_init_i2c(client, ®map_config); + if (IS_ERR(data->regmap)) + return dev_err_probe(&client->dev, PTR_ERR(data->regmap), + "failed to allocate regmap!\n"); + + data->pgood_gpio = devm_gpiod_get(&client->dev, "pwr-good", GPIOD_IN); + if (IS_ERR(data->pgood_gpio)) + return dev_err_probe(&client->dev, + PTR_ERR(data->pgood_gpio), + "failed to get power good gpio\n"); + + data->pgood_irq = gpiod_to_irq(data->pgood_gpio); + if (data->pgood_irq < 0) + return data->pgood_irq; + + data->pwrup_gpio = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(data->pwrup_gpio)) + return dev_err_probe(&client->dev, PTR_ERR(data->pwrup_gpio), + "failed to get pwrup gpio\n"); + + data->wakeup_gpio = devm_gpiod_get_optional(&client->dev, "wakeup", GPIOD_OUT_HIGH); + if (IS_ERR(data->wakeup_gpio)) + return dev_err_probe(&client->dev, + PTR_ERR(data->wakeup_gpio), + "failed to get wakeup gpio\n"); + + data->vcom_ctrl_gpio = devm_gpiod_get_optional(&client->dev, "vcom-ctrl", GPIOD_OUT_LOW); + if (IS_ERR(data->vcom_ctrl_gpio)) + return dev_err_probe(&client->dev, + PTR_ERR(data->vcom_ctrl_gpio), + "failed to get vcm ctrl gpio\n"); + + ret = devm_regulator_get_enable(&client->dev, "vin"); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to get vin regulator\n"); + + // TPS65185x PMIC for E Ink Vizplex Enabled Electronic Paper Display Chapter 7.6 Figure 2: + // "Minimum delay time between WAKEUP rising edge and IC ready to accept I2C transaction." + // https://www.ti.com/lit/ds/symlink/tps65185.pdf + usleep_range(1800, 3000); + + data->dev = &client->dev; + i2c_set_clientdata(client, data); + + init_completion(&data->pgood_completion); + init_completion(&data->tmst_completion); + + ret = devm_request_threaded_irq(&client->dev, data->pgood_irq, NULL, + pgood_handler, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "PGOOD", data); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to request power good irq\n"); + + if (client->irq) { + ret = devm_request_threaded_irq(&client->dev, client->irq, + NULL, tps65185_irq_thread, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "tps65185", data); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to request irq\n"); + } + + ret = regmap_update_bits(data->regmap, TPS65185_REG_INT_EN2, BIT(0), BIT(0)); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to enable temp irq\n"); + + config.driver_data = data; + config.dev = &client->dev; + config.regmap = data->regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&client->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(&client->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + regulators[i].name); + } + + config.ena_gpiod = data->vcom_ctrl_gpio; + rdev = devm_regulator_register(&client->dev, &vcom_regulator_desc, &config); + if (IS_ERR(rdev)) + return dev_err_probe(&client->dev, PTR_ERR(rdev), + "failed to register vcom regulator\n"); + + if (IS_REACHABLE(CONFIG_HWMON)) { + struct device *hwmon_dev; + + hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, "tps65185", data, + &tps65185_chip_info, NULL); + if (IS_ERR(hwmon_dev)) + dev_notice(&client->dev, "failed to register hwmon\n"); + } + + return 0; +} + +static const struct of_device_id tps65185_dt_ids[] = { + { + .compatible = "ti,tps65185", + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, tps65185_dt_ids); + +static struct i2c_driver tps65185_i2c_driver = { + .driver = { + .name = "tps65185", + .of_match_table = tps65185_dt_ids, + }, + .probe = tps65185_probe, +}; + +module_i2c_driver(tps65185_i2c_driver); + +/* Module information */ +MODULE_DESCRIPTION("TPS65185 regulator driver"); +MODULE_LICENSE("GPL"); + diff --git a/drivers/regulator/tps65217-regulator.c b/drivers/regulator/tps65217-regulator.c new file mode 100644 index 000000000..b167ba22f --- /dev/null +++ b/drivers/regulator/tps65217-regulator.c @@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps65217-regulator.c + * + * Regulator driver for TPS65217 PMIC + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define TPS65217_REGULATOR(_name, _id, _of_match, _ops, _n, _vr, _vm, _em, \ + _t, _lr, _nlr, _sr, _sm) \ + { \ + .name = _name, \ + .id = _id, \ + .of_match = of_match_ptr(_of_match), \ + .regulators_node= of_match_ptr("regulators"), \ + .ops = &_ops, \ + .n_voltages = _n, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .enable_reg = TPS65217_REG_ENABLE, \ + .enable_mask = _em, \ + .volt_table = _t, \ + .linear_ranges = _lr, \ + .n_linear_ranges = _nlr, \ + .bypass_reg = _sr, \ + .bypass_mask = _sm, \ + } \ + +static const unsigned int LDO1_VSEL_table[] = { + 1000000, 1100000, 1200000, 1250000, + 1300000, 1350000, 1400000, 1500000, + 1600000, 1800000, 2500000, 2750000, + 2800000, 3000000, 3100000, 3300000, +}; + +static const struct linear_range tps65217_uv1_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 24, 25000), + REGULATOR_LINEAR_RANGE(1550000, 25, 52, 50000), + REGULATOR_LINEAR_RANGE(3000000, 53, 55, 100000), + REGULATOR_LINEAR_RANGE(3300000, 56, 63, 0), +}; + +static const struct linear_range tps65217_uv2_ranges[] = { + REGULATOR_LINEAR_RANGE(1500000, 0, 8, 50000), + REGULATOR_LINEAR_RANGE(2000000, 9, 13, 100000), + REGULATOR_LINEAR_RANGE(2450000, 14, 31, 50000), +}; + +static int tps65217_pmic_enable(struct regulator_dev *dev) +{ + struct tps65217 *tps = rdev_get_drvdata(dev); + int rid = rdev_get_id(dev); + + if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4) + return -EINVAL; + + /* Enable the regulator and password protection is level 1 */ + return tps65217_set_bits(tps, TPS65217_REG_ENABLE, + dev->desc->enable_mask, dev->desc->enable_mask, + TPS65217_PROTECT_L1); +} + +static int tps65217_pmic_disable(struct regulator_dev *dev) +{ + struct tps65217 *tps = rdev_get_drvdata(dev); + int rid = rdev_get_id(dev); + + if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4) + return -EINVAL; + + /* Disable the regulator and password protection is level 1 */ + return tps65217_clear_bits(tps, TPS65217_REG_ENABLE, + dev->desc->enable_mask, TPS65217_PROTECT_L1); +} + +static int tps65217_pmic_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + int ret; + struct tps65217 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + /* Set the voltage based on vsel value and write protect level is 2 */ + ret = tps65217_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask, + selector, TPS65217_PROTECT_L2); + + /* Set GO bit for DCDCx to initiate voltage transistion */ + switch (rid) { + case TPS65217_DCDC_1 ... TPS65217_DCDC_3: + ret = tps65217_set_bits(tps, TPS65217_REG_DEFSLEW, + TPS65217_DEFSLEW_GO, TPS65217_DEFSLEW_GO, + TPS65217_PROTECT_L2); + break; + } + + return ret; +} + +static int tps65217_pmic_set_suspend_enable(struct regulator_dev *dev) +{ + struct tps65217 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + if (rid > TPS65217_LDO_4) + return -EINVAL; + + return tps65217_clear_bits(tps, dev->desc->bypass_reg, + dev->desc->bypass_mask, + TPS65217_PROTECT_L1); +} + +static int tps65217_pmic_set_suspend_disable(struct regulator_dev *dev) +{ + struct tps65217 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + if (rid > TPS65217_LDO_4) + return -EINVAL; + + if (!tps->strobes[rid]) + return -EINVAL; + + return tps65217_set_bits(tps, dev->desc->bypass_reg, + dev->desc->bypass_mask, + tps->strobes[rid], TPS65217_PROTECT_L1); +} + +/* Operations permitted on DCDCx, LDO2, LDO3 and LDO4 */ +static const struct regulator_ops tps65217_pmic_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65217_pmic_enable, + .disable = tps65217_pmic_disable, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = tps65217_pmic_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_suspend_enable = tps65217_pmic_set_suspend_enable, + .set_suspend_disable = tps65217_pmic_set_suspend_disable, +}; + +/* Operations permitted on LDO1 */ +static const struct regulator_ops tps65217_pmic_ldo1_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65217_pmic_enable, + .disable = tps65217_pmic_disable, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = tps65217_pmic_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_suspend_enable = tps65217_pmic_set_suspend_enable, + .set_suspend_disable = tps65217_pmic_set_suspend_disable, +}; + +static const struct regulator_desc regulators[] = { + TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, "dcdc1", + tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC1, + TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC1_EN, + NULL, tps65217_uv1_ranges, + ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1, + TPS65217_SEQ1_DC1_SEQ_MASK), + TPS65217_REGULATOR("DCDC2", TPS65217_DCDC_2, "dcdc2", + tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC2, + TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC2_EN, + NULL, tps65217_uv1_ranges, + ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1, + TPS65217_SEQ1_DC2_SEQ_MASK), + TPS65217_REGULATOR("DCDC3", TPS65217_DCDC_3, "dcdc3", + tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC3, + TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC3_EN, + NULL, tps65217_uv1_ranges, + ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ2, + TPS65217_SEQ2_DC3_SEQ_MASK), + TPS65217_REGULATOR("LDO1", TPS65217_LDO_1, "ldo1", + tps65217_pmic_ldo1_ops, 16, TPS65217_REG_DEFLDO1, + TPS65217_DEFLDO1_LDO1_MASK, TPS65217_ENABLE_LDO1_EN, + LDO1_VSEL_table, NULL, 0, TPS65217_REG_SEQ2, + TPS65217_SEQ2_LDO1_SEQ_MASK), + TPS65217_REGULATOR("LDO2", TPS65217_LDO_2, "ldo2", tps65217_pmic_ops, + 64, TPS65217_REG_DEFLDO2, + TPS65217_DEFLDO2_LDO2_MASK, TPS65217_ENABLE_LDO2_EN, + NULL, tps65217_uv1_ranges, + ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ3, + TPS65217_SEQ3_LDO2_SEQ_MASK), + TPS65217_REGULATOR("LDO3", TPS65217_LDO_3, "ldo3", tps65217_pmic_ops, + 32, TPS65217_REG_DEFLS1, TPS65217_DEFLDO3_LDO3_MASK, + TPS65217_ENABLE_LS1_EN | TPS65217_DEFLDO3_LDO3_EN, + NULL, tps65217_uv2_ranges, + ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ3, + TPS65217_SEQ3_LDO3_SEQ_MASK), + TPS65217_REGULATOR("LDO4", TPS65217_LDO_4, "ldo4", tps65217_pmic_ops, + 32, TPS65217_REG_DEFLS2, TPS65217_DEFLDO4_LDO4_MASK, + TPS65217_ENABLE_LS2_EN | TPS65217_DEFLDO4_LDO4_EN, + NULL, tps65217_uv2_ranges, + ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ4, + TPS65217_SEQ4_LDO4_SEQ_MASK), +}; + +static int tps65217_regulator_probe(struct platform_device *pdev) +{ + struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent); + struct tps65217_board *pdata = dev_get_platdata(tps->dev); + struct regulator_dev *rdev; + struct regulator_config config = { }; + int i, ret; + unsigned int val; + + /* Allocate memory for strobes */ + tps->strobes = devm_kcalloc(&pdev->dev, + TPS65217_NUM_REGULATOR, sizeof(u8), + GFP_KERNEL); + if (!tps->strobes) + return -ENOMEM; + + platform_set_drvdata(pdev, tps); + + for (i = 0; i < TPS65217_NUM_REGULATOR; i++) { + /* Register the regulators */ + config.dev = tps->dev; + if (pdata) + config.init_data = pdata->tps65217_init_data[i]; + config.driver_data = tps; + config.regmap = tps->regmap; + + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + + /* Store default strobe info */ + ret = tps65217_reg_read(tps, regulators[i].bypass_reg, &val); + if (ret) + return ret; + + tps->strobes[i] = val & regulators[i].bypass_mask; + } + + return 0; +} + +static struct platform_driver tps65217_regulator_driver = { + .driver = { + .name = "tps65217-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65217_regulator_probe, +}; + +static int __init tps65217_regulator_init(void) +{ + return platform_driver_register(&tps65217_regulator_driver); +} +subsys_initcall(tps65217_regulator_init); + +static void __exit tps65217_regulator_exit(void) +{ + platform_driver_unregister(&tps65217_regulator_driver); +} +module_exit(tps65217_regulator_exit); + +MODULE_AUTHOR("AnilKumar Ch "); +MODULE_DESCRIPTION("TPS65217 voltage regulator driver"); +MODULE_ALIAS("platform:tps65217-pmic"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps65218-regulator.c b/drivers/regulator/tps65218-regulator.c new file mode 100644 index 000000000..00e5c3621 --- /dev/null +++ b/drivers/regulator/tps65218-regulator.c @@ -0,0 +1,362 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tps65218-regulator.c + * + * Regulator driver for TPS65218 PMIC + * + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS65218_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ + _em, _cr, _cm, _lr, _nlr, _delay, _fuv, _sr, _sm, \ + _ct, _ncl) \ + { \ + .name = _name, \ + .of_match = _of, \ + .id = _id, \ + .ops = &_ops, \ + .n_voltages = _n, \ + .type = _type, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .csel_reg = _cr, \ + .csel_mask = _cm, \ + .curr_table = _ct, \ + .n_current_limits = _ncl, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .volt_table = NULL, \ + .linear_ranges = _lr, \ + .n_linear_ranges = _nlr, \ + .ramp_delay = _delay, \ + .fixed_uV = _fuv, \ + .bypass_reg = _sr, \ + .bypass_mask = _sm, \ + } \ + +static const struct linear_range dcdc1_dcdc2_ranges[] = { + REGULATOR_LINEAR_RANGE(850000, 0x0, 0x32, 10000), + REGULATOR_LINEAR_RANGE(1375000, 0x33, 0x3f, 25000), +}; + +static const struct linear_range ldo1_dcdc3_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0x0, 0x1a, 25000), + REGULATOR_LINEAR_RANGE(1600000, 0x1b, 0x3f, 50000), +}; + +static const struct linear_range dcdc4_ranges[] = { + REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000), + REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000), +}; + +static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + int ret; + struct tps65218 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + /* Set the voltage based on vsel value and write protect level is 2 */ + ret = tps65218_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask, + selector, TPS65218_PROTECT_L1); + + /* Set GO bit for DCDC1/2 to initiate voltage transistion */ + switch (rid) { + case TPS65218_DCDC_1: + case TPS65218_DCDC_2: + ret = tps65218_set_bits(tps, TPS65218_REG_CONTRL_SLEW_RATE, + TPS65218_SLEW_RATE_GO, + TPS65218_SLEW_RATE_GO, + TPS65218_PROTECT_L1); + break; + } + + return ret; +} + +static int tps65218_pmic_enable(struct regulator_dev *dev) +{ + struct tps65218 *tps = rdev_get_drvdata(dev); + int rid = rdev_get_id(dev); + + if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) + return -EINVAL; + + /* Enable the regulator and password protection is level 1 */ + return tps65218_set_bits(tps, dev->desc->enable_reg, + dev->desc->enable_mask, dev->desc->enable_mask, + TPS65218_PROTECT_L1); +} + +static int tps65218_pmic_disable(struct regulator_dev *dev) +{ + struct tps65218 *tps = rdev_get_drvdata(dev); + int rid = rdev_get_id(dev); + + if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) + return -EINVAL; + + /* Disable the regulator and password protection is level 1 */ + return tps65218_clear_bits(tps, dev->desc->enable_reg, + dev->desc->enable_mask, TPS65218_PROTECT_L1); +} + +static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev) +{ + struct tps65218 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + if (rid > TPS65218_LDO_1) + return -EINVAL; + + return tps65218_clear_bits(tps, dev->desc->bypass_reg, + dev->desc->bypass_mask, + TPS65218_PROTECT_L1); +} + +static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev) +{ + struct tps65218 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + + if (rid > TPS65218_LDO_1) + return -EINVAL; + + /* + * Certain revisions of TPS65218 will need to have DCDC3 regulator + * enabled always, otherwise an immediate system reboot will occur + * during poweroff. + */ + if (rid == TPS65218_DCDC_3 && tps->rev == TPS65218_REV_2_1) + return 0; + + if (!tps->strobes[rid]) { + if (rid == TPS65218_DCDC_3) + tps->strobes[rid] = 3; + else + return -EINVAL; + } + + return tps65218_set_bits(tps, dev->desc->bypass_reg, + dev->desc->bypass_mask, + tps->strobes[rid], TPS65218_PROTECT_L1); +} + +/* Operations permitted on DCDC1, DCDC2 */ +static const struct regulator_ops tps65218_dcdc12_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65218_pmic_enable, + .disable = tps65218_pmic_disable, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = tps65218_pmic_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_suspend_enable = tps65218_pmic_set_suspend_enable, + .set_suspend_disable = tps65218_pmic_set_suspend_disable, +}; + +/* Operations permitted on DCDC3, DCDC4 and LDO1 */ +static const struct regulator_ops tps65218_ldo1_dcdc34_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65218_pmic_enable, + .disable = tps65218_pmic_disable, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = tps65218_pmic_set_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_suspend_enable = tps65218_pmic_set_suspend_enable, + .set_suspend_disable = tps65218_pmic_set_suspend_disable, +}; + +static const unsigned int ls3_currents[] = { 100000, 200000, 500000, 1000000 }; + +static int tps65218_pmic_set_input_current_lim(struct regulator_dev *dev, + int lim_uA) +{ + unsigned int index = 0; + unsigned int num_currents = ARRAY_SIZE(ls3_currents); + struct tps65218 *tps = rdev_get_drvdata(dev); + + while (index < num_currents && ls3_currents[index] != lim_uA) + index++; + + if (index == num_currents) + return -EINVAL; + + return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, + index << __builtin_ctz(dev->desc->csel_mask), + TPS65218_PROTECT_L1); +} + +static int tps65218_pmic_set_current_limit(struct regulator_dev *dev, + int min_uA, int max_uA) +{ + int index = 0; + unsigned int num_currents = ARRAY_SIZE(ls3_currents); + struct tps65218 *tps = rdev_get_drvdata(dev); + + while (index < num_currents && ls3_currents[index] <= max_uA) + index++; + + index--; + + if (index < 0 || ls3_currents[index] < min_uA) + return -EINVAL; + + return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, + index << __builtin_ctz(dev->desc->csel_mask), + TPS65218_PROTECT_L1); +} + +static const struct regulator_ops tps65218_ls23_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65218_pmic_enable, + .disable = tps65218_pmic_disable, + .set_input_current_limit = tps65218_pmic_set_input_current_lim, + .set_current_limit = tps65218_pmic_set_current_limit, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +/* Operations permitted on DCDC5, DCDC6 */ +static const struct regulator_ops tps65218_dcdc56_pmic_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps65218_pmic_enable, + .disable = tps65218_pmic_disable, + .set_suspend_enable = tps65218_pmic_set_suspend_enable, + .set_suspend_disable = tps65218_pmic_set_suspend_disable, +}; + +static const struct regulator_desc regulators[] = { + TPS65218_REGULATOR("DCDC1", "regulator-dcdc1", TPS65218_DCDC_1, + REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64, + TPS65218_REG_CONTROL_DCDC1, + TPS65218_CONTROL_DCDC1_MASK, TPS65218_REG_ENABLE1, + TPS65218_ENABLE1_DC1_EN, 0, 0, dcdc1_dcdc2_ranges, + 2, 4000, 0, TPS65218_REG_SEQ3, + TPS65218_SEQ3_DC1_SEQ_MASK, NULL, 0), + TPS65218_REGULATOR("DCDC2", "regulator-dcdc2", TPS65218_DCDC_2, + REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64, + TPS65218_REG_CONTROL_DCDC2, + TPS65218_CONTROL_DCDC2_MASK, TPS65218_REG_ENABLE1, + TPS65218_ENABLE1_DC2_EN, 0, 0, dcdc1_dcdc2_ranges, + 2, 4000, 0, TPS65218_REG_SEQ3, + TPS65218_SEQ3_DC2_SEQ_MASK, NULL, 0), + TPS65218_REGULATOR("DCDC3", "regulator-dcdc3", TPS65218_DCDC_3, + REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64, + TPS65218_REG_CONTROL_DCDC3, + TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1, + TPS65218_ENABLE1_DC3_EN, 0, 0, ldo1_dcdc3_ranges, 2, + 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC3_SEQ_MASK, + NULL, 0), + TPS65218_REGULATOR("DCDC4", "regulator-dcdc4", TPS65218_DCDC_4, + REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 53, + TPS65218_REG_CONTROL_DCDC4, + TPS65218_CONTROL_DCDC4_MASK, TPS65218_REG_ENABLE1, + TPS65218_ENABLE1_DC4_EN, 0, 0, dcdc4_ranges, 2, + 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC4_SEQ_MASK, + NULL, 0), + TPS65218_REGULATOR("DCDC5", "regulator-dcdc5", TPS65218_DCDC_5, + REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1, + -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC5_EN, 0, + 0, NULL, 0, 0, 1000000, TPS65218_REG_SEQ5, + TPS65218_SEQ5_DC5_SEQ_MASK, NULL, 0), + TPS65218_REGULATOR("DCDC6", "regulator-dcdc6", TPS65218_DCDC_6, + REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1, + -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC6_EN, 0, + 0, NULL, 0, 0, 1800000, TPS65218_REG_SEQ5, + TPS65218_SEQ5_DC6_SEQ_MASK, NULL, 0), + TPS65218_REGULATOR("LDO1", "regulator-ldo1", TPS65218_LDO_1, + REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64, + TPS65218_REG_CONTROL_LDO1, + TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2, + TPS65218_ENABLE2_LDO1_EN, 0, 0, ldo1_dcdc3_ranges, + 2, 0, 0, TPS65218_REG_SEQ6, + TPS65218_SEQ6_LDO1_SEQ_MASK, NULL, 0), + TPS65218_REGULATOR("LS2", "regulator-ls2", TPS65218_LS_2, + REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0, + TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS2_EN, + TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS2ILIM_MASK, + NULL, 0, 0, 0, 0, 0, ls3_currents, + ARRAY_SIZE(ls3_currents)), + TPS65218_REGULATOR("LS3", "regulator-ls3", TPS65218_LS_3, + REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0, + TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS3_EN, + TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS3ILIM_MASK, + NULL, 0, 0, 0, 0, 0, ls3_currents, + ARRAY_SIZE(ls3_currents)), +}; + +static int tps65218_regulator_probe(struct platform_device *pdev) +{ + struct tps65218 *tps = dev_get_drvdata(pdev->dev.parent); + struct regulator_dev *rdev; + struct regulator_config config = { }; + int i, ret; + unsigned int val; + + config.dev = &pdev->dev; + config.dev->of_node = tps->dev->of_node; + config.driver_data = tps; + config.regmap = tps->regmap; + + /* Allocate memory for strobes */ + tps->strobes = devm_kcalloc(&pdev->dev, + TPS65218_NUM_REGULATOR, sizeof(u8), + GFP_KERNEL); + if (!tps->strobes) + return -ENOMEM; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + + ret = regmap_read(tps->regmap, regulators[i].bypass_reg, &val); + if (ret) + return ret; + + tps->strobes[i] = val & regulators[i].bypass_mask; + } + + return 0; +} + +static const struct platform_device_id tps65218_regulator_id_table[] = { + { .name = "tps65218-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, tps65218_regulator_id_table); + +static struct platform_driver tps65218_regulator_driver = { + .driver = { + .name = "tps65218-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65218_regulator_probe, + .id_table = tps65218_regulator_id_table, +}; + +module_platform_driver(tps65218_regulator_driver); + +MODULE_AUTHOR("J Keerthy "); +MODULE_DESCRIPTION("TPS65218 voltage regulator driver"); +MODULE_ALIAS("platform:tps65218-pmic"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps65219-regulator.c b/drivers/regulator/tps65219-regulator.c new file mode 100644 index 000000000..a667c3f44 --- /dev/null +++ b/drivers/regulator/tps65219-regulator.c @@ -0,0 +1,564 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// TPS65214/TPS65215/TPS65219 PMIC Regulator Driver +// +// Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ +// Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +// +// This implementation derived from tps65218 authored by +// "J Keerthy " +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct tps65219_regulator_irq_type { + const char *irq_name; + const char *regulator_name; + const char *event_name; + unsigned long event; +}; + +static struct tps65219_regulator_irq_type tps65215_regulator_irq_types[] = { + { "SENSOR_3_WARM", "SENSOR3", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN}, + { "SENSOR_3_HOT", "SENSOR3", "hot temperature", REGULATOR_EVENT_OVER_TEMP}, +}; + +static struct tps65219_regulator_irq_type tps65219_regulator_irq_types[] = { + { "LDO3_SCG", "LDO3", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "LDO3_OC", "LDO3", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "LDO3_UV", "LDO3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "LDO4_SCG", "LDO4", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "LDO4_OC", "LDO4", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "LDO4_UV", "LDO4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "LDO3_RV", "LDO3", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO4_RV", "LDO4", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO3_RV_SD", "LDO3", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO4_RV_SD", "LDO4", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "SENSOR_3_WARM", "SENSOR3", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN}, + { "SENSOR_3_HOT", "SENSOR3", "hot temperature", REGULATOR_EVENT_OVER_TEMP}, +}; + +/* All of TPS65214's irq types are the same as common_regulator_irq_types */ +static struct tps65219_regulator_irq_type common_regulator_irq_types[] = { + { "LDO1_SCG", "LDO1", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "LDO1_OC", "LDO1", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "LDO1_UV", "LDO1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "LDO2_SCG", "LDO2", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "LDO2_OC", "LDO2", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "LDO2_UV", "LDO2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "BUCK3_SCG", "BUCK3", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "BUCK3_OC", "BUCK3", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK3_NEG_OC", "BUCK3", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK3_UV", "BUCK3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "BUCK1_SCG", "BUCK1", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "BUCK1_OC", "BUCK1", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK1_NEG_OC", "BUCK1", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK1_UV", "BUCK1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "BUCK2_SCG", "BUCK2", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, + { "BUCK2_OC", "BUCK2", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK2_NEG_OC", "BUCK2", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, + { "BUCK2_UV", "BUCK2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { "BUCK1_RV", "BUCK1", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "BUCK2_RV", "BUCK2", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "BUCK3_RV", "BUCK3", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO1_RV", "LDO1", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO2_RV", "LDO2", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "BUCK1_RV_SD", "BUCK1", "residual voltage on shutdown", + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "BUCK2_RV_SD", "BUCK2", "residual voltage on shutdown", + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "BUCK3_RV_SD", "BUCK3", "residual voltage on shutdown", + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO1_RV_SD", "LDO1", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "LDO2_RV_SD", "LDO2", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { "SENSOR_2_WARM", "SENSOR2", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, + { "SENSOR_1_WARM", "SENSOR1", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, + { "SENSOR_0_WARM", "SENSOR0", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, + { "SENSOR_2_HOT", "SENSOR2", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, + { "SENSOR_1_HOT", "SENSOR1", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, + { "SENSOR_0_HOT", "SENSOR0", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, + { "TIMEOUT", "", "", REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE }, +}; + +struct tps65219_regulator_irq_data { + struct device *dev; + struct tps65219_regulator_irq_type *type; + struct regulator_dev *rdev; +}; + +#define TPS65219_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ + _em, _cr, _cm, _lr, _nlr, _delay, _fuv, \ + _ct, _ncl, _bpm) \ + { \ + .name = _name, \ + .of_match = _of, \ + .regulators_node = of_match_ptr("regulators"), \ + .supply_name = _of, \ + .id = _id, \ + .ops = &(_ops), \ + .n_voltages = _n, \ + .type = _type, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .csel_reg = _cr, \ + .csel_mask = _cm, \ + .curr_table = _ct, \ + .n_current_limits = _ncl, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .volt_table = NULL, \ + .linear_ranges = _lr, \ + .n_linear_ranges = _nlr, \ + .ramp_delay = _delay, \ + .fixed_uV = _fuv, \ + .bypass_reg = _vr, \ + .bypass_mask = _bpm, \ + } \ + +static const struct linear_range bucks_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x1f, 25000), + REGULATOR_LINEAR_RANGE(1400000, 0x20, 0x33, 100000), + REGULATOR_LINEAR_RANGE(3400000, 0x34, 0x3f, 0), +}; + +static const struct linear_range ldo_1_range[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x37, 50000), + REGULATOR_LINEAR_RANGE(3400000, 0x38, 0x3f, 0), +}; + +static const struct linear_range tps65214_ldo_1_2_range[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2, 0), + REGULATOR_LINEAR_RANGE(650000, 0x3, 0x37, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x38, 0x3F, 0), +}; + +static const struct linear_range tps65215_ldo_2_range[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x0, 0xC, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x36, 0x3F, 0), +}; + +static const struct linear_range tps65219_ldo_2_range[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x37, 50000), + REGULATOR_LINEAR_RANGE(3400000, 0x38, 0x3f, 0), +}; + +static const struct linear_range tps65219_ldos_3_4_range[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x0, 0xC, 0), + REGULATOR_LINEAR_RANGE(1250000, 0xD, 0x35, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x36, 0x3F, 0), +}; + +static int tps65219_set_mode(struct regulator_dev *dev, unsigned int mode) +{ + struct tps65219 *tps = rdev_get_drvdata(dev); + + switch (mode) { + case REGULATOR_MODE_NORMAL: + return regmap_set_bits(tps->regmap, TPS65219_REG_STBY_1_CONFIG, + dev->desc->enable_mask); + + case REGULATOR_MODE_STANDBY: + return regmap_clear_bits(tps->regmap, + TPS65219_REG_STBY_1_CONFIG, + dev->desc->enable_mask); + default: + return -EINVAL; + } +} + +static unsigned int tps65219_get_mode(struct regulator_dev *dev) +{ + struct tps65219 *tps = rdev_get_drvdata(dev); + unsigned int rid = rdev_get_id(dev); + int ret, value = 0; + + ret = regmap_read(tps->regmap, TPS65219_REG_STBY_1_CONFIG, &value); + if (ret) { + dev_dbg(tps->dev, "%s failed for regulator %s: %d ", + __func__, dev->desc->name, ret); + return ret; + } + value = (value & BIT(rid)) >> rid; + if (value) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_NORMAL; +} + +/* Operations permitted on BUCK1/2/3 */ +static const struct regulator_ops bucks_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65219_set_mode, + .get_mode = tps65219_get_mode, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + +}; + +/* Operations permitted on LDO1/2 */ +static const struct regulator_ops ldos_1_2_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65219_set_mode, + .get_mode = tps65219_get_mode, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +/* Operations permitted on LDO3/4 */ +static const struct regulator_ops ldos_3_4_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65219_set_mode, + .get_mode = tps65219_get_mode, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_desc common_regs[] = { + TPS65219_REGULATOR("BUCK1", "buck1", TPS65219_BUCK_1, + REGULATOR_VOLTAGE, bucks_ops, 64, + TPS65219_REG_BUCK1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK1_EN_MASK, 0, 0, bucks_ranges, + 3, 4000, 0, NULL, 0, 0), + TPS65219_REGULATOR("BUCK2", "buck2", TPS65219_BUCK_2, + REGULATOR_VOLTAGE, bucks_ops, 64, + TPS65219_REG_BUCK2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK2_EN_MASK, 0, 0, bucks_ranges, + 3, 4000, 0, NULL, 0, 0), + TPS65219_REGULATOR("BUCK3", "buck3", TPS65219_BUCK_3, + REGULATOR_VOLTAGE, bucks_ops, 64, + TPS65219_REG_BUCK3_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK3_EN_MASK, 0, 0, bucks_ranges, + 3, 0, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps65214_regs[] = { + // TPS65214's LDO3 pin maps to TPS65219's LDO3 pin + TPS65219_REGULATOR("LDO1", "ldo1", TPS65214_LDO_1, + REGULATOR_VOLTAGE, ldos_3_4_ops, 64, + TPS65214_REG_LDO1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO3_EN_MASK, 0, 0, tps65214_ldo_1_2_range, + 3, 0, 0, NULL, 0, 0), + TPS65219_REGULATOR("LDO2", "ldo2", TPS65214_LDO_2, + REGULATOR_VOLTAGE, ldos_3_4_ops, 64, + TPS65214_REG_LDO2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO2_EN_MASK, 0, 0, tps65214_ldo_1_2_range, + 3, 0, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps65215_regs[] = { + /* + * TPS65215's LDO1 is the same as TPS65219's LDO1. LDO1 is + * configurable as load switch and bypass-mode. + * TPS65215's LDO2 is the same as TPS65219's LDO3 + */ + TPS65219_REGULATOR("LDO1", "ldo1", TPS65219_LDO_1, + REGULATOR_VOLTAGE, ldos_1_2_ops, 64, + TPS65219_REG_LDO1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO1_EN_MASK, 0, 0, ldo_1_range, + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), + TPS65219_REGULATOR("LDO2", "ldo2", TPS65215_LDO_2, + REGULATOR_VOLTAGE, ldos_3_4_ops, 64, + TPS65215_REG_LDO2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65215_ENABLE_LDO2_EN_MASK, 0, 0, tps65215_ldo_2_range, + 2, 0, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps65219_regs[] = { + TPS65219_REGULATOR("LDO1", "ldo1", TPS65219_LDO_1, + REGULATOR_VOLTAGE, ldos_1_2_ops, 64, + TPS65219_REG_LDO1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO1_EN_MASK, 0, 0, ldo_1_range, + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), + TPS65219_REGULATOR("LDO2", "ldo2", TPS65219_LDO_2, + REGULATOR_VOLTAGE, ldos_1_2_ops, 64, + TPS65219_REG_LDO2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO2_EN_MASK, 0, 0, tps65219_ldo_2_range, + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), + TPS65219_REGULATOR("LDO3", "ldo3", TPS65219_LDO_3, + REGULATOR_VOLTAGE, ldos_3_4_ops, 64, + TPS65219_REG_LDO3_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO3_EN_MASK, 0, 0, tps65219_ldos_3_4_range, + 3, 0, 0, NULL, 0, 0), + TPS65219_REGULATOR("LDO4", "ldo4", TPS65219_LDO_4, + REGULATOR_VOLTAGE, ldos_3_4_ops, 64, + TPS65219_REG_LDO4_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, + TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO4_EN_MASK, 0, 0, tps65219_ldos_3_4_range, + 3, 0, 0, NULL, 0, 0), +}; + +static irqreturn_t tps65219_regulator_irq_handler(int irq, void *data) +{ + struct tps65219_regulator_irq_data *irq_data = data; + + if (irq_data->type->event_name[0] == '\0') { + /* This is the timeout interrupt no specific regulator */ + dev_err(irq_data->dev, + "System was put in shutdown due to timeout during an active or standby transition.\n"); + return IRQ_HANDLED; + } + + if (irq_data->rdev) + regulator_notifier_call_chain(irq_data->rdev, + irq_data->type->event, NULL); + + dev_err(irq_data->dev, "Error IRQ trap %s for %s\n", + irq_data->type->event_name, irq_data->type->regulator_name); + return IRQ_HANDLED; +} + +struct tps65219_chip_data { + size_t rdesc_size; + size_t common_rdesc_size; + size_t dev_irq_size; + size_t common_irq_size; + const struct regulator_desc *rdesc; + const struct regulator_desc *common_rdesc; + struct tps65219_regulator_irq_type *irq_types; + struct tps65219_regulator_irq_type *common_irq_types; +}; + +static struct tps65219_chip_data chip_info_table[] = { + [TPS65214] = { + .rdesc = tps65214_regs, + .rdesc_size = ARRAY_SIZE(tps65214_regs), + .common_rdesc = common_regs, + .common_rdesc_size = ARRAY_SIZE(common_regs), + .irq_types = NULL, + .dev_irq_size = 0, + .common_irq_types = common_regulator_irq_types, + .common_irq_size = ARRAY_SIZE(common_regulator_irq_types), + }, + [TPS65215] = { + .rdesc = tps65215_regs, + .rdesc_size = ARRAY_SIZE(tps65215_regs), + .common_rdesc = common_regs, + .common_rdesc_size = ARRAY_SIZE(common_regs), + .irq_types = tps65215_regulator_irq_types, + .dev_irq_size = ARRAY_SIZE(tps65215_regulator_irq_types), + .common_irq_types = common_regulator_irq_types, + .common_irq_size = ARRAY_SIZE(common_regulator_irq_types), + }, + [TPS65219] = { + .rdesc = tps65219_regs, + .rdesc_size = ARRAY_SIZE(tps65219_regs), + .common_rdesc = common_regs, + .common_rdesc_size = ARRAY_SIZE(common_regs), + .irq_types = tps65219_regulator_irq_types, + .dev_irq_size = ARRAY_SIZE(tps65219_regulator_irq_types), + .common_irq_types = common_regulator_irq_types, + .common_irq_size = ARRAY_SIZE(common_regulator_irq_types), + }, +}; + +static bool tps65219_is_regulator_name(const struct tps65219_chip_data *pmic, + const char *name) +{ + int i; + + for (i = 0; i < pmic->common_rdesc_size; i++) + if (!strcmp(pmic->common_rdesc[i].name, name)) + return true; + for (i = 0; i < pmic->rdesc_size; i++) + if (!strcmp(pmic->rdesc[i].name, name)) + return true; + return false; +} + +static int tps65219_register_irqs(struct platform_device *pdev, + struct tps65219 *tps, + struct regulator_dev *rdev, + struct tps65219_regulator_irq_type *irq_types, + int nirqs, + const char *regulator_name) +{ + struct tps65219_regulator_irq_data *irq_data; + int i, irq, error; + + for (i = 0; i < nirqs; i++) { + if (strcmp(irq_types[i].regulator_name, regulator_name)) + continue; + + irq = platform_get_irq_byname(pdev, irq_types[i].irq_name); + if (irq < 0) + return -EINVAL; + + irq_data = devm_kmalloc(tps->dev, sizeof(*irq_data), GFP_KERNEL); + if (!irq_data) + return -ENOMEM; + + irq_data->dev = tps->dev; + irq_data->type = &irq_types[i]; + irq_data->rdev = rdev; + + error = devm_request_threaded_irq(tps->dev, irq, NULL, + tps65219_regulator_irq_handler, + IRQF_ONESHOT, + irq_types[i].irq_name, + irq_data); + if (error) + return dev_err_probe(tps->dev, error, + "Failed to request %s IRQ %d\n", + irq_types[i].irq_name, irq); + } + return 0; +} + +static int tps65219_regulator_probe(struct platform_device *pdev) +{ + struct tps65219_regulator_irq_type *irq_type; + struct tps65219_chip_data *pmic; + struct regulator_dev *rdev; + int error; + int i; + + struct tps65219 *tps = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + enum pmic_id chip = platform_get_device_id(pdev)->driver_data; + + pmic = &chip_info_table[chip]; + + config.dev = tps->dev; + config.driver_data = tps; + config.regmap = tps->regmap; + + for (i = 0; i < pmic->common_rdesc_size; i++) { + rdev = devm_regulator_register(&pdev->dev, &pmic->common_rdesc[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps->dev, PTR_ERR(rdev), + "Failed to register %s regulator\n", + pmic->common_rdesc[i].name); + + error = tps65219_register_irqs(pdev, tps, rdev, + pmic->common_irq_types, + pmic->common_irq_size, + pmic->common_rdesc[i].name); + if (error) + return error; + error = tps65219_register_irqs(pdev, tps, rdev, + pmic->irq_types, + pmic->dev_irq_size, + pmic->common_rdesc[i].name); + if (error) + return error; + } + + for (i = 0; i < pmic->rdesc_size; i++) { + rdev = devm_regulator_register(&pdev->dev, &pmic->rdesc[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps->dev, PTR_ERR(rdev), + "Failed to register %s regulator\n", + pmic->rdesc[i].name); + + error = tps65219_register_irqs(pdev, tps, rdev, + pmic->common_irq_types, + pmic->common_irq_size, + pmic->rdesc[i].name); + if (error) + return error; + error = tps65219_register_irqs(pdev, tps, rdev, + pmic->irq_types, + pmic->dev_irq_size, + pmic->rdesc[i].name); + if (error) + return error; + } + + /* Register non-regulator IRQs (TIMEOUT, SENSOR) with rdev=NULL */ + for (i = 0; i < pmic->common_irq_size; ++i) { + irq_type = &pmic->common_irq_types[i]; + if (tps65219_is_regulator_name(pmic, irq_type->regulator_name)) + continue; + error = tps65219_register_irqs(pdev, tps, NULL, + irq_type, 1, + irq_type->regulator_name); + if (error) + return error; + } + + for (i = 0; i < pmic->dev_irq_size; ++i) { + irq_type = &pmic->irq_types[i]; + if (tps65219_is_regulator_name(pmic, irq_type->regulator_name)) + continue; + error = tps65219_register_irqs(pdev, tps, NULL, + irq_type, 1, + irq_type->regulator_name); + if (error) + return error; + } + + return 0; +} + +static const struct platform_device_id tps65219_regulator_id_table[] = { + { .name = "tps65214-regulator", .driver_data = TPS65214 }, + { .name = "tps65215-regulator", .driver_data = TPS65215 }, + { .name = "tps65219-regulator", .driver_data = TPS65219 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, tps65219_regulator_id_table); + +static struct platform_driver tps65219_regulator_driver = { + .driver = { + .name = "tps65219-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65219_regulator_probe, + .id_table = tps65219_regulator_id_table, +}; + +module_platform_driver(tps65219_regulator_driver); + +MODULE_AUTHOR("Jerome Neanne "); +MODULE_DESCRIPTION("TPS65214/TPS65215/TPS65219 Regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/tps6524x-regulator.c b/drivers/regulator/tps6524x-regulator.c new file mode 100644 index 000000000..6beb51293 --- /dev/null +++ b/drivers/regulator/tps6524x-regulator.c @@ -0,0 +1,639 @@ +/* + * Regulator driver for TPS6524x PMIC + * + * Copyright (C) 2010 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, + * whether express or implied; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_LDO_SET 0x0 +#define LDO_ILIM_MASK 1 /* 0 = 400-800, 1 = 900-1500 */ +#define LDO_VSEL_MASK 0x0f +#define LDO2_ILIM_SHIFT 12 +#define LDO2_VSEL_SHIFT 4 +#define LDO1_ILIM_SHIFT 8 +#define LDO1_VSEL_SHIFT 0 + +#define REG_BLOCK_EN 0x1 +#define BLOCK_MASK 1 +#define BLOCK_LDO1_SHIFT 0 +#define BLOCK_LDO2_SHIFT 1 +#define BLOCK_LCD_SHIFT 2 +#define BLOCK_USB_SHIFT 3 + +#define REG_DCDC_SET 0x2 +#define DCDC_VDCDC_MASK 0x1f +#define DCDC_VDCDC1_SHIFT 0 +#define DCDC_VDCDC2_SHIFT 5 +#define DCDC_VDCDC3_SHIFT 10 + +#define REG_DCDC_EN 0x3 +#define DCDCDCDC_EN_MASK 0x1 +#define DCDCDCDC1_EN_SHIFT 0 +#define DCDCDCDC1_PG_MSK BIT(1) +#define DCDCDCDC2_EN_SHIFT 2 +#define DCDCDCDC2_PG_MSK BIT(3) +#define DCDCDCDC3_EN_SHIFT 4 +#define DCDCDCDC3_PG_MSK BIT(5) + +#define REG_USB 0x4 +#define USB_ILIM_SHIFT 0 +#define USB_ILIM_MASK 0x3 +#define USB_TSD_SHIFT 2 +#define USB_TSD_MASK 0x3 +#define USB_TWARN_SHIFT 4 +#define USB_TWARN_MASK 0x3 +#define USB_IWARN_SD BIT(6) +#define USB_FAST_LOOP BIT(7) + +#define REG_ALARM 0x5 +#define ALARM_LDO1 BIT(0) +#define ALARM_DCDC1 BIT(1) +#define ALARM_DCDC2 BIT(2) +#define ALARM_DCDC3 BIT(3) +#define ALARM_LDO2 BIT(4) +#define ALARM_USB_WARN BIT(5) +#define ALARM_USB_ALARM BIT(6) +#define ALARM_LCD BIT(9) +#define ALARM_TEMP_WARM BIT(10) +#define ALARM_TEMP_HOT BIT(11) +#define ALARM_NRST BIT(14) +#define ALARM_POWERUP BIT(15) + +#define REG_INT_ENABLE 0x6 +#define INT_LDO1 BIT(0) +#define INT_DCDC1 BIT(1) +#define INT_DCDC2 BIT(2) +#define INT_DCDC3 BIT(3) +#define INT_LDO2 BIT(4) +#define INT_USB_WARN BIT(5) +#define INT_USB_ALARM BIT(6) +#define INT_LCD BIT(9) +#define INT_TEMP_WARM BIT(10) +#define INT_TEMP_HOT BIT(11) +#define INT_GLOBAL_EN BIT(15) + +#define REG_INT_STATUS 0x7 +#define STATUS_LDO1 BIT(0) +#define STATUS_DCDC1 BIT(1) +#define STATUS_DCDC2 BIT(2) +#define STATUS_DCDC3 BIT(3) +#define STATUS_LDO2 BIT(4) +#define STATUS_USB_WARN BIT(5) +#define STATUS_USB_ALARM BIT(6) +#define STATUS_LCD BIT(9) +#define STATUS_TEMP_WARM BIT(10) +#define STATUS_TEMP_HOT BIT(11) + +#define REG_SOFTWARE_RESET 0xb +#define REG_WRITE_ENABLE 0xd +#define REG_REV_ID 0xf + +#define N_DCDC 3 +#define N_LDO 2 +#define N_SWITCH 2 +#define N_REGULATORS (N_DCDC + N_LDO + N_SWITCH) + +#define CMD_READ(reg) ((reg) << 6) +#define CMD_WRITE(reg) (BIT(5) | (reg) << 6) +#define STAT_CLK BIT(3) +#define STAT_WRITE BIT(2) +#define STAT_INVALID BIT(1) +#define STAT_WP BIT(0) + +struct field { + int reg; + int shift; + int mask; +}; + +struct supply_info { + const char *name; + int n_voltages; + const unsigned int *voltages; + int n_ilimsels; + const unsigned int *ilimsels; + struct field enable, voltage, ilimsel; +}; + +struct tps6524x { + struct device *dev; + struct spi_device *spi; + struct mutex lock; + struct regulator_desc desc[N_REGULATORS]; +}; + +static int __read_reg(struct tps6524x *hw, int reg) +{ + int error = 0; + u16 cmd = CMD_READ(reg), in; + u8 status; + struct spi_message m; + struct spi_transfer t[3]; + + spi_message_init(&m); + memset(t, 0, sizeof(t)); + + t[0].tx_buf = &cmd; + t[0].len = 2; + t[0].bits_per_word = 12; + spi_message_add_tail(&t[0], &m); + + t[1].rx_buf = ∈ + t[1].len = 2; + t[1].bits_per_word = 16; + spi_message_add_tail(&t[1], &m); + + t[2].rx_buf = &status; + t[2].len = 1; + t[2].bits_per_word = 4; + spi_message_add_tail(&t[2], &m); + + error = spi_sync(hw->spi, &m); + if (error < 0) + return error; + + dev_dbg(hw->dev, "read reg %d, data %x, status %x\n", + reg, in, status); + + if (!(status & STAT_CLK) || (status & STAT_WRITE)) + return -EIO; + + if (status & STAT_INVALID) + return -EINVAL; + + return in; +} + +static int read_reg(struct tps6524x *hw, int reg) +{ + int ret; + + mutex_lock(&hw->lock); + ret = __read_reg(hw, reg); + mutex_unlock(&hw->lock); + + return ret; +} + +static int __write_reg(struct tps6524x *hw, int reg, int val) +{ + int error = 0; + u16 cmd = CMD_WRITE(reg), out = val; + u8 status; + struct spi_message m; + struct spi_transfer t[3]; + + spi_message_init(&m); + memset(t, 0, sizeof(t)); + + t[0].tx_buf = &cmd; + t[0].len = 2; + t[0].bits_per_word = 12; + spi_message_add_tail(&t[0], &m); + + t[1].tx_buf = &out; + t[1].len = 2; + t[1].bits_per_word = 16; + spi_message_add_tail(&t[1], &m); + + t[2].rx_buf = &status; + t[2].len = 1; + t[2].bits_per_word = 4; + spi_message_add_tail(&t[2], &m); + + error = spi_sync(hw->spi, &m); + if (error < 0) + return error; + + dev_dbg(hw->dev, "wrote reg %d, data %x, status %x\n", + reg, out, status); + + if (!(status & STAT_CLK) || !(status & STAT_WRITE)) + return -EIO; + + if (status & (STAT_INVALID | STAT_WP)) + return -EINVAL; + + return error; +} + +static int __rmw_reg(struct tps6524x *hw, int reg, int mask, int val) +{ + int ret; + + ret = __read_reg(hw, reg); + if (ret < 0) + return ret; + + ret &= ~mask; + ret |= val; + + ret = __write_reg(hw, reg, ret); + + return (ret < 0) ? ret : 0; +} + +static int rmw_protect(struct tps6524x *hw, int reg, int mask, int val) +{ + int ret; + + mutex_lock(&hw->lock); + + ret = __write_reg(hw, REG_WRITE_ENABLE, 1); + if (ret) { + dev_err(hw->dev, "failed to set write enable\n"); + goto error; + } + + ret = __rmw_reg(hw, reg, mask, val); + if (ret) + dev_err(hw->dev, "failed to rmw register %d\n", reg); + + ret = __write_reg(hw, REG_WRITE_ENABLE, 0); + if (ret) { + dev_err(hw->dev, "failed to clear write enable\n"); + goto error; + } + +error: + mutex_unlock(&hw->lock); + + return ret; +} + +static int read_field(struct tps6524x *hw, const struct field *field) +{ + int tmp; + + tmp = read_reg(hw, field->reg); + if (tmp < 0) + return tmp; + + return (tmp >> field->shift) & field->mask; +} + +static int write_field(struct tps6524x *hw, const struct field *field, + int val) +{ + if (val & ~field->mask) + return -EOVERFLOW; + + return rmw_protect(hw, field->reg, + field->mask << field->shift, + val << field->shift); +} + +static const unsigned int dcdc1_voltages[] = { + 800000, 825000, 850000, 875000, + 900000, 925000, 950000, 975000, + 1000000, 1025000, 1050000, 1075000, + 1100000, 1125000, 1150000, 1175000, + 1200000, 1225000, 1250000, 1275000, + 1300000, 1325000, 1350000, 1375000, + 1400000, 1425000, 1450000, 1475000, + 1500000, 1525000, 1550000, 1575000, +}; + +static const unsigned int dcdc2_voltages[] = { + 1400000, 1450000, 1500000, 1550000, + 1600000, 1650000, 1700000, 1750000, + 1800000, 1850000, 1900000, 1950000, + 2000000, 2050000, 2100000, 2150000, + 2200000, 2250000, 2300000, 2350000, + 2400000, 2450000, 2500000, 2550000, + 2600000, 2650000, 2700000, 2750000, + 2800000, 2850000, 2900000, 2950000, +}; + +static const unsigned int dcdc3_voltages[] = { + 2400000, 2450000, 2500000, 2550000, 2600000, + 2650000, 2700000, 2750000, 2800000, 2850000, + 2900000, 2950000, 3000000, 3050000, 3100000, + 3150000, 3200000, 3250000, 3300000, 3350000, + 3400000, 3450000, 3500000, 3550000, 3600000, +}; + +static const unsigned int ldo1_voltages[] = { + 4300000, 4350000, 4400000, 4450000, + 4500000, 4550000, 4600000, 4650000, + 4700000, 4750000, 4800000, 4850000, + 4900000, 4950000, 5000000, 5050000, +}; + +static const unsigned int ldo2_voltages[] = { + 1100000, 1150000, 1200000, 1250000, + 1300000, 1700000, 1750000, 1800000, + 1850000, 1900000, 3150000, 3200000, + 3250000, 3300000, 3350000, 3400000, +}; + +static const unsigned int fixed_5000000_voltage[] = { + 5000000 +}; + +static const unsigned int ldo_ilimsel[] = { + 400000, 1500000 +}; + +static const unsigned int usb_ilimsel[] = { + 200000, 400000, 800000, 1000000 +}; + +static const unsigned int fixed_2400000_ilimsel[] = { + 2400000 +}; + +static const unsigned int fixed_1200000_ilimsel[] = { + 1200000 +}; + +static const unsigned int fixed_400000_ilimsel[] = { + 400000 +}; + +#define __MK_FIELD(_reg, _mask, _shift) \ + { .reg = (_reg), .mask = (_mask), .shift = (_shift), } + +static const struct supply_info supply_info[N_REGULATORS] = { + { + .name = "DCDC1", + .n_voltages = ARRAY_SIZE(dcdc1_voltages), + .voltages = dcdc1_voltages, + .n_ilimsels = ARRAY_SIZE(fixed_2400000_ilimsel), + .ilimsels = fixed_2400000_ilimsel, + .enable = __MK_FIELD(REG_DCDC_EN, DCDCDCDC_EN_MASK, + DCDCDCDC1_EN_SHIFT), + .voltage = __MK_FIELD(REG_DCDC_SET, DCDC_VDCDC_MASK, + DCDC_VDCDC1_SHIFT), + }, + { + .name = "DCDC2", + .n_voltages = ARRAY_SIZE(dcdc2_voltages), + .voltages = dcdc2_voltages, + .n_ilimsels = ARRAY_SIZE(fixed_1200000_ilimsel), + .ilimsels = fixed_1200000_ilimsel, + .enable = __MK_FIELD(REG_DCDC_EN, DCDCDCDC_EN_MASK, + DCDCDCDC2_EN_SHIFT), + .voltage = __MK_FIELD(REG_DCDC_SET, DCDC_VDCDC_MASK, + DCDC_VDCDC2_SHIFT), + }, + { + .name = "DCDC3", + .n_voltages = ARRAY_SIZE(dcdc3_voltages), + .voltages = dcdc3_voltages, + .n_ilimsels = ARRAY_SIZE(fixed_1200000_ilimsel), + .ilimsels = fixed_1200000_ilimsel, + .enable = __MK_FIELD(REG_DCDC_EN, DCDCDCDC_EN_MASK, + DCDCDCDC3_EN_SHIFT), + .voltage = __MK_FIELD(REG_DCDC_SET, DCDC_VDCDC_MASK, + DCDC_VDCDC3_SHIFT), + }, + { + .name = "LDO1", + .n_voltages = ARRAY_SIZE(ldo1_voltages), + .voltages = ldo1_voltages, + .n_ilimsels = ARRAY_SIZE(ldo_ilimsel), + .ilimsels = ldo_ilimsel, + .enable = __MK_FIELD(REG_BLOCK_EN, BLOCK_MASK, + BLOCK_LDO1_SHIFT), + .voltage = __MK_FIELD(REG_LDO_SET, LDO_VSEL_MASK, + LDO1_VSEL_SHIFT), + .ilimsel = __MK_FIELD(REG_LDO_SET, LDO_ILIM_MASK, + LDO1_ILIM_SHIFT), + }, + { + .name = "LDO2", + .n_voltages = ARRAY_SIZE(ldo2_voltages), + .voltages = ldo2_voltages, + .n_ilimsels = ARRAY_SIZE(ldo_ilimsel), + .ilimsels = ldo_ilimsel, + .enable = __MK_FIELD(REG_BLOCK_EN, BLOCK_MASK, + BLOCK_LDO2_SHIFT), + .voltage = __MK_FIELD(REG_LDO_SET, LDO_VSEL_MASK, + LDO2_VSEL_SHIFT), + .ilimsel = __MK_FIELD(REG_LDO_SET, LDO_ILIM_MASK, + LDO2_ILIM_SHIFT), + }, + { + .name = "USB", + .n_voltages = ARRAY_SIZE(fixed_5000000_voltage), + .voltages = fixed_5000000_voltage, + .n_ilimsels = ARRAY_SIZE(usb_ilimsel), + .ilimsels = usb_ilimsel, + .enable = __MK_FIELD(REG_BLOCK_EN, BLOCK_MASK, + BLOCK_USB_SHIFT), + .ilimsel = __MK_FIELD(REG_USB, USB_ILIM_MASK, + USB_ILIM_SHIFT), + }, + { + .name = "LCD", + .n_voltages = ARRAY_SIZE(fixed_5000000_voltage), + .voltages = fixed_5000000_voltage, + .n_ilimsels = ARRAY_SIZE(fixed_400000_ilimsel), + .ilimsels = fixed_400000_ilimsel, + .enable = __MK_FIELD(REG_BLOCK_EN, BLOCK_MASK, + BLOCK_LCD_SHIFT), + }, +}; + +static int set_voltage_sel(struct regulator_dev *rdev, unsigned selector) +{ + const struct supply_info *info; + struct tps6524x *hw; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + if (rdev->desc->n_voltages == 1) + return -EINVAL; + + return write_field(hw, &info->voltage, selector); +} + +static int get_voltage_sel(struct regulator_dev *rdev) +{ + const struct supply_info *info; + struct tps6524x *hw; + int ret; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + if (rdev->desc->n_voltages == 1) + return 0; + + ret = read_field(hw, &info->voltage); + if (ret < 0) + return ret; + if (WARN_ON(ret >= info->n_voltages)) + return -EIO; + + return ret; +} + +static int set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + const struct supply_info *info; + struct tps6524x *hw; + int i; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + if (info->n_ilimsels == 1) + return -EINVAL; + + for (i = info->n_ilimsels - 1; i >= 0; i--) { + if (min_uA <= info->ilimsels[i] && + max_uA >= info->ilimsels[i]) + return write_field(hw, &info->ilimsel, i); + } + + return -EINVAL; +} + +static int get_current_limit(struct regulator_dev *rdev) +{ + const struct supply_info *info; + struct tps6524x *hw; + int ret; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + if (info->n_ilimsels == 1) + return info->ilimsels[0]; + + ret = read_field(hw, &info->ilimsel); + if (ret < 0) + return ret; + if (WARN_ON(ret >= info->n_ilimsels)) + return -EIO; + + return info->ilimsels[ret]; +} + +static int enable_supply(struct regulator_dev *rdev) +{ + const struct supply_info *info; + struct tps6524x *hw; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + return write_field(hw, &info->enable, 1); +} + +static int disable_supply(struct regulator_dev *rdev) +{ + const struct supply_info *info; + struct tps6524x *hw; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + return write_field(hw, &info->enable, 0); +} + +static int is_supply_enabled(struct regulator_dev *rdev) +{ + const struct supply_info *info; + struct tps6524x *hw; + + hw = rdev_get_drvdata(rdev); + info = &supply_info[rdev_get_id(rdev)]; + + return read_field(hw, &info->enable); +} + +static const struct regulator_ops regulator_ops = { + .is_enabled = is_supply_enabled, + .enable = enable_supply, + .disable = disable_supply, + .get_voltage_sel = get_voltage_sel, + .set_voltage_sel = set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .set_current_limit = set_current_limit, + .get_current_limit = get_current_limit, +}; + +static int pmic_probe(struct spi_device *spi) +{ + struct tps6524x *hw; + struct device *dev = &spi->dev; + const struct supply_info *info = supply_info; + struct regulator_init_data *init_data; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + init_data = dev_get_platdata(dev); + if (!init_data) { + dev_err(dev, "could not find regulator platform data\n"); + return -EINVAL; + } + + hw = devm_kzalloc(&spi->dev, sizeof(struct tps6524x), GFP_KERNEL); + if (!hw) + return -ENOMEM; + + spi_set_drvdata(spi, hw); + + hw->dev = dev; + hw->spi = spi; + mutex_init(&hw->lock); + + for (i = 0; i < N_REGULATORS; i++, info++, init_data++) { + hw->desc[i].name = info->name; + hw->desc[i].id = i; + hw->desc[i].n_voltages = info->n_voltages; + hw->desc[i].volt_table = info->voltages; + hw->desc[i].ops = ®ulator_ops; + hw->desc[i].type = REGULATOR_VOLTAGE; + hw->desc[i].owner = THIS_MODULE; + + config.dev = dev; + config.init_data = init_data; + config.driver_data = hw; + + rdev = devm_regulator_register(dev, &hw->desc[i], &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + } + + return 0; +} + +static struct spi_driver pmic_driver = { + .probe = pmic_probe, + .driver = { + .name = "tps6524x", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +module_spi_driver(pmic_driver); + +MODULE_DESCRIPTION("TPS6524X PMIC Driver"); +MODULE_AUTHOR("Cyril Chemparathy"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("spi:tps6524x"); diff --git a/drivers/regulator/tps6586x-regulator.c b/drivers/regulator/tps6586x-regulator.c new file mode 100644 index 000000000..1ab576759 --- /dev/null +++ b/drivers/regulator/tps6586x-regulator.c @@ -0,0 +1,543 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for TI TPS6586x + * + * Copyright (C) 2010 Compulab Ltd. + * Author: Mike Rapoport + * + * Based on da903x + * Copyright (C) 2006-2008 Marvell International Ltd. + * Copyright (C) 2008 Compulab Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* supply control and voltage setting */ +#define TPS6586X_SUPPLYENA 0x10 +#define TPS6586X_SUPPLYENB 0x11 +#define TPS6586X_SUPPLYENC 0x12 +#define TPS6586X_SUPPLYEND 0x13 +#define TPS6586X_SUPPLYENE 0x14 +#define TPS6586X_VCC1 0x20 +#define TPS6586X_VCC2 0x21 +#define TPS6586X_SM1V1 0x23 +#define TPS6586X_SM1V2 0x24 +#define TPS6586X_SM1SL 0x25 +#define TPS6586X_SM0V1 0x26 +#define TPS6586X_SM0V2 0x27 +#define TPS6586X_SM0SL 0x28 +#define TPS6586X_LDO2AV1 0x29 +#define TPS6586X_LDO2AV2 0x2A +#define TPS6586X_LDO2BV1 0x2F +#define TPS6586X_LDO2BV2 0x30 +#define TPS6586X_LDO4V1 0x32 +#define TPS6586X_LDO4V2 0x33 + +/* converter settings */ +#define TPS6586X_SUPPLYV1 0x41 +#define TPS6586X_SUPPLYV2 0x42 +#define TPS6586X_SUPPLYV3 0x43 +#define TPS6586X_SUPPLYV4 0x44 +#define TPS6586X_SUPPLYV5 0x45 +#define TPS6586X_SUPPLYV6 0x46 +#define TPS6586X_SMODE1 0x47 +#define TPS6586X_SMODE2 0x48 + +struct tps6586x_regulator { + struct regulator_desc desc; + + int enable_bit[2]; + int enable_reg[2]; +}; + +static const struct regulator_ops tps6586x_rw_regulator_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops tps6586x_rw_linear_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops tps6586x_ro_regulator_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static const struct regulator_ops tps6586x_sys_regulator_ops = { +}; + +static const unsigned int tps6586x_ldo0_voltages[] = { + 1200000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000, +}; + +static const unsigned int tps6586x_ldo_voltages[] = { + 1250000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000, +}; + +static const unsigned int tps658640_rtc_voltages[] = { + 2500000, 2850000, 3100000, 3300000, +}; + +#define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1, goreg, gobit) \ + .desc = { \ + .supply_name = _pin_name, \ + .name = "REG-" #_id, \ + .ops = &tps6586x_## _ops ## _regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = TPS6586X_ID_##_id, \ + .n_voltages = ARRAY_SIZE(vdata##_voltages), \ + .volt_table = vdata##_voltages, \ + .owner = THIS_MODULE, \ + .enable_reg = TPS6586X_SUPPLY##ereg0, \ + .enable_mask = 1 << (ebit0), \ + .vsel_reg = TPS6586X_##vreg, \ + .vsel_mask = ((1 << (nbits)) - 1) << (shift), \ + .apply_reg = (goreg), \ + .apply_bit = (gobit), \ + }, \ + .enable_reg[0] = TPS6586X_SUPPLY##ereg0, \ + .enable_bit[0] = (ebit0), \ + .enable_reg[1] = TPS6586X_SUPPLY##ereg1, \ + .enable_bit[1] = (ebit1), + +#define TPS6586X_REGULATOR_LINEAR(_id, _ops, _pin_name, n_volt, min_uv, \ + uv_step, vreg, shift, nbits, ereg0, \ + ebit0, ereg1, ebit1, goreg, gobit) \ + .desc = { \ + .supply_name = _pin_name, \ + .name = "REG-" #_id, \ + .ops = &tps6586x_## _ops ## _regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = TPS6586X_ID_##_id, \ + .n_voltages = n_volt, \ + .min_uV = min_uv, \ + .uV_step = uv_step, \ + .owner = THIS_MODULE, \ + .enable_reg = TPS6586X_SUPPLY##ereg0, \ + .enable_mask = 1 << (ebit0), \ + .vsel_reg = TPS6586X_##vreg, \ + .vsel_mask = ((1 << (nbits)) - 1) << (shift), \ + .apply_reg = (goreg), \ + .apply_bit = (gobit), \ + }, \ + .enable_reg[0] = TPS6586X_SUPPLY##ereg0, \ + .enable_bit[0] = (ebit0), \ + .enable_reg[1] = TPS6586X_SUPPLY##ereg1, \ + .enable_bit[1] = (ebit1), + +#define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1) \ +{ \ + TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1, 0, 0) \ +} + +#define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ + shift, nbits, ereg0, ebit0, ereg1, ebit1) \ +{ \ + TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ + min_uv, uv_step, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1, 0, 0) \ +} + +#define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1) \ +{ \ + TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1, 0, 0) \ +} + +#define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ + nbits, ereg0, ebit0, ereg1, ebit1, goreg, gobit) \ +{ \ + TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ + min_uv, uv_step, vreg, shift, nbits, \ + ereg0, ebit0, ereg1, ebit1, goreg, \ + gobit) \ +} + +#define TPS6586X_SYS_REGULATOR() \ +{ \ + .desc = { \ + .supply_name = "sys", \ + .name = "REG-SYS", \ + .ops = &tps6586x_sys_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = TPS6586X_ID_SYS, \ + .owner = THIS_MODULE, \ + }, \ +} + +static struct tps6586x_regulator tps6586x_regulator[] = { + TPS6586X_SYS_REGULATOR(), + TPS6586X_LDO(LDO_0, "vinldo01", tps6586x_ldo0, SUPPLYV1, 5, 3, ENC, 0, + END, 0), + TPS6586X_LDO(LDO_3, "vinldo23", tps6586x_ldo, SUPPLYV4, 0, 3, ENC, 2, + END, 2), + TPS6586X_LDO(LDO_5, "REG-SYS", tps6586x_ldo, SUPPLYV6, 0, 3, ENE, 6, + ENE, 6), + TPS6586X_LDO(LDO_6, "vinldo678", tps6586x_ldo, SUPPLYV3, 0, 3, ENC, 4, + END, 4), + TPS6586X_LDO(LDO_7, "vinldo678", tps6586x_ldo, SUPPLYV3, 3, 3, ENC, 5, + END, 5), + TPS6586X_LDO(LDO_8, "vinldo678", tps6586x_ldo, SUPPLYV2, 5, 3, ENC, 6, + END, 6), + TPS6586X_LDO(LDO_9, "vinldo9", tps6586x_ldo, SUPPLYV6, 3, 3, ENE, 7, + ENE, 7), + TPS6586X_LDO(LDO_RTC, "REG-SYS", tps6586x_ldo, SUPPLYV4, 3, 3, V4, 7, + V4, 7), + TPS6586X_LDO_LINEAR(LDO_1, "vinldo01", 32, 725000, 25000, SUPPLYV1, + 0, 5, ENC, 1, END, 1), + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 3000000, 50000, SUPPLYV2, + 0, 5, ENC, 7, END, 7), + TPS6586X_DVM(LDO_2, "vinldo23", 32, 725000, 25000, LDO2BV1, 0, 5, + ENA, 3, ENB, 3, TPS6586X_VCC2, BIT(6)), + TPS6586X_DVM(LDO_4, "vinldo4", 32, 1700000, 25000, LDO4V1, 0, 5, + ENC, 3, END, 3, TPS6586X_VCC1, BIT(6)), + TPS6586X_DVM(SM_0, "vin-sm0", 32, 725000, 25000, SM0V1, 0, 5, + ENA, 1, ENB, 1, TPS6586X_VCC1, BIT(2)), + TPS6586X_DVM(SM_1, "vin-sm1", 32, 725000, 25000, SM1V1, 0, 5, + ENA, 0, ENB, 0, TPS6586X_VCC1, BIT(0)), +}; + +static struct tps6586x_regulator tps658623_regulator[] = { + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1700000, 25000, SUPPLYV2, + 0, 5, ENC, 7, END, 7), +}; + +static struct tps6586x_regulator tps658640_regulator[] = { + TPS6586X_LDO(LDO_3, "vinldo23", tps6586x_ldo0, SUPPLYV4, 0, 3, + ENC, 2, END, 2), + TPS6586X_LDO(LDO_5, "REG-SYS", tps6586x_ldo0, SUPPLYV6, 0, 3, + ENE, 6, ENE, 6), + TPS6586X_LDO(LDO_6, "vinldo678", tps6586x_ldo0, SUPPLYV3, 0, 3, + ENC, 4, END, 4), + TPS6586X_LDO(LDO_7, "vinldo678", tps6586x_ldo0, SUPPLYV3, 3, 3, + ENC, 5, END, 5), + TPS6586X_LDO(LDO_8, "vinldo678", tps6586x_ldo0, SUPPLYV2, 5, 3, + ENC, 6, END, 6), + TPS6586X_LDO(LDO_9, "vinldo9", tps6586x_ldo0, SUPPLYV6, 3, 3, + ENE, 7, ENE, 7), + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 2150000, 50000, SUPPLYV2, + 0, 5, ENC, 7, END, 7), + + TPS6586X_FIXED_LDO(LDO_RTC, "REG-SYS", tps658640_rtc, SUPPLYV4, 3, 2, + V4, 7, V4, 7), +}; + +static struct tps6586x_regulator tps658643_regulator[] = { + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1025000, 25000, SUPPLYV2, + 0, 5, ENC, 7, END, 7), +}; + +/* + * TPS6586X has 2 enable bits that are OR'ed to determine the actual + * regulator state. Clearing one of this bits allows switching + * regulator on and of with single register write. + */ +static inline int tps6586x_regulator_preinit(struct device *parent, + struct tps6586x_regulator *ri) +{ + uint8_t val1, val2; + int ret; + + if (ri->enable_reg[0] == ri->enable_reg[1] && + ri->enable_bit[0] == ri->enable_bit[1]) + return 0; + + ret = tps6586x_read(parent, ri->enable_reg[0], &val1); + if (ret) + return ret; + + ret = tps6586x_read(parent, ri->enable_reg[1], &val2); + if (ret) + return ret; + + if (!(val2 & (1 << ri->enable_bit[1]))) + return 0; + + /* + * The regulator is on, but it's enabled with the bit we don't + * want to use, so we switch the enable bits + */ + if (!(val1 & (1 << ri->enable_bit[0]))) { + ret = tps6586x_set_bits(parent, ri->enable_reg[0], + 1 << ri->enable_bit[0]); + if (ret) + return ret; + } + + return tps6586x_clr_bits(parent, ri->enable_reg[1], + 1 << ri->enable_bit[1]); +} + +static int tps6586x_regulator_set_slew_rate(struct platform_device *pdev, + int id, struct regulator_init_data *p) +{ + struct device *parent = pdev->dev.parent; + struct tps6586x_settings *setting = p->driver_data; + uint8_t reg; + + if (setting == NULL) + return 0; + + if (!(setting->slew_rate & TPS6586X_SLEW_RATE_SET)) + return 0; + + /* only SM0 and SM1 can have the slew rate settings */ + switch (id) { + case TPS6586X_ID_SM_0: + reg = TPS6586X_SM0SL; + break; + case TPS6586X_ID_SM_1: + reg = TPS6586X_SM1SL; + break; + default: + dev_err(&pdev->dev, "Only SM0/SM1 can set slew rate\n"); + return -EINVAL; + } + + return tps6586x_write(parent, reg, + setting->slew_rate & TPS6586X_SLEW_RATE_MASK); +} + +static struct tps6586x_regulator *find_regulator_info(int id, int version) +{ + struct tps6586x_regulator *ri; + struct tps6586x_regulator *table = NULL; + int num; + int i; + + switch (version) { + case TPS658623: + case TPS658624: + table = tps658623_regulator; + num = ARRAY_SIZE(tps658623_regulator); + break; + case TPS658640: + case TPS658640v2: + table = tps658640_regulator; + num = ARRAY_SIZE(tps658640_regulator); + break; + case TPS658643: + table = tps658643_regulator; + num = ARRAY_SIZE(tps658643_regulator); + break; + } + + /* Search version specific table first */ + if (table) { + for (i = 0; i < num; i++) { + ri = &table[i]; + if (ri->desc.id == id) + return ri; + } + } + + for (i = 0; i < ARRAY_SIZE(tps6586x_regulator); i++) { + ri = &tps6586x_regulator[i]; + if (ri->desc.id == id) + return ri; + } + return NULL; +} + +#ifdef CONFIG_OF +static struct of_regulator_match tps6586x_matches[] = { + { .name = "sys", .driver_data = (void *)TPS6586X_ID_SYS }, + { .name = "sm0", .driver_data = (void *)TPS6586X_ID_SM_0 }, + { .name = "sm1", .driver_data = (void *)TPS6586X_ID_SM_1 }, + { .name = "sm2", .driver_data = (void *)TPS6586X_ID_SM_2 }, + { .name = "ldo0", .driver_data = (void *)TPS6586X_ID_LDO_0 }, + { .name = "ldo1", .driver_data = (void *)TPS6586X_ID_LDO_1 }, + { .name = "ldo2", .driver_data = (void *)TPS6586X_ID_LDO_2 }, + { .name = "ldo3", .driver_data = (void *)TPS6586X_ID_LDO_3 }, + { .name = "ldo4", .driver_data = (void *)TPS6586X_ID_LDO_4 }, + { .name = "ldo5", .driver_data = (void *)TPS6586X_ID_LDO_5 }, + { .name = "ldo6", .driver_data = (void *)TPS6586X_ID_LDO_6 }, + { .name = "ldo7", .driver_data = (void *)TPS6586X_ID_LDO_7 }, + { .name = "ldo8", .driver_data = (void *)TPS6586X_ID_LDO_8 }, + { .name = "ldo9", .driver_data = (void *)TPS6586X_ID_LDO_9 }, + { .name = "ldo_rtc", .driver_data = (void *)TPS6586X_ID_LDO_RTC }, +}; + +static struct tps6586x_platform_data *tps6586x_parse_regulator_dt( + struct platform_device *pdev, + struct of_regulator_match **tps6586x_reg_matches) +{ + const unsigned int num = ARRAY_SIZE(tps6586x_matches); + struct device_node *np = pdev->dev.parent->of_node; + struct device_node *regs; + const char *sys_rail = NULL; + unsigned int i; + struct tps6586x_platform_data *pdata; + int err; + + regs = of_get_child_by_name(np, "regulators"); + if (!regs) { + dev_err(&pdev->dev, "regulator node not found\n"); + return NULL; + } + + err = of_regulator_match(&pdev->dev, regs, tps6586x_matches, num); + of_node_put(regs); + if (err < 0) { + dev_err(&pdev->dev, "Regulator match failed, e %d\n", err); + return NULL; + } + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + for (i = 0; i < num; i++) { + uintptr_t id; + if (!tps6586x_matches[i].init_data) + continue; + + pdata->reg_init_data[i] = tps6586x_matches[i].init_data; + id = (uintptr_t)tps6586x_matches[i].driver_data; + if (id == TPS6586X_ID_SYS) + sys_rail = pdata->reg_init_data[i]->constraints.name; + + if ((id == TPS6586X_ID_LDO_5) || (id == TPS6586X_ID_LDO_RTC)) + pdata->reg_init_data[i]->supply_regulator = sys_rail; + } + *tps6586x_reg_matches = tps6586x_matches; + return pdata; +} +#else +static struct tps6586x_platform_data *tps6586x_parse_regulator_dt( + struct platform_device *pdev, + struct of_regulator_match **tps6586x_reg_matches) +{ + *tps6586x_reg_matches = NULL; + return NULL; +} +#endif + +static int tps6586x_regulator_probe(struct platform_device *pdev) +{ + struct tps6586x_regulator *ri = NULL; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regulator_init_data *reg_data; + struct tps6586x_platform_data *pdata; + struct of_regulator_match *tps6586x_reg_matches = NULL; + int version; + int id; + int err; + + dev_dbg(&pdev->dev, "Probing regulator\n"); + + pdata = dev_get_platdata(pdev->dev.parent); + if ((!pdata) && (pdev->dev.parent->of_node)) + pdata = tps6586x_parse_regulator_dt(pdev, + &tps6586x_reg_matches); + + if (!pdata) { + dev_err(&pdev->dev, "Platform data not available, exiting\n"); + return -ENODEV; + } + + version = tps6586x_get_version(pdev->dev.parent); + + for (id = 0; id < TPS6586X_ID_MAX_REGULATOR; ++id) { + reg_data = pdata->reg_init_data[id]; + + ri = find_regulator_info(id, version); + + if (!ri) { + dev_err(&pdev->dev, "invalid regulator ID specified\n"); + return -EINVAL; + } + + err = tps6586x_regulator_preinit(pdev->dev.parent, ri); + if (err) { + dev_err(&pdev->dev, + "regulator %d preinit failed, e %d\n", id, err); + return err; + } + + config.dev = pdev->dev.parent; + config.init_data = reg_data; + config.driver_data = ri; + + if (tps6586x_reg_matches) + config.of_node = tps6586x_reg_matches[id].of_node; + + rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + ri->desc.name); + return PTR_ERR(rdev); + } + + if (reg_data) { + err = tps6586x_regulator_set_slew_rate(pdev, id, + reg_data); + if (err < 0) { + dev_err(&pdev->dev, + "Slew rate config failed, e %d\n", err); + return err; + } + } + } + + platform_set_drvdata(pdev, rdev); + return 0; +} + +static struct platform_driver tps6586x_regulator_driver = { + .driver = { + .name = "tps6586x-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps6586x_regulator_probe, +}; + +static int __init tps6586x_regulator_init(void) +{ + return platform_driver_register(&tps6586x_regulator_driver); +} +subsys_initcall(tps6586x_regulator_init); + +static void __exit tps6586x_regulator_exit(void) +{ + platform_driver_unregister(&tps6586x_regulator_driver); +} +module_exit(tps6586x_regulator_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Mike Rapoport "); +MODULE_DESCRIPTION("Regulator Driver for TI TPS6586X PMIC"); +MODULE_ALIAS("platform:tps6586x-regulator"); diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c new file mode 100644 index 000000000..3a3027e0b --- /dev/null +++ b/drivers/regulator/tps65910-regulator.c @@ -0,0 +1,1278 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * tps65910.c -- TI tps65910 + * + * Copyright 2010 Texas Instruments Inc. + * + * Author: Graeme Gregory + * Author: Jorge Eduardo Candelaria + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS65910_SUPPLY_STATE_ENABLED 0x1 +#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ + TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ + TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ + TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) + +/* supported VIO voltages in microvolts */ +static const unsigned int VIO_VSEL_table[] = { + 1500000, 1800000, 2500000, 3300000, +}; + +/* VSEL tables for TPS65910 specific LDOs and dcdc's */ + +/* supported VRTC voltages in microvolts */ +static const unsigned int VRTC_VSEL_table[] = { + 1800000, +}; + +/* supported VDD3 voltages in microvolts */ +static const unsigned int VDD3_VSEL_table[] = { + 5000000, +}; + +/* supported VDIG1 voltages in microvolts */ +static const unsigned int VDIG1_VSEL_table[] = { + 1200000, 1500000, 1800000, 2700000, +}; + +/* supported VDIG2 voltages in microvolts */ +static const unsigned int VDIG2_VSEL_table[] = { + 1000000, 1100000, 1200000, 1800000, +}; + +/* supported VPLL voltages in microvolts */ +static const unsigned int VPLL_VSEL_table[] = { + 1000000, 1100000, 1800000, 2500000, +}; + +/* supported VDAC voltages in microvolts */ +static const unsigned int VDAC_VSEL_table[] = { + 1800000, 2600000, 2800000, 2850000, +}; + +/* supported VAUX1 voltages in microvolts */ +static const unsigned int VAUX1_VSEL_table[] = { + 1800000, 2500000, 2800000, 2850000, +}; + +/* supported VAUX2 voltages in microvolts */ +static const unsigned int VAUX2_VSEL_table[] = { + 1800000, 2800000, 2900000, 3300000, +}; + +/* supported VAUX33 voltages in microvolts */ +static const unsigned int VAUX33_VSEL_table[] = { + 1800000, 2000000, 2800000, 3300000, +}; + +/* supported VMMC voltages in microvolts */ +static const unsigned int VMMC_VSEL_table[] = { + 1800000, 2800000, 3000000, 3300000, +}; + +/* supported BBCH voltages in microvolts */ +static const unsigned int VBB_VSEL_table[] = { + 3000000, 2520000, 3150000, 5000000, +}; + +struct tps_info { + const char *name; + const char *vin_name; + u8 n_voltages; + const unsigned int *voltage_table; + int enable_time_us; +}; + +static struct tps_info tps65910_regs[] = { + { + .name = "vrtc", + .vin_name = "vcc7", + .n_voltages = ARRAY_SIZE(VRTC_VSEL_table), + .voltage_table = VRTC_VSEL_table, + .enable_time_us = 2200, + }, + { + .name = "vio", + .vin_name = "vccio", + .n_voltages = ARRAY_SIZE(VIO_VSEL_table), + .voltage_table = VIO_VSEL_table, + .enable_time_us = 350, + }, + { + .name = "vdd1", + .vin_name = "vcc1", + .enable_time_us = 350, + }, + { + .name = "vdd2", + .vin_name = "vcc2", + .enable_time_us = 350, + }, + { + .name = "vdd3", + .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), + .voltage_table = VDD3_VSEL_table, + .enable_time_us = 200, + }, + { + .name = "vdig1", + .vin_name = "vcc6", + .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), + .voltage_table = VDIG1_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vdig2", + .vin_name = "vcc6", + .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), + .voltage_table = VDIG2_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vpll", + .vin_name = "vcc5", + .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), + .voltage_table = VPLL_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vdac", + .vin_name = "vcc5", + .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), + .voltage_table = VDAC_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vaux1", + .vin_name = "vcc4", + .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), + .voltage_table = VAUX1_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vaux2", + .vin_name = "vcc4", + .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), + .voltage_table = VAUX2_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vaux33", + .vin_name = "vcc3", + .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), + .voltage_table = VAUX33_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vmmc", + .vin_name = "vcc3", + .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), + .voltage_table = VMMC_VSEL_table, + .enable_time_us = 100, + }, + { + .name = "vbb", + .vin_name = "vcc7", + .n_voltages = ARRAY_SIZE(VBB_VSEL_table), + .voltage_table = VBB_VSEL_table, + }, +}; + +static struct tps_info tps65911_regs[] = { + { + .name = "vrtc", + .vin_name = "vcc7", + .enable_time_us = 2200, + }, + { + .name = "vio", + .vin_name = "vccio", + .n_voltages = ARRAY_SIZE(VIO_VSEL_table), + .voltage_table = VIO_VSEL_table, + .enable_time_us = 350, + }, + { + .name = "vdd1", + .vin_name = "vcc1", + .n_voltages = 0x4C, + .enable_time_us = 350, + }, + { + .name = "vdd2", + .vin_name = "vcc2", + .n_voltages = 0x4C, + .enable_time_us = 350, + }, + { + .name = "vddctrl", + .n_voltages = 0x44, + .enable_time_us = 900, + }, + { + .name = "ldo1", + .vin_name = "vcc6", + .n_voltages = 0x33, + .enable_time_us = 420, + }, + { + .name = "ldo2", + .vin_name = "vcc6", + .n_voltages = 0x33, + .enable_time_us = 420, + }, + { + .name = "ldo3", + .vin_name = "vcc5", + .n_voltages = 0x1A, + .enable_time_us = 230, + }, + { + .name = "ldo4", + .vin_name = "vcc5", + .n_voltages = 0x33, + .enable_time_us = 230, + }, + { + .name = "ldo5", + .vin_name = "vcc4", + .n_voltages = 0x1A, + .enable_time_us = 230, + }, + { + .name = "ldo6", + .vin_name = "vcc3", + .n_voltages = 0x1A, + .enable_time_us = 230, + }, + { + .name = "ldo7", + .vin_name = "vcc3", + .n_voltages = 0x1A, + .enable_time_us = 230, + }, + { + .name = "ldo8", + .vin_name = "vcc3", + .n_voltages = 0x1A, + .enable_time_us = 230, + }, +}; + +#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) +static unsigned int tps65910_ext_sleep_control[] = { + 0, + EXT_CONTROL_REG_BITS(VIO, 1, 0), + EXT_CONTROL_REG_BITS(VDD1, 1, 1), + EXT_CONTROL_REG_BITS(VDD2, 1, 2), + EXT_CONTROL_REG_BITS(VDD3, 1, 3), + EXT_CONTROL_REG_BITS(VDIG1, 0, 1), + EXT_CONTROL_REG_BITS(VDIG2, 0, 2), + EXT_CONTROL_REG_BITS(VPLL, 0, 6), + EXT_CONTROL_REG_BITS(VDAC, 0, 7), + EXT_CONTROL_REG_BITS(VAUX1, 0, 3), + EXT_CONTROL_REG_BITS(VAUX2, 0, 4), + EXT_CONTROL_REG_BITS(VAUX33, 0, 5), + EXT_CONTROL_REG_BITS(VMMC, 0, 0), +}; + +static unsigned int tps65911_ext_sleep_control[] = { + 0, + EXT_CONTROL_REG_BITS(VIO, 1, 0), + EXT_CONTROL_REG_BITS(VDD1, 1, 1), + EXT_CONTROL_REG_BITS(VDD2, 1, 2), + EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), + EXT_CONTROL_REG_BITS(LDO1, 0, 1), + EXT_CONTROL_REG_BITS(LDO2, 0, 2), + EXT_CONTROL_REG_BITS(LDO3, 0, 7), + EXT_CONTROL_REG_BITS(LDO4, 0, 6), + EXT_CONTROL_REG_BITS(LDO5, 0, 3), + EXT_CONTROL_REG_BITS(LDO6, 0, 0), + EXT_CONTROL_REG_BITS(LDO7, 0, 5), + EXT_CONTROL_REG_BITS(LDO8, 0, 4), +}; + +struct tps65910_reg { + struct regulator_desc *desc; + struct tps65910 *mfd; + struct regulator_dev **rdev; + struct tps_info **info; + int num_regulators; + int mode; + int (*get_ctrl_reg)(int); + unsigned int *ext_sleep_control; + unsigned int board_ext_control[TPS65910_NUM_REGS]; +}; + +static int tps65910_get_ctrl_register(int id) +{ + switch (id) { + case TPS65910_REG_VRTC: + return TPS65910_VRTC; + case TPS65910_REG_VIO: + return TPS65910_VIO; + case TPS65910_REG_VDD1: + return TPS65910_VDD1; + case TPS65910_REG_VDD2: + return TPS65910_VDD2; + case TPS65910_REG_VDD3: + return TPS65910_VDD3; + case TPS65910_REG_VDIG1: + return TPS65910_VDIG1; + case TPS65910_REG_VDIG2: + return TPS65910_VDIG2; + case TPS65910_REG_VPLL: + return TPS65910_VPLL; + case TPS65910_REG_VDAC: + return TPS65910_VDAC; + case TPS65910_REG_VAUX1: + return TPS65910_VAUX1; + case TPS65910_REG_VAUX2: + return TPS65910_VAUX2; + case TPS65910_REG_VAUX33: + return TPS65910_VAUX33; + case TPS65910_REG_VMMC: + return TPS65910_VMMC; + case TPS65910_REG_VBB: + return TPS65910_BBCH; + default: + return -EINVAL; + } +} + +static int tps65911_get_ctrl_register(int id) +{ + switch (id) { + case TPS65910_REG_VRTC: + return TPS65910_VRTC; + case TPS65910_REG_VIO: + return TPS65910_VIO; + case TPS65910_REG_VDD1: + return TPS65910_VDD1; + case TPS65910_REG_VDD2: + return TPS65910_VDD2; + case TPS65911_REG_VDDCTRL: + return TPS65911_VDDCTRL; + case TPS65911_REG_LDO1: + return TPS65911_LDO1; + case TPS65911_REG_LDO2: + return TPS65911_LDO2; + case TPS65911_REG_LDO3: + return TPS65911_LDO3; + case TPS65911_REG_LDO4: + return TPS65911_LDO4; + case TPS65911_REG_LDO5: + return TPS65911_LDO5; + case TPS65911_REG_LDO6: + return TPS65911_LDO6; + case TPS65911_REG_LDO7: + return TPS65911_LDO7; + case TPS65911_REG_LDO8: + return TPS65911_LDO8; + default: + return -EINVAL; + } +} + +static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int reg, id = rdev_get_id(dev); + + reg = pmic->get_ctrl_reg(id); + if (reg < 0) + return reg; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + return regmap_update_bits(regmap, reg, + LDO_ST_MODE_BIT | LDO_ST_ON_BIT, + LDO_ST_ON_BIT); + case REGULATOR_MODE_IDLE: + return regmap_set_bits(regmap, reg, + LDO_ST_ON_BIT | LDO_ST_MODE_BIT); + case REGULATOR_MODE_STANDBY: + return regmap_clear_bits(regmap, reg, LDO_ST_ON_BIT); + } + + return -EINVAL; +} + +static unsigned int tps65910_get_mode(struct regulator_dev *dev) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int ret, reg, value, id = rdev_get_id(dev); + + reg = pmic->get_ctrl_reg(id); + if (reg < 0) + return reg; + + ret = regmap_read(regmap, reg, &value); + if (ret < 0) + return ret; + + if (!(value & LDO_ST_ON_BIT)) + return REGULATOR_MODE_STANDBY; + else if (value & LDO_ST_MODE_BIT) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) +{ + struct regmap *regmap = rdev_get_regmap(dev); + int ret, id = rdev_get_id(dev); + int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; + + switch (id) { + case TPS65910_REG_VDD1: + ret = regmap_read(regmap, TPS65910_VDD1_OP, &opvsel); + if (ret < 0) + return ret; + ret = regmap_read(regmap, TPS65910_VDD1, &mult); + if (ret < 0) + return ret; + mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; + ret = regmap_read(regmap, TPS65910_VDD1_SR, &srvsel); + if (ret < 0) + return ret; + sr = opvsel & VDD1_OP_CMD_MASK; + opvsel &= VDD1_OP_SEL_MASK; + srvsel &= VDD1_SR_SEL_MASK; + vselmax = 75; + break; + case TPS65910_REG_VDD2: + ret = regmap_read(regmap, TPS65910_VDD2_OP, &opvsel); + if (ret < 0) + return ret; + ret = regmap_read(regmap, TPS65910_VDD2, &mult); + if (ret < 0) + return ret; + mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; + ret = regmap_read(regmap, TPS65910_VDD2_SR, &srvsel); + if (ret < 0) + return ret; + sr = opvsel & VDD2_OP_CMD_MASK; + opvsel &= VDD2_OP_SEL_MASK; + srvsel &= VDD2_SR_SEL_MASK; + vselmax = 75; + break; + case TPS65911_REG_VDDCTRL: + ret = regmap_read(regmap, TPS65911_VDDCTRL_OP, &opvsel); + if (ret < 0) + return ret; + ret = regmap_read(regmap, TPS65911_VDDCTRL_SR, &srvsel); + if (ret < 0) + return ret; + sr = opvsel & VDDCTRL_OP_CMD_MASK; + opvsel &= VDDCTRL_OP_SEL_MASK; + srvsel &= VDDCTRL_SR_SEL_MASK; + vselmax = 64; + break; + } + + /* multiplier 0 == 1 but 2,3 normal */ + if (!mult) + mult = 1; + + if (sr) { + /* normalise to valid range */ + if (srvsel < 3) + srvsel = 3; + if (srvsel > vselmax) + srvsel = vselmax; + return srvsel - 3; + } else { + + /* normalise to valid range*/ + if (opvsel < 3) + opvsel = 3; + if (opvsel > vselmax) + opvsel = vselmax; + return opvsel - 3; + } + return -EINVAL; +} + +static int tps65910_get_voltage_sel(struct regulator_dev *dev) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int ret, reg, value, id = rdev_get_id(dev); + + reg = pmic->get_ctrl_reg(id); + if (reg < 0) + return reg; + + ret = regmap_read(regmap, reg, &value); + if (ret < 0) + return ret; + + switch (id) { + case TPS65910_REG_VIO: + case TPS65910_REG_VDIG1: + case TPS65910_REG_VDIG2: + case TPS65910_REG_VPLL: + case TPS65910_REG_VDAC: + case TPS65910_REG_VAUX1: + case TPS65910_REG_VAUX2: + case TPS65910_REG_VAUX33: + case TPS65910_REG_VMMC: + value &= LDO_SEL_MASK; + value >>= LDO_SEL_SHIFT; + break; + case TPS65910_REG_VBB: + value &= BBCH_BBSEL_MASK; + value >>= BBCH_BBSEL_SHIFT; + break; + default: + return -EINVAL; + } + + return value; +} + +static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) +{ + return dev->desc->volt_table[0]; +} + +static int tps65911_get_voltage_sel(struct regulator_dev *dev) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int ret, id = rdev_get_id(dev); + unsigned int value, reg; + + reg = pmic->get_ctrl_reg(id); + + ret = regmap_read(regmap, reg, &value); + if (ret < 0) + return ret; + + switch (id) { + case TPS65911_REG_LDO1: + case TPS65911_REG_LDO2: + case TPS65911_REG_LDO4: + value &= LDO1_SEL_MASK; + value >>= LDO_SEL_SHIFT; + break; + case TPS65911_REG_LDO3: + case TPS65911_REG_LDO5: + case TPS65911_REG_LDO6: + case TPS65911_REG_LDO7: + case TPS65911_REG_LDO8: + value &= LDO3_SEL_MASK; + value >>= LDO_SEL_SHIFT; + break; + case TPS65910_REG_VIO: + value &= LDO_SEL_MASK; + value >>= LDO_SEL_SHIFT; + break; + default: + return -EINVAL; + } + + return value; +} + +static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct regmap *regmap = rdev_get_regmap(dev); + int id = rdev_get_id(dev), vsel; + int dcdc_mult = 0; + + switch (id) { + case TPS65910_REG_VDD1: + dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; + if (dcdc_mult == 1) + dcdc_mult--; + vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; + + regmap_update_bits(regmap, TPS65910_VDD1, VDD1_VGAIN_SEL_MASK, + dcdc_mult << VDD1_VGAIN_SEL_SHIFT); + regmap_write(regmap, TPS65910_VDD1_OP, vsel); + break; + case TPS65910_REG_VDD2: + dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; + if (dcdc_mult == 1) + dcdc_mult--; + vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; + + regmap_update_bits(regmap, TPS65910_VDD2, VDD1_VGAIN_SEL_MASK, + dcdc_mult << VDD2_VGAIN_SEL_SHIFT); + regmap_write(regmap, TPS65910_VDD2_OP, vsel); + break; + case TPS65911_REG_VDDCTRL: + vsel = selector + 3; + regmap_write(regmap, TPS65911_VDDCTRL_OP, vsel); + break; + } + + return 0; +} + +static int tps65910_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int reg, id = rdev_get_id(dev); + + reg = pmic->get_ctrl_reg(id); + if (reg < 0) + return reg; + + switch (id) { + case TPS65910_REG_VIO: + case TPS65910_REG_VDIG1: + case TPS65910_REG_VDIG2: + case TPS65910_REG_VPLL: + case TPS65910_REG_VDAC: + case TPS65910_REG_VAUX1: + case TPS65910_REG_VAUX2: + case TPS65910_REG_VAUX33: + case TPS65910_REG_VMMC: + return regmap_update_bits(regmap, reg, LDO_SEL_MASK, + selector << LDO_SEL_SHIFT); + case TPS65910_REG_VBB: + return regmap_update_bits(regmap, reg, BBCH_BBSEL_MASK, + selector << BBCH_BBSEL_SHIFT); + } + + return -EINVAL; +} + +static int tps65911_set_voltage_sel(struct regulator_dev *dev, + unsigned selector) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + struct regmap *regmap = rdev_get_regmap(dev); + int reg, id = rdev_get_id(dev); + + reg = pmic->get_ctrl_reg(id); + if (reg < 0) + return reg; + + switch (id) { + case TPS65911_REG_LDO1: + case TPS65911_REG_LDO2: + case TPS65911_REG_LDO4: + return regmap_update_bits(regmap, reg, LDO1_SEL_MASK, + selector << LDO_SEL_SHIFT); + case TPS65911_REG_LDO3: + case TPS65911_REG_LDO5: + case TPS65911_REG_LDO6: + case TPS65911_REG_LDO7: + case TPS65911_REG_LDO8: + return regmap_update_bits(regmap, reg, LDO3_SEL_MASK, + selector << LDO_SEL_SHIFT); + case TPS65910_REG_VIO: + return regmap_update_bits(regmap, reg, LDO_SEL_MASK, + selector << LDO_SEL_SHIFT); + case TPS65910_REG_VBB: + return regmap_update_bits(regmap, reg, BBCH_BBSEL_MASK, + selector << BBCH_BBSEL_SHIFT); + } + + return -EINVAL; +} + + +static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, + unsigned selector) +{ + int volt, mult = 1, id = rdev_get_id(dev); + + switch (id) { + case TPS65910_REG_VDD1: + case TPS65910_REG_VDD2: + mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; + volt = VDD1_2_MIN_VOLT + + (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; + break; + case TPS65911_REG_VDDCTRL: + volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); + break; + default: + BUG(); + return -EINVAL; + } + + return volt * 100 * mult; +} + +static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) +{ + struct tps65910_reg *pmic = rdev_get_drvdata(dev); + int step_mv = 0, id = rdev_get_id(dev); + + switch (id) { + case TPS65911_REG_LDO1: + case TPS65911_REG_LDO2: + case TPS65911_REG_LDO4: + /* The first 5 values of the selector correspond to 1V */ + if (selector < 5) + selector = 0; + else + selector -= 4; + + step_mv = 50; + break; + case TPS65911_REG_LDO3: + case TPS65911_REG_LDO5: + case TPS65911_REG_LDO6: + case TPS65911_REG_LDO7: + case TPS65911_REG_LDO8: + /* The first 3 values of the selector correspond to 1V */ + if (selector < 3) + selector = 0; + else + selector -= 2; + + step_mv = 100; + break; + case TPS65910_REG_VIO: + return pmic->info[id]->voltage_table[selector]; + default: + return -EINVAL; + } + + return (LDO_MIN_VOLT + selector * step_mv) * 1000; +} + +/* Regulator ops (except VRTC) */ +static const struct regulator_ops tps65910_ops_dcdc = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65910_set_mode, + .get_mode = tps65910_get_mode, + .get_voltage_sel = tps65910_get_voltage_dcdc_sel, + .set_voltage_sel = tps65910_set_voltage_dcdc_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .list_voltage = tps65910_list_voltage_dcdc, + .map_voltage = regulator_map_voltage_ascend, +}; + +static const struct regulator_ops tps65910_ops_vdd3 = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65910_set_mode, + .get_mode = tps65910_get_mode, + .get_voltage = tps65910_get_voltage_vdd3, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, +}; + +static const struct regulator_ops tps65910_ops_vbb = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65910_set_mode, + .get_mode = tps65910_get_mode, + .get_voltage_sel = tps65910_get_voltage_sel, + .set_voltage_sel = tps65910_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, +}; + +static const struct regulator_ops tps65910_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65910_set_mode, + .get_mode = tps65910_get_mode, + .get_voltage_sel = tps65910_get_voltage_sel, + .set_voltage_sel = tps65910_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, +}; + +static const struct regulator_ops tps65911_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .set_mode = tps65910_set_mode, + .get_mode = tps65910_get_mode, + .get_voltage_sel = tps65911_get_voltage_sel, + .set_voltage_sel = tps65911_set_voltage_sel, + .list_voltage = tps65911_list_voltage, + .map_voltage = regulator_map_voltage_ascend, +}; + +static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, + int id, int ext_sleep_config) +{ + struct tps65910 *mfd = pmic->mfd; + u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; + u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); + int ret; + + /* + * Regulator can not be control from multiple external input EN1, EN2 + * and EN3 together. + */ + if (ext_sleep_config & EXT_SLEEP_CONTROL) { + int en_count; + en_count = ((ext_sleep_config & + TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); + en_count += ((ext_sleep_config & + TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); + en_count += ((ext_sleep_config & + TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); + en_count += ((ext_sleep_config & + TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); + if (en_count > 1) { + dev_err(mfd->dev, + "External sleep control flag is not proper\n"); + return -EINVAL; + } + } + + pmic->board_ext_control[id] = ext_sleep_config; + + /* External EN1 control */ + if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) + ret = regmap_set_bits(mfd->regmap, + TPS65910_EN1_LDO_ASS + regoffs, bit_pos); + else + ret = regmap_clear_bits(mfd->regmap, + TPS65910_EN1_LDO_ASS + regoffs, bit_pos); + if (ret < 0) { + dev_err(mfd->dev, + "Error in configuring external control EN1\n"); + return ret; + } + + /* External EN2 control */ + if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) + ret = regmap_set_bits(mfd->regmap, + TPS65910_EN2_LDO_ASS + regoffs, bit_pos); + else + ret = regmap_clear_bits(mfd->regmap, + TPS65910_EN2_LDO_ASS + regoffs, bit_pos); + if (ret < 0) { + dev_err(mfd->dev, + "Error in configuring external control EN2\n"); + return ret; + } + + /* External EN3 control for TPS65910 LDO only */ + if ((tps65910_chip_id(mfd) == TPS65910) && + (id >= TPS65910_REG_VDIG1)) { + if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) + ret = regmap_set_bits(mfd->regmap, + TPS65910_EN3_LDO_ASS + regoffs, bit_pos); + else + ret = regmap_clear_bits(mfd->regmap, + TPS65910_EN3_LDO_ASS + regoffs, bit_pos); + if (ret < 0) { + dev_err(mfd->dev, + "Error in configuring external control EN3\n"); + return ret; + } + } + + /* Return if no external control is selected */ + if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { + /* Clear all sleep controls */ + ret = regmap_clear_bits(mfd->regmap, + TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); + if (!ret) + ret = regmap_clear_bits(mfd->regmap, + TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); + if (ret < 0) + dev_err(mfd->dev, + "Error in configuring SLEEP register\n"); + return ret; + } + + /* + * For regulator that has separate operational and sleep register make + * sure that operational is used and clear sleep register to turn + * regulator off when external control is inactive + */ + if ((id == TPS65910_REG_VDD1) || + (id == TPS65910_REG_VDD2) || + ((id == TPS65911_REG_VDDCTRL) && + (tps65910_chip_id(mfd) == TPS65911))) { + int op_reg_add = pmic->get_ctrl_reg(id) + 1; + int sr_reg_add = pmic->get_ctrl_reg(id) + 2; + int opvsel, srvsel; + + ret = regmap_read(mfd->regmap, op_reg_add, &opvsel); + if (ret < 0) + return ret; + ret = regmap_read(mfd->regmap, sr_reg_add, &srvsel); + if (ret < 0) + return ret; + + if (opvsel & VDD1_OP_CMD_MASK) { + u8 reg_val = srvsel & VDD1_OP_SEL_MASK; + + ret = regmap_write(mfd->regmap, op_reg_add, reg_val); + if (ret < 0) { + dev_err(mfd->dev, + "Error in configuring op register\n"); + return ret; + } + } + ret = regmap_write(mfd->regmap, sr_reg_add, 0); + if (ret < 0) { + dev_err(mfd->dev, "Error in setting sr register\n"); + return ret; + } + } + + ret = regmap_clear_bits(mfd->regmap, + TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); + if (!ret) { + if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) + ret = regmap_set_bits(mfd->regmap, + TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); + else + ret = regmap_clear_bits(mfd->regmap, + TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); + } + if (ret < 0) + dev_err(mfd->dev, + "Error in configuring SLEEP register\n"); + + return ret; +} + +#ifdef CONFIG_OF + +static struct of_regulator_match tps65910_matches[] = { + { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] }, + { .name = "vio", .driver_data = (void *) &tps65910_regs[1] }, + { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] }, + { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] }, + { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] }, + { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] }, + { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] }, + { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] }, + { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] }, + { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] }, + { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] }, + { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] }, + { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] }, + { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] }, +}; + +static struct of_regulator_match tps65911_matches[] = { + { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] }, + { .name = "vio", .driver_data = (void *) &tps65911_regs[1] }, + { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] }, + { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] }, + { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] }, + { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] }, + { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] }, + { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] }, + { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] }, + { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] }, + { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] }, + { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] }, + { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] }, +}; + +static struct tps65910_board *tps65910_parse_dt_reg_data( + struct platform_device *pdev, + struct of_regulator_match **tps65910_reg_matches) +{ + struct tps65910_board *pmic_plat_data; + struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); + struct device_node *np, *regulators; + struct of_regulator_match *matches; + unsigned int prop; + int idx = 0, ret, count; + + pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data), + GFP_KERNEL); + if (!pmic_plat_data) + return NULL; + + np = pdev->dev.parent->of_node; + regulators = of_get_child_by_name(np, "regulators"); + if (!regulators) { + dev_err(&pdev->dev, "regulator node not found\n"); + return NULL; + } + + switch (tps65910_chip_id(tps65910)) { + case TPS65910: + count = ARRAY_SIZE(tps65910_matches); + matches = tps65910_matches; + break; + case TPS65911: + count = ARRAY_SIZE(tps65911_matches); + matches = tps65911_matches; + break; + default: + of_node_put(regulators); + dev_err(&pdev->dev, "Invalid tps chip version\n"); + return NULL; + } + + ret = of_regulator_match(&pdev->dev, regulators, matches, count); + of_node_put(regulators); + if (ret < 0) { + dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", + ret); + return NULL; + } + + *tps65910_reg_matches = matches; + + for (idx = 0; idx < count; idx++) { + if (!matches[idx].of_node) + continue; + + pmic_plat_data->tps65910_pmic_init_data[idx] = + matches[idx].init_data; + + ret = of_property_read_u32(matches[idx].of_node, + "ti,regulator-ext-sleep-control", &prop); + if (!ret) + pmic_plat_data->regulator_ext_sleep_control[idx] = prop; + + } + + return pmic_plat_data; +} +#else +static inline struct tps65910_board *tps65910_parse_dt_reg_data( + struct platform_device *pdev, + struct of_regulator_match **tps65910_reg_matches) +{ + *tps65910_reg_matches = NULL; + return NULL; +} +#endif + +static int tps65910_probe(struct platform_device *pdev) +{ + struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct tps_info *info; + struct regulator_dev *rdev; + struct tps65910_reg *pmic; + struct tps65910_board *pmic_plat_data; + struct of_regulator_match *tps65910_reg_matches = NULL; + int i, err; + + pmic_plat_data = dev_get_platdata(tps65910->dev); + if (!pmic_plat_data && tps65910->dev->of_node) + pmic_plat_data = tps65910_parse_dt_reg_data(pdev, + &tps65910_reg_matches); + + if (!pmic_plat_data) { + dev_err(&pdev->dev, "Platform data not found\n"); + return -EINVAL; + } + + pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + + pmic->mfd = tps65910; + platform_set_drvdata(pdev, pmic); + + /* Give control of all register to control port */ + err = regmap_set_bits(pmic->mfd->regmap, TPS65910_DEVCTRL, + DEVCTRL_SR_CTL_I2C_SEL_MASK); + if (err < 0) + return err; + + switch (tps65910_chip_id(tps65910)) { + case TPS65910: + BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65910_regs)); + pmic->get_ctrl_reg = &tps65910_get_ctrl_register; + pmic->num_regulators = ARRAY_SIZE(tps65910_regs); + pmic->ext_sleep_control = tps65910_ext_sleep_control; + info = tps65910_regs; + /* Work around silicon erratum SWCZ010: output programmed + * voltage level can go higher than expected or crash + * Workaround: use no synchronization of DCDC clocks + */ + regmap_clear_bits(pmic->mfd->regmap, TPS65910_DCDCCTRL, + DCDCCTRL_DCDCCKSYNC_MASK); + break; + case TPS65911: + BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65911_regs)); + pmic->get_ctrl_reg = &tps65911_get_ctrl_register; + pmic->num_regulators = ARRAY_SIZE(tps65911_regs); + pmic->ext_sleep_control = tps65911_ext_sleep_control; + info = tps65911_regs; + break; + default: + dev_err(&pdev->dev, "Invalid tps chip version\n"); + return -ENODEV; + } + + pmic->desc = devm_kcalloc(&pdev->dev, + pmic->num_regulators, + sizeof(struct regulator_desc), + GFP_KERNEL); + if (!pmic->desc) + return -ENOMEM; + + pmic->info = devm_kcalloc(&pdev->dev, + pmic->num_regulators, + sizeof(struct tps_info *), + GFP_KERNEL); + if (!pmic->info) + return -ENOMEM; + + pmic->rdev = devm_kcalloc(&pdev->dev, + pmic->num_regulators, + sizeof(struct regulator_dev *), + GFP_KERNEL); + if (!pmic->rdev) + return -ENOMEM; + + for (i = 0; i < pmic->num_regulators; i++, info++) { + /* Register the regulators */ + pmic->info[i] = info; + + pmic->desc[i].name = info->name; + pmic->desc[i].supply_name = info->vin_name; + pmic->desc[i].id = i; + pmic->desc[i].n_voltages = info->n_voltages; + pmic->desc[i].enable_time = info->enable_time_us; + + if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { + pmic->desc[i].ops = &tps65910_ops_dcdc; + pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * + VDD1_2_NUM_VOLT_COARSE; + pmic->desc[i].ramp_delay = 12500; + } else if (i == TPS65910_REG_VDD3) { + if (tps65910_chip_id(tps65910) == TPS65910) { + pmic->desc[i].ops = &tps65910_ops_vdd3; + pmic->desc[i].volt_table = info->voltage_table; + } else { + pmic->desc[i].ops = &tps65910_ops_dcdc; + pmic->desc[i].ramp_delay = 5000; + } + } else if (i == TPS65910_REG_VBB && + tps65910_chip_id(tps65910) == TPS65910) { + pmic->desc[i].ops = &tps65910_ops_vbb; + pmic->desc[i].volt_table = info->voltage_table; + } else { + if (tps65910_chip_id(tps65910) == TPS65910) { + pmic->desc[i].ops = &tps65910_ops; + pmic->desc[i].volt_table = info->voltage_table; + } else { + pmic->desc[i].ops = &tps65911_ops; + } + } + + err = tps65910_set_ext_sleep_config(pmic, i, + pmic_plat_data->regulator_ext_sleep_control[i]); + /* + * Failing on regulator for configuring externally control + * is not a serious issue, just throw warning. + */ + if (err < 0) + dev_warn(tps65910->dev, + "Failed to initialise ext control config\n"); + + pmic->desc[i].type = REGULATOR_VOLTAGE; + pmic->desc[i].owner = THIS_MODULE; + pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i); + pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; + + config.dev = tps65910->dev; + config.init_data = pmic_plat_data->tps65910_pmic_init_data[i]; + config.driver_data = pmic; + config.regmap = tps65910->regmap; + + if (tps65910_reg_matches) + config.of_node = tps65910_reg_matches[i].of_node; + + rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps65910->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + pdev->name); + + /* Save regulator for cleanup */ + pmic->rdev[i] = rdev; + } + return 0; +} + +static void tps65910_shutdown(struct platform_device *pdev) +{ + struct tps65910_reg *pmic = platform_get_drvdata(pdev); + int i; + + /* + * Before bootloader jumps to kernel, it makes sure that required + * external control signals are in desired state so that given rails + * can be configure accordingly. + * If rails are configured to be controlled from external control + * then before shutting down/rebooting the system, the external + * control configuration need to be remove from the rails so that + * its output will be available as per register programming even + * if external controls are removed. This is require when the POR + * value of the control signals are not in active state and before + * bootloader initializes it, the system requires the rail output + * to be active for booting. + */ + for (i = 0; i < pmic->num_regulators; i++) { + int err; + if (!pmic->rdev[i]) + continue; + + err = tps65910_set_ext_sleep_config(pmic, i, 0); + if (err < 0) + dev_err(&pdev->dev, + "Error in clearing external control\n"); + } +} + +static struct platform_driver tps65910_driver = { + .driver = { + .name = "tps65910-pmic", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65910_probe, + .shutdown = tps65910_shutdown, +}; + +static int __init tps65910_init(void) +{ + return platform_driver_register(&tps65910_driver); +} +subsys_initcall(tps65910_init); + +static void __exit tps65910_cleanup(void) +{ + platform_driver_unregister(&tps65910_driver); +} +module_exit(tps65910_cleanup); + +MODULE_AUTHOR("Graeme Gregory "); +MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:tps65910-pmic"); diff --git a/drivers/regulator/tps65912-regulator.c b/drivers/regulator/tps65912-regulator.c new file mode 100644 index 000000000..a73aa3e0d --- /dev/null +++ b/drivers/regulator/tps65912-regulator.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Regulator driver for TI TPS65912x PMICs + * + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ + * Andrew F. Davis + * + * Based on the TPS65218 driver and the previous TPS65912 driver by + * Margarita Olaya Cabrera + */ + +#include +#include +#include + +#include + +enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3, + LDO4, LDO5, LDO6, LDO7, LDO8, LDO9, LDO10 }; + +#define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \ + [_id] = { \ + .name = _name, \ + .of_match = _of_match, \ + .regulators_node = "regulators", \ + .id = _id, \ + .ops = &_ops, \ + .n_voltages = 64, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = 0x3f, \ + .enable_reg = _er, \ + .enable_mask = BIT(7), \ + .volt_table = NULL, \ + .linear_ranges = _lr, \ + .n_linear_ranges = ARRAY_SIZE(_lr), \ + } + +static const struct linear_range tps65912_dcdc_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0, 0x3f, 50000), +}; + +static const struct linear_range tps65912_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 25000), + REGULATOR_LINEAR_RANGE(1650000, 0x21, 0x3c, 50000), + REGULATOR_LINEAR_RANGE(3100000, 0x3d, 0x3f, 100000), +}; + +/* Operations permitted on DCDCx */ +static const struct regulator_ops tps65912_ops_dcdc = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, +}; + +/* Operations permitted on LDOx */ +static const struct regulator_ops tps65912_ops_ldo = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_desc regulators[] = { + TPS65912_REGULATOR("DCDC1", DCDC1, "dcdc1", tps65912_ops_dcdc, + TPS65912_DCDC1_OP, TPS65912_DCDC1_CTRL, + tps65912_dcdc_ranges), + TPS65912_REGULATOR("DCDC2", DCDC2, "dcdc2", tps65912_ops_dcdc, + TPS65912_DCDC2_OP, TPS65912_DCDC2_CTRL, + tps65912_dcdc_ranges), + TPS65912_REGULATOR("DCDC3", DCDC3, "dcdc3", tps65912_ops_dcdc, + TPS65912_DCDC3_OP, TPS65912_DCDC3_CTRL, + tps65912_dcdc_ranges), + TPS65912_REGULATOR("DCDC4", DCDC4, "dcdc4", tps65912_ops_dcdc, + TPS65912_DCDC4_OP, TPS65912_DCDC4_CTRL, + tps65912_dcdc_ranges), + TPS65912_REGULATOR("LDO1", LDO1, "ldo1", tps65912_ops_ldo, + TPS65912_LDO1_OP, TPS65912_LDO1_AVS, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO2", LDO2, "ldo2", tps65912_ops_ldo, + TPS65912_LDO2_OP, TPS65912_LDO2_AVS, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO3", LDO3, "ldo3", tps65912_ops_ldo, + TPS65912_LDO3_OP, TPS65912_LDO3_AVS, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO4", LDO4, "ldo4", tps65912_ops_ldo, + TPS65912_LDO4_OP, TPS65912_LDO4_AVS, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO5", LDO5, "ldo5", tps65912_ops_ldo, + TPS65912_LDO5, TPS65912_LDO5, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO6", LDO6, "ldo6", tps65912_ops_ldo, + TPS65912_LDO6, TPS65912_LDO6, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO7", LDO7, "ldo7", tps65912_ops_ldo, + TPS65912_LDO7, TPS65912_LDO7, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO8", LDO8, "ldo8", tps65912_ops_ldo, + TPS65912_LDO8, TPS65912_LDO8, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO9", LDO9, "ldo9", tps65912_ops_ldo, + TPS65912_LDO9, TPS65912_LDO9, + tps65912_ldo_ranges), + TPS65912_REGULATOR("LDO10", LDO10, "ldo10", tps65912_ops_ldo, + TPS65912_LDO10, TPS65912_LDO10, + tps65912_ldo_ranges), +}; + +static int tps65912_regulator_probe(struct platform_device *pdev) +{ + struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + platform_set_drvdata(pdev, tps); + + config.dev = &pdev->dev; + config.driver_data = tps; + config.dev->of_node = tps->dev->of_node; + config.regmap = tps->regmap; + + for (i = 0; i < ARRAY_SIZE(regulators); i++) { + rdev = devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id tps65912_regulator_id_table[] = { + { .name = "tps65912-regulator" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, tps65912_regulator_id_table); + +static struct platform_driver tps65912_regulator_driver = { + .driver = { + .name = "tps65912-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps65912_regulator_probe, + .id_table = tps65912_regulator_id_table, +}; +module_platform_driver(tps65912_regulator_driver); + +MODULE_AUTHOR("Andrew F. Davis "); +MODULE_DESCRIPTION("TPS65912 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/tps6594-regulator.c b/drivers/regulator/tps6594-regulator.c new file mode 100644 index 000000000..31a5218d5 --- /dev/null +++ b/drivers/regulator/tps6594-regulator.c @@ -0,0 +1,856 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator driver for tps6594 PMIC +// +// Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define BUCK_NB 5 +#define LDO_NB 4 +#define MULTI_PHASE_NB 4 + +enum tps6594_regulator_id { + /* DCDC's */ + TPS6594_BUCK_1, + TPS6594_BUCK_2, + TPS6594_BUCK_3, + TPS6594_BUCK_4, + TPS6594_BUCK_5, + + /* LDOs */ + TPS6594_LDO_1, + TPS6594_LDO_2, + TPS6594_LDO_3, + TPS6594_LDO_4, +}; + +enum tps6594_multi_regulator_id { + /* Multi-phase DCDC's */ + TPS6594_BUCK_12, + TPS6594_BUCK_34, + TPS6594_BUCK_123, + TPS6594_BUCK_1234, +}; + +struct tps6594_regulator_irq_type { + const char *irq_name; + const char *regulator_name; + const char *event_name; + unsigned long event; +}; + +static const struct tps6594_regulator_irq_type tps6594_ext_regulator_irq_types[] = { + { TPS6594_IRQ_NAME_VCCA_OV, "VCCA", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_VCCA_UV, "VCCA", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_VMON1_OV, "VMON1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_VMON1_UV, "VMON1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_VMON1_RV, "VMON1", "residual voltage", + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_VMON2_OV, "VMON2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_VMON2_UV, "VMON2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_VMON2_RV, "VMON2", "residual voltage", + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, +}; + +static const struct tps6594_regulator_irq_type tps65224_ext_regulator_irq_types[] = { + { TPS65224_IRQ_NAME_VCCA_UVOV, "VCCA", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, + { TPS65224_IRQ_NAME_VMON1_UVOV, "VMON1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, + { TPS65224_IRQ_NAME_VMON2_UVOV, "VMON2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +struct tps6594_regulator_irq_data { + struct device *dev; + const struct tps6594_regulator_irq_type *type; + struct regulator_dev *rdev; +}; + +struct tps6594_ext_regulator_irq_data { + struct device *dev; + const struct tps6594_regulator_irq_type *type; +}; + +#define TPS6594_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ + _em, _cr, _cm, _lr, _nlr, _delay, _fuv, \ + _ct, _ncl, _bpm) \ + { \ + .name = _name, \ + .of_match = _of, \ + .regulators_node = of_match_ptr("regulators"), \ + .supply_name = _of, \ + .id = _id, \ + .ops = &(_ops), \ + .n_voltages = _n, \ + .type = _type, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .csel_reg = _cr, \ + .csel_mask = _cm, \ + .curr_table = _ct, \ + .n_current_limits = _ncl, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .volt_table = NULL, \ + .linear_ranges = _lr, \ + .n_linear_ranges = _nlr, \ + .ramp_delay = _delay, \ + .fixed_uV = _fuv, \ + .bypass_reg = _vr, \ + .bypass_mask = _bpm, \ + } \ + +static const struct linear_range bucks_ranges[] = { + REGULATOR_LINEAR_RANGE(300000, 0x0, 0xe, 20000), + REGULATOR_LINEAR_RANGE(600000, 0xf, 0x72, 5000), + REGULATOR_LINEAR_RANGE(1100000, 0x73, 0xaa, 10000), + REGULATOR_LINEAR_RANGE(1660000, 0xab, 0xff, 20000), +}; + +static const struct linear_range ldos_1_2_3_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0x4, 0x3a, 50000), +}; + +static const struct linear_range ldos_4_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0x20, 0x74, 25000), +}; + +/* Voltage range for TPS65224 Bucks and LDOs */ +static const struct linear_range tps65224_bucks_1_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0a, 0x0e, 20000), + REGULATOR_LINEAR_RANGE(600000, 0x0f, 0x72, 5000), + REGULATOR_LINEAR_RANGE(1100000, 0x73, 0xaa, 10000), + REGULATOR_LINEAR_RANGE(1660000, 0xab, 0xfd, 20000), +}; + +static const struct linear_range tps65224_bucks_2_3_4_ranges[] = { + REGULATOR_LINEAR_RANGE(500000, 0x0, 0x1a, 25000), + REGULATOR_LINEAR_RANGE(1200000, 0x1b, 0x45, 50000), +}; + +static const struct linear_range tps65224_ldos_1_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0xC, 0x36, 50000), +}; + +static const struct linear_range tps65224_ldos_2_3_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x38, 50000), +}; + +/* Operations permitted on BUCK1/2/3/4/5 */ +static const struct regulator_ops tps6594_bucks_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + +}; + +/* Operations permitted on LDO1/2/3 */ +static const struct regulator_ops tps6594_ldos_1_2_3_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, +}; + +/* Operations permitted on LDO4 */ +static const struct regulator_ops tps6594_ldos_4_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_desc tps6594_buck_regs[] = { + TPS6594_REGULATOR("BUCK1", "buck1", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK2", "buck2", TPS6594_BUCK_2, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(1), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(1), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK3", "buck3", TPS6594_BUCK_3, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(2), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(2), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK4", "buck4", TPS6594_BUCK_4, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(3), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(3), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK5", "buck5", TPS6594_BUCK_5, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(4), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(4), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), +}; + +/* Buck configuration for TPS65224 */ +static const struct regulator_desc tps65224_buck_regs[] = { + TPS6594_REGULATOR("BUCK1", "buck1", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_1_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK2", "buck2", TPS6594_BUCK_2, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(1), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(1), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK3", "buck3", TPS6594_BUCK_3, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(2), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(2), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK4", "buck4", TPS6594_BUCK_4, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(3), + TPS65224_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(3), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_2_3_4_ranges, + 4, 0, 0, NULL, 0, 0), +}; + +static const struct tps6594_regulator_irq_type tps6594_buck1_irq_types[] = { + { TPS6594_IRQ_NAME_BUCK1_OV, "BUCK1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_BUCK1_UV, "BUCK1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_BUCK1_SC, "BUCK1", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_BUCK1_ILIM, "BUCK1", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_buck2_irq_types[] = { + { TPS6594_IRQ_NAME_BUCK2_OV, "BUCK2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_BUCK2_UV, "BUCK2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_BUCK2_SC, "BUCK2", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_BUCK2_ILIM, "BUCK2", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_buck3_irq_types[] = { + { TPS6594_IRQ_NAME_BUCK3_OV, "BUCK3", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_BUCK3_UV, "BUCK3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_BUCK3_SC, "BUCK3", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_BUCK3_ILIM, "BUCK3", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_buck4_irq_types[] = { + { TPS6594_IRQ_NAME_BUCK4_OV, "BUCK4", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_BUCK4_UV, "BUCK4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_BUCK4_SC, "BUCK4", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_BUCK4_ILIM, "BUCK4", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_buck5_irq_types[] = { + { TPS6594_IRQ_NAME_BUCK5_OV, "BUCK5", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_BUCK5_UV, "BUCK5", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_BUCK5_SC, "BUCK5", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_BUCK5_ILIM, "BUCK5", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_ldo1_irq_types[] = { + { TPS6594_IRQ_NAME_LDO1_OV, "LDO1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_LDO1_UV, "LDO1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_LDO1_SC, "LDO1", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_LDO1_ILIM, "LDO1", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_ldo2_irq_types[] = { + { TPS6594_IRQ_NAME_LDO2_OV, "LDO2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_LDO2_UV, "LDO2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_LDO2_SC, "LDO2", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_LDO2_ILIM, "LDO2", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_ldo3_irq_types[] = { + { TPS6594_IRQ_NAME_LDO3_OV, "LDO3", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_LDO3_UV, "LDO3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_LDO3_SC, "LDO3", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_LDO3_ILIM, "LDO3", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps6594_ldo4_irq_types[] = { + { TPS6594_IRQ_NAME_LDO4_OV, "LDO4", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, + { TPS6594_IRQ_NAME_LDO4_UV, "LDO4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, + { TPS6594_IRQ_NAME_LDO4_SC, "LDO4", "short circuit", REGULATOR_EVENT_REGULATION_OUT }, + { TPS6594_IRQ_NAME_LDO4_ILIM, "LDO4", "reach ilim, overcurrent", + REGULATOR_EVENT_OVER_CURRENT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_buck1_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK1_UVOV, "BUCK1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_buck2_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK2_UVOV, "BUCK2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_buck3_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK3_UVOV, "BUCK3", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_buck4_irq_types[] = { + { TPS65224_IRQ_NAME_BUCK4_UVOV, "BUCK4", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_ldo1_irq_types[] = { + { TPS65224_IRQ_NAME_LDO1_UVOV, "LDO1", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_ldo2_irq_types[] = { + { TPS65224_IRQ_NAME_LDO2_UVOV, "LDO2", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type tps65224_ldo3_irq_types[] = { + { TPS65224_IRQ_NAME_LDO3_UVOV, "LDO3", "voltage out of range", + REGULATOR_EVENT_REGULATION_OUT }, +}; + +static const struct tps6594_regulator_irq_type *tps6594_bucks_irq_types[] = { + tps6594_buck1_irq_types, + tps6594_buck2_irq_types, + tps6594_buck3_irq_types, + tps6594_buck4_irq_types, + tps6594_buck5_irq_types, +}; + +static const struct tps6594_regulator_irq_type *tps6594_ldos_irq_types[] = { + tps6594_ldo1_irq_types, + tps6594_ldo2_irq_types, + tps6594_ldo3_irq_types, + tps6594_ldo4_irq_types, +}; + +static const struct tps6594_regulator_irq_type *tps65224_bucks_irq_types[] = { + tps65224_buck1_irq_types, + tps65224_buck2_irq_types, + tps65224_buck3_irq_types, + tps65224_buck4_irq_types, +}; + +static const struct tps6594_regulator_irq_type *tps65224_ldos_irq_types[] = { + tps65224_ldo1_irq_types, + tps65224_ldo2_irq_types, + tps65224_ldo3_irq_types, +}; + +static const struct regulator_desc tps6594_multi_regs[] = { + TPS6594_REGULATOR("BUCK12", "buck12", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 4000, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK34", "buck34", TPS6594_BUCK_3, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(2), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(2), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 0, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK123", "buck123", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 4000, 0, NULL, 0, 0), + TPS6594_REGULATOR("BUCK1234", "buck1234", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS6594_MASK_BUCKS_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges, + 4, 4000, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps65224_multi_regs[] = { + TPS6594_REGULATOR("BUCK12", "buck12", TPS6594_BUCK_1, + REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_VOUT_1(0), + TPS65224_MASK_BUCK1_VSET, + TPS6594_REG_BUCKX_CTRL(0), + TPS6594_BIT_BUCK_EN, 0, 0, tps65224_bucks_1_ranges, + 4, 4000, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps6594_ldo_regs[] = { + TPS6594_REGULATOR("LDO1", "ldo1", TPS6594_LDO_1, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(0), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(0), + TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO2", "ldo2", TPS6594_LDO_2, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(1), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(1), + TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO3", "ldo3", TPS6594_LDO_3, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(2), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(2), + TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO4", "ldo4", TPS6594_LDO_4, + REGULATOR_VOLTAGE, tps6594_ldos_4_ops, TPS6594_MASK_LDO4_VSET >> 1, + TPS6594_REG_LDOX_VOUT(3), + TPS6594_MASK_LDO4_VSET, + TPS6594_REG_LDOX_CTRL(3), + TPS6594_BIT_LDO_EN, 0, 0, ldos_4_ranges, + 1, 0, 0, NULL, 0, 0), +}; + +static const struct regulator_desc tps65224_ldo_regs[] = { + TPS6594_REGULATOR("LDO1", "ldo1", TPS6594_LDO_1, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(0), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(0), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_1_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO2", "ldo2", TPS6594_LDO_2, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(1), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(1), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), + TPS6594_REGULATOR("LDO3", "ldo3", TPS6594_LDO_3, + REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_VOUT(2), + TPS6594_MASK_LDO123_VSET, + TPS6594_REG_LDOX_CTRL(2), + TPS6594_BIT_LDO_EN, 0, 0, tps65224_ldos_2_3_ranges, + 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS), +}; + +static irqreturn_t tps6594_regulator_irq_handler(int irq, void *data) +{ + struct tps6594_regulator_irq_data *irq_data = data; + + if (irq_data->type->event_name[0] == '\0') { + /* This is the timeout interrupt no specific regulator */ + dev_err(irq_data->dev, + "System was put in shutdown due to timeout during an active or standby transition.\n"); + return IRQ_HANDLED; + } + + dev_err(irq_data->dev, "Error IRQ trap %s for %s\n", + irq_data->type->event_name, irq_data->type->regulator_name); + + regulator_notifier_call_chain(irq_data->rdev, + irq_data->type->event, NULL); + + return IRQ_HANDLED; +} + +static int tps6594_request_reg_irqs(struct platform_device *pdev, + struct regulator_dev *rdev, + struct tps6594_regulator_irq_data *irq_data, + const struct tps6594_regulator_irq_type *regs_irq_types, + size_t interrupt_cnt, + int *irq_idx) +{ + const struct tps6594_regulator_irq_type *irq_type; + struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent); + size_t j; + int irq; + int error; + + for (j = 0; j < interrupt_cnt; j++) { + irq_type = ®s_irq_types[j]; + irq = platform_get_irq_byname(pdev, irq_type->irq_name); + if (irq < 0) + return -EINVAL; + + irq_data[*irq_idx].dev = tps->dev; + irq_data[*irq_idx].type = irq_type; + irq_data[*irq_idx].rdev = rdev; + + error = devm_request_threaded_irq(tps->dev, irq, NULL, + tps6594_regulator_irq_handler, IRQF_ONESHOT, + irq_type->irq_name, &irq_data[*irq_idx]); + if (error) { + dev_err(tps->dev, "tps6594 failed to request %s IRQ %d: %d\n", + irq_type->irq_name, irq, error); + return error; + } + (*irq_idx)++; + } + return 0; +} + +struct tps6594_regulator_desc { + const struct regulator_desc *multi_phase_regs; + unsigned int num_multi_phase_regs; + + const struct regulator_desc *buck_regs; + int num_buck_regs; + + const struct regulator_desc *ldo_regs; + int num_ldo_regs; + + const struct tps6594_regulator_irq_type **bucks_irq_types; + const struct tps6594_regulator_irq_type **ldos_irq_types; + int num_irq_types; + + const struct tps6594_regulator_irq_type *ext_irq_types; + int num_ext_irqs; +}; + +static const struct tps6594_regulator_desc tps65224_reg_desc = { + .multi_phase_regs = tps65224_multi_regs, + .num_multi_phase_regs = ARRAY_SIZE(tps65224_multi_regs), + .buck_regs = tps65224_buck_regs, + .num_buck_regs = ARRAY_SIZE(tps65224_buck_regs), + .ldo_regs = tps65224_ldo_regs, + .num_ldo_regs = ARRAY_SIZE(tps65224_ldo_regs), + .bucks_irq_types = tps65224_bucks_irq_types, + .ldos_irq_types = tps65224_ldos_irq_types, + .num_irq_types = 1, /* OV or UV */ + .ext_irq_types = tps65224_ext_regulator_irq_types, + .num_ext_irqs = ARRAY_SIZE(tps65224_ext_regulator_irq_types), +}; + +static const struct tps6594_regulator_desc tps652g1_reg_desc = { + .ldo_regs = tps65224_ldo_regs, + .num_ldo_regs = ARRAY_SIZE(tps65224_ldo_regs), + .buck_regs = tps65224_buck_regs, + .num_buck_regs = ARRAY_SIZE(tps65224_buck_regs), +}; + +static const struct tps6594_regulator_desc tps6594_reg_desc = { + .multi_phase_regs = tps6594_multi_regs, + .num_multi_phase_regs = ARRAY_SIZE(tps6594_multi_regs), + .buck_regs = tps6594_buck_regs, + .num_buck_regs = ARRAY_SIZE(tps6594_buck_regs), + .ldo_regs = tps6594_ldo_regs, + .num_ldo_regs = ARRAY_SIZE(tps6594_ldo_regs), + .bucks_irq_types = tps6594_bucks_irq_types, + .ldos_irq_types = tps6594_ldos_irq_types, + .num_irq_types = 4, /* OV, UV, SC and ILIM */ + .ext_irq_types = tps6594_ext_regulator_irq_types, + .num_ext_irqs = 2, /* only VCCA OV and UV */ +}; + +static const struct tps6594_regulator_desc lp8764_reg_desc = { + .multi_phase_regs = tps6594_multi_regs, + .num_multi_phase_regs = ARRAY_SIZE(tps6594_multi_regs), + .buck_regs = tps6594_buck_regs, + .num_buck_regs = ARRAY_SIZE(tps6594_buck_regs), + .bucks_irq_types = tps6594_bucks_irq_types, + .num_irq_types = 4, /* OV, UV, SC and ILIM */ + .ext_irq_types = tps6594_ext_regulator_irq_types, + .num_ext_irqs = ARRAY_SIZE(tps6594_ext_regulator_irq_types), +}; + +static int tps6594_regulator_probe(struct platform_device *pdev) +{ + struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent); + struct regulator_dev *rdev; + struct device_node *np = NULL; + struct device_node *np_pmic_parent = NULL; + struct regulator_config config = {}; + struct tps6594_regulator_irq_data *irq_data; + struct tps6594_ext_regulator_irq_data *irq_ext_reg_data; + const struct tps6594_regulator_irq_type *irq_type; + bool buck_configured[BUCK_NB] = { false }; + bool buck_multi[MULTI_PHASE_NB] = { false }; + const struct tps6594_regulator_desc *desc; + const struct regulator_desc *multi_regs; + + const char *npname; + int error, i, irq, multi; + int irq_idx = 0; + int buck_idx = 0; + size_t reg_irq_nb; + + switch (tps->chip_id) { + case TPS65224: + desc = &tps65224_reg_desc; + break; + case TPS652G1: + desc = &tps652g1_reg_desc; + break; + case TPS6594: + case TPS6593: + desc = &tps6594_reg_desc; + break; + case LP8764: + desc = &lp8764_reg_desc; + break; + default: + dev_err(tps->dev, "unknown chip_id %lu\n", tps->chip_id); + return -EINVAL; + } + + enum { + MULTI_BUCK12, + MULTI_BUCK12_34, + MULTI_BUCK123, + MULTI_BUCK1234, + }; + + config.dev = tps->dev; + config.driver_data = tps; + config.regmap = tps->regmap; + + /* + * Switch case defines different possible multi phase config + * This is based on dts buck node name. + * Buck node name must be chosen accordingly. + * Default case is no Multiphase buck. + * In case of Multiphase configuration, value should be defined for + * buck_configured to avoid creating bucks for every buck in multiphase + */ + for (multi = 0; multi < desc->num_multi_phase_regs; multi++) { + struct device_node *np_parent; + + multi_regs = &desc->multi_phase_regs[multi]; + np = of_find_node_by_name(tps->dev->of_node, multi_regs->supply_name); + if (!np) + continue; + + npname = of_node_full_name(np); + np_parent = of_get_parent(np); + np_pmic_parent = of_get_parent(np_parent); + + if (np_pmic_parent && + !of_node_cmp(of_node_full_name(np_pmic_parent), tps->dev->of_node->full_name) && + strcmp(npname, multi_regs->supply_name) == 0) { + switch (multi) { + case MULTI_BUCK12: + buck_multi[0] = true; + buck_configured[0] = true; + buck_configured[1] = true; + break; + /* multiphase buck34 is supported only with buck12 */ + case MULTI_BUCK12_34: + buck_multi[0] = true; + buck_multi[1] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; + buck_configured[3] = true; + break; + case MULTI_BUCK123: + buck_multi[2] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; + break; + case MULTI_BUCK1234: + buck_multi[3] = true; + buck_configured[0] = true; + buck_configured[1] = true; + buck_configured[2] = true; + buck_configured[3] = true; + break; + } + } + + of_node_put(np_pmic_parent); + of_node_put(np_parent); + of_node_put(np); + } + + reg_irq_nb = desc->num_irq_types * (desc->num_buck_regs + desc->num_ldo_regs); + + irq_data = devm_kmalloc_array(tps->dev, reg_irq_nb, + sizeof(struct tps6594_regulator_irq_data), GFP_KERNEL); + if (!irq_data) + return -ENOMEM; + + for (i = 0; i < desc->num_multi_phase_regs; i++) { + if (!buck_multi[i]) + continue; + + rdev = devm_regulator_register(&pdev->dev, &desc->multi_phase_regs[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + pdev->name); + + if (!desc->num_irq_types) + continue; + + /* config multiphase buck12+buck34 */ + if (i == MULTI_BUCK12_34) + buck_idx = 2; + + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->bucks_irq_types[buck_idx], + desc->num_irq_types, &irq_idx); + if (error) + return error; + + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->bucks_irq_types[buck_idx + 1], + desc->num_irq_types, &irq_idx); + if (error) + return error; + + if (i == MULTI_BUCK123 || i == MULTI_BUCK1234) { + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->bucks_irq_types[buck_idx + 2], + desc->num_irq_types, + &irq_idx); + if (error) + return error; + } + if (i == MULTI_BUCK1234) { + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->bucks_irq_types[buck_idx + 3], + desc->num_irq_types, + &irq_idx); + if (error) + return error; + } + } + + for (i = 0; i < desc->num_buck_regs; i++) { + if (buck_configured[i]) + continue; + + rdev = devm_regulator_register(&pdev->dev, &desc->buck_regs[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", pdev->name); + + if (!desc->num_irq_types) + continue; + + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->bucks_irq_types[i], + desc->num_irq_types, &irq_idx); + if (error) + return error; + } + + for (i = 0; i < desc->num_ldo_regs; i++) { + rdev = devm_regulator_register(&pdev->dev, &desc->ldo_regs[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(tps->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + pdev->name); + + if (!desc->num_irq_types) + continue; + + error = tps6594_request_reg_irqs(pdev, rdev, irq_data, + desc->ldos_irq_types[i], + desc->num_irq_types, &irq_idx); + if (error) + return error; + } + + irq_ext_reg_data = devm_kmalloc_array(tps->dev, + desc->num_ext_irqs, + sizeof(struct tps6594_ext_regulator_irq_data), + GFP_KERNEL); + if (!irq_ext_reg_data) + return -ENOMEM; + + for (i = 0; i < desc->num_ext_irqs; ++i) { + irq_type = &desc->ext_irq_types[i]; + irq = platform_get_irq_byname(pdev, irq_type->irq_name); + if (irq < 0) + return -EINVAL; + + irq_ext_reg_data[i].dev = tps->dev; + irq_ext_reg_data[i].type = irq_type; + + error = devm_request_threaded_irq(tps->dev, irq, NULL, + tps6594_regulator_irq_handler, + IRQF_ONESHOT, + irq_type->irq_name, + &irq_ext_reg_data[i]); + if (error) + return dev_err_probe(tps->dev, error, + "failed to request %s IRQ %d\n", + irq_type->irq_name, irq); + } + + return 0; +} + +static struct platform_driver tps6594_regulator_driver = { + .driver = { + .name = "tps6594-regulator", + }, + .probe = tps6594_regulator_probe, +}; + +module_platform_driver(tps6594_regulator_driver); + +MODULE_ALIAS("platform:tps6594-regulator"); +MODULE_AUTHOR("Jerome Neanne "); +MODULE_AUTHOR("Nirmala Devi Mal Nadar "); +MODULE_DESCRIPTION("TPS6594 voltage regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/tps68470-regulator.c b/drivers/regulator/tps68470-regulator.c new file mode 100644 index 000000000..de7db7690 --- /dev/null +++ b/drivers/regulator/tps68470-regulator.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator driver for TPS68470 PMIC +// +// Copyright (c) 2021 Red Hat Inc. +// Copyright (C) 2018 Intel Corporation +// +// Authors: +// Hans de Goede +// Zaikuo Wang +// Tianshu Qiu +// Jian Xu Zheng +// Yuning Pu +// Rajmohan Mani + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct tps68470_regulator_data { + struct clk *clk; +}; + +#define TPS68470_REGULATOR(_name, _id, _ops, _n, \ + _vr, _vm, _er, _em, _lr, _nlr) \ + [TPS68470_ ## _name] = { \ + .name = # _name, \ + .id = _id, \ + .ops = &_ops, \ + .n_voltages = _n, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .vsel_reg = _vr, \ + .vsel_mask = _vm, \ + .enable_reg = _er, \ + .enable_mask = _em, \ + .linear_ranges = _lr, \ + .n_linear_ranges = _nlr, \ + } + +static const struct linear_range tps68470_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(875000, 0, 125, 17800), +}; + +static const struct linear_range tps68470_core_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 42, 25000), +}; + +static int tps68470_regulator_enable(struct regulator_dev *rdev) +{ + struct tps68470_regulator_data *data = rdev->reg_data; + int ret; + + /* The Core buck regulator needs the PMIC's PLL to be enabled */ + if (rdev->desc->id == TPS68470_CORE) { + ret = clk_prepare_enable(data->clk); + if (ret) { + dev_err(&rdev->dev, "Error enabling TPS68470 clock\n"); + return ret; + } + } + + return regulator_enable_regmap(rdev); +} + +static int tps68470_regulator_disable(struct regulator_dev *rdev) +{ + struct tps68470_regulator_data *data = rdev->reg_data; + + if (rdev->desc->id == TPS68470_CORE) + clk_disable_unprepare(data->clk); + + return regulator_disable_regmap(rdev); +} + +/* Operations permitted on DCDCx, LDO2, LDO3 and LDO4 */ +static const struct regulator_ops tps68470_regulator_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = tps68470_regulator_enable, + .disable = tps68470_regulator_disable, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_ops tps68470_always_on_reg_ops = { + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static const struct regulator_desc regulators[] = { + TPS68470_REGULATOR(CORE, TPS68470_CORE, tps68470_regulator_ops, 43, + TPS68470_REG_VDVAL, TPS68470_VDVAL_DVOLT_MASK, + TPS68470_REG_VDCTL, TPS68470_VDCTL_EN_MASK, + tps68470_core_ranges, ARRAY_SIZE(tps68470_core_ranges)), + TPS68470_REGULATOR(ANA, TPS68470_ANA, tps68470_regulator_ops, 126, + TPS68470_REG_VAVAL, TPS68470_VAVAL_AVOLT_MASK, + TPS68470_REG_VACTL, TPS68470_VACTL_EN_MASK, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), + TPS68470_REGULATOR(VCM, TPS68470_VCM, tps68470_regulator_ops, 126, + TPS68470_REG_VCMVAL, TPS68470_VCMVAL_VCVOLT_MASK, + TPS68470_REG_VCMCTL, TPS68470_VCMCTL_EN_MASK, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), + TPS68470_REGULATOR(VIO, TPS68470_VIO, tps68470_always_on_reg_ops, 126, + TPS68470_REG_VIOVAL, TPS68470_VIOVAL_IOVOLT_MASK, + 0, 0, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), +/* + * (1) This regulator must have the same voltage as VIO if S_IO LDO is used to + * power a sensor/VCM which I2C is daisy chained behind the PMIC. + * (2) If there is no I2C daisy chain it can be set freely. + */ + TPS68470_REGULATOR(VSIO, TPS68470_VSIO, tps68470_regulator_ops, 126, + TPS68470_REG_VSIOVAL, TPS68470_VSIOVAL_IOVOLT_MASK, + TPS68470_REG_S_I2C_CTL, TPS68470_S_I2C_CTL_EN_MASK, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), + TPS68470_REGULATOR(AUX1, TPS68470_AUX1, tps68470_regulator_ops, 126, + TPS68470_REG_VAUX1VAL, TPS68470_VAUX1VAL_AUX1VOLT_MASK, + TPS68470_REG_VAUX1CTL, TPS68470_VAUX1CTL_EN_MASK, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), + TPS68470_REGULATOR(AUX2, TPS68470_AUX2, tps68470_regulator_ops, 126, + TPS68470_REG_VAUX2VAL, TPS68470_VAUX2VAL_AUX2VOLT_MASK, + TPS68470_REG_VAUX2CTL, TPS68470_VAUX2CTL_EN_MASK, + tps68470_ldo_ranges, ARRAY_SIZE(tps68470_ldo_ranges)), +}; + +static int tps68470_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct tps68470_regulator_platform_data *pdata = dev_get_platdata(dev); + struct tps68470_regulator_data *data; + struct regulator_config config = { }; + struct regulator_dev *rdev; + int i; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->clk = devm_clk_get(dev, "tps68470-clk"); + if (IS_ERR(data->clk)) + return dev_err_probe(dev, PTR_ERR(data->clk), "getting tps68470-clk\n"); + + config.dev = dev->parent; + config.regmap = dev_get_drvdata(dev->parent); + config.driver_data = data; + + for (i = 0; i < TPS68470_NUM_REGULATORS; i++) { + if (pdata) + config.init_data = pdata->reg_init_data[i]; + else + config.init_data = NULL; + + rdev = devm_regulator_register(dev, ®ulators[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "registering %s regulator\n", + regulators[i].name); + } + + return 0; +} + +static struct platform_driver tps68470_regulator_driver = { + .driver = { + .name = "tps68470-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tps68470_regulator_probe, +}; + +/* + * The ACPI tps68470 probe-ordering depends on the clk/gpio/regulator drivers + * registering before the drivers for the camera-sensors which use them bind. + * subsys_initcall() ensures this when the drivers are builtin. + */ +static int __init tps68470_regulator_init(void) +{ + return platform_driver_register(&tps68470_regulator_driver); +} +subsys_initcall(tps68470_regulator_init); + +static void __exit tps68470_regulator_exit(void) +{ + platform_driver_unregister(&tps68470_regulator_driver); +} +module_exit(tps68470_regulator_exit); + +MODULE_ALIAS("platform:tps68470-regulator"); +MODULE_DESCRIPTION("TPS68470 voltage regulator driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c new file mode 100644 index 000000000..5bacfcebf --- /dev/null +++ b/drivers/regulator/twl-regulator.c @@ -0,0 +1,676 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * twl-regulator.c -- support regulators in twl4030/twl6030 family chips + * + * Copyright (C) 2008 David Brownell + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * The TWL4030/TW5030/TPS659x0 family chips include power management, a + * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions + * include an audio codec, battery charger, and more voltage regulators. + * These chips are often used in OMAP-based systems. + * + * This driver implements software-based resource control for various + * voltage regulators. This is usually augmented with state machine + * based control. + */ + +struct twlreg_info { + /* start of regulator's PM_RECEIVER control register bank */ + u8 base; + + /* twl resource ID, for resource control state machine */ + u8 id; + + /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ + u8 table_len; + const u16 *table; + + /* State REMAP default configuration */ + u8 remap; + + /* used by regulator core */ + struct regulator_desc desc; + + /* chip specific features */ + unsigned long features; + + /* data passed from board for external get/set voltage */ + void *data; +}; + + +/* LDO control registers ... offset is from the base of its register bank. + * The first three registers of all power resource banks help hardware to + * manage the various resource groups. + */ +/* Common offset in TWL4030/6030 */ +#define VREG_GRP 0 +/* TWL4030 register offsets */ +#define VREG_TYPE 1 +#define VREG_REMAP 2 +#define VREG_DEDICATED 3 /* LDO control */ +#define VREG_VOLTAGE_SMPS_4030 9 +/* TWL6030 register offsets */ +#define VREG_TRANS 1 +#define VREG_STATE 2 +#define VREG_VOLTAGE 3 +#define VREG_VOLTAGE_SMPS 4 + +static inline int +twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) +{ + u8 value; + int status; + + status = twl_i2c_read_u8(slave_subgp, + &value, info->base + offset); + return (status < 0) ? status : value; +} + +static inline int +twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, + u8 value) +{ + return twl_i2c_write_u8(slave_subgp, + value, info->base + offset); +} + +/*----------------------------------------------------------------------*/ + +/* generic power resource operations, which work on all regulators */ + +static int twlreg_grp(struct regulator_dev *rdev) +{ + return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, + VREG_GRP); +} + +/* + * Enable/disable regulators by joining/leaving the P1 (processor) group. + * We assume nobody else is updating the DEV_GRP registers. + */ +/* definition for 4030 family */ +#define P3_GRP_4030 BIT(7) /* "peripherals" */ +#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ +#define P1_GRP_4030 BIT(5) /* CPU/Linux */ +/* definition for 6030 family */ +#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ +#define P2_GRP_6030 BIT(1) /* "peripherals" */ +#define P1_GRP_6030 BIT(0) /* CPU/Linux */ + +static int twl4030reg_is_enabled(struct regulator_dev *rdev) +{ + int state = twlreg_grp(rdev); + + if (state < 0) + return state; + + return state & P1_GRP_4030; +} + +#define PB_I2C_BUSY BIT(0) +#define PB_I2C_BWEN BIT(1) + +/* Wait until buffer empty/ready to send a word on power bus. */ +static int twl4030_wait_pb_ready(void) +{ + + int ret; + int timeout = 10; + u8 val; + + do { + ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, + TWL4030_PM_MASTER_PB_CFG); + if (ret < 0) + return ret; + + if (!(val & PB_I2C_BUSY)) + return 0; + + mdelay(1); + timeout--; + } while (timeout); + + return -ETIMEDOUT; +} + +/* Send a word over the powerbus */ +static int twl4030_send_pb_msg(unsigned msg) +{ + u8 val; + int ret; + + /* save powerbus configuration */ + ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, + TWL4030_PM_MASTER_PB_CFG); + if (ret < 0) + return ret; + + /* Enable i2c access to powerbus */ + ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN, + TWL4030_PM_MASTER_PB_CFG); + if (ret < 0) + return ret; + + ret = twl4030_wait_pb_ready(); + if (ret < 0) + return ret; + + ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8, + TWL4030_PM_MASTER_PB_WORD_MSB); + if (ret < 0) + return ret; + + ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff, + TWL4030_PM_MASTER_PB_WORD_LSB); + if (ret < 0) + return ret; + + ret = twl4030_wait_pb_ready(); + if (ret < 0) + return ret; + + /* Restore powerbus configuration */ + return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, + TWL4030_PM_MASTER_PB_CFG); +} + +static int twl4030reg_enable(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp; + + grp = twlreg_grp(rdev); + if (grp < 0) + return grp; + + grp |= P1_GRP_4030; + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); +} + +static int twl4030reg_disable(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp; + + grp = twlreg_grp(rdev); + if (grp < 0) + return grp; + + grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); +} + +static int twl4030reg_get_status(struct regulator_dev *rdev) +{ + int state = twlreg_grp(rdev); + + if (state < 0) + return state; + state &= 0x0f; + + /* assume state != WARM_RESET; we'd not be running... */ + if (!state) + return REGULATOR_STATUS_OFF; + return (state & BIT(3)) + ? REGULATOR_STATUS_NORMAL + : REGULATOR_STATUS_STANDBY; +} + +static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + unsigned message; + + /* We can only set the mode through state machine commands... */ + switch (mode) { + case REGULATOR_MODE_NORMAL: + message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); + break; + case REGULATOR_MODE_STANDBY: + message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); + break; + default: + return -EINVAL; + } + + return twl4030_send_pb_msg(message); +} + +static inline unsigned int twl4030reg_map_mode(unsigned int mode) +{ + switch (mode) { + case RES_STATE_ACTIVE: + return REGULATOR_MODE_NORMAL; + case RES_STATE_SLEEP: + return REGULATOR_MODE_STANDBY; + default: + return REGULATOR_MODE_INVALID; + } +} + +/*----------------------------------------------------------------------*/ + +/* + * Support for adjustable-voltage LDOs uses a four bit (or less) voltage + * select field in its control register. We use tables indexed by VSEL + * to record voltages in milliVolts. (Accuracy is about three percent.) + * + * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; + * currently handled by listing two slightly different VAUX2 regulators, + * only one of which will be configured. + * + * VSEL values documented as "TI cannot support these values" are flagged + * in these tables as UNSUP() values; we normally won't assign them. + * + * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. + * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. + */ +#define UNSUP_MASK 0x8000 + +#define UNSUP(x) (UNSUP_MASK | (x)) +#define IS_UNSUP(info, x) \ + ((UNSUP_MASK & (x)) && \ + !((info)->features & TWL4030_ALLOW_UNSUPPORTED)) +#define LDO_MV(x) (~UNSUP_MASK & (x)) + + +static const u16 VAUX1_VSEL_table[] = { + UNSUP(1500), UNSUP(1800), 2500, 2800, + 3000, 3000, 3000, 3000, +}; +static const u16 VAUX2_4030_VSEL_table[] = { + UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, + 1500, 1800, UNSUP(1850), 2500, + UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), + UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), +}; +static const u16 VAUX2_VSEL_table[] = { + 1700, 1700, 1900, 1300, + 1500, 1800, 2000, 2500, + 2100, 2800, 2200, 2300, + 2400, 2400, 2400, 2400, +}; +static const u16 VAUX3_VSEL_table[] = { + 1500, 1800, 2500, 2800, + 3000, 3000, 3000, 3000, +}; +static const u16 VAUX4_VSEL_table[] = { + 700, 1000, 1200, UNSUP(1300), + 1500, 1800, UNSUP(1850), 2500, + UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), + UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), +}; +static const u16 VMMC1_VSEL_table[] = { + 1850, 2850, 3000, 3150, +}; +static const u16 VMMC2_VSEL_table[] = { + UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), + UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), + 2600, 2800, 2850, 3000, + 3150, 3150, 3150, 3150, +}; +static const u16 VPLL1_VSEL_table[] = { + 1000, 1200, 1300, 1800, + UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), +}; +static const u16 VPLL2_VSEL_table[] = { + 700, 1000, 1200, 1300, + UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), + UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), + UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), +}; +static const u16 VSIM_VSEL_table[] = { + UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, + 2800, 3000, 3000, 3000, +}; +static const u16 VDAC_VSEL_table[] = { + 1200, 1300, 1800, 1800, +}; +static const u16 VIO_VSEL_table[] = { + 1800, 1850, +}; +static const u16 VINTANA2_VSEL_table[] = { + 2500, 2750, +}; + +/* 600mV to 1450mV in 12.5 mV steps */ +static const struct linear_range VDD1_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500) +}; + +/* 600mV to 1450mV in 12.5 mV steps, everything above = 1500mV */ +static const struct linear_range VDD2_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500), + REGULATOR_LINEAR_RANGE(1500000, 69, 69, 12500) +}; + +static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int mV = info->table[index]; + + return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000); +} + +static int +twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, + selector); +} + +static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE); + + if (vsel < 0) + return vsel; + + vsel &= info->table_len - 1; + return vsel; +} + +static const struct regulator_ops twl4030ldo_ops = { + .list_voltage = twl4030ldo_list_voltage, + + .set_voltage_sel = twl4030ldo_set_voltage_sel, + .get_voltage_sel = twl4030ldo_get_voltage_sel, + + .enable = twl4030reg_enable, + .disable = twl4030reg_disable, + .is_enabled = twl4030reg_is_enabled, + + .set_mode = twl4030reg_set_mode, + + .get_status = twl4030reg_get_status, +}; + +static int +twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, + unsigned *selector) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int vsel = DIV_ROUND_UP(min_uV - 600000, 12500); + + twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel); + + return 0; +} + +static int twl4030smps_get_voltage(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int vsel; + + vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, + VREG_VOLTAGE_SMPS_4030); + + return vsel * 12500 + 600000; +} + +static const struct regulator_ops twl4030smps_ops = { + .list_voltage = regulator_list_voltage_linear_range, + + .set_voltage = twl4030smps_set_voltage, + .get_voltage = twl4030smps_get_voltage, +}; + +/*----------------------------------------------------------------------*/ + +static const struct regulator_ops twl4030fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + + .enable = twl4030reg_enable, + .disable = twl4030reg_disable, + .is_enabled = twl4030reg_is_enabled, + + .set_mode = twl4030reg_set_mode, + + .get_status = twl4030reg_get_status, +}; + +/*----------------------------------------------------------------------*/ + +#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ +static const struct twlreg_info TWL4030_INFO_##label = { \ + .base = offset, \ + .id = num, \ + .table_len = ARRAY_SIZE(label##_VSEL_table), \ + .table = label##_VSEL_table, \ + .remap = remap_conf, \ + .desc = { \ + .name = #label, \ + .id = TWL4030_REG_##label, \ + .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ + .ops = &twl4030ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .enable_time = turnon_delay, \ + .of_map_mode = twl4030reg_map_mode, \ + }, \ + } + +#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf, \ + n_volt) \ +static const struct twlreg_info TWL4030_INFO_##label = { \ + .base = offset, \ + .id = num, \ + .remap = remap_conf, \ + .desc = { \ + .name = #label, \ + .id = TWL4030_REG_##label, \ + .ops = &twl4030smps_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .enable_time = turnon_delay, \ + .of_map_mode = twl4030reg_map_mode, \ + .n_voltages = n_volt, \ + .n_linear_ranges = ARRAY_SIZE(label ## _ranges), \ + .linear_ranges = label ## _ranges, \ + }, \ + } + +#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ + remap_conf) \ +static const struct twlreg_info TWLFIXED_INFO_##label = { \ + .base = offset, \ + .id = num, \ + .remap = remap_conf, \ + .desc = { \ + .name = #label, \ + .id = TWL4030##_REG_##label, \ + .n_voltages = 1, \ + .ops = &twl4030fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = mVolts * 1000, \ + .enable_time = turnon_delay, \ + .of_map_mode = twl4030reg_map_mode, \ + }, \ + } + +/* + * We list regulators here if systems need some level of + * software control over them after boot. + */ +TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00); +TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00); +TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08); +TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08); +TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08, 68); +TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08, 69); +/* VUSBCP is managed *only* by the USB subchip */ +TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08); +TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08); +TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08); +TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08); +TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08); + +#define TWL_OF_MATCH(comp, family, label) \ + { \ + .compatible = comp, \ + .data = &family##_INFO_##label, \ + } + +#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label) +#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) +#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label) +#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) +#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) + +static const struct of_device_id twl_of_match[] = { + TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1), + TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030), + TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2), + TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3), + TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4), + TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1), + TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2), + TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1), + TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2), + TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM), + TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC), + TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2), + TWL4030_OF_MATCH("ti,twl4030-vio", VIO), + TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1), + TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2), + TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1), + TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG), + TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5), + TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8), + TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1), + {}, +}; +MODULE_DEVICE_TABLE(of, twl_of_match); + +static int twlreg_probe(struct platform_device *pdev) +{ + int id; + struct twlreg_info *info; + const struct twlreg_info *template; + struct regulator_init_data *initdata; + struct regulation_constraints *c; + struct regulator_dev *rdev; + struct regulator_config config = { }; + + template = of_device_get_match_data(&pdev->dev); + if (!template) + return -ENODEV; + + id = template->desc.id; + initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, + &template->desc); + if (!initdata) + return -EINVAL; + + info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + /* Constrain board-specific capabilities according to what + * this driver and the chip itself can actually do. + */ + c = &initdata->constraints; + c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; + c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS; + switch (id) { + case TWL4030_REG_VIO: + case TWL4030_REG_VDD1: + case TWL4030_REG_VDD2: + case TWL4030_REG_VPLL1: + case TWL4030_REG_VINTANA1: + case TWL4030_REG_VINTANA2: + case TWL4030_REG_VINTDIG: + c->always_on = true; + break; + default: + break; + } + + config.dev = &pdev->dev; + config.init_data = initdata; + config.driver_data = info; + config.of_node = pdev->dev.of_node; + + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "can't register %s, %ld\n", + info->desc.name, PTR_ERR(rdev)); + return PTR_ERR(rdev); + } + platform_set_drvdata(pdev, rdev); + + twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap); + + /* NOTE: many regulators support short-circuit IRQs (presentable + * as REGULATOR_OVER_CURRENT notifications?) configured via: + * - SC_CONFIG + * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) + * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) + * - IT_CONFIG + */ + + return 0; +} + +MODULE_ALIAS("platform:twl4030_reg"); + +static struct platform_driver twlreg_driver = { + .probe = twlreg_probe, + /* NOTE: short name, to work around driver model truncation of + * "twl_regulator.12" (and friends) to "twl_regulator.1". + */ + .driver = { + .name = "twl4030_reg", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(twl_of_match), + }, +}; + +static int __init twlreg_init(void) +{ + return platform_driver_register(&twlreg_driver); +} +subsys_initcall(twlreg_init); + +static void __exit twlreg_exit(void) +{ + platform_driver_unregister(&twlreg_driver); +} +module_exit(twlreg_exit) + +MODULE_DESCRIPTION("TWL4030 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/twl6030-regulator.c b/drivers/regulator/twl6030-regulator.c new file mode 100644 index 000000000..6eed0f6e0 --- /dev/null +++ b/drivers/regulator/twl6030-regulator.c @@ -0,0 +1,785 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Split TWL6030 logic from twl-regulator.c: + * Copyright (C) 2008 David Brownell + * + * Copyright (C) 2016 Nicolae Rosia + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct twlreg_info { + /* start of regulator's PM_RECEIVER control register bank */ + u8 base; + + /* twl resource ID, for resource control state machine */ + u8 id; + + u8 flags; + + /* used by regulator core */ + struct regulator_desc desc; + + /* chip specific features */ + unsigned long features; + + /* data passed from board for external get/set voltage */ + void *data; +}; + + +/* LDO control registers ... offset is from the base of its register bank. + * The first three registers of all power resource banks help hardware to + * manage the various resource groups. + */ +/* Common offset in TWL4030/6030 */ +#define VREG_GRP 0 +/* TWL6030 register offsets */ +#define VREG_TRANS 1 +#define VREG_STATE 2 +#define VREG_VOLTAGE 3 +#define VREG_VOLTAGE_SMPS 4 +/* TWL6030 Misc register offsets */ +#define VREG_BC_ALL 1 +#define VREG_BC_REF 2 +#define VREG_BC_PROC 3 +#define VREG_BC_CLK_RST 4 + +/* TWL6030 LDO register values for VREG_VOLTAGE */ +#define TWL6030_VREG_VOLTAGE_WR_S BIT(7) + +/* TWL6030 LDO register values for CFG_STATE */ +#define TWL6030_CFG_STATE_OFF 0x00 +#define TWL6030_CFG_STATE_ON 0x01 +#define TWL6030_CFG_STATE_OFF2 0x02 +#define TWL6030_CFG_STATE_SLEEP 0x03 +#define TWL6030_CFG_STATE_GRP_SHIFT 5 +#define TWL6030_CFG_STATE_APP_SHIFT 2 +#define TWL6030_CFG_STATE_MASK 0x03 +#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT) +#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\ + TWL6030_CFG_STATE_APP_SHIFT) + +/* Flags for SMPS Voltage reading and LDO reading*/ +#define SMPS_OFFSET_EN BIT(0) +#define SMPS_EXTENDED_EN BIT(1) +#define TWL_6030_WARM_RESET BIT(3) + +/* twl6032 SMPS EPROM values */ +#define TWL6030_SMPS_OFFSET 0xB0 +#define TWL6030_SMPS_MULT 0xB3 +#define SMPS_MULTOFFSET_SMPS4 BIT(0) +#define SMPS_MULTOFFSET_VIO BIT(1) +#define SMPS_MULTOFFSET_SMPS3 BIT(6) + +static inline int +twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) +{ + u8 value; + int status; + + status = twl_i2c_read_u8(slave_subgp, + &value, info->base + offset); + return (status < 0) ? status : value; +} + +static inline int +twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, + u8 value) +{ + return twl_i2c_write_u8(slave_subgp, + value, info->base + offset); +} + +/* generic power resource operations, which work on all regulators */ +static int twlreg_grp(struct regulator_dev *rdev) +{ + return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, + VREG_GRP); +} + +/* + * Enable/disable regulators by joining/leaving the P1 (processor) group. + * We assume nobody else is updating the DEV_GRP registers. + */ +/* definition for 6030 family */ +#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ +#define P2_GRP_6030 BIT(1) /* "peripherals" */ +#define P1_GRP_6030 BIT(0) /* CPU/Linux */ + +static int twl6030reg_is_enabled(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp = 0, val; + + if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) { + grp = twlreg_grp(rdev); + if (grp < 0) + return grp; + grp &= P1_GRP_6030; + val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE); + val = TWL6030_CFG_STATE_APP(val); + } else { + val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE); + val &= TWL6030_CFG_STATE_MASK; + grp = 1; + } + + return grp && (val == TWL6030_CFG_STATE_ON); +} + +#define PB_I2C_BUSY BIT(0) +#define PB_I2C_BWEN BIT(1) + + +static int twl6030reg_enable(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp = 0; + int ret; + + if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) + grp = twlreg_grp(rdev); + if (grp < 0) + return grp; + + ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, + grp << TWL6030_CFG_STATE_GRP_SHIFT | + TWL6030_CFG_STATE_ON); + return ret; +} + +static int twl6030reg_disable(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp = 0; + int ret; + + if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) + grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030; + + /* For 6030, set the off state for all grps enabled */ + ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, + (grp) << TWL6030_CFG_STATE_GRP_SHIFT | + TWL6030_CFG_STATE_OFF); + + return ret; +} + +static int twl6030reg_get_status(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int val; + + val = twlreg_grp(rdev); + if (val < 0) + return val; + + val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE); + + if (info->features & TWL6032_SUBCLASS) + val &= TWL6030_CFG_STATE_MASK; + else + val = TWL6030_CFG_STATE_APP(val); + + switch (val) { + case TWL6030_CFG_STATE_ON: + return REGULATOR_STATUS_NORMAL; + + case TWL6030_CFG_STATE_SLEEP: + return REGULATOR_STATUS_STANDBY; + + case TWL6030_CFG_STATE_OFF: + case TWL6030_CFG_STATE_OFF2: + default: + break; + } + + return REGULATOR_STATUS_OFF; +} + +static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int grp = 0; + int val; + + if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) + grp = twlreg_grp(rdev); + + if (grp < 0) + return grp; + + /* Compose the state register settings */ + val = grp << TWL6030_CFG_STATE_GRP_SHIFT; + /* We can only set the mode through state machine commands... */ + switch (mode) { + case REGULATOR_MODE_NORMAL: + val |= TWL6030_CFG_STATE_ON; + break; + case REGULATOR_MODE_STANDBY: + val |= TWL6030_CFG_STATE_SLEEP; + break; + + default: + return -EINVAL; + } + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val); +} + +static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV, + int max_uV, unsigned *selector) +{ + return -ENODEV; +} + +static int twl6030coresmps_get_voltage(struct regulator_dev *rdev) +{ + return -ENODEV; +} + +static const struct regulator_ops twl6030coresmps_ops = { + .set_voltage = twl6030coresmps_set_voltage, + .get_voltage = twl6030coresmps_get_voltage, +}; + +static int +twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + + if (info->flags & TWL_6030_WARM_RESET) + selector |= TWL6030_VREG_VOLTAGE_WR_S; + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, + selector); +} + +static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE); + + if (info->flags & TWL_6030_WARM_RESET) + vsel &= ~TWL6030_VREG_VOLTAGE_WR_S; + + return vsel; +} + +static const struct regulator_ops twl6030ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + + .set_voltage_sel = twl6030ldo_set_voltage_sel, + .get_voltage_sel = twl6030ldo_get_voltage_sel, + + .enable = twl6030reg_enable, + .disable = twl6030reg_disable, + .is_enabled = twl6030reg_is_enabled, + + .set_mode = twl6030reg_set_mode, + + .get_status = twl6030reg_get_status, +}; + +static const struct regulator_ops twl6030fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + + .enable = twl6030reg_enable, + .disable = twl6030reg_disable, + .is_enabled = twl6030reg_is_enabled, + + .set_mode = twl6030reg_set_mode, + + .get_status = twl6030reg_get_status, +}; + +/* + * SMPS status and control + */ + +static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + + int voltage = 0; + + switch (info->flags) { + case SMPS_OFFSET_EN: + voltage = 100000; + fallthrough; + case 0: + switch (index) { + case 0: + voltage = 0; + break; + case 58: + voltage = 1350 * 1000; + break; + case 59: + voltage = 1500 * 1000; + break; + case 60: + voltage = 1800 * 1000; + break; + case 61: + voltage = 1900 * 1000; + break; + case 62: + voltage = 2100 * 1000; + break; + default: + voltage += (600000 + (12500 * (index - 1))); + } + break; + case SMPS_EXTENDED_EN: + switch (index) { + case 0: + voltage = 0; + break; + case 58: + voltage = 2084 * 1000; + break; + case 59: + voltage = 2315 * 1000; + break; + case 60: + voltage = 2778 * 1000; + break; + case 61: + voltage = 2932 * 1000; + break; + case 62: + voltage = 3241 * 1000; + break; + default: + voltage = (1852000 + (38600 * (index - 1))); + } + break; + case SMPS_OFFSET_EN | SMPS_EXTENDED_EN: + switch (index) { + case 0: + voltage = 0; + break; + case 58: + voltage = 4167 * 1000; + break; + case 59: + voltage = 2315 * 1000; + break; + case 60: + voltage = 2778 * 1000; + break; + case 61: + voltage = 2932 * 1000; + break; + case 62: + voltage = 3241 * 1000; + break; + default: + voltage = (2161000 + (38600 * (index - 1))); + } + break; + } + + return voltage; +} + +static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV, + int max_uV) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + int vsel = 0; + + switch (info->flags) { + case 0: + if (min_uV == 0) + vsel = 0; + else if ((min_uV >= 600000) && (min_uV <= 1300000)) { + vsel = DIV_ROUND_UP(min_uV - 600000, 12500); + vsel++; + } + /* Values 1..57 for vsel are linear and can be calculated + * values 58..62 are non linear. + */ + else if ((min_uV > 1900000) && (min_uV <= 2100000)) + vsel = 62; + else if ((min_uV > 1800000) && (min_uV <= 1900000)) + vsel = 61; + else if ((min_uV > 1500000) && (min_uV <= 1800000)) + vsel = 60; + else if ((min_uV > 1350000) && (min_uV <= 1500000)) + vsel = 59; + else if ((min_uV > 1300000) && (min_uV <= 1350000)) + vsel = 58; + else + return -EINVAL; + break; + case SMPS_OFFSET_EN: + if (min_uV == 0) + vsel = 0; + else if ((min_uV >= 700000) && (min_uV <= 1420000)) { + vsel = DIV_ROUND_UP(min_uV - 700000, 12500); + vsel++; + } + /* Values 1..57 for vsel are linear and can be calculated + * values 58..62 are non linear. + */ + else if ((min_uV > 1900000) && (min_uV <= 2100000)) + vsel = 62; + else if ((min_uV > 1800000) && (min_uV <= 1900000)) + vsel = 61; + else if ((min_uV > 1500000) && (min_uV <= 1800000)) + vsel = 60; + else if ((min_uV > 1350000) && (min_uV <= 1500000)) + vsel = 59; + else + return -EINVAL; + break; + case SMPS_EXTENDED_EN: + if (min_uV == 0) { + vsel = 0; + } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) { + vsel = DIV_ROUND_UP(min_uV - 1852000, 38600); + vsel++; + } + break; + case SMPS_OFFSET_EN|SMPS_EXTENDED_EN: + if (min_uV == 0) { + vsel = 0; + } else if ((min_uV >= 2161000) && (min_uV <= 4321000)) { + vsel = DIV_ROUND_UP(min_uV - 2161000, 38600); + vsel++; + } + break; + } + + return vsel; +} + +static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + + return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS, + selector); +} + +static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev) +{ + struct twlreg_info *info = rdev_get_drvdata(rdev); + + return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS); +} + +static const struct regulator_ops twlsmps_ops = { + .list_voltage = twl6030smps_list_voltage, + .map_voltage = twl6030smps_map_voltage, + + .set_voltage_sel = twl6030smps_set_voltage_sel, + .get_voltage_sel = twl6030smps_get_voltage_sel, + + .enable = twl6030reg_enable, + .disable = twl6030reg_disable, + .is_enabled = twl6030reg_is_enabled, + + .set_mode = twl6030reg_set_mode, + + .get_status = twl6030reg_get_status, +}; + +/*----------------------------------------------------------------------*/ +static const struct linear_range twl6030ldo_linear_range[] = { + REGULATOR_LINEAR_RANGE(0, 0, 0, 0), + REGULATOR_LINEAR_RANGE(1000000, 1, 24, 100000), + REGULATOR_LINEAR_RANGE(2750000, 31, 31, 0), +}; + +#define TWL6030_ADJUSTABLE_SMPS(label) \ +static const struct twlreg_info TWL6030_INFO_##label = { \ + .desc = { \ + .name = #label, \ + .id = TWL6030_REG_##label, \ + .ops = &twl6030coresmps_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +#define TWL6030_ADJUSTABLE_LDO(label, offset) \ +static const struct twlreg_info TWL6030_INFO_##label = { \ + .base = offset, \ + .desc = { \ + .name = #label, \ + .id = TWL6030_REG_##label, \ + .n_voltages = 32, \ + .linear_ranges = twl6030ldo_linear_range, \ + .n_linear_ranges = ARRAY_SIZE(twl6030ldo_linear_range), \ + .ops = &twl6030ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +#define TWL6032_ADJUSTABLE_LDO(label, offset) \ +static const struct twlreg_info TWL6032_INFO_##label = { \ + .base = offset, \ + .features = TWL6032_SUBCLASS, \ + .desc = { \ + .name = #label, \ + .id = TWL6032_REG_##label, \ + .n_voltages = 32, \ + .linear_ranges = twl6030ldo_linear_range, \ + .n_linear_ranges = ARRAY_SIZE(twl6030ldo_linear_range), \ + .ops = &twl6030ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \ +static const struct twlreg_info TWLFIXED_INFO_##label = { \ + .base = offset, \ + .id = 0, \ + .desc = { \ + .name = #label, \ + .id = TWL6030##_REG_##label, \ + .n_voltages = 1, \ + .ops = &twl6030fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .min_uV = mVolts * 1000, \ + .enable_time = turnon_delay, \ + .of_map_mode = NULL, \ + }, \ + } + +#define TWL6032_ADJUSTABLE_SMPS(label, offset) \ +static const struct twlreg_info TWLSMPS_INFO_##label = { \ + .base = offset, \ + .features = TWL6032_SUBCLASS, \ + .desc = { \ + .name = #label, \ + .id = TWL6032_REG_##label, \ + .n_voltages = 63, \ + .ops = &twlsmps_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + }, \ + } + +/* VUSBCP is managed *only* by the USB subchip */ +/* 6030 REG with base as PMC Slave Misc : 0x0030 */ +/* Turnon-delay and remap configuration values for 6030 are not + verified since the specification is not public */ +TWL6030_ADJUSTABLE_SMPS(VDD1); +TWL6030_ADJUSTABLE_SMPS(VDD2); +TWL6030_ADJUSTABLE_SMPS(VDD3); +TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54); +TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58); +TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c); +TWL6030_ADJUSTABLE_LDO(VMMC, 0x68); +TWL6030_ADJUSTABLE_LDO(VPP, 0x6c); +TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74); +/* 6025 are renamed compared to 6030 versions */ +TWL6032_ADJUSTABLE_LDO(LDO2, 0x54); +TWL6032_ADJUSTABLE_LDO(LDO4, 0x58); +TWL6032_ADJUSTABLE_LDO(LDO3, 0x5c); +TWL6032_ADJUSTABLE_LDO(LDO5, 0x68); +TWL6032_ADJUSTABLE_LDO(LDO1, 0x6c); +TWL6032_ADJUSTABLE_LDO(LDO7, 0x74); +TWL6032_ADJUSTABLE_LDO(LDO6, 0x60); +TWL6032_ADJUSTABLE_LDO(LDOLN, 0x64); +TWL6032_ADJUSTABLE_LDO(LDOUSB, 0x70); +TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0); +TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0); +TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0); +TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0); +TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0); +TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0); +TWL6032_ADJUSTABLE_SMPS(SMPS3, 0x34); +TWL6032_ADJUSTABLE_SMPS(SMPS4, 0x10); +TWL6032_ADJUSTABLE_SMPS(VIO, 0x16); + +static u8 twl_get_smps_offset(void) +{ + u8 value; + + twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value, + TWL6030_SMPS_OFFSET); + return value; +} + +static u8 twl_get_smps_mult(void) +{ + u8 value; + + twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value, + TWL6030_SMPS_MULT); + return value; +} + +#define TWL_OF_MATCH(comp, family, label) \ + { \ + .compatible = comp, \ + .data = &family##_INFO_##label, \ + } + +#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) +#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label) +#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) +#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) + +static const struct of_device_id twl_of_match[] = { + TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1), + TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2), + TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3), + TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030), + TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030), + TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030), + TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC), + TWL6030_OF_MATCH("ti,twl6030-vpp", VPP), + TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM), + TWL6032_OF_MATCH("ti,twl6032-ldo2", LDO2), + TWL6032_OF_MATCH("ti,twl6032-ldo4", LDO4), + TWL6032_OF_MATCH("ti,twl6032-ldo3", LDO3), + TWL6032_OF_MATCH("ti,twl6032-ldo5", LDO5), + TWL6032_OF_MATCH("ti,twl6032-ldo1", LDO1), + TWL6032_OF_MATCH("ti,twl6032-ldo7", LDO7), + TWL6032_OF_MATCH("ti,twl6032-ldo6", LDO6), + TWL6032_OF_MATCH("ti,twl6032-ldoln", LDOLN), + TWL6032_OF_MATCH("ti,twl6032-ldousb", LDOUSB), + TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA), + TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO), + TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC), + TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB), + TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8), + TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1), + TWLSMPS_OF_MATCH("ti,twl6032-smps3", SMPS3), + TWLSMPS_OF_MATCH("ti,twl6032-smps4", SMPS4), + TWLSMPS_OF_MATCH("ti,twl6032-vio", VIO), + {}, +}; +MODULE_DEVICE_TABLE(of, twl_of_match); + +static int twlreg_probe(struct platform_device *pdev) +{ + int id; + struct twlreg_info *info; + const struct twlreg_info *template; + struct regulator_init_data *initdata; + struct regulation_constraints *c; + struct regulator_dev *rdev; + struct regulator_config config = { }; + struct device_node *np = pdev->dev.of_node; + + template = of_device_get_match_data(&pdev->dev); + if (!template) + return -ENODEV; + + id = template->desc.id; + initdata = of_get_regulator_init_data(&pdev->dev, np, &template->desc); + if (!initdata) + return -EINVAL; + + info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + /* Constrain board-specific capabilities according to what + * this driver and the chip itself can actually do. + */ + c = &initdata->constraints; + c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; + c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS; + + switch (id) { + case TWL6032_REG_SMPS3: + if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3) + info->flags |= SMPS_EXTENDED_EN; + if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3) + info->flags |= SMPS_OFFSET_EN; + break; + case TWL6032_REG_SMPS4: + if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4) + info->flags |= SMPS_EXTENDED_EN; + if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4) + info->flags |= SMPS_OFFSET_EN; + break; + case TWL6032_REG_VIO: + if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO) + info->flags |= SMPS_EXTENDED_EN; + if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO) + info->flags |= SMPS_OFFSET_EN; + break; + } + + if (of_property_read_bool(np, "ti,retain-on-reset")) + info->flags |= TWL_6030_WARM_RESET; + + config.dev = &pdev->dev; + config.init_data = initdata; + config.driver_data = info; + config.of_node = np; + + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "can't register %s, %ld\n", + info->desc.name, PTR_ERR(rdev)); + return PTR_ERR(rdev); + } + platform_set_drvdata(pdev, rdev); + + /* NOTE: many regulators support short-circuit IRQs (presentable + * as REGULATOR_OVER_CURRENT notifications?) configured via: + * - SC_CONFIG + * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) + * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) + * - IT_CONFIG + */ + + return 0; +} + +MODULE_ALIAS("platform:twl6030_reg"); + +static struct platform_driver twlreg_driver = { + .probe = twlreg_probe, + /* NOTE: short name, to work around driver model truncation of + * "twl_regulator.12" (and friends) to "twl_regulator.1". + */ + .driver = { + .name = "twl6030_reg", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(twl_of_match), + }, +}; + +static int __init twlreg_init(void) +{ + return platform_driver_register(&twlreg_driver); +} +subsys_initcall(twlreg_init); + +static void __exit twlreg_exit(void) +{ + platform_driver_unregister(&twlreg_driver); +} +module_exit(twlreg_exit) + +MODULE_DESCRIPTION("TWL6030 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/uniphier-regulator.c b/drivers/regulator/uniphier-regulator.c new file mode 100644 index 000000000..74939b7fc --- /dev/null +++ b/drivers/regulator/uniphier-regulator.c @@ -0,0 +1,221 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Regulator controller driver for UniPhier SoC +// Copyright 2018 Socionext Inc. +// Author: Kunihiko Hayashi + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_CLKS 2 +#define MAX_RSTS 2 + +struct uniphier_regulator_soc_data { + int nclks; + const char * const *clock_names; + int nrsts; + const char * const *reset_names; + const struct regulator_desc *desc; + const struct regmap_config *regconf; +}; + +struct uniphier_regulator_priv { + struct clk_bulk_data clk[MAX_CLKS]; + struct reset_control *rst[MAX_RSTS]; + const struct uniphier_regulator_soc_data *data; +}; + +static const struct regulator_ops uniphier_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int uniphier_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct uniphier_regulator_priv *priv; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + void __iomem *base; + const char *name; + int i, ret, nr; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->data = of_device_get_match_data(dev); + if (WARN_ON(!priv->data)) + return -EINVAL; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + for (i = 0; i < priv->data->nclks; i++) + priv->clk[i].id = priv->data->clock_names[i]; + ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk); + if (ret) + return ret; + + for (i = 0; i < priv->data->nrsts; i++) { + name = priv->data->reset_names[i]; + priv->rst[i] = devm_reset_control_get_shared(dev, name); + if (IS_ERR(priv->rst[i])) + return PTR_ERR(priv->rst[i]); + } + + ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk); + if (ret) + return ret; + + for (nr = 0; nr < priv->data->nrsts; nr++) { + ret = reset_control_deassert(priv->rst[nr]); + if (ret) + goto out_rst_assert; + } + + regmap = devm_regmap_init_mmio(dev, base, priv->data->regconf); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + goto out_rst_assert; + } + + config.dev = dev; + config.driver_data = priv; + config.of_node = dev->of_node; + config.regmap = regmap; + config.init_data = of_get_regulator_init_data(dev, dev->of_node, + priv->data->desc); + rdev = devm_regulator_register(dev, priv->data->desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + goto out_rst_assert; + } + + platform_set_drvdata(pdev, priv); + + return 0; + +out_rst_assert: + while (nr--) + reset_control_assert(priv->rst[nr]); + + clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); + + return ret; +} + +static void uniphier_regulator_remove(struct platform_device *pdev) +{ + struct uniphier_regulator_priv *priv = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < priv->data->nrsts; i++) + reset_control_assert(priv->rst[i]); + + clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); +} + +/* USB3 controller data */ +#define USB3VBUS_OFFSET 0x0 +#define USB3VBUS_REG BIT(4) +#define USB3VBUS_REG_EN BIT(3) +static const struct regulator_desc uniphier_usb3_regulator_desc = { + .name = "vbus", + .of_match = of_match_ptr("vbus"), + .ops = &uniphier_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = USB3VBUS_OFFSET, + .enable_mask = USB3VBUS_REG_EN | USB3VBUS_REG, + .enable_val = USB3VBUS_REG_EN | USB3VBUS_REG, + .disable_val = USB3VBUS_REG_EN, +}; + +static const struct regmap_config uniphier_usb3_regulator_regconf = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 1, +}; + +static const char * const uniphier_pro4_clock_reset_names[] = { + "gio", "link", +}; + +static const struct uniphier_regulator_soc_data uniphier_pro4_usb3_data = { + .nclks = ARRAY_SIZE(uniphier_pro4_clock_reset_names), + .clock_names = uniphier_pro4_clock_reset_names, + .nrsts = ARRAY_SIZE(uniphier_pro4_clock_reset_names), + .reset_names = uniphier_pro4_clock_reset_names, + .desc = &uniphier_usb3_regulator_desc, + .regconf = &uniphier_usb3_regulator_regconf, +}; + +static const char * const uniphier_pxs2_clock_reset_names[] = { + "link", +}; + +static const struct uniphier_regulator_soc_data uniphier_pxs2_usb3_data = { + .nclks = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), + .clock_names = uniphier_pxs2_clock_reset_names, + .nrsts = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), + .reset_names = uniphier_pxs2_clock_reset_names, + .desc = &uniphier_usb3_regulator_desc, + .regconf = &uniphier_usb3_regulator_regconf, +}; + +static const struct of_device_id uniphier_regulator_match[] = { + /* USB VBUS */ + { + .compatible = "socionext,uniphier-pro4-usb3-regulator", + .data = &uniphier_pro4_usb3_data, + }, + { + .compatible = "socionext,uniphier-pro5-usb3-regulator", + .data = &uniphier_pro4_usb3_data, + }, + { + .compatible = "socionext,uniphier-pxs2-usb3-regulator", + .data = &uniphier_pxs2_usb3_data, + }, + { + .compatible = "socionext,uniphier-ld20-usb3-regulator", + .data = &uniphier_pxs2_usb3_data, + }, + { + .compatible = "socionext,uniphier-pxs3-usb3-regulator", + .data = &uniphier_pxs2_usb3_data, + }, + { + .compatible = "socionext,uniphier-nx1-usb3-regulator", + .data = &uniphier_pxs2_usb3_data, + }, + { /* Sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, uniphier_regulator_match); + +static struct platform_driver uniphier_regulator_driver = { + .probe = uniphier_regulator_probe, + .remove = uniphier_regulator_remove, + .driver = { + .name = "uniphier-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = uniphier_regulator_match, + }, +}; +module_platform_driver(uniphier_regulator_driver); + +MODULE_AUTHOR("Kunihiko Hayashi "); +MODULE_DESCRIPTION("UniPhier Regulator Controller Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/userspace-consumer.c b/drivers/regulator/userspace-consumer.c new file mode 100644 index 000000000..72bb5ffb4 --- /dev/null +++ b/drivers/regulator/userspace-consumer.c @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * userspace-consumer.c + * + * Copyright 2009 CompuLab, Ltd. + * + * Author: Mike Rapoport + * + * Based of virtual consumer driver: + * Copyright 2008 Wolfson Microelectronics PLC. + * Author: Mark Brown + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct userspace_consumer_data { + const char *name; + + struct mutex lock; + bool enabled; + bool no_autoswitch; + + int num_supplies; + struct regulator_bulk_data *supplies; +}; + +static ssize_t name_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct userspace_consumer_data *data = dev_get_drvdata(dev); + + return sprintf(buf, "%s\n", data->name); +} + +static ssize_t state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct userspace_consumer_data *data = dev_get_drvdata(dev); + + if (data->enabled) + return sprintf(buf, "enabled\n"); + + return sprintf(buf, "disabled\n"); +} + +static ssize_t state_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct userspace_consumer_data *data = dev_get_drvdata(dev); + bool enabled; + int ret; + + /* + * sysfs_streq() doesn't need the \n's, but we add them so the strings + * will be shared with show_state(), above. + */ + if (sysfs_streq(buf, "enabled\n") || sysfs_streq(buf, "1")) + enabled = true; + else if (sysfs_streq(buf, "disabled\n") || sysfs_streq(buf, "0")) + enabled = false; + else { + dev_err(dev, "Configuring invalid mode\n"); + return count; + } + + mutex_lock(&data->lock); + if (enabled != data->enabled) { + if (enabled) + ret = regulator_bulk_enable(data->num_supplies, + data->supplies); + else + ret = regulator_bulk_disable(data->num_supplies, + data->supplies); + + if (ret == 0) + data->enabled = enabled; + else + dev_err(dev, "Failed to configure state: %d\n", ret); + } + mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR_RO(name); +static DEVICE_ATTR_RW(state); + +static struct attribute *attributes[] = { + &dev_attr_name.attr, + &dev_attr_state.attr, + NULL, +}; + +static umode_t attr_visible(struct kobject *kobj, struct attribute *attr, int idx) +{ + struct device *dev = kobj_to_dev(kobj); + struct userspace_consumer_data *data = dev_get_drvdata(dev); + + /* If a name hasn't been set, don't bother with the attribute */ + if (attr == &dev_attr_name.attr && !data->name) + return 0; + + return attr->mode; +} + +static const struct attribute_group attr_group = { + .attrs = attributes, + .is_visible = attr_visible, +}; + +static int regulator_userspace_consumer_probe(struct platform_device *pdev) +{ + struct regulator_userspace_consumer_data tmpdata; + struct regulator_userspace_consumer_data *pdata; + struct userspace_consumer_data *drvdata; + int ret; + + pdata = dev_get_platdata(&pdev->dev); + if (!pdata) { + if (!pdev->dev.of_node) + return -EINVAL; + + pdata = &tmpdata; + memset(pdata, 0, sizeof(*pdata)); + + pdata->no_autoswitch = true; + pdata->num_supplies = 1; + pdata->supplies = devm_kzalloc(&pdev->dev, sizeof(*pdata->supplies), GFP_KERNEL); + if (!pdata->supplies) + return -ENOMEM; + pdata->supplies[0].supply = "vout"; + } + + if (pdata->num_supplies < 1) { + dev_err(&pdev->dev, "At least one supply required\n"); + return -EINVAL; + } + + drvdata = devm_kzalloc(&pdev->dev, + sizeof(struct userspace_consumer_data), + GFP_KERNEL); + if (drvdata == NULL) + return -ENOMEM; + + drvdata->name = pdata->name; + drvdata->num_supplies = pdata->num_supplies; + drvdata->supplies = pdata->supplies; + drvdata->no_autoswitch = pdata->no_autoswitch; + + mutex_init(&drvdata->lock); + + ret = devm_regulator_bulk_get_exclusive(&pdev->dev, drvdata->num_supplies, + drvdata->supplies); + if (ret) + return dev_err_probe(&pdev->dev, ret, "Failed to get supplies\n"); + + platform_set_drvdata(pdev, drvdata); + + ret = sysfs_create_group(&pdev->dev.kobj, &attr_group); + if (ret != 0) + return ret; + + if (pdata->init_on && !pdata->no_autoswitch) { + ret = regulator_bulk_enable(drvdata->num_supplies, + drvdata->supplies); + if (ret) { + dev_err(&pdev->dev, + "Failed to set initial state: %d\n", ret); + goto err_enable; + } + } + + ret = regulator_is_enabled(pdata->supplies[0].consumer); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to get regulator status\n"); + goto err_enable; + } + drvdata->enabled = !!ret; + + return 0; + +err_enable: + sysfs_remove_group(&pdev->dev.kobj, &attr_group); + + return ret; +} + +static void regulator_userspace_consumer_remove(struct platform_device *pdev) +{ + struct userspace_consumer_data *data = platform_get_drvdata(pdev); + + sysfs_remove_group(&pdev->dev.kobj, &attr_group); + + if (data->enabled && !data->no_autoswitch) + regulator_bulk_disable(data->num_supplies, data->supplies); +} + +static const struct of_device_id regulator_userspace_consumer_of_match[] = { + { .compatible = "regulator-output", }, + {}, +}; +MODULE_DEVICE_TABLE(of, regulator_userspace_consumer_of_match); + +static struct platform_driver regulator_userspace_consumer_driver = { + .probe = regulator_userspace_consumer_probe, + .remove = regulator_userspace_consumer_remove, + .driver = { + .name = "reg-userspace-consumer", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = regulator_userspace_consumer_of_match, + }, +}; + +module_platform_driver(regulator_userspace_consumer_driver); + +MODULE_AUTHOR("Mike Rapoport "); +MODULE_DESCRIPTION("Userspace consumer for voltage and current regulators"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/vctrl-regulator.c b/drivers/regulator/vctrl-regulator.c new file mode 100644 index 000000000..2796580a3 --- /dev/null +++ b/drivers/regulator/vctrl-regulator.c @@ -0,0 +1,555 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for voltage controller regulators + * + * Copyright (C) 2017 Google, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "internal.h" + +struct vctrl_voltage_range { + int min_uV; + int max_uV; +}; + +struct vctrl_voltage_ranges { + struct vctrl_voltage_range ctrl; + struct vctrl_voltage_range out; +}; + +struct vctrl_voltage_table { + int ctrl; + int out; + int ovp_min_sel; +}; + +struct vctrl_data { + struct regulator_dev *rdev; + struct regulator_desc desc; + bool enabled; + unsigned int min_slew_down_rate; + unsigned int ovp_threshold; + struct vctrl_voltage_ranges vrange; + struct vctrl_voltage_table *vtable; + unsigned int sel; +}; + +static int vctrl_calc_ctrl_voltage(struct vctrl_data *vctrl, int out_uV) +{ + struct vctrl_voltage_range *ctrl = &vctrl->vrange.ctrl; + struct vctrl_voltage_range *out = &vctrl->vrange.out; + + return ctrl->min_uV + + DIV_ROUND_CLOSEST_ULL((s64)(out_uV - out->min_uV) * + (ctrl->max_uV - ctrl->min_uV), + out->max_uV - out->min_uV); +} + +static int vctrl_calc_output_voltage(struct vctrl_data *vctrl, int ctrl_uV) +{ + struct vctrl_voltage_range *ctrl = &vctrl->vrange.ctrl; + struct vctrl_voltage_range *out = &vctrl->vrange.out; + + if (ctrl_uV < 0) { + pr_err("vctrl: failed to get control voltage\n"); + return ctrl_uV; + } + + if (ctrl_uV < ctrl->min_uV) + return out->min_uV; + + if (ctrl_uV > ctrl->max_uV) + return out->max_uV; + + return out->min_uV + + DIV_ROUND_CLOSEST_ULL((s64)(ctrl_uV - ctrl->min_uV) * + (out->max_uV - out->min_uV), + ctrl->max_uV - ctrl->min_uV); +} + +static int vctrl_get_voltage(struct regulator_dev *rdev) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + int ctrl_uV; + + if (!rdev->supply) + return -EPROBE_DEFER; + + ctrl_uV = regulator_get_voltage_rdev(rdev->supply->rdev); + + return vctrl_calc_output_voltage(vctrl, ctrl_uV); +} + +static int vctrl_set_voltage(struct regulator_dev *rdev, + int req_min_uV, int req_max_uV, + unsigned int *selector) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + int orig_ctrl_uV; + int uV; + int ret; + + if (!rdev->supply) + return -EPROBE_DEFER; + + orig_ctrl_uV = regulator_get_voltage_rdev(rdev->supply->rdev); + uV = vctrl_calc_output_voltage(vctrl, orig_ctrl_uV); + + if (req_min_uV >= uV || !vctrl->ovp_threshold) + /* voltage rising or no OVP */ + return regulator_set_voltage_rdev(rdev->supply->rdev, + vctrl_calc_ctrl_voltage(vctrl, req_min_uV), + vctrl_calc_ctrl_voltage(vctrl, req_max_uV), + PM_SUSPEND_ON); + + while (uV > req_min_uV) { + int max_drop_uV = (uV * vctrl->ovp_threshold) / 100; + int next_uV; + int next_ctrl_uV; + int delay; + + /* Make sure no infinite loop even in crazy cases */ + if (max_drop_uV == 0) + max_drop_uV = 1; + + next_uV = max_t(int, req_min_uV, uV - max_drop_uV); + next_ctrl_uV = vctrl_calc_ctrl_voltage(vctrl, next_uV); + + ret = regulator_set_voltage_rdev(rdev->supply->rdev, + next_ctrl_uV, + next_ctrl_uV, + PM_SUSPEND_ON); + if (ret) + goto err; + + delay = DIV_ROUND_UP(uV - next_uV, vctrl->min_slew_down_rate); + usleep_range(delay, delay + DIV_ROUND_UP(delay, 10)); + + uV = next_uV; + } + + return 0; + +err: + /* Try to go back to original voltage */ + regulator_set_voltage_rdev(rdev->supply->rdev, orig_ctrl_uV, orig_ctrl_uV, + PM_SUSPEND_ON); + + return ret; +} + +static int vctrl_get_voltage_sel(struct regulator_dev *rdev) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + + return vctrl->sel; +} + +static int vctrl_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + unsigned int orig_sel = vctrl->sel; + int ret; + + if (!rdev->supply) + return -EPROBE_DEFER; + + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + + if (selector >= vctrl->sel || !vctrl->ovp_threshold) { + /* voltage rising or no OVP */ + ret = regulator_set_voltage_rdev(rdev->supply->rdev, + vctrl->vtable[selector].ctrl, + vctrl->vtable[selector].ctrl, + PM_SUSPEND_ON); + if (!ret) + vctrl->sel = selector; + + return ret; + } + + while (vctrl->sel != selector) { + unsigned int next_sel; + int delay; + + next_sel = max_t(unsigned int, selector, vctrl->vtable[vctrl->sel].ovp_min_sel); + + ret = regulator_set_voltage_rdev(rdev->supply->rdev, + vctrl->vtable[next_sel].ctrl, + vctrl->vtable[next_sel].ctrl, + PM_SUSPEND_ON); + if (ret) { + dev_err(&rdev->dev, + "failed to set control voltage to %duV\n", + vctrl->vtable[next_sel].ctrl); + goto err; + } + vctrl->sel = next_sel; + + delay = DIV_ROUND_UP(vctrl->vtable[vctrl->sel].out - + vctrl->vtable[next_sel].out, + vctrl->min_slew_down_rate); + usleep_range(delay, delay + DIV_ROUND_UP(delay, 10)); + } + + return 0; + +err: + if (vctrl->sel != orig_sel) { + /* Try to go back to original voltage */ + if (!regulator_set_voltage_rdev(rdev->supply->rdev, + vctrl->vtable[orig_sel].ctrl, + vctrl->vtable[orig_sel].ctrl, + PM_SUSPEND_ON)) + vctrl->sel = orig_sel; + else + dev_warn(&rdev->dev, + "failed to restore original voltage\n"); + } + + return ret; +} + +static int vctrl_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + + return vctrl->vtable[selector].out; +} + +static int vctrl_parse_dt(struct platform_device *pdev, + struct vctrl_data *vctrl) +{ + int ret; + struct device_node *np = pdev->dev.of_node; + u32 pval; + u32 vrange_ctrl[2]; + + ret = of_property_read_u32(np, "ovp-threshold-percent", &pval); + if (!ret) { + vctrl->ovp_threshold = pval; + if (vctrl->ovp_threshold > 100) { + dev_err(&pdev->dev, + "ovp-threshold-percent (%u) > 100\n", + vctrl->ovp_threshold); + return -EINVAL; + } + } + + ret = of_property_read_u32(np, "min-slew-down-rate", &pval); + if (!ret) { + vctrl->min_slew_down_rate = pval; + + /* We use the value as int and as divider; sanity check */ + if (vctrl->min_slew_down_rate == 0) { + dev_err(&pdev->dev, + "min-slew-down-rate must not be 0\n"); + return -EINVAL; + } else if (vctrl->min_slew_down_rate > INT_MAX) { + dev_err(&pdev->dev, "min-slew-down-rate (%u) too big\n", + vctrl->min_slew_down_rate); + return -EINVAL; + } + } + + if (vctrl->ovp_threshold && !vctrl->min_slew_down_rate) { + dev_err(&pdev->dev, + "ovp-threshold-percent requires min-slew-down-rate\n"); + return -EINVAL; + } + + ret = of_property_read_u32(np, "regulator-min-microvolt", &pval); + if (ret) { + dev_err(&pdev->dev, + "failed to read regulator-min-microvolt: %d\n", ret); + return ret; + } + vctrl->vrange.out.min_uV = pval; + + ret = of_property_read_u32(np, "regulator-max-microvolt", &pval); + if (ret) { + dev_err(&pdev->dev, + "failed to read regulator-max-microvolt: %d\n", ret); + return ret; + } + vctrl->vrange.out.max_uV = pval; + + ret = of_property_read_u32_array(np, "ctrl-voltage-range", vrange_ctrl, + 2); + if (ret) { + dev_err(&pdev->dev, "failed to read ctrl-voltage-range: %d\n", + ret); + return ret; + } + + if (vrange_ctrl[0] >= vrange_ctrl[1]) { + dev_err(&pdev->dev, "ctrl-voltage-range is invalid: %d-%d\n", + vrange_ctrl[0], vrange_ctrl[1]); + return -EINVAL; + } + + vctrl->vrange.ctrl.min_uV = vrange_ctrl[0]; + vctrl->vrange.ctrl.max_uV = vrange_ctrl[1]; + + return 0; +} + +static int vctrl_cmp_ctrl_uV(const void *a, const void *b) +{ + const struct vctrl_voltage_table *at = a; + const struct vctrl_voltage_table *bt = b; + + return at->ctrl - bt->ctrl; +} + +static int vctrl_init_vtable(struct platform_device *pdev, + struct regulator *ctrl_reg) +{ + struct vctrl_data *vctrl = platform_get_drvdata(pdev); + struct regulator_desc *rdesc = &vctrl->desc; + struct vctrl_voltage_range *vrange_ctrl = &vctrl->vrange.ctrl; + int n_voltages; + int ctrl_uV; + int i, idx_vt; + + n_voltages = regulator_count_voltages(ctrl_reg); + + rdesc->n_voltages = n_voltages; + + /* determine number of steps within the range of the vctrl regulator */ + for (i = 0; i < n_voltages; i++) { + ctrl_uV = regulator_list_voltage(ctrl_reg, i); + + if (ctrl_uV < vrange_ctrl->min_uV || + ctrl_uV > vrange_ctrl->max_uV) + rdesc->n_voltages--; + } + + if (rdesc->n_voltages == 0) { + dev_err(&pdev->dev, "invalid configuration\n"); + return -EINVAL; + } + + vctrl->vtable = devm_kcalloc(&pdev->dev, rdesc->n_voltages, + sizeof(struct vctrl_voltage_table), + GFP_KERNEL); + if (!vctrl->vtable) + return -ENOMEM; + + /* create mapping control <=> output voltage */ + for (i = 0, idx_vt = 0; i < n_voltages; i++) { + ctrl_uV = regulator_list_voltage(ctrl_reg, i); + + if (ctrl_uV < vrange_ctrl->min_uV || + ctrl_uV > vrange_ctrl->max_uV) + continue; + + vctrl->vtable[idx_vt].ctrl = ctrl_uV; + vctrl->vtable[idx_vt].out = + vctrl_calc_output_voltage(vctrl, ctrl_uV); + idx_vt++; + } + + /* we rely on the table to be ordered by ascending voltage */ + sort(vctrl->vtable, rdesc->n_voltages, + sizeof(struct vctrl_voltage_table), vctrl_cmp_ctrl_uV, + NULL); + + /* pre-calculate OVP-safe downward transitions */ + for (i = rdesc->n_voltages - 1; i > 0; i--) { + int j; + int ovp_min_uV = (vctrl->vtable[i].out * + (100 - vctrl->ovp_threshold)) / 100; + + for (j = 0; j < i; j++) { + if (vctrl->vtable[j].out >= ovp_min_uV) { + vctrl->vtable[i].ovp_min_sel = j; + break; + } + } + + if (j == i) { + dev_warn(&pdev->dev, "switching down from %duV may cause OVP shutdown\n", + vctrl->vtable[i].out); + /* use next lowest voltage */ + vctrl->vtable[i].ovp_min_sel = i - 1; + } + } + + return 0; +} + +static int vctrl_enable(struct regulator_dev *rdev) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + + vctrl->enabled = true; + + return 0; +} + +static int vctrl_disable(struct regulator_dev *rdev) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + + vctrl->enabled = false; + + return 0; +} + +static int vctrl_is_enabled(struct regulator_dev *rdev) +{ + struct vctrl_data *vctrl = rdev_get_drvdata(rdev); + + return vctrl->enabled; +} + +static const struct regulator_ops vctrl_ops_cont = { + .enable = vctrl_enable, + .disable = vctrl_disable, + .is_enabled = vctrl_is_enabled, + .get_voltage = vctrl_get_voltage, + .set_voltage = vctrl_set_voltage, +}; + +static const struct regulator_ops vctrl_ops_non_cont = { + .enable = vctrl_enable, + .disable = vctrl_disable, + .is_enabled = vctrl_is_enabled, + .set_voltage_sel = vctrl_set_voltage_sel, + .get_voltage_sel = vctrl_get_voltage_sel, + .list_voltage = vctrl_list_voltage, + .map_voltage = regulator_map_voltage_iterate, +}; + +static int vctrl_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct vctrl_data *vctrl; + const struct regulator_init_data *init_data; + struct regulator_desc *rdesc; + struct regulator_config cfg = { }; + struct vctrl_voltage_range *vrange_ctrl; + struct regulator *ctrl_reg; + int ctrl_uV; + int ret; + + vctrl = devm_kzalloc(&pdev->dev, sizeof(struct vctrl_data), + GFP_KERNEL); + if (!vctrl) + return -ENOMEM; + + platform_set_drvdata(pdev, vctrl); + + ret = vctrl_parse_dt(pdev, vctrl); + if (ret) + return ret; + + ctrl_reg = devm_regulator_get(&pdev->dev, "ctrl"); + if (IS_ERR(ctrl_reg)) + return PTR_ERR(ctrl_reg); + + vrange_ctrl = &vctrl->vrange.ctrl; + + rdesc = &vctrl->desc; + rdesc->name = "vctrl"; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->owner = THIS_MODULE; + rdesc->supply_name = "ctrl"; + + if ((regulator_get_linear_step(ctrl_reg) == 1) || + (regulator_count_voltages(ctrl_reg) == -EINVAL)) { + rdesc->continuous_voltage_range = true; + rdesc->ops = &vctrl_ops_cont; + } else { + rdesc->ops = &vctrl_ops_non_cont; + } + + init_data = of_get_regulator_init_data(&pdev->dev, np, rdesc); + if (!init_data) + return -ENOMEM; + + cfg.of_node = np; + cfg.dev = &pdev->dev; + cfg.driver_data = vctrl; + cfg.init_data = init_data; + + if (!rdesc->continuous_voltage_range) { + ret = vctrl_init_vtable(pdev, ctrl_reg); + if (ret) + return ret; + + /* Use locked consumer API when not in regulator framework */ + ctrl_uV = regulator_get_voltage(ctrl_reg); + if (ctrl_uV < 0) { + dev_err(&pdev->dev, "failed to get control voltage\n"); + return ctrl_uV; + } + + /* determine current voltage selector from control voltage */ + if (ctrl_uV < vrange_ctrl->min_uV) { + vctrl->sel = 0; + } else if (ctrl_uV > vrange_ctrl->max_uV) { + vctrl->sel = rdesc->n_voltages - 1; + } else { + int i; + + for (i = 0; i < rdesc->n_voltages; i++) { + if (ctrl_uV == vctrl->vtable[i].ctrl) { + vctrl->sel = i; + break; + } + } + } + } + + /* Drop ctrl-supply here in favor of regulator core managed supply */ + devm_regulator_put(ctrl_reg); + + vctrl->rdev = devm_regulator_register(&pdev->dev, rdesc, &cfg); + if (IS_ERR(vctrl->rdev)) { + ret = PTR_ERR(vctrl->rdev); + dev_err(&pdev->dev, "failed to register regulator: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct of_device_id vctrl_of_match[] = { + { .compatible = "vctrl-regulator", }, + {}, +}; +MODULE_DEVICE_TABLE(of, vctrl_of_match); + +static struct platform_driver vctrl_driver = { + .probe = vctrl_probe, + .driver = { + .name = "vctrl-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(vctrl_of_match), + }, +}; + +module_platform_driver(vctrl_driver); + +MODULE_DESCRIPTION("Voltage Controlled Regulator Driver"); +MODULE_AUTHOR("Matthias Kaehlcke "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/regulator/vexpress-regulator.c b/drivers/regulator/vexpress-regulator.c new file mode 100644 index 000000000..5a2e0143c --- /dev/null +++ b/drivers/regulator/vexpress-regulator.c @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2012 ARM Limited + +#define DRVNAME "vexpress-regulator" +#define pr_fmt(fmt) DRVNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +static int vexpress_regulator_get_voltage(struct regulator_dev *regdev) +{ + unsigned int uV; + int err = regmap_read(regdev->regmap, 0, &uV); + + return err ? err : uV; +} + +static int vexpress_regulator_set_voltage(struct regulator_dev *regdev, + int min_uV, int max_uV, unsigned *selector) +{ + return regmap_write(regdev->regmap, 0, min_uV); +} + +static const struct regulator_ops vexpress_regulator_ops_ro = { + .get_voltage = vexpress_regulator_get_voltage, +}; + +static const struct regulator_ops vexpress_regulator_ops = { + .get_voltage = vexpress_regulator_get_voltage, + .set_voltage = vexpress_regulator_set_voltage, +}; + +static int vexpress_regulator_probe(struct platform_device *pdev) +{ + struct regulator_desc *desc; + struct regulator_init_data *init_data; + struct regulator_config config = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + + desc = devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + regmap = devm_regmap_init_vexpress_config(&pdev->dev); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + desc->name = dev_name(&pdev->dev); + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + desc->continuous_voltage_range = true; + + init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, + desc); + if (!init_data) + return -EINVAL; + + init_data->constraints.apply_uV = 0; + if (init_data->constraints.min_uV && init_data->constraints.max_uV) + desc->ops = &vexpress_regulator_ops; + else + desc->ops = &vexpress_regulator_ops_ro; + + config.regmap = regmap; + config.dev = &pdev->dev; + config.init_data = init_data; + config.of_node = pdev->dev.of_node; + + rdev = devm_regulator_register(&pdev->dev, desc, &config); + return PTR_ERR_OR_ZERO(rdev); +} + +static const struct of_device_id vexpress_regulator_of_match[] = { + { .compatible = "arm,vexpress-volt", }, + { } +}; +MODULE_DEVICE_TABLE(of, vexpress_regulator_of_match); + +static struct platform_driver vexpress_regulator_driver = { + .probe = vexpress_regulator_probe, + .driver = { + .name = DRVNAME, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = vexpress_regulator_of_match, + }, +}; + +module_platform_driver(vexpress_regulator_driver); + +MODULE_AUTHOR("Pawel Moll "); +MODULE_DESCRIPTION("Versatile Express regulator"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:vexpress-regulator"); diff --git a/drivers/regulator/virtual.c b/drivers/regulator/virtual.c new file mode 100644 index 000000000..218a0d66a --- /dev/null +++ b/drivers/regulator/virtual.c @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * reg-virtual-consumer.c + * + * Copyright 2008 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + */ + +#include +#include +#include +#include +#include +#include +#include + +struct virtual_consumer_data { + struct mutex lock; + struct regulator *regulator; + bool enabled; + int min_uV; + int max_uV; + int min_uA; + int max_uA; + unsigned int mode; +}; + +static void update_voltage_constraints(struct device *dev, + struct virtual_consumer_data *data) +{ + int ret; + + if (data->min_uV && data->max_uV + && data->min_uV <= data->max_uV) { + dev_dbg(dev, "Requesting %d-%duV\n", + data->min_uV, data->max_uV); + ret = regulator_set_voltage(data->regulator, + data->min_uV, data->max_uV); + if (ret != 0) { + dev_err(dev, + "regulator_set_voltage() failed: %d\n", ret); + return; + } + } + + if (data->min_uV && data->max_uV && !data->enabled) { + dev_dbg(dev, "Enabling regulator\n"); + ret = regulator_enable(data->regulator); + if (ret == 0) + data->enabled = true; + else + dev_err(dev, "regulator_enable() failed: %d\n", + ret); + } + + if (!(data->min_uV && data->max_uV) && data->enabled) { + dev_dbg(dev, "Disabling regulator\n"); + ret = regulator_disable(data->regulator); + if (ret == 0) + data->enabled = false; + else + dev_err(dev, "regulator_disable() failed: %d\n", + ret); + } +} + +static void update_current_limit_constraints(struct device *dev, + struct virtual_consumer_data *data) +{ + int ret; + + if (data->max_uA + && data->min_uA <= data->max_uA) { + dev_dbg(dev, "Requesting %d-%duA\n", + data->min_uA, data->max_uA); + ret = regulator_set_current_limit(data->regulator, + data->min_uA, data->max_uA); + if (ret != 0) { + dev_err(dev, + "regulator_set_current_limit() failed: %d\n", + ret); + return; + } + } + + if (data->max_uA && !data->enabled) { + dev_dbg(dev, "Enabling regulator\n"); + ret = regulator_enable(data->regulator); + if (ret == 0) + data->enabled = true; + else + dev_err(dev, "regulator_enable() failed: %d\n", + ret); + } + + if (!(data->min_uA && data->max_uA) && data->enabled) { + dev_dbg(dev, "Disabling regulator\n"); + ret = regulator_disable(data->regulator); + if (ret == 0) + data->enabled = false; + else + dev_err(dev, "regulator_disable() failed: %d\n", + ret); + } +} + +static ssize_t show_min_uV(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + return sprintf(buf, "%d\n", data->min_uV); +} + +static ssize_t set_min_uV(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + long val; + + if (kstrtol(buf, 10, &val) != 0) + return count; + + mutex_lock(&data->lock); + + data->min_uV = val; + update_voltage_constraints(dev, data); + + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_max_uV(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + return sprintf(buf, "%d\n", data->max_uV); +} + +static ssize_t set_max_uV(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + long val; + + if (kstrtol(buf, 10, &val) != 0) + return count; + + mutex_lock(&data->lock); + + data->max_uV = val; + update_voltage_constraints(dev, data); + + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_min_uA(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + return sprintf(buf, "%d\n", data->min_uA); +} + +static ssize_t set_min_uA(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + long val; + + if (kstrtol(buf, 10, &val) != 0) + return count; + + mutex_lock(&data->lock); + + data->min_uA = val; + update_current_limit_constraints(dev, data); + + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_max_uA(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + return sprintf(buf, "%d\n", data->max_uA); +} + +static ssize_t set_max_uA(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + long val; + + if (kstrtol(buf, 10, &val) != 0) + return count; + + mutex_lock(&data->lock); + + data->max_uA = val; + update_current_limit_constraints(dev, data); + + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_mode(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + + switch (data->mode) { + case REGULATOR_MODE_FAST: + return sprintf(buf, "fast\n"); + case REGULATOR_MODE_NORMAL: + return sprintf(buf, "normal\n"); + case REGULATOR_MODE_IDLE: + return sprintf(buf, "idle\n"); + case REGULATOR_MODE_STANDBY: + return sprintf(buf, "standby\n"); + default: + return sprintf(buf, "unknown\n"); + } +} + +static ssize_t set_mode(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct virtual_consumer_data *data = dev_get_drvdata(dev); + unsigned int mode; + int ret; + + /* + * sysfs_streq() doesn't need the \n's, but we add them so the strings + * will be shared with show_mode(), above. + */ + if (sysfs_streq(buf, "fast\n")) + mode = REGULATOR_MODE_FAST; + else if (sysfs_streq(buf, "normal\n")) + mode = REGULATOR_MODE_NORMAL; + else if (sysfs_streq(buf, "idle\n")) + mode = REGULATOR_MODE_IDLE; + else if (sysfs_streq(buf, "standby\n")) + mode = REGULATOR_MODE_STANDBY; + else { + dev_err(dev, "Configuring invalid mode\n"); + return count; + } + + mutex_lock(&data->lock); + ret = regulator_set_mode(data->regulator, mode); + if (ret == 0) + data->mode = mode; + else + dev_err(dev, "Failed to configure mode: %d\n", ret); + mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(min_microvolts, 0664, show_min_uV, set_min_uV); +static DEVICE_ATTR(max_microvolts, 0664, show_max_uV, set_max_uV); +static DEVICE_ATTR(min_microamps, 0664, show_min_uA, set_min_uA); +static DEVICE_ATTR(max_microamps, 0664, show_max_uA, set_max_uA); +static DEVICE_ATTR(mode, 0664, show_mode, set_mode); + +static struct attribute *regulator_virtual_attributes[] = { + &dev_attr_min_microvolts.attr, + &dev_attr_max_microvolts.attr, + &dev_attr_min_microamps.attr, + &dev_attr_max_microamps.attr, + &dev_attr_mode.attr, + NULL +}; + +static const struct attribute_group regulator_virtual_attr_group = { + .attrs = regulator_virtual_attributes, +}; + +#ifdef CONFIG_OF +static const struct of_device_id regulator_virtual_consumer_of_match[] = { + { .compatible = "regulator-virtual-consumer" }, + {}, +}; +MODULE_DEVICE_TABLE(of, regulator_virtual_consumer_of_match); +#endif + +static int regulator_virtual_probe(struct platform_device *pdev) +{ + char *reg_id = dev_get_platdata(&pdev->dev); + struct virtual_consumer_data *drvdata; + static bool warned; + int ret; + + if (!warned) { + warned = true; + pr_warn("**********************************************************\n"); + pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); + pr_warn("** **\n"); + pr_warn("** regulator-virtual-consumer is only for testing and **\n"); + pr_warn("** debugging. Do not use it in a production kernel. **\n"); + pr_warn("** **\n"); + pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); + pr_warn("**********************************************************\n"); + } + + drvdata = devm_kzalloc(&pdev->dev, sizeof(struct virtual_consumer_data), + GFP_KERNEL); + if (drvdata == NULL) + return -ENOMEM; + + /* + * This virtual consumer does not have any hardware-defined supply + * name, so just allow the regulator to be specified in a property + * named "default-supply" when we're being probed from devicetree. + */ + if (!reg_id && pdev->dev.of_node) + reg_id = "default"; + + mutex_init(&drvdata->lock); + + drvdata->regulator = devm_regulator_get(&pdev->dev, reg_id); + if (IS_ERR(drvdata->regulator)) + return dev_err_probe(&pdev->dev, PTR_ERR(drvdata->regulator), + "Failed to obtain supply '%s'\n", + reg_id); + + ret = sysfs_create_group(&pdev->dev.kobj, + ®ulator_virtual_attr_group); + if (ret != 0) { + dev_err(&pdev->dev, + "Failed to create attribute group: %d\n", ret); + return ret; + } + + drvdata->mode = regulator_get_mode(drvdata->regulator); + + platform_set_drvdata(pdev, drvdata); + + return 0; +} + +static void regulator_virtual_remove(struct platform_device *pdev) +{ + struct virtual_consumer_data *drvdata = platform_get_drvdata(pdev); + + sysfs_remove_group(&pdev->dev.kobj, ®ulator_virtual_attr_group); + + if (drvdata->enabled) + regulator_disable(drvdata->regulator); +} + +static struct platform_driver regulator_virtual_consumer_driver = { + .probe = regulator_virtual_probe, + .remove = regulator_virtual_remove, + .driver = { + .name = "reg-virt-consumer", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(regulator_virtual_consumer_of_match), + }, +}; + +module_platform_driver(regulator_virtual_consumer_driver); + +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("Virtual regulator consumer"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:reg-virt-consumer"); diff --git a/drivers/regulator/vqmmc-ipq4019-regulator.c b/drivers/regulator/vqmmc-ipq4019-regulator.c new file mode 100644 index 000000000..495561651 --- /dev/null +++ b/drivers/regulator/vqmmc-ipq4019-regulator.c @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (c) 2019 Mantas Pucka +// Copyright (c) 2019 Robert Marko +// +// Driver for IPQ4019 SD/MMC controller's I/O LDO voltage regulator + +#include +#include +#include +#include +#include +#include +#include +#include + +static const unsigned int ipq4019_vmmc_voltages[] = { + 1500000, 1800000, 2500000, 3000000, +}; + +static const struct regulator_ops ipq4019_regulator_voltage_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc vmmc_regulator = { + .name = "vmmcq", + .ops = &ipq4019_regulator_voltage_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .volt_table = ipq4019_vmmc_voltages, + .n_voltages = ARRAY_SIZE(ipq4019_vmmc_voltages), + .vsel_reg = 0, + .vsel_mask = 0x3, +}; + +static const struct regmap_config ipq4019_vmmcq_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, +}; + +static int ipq4019_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regulator_init_data *init_data; + struct regulator_config cfg = {}; + struct regulator_dev *rdev; + struct regmap *rmap; + void __iomem *base; + + init_data = of_get_regulator_init_data(dev, dev->of_node, + &vmmc_regulator); + if (!init_data) + return -EINVAL; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + rmap = devm_regmap_init_mmio(dev, base, &ipq4019_vmmcq_regmap_config); + if (IS_ERR(rmap)) + return PTR_ERR(rmap); + + cfg.dev = dev; + cfg.init_data = init_data; + cfg.of_node = dev->of_node; + cfg.regmap = rmap; + + rdev = devm_regulator_register(dev, &vmmc_regulator, &cfg); + if (IS_ERR(rdev)) { + dev_err(dev, "Failed to register regulator: %ld\n", + PTR_ERR(rdev)); + return PTR_ERR(rdev); + } + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static const struct of_device_id regulator_ipq4019_of_match[] = { + { .compatible = "qcom,vqmmc-ipq4019-regulator", }, + {}, +}; +MODULE_DEVICE_TABLE(of, regulator_ipq4019_of_match); + +static struct platform_driver ipq4019_regulator_driver = { + .probe = ipq4019_regulator_probe, + .driver = { + .name = "vqmmc-ipq4019-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = of_match_ptr(regulator_ipq4019_of_match), + }, +}; +module_platform_driver(ipq4019_regulator_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Mantas Pucka "); +MODULE_DESCRIPTION("IPQ4019 VQMMC voltage regulator"); diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c new file mode 100644 index 000000000..834d7c181 --- /dev/null +++ b/drivers/regulator/wm831x-dcdc.c @@ -0,0 +1,858 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series +// +// Copyright 2009 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define WM831X_BUCKV_MAX_SELECTOR 0x68 +#define WM831X_BUCKP_MAX_SELECTOR 0x66 + +#define WM831X_DCDC_MODE_FAST 0 +#define WM831X_DCDC_MODE_NORMAL 1 +#define WM831X_DCDC_MODE_IDLE 2 +#define WM831X_DCDC_MODE_STANDBY 3 + +#define WM831X_DCDC_MAX_NAME 9 + +/* Register offsets in control block */ +#define WM831X_DCDC_CONTROL_1 0 +#define WM831X_DCDC_CONTROL_2 1 +#define WM831X_DCDC_ON_CONFIG 2 +#define WM831X_DCDC_SLEEP_CONTROL 3 +#define WM831X_DCDC_DVS_CONTROL 4 + +/* + * Shared + */ + +struct wm831x_dcdc { + char name[WM831X_DCDC_MAX_NAME]; + char supply_name[WM831X_DCDC_MAX_NAME]; + struct regulator_desc desc; + int base; + struct wm831x *wm831x; + struct regulator_dev *regulator; + struct gpio_desc *dvs_gpiod; + int dvs_gpio_state; + int on_vsel; + int dvs_vsel; +}; + +static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) + +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; + int val; + + val = wm831x_reg_read(wm831x, reg); + if (val < 0) + return val; + + val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT; + + switch (val) { + case WM831X_DCDC_MODE_FAST: + return REGULATOR_MODE_FAST; + case WM831X_DCDC_MODE_NORMAL: + return REGULATOR_MODE_NORMAL; + case WM831X_DCDC_MODE_STANDBY: + return REGULATOR_MODE_STANDBY; + case WM831X_DCDC_MODE_IDLE: + return REGULATOR_MODE_IDLE; + default: + BUG(); + return -EINVAL; + } +} + +static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg, + unsigned int mode) +{ + int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = WM831X_DCDC_MODE_FAST; + break; + case REGULATOR_MODE_NORMAL: + val = WM831X_DCDC_MODE_NORMAL; + break; + case REGULATOR_MODE_STANDBY: + val = WM831X_DCDC_MODE_STANDBY; + break; + case REGULATOR_MODE_IDLE: + val = WM831X_DCDC_MODE_IDLE; + break; + default: + return -EINVAL; + } + + return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK, + val << WM831X_DC1_ON_MODE_SHIFT); +} + +static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; + + return wm831x_dcdc_set_mode_int(wm831x, reg, mode); +} + +static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; + + return wm831x_dcdc_set_mode_int(wm831x, reg, mode); +} + +static int wm831x_dcdc_get_status(struct regulator_dev *rdev) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + int ret; + + /* First, check for errors */ + ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); + if (ret < 0) + return ret; + + if (ret & (1 << rdev_get_id(rdev))) { + dev_dbg(wm831x->dev, "DCDC%d under voltage\n", + rdev_get_id(rdev) + 1); + return REGULATOR_STATUS_ERROR; + } + + /* DCDC1 and DCDC2 can additionally detect high voltage/current */ + if (rdev_get_id(rdev) < 2) { + if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { + dev_dbg(wm831x->dev, "DCDC%d over voltage\n", + rdev_get_id(rdev) + 1); + return REGULATOR_STATUS_ERROR; + } + + if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { + dev_dbg(wm831x->dev, "DCDC%d over current\n", + rdev_get_id(rdev) + 1); + return REGULATOR_STATUS_ERROR; + } + } + + /* Is the regulator on? */ + ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); + if (ret < 0) + return ret; + if (!(ret & (1 << rdev_get_id(rdev)))) + return REGULATOR_STATUS_OFF; + + /* TODO: When we handle hardware control modes so we can report the + * current mode. */ + return REGULATOR_STATUS_ON; +} + +static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data) +{ + struct wm831x_dcdc *dcdc = data; + + regulator_notifier_call_chain(dcdc->regulator, + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + + return IRQ_HANDLED; +} + +static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data) +{ + struct wm831x_dcdc *dcdc = data; + + regulator_notifier_call_chain(dcdc->regulator, + REGULATOR_EVENT_OVER_CURRENT, + NULL); + + return IRQ_HANDLED; +} + +/* + * BUCKV specifics + */ + +static const struct linear_range wm831x_buckv_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0), + REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500), +}; + +static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + + if (state == dcdc->dvs_gpio_state) + return 0; + + dcdc->dvs_gpio_state = state; + gpiod_set_value(dcdc->dvs_gpiod, state); + + /* Should wait for DVS state change to be asserted if we have + * a GPIO for it, for now assume the device is configured + * for the fastest possible transition. + */ + + return 0; +} + +static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev, + unsigned vsel) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; + int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL; + int ret; + + /* If this value is already set then do a GPIO update if we can */ + if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel) + return wm831x_buckv_set_dvs(rdev, 0); + + if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel) + return wm831x_buckv_set_dvs(rdev, 1); + + /* Always set the ON status to the minimum voltage */ + ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel); + if (ret < 0) + return ret; + dcdc->on_vsel = vsel; + + if (!dcdc->dvs_gpiod) + return ret; + + /* Kick the voltage transition now */ + ret = wm831x_buckv_set_dvs(rdev, 0); + if (ret < 0) + return ret; + + /* + * If this VSEL is higher than the last one we've seen then + * remember it as the DVS VSEL. This is optimised for CPUfreq + * usage where we want to get to the highest voltage very + * quickly. + */ + if (vsel > dcdc->dvs_vsel) { + ret = wm831x_set_bits(wm831x, dvs_reg, + WM831X_DC1_DVS_VSEL_MASK, + vsel); + if (ret == 0) + dcdc->dvs_vsel = vsel; + else + dev_warn(wm831x->dev, + "Failed to set DCDC DVS VSEL: %d\n", ret); + } + + return 0; +} + +static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; + int vsel; + + vsel = regulator_map_voltage_linear_range(rdev, uV, uV); + if (vsel < 0) + return vsel; + + return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel); +} + +static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + + if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state) + return dcdc->dvs_vsel; + else + return dcdc->on_vsel; +} + +/* Current limit options */ +static const unsigned int wm831x_dcdc_ilim[] = { + 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000 +}; + +static const struct regulator_ops wm831x_buckv_ops = { + .set_voltage_sel = wm831x_buckv_set_voltage_sel, + .get_voltage_sel = wm831x_buckv_get_voltage_sel, + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_suspend_voltage = wm831x_buckv_set_suspend_voltage, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_status = wm831x_dcdc_get_status, + .get_mode = wm831x_dcdc_get_mode, + .set_mode = wm831x_dcdc_set_mode, + .set_suspend_mode = wm831x_dcdc_set_suspend_mode, +}; + +/* + * Set up DVS control. We just log errors since we can still run + * (with reduced performance) if we fail. + */ +static void wm831x_buckv_dvs_init(struct platform_device *pdev, + struct wm831x_dcdc *dcdc, + struct wm831x_buckv_pdata *pdata) +{ + struct wm831x *wm831x = dcdc->wm831x; + int ret; + u16 ctrl; + + if (!pdata) + return; + + /* gpiolib won't let us read the GPIO status so pick the higher + * of the two existing voltages so we take it as platform data. + */ + dcdc->dvs_gpio_state = pdata->dvs_init_state; + + dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs", + dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); + if (IS_ERR(dcdc->dvs_gpiod)) { + dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n", + dcdc->name, PTR_ERR(dcdc->dvs_gpiod)); + return; + } + + switch (pdata->dvs_control_src) { + case 1: + ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT; + break; + case 2: + ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT; + break; + default: + dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n", + pdata->dvs_control_src, dcdc->name); + return; + } + + /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL + * to make bootstrapping a bit smoother. + */ + if (!dcdc->dvs_vsel) { + ret = wm831x_set_bits(wm831x, + dcdc->base + WM831X_DCDC_DVS_CONTROL, + WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel); + if (ret == 0) + dcdc->dvs_vsel = dcdc->on_vsel; + else + dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n", + ret); + } + + ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL, + WM831X_DC1_DVS_SRC_MASK, ctrl); + if (ret < 0) { + dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n", + dcdc->name, ret); + } +} + +static int wm831x_buckv_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id; + struct wm831x_dcdc *dcdc; + struct resource *res; + int ret, irq; + + if (pdata && pdata->wm831x_num) + id = (pdata->wm831x_num * 10) + 1; + else + id = 0; + id = pdev->id - id; + + dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); + + dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), + GFP_KERNEL); + if (!dcdc) + return -ENOMEM; + + dcdc->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + dcdc->base = res->start; + + snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); + dcdc->desc.name = dcdc->name; + + snprintf(dcdc->supply_name, sizeof(dcdc->supply_name), + "DC%dVDD", id + 1); + dcdc->desc.supply_name = dcdc->supply_name; + + dcdc->desc.id = id; + dcdc->desc.type = REGULATOR_VOLTAGE; + dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1; + dcdc->desc.linear_ranges = wm831x_buckv_ranges; + dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges); + dcdc->desc.ops = &wm831x_buckv_ops; + dcdc->desc.owner = THIS_MODULE; + dcdc->desc.enable_reg = WM831X_DCDC_ENABLE; + dcdc->desc.enable_mask = 1 << id; + dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2; + dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK; + dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim); + dcdc->desc.curr_table = wm831x_dcdc_ilim; + + ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); + if (ret < 0) { + dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret); + goto err; + } + dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK; + + ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL); + if (ret < 0) { + dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret); + goto err; + } + dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK; + + if (pdata && pdata->dcdc[id]) + wm831x_buckv_dvs_init(pdev, dcdc, + pdata->dcdc[id]->driver_data); + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->dcdc[id]; + config.driver_data = dcdc; + config.regmap = wm831x->regmap; + + dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc, + &config); + if (IS_ERR(dcdc->regulator)) { + ret = PTR_ERR(dcdc->regulator); + dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", + id + 1, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_dcdc_uv_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + dcdc->name, dcdc); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", + irq, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_dcdc_oc_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + dcdc->name, dcdc); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n", + irq, ret); + goto err; + } + + platform_set_drvdata(pdev, dcdc); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_buckv_driver = { + .probe = wm831x_buckv_probe, + .driver = { + .name = "wm831x-buckv", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +/* + * BUCKP specifics + */ + +static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; + int sel; + + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel); +} + +static const struct regulator_ops wm831x_buckp_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_suspend_voltage = wm831x_buckp_set_suspend_voltage, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_status = wm831x_dcdc_get_status, + .get_mode = wm831x_dcdc_get_mode, + .set_mode = wm831x_dcdc_set_mode, + .set_suspend_mode = wm831x_dcdc_set_suspend_mode, +}; + +static int wm831x_buckp_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id; + struct wm831x_dcdc *dcdc; + struct resource *res; + int ret, irq; + + if (pdata && pdata->wm831x_num) + id = (pdata->wm831x_num * 10) + 1; + else + id = 0; + id = pdev->id - id; + + dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); + + dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), + GFP_KERNEL); + if (!dcdc) + return -ENOMEM; + + dcdc->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + dcdc->base = res->start; + + snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); + dcdc->desc.name = dcdc->name; + + snprintf(dcdc->supply_name, sizeof(dcdc->supply_name), + "DC%dVDD", id + 1); + dcdc->desc.supply_name = dcdc->supply_name; + + dcdc->desc.id = id; + dcdc->desc.type = REGULATOR_VOLTAGE; + dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1; + dcdc->desc.ops = &wm831x_buckp_ops; + dcdc->desc.owner = THIS_MODULE; + dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; + dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK; + dcdc->desc.enable_reg = WM831X_DCDC_ENABLE; + dcdc->desc.enable_mask = 1 << id; + dcdc->desc.min_uV = 850000; + dcdc->desc.uV_step = 25000; + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->dcdc[id]; + config.driver_data = dcdc; + config.regmap = wm831x->regmap; + + dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc, + &config); + if (IS_ERR(dcdc->regulator)) { + ret = PTR_ERR(dcdc->regulator); + dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", + id + 1, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_dcdc_uv_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + dcdc->name, dcdc); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", + irq, ret); + goto err; + } + + platform_set_drvdata(pdev, dcdc); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_buckp_driver = { + .probe = wm831x_buckp_probe, + .driver = { + .name = "wm831x-buckp", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +/* + * DCDC boost convertors + */ + +static int wm831x_boostp_get_status(struct regulator_dev *rdev) +{ + struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); + struct wm831x *wm831x = dcdc->wm831x; + int ret; + + /* First, check for errors */ + ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); + if (ret < 0) + return ret; + + if (ret & (1 << rdev_get_id(rdev))) { + dev_dbg(wm831x->dev, "DCDC%d under voltage\n", + rdev_get_id(rdev) + 1); + return REGULATOR_STATUS_ERROR; + } + + /* Is the regulator on? */ + ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); + if (ret < 0) + return ret; + if (ret & (1 << rdev_get_id(rdev))) + return REGULATOR_STATUS_ON; + else + return REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops wm831x_boostp_ops = { + .get_status = wm831x_boostp_get_status, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static int wm831x_boostp_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id = pdev->id % ARRAY_SIZE(pdata->dcdc); + struct wm831x_dcdc *dcdc; + struct resource *res; + int ret, irq; + + dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); + + if (pdata == NULL || pdata->dcdc[id] == NULL) + return -ENODEV; + + dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL); + if (!dcdc) + return -ENOMEM; + + dcdc->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + return -EINVAL; + } + dcdc->base = res->start; + + snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); + dcdc->desc.name = dcdc->name; + dcdc->desc.id = id; + dcdc->desc.type = REGULATOR_VOLTAGE; + dcdc->desc.ops = &wm831x_boostp_ops; + dcdc->desc.owner = THIS_MODULE; + dcdc->desc.enable_reg = WM831X_DCDC_ENABLE; + dcdc->desc.enable_mask = 1 << id; + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->dcdc[id]; + config.driver_data = dcdc; + config.regmap = wm831x->regmap; + + dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc, + &config); + if (IS_ERR(dcdc->regulator)) { + ret = PTR_ERR(dcdc->regulator); + dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", + id + 1, ret); + return ret; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_dcdc_uv_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + dcdc->name, + dcdc); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", + irq, ret); + return ret; + } + + platform_set_drvdata(pdev, dcdc); + + return 0; +} + +static struct platform_driver wm831x_boostp_driver = { + .probe = wm831x_boostp_probe, + .driver = { + .name = "wm831x-boostp", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +/* + * External Power Enable + * + * These aren't actually DCDCs but look like them in hardware so share + * code. + */ + +#define WM831X_EPE_BASE 6 + +static const struct regulator_ops wm831x_epe_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_status = wm831x_dcdc_get_status, +}; + +static int wm831x_epe_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id = pdev->id % ARRAY_SIZE(pdata->epe); + struct wm831x_dcdc *dcdc; + int ret; + + dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1); + + dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL); + if (!dcdc) + return -ENOMEM; + + dcdc->wm831x = wm831x; + + /* For current parts this is correct; probably need to revisit + * in future. + */ + snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1); + dcdc->desc.name = dcdc->name; + dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */ + dcdc->desc.ops = &wm831x_epe_ops; + dcdc->desc.type = REGULATOR_VOLTAGE; + dcdc->desc.owner = THIS_MODULE; + dcdc->desc.enable_reg = WM831X_DCDC_ENABLE; + dcdc->desc.enable_mask = 1 << dcdc->desc.id; + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->epe[id]; + config.driver_data = dcdc; + config.regmap = wm831x->regmap; + + dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc, + &config); + if (IS_ERR(dcdc->regulator)) { + ret = PTR_ERR(dcdc->regulator); + dev_err(wm831x->dev, "Failed to register EPE%d: %d\n", + id + 1, ret); + goto err; + } + + platform_set_drvdata(pdev, dcdc); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_epe_driver = { + .probe = wm831x_epe_probe, + .driver = { + .name = "wm831x-epe", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static struct platform_driver * const drivers[] = { + &wm831x_buckv_driver, + &wm831x_buckp_driver, + &wm831x_boostp_driver, + &wm831x_epe_driver, +}; + +static int __init wm831x_dcdc_init(void) +{ + return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); +} +subsys_initcall(wm831x_dcdc_init); + +static void __exit wm831x_dcdc_exit(void) +{ + platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); +} +module_exit(wm831x_dcdc_exit); + +/* Module information */ +MODULE_AUTHOR("Mark Brown"); +MODULE_DESCRIPTION("WM831x DC-DC convertor driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm831x-buckv"); +MODULE_ALIAS("platform:wm831x-buckp"); +MODULE_ALIAS("platform:wm831x-boostp"); +MODULE_ALIAS("platform:wm831x-epe"); diff --git a/drivers/regulator/wm831x-isink.c b/drivers/regulator/wm831x-isink.c new file mode 100644 index 000000000..b46e2cde5 --- /dev/null +++ b/drivers/regulator/wm831x-isink.c @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// wm831x-isink.c -- Current sink driver for the WM831x series +// +// Copyright 2009 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define WM831X_ISINK_MAX_NAME 7 + +struct wm831x_isink { + char name[WM831X_ISINK_MAX_NAME]; + struct regulator_desc desc; + int reg; + struct wm831x *wm831x; + struct regulator_dev *regulator; +}; + +static int wm831x_isink_enable(struct regulator_dev *rdev) +{ + struct wm831x_isink *isink = rdev_get_drvdata(rdev); + struct wm831x *wm831x = isink->wm831x; + int ret; + + /* We have a two stage enable: first start the ISINK... */ + ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, + WM831X_CS1_ENA); + if (ret != 0) + return ret; + + /* ...then enable drive */ + ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, + WM831X_CS1_DRIVE); + if (ret != 0) + wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0); + + return ret; + +} + +static int wm831x_isink_disable(struct regulator_dev *rdev) +{ + struct wm831x_isink *isink = rdev_get_drvdata(rdev); + struct wm831x *wm831x = isink->wm831x; + int ret; + + ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, 0); + if (ret < 0) + return ret; + + return wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0); + +} + +static int wm831x_isink_is_enabled(struct regulator_dev *rdev) +{ + struct wm831x_isink *isink = rdev_get_drvdata(rdev); + struct wm831x *wm831x = isink->wm831x; + int ret; + + ret = wm831x_reg_read(wm831x, isink->reg); + if (ret < 0) + return ret; + + if ((ret & (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) == + (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) + return 1; + else + return 0; +} + +static const struct regulator_ops wm831x_isink_ops = { + .is_enabled = wm831x_isink_is_enabled, + .enable = wm831x_isink_enable, + .disable = wm831x_isink_disable, + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, +}; + +static irqreturn_t wm831x_isink_irq(int irq, void *data) +{ + struct wm831x_isink *isink = data; + + regulator_notifier_call_chain(isink->regulator, + REGULATOR_EVENT_OVER_CURRENT, + NULL); + + return IRQ_HANDLED; +} + + +static int wm831x_isink_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct wm831x_isink *isink; + int id = pdev->id % ARRAY_SIZE(pdata->isink); + struct regulator_config config = { }; + struct resource *res; + int ret, irq; + + dev_dbg(&pdev->dev, "Probing ISINK%d\n", id + 1); + + if (pdata == NULL || pdata->isink[id] == NULL) + return -ENODEV; + + isink = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_isink), + GFP_KERNEL); + if (!isink) + return -ENOMEM; + + isink->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + isink->reg = res->start; + + /* For current parts this is correct; probably need to revisit + * in future. + */ + snprintf(isink->name, sizeof(isink->name), "ISINK%d", id + 1); + isink->desc.name = isink->name; + isink->desc.id = id; + isink->desc.ops = &wm831x_isink_ops; + isink->desc.type = REGULATOR_CURRENT; + isink->desc.owner = THIS_MODULE; + isink->desc.curr_table = wm831x_isinkv_values; + isink->desc.n_current_limits = ARRAY_SIZE(wm831x_isinkv_values); + isink->desc.csel_reg = isink->reg; + isink->desc.csel_mask = WM831X_CS1_ISEL_MASK; + + config.dev = pdev->dev.parent; + config.init_data = pdata->isink[id]; + config.driver_data = isink; + config.regmap = wm831x->regmap; + + isink->regulator = devm_regulator_register(&pdev->dev, &isink->desc, + &config); + if (IS_ERR(isink->regulator)) { + ret = PTR_ERR(isink->regulator); + dev_err(wm831x->dev, "Failed to register ISINK%d: %d\n", + id + 1, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0)); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_isink_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + isink->name, + isink); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request ISINK IRQ %d: %d\n", + irq, ret); + goto err; + } + + platform_set_drvdata(pdev, isink); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_isink_driver = { + .probe = wm831x_isink_probe, + .driver = { + .name = "wm831x-isink", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init wm831x_isink_init(void) +{ + int ret; + ret = platform_driver_register(&wm831x_isink_driver); + if (ret != 0) + pr_err("Failed to register WM831x ISINK driver: %d\n", ret); + + return ret; +} +subsys_initcall(wm831x_isink_init); + +static void __exit wm831x_isink_exit(void) +{ + platform_driver_unregister(&wm831x_isink_driver); +} +module_exit(wm831x_isink_exit); + +/* Module information */ +MODULE_AUTHOR("Mark Brown"); +MODULE_DESCRIPTION("WM831x current sink driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm831x-isink"); diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c new file mode 100644 index 000000000..76b89b1cd --- /dev/null +++ b/drivers/regulator/wm831x-ldo.c @@ -0,0 +1,678 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// wm831x-ldo.c -- LDO driver for the WM831x series +// +// Copyright 2009 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define WM831X_LDO_MAX_NAME 9 + +#define WM831X_LDO_CONTROL 0 +#define WM831X_LDO_ON_CONTROL 1 +#define WM831X_LDO_SLEEP_CONTROL 2 + +#define WM831X_ALIVE_LDO_ON_CONTROL 0 +#define WM831X_ALIVE_LDO_SLEEP_CONTROL 1 + +struct wm831x_ldo { + char name[WM831X_LDO_MAX_NAME]; + char supply_name[WM831X_LDO_MAX_NAME]; + struct regulator_desc desc; + int base; + struct wm831x *wm831x; + struct regulator_dev *regulator; +}; + +/* + * Shared + */ + +static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data) +{ + struct wm831x_ldo *ldo = data; + + regulator_notifier_call_chain(ldo->regulator, + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + + return IRQ_HANDLED; +} + +/* + * General purpose LDOs + */ + +static const struct linear_range wm831x_gp_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 14, 50000), + REGULATOR_LINEAR_RANGE(1700000, 15, 31, 100000), +}; + +static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int sel, reg = ldo->base + WM831X_LDO_SLEEP_CONTROL; + + sel = regulator_map_voltage_linear_range(rdev, uV, uV); + if (sel < 0) + return sel; + + return wm831x_set_bits(wm831x, reg, WM831X_LDO1_ON_VSEL_MASK, sel); +} + +static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; + int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; + int ret; + + ret = wm831x_reg_read(wm831x, on_reg); + if (ret < 0) + return ret; + + if (!(ret & WM831X_LDO1_ON_MODE)) + return REGULATOR_MODE_NORMAL; + + ret = wm831x_reg_read(wm831x, ctrl_reg); + if (ret < 0) + return ret; + + if (ret & WM831X_LDO1_LP_MODE) + return REGULATOR_MODE_STANDBY; + else + return REGULATOR_MODE_IDLE; +} + +static int wm831x_gp_ldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; + int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; + int ret; + + + switch (mode) { + case REGULATOR_MODE_NORMAL: + ret = wm831x_set_bits(wm831x, on_reg, + WM831X_LDO1_ON_MODE, 0); + if (ret < 0) + return ret; + break; + + case REGULATOR_MODE_IDLE: + ret = wm831x_set_bits(wm831x, ctrl_reg, + WM831X_LDO1_LP_MODE, 0); + if (ret < 0) + return ret; + + ret = wm831x_set_bits(wm831x, on_reg, + WM831X_LDO1_ON_MODE, + WM831X_LDO1_ON_MODE); + if (ret < 0) + return ret; + break; + + case REGULATOR_MODE_STANDBY: + ret = wm831x_set_bits(wm831x, ctrl_reg, + WM831X_LDO1_LP_MODE, + WM831X_LDO1_LP_MODE); + if (ret < 0) + return ret; + + ret = wm831x_set_bits(wm831x, on_reg, + WM831X_LDO1_ON_MODE, + WM831X_LDO1_ON_MODE); + if (ret < 0) + return ret; + break; + + default: + return -EINVAL; + } + + return 0; +} + +static int wm831x_gp_ldo_get_status(struct regulator_dev *rdev) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int mask = 1 << rdev_get_id(rdev); + int ret; + + /* Is the regulator on? */ + ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); + if (ret < 0) + return ret; + if (!(ret & mask)) + return REGULATOR_STATUS_OFF; + + /* Is it reporting under voltage? */ + ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS); + if (ret < 0) + return ret; + if (ret & mask) + return REGULATOR_STATUS_ERROR; + + ret = wm831x_gp_ldo_get_mode(rdev); + if (ret < 0) + return ret; + else + return regulator_mode_to_status(ret); +} + +static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev, + int input_uV, + int output_uV, int load_uA) +{ + if (load_uA < 20000) + return REGULATOR_MODE_STANDBY; + if (load_uA < 50000) + return REGULATOR_MODE_IDLE; + return REGULATOR_MODE_NORMAL; +} + + +static const struct regulator_ops wm831x_gp_ldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_suspend_voltage = wm831x_gp_ldo_set_suspend_voltage, + .get_mode = wm831x_gp_ldo_get_mode, + .set_mode = wm831x_gp_ldo_set_mode, + .get_status = wm831x_gp_ldo_get_status, + .get_optimum_mode = wm831x_gp_ldo_get_optimum_mode, + .get_bypass = regulator_get_bypass_regmap, + .set_bypass = regulator_set_bypass_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static int wm831x_gp_ldo_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id; + struct wm831x_ldo *ldo; + struct resource *res; + int ret, irq; + + if (pdata && pdata->wm831x_num) + id = (pdata->wm831x_num * 10) + 1; + else + id = 0; + id = pdev->id - id; + + dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + ldo->base = res->start; + + snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); + ldo->desc.name = ldo->name; + + snprintf(ldo->supply_name, sizeof(ldo->supply_name), + "LDO%dVDD", id + 1); + ldo->desc.supply_name = ldo->supply_name; + + ldo->desc.id = id; + ldo->desc.type = REGULATOR_VOLTAGE; + ldo->desc.n_voltages = 32; + ldo->desc.ops = &wm831x_gp_ldo_ops; + ldo->desc.owner = THIS_MODULE; + ldo->desc.vsel_reg = ldo->base + WM831X_LDO_ON_CONTROL; + ldo->desc.vsel_mask = WM831X_LDO1_ON_VSEL_MASK; + ldo->desc.enable_reg = WM831X_LDO_ENABLE; + ldo->desc.enable_mask = 1 << id; + ldo->desc.bypass_reg = ldo->base; + ldo->desc.bypass_mask = WM831X_LDO1_SWI; + ldo->desc.linear_ranges = wm831x_gp_ldo_ranges; + ldo->desc.n_linear_ranges = ARRAY_SIZE(wm831x_gp_ldo_ranges); + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->ldo[id]; + config.driver_data = ldo; + config.regmap = wm831x->regmap; + + ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc, + &config); + if (IS_ERR(ldo->regulator)) { + ret = PTR_ERR(ldo->regulator); + dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", + id + 1, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_ldo_uv_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + ldo->name, + ldo); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", + irq, ret); + goto err; + } + + platform_set_drvdata(pdev, ldo); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_gp_ldo_driver = { + .probe = wm831x_gp_ldo_probe, + .driver = { + .name = "wm831x-ldo", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +/* + * Analogue LDOs + */ + +static const struct linear_range wm831x_aldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1000000, 0, 12, 50000), + REGULATOR_LINEAR_RANGE(1700000, 13, 31, 100000), +}; + +static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int sel, reg = ldo->base + WM831X_LDO_SLEEP_CONTROL; + + sel = regulator_map_voltage_linear_range(rdev, uV, uV); + if (sel < 0) + return sel; + + return wm831x_set_bits(wm831x, reg, WM831X_LDO7_ON_VSEL_MASK, sel); +} + +static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; + int ret; + + ret = wm831x_reg_read(wm831x, on_reg); + if (ret < 0) + return 0; + + if (ret & WM831X_LDO7_ON_MODE) + return REGULATOR_MODE_IDLE; + else + return REGULATOR_MODE_NORMAL; +} + +static int wm831x_aldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; + int ret; + + + switch (mode) { + case REGULATOR_MODE_NORMAL: + ret = wm831x_set_bits(wm831x, on_reg, WM831X_LDO7_ON_MODE, 0); + if (ret < 0) + return ret; + break; + + case REGULATOR_MODE_IDLE: + ret = wm831x_set_bits(wm831x, on_reg, WM831X_LDO7_ON_MODE, + WM831X_LDO7_ON_MODE); + if (ret < 0) + return ret; + break; + + default: + return -EINVAL; + } + + return 0; +} + +static int wm831x_aldo_get_status(struct regulator_dev *rdev) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int mask = 1 << rdev_get_id(rdev); + int ret; + + /* Is the regulator on? */ + ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); + if (ret < 0) + return ret; + if (!(ret & mask)) + return REGULATOR_STATUS_OFF; + + /* Is it reporting under voltage? */ + ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS); + if (ret < 0) + return ret; + if (ret & mask) + return REGULATOR_STATUS_ERROR; + + ret = wm831x_aldo_get_mode(rdev); + if (ret < 0) + return ret; + else + return regulator_mode_to_status(ret); +} + +static const struct regulator_ops wm831x_aldo_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_suspend_voltage = wm831x_aldo_set_suspend_voltage, + .get_mode = wm831x_aldo_get_mode, + .set_mode = wm831x_aldo_set_mode, + .get_status = wm831x_aldo_get_status, + .set_bypass = regulator_set_bypass_regmap, + .get_bypass = regulator_get_bypass_regmap, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static int wm831x_aldo_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id; + struct wm831x_ldo *ldo; + struct resource *res; + int ret, irq; + + if (pdata && pdata->wm831x_num) + id = (pdata->wm831x_num * 10) + 1; + else + id = 0; + id = pdev->id - id; + + dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + ldo->base = res->start; + + snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); + ldo->desc.name = ldo->name; + + snprintf(ldo->supply_name, sizeof(ldo->supply_name), + "LDO%dVDD", id + 1); + ldo->desc.supply_name = ldo->supply_name; + + ldo->desc.id = id; + ldo->desc.type = REGULATOR_VOLTAGE; + ldo->desc.n_voltages = 32; + ldo->desc.linear_ranges = wm831x_aldo_ranges; + ldo->desc.n_linear_ranges = ARRAY_SIZE(wm831x_aldo_ranges); + ldo->desc.ops = &wm831x_aldo_ops; + ldo->desc.owner = THIS_MODULE; + ldo->desc.vsel_reg = ldo->base + WM831X_LDO_ON_CONTROL; + ldo->desc.vsel_mask = WM831X_LDO7_ON_VSEL_MASK; + ldo->desc.enable_reg = WM831X_LDO_ENABLE; + ldo->desc.enable_mask = 1 << id; + ldo->desc.bypass_reg = ldo->base; + ldo->desc.bypass_mask = WM831X_LDO7_SWI; + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->ldo[id]; + config.driver_data = ldo; + config.regmap = wm831x->regmap; + + ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc, + &config); + if (IS_ERR(ldo->regulator)) { + ret = PTR_ERR(ldo->regulator); + dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", + id + 1, ret); + goto err; + } + + irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + wm831x_ldo_uv_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + ldo->name, ldo); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", + irq, ret); + goto err; + } + + platform_set_drvdata(pdev, ldo); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_aldo_driver = { + .probe = wm831x_aldo_probe, + .driver = { + .name = "wm831x-aldo", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +/* + * Alive LDO + */ + +#define WM831X_ALIVE_LDO_MAX_SELECTOR 0xf + +static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev, + int uV) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int sel, reg = ldo->base + WM831X_ALIVE_LDO_SLEEP_CONTROL; + + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, sel); +} + +static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev) +{ + struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); + struct wm831x *wm831x = ldo->wm831x; + int mask = 1 << rdev_get_id(rdev); + int ret; + + /* Is the regulator on? */ + ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); + if (ret < 0) + return ret; + if (ret & mask) + return REGULATOR_STATUS_ON; + else + return REGULATOR_STATUS_OFF; +} + +static const struct regulator_ops wm831x_alive_ldo_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_suspend_voltage = wm831x_alive_ldo_set_suspend_voltage, + .get_status = wm831x_alive_ldo_get_status, + + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + +static int wm831x_alive_ldo_probe(struct platform_device *pdev) +{ + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); + struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev); + struct regulator_config config = { }; + int id; + struct wm831x_ldo *ldo; + struct resource *res; + int ret; + + if (pdata && pdata->wm831x_num) + id = (pdata->wm831x_num * 10) + 1; + else + id = 0; + id = pdev->id - id; + + + dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->wm831x = wm831x; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No REG resource\n"); + ret = -EINVAL; + goto err; + } + ldo->base = res->start; + + snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); + ldo->desc.name = ldo->name; + + snprintf(ldo->supply_name, sizeof(ldo->supply_name), + "LDO%dVDD", id + 1); + ldo->desc.supply_name = ldo->supply_name; + + ldo->desc.id = id; + ldo->desc.type = REGULATOR_VOLTAGE; + ldo->desc.n_voltages = WM831X_ALIVE_LDO_MAX_SELECTOR + 1; + ldo->desc.ops = &wm831x_alive_ldo_ops; + ldo->desc.owner = THIS_MODULE; + ldo->desc.vsel_reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL; + ldo->desc.vsel_mask = WM831X_LDO11_ON_VSEL_MASK; + ldo->desc.enable_reg = WM831X_LDO_ENABLE; + ldo->desc.enable_mask = 1 << id; + ldo->desc.min_uV = 800000; + ldo->desc.uV_step = 50000; + ldo->desc.enable_time = 1000; + + config.dev = pdev->dev.parent; + if (pdata) + config.init_data = pdata->ldo[id]; + config.driver_data = ldo; + config.regmap = wm831x->regmap; + + ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc, + &config); + if (IS_ERR(ldo->regulator)) { + ret = PTR_ERR(ldo->regulator); + dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", + id + 1, ret); + goto err; + } + + platform_set_drvdata(pdev, ldo); + + return 0; + +err: + return ret; +} + +static struct platform_driver wm831x_alive_ldo_driver = { + .probe = wm831x_alive_ldo_probe, + .driver = { + .name = "wm831x-alive-ldo", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static struct platform_driver * const drivers[] = { + &wm831x_gp_ldo_driver, + &wm831x_aldo_driver, + &wm831x_alive_ldo_driver, +}; + +static int __init wm831x_ldo_init(void) +{ + return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); +} +subsys_initcall(wm831x_ldo_init); + +static void __exit wm831x_ldo_exit(void) +{ + platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); +} +module_exit(wm831x_ldo_exit); + +/* Module information */ +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("WM831x LDO driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm831x-ldo"); +MODULE_ALIAS("platform:wm831x-aldo"); +MODULE_ALIAS("platform:wm831x-aliveldo"); diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c new file mode 100644 index 000000000..d09864bae --- /dev/null +++ b/drivers/regulator/wm8350-regulator.c @@ -0,0 +1,1330 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC +// +// Copyright 2007, 2008 Wolfson Microelectronics PLC. +// +// Author: Liam Girdwood +// linux@wolfsonmicro.com + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Maximum value possible for VSEL */ +#define WM8350_DCDC_MAX_VSEL 0x66 + +/* Microamps */ +static const unsigned int isink_cur[] = { + 4, + 5, + 6, + 7, + 8, + 10, + 11, + 14, + 16, + 19, + 23, + 27, + 32, + 39, + 46, + 54, + 65, + 77, + 92, + 109, + 130, + 154, + 183, + 218, + 259, + 308, + 367, + 436, + 518, + 616, + 733, + 872, + 1037, + 1233, + 1466, + 1744, + 2073, + 2466, + 2933, + 3487, + 4147, + 4932, + 5865, + 6975, + 8294, + 9864, + 11730, + 13949, + 16589, + 19728, + 23460, + 27899, + 33178, + 39455, + 46920, + 55798, + 66355, + 78910, + 93840, + 111596, + 132710, + 157820, + 187681, + 223191 +}; + +/* turn on ISINK followed by DCDC */ +static int wm8350_isink_enable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int isink = rdev_get_id(rdev); + + switch (isink) { + case WM8350_ISINK_A: + switch (wm8350->pmic.isink_A_dcdc) { + case WM8350_DCDC_2: + case WM8350_DCDC_5: + wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7, + WM8350_CS1_ENA); + wm8350_set_bits(wm8350, WM8350_CSA_FLASH_CONTROL, + WM8350_CS1_DRIVE); + wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, + 1 << (wm8350->pmic.isink_A_dcdc - + WM8350_DCDC_1)); + break; + default: + return -EINVAL; + } + break; + case WM8350_ISINK_B: + switch (wm8350->pmic.isink_B_dcdc) { + case WM8350_DCDC_2: + case WM8350_DCDC_5: + wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7, + WM8350_CS2_ENA); + wm8350_set_bits(wm8350, WM8350_CSB_FLASH_CONTROL, + WM8350_CS2_DRIVE); + wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, + 1 << (wm8350->pmic.isink_B_dcdc - + WM8350_DCDC_1)); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return 0; +} + +static int wm8350_isink_disable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int isink = rdev_get_id(rdev); + + switch (isink) { + case WM8350_ISINK_A: + switch (wm8350->pmic.isink_A_dcdc) { + case WM8350_DCDC_2: + case WM8350_DCDC_5: + wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, + 1 << (wm8350->pmic.isink_A_dcdc - + WM8350_DCDC_1)); + wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7, + WM8350_CS1_ENA); + break; + default: + return -EINVAL; + } + break; + case WM8350_ISINK_B: + switch (wm8350->pmic.isink_B_dcdc) { + case WM8350_DCDC_2: + case WM8350_DCDC_5: + wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, + 1 << (wm8350->pmic.isink_B_dcdc - + WM8350_DCDC_1)); + wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7, + WM8350_CS2_ENA); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return 0; +} + +static int wm8350_isink_is_enabled(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int isink = rdev_get_id(rdev); + + switch (isink) { + case WM8350_ISINK_A: + return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) & + 0x8000; + case WM8350_ISINK_B: + return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) & + 0x8000; + } + return -EINVAL; +} + +static int wm8350_isink_enable_time(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int isink = rdev_get_id(rdev); + int reg; + + switch (isink) { + case WM8350_ISINK_A: + reg = wm8350_reg_read(wm8350, WM8350_CSA_FLASH_CONTROL); + break; + case WM8350_ISINK_B: + reg = wm8350_reg_read(wm8350, WM8350_CSB_FLASH_CONTROL); + break; + default: + return -EINVAL; + } + + if (reg & WM8350_CS1_FLASH_MODE) { + switch (reg & WM8350_CS1_ON_RAMP_MASK) { + case 0: + return 0; + case 1: + return 1950; + case 2: + return 3910; + case 3: + return 7800; + } + } else { + switch (reg & WM8350_CS1_ON_RAMP_MASK) { + case 0: + return 0; + case 1: + return 250000; + case 2: + return 500000; + case 3: + return 1000000; + } + } + + return -EINVAL; +} + + +int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode, + u16 trigger, u16 duration, u16 on_ramp, u16 off_ramp, + u16 drive) +{ + switch (isink) { + case WM8350_ISINK_A: + wm8350_reg_write(wm8350, WM8350_CSA_FLASH_CONTROL, + (mode ? WM8350_CS1_FLASH_MODE : 0) | + (trigger ? WM8350_CS1_TRIGSRC : 0) | + duration | on_ramp | off_ramp | drive); + break; + case WM8350_ISINK_B: + wm8350_reg_write(wm8350, WM8350_CSB_FLASH_CONTROL, + (mode ? WM8350_CS2_FLASH_MODE : 0) | + (trigger ? WM8350_CS2_TRIGSRC : 0) | + duration | on_ramp | off_ramp | drive); + break; + default: + return -EINVAL; + } + return 0; +} +EXPORT_SYMBOL_GPL(wm8350_isink_set_flash); + +static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int sel, volt_reg, dcdc = rdev_get_id(rdev); + u16 val; + + dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, uV / 1000); + + switch (dcdc) { + case WM8350_DCDC_1: + volt_reg = WM8350_DCDC1_LOW_POWER; + break; + case WM8350_DCDC_3: + volt_reg = WM8350_DCDC3_LOW_POWER; + break; + case WM8350_DCDC_4: + volt_reg = WM8350_DCDC4_LOW_POWER; + break; + case WM8350_DCDC_6: + volt_reg = WM8350_DCDC6_LOW_POWER; + break; + case WM8350_DCDC_2: + case WM8350_DCDC_5: + default: + return -EINVAL; + } + + sel = regulator_map_voltage_linear(rdev, uV, uV); + if (sel < 0) + return sel; + + /* all DCDCs have same mV bits */ + val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK; + wm8350_reg_write(wm8350, volt_reg, val | sel); + return 0; +} + +static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 val; + + switch (dcdc) { + case WM8350_DCDC_1: + val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER) + & ~WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, + val | wm8350->pmic.dcdc1_hib_mode); + break; + case WM8350_DCDC_3: + val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER) + & ~WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, + val | wm8350->pmic.dcdc3_hib_mode); + break; + case WM8350_DCDC_4: + val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER) + & ~WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, + val | wm8350->pmic.dcdc4_hib_mode); + break; + case WM8350_DCDC_6: + val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER) + & ~WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, + val | wm8350->pmic.dcdc6_hib_mode); + break; + case WM8350_DCDC_2: + case WM8350_DCDC_5: + default: + return -EINVAL; + } + + return 0; +} + +static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 val; + + switch (dcdc) { + case WM8350_DCDC_1: + val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER); + wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, + val | WM8350_DCDC_HIB_MODE_DIS); + break; + case WM8350_DCDC_3: + val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER); + wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, + val | WM8350_DCDC_HIB_MODE_DIS); + break; + case WM8350_DCDC_4: + val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER); + wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, + val | WM8350_DCDC_HIB_MODE_DIS); + break; + case WM8350_DCDC_6: + val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER); + wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, + val | WM8350_DCDC_HIB_MODE_DIS); + break; + case WM8350_DCDC_2: + case WM8350_DCDC_5: + default: + return -EINVAL; + } + + return 0; +} + +static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 val; + + switch (dcdc) { + case WM8350_DCDC_2: + val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) + & ~WM8350_DC2_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | + (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT)); + break; + case WM8350_DCDC_5: + val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) + & ~WM8350_DC5_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | + (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT)); + break; + default: + return -EINVAL; + } + return 0; +} + +static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 val; + + switch (dcdc) { + case WM8350_DCDC_2: + val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) + & ~WM8350_DC2_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | + (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT)); + break; + case WM8350_DCDC_5: + val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) + & ~WM8350_DC5_HIB_MODE_MASK; + wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | + (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT)); + break; + default: + return -EINVAL; + } + return 0; +} + +static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 *hib_mode; + + switch (dcdc) { + case WM8350_DCDC_1: + hib_mode = &wm8350->pmic.dcdc1_hib_mode; + break; + case WM8350_DCDC_3: + hib_mode = &wm8350->pmic.dcdc3_hib_mode; + break; + case WM8350_DCDC_4: + hib_mode = &wm8350->pmic.dcdc4_hib_mode; + break; + case WM8350_DCDC_6: + hib_mode = &wm8350->pmic.dcdc6_hib_mode; + break; + case WM8350_DCDC_2: + case WM8350_DCDC_5: + default: + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_NORMAL: + *hib_mode = WM8350_DCDC_HIB_MODE_IMAGE; + break; + case REGULATOR_MODE_IDLE: + *hib_mode = WM8350_DCDC_HIB_MODE_STANDBY; + break; + case REGULATOR_MODE_STANDBY: + *hib_mode = WM8350_DCDC_HIB_MODE_LDO_IM; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct linear_range wm8350_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 15, 50000), + REGULATOR_LINEAR_RANGE(1800000, 16, 31, 100000), +}; + +static int wm8350_ldo_set_suspend_voltage(struct regulator_dev *rdev, int uV) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int sel, volt_reg, ldo = rdev_get_id(rdev); + u16 val; + + dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, ldo, uV / 1000); + + switch (ldo) { + case WM8350_LDO_1: + volt_reg = WM8350_LDO1_LOW_POWER; + break; + case WM8350_LDO_2: + volt_reg = WM8350_LDO2_LOW_POWER; + break; + case WM8350_LDO_3: + volt_reg = WM8350_LDO3_LOW_POWER; + break; + case WM8350_LDO_4: + volt_reg = WM8350_LDO4_LOW_POWER; + break; + default: + return -EINVAL; + } + + sel = regulator_map_voltage_linear_range(rdev, uV, uV); + if (sel < 0) + return sel; + + /* all LDOs have same mV bits */ + val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK; + wm8350_reg_write(wm8350, volt_reg, val | sel); + return 0; +} + +static int wm8350_ldo_set_suspend_enable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int volt_reg, ldo = rdev_get_id(rdev); + u16 val; + + switch (ldo) { + case WM8350_LDO_1: + volt_reg = WM8350_LDO1_LOW_POWER; + break; + case WM8350_LDO_2: + volt_reg = WM8350_LDO2_LOW_POWER; + break; + case WM8350_LDO_3: + volt_reg = WM8350_LDO3_LOW_POWER; + break; + case WM8350_LDO_4: + volt_reg = WM8350_LDO4_LOW_POWER; + break; + default: + return -EINVAL; + } + + /* all LDOs have same mV bits */ + val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK; + wm8350_reg_write(wm8350, volt_reg, val); + return 0; +} + +static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int volt_reg, ldo = rdev_get_id(rdev); + u16 val; + + switch (ldo) { + case WM8350_LDO_1: + volt_reg = WM8350_LDO1_LOW_POWER; + break; + case WM8350_LDO_2: + volt_reg = WM8350_LDO2_LOW_POWER; + break; + case WM8350_LDO_3: + volt_reg = WM8350_LDO3_LOW_POWER; + break; + case WM8350_LDO_4: + volt_reg = WM8350_LDO4_LOW_POWER; + break; + default: + return -EINVAL; + } + + /* all LDOs have same mV bits */ + val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK; + wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS); + return 0; +} + +int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start, + u16 stop, u16 fault) +{ + int slot_reg; + u16 val; + + dev_dbg(wm8350->dev, "%s %d start %d stop %d\n", + __func__, dcdc, start, stop); + + /* slot valid ? */ + if (start > 15 || stop > 15) + return -EINVAL; + + switch (dcdc) { + case WM8350_DCDC_1: + slot_reg = WM8350_DCDC1_TIMEOUTS; + break; + case WM8350_DCDC_2: + slot_reg = WM8350_DCDC2_TIMEOUTS; + break; + case WM8350_DCDC_3: + slot_reg = WM8350_DCDC3_TIMEOUTS; + break; + case WM8350_DCDC_4: + slot_reg = WM8350_DCDC4_TIMEOUTS; + break; + case WM8350_DCDC_5: + slot_reg = WM8350_DCDC5_TIMEOUTS; + break; + case WM8350_DCDC_6: + slot_reg = WM8350_DCDC6_TIMEOUTS; + break; + default: + return -EINVAL; + } + + val = wm8350_reg_read(wm8350, slot_reg) & + ~(WM8350_DC1_ENSLOT_MASK | WM8350_DC1_SDSLOT_MASK | + WM8350_DC1_ERRACT_MASK); + wm8350_reg_write(wm8350, slot_reg, + val | (start << WM8350_DC1_ENSLOT_SHIFT) | + (stop << WM8350_DC1_SDSLOT_SHIFT) | + (fault << WM8350_DC1_ERRACT_SHIFT)); + + return 0; +} +EXPORT_SYMBOL_GPL(wm8350_dcdc_set_slot); + +int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop) +{ + int slot_reg; + u16 val; + + dev_dbg(wm8350->dev, "%s %d start %d stop %d\n", + __func__, ldo, start, stop); + + /* slot valid ? */ + if (start > 15 || stop > 15) + return -EINVAL; + + switch (ldo) { + case WM8350_LDO_1: + slot_reg = WM8350_LDO1_TIMEOUTS; + break; + case WM8350_LDO_2: + slot_reg = WM8350_LDO2_TIMEOUTS; + break; + case WM8350_LDO_3: + slot_reg = WM8350_LDO3_TIMEOUTS; + break; + case WM8350_LDO_4: + slot_reg = WM8350_LDO4_TIMEOUTS; + break; + default: + return -EINVAL; + } + + val = wm8350_reg_read(wm8350, slot_reg) & ~WM8350_LDO1_SDSLOT_MASK; + wm8350_reg_write(wm8350, slot_reg, val | ((start << 10) | (stop << 6))); + return 0; +} +EXPORT_SYMBOL_GPL(wm8350_ldo_set_slot); + +int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode, + u16 ilim, u16 ramp, u16 feedback) +{ + u16 val; + + dev_dbg(wm8350->dev, "%s %d mode: %s %s\n", __func__, dcdc, + mode ? "normal" : "boost", ilim ? "low" : "normal"); + + switch (dcdc) { + case WM8350_DCDC_2: + val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) + & ~(WM8350_DC2_MODE_MASK | WM8350_DC2_ILIM_MASK | + WM8350_DC2_RMP_MASK | WM8350_DC2_FBSRC_MASK); + wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | + (mode << WM8350_DC2_MODE_SHIFT) | + (ilim << WM8350_DC2_ILIM_SHIFT) | + (ramp << WM8350_DC2_RMP_SHIFT) | + (feedback << WM8350_DC2_FBSRC_SHIFT)); + break; + case WM8350_DCDC_5: + val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) + & ~(WM8350_DC5_MODE_MASK | WM8350_DC5_ILIM_MASK | + WM8350_DC5_RMP_MASK | WM8350_DC5_FBSRC_MASK); + wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | + (mode << WM8350_DC5_MODE_SHIFT) | + (ilim << WM8350_DC5_ILIM_SHIFT) | + (ramp << WM8350_DC5_RMP_SHIFT) | + (feedback << WM8350_DC5_FBSRC_SHIFT)); + break; + default: + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode); + +static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable) +{ + int reg = 0, ret; + + switch (dcdc) { + case WM8350_DCDC_1: + reg = WM8350_DCDC1_FORCE_PWM; + break; + case WM8350_DCDC_3: + reg = WM8350_DCDC3_FORCE_PWM; + break; + case WM8350_DCDC_4: + reg = WM8350_DCDC4_FORCE_PWM; + break; + case WM8350_DCDC_6: + reg = WM8350_DCDC6_FORCE_PWM; + break; + default: + return -EINVAL; + } + + if (enable) + ret = wm8350_set_bits(wm8350, reg, + WM8350_DCDC1_FORCE_PWM_ENA); + else + ret = wm8350_clear_bits(wm8350, reg, + WM8350_DCDC1_FORCE_PWM_ENA); + return ret; +} + +static int wm8350_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 val; + + if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6) + return -EINVAL; + + if (dcdc == WM8350_DCDC_2 || dcdc == WM8350_DCDC_5) + return -EINVAL; + + val = 1 << (dcdc - WM8350_DCDC_1); + + switch (mode) { + case REGULATOR_MODE_FAST: + /* force continuous mode */ + wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val); + wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val); + force_continuous_enable(wm8350, dcdc, 1); + break; + case REGULATOR_MODE_NORMAL: + /* active / pulse skipping */ + wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val); + wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val); + force_continuous_enable(wm8350, dcdc, 0); + break; + case REGULATOR_MODE_IDLE: + /* standby mode */ + force_continuous_enable(wm8350, dcdc, 0); + wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val); + wm8350_clear_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val); + break; + case REGULATOR_MODE_STANDBY: + /* LDO mode */ + force_continuous_enable(wm8350, dcdc, 0); + wm8350_set_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val); + break; + } + + return 0; +} + +static unsigned int wm8350_dcdc_get_mode(struct regulator_dev *rdev) +{ + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + int dcdc = rdev_get_id(rdev); + u16 mask, sleep, active, force; + int mode = REGULATOR_MODE_NORMAL; + int reg; + + switch (dcdc) { + case WM8350_DCDC_1: + reg = WM8350_DCDC1_FORCE_PWM; + break; + case WM8350_DCDC_3: + reg = WM8350_DCDC3_FORCE_PWM; + break; + case WM8350_DCDC_4: + reg = WM8350_DCDC4_FORCE_PWM; + break; + case WM8350_DCDC_6: + reg = WM8350_DCDC6_FORCE_PWM; + break; + default: + return -EINVAL; + } + + mask = 1 << (dcdc - WM8350_DCDC_1); + active = wm8350_reg_read(wm8350, WM8350_DCDC_ACTIVE_OPTIONS) & mask; + force = wm8350_reg_read(wm8350, reg) & WM8350_DCDC1_FORCE_PWM_ENA; + sleep = wm8350_reg_read(wm8350, WM8350_DCDC_SLEEP_OPTIONS) & mask; + + dev_dbg(wm8350->dev, "mask %x active %x sleep %x force %x", + mask, active, sleep, force); + + if (active && !sleep) { + if (force) + mode = REGULATOR_MODE_FAST; + else + mode = REGULATOR_MODE_NORMAL; + } else if (!active && !sleep) + mode = REGULATOR_MODE_IDLE; + else if (sleep) + mode = REGULATOR_MODE_STANDBY; + + return mode; +} + +static unsigned int wm8350_ldo_get_mode(struct regulator_dev *rdev) +{ + return REGULATOR_MODE_NORMAL; +} + +struct wm8350_dcdc_efficiency { + int uA_load_min; + int uA_load_max; + unsigned int mode; +}; + +static const struct wm8350_dcdc_efficiency dcdc1_6_efficiency[] = { + {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */ + {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */ + {100000, 1000000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */ + {-1, -1, REGULATOR_MODE_NORMAL}, +}; + +static const struct wm8350_dcdc_efficiency dcdc3_4_efficiency[] = { + {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */ + {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */ + {100000, 800000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */ + {-1, -1, REGULATOR_MODE_NORMAL}, +}; + +static unsigned int get_mode(int uA, const struct wm8350_dcdc_efficiency *eff) +{ + int i = 0; + + while (eff[i].uA_load_min != -1) { + if (uA >= eff[i].uA_load_min && uA <= eff[i].uA_load_max) + return eff[i].mode; + i++; + } + return REGULATOR_MODE_NORMAL; +} + +/* Query the regulator for it's most efficient mode @ uV,uA + * WM8350 regulator efficiency is pretty similar over + * different input and output uV. + */ +static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev, + int input_uV, int output_uV, + int output_uA) +{ + int dcdc = rdev_get_id(rdev), mode; + + switch (dcdc) { + case WM8350_DCDC_1: + case WM8350_DCDC_6: + mode = get_mode(output_uA, dcdc1_6_efficiency); + break; + case WM8350_DCDC_3: + case WM8350_DCDC_4: + mode = get_mode(output_uA, dcdc3_4_efficiency); + break; + default: + mode = REGULATOR_MODE_NORMAL; + break; + } + return mode; +} + +static const struct regulator_ops wm8350_dcdc_ops = { + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_mode = wm8350_dcdc_get_mode, + .set_mode = wm8350_dcdc_set_mode, + .get_optimum_mode = wm8350_dcdc_get_optimum_mode, + .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage, + .set_suspend_enable = wm8350_dcdc_set_suspend_enable, + .set_suspend_disable = wm8350_dcdc_set_suspend_disable, + .set_suspend_mode = wm8350_dcdc_set_suspend_mode, +}; + +static const struct regulator_ops wm8350_dcdc2_5_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_suspend_enable = wm8350_dcdc25_set_suspend_enable, + .set_suspend_disable = wm8350_dcdc25_set_suspend_disable, +}; + +static const struct regulator_ops wm8350_ldo_ops = { + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .get_mode = wm8350_ldo_get_mode, + .set_suspend_voltage = wm8350_ldo_set_suspend_voltage, + .set_suspend_enable = wm8350_ldo_set_suspend_enable, + .set_suspend_disable = wm8350_ldo_set_suspend_disable, +}; + +static const struct regulator_ops wm8350_isink_ops = { + .set_current_limit = regulator_set_current_limit_regmap, + .get_current_limit = regulator_get_current_limit_regmap, + .enable = wm8350_isink_enable, + .disable = wm8350_isink_disable, + .is_enabled = wm8350_isink_is_enabled, + .enable_time = wm8350_isink_enable_time, +}; + +static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { + { + .name = "DCDC1", + .id = WM8350_DCDC_1, + .ops = &wm8350_dcdc_ops, + .irq = WM8350_IRQ_UV_DC1, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_DCDC_MAX_VSEL + 1, + .min_uV = 850000, + .uV_step = 25000, + .vsel_reg = WM8350_DCDC1_CONTROL, + .vsel_mask = WM8350_DC1_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC1_ENA, + .owner = THIS_MODULE, + }, + { + .name = "DCDC2", + .id = WM8350_DCDC_2, + .ops = &wm8350_dcdc2_5_ops, + .irq = WM8350_IRQ_UV_DC2, + .type = REGULATOR_VOLTAGE, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC2_ENA, + .owner = THIS_MODULE, + }, + { + .name = "DCDC3", + .id = WM8350_DCDC_3, + .ops = &wm8350_dcdc_ops, + .irq = WM8350_IRQ_UV_DC3, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_DCDC_MAX_VSEL + 1, + .min_uV = 850000, + .uV_step = 25000, + .vsel_reg = WM8350_DCDC3_CONTROL, + .vsel_mask = WM8350_DC3_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC3_ENA, + .owner = THIS_MODULE, + }, + { + .name = "DCDC4", + .id = WM8350_DCDC_4, + .ops = &wm8350_dcdc_ops, + .irq = WM8350_IRQ_UV_DC4, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_DCDC_MAX_VSEL + 1, + .min_uV = 850000, + .uV_step = 25000, + .vsel_reg = WM8350_DCDC4_CONTROL, + .vsel_mask = WM8350_DC4_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC4_ENA, + .owner = THIS_MODULE, + }, + { + .name = "DCDC5", + .id = WM8350_DCDC_5, + .ops = &wm8350_dcdc2_5_ops, + .irq = WM8350_IRQ_UV_DC5, + .type = REGULATOR_VOLTAGE, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC5_ENA, + .owner = THIS_MODULE, + }, + { + .name = "DCDC6", + .id = WM8350_DCDC_6, + .ops = &wm8350_dcdc_ops, + .irq = WM8350_IRQ_UV_DC6, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_DCDC_MAX_VSEL + 1, + .min_uV = 850000, + .uV_step = 25000, + .vsel_reg = WM8350_DCDC6_CONTROL, + .vsel_mask = WM8350_DC6_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_DC6_ENA, + .owner = THIS_MODULE, + }, + { + .name = "LDO1", + .id = WM8350_LDO_1, + .ops = &wm8350_ldo_ops, + .irq = WM8350_IRQ_UV_LDO1, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_LDO1_VSEL_MASK + 1, + .linear_ranges = wm8350_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8350_ldo_ranges), + .vsel_reg = WM8350_LDO1_CONTROL, + .vsel_mask = WM8350_LDO1_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_LDO1_ENA, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = WM8350_LDO_2, + .ops = &wm8350_ldo_ops, + .irq = WM8350_IRQ_UV_LDO2, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_LDO2_VSEL_MASK + 1, + .linear_ranges = wm8350_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8350_ldo_ranges), + .vsel_reg = WM8350_LDO2_CONTROL, + .vsel_mask = WM8350_LDO2_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_LDO2_ENA, + .owner = THIS_MODULE, + }, + { + .name = "LDO3", + .id = WM8350_LDO_3, + .ops = &wm8350_ldo_ops, + .irq = WM8350_IRQ_UV_LDO3, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_LDO3_VSEL_MASK + 1, + .linear_ranges = wm8350_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8350_ldo_ranges), + .vsel_reg = WM8350_LDO3_CONTROL, + .vsel_mask = WM8350_LDO3_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_LDO3_ENA, + .owner = THIS_MODULE, + }, + { + .name = "LDO4", + .id = WM8350_LDO_4, + .ops = &wm8350_ldo_ops, + .irq = WM8350_IRQ_UV_LDO4, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8350_LDO4_VSEL_MASK + 1, + .linear_ranges = wm8350_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8350_ldo_ranges), + .vsel_reg = WM8350_LDO4_CONTROL, + .vsel_mask = WM8350_LDO4_VSEL_MASK, + .enable_reg = WM8350_DCDC_LDO_REQUESTED, + .enable_mask = WM8350_LDO4_ENA, + .owner = THIS_MODULE, + }, + { + .name = "ISINKA", + .id = WM8350_ISINK_A, + .ops = &wm8350_isink_ops, + .irq = WM8350_IRQ_CS1, + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, + .curr_table = isink_cur, + .n_current_limits = ARRAY_SIZE(isink_cur), + .csel_reg = WM8350_CURRENT_SINK_DRIVER_A, + .csel_mask = WM8350_CS1_ISEL_MASK, + }, + { + .name = "ISINKB", + .id = WM8350_ISINK_B, + .ops = &wm8350_isink_ops, + .irq = WM8350_IRQ_CS2, + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE, + .curr_table = isink_cur, + .n_current_limits = ARRAY_SIZE(isink_cur), + .csel_reg = WM8350_CURRENT_SINK_DRIVER_B, + .csel_mask = WM8350_CS2_ISEL_MASK, + }, +}; + +static irqreturn_t pmic_uv_handler(int irq, void *data) +{ + struct regulator_dev *rdev = (struct regulator_dev *)data; + + if (irq == WM8350_IRQ_CS1 || irq == WM8350_IRQ_CS2) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_REGULATION_OUT, + NULL); + else + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_UNDER_VOLTAGE, + NULL); + + return IRQ_HANDLED; +} + +static int wm8350_regulator_probe(struct platform_device *pdev) +{ + struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev); + struct regulator_config config = { }; + struct regulator_dev *rdev; + int ret; + u16 val; + + if (pdev->id < WM8350_DCDC_1 || pdev->id > WM8350_ISINK_B) + return -ENODEV; + + /* do any regulator specific init */ + switch (pdev->id) { + case WM8350_DCDC_1: + val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER); + wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + break; + case WM8350_DCDC_3: + val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER); + wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + break; + case WM8350_DCDC_4: + val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER); + wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + break; + case WM8350_DCDC_6: + val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER); + wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; + break; + } + + config.dev = &pdev->dev; + config.init_data = dev_get_platdata(&pdev->dev); + config.driver_data = dev_get_drvdata(&pdev->dev); + config.regmap = wm8350->regmap; + + /* register regulator */ + rdev = devm_regulator_register(&pdev->dev, &wm8350_reg[pdev->id], + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + wm8350_reg[pdev->id].name); + return PTR_ERR(rdev); + } + + /* register regulator IRQ */ + ret = wm8350_register_irq(wm8350, wm8350_reg[pdev->id].irq, + pmic_uv_handler, 0, "UV", rdev); + if (ret < 0) { + dev_err(&pdev->dev, "failed to register regulator %s IRQ\n", + wm8350_reg[pdev->id].name); + return ret; + } + + return 0; +} + +static void wm8350_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + struct wm8350 *wm8350 = rdev_get_drvdata(rdev); + + wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev); +} + +int wm8350_register_regulator(struct wm8350 *wm8350, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + if (reg < 0 || reg >= NUM_WM8350_REGULATORS) + return -EINVAL; + + if (wm8350->pmic.pdev[reg]) + return -EBUSY; + + if (reg >= WM8350_DCDC_1 && reg <= WM8350_DCDC_6 && + reg > wm8350->pmic.max_dcdc) + return -ENODEV; + if (reg >= WM8350_ISINK_A && reg <= WM8350_ISINK_B && + reg > wm8350->pmic.max_isink) + return -ENODEV; + + pdev = platform_device_alloc("wm8350-regulator", reg); + if (!pdev) + return -ENOMEM; + + wm8350->pmic.pdev[reg] = pdev; + + initdata->driver_data = wm8350; + + pdev->dev.platform_data = initdata; + pdev->dev.parent = wm8350->dev; + platform_set_drvdata(pdev, wm8350); + + ret = platform_device_add(pdev); + + if (ret != 0) { + dev_err(wm8350->dev, "Failed to register regulator %d: %d\n", + reg, ret); + platform_device_put(pdev); + wm8350->pmic.pdev[reg] = NULL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(wm8350_register_regulator); + +/** + * wm8350_register_led - Register a WM8350 LED output + * + * @wm8350: The WM8350 device to configure. + * @lednum: LED device index to create. + * @dcdc: The DCDC to use for the LED. + * @isink: The ISINK to use for the LED. + * @pdata: Configuration for the LED. + * + * The WM8350 supports the use of an ISINK together with a DCDC to + * provide a power-efficient LED driver. This function registers the + * regulators and instantiates the platform device for a LED. The + * operating modes for the LED regulators must be configured using + * wm8350_isink_set_flash(), wm8350_dcdc25_set_mode() and + * wm8350_dcdc_set_slot() prior to calling this function. + */ +int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink, + struct wm8350_led_platform_data *pdata) +{ + struct wm8350_led *led; + struct platform_device *pdev; + int ret; + + if (lednum >= ARRAY_SIZE(wm8350->pmic.led) || lednum < 0) { + dev_err(wm8350->dev, "Invalid LED index %d\n", lednum); + return -ENODEV; + } + + led = &wm8350->pmic.led[lednum]; + + if (led->pdev) { + dev_err(wm8350->dev, "LED %d already allocated\n", lednum); + return -EINVAL; + } + + pdev = platform_device_alloc("wm8350-led", lednum); + if (pdev == NULL) { + dev_err(wm8350->dev, "Failed to allocate LED %d\n", lednum); + return -ENOMEM; + } + + led->isink_consumer.dev_name = dev_name(&pdev->dev); + led->isink_consumer.supply = "led_isink"; + led->isink_init.num_consumer_supplies = 1; + led->isink_init.consumer_supplies = &led->isink_consumer; + led->isink_init.constraints.min_uA = 0; + led->isink_init.constraints.max_uA = pdata->max_uA; + led->isink_init.constraints.valid_ops_mask + = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS; + led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL; + ret = wm8350_register_regulator(wm8350, isink, &led->isink_init); + if (ret != 0) { + platform_device_put(pdev); + return ret; + } + + led->dcdc_consumer.dev_name = dev_name(&pdev->dev); + led->dcdc_consumer.supply = "led_vcc"; + led->dcdc_init.num_consumer_supplies = 1; + led->dcdc_init.consumer_supplies = &led->dcdc_consumer; + led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL; + led->dcdc_init.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; + ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init); + if (ret != 0) { + platform_device_put(pdev); + return ret; + } + + switch (isink) { + case WM8350_ISINK_A: + wm8350->pmic.isink_A_dcdc = dcdc; + break; + case WM8350_ISINK_B: + wm8350->pmic.isink_B_dcdc = dcdc; + break; + } + + pdev->dev.platform_data = pdata; + pdev->dev.parent = wm8350->dev; + ret = platform_device_add(pdev); + if (ret != 0) { + dev_err(wm8350->dev, "Failed to register LED %d: %d\n", + lednum, ret); + platform_device_put(pdev); + return ret; + } + + led->pdev = pdev; + + return 0; +} +EXPORT_SYMBOL_GPL(wm8350_register_led); + +static struct platform_driver wm8350_regulator_driver = { + .probe = wm8350_regulator_probe, + .remove = wm8350_regulator_remove, + .driver = { + .name = "wm8350-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; + +static int __init wm8350_regulator_init(void) +{ + return platform_driver_register(&wm8350_regulator_driver); +} +subsys_initcall(wm8350_regulator_init); + +static void __exit wm8350_regulator_exit(void) +{ + platform_driver_unregister(&wm8350_regulator_driver); +} +module_exit(wm8350_regulator_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood"); +MODULE_DESCRIPTION("WM8350 voltage and current regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8350-regulator"); diff --git a/drivers/regulator/wm8400-regulator.c b/drivers/regulator/wm8400-regulator.c new file mode 100644 index 000000000..fb3ca7956 --- /dev/null +++ b/drivers/regulator/wm8400-regulator.c @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Regulator support for WM8400 +// +// Copyright 2008 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include + +static const struct linear_range wm8400_ldo_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 14, 50000), + REGULATOR_LINEAR_RANGE(1700000, 15, 31, 100000), +}; + +static const struct regulator_ops wm8400_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .map_voltage = regulator_map_voltage_linear_range, +}; + +static unsigned int wm8400_dcdc_get_mode(struct regulator_dev *dev) +{ + struct regmap *rmap = rdev_get_regmap(dev); + int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; + u16 data[2]; + int ret; + + ret = regmap_bulk_read(rmap, WM8400_DCDC1_CONTROL_1 + offset, data, 2); + if (ret != 0) + return 0; + + /* Datasheet: hibernate */ + if (data[0] & WM8400_DC1_SLEEP) + return REGULATOR_MODE_STANDBY; + + /* Datasheet: standby */ + if (!(data[0] & WM8400_DC1_ACTIVE)) + return REGULATOR_MODE_IDLE; + + /* Datasheet: active with or without force PWM */ + if (data[1] & WM8400_DC1_FRC_PWM) + return REGULATOR_MODE_FAST; + else + return REGULATOR_MODE_NORMAL; +} + +static int wm8400_dcdc_set_mode(struct regulator_dev *dev, unsigned int mode) +{ + struct regmap *rmap = rdev_get_regmap(dev); + int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; + int ret; + + switch (mode) { + case REGULATOR_MODE_FAST: + /* Datasheet: active with force PWM */ + ret = regmap_update_bits(rmap, WM8400_DCDC1_CONTROL_2 + offset, + WM8400_DC1_FRC_PWM, WM8400_DC1_FRC_PWM); + if (ret != 0) + return ret; + + return regmap_update_bits(rmap, WM8400_DCDC1_CONTROL_1 + offset, + WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP, + WM8400_DC1_ACTIVE); + + case REGULATOR_MODE_NORMAL: + /* Datasheet: active */ + ret = regmap_update_bits(rmap, WM8400_DCDC1_CONTROL_2 + offset, + WM8400_DC1_FRC_PWM, 0); + if (ret != 0) + return ret; + + return regmap_update_bits(rmap, WM8400_DCDC1_CONTROL_1 + offset, + WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP, + WM8400_DC1_ACTIVE); + + case REGULATOR_MODE_IDLE: + /* Datasheet: standby */ + return regmap_update_bits(rmap, WM8400_DCDC1_CONTROL_1 + offset, + WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP, 0); + default: + return -EINVAL; + } +} + +static unsigned int wm8400_dcdc_get_optimum_mode(struct regulator_dev *dev, + int input_uV, int output_uV, + int load_uA) +{ + return REGULATOR_MODE_NORMAL; +} + +static const struct regulator_ops wm8400_dcdc_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_mode = wm8400_dcdc_get_mode, + .set_mode = wm8400_dcdc_set_mode, + .get_optimum_mode = wm8400_dcdc_get_optimum_mode, +}; + +static const struct regulator_desc regulators[] = { + { + .name = "LDO1", + .id = WM8400_LDO1, + .ops = &wm8400_ldo_ops, + .enable_reg = WM8400_LDO1_CONTROL, + .enable_mask = WM8400_LDO1_ENA, + .n_voltages = WM8400_LDO1_VSEL_MASK + 1, + .linear_ranges = wm8400_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8400_ldo_ranges), + .vsel_reg = WM8400_LDO1_CONTROL, + .vsel_mask = WM8400_LDO1_VSEL_MASK, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = WM8400_LDO2, + .ops = &wm8400_ldo_ops, + .enable_reg = WM8400_LDO2_CONTROL, + .enable_mask = WM8400_LDO2_ENA, + .n_voltages = WM8400_LDO2_VSEL_MASK + 1, + .linear_ranges = wm8400_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8400_ldo_ranges), + .type = REGULATOR_VOLTAGE, + .vsel_reg = WM8400_LDO2_CONTROL, + .vsel_mask = WM8400_LDO2_VSEL_MASK, + .owner = THIS_MODULE, + }, + { + .name = "LDO3", + .id = WM8400_LDO3, + .ops = &wm8400_ldo_ops, + .enable_reg = WM8400_LDO3_CONTROL, + .enable_mask = WM8400_LDO3_ENA, + .n_voltages = WM8400_LDO3_VSEL_MASK + 1, + .linear_ranges = wm8400_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8400_ldo_ranges), + .vsel_reg = WM8400_LDO3_CONTROL, + .vsel_mask = WM8400_LDO3_VSEL_MASK, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "LDO4", + .id = WM8400_LDO4, + .ops = &wm8400_ldo_ops, + .enable_reg = WM8400_LDO4_CONTROL, + .enable_mask = WM8400_LDO4_ENA, + .n_voltages = WM8400_LDO4_VSEL_MASK + 1, + .linear_ranges = wm8400_ldo_ranges, + .n_linear_ranges = ARRAY_SIZE(wm8400_ldo_ranges), + .vsel_reg = WM8400_LDO4_CONTROL, + .vsel_mask = WM8400_LDO4_VSEL_MASK, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC1", + .id = WM8400_DCDC1, + .ops = &wm8400_dcdc_ops, + .enable_reg = WM8400_DCDC1_CONTROL_1, + .enable_mask = WM8400_DC1_ENA_MASK, + .n_voltages = WM8400_DC1_VSEL_MASK + 1, + .vsel_reg = WM8400_DCDC1_CONTROL_1, + .vsel_mask = WM8400_DC1_VSEL_MASK, + .min_uV = 850000, + .uV_step = 25000, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, + { + .name = "DCDC2", + .id = WM8400_DCDC2, + .ops = &wm8400_dcdc_ops, + .enable_reg = WM8400_DCDC2_CONTROL_1, + .enable_mask = WM8400_DC2_ENA_MASK, + .n_voltages = WM8400_DC2_VSEL_MASK + 1, + .vsel_reg = WM8400_DCDC2_CONTROL_1, + .vsel_mask = WM8400_DC2_VSEL_MASK, + .min_uV = 850000, + .uV_step = 25000, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + }, +}; + +static int wm8400_regulator_probe(struct platform_device *pdev) +{ + struct wm8400 *wm8400 = container_of(pdev, struct wm8400, regulators[pdev->id]); + struct regulator_config config = { }; + struct regulator_dev *rdev; + + config.dev = &pdev->dev; + config.init_data = dev_get_platdata(&pdev->dev); + config.driver_data = wm8400; + config.regmap = wm8400->regmap; + + rdev = devm_regulator_register(&pdev->dev, ®ulators[pdev->id], + &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static struct platform_driver wm8400_regulator_driver = { + .driver = { + .name = "wm8400-regulator", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = wm8400_regulator_probe, +}; + +/** + * wm8400_register_regulator - enable software control of a WM8400 regulator + * + * This function enables software control of a WM8400 regulator via + * the regulator API. It is intended to be called from the + * platform_init() callback of the WM8400 MFD driver. + * + * @dev: The WM8400 device to operate on. + * @reg: The regulator to control. + * @initdata: Regulator initdata for the regulator. + */ +int wm8400_register_regulator(struct device *dev, int reg, + struct regulator_init_data *initdata) +{ + struct wm8400 *wm8400 = dev_get_drvdata(dev); + + if (wm8400->regulators[reg].name) + return -EBUSY; + + initdata->driver_data = wm8400; + + wm8400->regulators[reg].name = "wm8400-regulator"; + wm8400->regulators[reg].id = reg; + wm8400->regulators[reg].dev.parent = dev; + wm8400->regulators[reg].dev.platform_data = initdata; + + return platform_device_register(&wm8400->regulators[reg]); +} +EXPORT_SYMBOL_GPL(wm8400_register_regulator); + +static int __init wm8400_regulator_init(void) +{ + return platform_driver_register(&wm8400_regulator_driver); +} +subsys_initcall(wm8400_regulator_init); + +static void __exit wm8400_regulator_exit(void) +{ + platform_driver_unregister(&wm8400_regulator_driver); +} +module_exit(wm8400_regulator_exit); + +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("WM8400 regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8400-regulator"); diff --git a/drivers/regulator/wm8994-regulator.c b/drivers/regulator/wm8994-regulator.c new file mode 100644 index 000000000..2946db448 --- /dev/null +++ b/drivers/regulator/wm8994-regulator.c @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// wm8994-regulator.c -- Regulator driver for the WM8994 +// +// Copyright 2009 Wolfson Microelectronics PLC. +// +// Author: Mark Brown + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +struct wm8994_ldo { + struct regulator_dev *regulator; + struct wm8994 *wm8994; + struct regulator_consumer_supply supply; + struct regulator_init_data init_data; +}; + +#define WM8994_LDO1_MAX_SELECTOR 0x7 +#define WM8994_LDO2_MAX_SELECTOR 0x3 + +static const struct regulator_ops wm8994_ldo1_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static int wm8994_ldo2_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct wm8994_ldo *ldo = rdev_get_drvdata(rdev); + + if (selector > WM8994_LDO2_MAX_SELECTOR) + return -EINVAL; + + switch (ldo->wm8994->type) { + case WM8994: + return (selector * 100000) + 900000; + case WM8958: + return (selector * 100000) + 1000000; + case WM1811: + switch (selector) { + case 0: + return -EINVAL; + default: + return (selector * 100000) + 950000; + } + break; + default: + return -EINVAL; + } +} + +static const struct regulator_ops wm8994_ldo2_ops = { + .list_voltage = wm8994_ldo2_list_voltage, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_desc wm8994_ldo_desc[] = { + { + .name = "LDO1", + .id = 1, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8994_LDO1_MAX_SELECTOR + 1, + .vsel_reg = WM8994_LDO_1, + .vsel_mask = WM8994_LDO1_VSEL_MASK, + .ops = &wm8994_ldo1_ops, + .min_uV = 2400000, + .uV_step = 100000, + .enable_time = 3000, + .off_on_delay = 36000, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = 2, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8994_LDO2_MAX_SELECTOR + 1, + .vsel_reg = WM8994_LDO_2, + .vsel_mask = WM8994_LDO2_VSEL_MASK, + .ops = &wm8994_ldo2_ops, + .enable_time = 3000, + .off_on_delay = 36000, + .owner = THIS_MODULE, + }, +}; + +static const struct regulator_desc wm8958_ldo_desc[] = { + { + .name = "LDO1", + .id = 1, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8994_LDO1_MAX_SELECTOR + 1, + .vsel_reg = WM8994_LDO_1, + .vsel_mask = WM8994_LDO1_VSEL_MASK, + .ops = &wm8994_ldo1_ops, + .min_uV = 2400000, + .uV_step = 100000, + .enable_time = 3000, + .owner = THIS_MODULE, + }, + { + .name = "LDO2", + .id = 2, + .type = REGULATOR_VOLTAGE, + .n_voltages = WM8994_LDO2_MAX_SELECTOR + 1, + .vsel_reg = WM8994_LDO_2, + .vsel_mask = WM8994_LDO2_VSEL_MASK, + .ops = &wm8994_ldo2_ops, + .enable_time = 3000, + .owner = THIS_MODULE, + }, +}; + +static const struct regulator_consumer_supply wm8994_ldo_consumer[] = { + { .supply = "AVDD1" }, + { .supply = "DCVDD" }, +}; + +static const struct regulator_init_data wm8994_ldo_default[] = { + { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + }, + { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + }, +}; + +static int wm8994_ldo_probe(struct platform_device *pdev) +{ + struct wm8994 *wm8994 = dev_get_drvdata(pdev->dev.parent); + struct wm8994_pdata *pdata = dev_get_platdata(wm8994->dev); + int id = pdev->id % ARRAY_SIZE(pdata->ldo); + struct regulator_config config = { }; + struct wm8994_ldo *ldo; + struct gpio_desc *gpiod; + int ret; + + dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); + + ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm8994_ldo), GFP_KERNEL); + if (!ldo) + return -ENOMEM; + + ldo->wm8994 = wm8994; + ldo->supply = wm8994_ldo_consumer[id]; + ldo->supply.dev_name = dev_name(wm8994->dev); + + config.dev = wm8994->dev; + config.driver_data = ldo; + config.regmap = wm8994->regmap; + config.init_data = &ldo->init_data; + + /* + * Look up LDO enable GPIO from the parent device node, we don't + * use devm because the regulator core will free the GPIO + */ + gpiod = gpiod_get_optional(pdev->dev.parent, + id ? "wlf,ldo2ena" : "wlf,ldo1ena", + GPIOD_OUT_LOW | + GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + config.ena_gpiod = gpiod; + + /* Use default constraints if none set up */ + if (!pdata || !pdata->ldo[id].init_data || wm8994->dev->of_node) { + dev_dbg(wm8994->dev, "Using default init data, supply %s %s\n", + ldo->supply.dev_name, ldo->supply.supply); + + ldo->init_data = wm8994_ldo_default[id]; + ldo->init_data.consumer_supplies = &ldo->supply; + if (!gpiod) + ldo->init_data.constraints.valid_ops_mask = 0; + } else { + ldo->init_data = *pdata->ldo[id].init_data; + } + + /* + * At this point the GPIO descriptor is handled over to the + * regulator core and we need not worry about it on the + * error path. + */ + if (ldo->wm8994->type == WM8994) { + ldo->regulator = devm_regulator_register(&pdev->dev, + &wm8994_ldo_desc[id], + &config); + } else { + ldo->regulator = devm_regulator_register(&pdev->dev, + &wm8958_ldo_desc[id], + &config); + } + + if (IS_ERR(ldo->regulator)) { + ret = PTR_ERR(ldo->regulator); + dev_err(wm8994->dev, "Failed to register LDO%d: %d\n", + id + 1, ret); + return ret; + } + + platform_set_drvdata(pdev, ldo); + + return 0; +} + +static struct platform_driver wm8994_ldo_driver = { + .probe = wm8994_ldo_probe, + .driver = { + .name = "wm8994-ldo", + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, +}; + +module_platform_driver(wm8994_ldo_driver); + +/* Module information */ +MODULE_AUTHOR("Mark Brown "); +MODULE_DESCRIPTION("WM8994 LDO driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8994-ldo"); -- cgit v1.3.1