From 2bc6b218717b9d08f466f88209251d54bc09b207 Mon Sep 17 00:00:00 2001 From: Fuad Tabba Date: Tue, 22 Sep 2026 19:14:30 +0100 Subject: arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 __init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2. PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a write from EL0 reaches the trap and takes the host down without a panic message. Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9 bits. Fixes: 858c7bfcb35e1 ("arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9") Cc: stable@vger.kernel.org Signed-off-by: Fuad Tabba Reviewed-by: Anshuman Khandual Reviewed-by: Oliver Upton Signed-off-by: Will Deacon --- drivers/pps/sysfs.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 drivers/pps/sysfs.c (limited to 'drivers/pps/sysfs.c') diff --git a/drivers/pps/sysfs.c b/drivers/pps/sysfs.c new file mode 100644 index 000000000..134bc33f6 --- /dev/null +++ b/drivers/pps/sysfs.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * PPS sysfs support + * + * Copyright (C) 2007-2009 Rodolfo Giometti + */ + + +#include +#include +#include +#include + +/* + * Attribute functions + */ + +static ssize_t assert_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + if (!(pps->info.mode & PPS_CAPTUREASSERT)) + return 0; + + return sprintf(buf, "%lld.%09d#%d\n", + (long long) pps->assert_tu.sec, pps->assert_tu.nsec, + pps->assert_sequence); +} +static DEVICE_ATTR_RO(assert); + +static ssize_t clear_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + if (!(pps->info.mode & PPS_CAPTURECLEAR)) + return 0; + + return sprintf(buf, "%lld.%09d#%d\n", + (long long) pps->clear_tu.sec, pps->clear_tu.nsec, + pps->clear_sequence); +} +static DEVICE_ATTR_RO(clear); + +static ssize_t mode_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + return sprintf(buf, "%4x\n", pps->info.mode); +} +static DEVICE_ATTR_RO(mode); + +static ssize_t echo_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", !!pps->info.echo); +} +static DEVICE_ATTR_RO(echo); + +static ssize_t name_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + return sprintf(buf, "%s\n", pps->info.name); +} +static DEVICE_ATTR_RO(name); + +static ssize_t path_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + return sprintf(buf, "%s\n", pps->info.path); +} +static DEVICE_ATTR_RO(path); + +static struct attribute *pps_attrs[] = { + &dev_attr_assert.attr, + &dev_attr_clear.attr, + &dev_attr_mode.attr, + &dev_attr_echo.attr, + &dev_attr_name.attr, + &dev_attr_path.attr, + NULL, +}; + +static const struct attribute_group pps_group = { + .attrs = pps_attrs, +}; + +const struct attribute_group *pps_groups[] = { + &pps_group, + NULL, +}; -- cgit v1.3.1