From 27600805e62f800bacf990354632eae4e487d34c Mon Sep 17 00:00:00 2001 From: Yazen Ghannam Date: Thu, 3 Sep 2026 10:43:25 -0500 Subject: x86/amd_node: Fix PCI device reference counting in amd_smn_init() The local "root" pointer is a temporary variable used during the device search. Therefore, refcount related to the search iterators should be cleaned up after the search is complete. Use the __free() cleanup macro to ensure the refcount is decremented when the temporary pointer goes out of scope. Additionally, increment the refcount when caching a root pointer. This ensures the in-use refcount is separate from the temporary search refcounting. Finally, drop the redundant "root = NULL" before the second search loop. The pci_get_class() iterator always decrements the refcount of its "from" argument, so the first loop can only fall through with "root" already NULL. Fixes: 0a4b61d9c2e4 ("x86/amd_node: Fix AMD root device caching") Closes: https://sashiko.dev/#/patchset/20260806160159.230453-1-jason.andryuk%40amd.com Reported-by: Sashiko Assisted-by: LLM Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Mario Limonciello (AMD) Cc: Link: https://patch.msgid.link/20260903154325.74343-1-yazen.ghannam@amd.com --- drivers/pinctrl/tegra/Kconfig | 67 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 drivers/pinctrl/tegra/Kconfig (limited to 'drivers/pinctrl/tegra/Kconfig') diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig new file mode 100644 index 000000000..39a93733e --- /dev/null +++ b/drivers/pinctrl/tegra/Kconfig @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PINCTRL_TEGRA + bool "NVIDIA Tegra pin controllers common" if COMPILE_TEST && !ARCH_TEGRA + select PINMUX + select PINCONF + +config PINCTRL_TEGRA20 + bool "NVIDIA Tegra20 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + depends on COMMON_CLK + +config PINCTRL_TEGRA30 + bool "NVIDIA Tegra30 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA114 + bool "NVIDIA Tegra114 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA124 + bool "NVIDIA Tegra124 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA210 + bool "NVIDIA Tegra210 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA186 + bool "NVIDIA Tegra186 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA194 + bool "NVIDIA Tegra194 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA234 + bool "NVIDIA Tegra234 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA238 + tristate "NVIDIA Tegra238 pinctrl driver" + depends on ARCH_TEGRA || COMPILE_TEST + default m if ARCH_TEGRA_238_SOC + select PINCTRL_TEGRA + help + Say Y or M here to enable support for the pinctrl driver for + NVIDIA Tegra238 SoC. This driver controls the pin multiplexing + and configuration for the MAIN and AON pin controllers found + on Tegra238. + +config PINCTRL_TEGRA264 + tristate "NVIDIA Tegra264 pinctrl driver" + depends on ARCH_TEGRA || COMPILE_TEST + default m if ARCH_TEGRA_264_SOC + select PINCTRL_TEGRA + help + Say Y or M here to enable support for the pinctrl driver for + NVIDIA Tegra264 SoC. This driver controls the pin multiplexing + and configuration for the MAIN, AON and UPHY pin controllers found + on Tegra264. + +config PINCTRL_TEGRA_XUSB + bool "NVIDIA Tegra XUSB pin controller" if COMPILE_TEST && !ARCH_TEGRA + default y if ARCH_TEGRA + select GENERIC_PHY + select PINCONF + select PINMUX -- cgit v1.3.1