From 0d6526f82c3cdefcca47f73f5fc08dc6f335eac6 Mon Sep 17 00:00:00 2001 From: Tim Chen Date: Mon, 21 Sep 2026 17:37:22 -0700 Subject: sched/cache: Keep nr_pref_llc_running in the runnable domain, to fix LLC mis-scheduling bug alb_break_llc() decides whether to break LLC preference during active load balance. It does so by testing that every runnable fair task on the source rq prefers its LLC: env->src_rq->nr_pref_llc_running == env->src_rq->cfs.h_nr_runnable But the two counters cover different sets. nr_pref_llc_running is updated in account_llc_enqueue()/account_llc_dequeue(), next to cfs_rq->nr_queued, so it follows queued tasks. h_nr_runnable is updated in set_delayed()/ clear_delayed() and drops delay-dequeued tasks. So under DELAY_DEQUEUE, a preferring task that goes to sleep stays counted in nr_pref_llc_running while h_nr_runnable falls. The equality then breaks, alb_break_llc() returns false, and active balance is free to pull a task off its preferred LLC. Active balance only moves runnable tasks, and this is the only LLC check it consults: once the stopper runs, LBF_ACTIVE_LB skips the per-task test in can_migrate_task(). The runnable set is the one we want. Fix it on the counter side. A task should be counted in nr_pref_llc_running exactly while it is both queued on its preferred LLC (pref_llc_queued) and runnable (!sched_delayed). Define that membership once in task_pref_llc_runnable(), and adjust the counter only through pref_llc_running_inc()/pref_llc_running_dec() from the four sites that change either input: account_llc_enqueue(), account_llc_dequeue(), set_delayed() and clear_delayed(). Gating every update on the same predicate keeps the delay, wake and dequeue paths from double-counting or underflowing; see the comments at those sites for the ordering. nr_llc_running and sd->llc_counts are not touched and stay on queued semantics. Fixes: 714059f79ff0 ("sched/cache: Handle moving single tasks to/from their preferred LLC") Closes: https://lore.kernel.org/lkml/20260827135000.735138-1-zhanxusheng@xiaomi.com/ Reported-by: Zhan Xusheng Suggested-by: Chen Yu Signed-off-by: Tim Chen Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Ingo Molnar Reviewed-by: Kayra Cizmeci Cc: # v7.2.x Link: https://patch.msgid.link/06af61afedac32e6477f57feb4d658f6c411c3af.1790035273.git.tim.c.chen@linux.intel.com --- drivers/pinctrl/tegra/Kconfig | 67 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 drivers/pinctrl/tegra/Kconfig (limited to 'drivers/pinctrl/tegra/Kconfig') diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig new file mode 100644 index 000000000..39a93733e --- /dev/null +++ b/drivers/pinctrl/tegra/Kconfig @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PINCTRL_TEGRA + bool "NVIDIA Tegra pin controllers common" if COMPILE_TEST && !ARCH_TEGRA + select PINMUX + select PINCONF + +config PINCTRL_TEGRA20 + bool "NVIDIA Tegra20 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + depends on COMMON_CLK + +config PINCTRL_TEGRA30 + bool "NVIDIA Tegra30 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA114 + bool "NVIDIA Tegra114 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA124 + bool "NVIDIA Tegra124 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA210 + bool "NVIDIA Tegra210 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA186 + bool "NVIDIA Tegra186 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA194 + bool "NVIDIA Tegra194 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA234 + bool "NVIDIA Tegra234 pin controller" if COMPILE_TEST && !ARCH_TEGRA + select PINCTRL_TEGRA + +config PINCTRL_TEGRA238 + tristate "NVIDIA Tegra238 pinctrl driver" + depends on ARCH_TEGRA || COMPILE_TEST + default m if ARCH_TEGRA_238_SOC + select PINCTRL_TEGRA + help + Say Y or M here to enable support for the pinctrl driver for + NVIDIA Tegra238 SoC. This driver controls the pin multiplexing + and configuration for the MAIN and AON pin controllers found + on Tegra238. + +config PINCTRL_TEGRA264 + tristate "NVIDIA Tegra264 pinctrl driver" + depends on ARCH_TEGRA || COMPILE_TEST + default m if ARCH_TEGRA_264_SOC + select PINCTRL_TEGRA + help + Say Y or M here to enable support for the pinctrl driver for + NVIDIA Tegra264 SoC. This driver controls the pin multiplexing + and configuration for the MAIN, AON and UPHY pin controllers found + on Tegra264. + +config PINCTRL_TEGRA_XUSB + bool "NVIDIA Tegra XUSB pin controller" if COMPILE_TEST && !ARCH_TEGRA + default y if ARCH_TEGRA + select GENERIC_PHY + select PINCONF + select PINMUX -- cgit v1.3.1