From 0102c8c7fdfc4bd700971daff2b94470f4eafae4 Mon Sep 17 00:00:00 2001 From: Dapeng Mi Date: Thu, 17 Sep 2026 09:52:33 +0800 Subject: perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rsp DMR introduces Offmodule Response events in place of the legacy Offcore Response events, but it still exposes the inherited offcore_rsp PMU attribute for programming the corresponding MSR data. Rename the DMR PMU attribute to offmodule_rsp so the sysfs interface matches the underlying event name and avoids user & tooling confusion. Signed-off-by: Dapeng Mi Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Ingo Molnar Link: https://patch.msgid.link/20260917015234.981153-12-dapeng1.mi@linux.intel.com --- drivers/pinctrl/meson/Kconfig | 92 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 drivers/pinctrl/meson/Kconfig (limited to 'drivers/pinctrl/meson/Kconfig') diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig new file mode 100644 index 000000000..1af4fc320 --- /dev/null +++ b/drivers/pinctrl/meson/Kconfig @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: GPL-2.0-only +menuconfig PINCTRL_MESON + tristate "Amlogic SoC pinctrl drivers" + depends on ARCH_MESON || COMPILE_TEST + depends on OF + default ARCH_MESON + select PINMUX + select PINCONF + select GENERIC_PINCONF + select GPIOLIB + select REGMAP_MMIO + +if PINCTRL_MESON + +config PINCTRL_MESON8 + bool "Meson 8 SoC pinctrl driver" + depends on ARM || COMPILE_TEST + select PINCTRL_MESON8_PMX + default ARCH_MESON + +config PINCTRL_MESON8B + bool "Meson 8b SoC pinctrl driver" + depends on ARM || COMPILE_TEST + select PINCTRL_MESON8_PMX + default ARCH_MESON + +config PINCTRL_MESON_GXBB + tristate "Meson gxbb SoC pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON8_PMX + default ARCH_MESON + +config PINCTRL_MESON_GXL + tristate "Meson gxl SoC pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON8_PMX + default ARCH_MESON + +config PINCTRL_MESON8_PMX + tristate + +config PINCTRL_MESON_AXG + tristate "Meson axg Soc pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +config PINCTRL_MESON_AXG_PMX + tristate + +config PINCTRL_MESON_G12A + tristate "Meson g12a Soc pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +config PINCTRL_MESON_A1 + tristate "Meson a1 Soc pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +config PINCTRL_MESON_S4 + tristate "Meson s4 Soc pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +config PINCTRL_AMLOGIC_A4 + bool "AMLOGIC pincontrol" + depends on ARM64 || COMPILE_TEST + default ARCH_MESON + help + This is the driver for the pin controller found on Amlogic SoCs. + + This driver is simplify subsequent support for new amlogic SoCs, + to support new Amlogic SoCs, only need to add the corresponding dts file, + no additional binding header files or C file are added. + +config PINCTRL_AMLOGIC_C3 + tristate "Amlogic C3 SoC pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +config PINCTRL_AMLOGIC_T7 + tristate "Amlogic T7 SoC pinctrl driver" + depends on ARM64 || COMPILE_TEST + select PINCTRL_MESON_AXG_PMX + default ARCH_MESON + +endif -- cgit v1.3.1