From aeb709c767aeca996e6011133e4f7bdb2a4af652 Mon Sep 17 00:00:00 2001 From: Alexei Starovoitov Date: Wed, 30 Sep 2026 09:59:20 +0000 Subject: selftests/bpf: Add a test for objects stuck in free_by_rcu_ttrace Delete all elements of BPF_F_NO_PREALLOC hash map in one batch. The first free_bulk() starts RCU tasks trace GP and the rest of the elements are freed while it's in flight. Wait for call_rcu_ttrace_in_progress to clear in bpf_mem_cache of every cpu and check that free_by_rcu_ttrace and waiting_for_gp_ttrace lists are empty. Signed-off-by: Alexei Starovoitov Link: https://lore.kernel.org/bpf/20260930095920.601738-4-alexei.starovoitov@gmail.com Signed-off-by: Kumar Kartikeya Dwivedi --- drivers/phy/Kconfig | 206 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 206 insertions(+) create mode 100644 drivers/phy/Kconfig (limited to 'drivers/phy/Kconfig') diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig new file mode 100644 index 000000000..19f3b7d12 --- /dev/null +++ b/drivers/phy/Kconfig @@ -0,0 +1,206 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# PHY +# + +menu "PHY Subsystem" + +config PHY_COMMON_PROPS + bool "PHY common properties" if KUNIT_ALL_TESTS + help + This parses properties common between generic PHYs and Ethernet PHYs. + + Select this from consumer drivers to gain access to helpers for + parsing properties from the + Documentation/devicetree/bindings/phy/phy-common-props.yaml schema. + +config PHY_COMMON_PROPS_TEST + tristate "KUnit tests for PHY common props" if !KUNIT_ALL_TESTS + depends on KUNIT && PHY_COMMON_PROPS + default KUNIT_ALL_TESTS + help + This builds KUnit tests for the PHY common property API. + + For more information on KUnit and unit tests in general, + please refer to the KUnit documentation in Documentation/dev-tools/kunit/. + + When in doubt, say N. + +config GENERIC_PHY + bool "PHY Core" + help + Generic PHY support. + + This framework is designed to provide a generic interface for PHY + devices present in the kernel. This layer will have the generic + API by which phy drivers can create PHY using the phy framework and + phy users can obtain reference to the PHY. All the users of this + framework should select this config. + +config GENERIC_PHY_MIPI_DPHY + bool + select GENERIC_PHY + help + Generic MIPI D-PHY support. + + Provides a number of helpers a core functions for MIPI D-PHY + drivers to us. + +config PHY_AIROHA_PCIE + tristate "Airoha PCIe-PHY Driver" + depends on ARCH_AIROHA || COMPILE_TEST + depends on OF + select GENERIC_PHY + help + Say Y here to add support for Airoha PCIe PHY driver. + This driver create the basic PHY instance and provides initialize + callback for PCIe GEN3 port. + +config PHY_CAN_TRANSCEIVER + tristate "CAN transceiver PHY" + select GENERIC_PHY + select MULTIPLEXER + help + This option enables support for CAN transceivers as a PHY. This + driver provides function for putting the transceivers in various + functional modes using gpios and sets the attribute max link + rate, for CAN drivers. + +config PHY_EYEQ5_ETH + tristate "Ethernet PHY Driver on EyeQ5" + depends on OF + depends on MACH_EYEQ5 || COMPILE_TEST + select AUXILIARY_BUS + select GENERIC_PHY + default MACH_EYEQ5 + help + Enable this to support the Ethernet PHY integrated on EyeQ5. + It supports both RGMII and SGMII. Registers are located in a + shared register region called OLB. If M is selected, the + module will be called phy-eyeq5-eth. + +config PHY_ECONET_PCIE + tristate "EcoNet PCIe-PHY Driver" + depends on ECONET || COMPILE_TEST + depends on OF + select GENERIC_PHY + select REGMAP_MMIO + help + Say Y here to add support for EcoNet PCIe PHY driver. + This driver create the basic PHY instance and provides initialize + callback for PCIe GEN1 and GEN2 ports. This PHY is found on + EcoNet SoCs including EN751221 and EN7528. + +config PHY_GOOGLE_USB + tristate "Google Tensor SoC USB PHY driver" + select GENERIC_PHY + depends on TYPEC + help + Enable support for the USB PHY on Google Tensor SoCs, starting with + the G5 generation (Laguna). This driver provides the PHY interfaces + to interact with the SNPS eUSB2 and USB 3.2/DisplayPort Combo PHY, + both of which are integrated with the DWC3 USB DRD controller. + This driver currently supports USB high-speed. + +config USB_LGM_PHY + tristate "INTEL Lightning Mountain USB PHY Driver" + depends on USB_SUPPORT + depends on X86 || COMPILE_TEST + select USB_PHY + select REGULATOR + select REGULATOR_FIXED_VOLTAGE + help + Enable this to support Intel DWC3 PHY USB phy. This driver provides + interface to interact with USB GEN-II and USB 3.x PHY that is part + of the Intel network SOC. + +config PHY_LPC18XX_USB_OTG + tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" + depends on OF && (ARCH_LPC18XX || COMPILE_TEST) + depends on MFD_SYSCON + select GENERIC_PHY + help + Enable this to support NXP LPC18xx/43xx internal USB OTG PHY. + + This driver is need for USB0 support on LPC18xx/43xx and takes + care of enabling and clock setup. + +config PHY_NXP_PTN3222 + tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" + depends on I2C + depends on OF + select GENERIC_PHY + help + Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. + This redriver performs translation between eUSB2 and USB2 signalling + schemes. It supports all three USB 2.0 data rates: Low Speed, Full + Speed and High Speed. + +config PHY_NXP_TJA1145 + tristate "NXP TJA1145 CAN transceiver PHY" + select GENERIC_PHY + select REGMAP_SPI + depends on SPI + help + This option enables support for NXPs TJA1145 CAN transceiver as a PHY. + This driver provides function for putting the transceiver in various + functional modes using SPI commands. + +config PHY_PISTACHIO_USB + tristate "IMG Pistachio USB2.0 PHY driver" + depends on MIPS || COMPILE_TEST + select GENERIC_PHY + help + Enable this to support the USB2.0 PHY on the IMG Pistachio SoC. + +config PHY_SNPS_EUSB2 + tristate "SNPS eUSB2 PHY Driver" + depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST) + select GENERIC_PHY + help + Enable support for the USB high-speed SNPS eUSB2 phy on select + SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller. + +config PHY_XGENE + tristate "APM X-Gene 15Gbps PHY support" + depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST) + select GENERIC_PHY + help + This option enables support for APM X-Gene SoC multi-purpose PHY. + +source "drivers/phy/allwinner/Kconfig" +source "drivers/phy/amlogic/Kconfig" +source "drivers/phy/apple/Kconfig" +source "drivers/phy/axiado/Kconfig" +source "drivers/phy/broadcom/Kconfig" +source "drivers/phy/cadence/Kconfig" +source "drivers/phy/canaan/Kconfig" +source "drivers/phy/eswin/Kconfig" +source "drivers/phy/freescale/Kconfig" +source "drivers/phy/hisilicon/Kconfig" +source "drivers/phy/ingenic/Kconfig" +source "drivers/phy/intel/Kconfig" +source "drivers/phy/lantiq/Kconfig" +source "drivers/phy/marvell/Kconfig" +source "drivers/phy/mediatek/Kconfig" +source "drivers/phy/microchip/Kconfig" +source "drivers/phy/motorola/Kconfig" +source "drivers/phy/mscc/Kconfig" +source "drivers/phy/nuvoton/Kconfig" +source "drivers/phy/qualcomm/Kconfig" +source "drivers/phy/ralink/Kconfig" +source "drivers/phy/realtek/Kconfig" +source "drivers/phy/renesas/Kconfig" +source "drivers/phy/rockchip/Kconfig" +source "drivers/phy/samsung/Kconfig" +source "drivers/phy/socionext/Kconfig" +source "drivers/phy/sophgo/Kconfig" +source "drivers/phy/spacemit/Kconfig" +source "drivers/phy/st/Kconfig" +source "drivers/phy/starfive/Kconfig" +source "drivers/phy/sunplus/Kconfig" +source "drivers/phy/tegra/Kconfig" +source "drivers/phy/ti/Kconfig" +source "drivers/phy/xilinx/Kconfig" + +endmenu -- cgit v1.3.1