From a5bde5d8fde8a8cb28e59a672d5ddc5b9c1e7656 Mon Sep 17 00:00:00 2001 From: Breno Leitao Date: Wed, 5 Aug 2026 07:52:36 -0700 Subject: workqueue: skip the node_nr_active update for non-unbound workqueues apply_wqattrs_commit() updates node_nr_active->max unconditionally. wq->node_nr_active[] is only allocated for unbound workqueues, so guard the call before per-cpu workqueues start using this path. No functional change: only unbound workqueues reach apply_wqattrs_*() today. Signed-off-by: Breno Leitao Signed-off-by: Tejun Heo --- drivers/pci/pwrctrl/Kconfig | 50 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 drivers/pci/pwrctrl/Kconfig (limited to 'drivers/pci/pwrctrl/Kconfig') diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig new file mode 100644 index 000000000..9eec767cd --- /dev/null +++ b/drivers/pci/pwrctrl/Kconfig @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config HAVE_PWRCTRL + bool + +config PCI_PWRCTRL + tristate + +config PCI_PWRCTRL_PWRSEQ + tristate + select POWER_SEQUENCING + select PCI_PWRCTRL + +config PCI_PWRCTRL_GENERIC + tristate "Generic PCI Power Control driver for PCI slots and endpoints" + select POWER_SEQUENCING + select PCI_PWRCTRL + help + Say Y here to enable the generic PCI Power Control driver to control + the power state of PCI slots and endpoints. + + This is a generic driver that controls the power state of different + PCI slots and endpoints. The voltage regulators powering the rails + of the PCI slots or endpoints are expected to be defined in the + devicetree node of the PCI bridge or endpoint. + +config PCI_PWRCTRL_TC9563 + tristate "PCI Power Control driver for TC9563 PCIe switch" + select PCI_PWRCTRL + default m if ARCH_QCOM + depends on I2C + help + Say Y here to enable the PCI Power Control driver of TC9563 PCIe + switch. + + This driver enables power and configures the TC9563 PCIe switch + through i2c. TC9563 is a PCIe switch which has one upstream and three + downstream ports. To one of the downstream ports integrated ethernet + MAC is connected as endpoint device. Other two downstream ports are + supposed to connect to external device. + +# deprecated +config HAVE_PWRCTL + bool + select HAVE_PWRCTRL + +# deprecated +config PCI_PWRCTL_PWRSEQ + tristate + select PCI_PWRCTRL_PWRSEQ -- cgit v1.3.1