From 27600805e62f800bacf990354632eae4e487d34c Mon Sep 17 00:00:00 2001 From: Yazen Ghannam Date: Thu, 3 Sep 2026 10:43:25 -0500 Subject: x86/amd_node: Fix PCI device reference counting in amd_smn_init() The local "root" pointer is a temporary variable used during the device search. Therefore, refcount related to the search iterators should be cleaned up after the search is complete. Use the __free() cleanup macro to ensure the refcount is decremented when the temporary pointer goes out of scope. Additionally, increment the refcount when caching a root pointer. This ensures the in-use refcount is separate from the temporary search refcounting. Finally, drop the redundant "root = NULL" before the second search loop. The pci_get_class() iterator always decrements the refcount of its "from" argument, so the first loop can only fall through with "root" already NULL. Fixes: 0a4b61d9c2e4 ("x86/amd_node: Fix AMD root device caching") Closes: https://sashiko.dev/#/patchset/20260806160159.230453-1-jason.andryuk%40amd.com Reported-by: Sashiko Assisted-by: LLM Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Mario Limonciello (AMD) Cc: Link: https://patch.msgid.link/20260903154325.74343-1-yazen.ghannam@amd.com --- drivers/parisc/gsc.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 drivers/parisc/gsc.h (limited to 'drivers/parisc/gsc.h') diff --git a/drivers/parisc/gsc.h b/drivers/parisc/gsc.h new file mode 100644 index 000000000..73cbd0bb1 --- /dev/null +++ b/drivers/parisc/gsc.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * drivers/parisc/gsc.h + * Declarations for functions in gsc.c + * Copyright (c) 2000-2002 Helge Deller, Matthew Wilcox + */ + +#include +#include +#include + +#define OFFSET_IRR 0x0000 /* Interrupt request register */ +#define OFFSET_IMR 0x0004 /* Interrupt mask register */ +#define OFFSET_IPR 0x0008 /* Interrupt pending register */ +#define OFFSET_ICR 0x000C /* Interrupt control register */ +#define OFFSET_IAR 0x0010 /* Interrupt address register */ + +/* PA I/O Architected devices support at least 5 bits in the EIM register. */ +#define GSC_EIM_WIDTH 5 + +struct gsc_irq { + unsigned long txn_addr; /* IRQ "target" */ + int txn_data; /* HW "IRQ" */ + int irq; /* virtual IRQ */ +}; + +struct gsc_asic { + struct parisc_device *gsc; + unsigned long hpa; + char *name; + int version; + int type; + int eim; + struct gsc_irq gsc_irq; + int global_irq[32]; +}; + +int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic); +int gsc_alloc_irq(struct gsc_irq *dev); /* dev needs an irq */ +int gsc_claim_irq(struct gsc_irq *dev, int irq); /* dev needs this irq */ +int gsc_assign_irq(struct irq_chip *type, void *data); +int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit); +void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl, + void (*choose)(struct parisc_device *child, void *ctrl)); +void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp); + +irqreturn_t gsc_asic_intr(int irq, void *dev); -- cgit v1.3.1