From a5bde5d8fde8a8cb28e59a672d5ddc5b9c1e7656 Mon Sep 17 00:00:00 2001 From: Breno Leitao Date: Wed, 5 Aug 2026 07:52:36 -0700 Subject: workqueue: skip the node_nr_active update for non-unbound workqueues apply_wqattrs_commit() updates node_nr_active->max unconditionally. wq->node_nr_active[] is only allocated for unbound workqueues, so guard the call before per-cpu workqueues start using this path. No functional change: only unbound workqueues reach apply_wqattrs_*() today. Signed-off-by: Breno Leitao Signed-off-by: Tejun Heo --- drivers/mfd/intel-lpss.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 drivers/mfd/intel-lpss.h (limited to 'drivers/mfd/intel-lpss.h') diff --git a/drivers/mfd/intel-lpss.h b/drivers/mfd/intel-lpss.h new file mode 100644 index 000000000..6f8f668f4 --- /dev/null +++ b/drivers/mfd/intel-lpss.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Intel LPSS core support. + * + * Copyright (C) 2015, Intel Corporation + * + * Authors: Andy Shevchenko + * Mika Westerberg + */ + +#ifndef __MFD_INTEL_LPSS_H +#define __MFD_INTEL_LPSS_H + +#include +#include + +/* + * Some DSDTs have an unused GEXP ACPI device conflicting with I2C4 resources. + * Set to ignore resource conflicts with ACPI declared SystemMemory regions. + */ +#define QUIRK_IGNORE_RESOURCE_CONFLICTS BIT(0) +/* + * Some devices have misconfigured clock divider due to a firmware bug. + * Set this to force the clock divider to 1:1 ratio. + */ +#define QUIRK_CLOCK_DIVIDER_UNITY BIT(1) + +struct device; +struct resource; +struct software_node; + +struct intel_lpss_platform_info { + struct resource *mem; + int irq; + unsigned int quirks; + unsigned long clk_rate; + const char *clk_con_id; + const struct software_node *swnode; +}; + +int intel_lpss_probe(struct device *dev, + const struct intel_lpss_platform_info *info); +void intel_lpss_remove(struct device *dev); + +extern const struct dev_pm_ops intel_lpss_pm_ops; + +#endif /* __MFD_INTEL_LPSS_H */ -- cgit v1.3.1