From cf9610f9116d55c5a66ef9f1faecacabd93a9322 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 24 Aug 2026 08:46:03 -0700 Subject: Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use the non-blocking mux_state_try_select() in the generic MUX pin control back-end - Free pin maps on pinctrl_generic_to_map() failure in the core helpers New hardware pin control: - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC (this is for the low power audio, LPASS = Low Power Audio SubSystem portions) - Upboard support on top of the Intel pin controller - Apple T6030 and T6031 support (just compatible strings) - Samsung Exynos 8855 SoC - Mediatek MT6858 SoC - Rockchip RK3308B and RV1106 SoCs - Airoha EN7523 and AN7563 SoCs Improvements: - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable - Qualcomm improvements on top of the Qualcomm PDC (power domain controller) irqchip improvements from tglx:s tree - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups - The NPCM8xx driver has been put into shape fixing many pin and group definitions - Some non-urgent Tegra 264 pin assignments are fixed up - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and pin assignments, missing features etc" * tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits) dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema pinctrl: meson: sync some modify from A4 pinctrl: meson: a4: Add input enable pin configuration pinctrl: realtek: rtd1625: remove unused group name spdif_sel pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13 dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Revert "Merge branch 'ib-rsk7204' into devel" pinctrl: rockchip: Add RV1106 pinctrl support dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Decode drive strength in the get function pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable pinctrl: airoha: add support of an7563 SoC dt-bindings: pinctrl: airoha: add support of an7563 pin controller pinctrl: airoha: try to find chip scu node by phandle first pinctrl: airoha: add support of en7523 SoC dt-bindings: pinctrl: airoha: add support of en7523 pin controller pinctrl: airoha: an7583: add support for olt pinmux pinctrl: airoha: an7583: add support for pon_alt pinmux pinctrl: airoha: an7583: add support for npu_uart pinmux dt-bindings: pinctrl: airoha: an7583: add missed features ... --- drivers/interconnect/trace.h | 88 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 drivers/interconnect/trace.h (limited to 'drivers/interconnect/trace.h') diff --git a/drivers/interconnect/trace.h b/drivers/interconnect/trace.h new file mode 100644 index 000000000..206373546 --- /dev/null +++ b/drivers/interconnect/trace.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Interconnect framework tracepoints + * Copyright (c) 2019, Linaro Ltd. + * Author: Georgi Djakov + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM interconnect + +#if !defined(_TRACE_INTERCONNECT_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_INTERCONNECT_H + +#include +#include + +TRACE_EVENT(icc_set_bw, + + TP_PROTO(struct icc_path *p, struct icc_node *n, int i, + u32 avg_bw, u32 peak_bw), + + TP_ARGS(p, n, i, avg_bw, peak_bw), + + TP_STRUCT__entry( + __string(path_name, p->name) + __string(dev, dev_name(p->reqs[i].dev)) + __string(node_name, n->name) + __field(u32, avg_bw) + __field(u32, peak_bw) + __field(u32, node_avg_bw) + __field(u32, node_peak_bw) + ), + + TP_fast_assign( + __assign_str(path_name); + __assign_str(dev); + __assign_str(node_name); + __entry->avg_bw = avg_bw; + __entry->peak_bw = peak_bw; + __entry->node_avg_bw = n->avg_bw; + __entry->node_peak_bw = n->peak_bw; + ), + + TP_printk("path=%s dev=%s node=%s avg_bw=%u peak_bw=%u agg_avg=%u agg_peak=%u", + __get_str(path_name), + __get_str(dev), + __get_str(node_name), + __entry->avg_bw, + __entry->peak_bw, + __entry->node_avg_bw, + __entry->node_peak_bw) +); + +TRACE_EVENT(icc_set_bw_end, + + TP_PROTO(struct icc_path *p, int ret), + + TP_ARGS(p, ret), + + TP_STRUCT__entry( + __string(path_name, p->name) + __string(dev, dev_name(p->reqs[0].dev)) + __field(int, ret) + ), + + TP_fast_assign( + __assign_str(path_name); + __assign_str(dev); + __entry->ret = ret; + ), + + TP_printk("path=%s dev=%s ret=%d", + __get_str(path_name), + __get_str(dev), + __entry->ret) +); + +#endif /* _TRACE_INTERCONNECT_H */ + +/* This part must be outside protection */ + +#undef TRACE_INCLUDE_PATH +#define TRACE_INCLUDE_PATH . + +#undef TRACE_INCLUDE_FILE +#define TRACE_INCLUDE_FILE trace + +#include -- cgit v1.3.1