From 2bc6b218717b9d08f466f88209251d54bc09b207 Mon Sep 17 00:00:00 2001 From: Fuad Tabba Date: Tue, 22 Sep 2026 19:14:30 +0100 Subject: arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 __init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2. PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a write from EL0 reaches the trap and takes the host down without a panic message. Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9 bits. Fixes: 858c7bfcb35e1 ("arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9") Cc: stable@vger.kernel.org Signed-off-by: Fuad Tabba Reviewed-by: Anshuman Khandual Reviewed-by: Oliver Upton Signed-off-by: Will Deacon --- drivers/clocksource/mmio.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 drivers/clocksource/mmio.c (limited to 'drivers/clocksource/mmio.c') diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c new file mode 100644 index 000000000..0fee8edb8 --- /dev/null +++ b/drivers/clocksource/mmio.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generic MMIO clocksource support + */ +#include +#include +#include +#include + +struct clocksource_mmio { + void __iomem *reg; + struct clocksource clksrc; +}; + +static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c) +{ + return container_of(c, struct clocksource_mmio, clksrc); +} + +u64 clocksource_mmio_readl_up(struct clocksource *c) +{ + return (u64)readl_relaxed(to_mmio_clksrc(c)->reg); +} +EXPORT_SYMBOL_GPL(clocksource_mmio_readl_up); + +u64 clocksource_mmio_readl_down(struct clocksource *c) +{ + return ~(u64)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask; +} +EXPORT_SYMBOL_GPL(clocksource_mmio_readl_down); + +u64 clocksource_mmio_readw_up(struct clocksource *c) +{ + return (u64)readw_relaxed(to_mmio_clksrc(c)->reg); +} +EXPORT_SYMBOL_GPL(clocksource_mmio_readw_up); + +u64 clocksource_mmio_readw_down(struct clocksource *c) +{ + return ~(u64)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask; +} +EXPORT_SYMBOL_GPL(clocksource_mmio_readw_down); + +/** + * clocksource_mmio_init - Initialize a simple mmio based clocksource + * @base: Virtual address of the clock readout register + * @name: Name of the clocksource + * @hz: Frequency of the clocksource in Hz + * @rating: Rating of the clocksource + * @bits: Number of valid bits + * @read: One of clocksource_mmio_read*() above + */ +int clocksource_mmio_init(void __iomem *base, const char *name, + unsigned long hz, int rating, unsigned bits, + u64 (*read)(struct clocksource *)) +{ + struct clocksource_mmio *cs; + + if (bits > 64 || bits < 16) + return -EINVAL; + + cs = kzalloc_obj(struct clocksource_mmio); + if (!cs) + return -ENOMEM; + + cs->reg = base; + cs->clksrc.name = name; + cs->clksrc.rating = rating; + cs->clksrc.read = read; + cs->clksrc.mask = CLOCKSOURCE_MASK(bits); + cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; + + return clocksource_register_hz(&cs->clksrc, hz); +} +EXPORT_SYMBOL_GPL(clocksource_mmio_init); -- cgit v1.3.1