From 6668ed271eaefaa63e686bdfbedaeb7b8e492722 Mon Sep 17 00:00:00 2001 From: Kumar Kartikeya Dwivedi Date: Fri, 4 Sep 2026 10:43:19 +0200 Subject: selftests/bpf: Reject graph kptr use after RCU unlock Add a sleepable verifier test that loads a graph-node local kptr in an explicit RCU read-side critical section, then passes its node to bpf_rbtree_remove() after the section ends. Before the verifier fix, the stale NON_OWN_REF flag makes the node look like a live borrowed reference and the program is accepted. After the fix, the pointer is demoted without NON_OWN_REF and the graph kfunc argument is rejected. Also exercise a graph kptr loaded while a spin lock provides implicit RCU protection. The pointer must be invalidated when the lock is released, which guards the required ordering between non-owning-reference invalidation and RCU demotion. Update the existing fault-protected load test state description. The post-unlock pointer no longer carries NON_OWN_REF, but remains readable because the load is rewritten to use BPF_PROBE_MEM. Signed-off-by: Kumar Kartikeya Dwivedi Link: https://lore.kernel.org/r/20260904084325.52250-7-memxor@gmail.com Signed-off-by: Alexei Starovoitov --- drivers/clk/microchip/clk-pic32.h | 76 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 drivers/clk/microchip/clk-pic32.h (limited to 'drivers/clk/microchip/clk-pic32.h') diff --git a/drivers/clk/microchip/clk-pic32.h b/drivers/clk/microchip/clk-pic32.h new file mode 100644 index 000000000..acb81739a --- /dev/null +++ b/drivers/clk/microchip/clk-pic32.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Purna Chandra Mandal, + * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. + */ +#ifndef __MICROCHIP_CLK_PIC32_H_ +#define __MICROCHIP_CLK_PIC32_H_ + +#include + +/* PIC32 clock data */ +struct pic32_clk_common { + struct device *dev; + void __iomem *iobase; + spinlock_t reg_lock; /* clock lock */ +}; + +/* System PLL clock */ +struct pic32_sys_pll_data { + struct clk_init_data init_data; + const u32 ctrl_reg; + const u32 status_reg; + const u32 lock_mask; +}; + +/* System clock */ +struct pic32_sys_clk_data { + struct clk_init_data init_data; + const u32 mux_reg; + const u32 slew_reg; + const u32 *parent_map; + const u32 slew_div; +}; + +/* Reference Oscillator clock */ +struct pic32_ref_osc_data { + struct clk_init_data init_data; + const u32 ctrl_reg; + const u32 *parent_map; +}; + +/* Peripheral Bus clock */ +struct pic32_periph_clk_data { + struct clk_init_data init_data; + const u32 ctrl_reg; +}; + +/* External Secondary Oscillator clock */ +struct pic32_sec_osc_data { + struct clk_init_data init_data; + const u32 enable_reg; + const u32 status_reg; + const u32 enable_mask; + const u32 status_mask; + const unsigned long fixed_rate; +}; + +extern const struct clk_ops pic32_pbclk_ops; +extern const struct clk_ops pic32_sclk_ops; +extern const struct clk_ops pic32_sclk_no_div_ops; +extern const struct clk_ops pic32_spll_ops; +extern const struct clk_ops pic32_roclk_ops; +extern const struct clk_ops pic32_sosc_ops; + +struct clk *pic32_periph_clk_register(const struct pic32_periph_clk_data *data, + struct pic32_clk_common *core); +struct clk *pic32_refo_clk_register(const struct pic32_ref_osc_data *data, + struct pic32_clk_common *core); +struct clk *pic32_sys_clk_register(const struct pic32_sys_clk_data *data, + struct pic32_clk_common *core); +struct clk *pic32_spll_clk_register(const struct pic32_sys_pll_data *data, + struct pic32_clk_common *core); +struct clk *pic32_sosc_clk_register(const struct pic32_sec_osc_data *data, + struct pic32_clk_common *core); + +#endif /* __MICROCHIP_CLK_PIC32_H_*/ -- cgit v1.3.1