From 0102c8c7fdfc4bd700971daff2b94470f4eafae4 Mon Sep 17 00:00:00 2001 From: Dapeng Mi Date: Thu, 17 Sep 2026 09:52:33 +0800 Subject: perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rsp DMR introduces Offmodule Response events in place of the legacy Offcore Response events, but it still exposes the inherited offcore_rsp PMU attribute for programming the corresponding MSR data. Rename the DMR PMU attribute to offmodule_rsp so the sysfs interface matches the underlying event name and avoids user & tooling confusion. Signed-off-by: Dapeng Mi Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Ingo Molnar Link: https://patch.msgid.link/20260917015234.981153-12-dapeng1.mi@linux.intel.com --- arch/powerpc/boot/4xx.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 arch/powerpc/boot/4xx.h (limited to 'arch/powerpc/boot/4xx.h') diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h new file mode 100644 index 000000000..62df496b7 --- /dev/null +++ b/arch/powerpc/boot/4xx.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * PowerPC 4xx related functions + * + * Copyright 2007 IBM Corporation. + * Josh Boyer + */ +#ifndef _POWERPC_BOOT_4XX_H_ +#define _POWERPC_BOOT_4XX_H_ + +void ibm4xx_sdram_fixup_memsize(void); +void ibm440spe_fixup_memsize(void); +void ibm4xx_denali_fixup_memsize(void); +void ibm44x_dbcr_reset(void); +void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); +void ibm4xx_fixup_ebc_ranges(const char *ebc); + +void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk); +void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, + unsigned int tmr_clk); +void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, + unsigned int tmr_clk); +void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk, + unsigned int tmr_clk); + +#endif /* _POWERPC_BOOT_4XX_H_ */ -- cgit v1.3.1