From a5f7a5bb3b7f28ba7e4fa246775b29a0e5537255 Mon Sep 17 00:00:00 2001 From: Jinke Han Date: Tue, 8 Sep 2026 15:37:42 +0800 Subject: x86/kprobes: Fix crash when probing CS CALL instructions When using eBPF to probe CS CALL instructions within a function, a crash can be triggered. The eBPF tool probes offset 257 of the __hrtimer_run_queues() function: <__hrtimer_run_queues+249>: nopl 0x0(%rax,%rax,1) <__hrtimer_run_queues+254>: mov %r14,%rdi <__hrtimer_run_queues+257>: cs call <__x86_indirect_thunk_r12> <__hrtimer_run_queues+263>: mov %eax,%r12d <__hrtimer_run_queues+266>: xchg %ax,%ax <__hrtimer_run_queues+268>: mov %r13,%rdi Which triggers this crash: BUG: unable to handle page fault for address: 00000000000f41c9 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 0 P4D 0 Oops: 0002 [#1] SMP NOPTI CPU: 1 PID: 0 Comm: swapper/1 Kdump: loaded Tainted: P RIP: 0010:__hrtimer_run_queues+0x106/0x230 Note that __hrtimer_run_queues+0x106 is __hrtimer_run_queues+262, which is at the 6th byte of the above CS CALL instruction. Since the CS CALL instruction occupies 6 bytes, the exception occurred in the middle of that call instruction. The root cause is that when using eBPF tools to probe in the middle of a function, a kprobe with INT3 is used as the underlying implementation. During single-step emulation of the original CALL instruction, int3_emulate_call() assumes that the probed CALL instruction is 5 bytes long. However, the actual CS-prefixed CALL instruction occupies 6 bytes, so it constructs an incorrect exception return address. When the CPU returns from the kprobe handler, the next instruction to be executed is at the address of the last byte of that CS CALL instruction. Coincidentally, starting from that address, the CPU fetches and decodes a completely different instruction, which ultimately triggers a kernel crash. Fix the issue by using the actual instruction length obtained from the instruction decoder when constructing the exception return address, rather than relying on the hardcoded CALL_INSN_SIZE macro. [ mingo: Refined the changelog ] Fixes: 6256e668b7af ("x86/kprobes: Use int3 instead of debug trap for single-step") Suggested-by: Masami Hiramatsu (Google) Signed-off-by: Jinke Han Signed-off-by: Ingo Molnar Reviewed-by: Masami Hiramatsu (Google) Acked-by: Yafang Shao Acked-by: Borislav Petkov Cc: Peter Zijlstra Link: https://patch.msgid.link/20260908073742.GA10517@didi-ThinkCentre-M920t-N000 --- arch/mips/cobalt/Makefile | 8 ++++ arch/mips/cobalt/Platform | 5 ++ arch/mips/cobalt/buttons.c | 41 ++++++++++++++++ arch/mips/cobalt/irq.c | 64 +++++++++++++++++++++++++ arch/mips/cobalt/lcd.c | 42 ++++++++++++++++ arch/mips/cobalt/led.c | 49 +++++++++++++++++++ arch/mips/cobalt/mtd.c | 47 ++++++++++++++++++ arch/mips/cobalt/pci.c | 48 +++++++++++++++++++ arch/mips/cobalt/reset.c | 52 ++++++++++++++++++++ arch/mips/cobalt/rtc.c | 51 ++++++++++++++++++++ arch/mips/cobalt/serial.c | 73 ++++++++++++++++++++++++++++ arch/mips/cobalt/setup.c | 116 +++++++++++++++++++++++++++++++++++++++++++++ arch/mips/cobalt/time.c | 41 ++++++++++++++++ 13 files changed, 637 insertions(+) create mode 100644 arch/mips/cobalt/Makefile create mode 100644 arch/mips/cobalt/Platform create mode 100644 arch/mips/cobalt/buttons.c create mode 100644 arch/mips/cobalt/irq.c create mode 100644 arch/mips/cobalt/lcd.c create mode 100644 arch/mips/cobalt/led.c create mode 100644 arch/mips/cobalt/mtd.c create mode 100644 arch/mips/cobalt/pci.c create mode 100644 arch/mips/cobalt/reset.c create mode 100644 arch/mips/cobalt/rtc.c create mode 100644 arch/mips/cobalt/serial.c create mode 100644 arch/mips/cobalt/setup.c create mode 100644 arch/mips/cobalt/time.c (limited to 'arch/mips/cobalt') diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile new file mode 100644 index 000000000..f0e2c26c8 --- /dev/null +++ b/arch/mips/cobalt/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for the Cobalt micro systems family specific parts of the kernel +# + +obj-y := buttons.o irq.o lcd.o led.o mtd.o reset.o rtc.o serial.o setup.o time.o + +obj-$(CONFIG_PCI) += pci.o diff --git a/arch/mips/cobalt/Platform b/arch/mips/cobalt/Platform new file mode 100644 index 000000000..4254895ad --- /dev/null +++ b/arch/mips/cobalt/Platform @@ -0,0 +1,5 @@ +# +# Cobalt Server +# +cflags-$(CONFIG_MIPS_COBALT) += -I$(srctree)/arch/mips/include/asm/mach-cobalt +load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 diff --git a/arch/mips/cobalt/buttons.c b/arch/mips/cobalt/buttons.c new file mode 100644 index 000000000..0f9299fe5 --- /dev/null +++ b/arch/mips/cobalt/buttons.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Cobalt buttons platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + */ + +#include +#include +#include + +static struct resource cobalt_buttons_resource __initdata = { + .start = 0x1d000000, + .end = 0x1d000003, + .flags = IORESOURCE_MEM, +}; + +static __init int cobalt_add_buttons(void) +{ + struct platform_device *pd; + int error; + + pd = platform_device_alloc("Cobalt buttons", -1); + if (!pd) + return -ENOMEM; + + error = platform_device_add_resources(pd, &cobalt_buttons_resource, 1); + if (error) + goto err_free_device; + + error = platform_device_add(pd); + if (error) + goto err_free_device; + + return 0; + + err_free_device: + platform_device_put(pd); + return error; +} +device_initcall(cobalt_add_buttons); diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c new file mode 100644 index 000000000..ead5ae413 --- /dev/null +++ b/arch/mips/cobalt/irq.c @@ -0,0 +1,64 @@ +/* + * IRQ vector handles + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned pending = read_c0_status() & read_c0_cause() & ST0_IM; + int irq; + + if (pending & CAUSEF_IP2) + gt641xx_irq_dispatch(); + else if (pending & CAUSEF_IP6) { + irq = i8259_irq(); + if (irq < 0) + spurious_interrupt(); + else + do_IRQ(irq); + } else if (pending & CAUSEF_IP3) + do_IRQ(MIPS_CPU_IRQ_BASE + 3); + else if (pending & CAUSEF_IP4) + do_IRQ(MIPS_CPU_IRQ_BASE + 4); + else if (pending & CAUSEF_IP5) + do_IRQ(MIPS_CPU_IRQ_BASE + 5); + else if (pending & CAUSEF_IP7) + do_IRQ(MIPS_CPU_IRQ_BASE + 7); + else + spurious_interrupt(); +} + +void __init arch_init_irq(void) +{ + mips_cpu_irq_init(); + gt641xx_irq_init(); + init_i8259_irqs(); + + if (request_irq(GT641XX_CASCADE_IRQ, no_action, IRQF_NO_THREAD, + "cascade", NULL)) { + pr_err("Failed to request irq %d (cascade)\n", + GT641XX_CASCADE_IRQ); + } + if (request_irq(I8259_CASCADE_IRQ, no_action, IRQF_NO_THREAD, + "cascade", NULL)) { + pr_err("Failed to request irq %d (cascade)\n", + I8259_CASCADE_IRQ); + } +} diff --git a/arch/mips/cobalt/lcd.c b/arch/mips/cobalt/lcd.c new file mode 100644 index 000000000..7d43b5ec3 --- /dev/null +++ b/arch/mips/cobalt/lcd.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Registration of Cobalt LCD platform device. + * + * Copyright (C) 2008 Yoichi Yuasa + */ +#include +#include +#include +#include + +static struct resource cobalt_lcd_resource __initdata = { + .start = 0x1f000000, + .end = 0x1f00001f, + .flags = IORESOURCE_MEM, +}; + +static __init int cobalt_lcd_add(void) +{ + struct platform_device *pdev; + int retval; + + pdev = platform_device_alloc("cobalt-lcd", -1); + if (!pdev) + return -ENOMEM; + + retval = platform_device_add_resources(pdev, &cobalt_lcd_resource, 1); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_lcd_add); diff --git a/arch/mips/cobalt/led.c b/arch/mips/cobalt/led.c new file mode 100644 index 000000000..196660cac --- /dev/null +++ b/arch/mips/cobalt/led.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Registration of Cobalt LED platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + */ +#include +#include +#include +#include + +#include + +static struct resource cobalt_led_resource __initdata = { + .start = 0x1c000000, + .end = 0x1c000000, + .flags = IORESOURCE_MEM, +}; + +static __init int cobalt_led_add(void) +{ + struct platform_device *pdev; + int retval; + + if (cobalt_board_id == COBALT_BRD_ID_QUBE1 || + cobalt_board_id == COBALT_BRD_ID_QUBE2) + pdev = platform_device_alloc("cobalt-qube-leds", -1); + else + pdev = platform_device_alloc("cobalt-raq-leds", -1); + + if (!pdev) + return -ENOMEM; + + retval = platform_device_add_resources(pdev, &cobalt_led_resource, 1); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_led_add); diff --git a/arch/mips/cobalt/mtd.c b/arch/mips/cobalt/mtd.c new file mode 100644 index 000000000..95f579d8c --- /dev/null +++ b/arch/mips/cobalt/mtd.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Registration of Cobalt MTD device. + * + * Copyright (C) 2006 Yoichi Yuasa + */ +#include +#include +#include +#include + +static struct mtd_partition cobalt_mtd_partitions[] = { + { + .name = "firmware", + .offset = 0x0, + .size = 0x80000, + }, +}; + +static struct physmap_flash_data cobalt_flash_data = { + .width = 1, + .nr_parts = 1, + .parts = cobalt_mtd_partitions, +}; + +static struct resource cobalt_mtd_resource = { + .start = 0x1fc00000, + .end = 0x1fc7ffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device cobalt_mtd = { + .name = "physmap-flash", + .dev = { + .platform_data = &cobalt_flash_data, + }, + .num_resources = 1, + .resource = &cobalt_mtd_resource, +}; + +static int __init cobalt_mtd_init(void) +{ + platform_device_register(&cobalt_mtd); + + return 0; +} +device_initcall(cobalt_mtd_init); diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c new file mode 100644 index 000000000..85ec9cc31 --- /dev/null +++ b/arch/mips/cobalt/pci.c @@ -0,0 +1,48 @@ +/* + * Register PCI controller. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) + * + */ +#include +#include + +#include + +extern struct pci_ops gt64xxx_pci0_ops; + +static struct resource cobalt_mem_resource = { + .start = GT_DEF_PCI0_MEM0_BASE, + .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1, + .name = "PCI memory", + .flags = IORESOURCE_MEM, +}; + +static struct resource cobalt_io_resource = { + .start = 0x1000, + .end = 0xffffffUL, + .name = "PCI I/O", + .flags = IORESOURCE_IO, +}; + +static struct pci_controller cobalt_pci_controller = { + .pci_ops = >64xxx_pci0_ops, + .mem_resource = &cobalt_mem_resource, + .io_resource = &cobalt_io_resource, + .io_offset = 0 - GT_DEF_PCI0_IO_BASE, + .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE), +}; + +static int __init cobalt_pci_init(void) +{ + register_pci_controller(&cobalt_pci_controller); + + return 0; +} + +arch_initcall(cobalt_pci_init); diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c new file mode 100644 index 000000000..4eedd481d --- /dev/null +++ b/arch/mips/cobalt/reset.c @@ -0,0 +1,52 @@ +/* + * Cobalt Reset operations + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1995, 1996, 1997 by Ralf Baechle + * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) + */ +#include +#include +#include + +#include +#include + +#include + +#define RESET_PORT ((void __iomem *)CKSEG1ADDR(0x1c000000)) +#define RESET 0x0f + +DEFINE_LED_TRIGGER(power_off_led_trigger); + +static int __init ledtrig_power_off_init(void) +{ + led_trigger_register_simple("power-off", &power_off_led_trigger); + return 0; +} +device_initcall(ledtrig_power_off_init); + +void cobalt_machine_halt(void) +{ + /* + * turn on power off LED on RaQ + */ + led_trigger_event(power_off_led_trigger, LED_FULL); + + local_irq_disable(); + while (1) { + if (cpu_wait) + cpu_wait(); + } +} + +void cobalt_machine_restart(char *command) +{ + writeb(RESET, RESET_PORT); + + /* we should never get here */ + cobalt_machine_halt(); +} diff --git a/arch/mips/cobalt/rtc.c b/arch/mips/cobalt/rtc.c new file mode 100644 index 000000000..0f9ca45da --- /dev/null +++ b/arch/mips/cobalt/rtc.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Registration of Cobalt RTC platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + */ +#include +#include +#include +#include +#include + +static struct resource cobalt_rtc_resource[] __initdata = { + { + .start = 0x70, + .end = 0x77, + .flags = IORESOURCE_IO, + }, + { + .start = RTC_IRQ, + .end = RTC_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static __init int cobalt_rtc_add(void) +{ + struct platform_device *pdev; + int retval; + + pdev = platform_device_alloc("rtc_cmos", -1); + if (!pdev) + return -ENOMEM; + + retval = platform_device_add_resources(pdev, cobalt_rtc_resource, + ARRAY_SIZE(cobalt_rtc_resource)); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_rtc_add); diff --git a/arch/mips/cobalt/serial.c b/arch/mips/cobalt/serial.c new file mode 100644 index 000000000..5fb676719 --- /dev/null +++ b/arch/mips/cobalt/serial.c @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Registration of Cobalt UART platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + */ +#include +#include +#include +#include +#include + +#include +#include + +static struct resource cobalt_uart_resource[] __initdata = { + { + .start = 0x1c800000, + .end = 0x1c800007, + .flags = IORESOURCE_MEM, + }, + { + .start = SERIAL_IRQ, + .end = SERIAL_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct plat_serial8250_port cobalt_serial8250_port[] = { + { + .irq = SERIAL_IRQ, + .uartclk = 18432000, + .iotype = UPIO_MEM, + .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .mapbase = 0x1c800000, + }, + {}, +}; + +static __init int cobalt_uart_add(void) +{ + struct platform_device *pdev; + int retval; + + /* + * Cobalt Qube1 has no UART. + */ + if (cobalt_board_id == COBALT_BRD_ID_QUBE1) + return 0; + + pdev = platform_device_alloc("serial8250", -1); + if (!pdev) + return -ENOMEM; + + pdev->id = PLAT8250_DEV_PLATFORM; + pdev->dev.platform_data = cobalt_serial8250_port; + + retval = platform_device_add_resources(pdev, cobalt_uart_resource, ARRAY_SIZE(cobalt_uart_resource)); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_uart_add); diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c new file mode 100644 index 000000000..9a266bf78 --- /dev/null +++ b/arch/mips/cobalt/setup.c @@ -0,0 +1,116 @@ +/* + * Setup pointers to hardware dependent routines. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) + * + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +const char *get_system_type(void) +{ + switch (cobalt_board_id) { + case COBALT_BRD_ID_QUBE1: + return "Cobalt Qube"; + case COBALT_BRD_ID_RAQ1: + return "Cobalt RaQ"; + case COBALT_BRD_ID_QUBE2: + return "Cobalt Qube2"; + case COBALT_BRD_ID_RAQ2: + return "Cobalt RaQ2"; + } + return "MIPS Cobalt"; +} + +/* + * Cobalt doesn't have PS/2 keyboard/mouse interfaces, + * keyboard controller is never used. + * Also PCI-ISA bridge DMA controller is never used. + */ +static struct resource cobalt_reserved_resources[] = { + { /* dma1 */ + .start = 0x00, + .end = 0x1f, + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* keyboard */ + .start = 0x60, + .end = 0x6f, + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* dma page reg */ + .start = 0x80, + .end = 0x8f, + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* dma2 */ + .start = 0xc0, + .end = 0xdf, + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, +}; + +void __init plat_mem_setup(void) +{ + int i; + + _machine_restart = cobalt_machine_restart; + _machine_halt = cobalt_machine_halt; + pm_power_off = cobalt_machine_halt; + + set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); + + /* I/O port resource */ + ioport_resource.end = 0x01ffffff; + + /* These resources have been reserved by VIA SuperI/O chip. */ + for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++) + request_resource(&ioport_resource, cobalt_reserved_resources + i); +} + +/* + * Prom init. We read our one and only communication with the firmware. + * Grab the amount of installed memory. + * Better boot loaders (CoLo) pass a command line too :-) + */ + +void __init prom_init(void) +{ + unsigned long memsz; + int argc, i; + char **argv; + + memsz = fw_arg0 & 0x7fff0000; + argc = fw_arg0 & 0x0000ffff; + argv = (char **)fw_arg1; + + for (i = 1; i < argc; i++) { + strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE); + if (i < (argc - 1)) + strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); + } + + memblock_add(0, memsz); + + setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0); +} diff --git a/arch/mips/cobalt/time.c b/arch/mips/cobalt/time.c new file mode 100644 index 000000000..1b6fa6649 --- /dev/null +++ b/arch/mips/cobalt/time.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Cobalt time initialization. + * + * Copyright (C) 2007 Yoichi Yuasa + */ +#include +#include + +#include +#include + +#define GT641XX_BASE_CLOCK 50000000 /* 50MHz */ + +void __init plat_time_init(void) +{ + u32 start, end; + int i = HZ / 10; + + setup_pit_timer(); + + gt641xx_set_base_clock(GT641XX_BASE_CLOCK); + + /* + * MIPS counter frequency is measured during a 100msec interval + * using GT64111 timer0. + */ + while (!gt641xx_timer0_state()) + ; + + start = read_c0_count(); + + while (i--) + while (!gt641xx_timer0_state()) + ; + + end = read_c0_count(); + + mips_hpt_frequency = (end - start) * 10; + printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency); +} -- cgit v1.3.1