From a5bde5d8fde8a8cb28e59a672d5ddc5b9c1e7656 Mon Sep 17 00:00:00 2001 From: Breno Leitao Date: Wed, 5 Aug 2026 07:52:36 -0700 Subject: workqueue: skip the node_nr_active update for non-unbound workqueues apply_wqattrs_commit() updates node_nr_active->max unconditionally. wq->node_nr_active[] is only allocated for unbound workqueues, so guard the call before per-cpu workqueues start using this path. No functional change: only unbound workqueues reach apply_wqattrs_*() today. Signed-off-by: Breno Leitao Signed-off-by: Tejun Heo --- .../bindings/hwinfo/loongson,ls2k-chipid.yaml | 38 ++++++++++++++ .../devicetree/bindings/hwinfo/renesas,prr.yaml | 37 +++++++++++++ .../bindings/hwinfo/samsung,exynos-chipid.yaml | 60 ++++++++++++++++++++++ .../bindings/hwinfo/samsung,s5pv210-chipid.yaml | 30 +++++++++++ .../devicetree/bindings/hwinfo/ti,k3-socinfo.yaml | 51 ++++++++++++++++++ .../bindings/hwinfo/via,vt8500-scc-id.yaml | 37 +++++++++++++ 6 files changed, 253 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml create mode 100644 Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml create mode 100644 Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml create mode 100644 Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml create mode 100644 Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml create mode 100644 Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml (limited to 'Documentation/devicetree/bindings/hwinfo') diff --git a/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml new file mode 100644 index 000000000..9d0c36ec1 --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/loongson,ls2k-chipid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-2 SoC ChipID + +maintainers: + - Yinbo Zhu + +description: | + Loongson-2 SoC contains many groups of global utilities register + blocks, of which the ChipID group registers record SoC version, + feature, vendor and id information. + +properties: + compatible: + const: loongson,ls2k-chipid + + reg: + maxItems: 1 + + little-endian: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid: chipid@1fe00000 { + compatible = "loongson,ls2k-chipid"; + reg = <0x1fe00000 0x3ffc>; + little-endian; + }; diff --git a/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml b/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml new file mode 100644 index 000000000..792f371ce --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Product Register + +maintainers: + - Geert Uytterhoeven + - Magnus Damm + +description: | + Most Renesas ARM SoCs have a Product Register or Boundary Scan ID + Register that allows to retrieve SoC product and revision information. + If present, a device node for this register should be added. + +properties: + compatible: + enum: + - renesas,prr + - renesas,bsid + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + prr: chipid@ff000044 { + compatible = "renesas,prr"; + reg = <0xff000044 4>; + }; diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml new file mode 100644 index 000000000..b9cdfe52b --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/samsung,exynos-chipid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC series Chipid driver + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + oneOf: + - enum: + - samsung,exynos4210-chipid + - samsung,exynos850-chipid + - items: + - enum: + - samsung,exynos5433-chipid + - samsung,exynos7-chipid + - samsung,exynos7870-chipid + - samsung,exynos8890-chipid + - const: samsung,exynos4210-chipid + - items: + - enum: + - samsung,exynos2200-chipid + - samsung,exynos7885-chipid + - samsung,exynos8895-chipid + - samsung,exynos9610-chipid + - samsung,exynos9810-chipid + - samsung,exynos990-chipid + - samsung,exynosautov9-chipid + - samsung,exynosautov920-chipid + - const: samsung,exynos850-chipid + + reg: + maxItems: 1 + + samsung,asv-bin: + description: + Adaptive Supply Voltage bin selection. This can be used + to determine the ASV bin of an SoC if respective information + is missing in the CHIPID registers or in the OTP memory. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + samsung,asv-bin = <2>; + }; diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml new file mode 100644 index 000000000..563ded4fc --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/samsung,s5pv210-chipid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S5PV210 SoC ChipID + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: samsung,s5pv210-chipid + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid@e0000000 { + compatible = "samsung,s5pv210-chipid"; + reg = <0xe0000000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml new file mode 100644 index 000000000..2900224aa --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 Multicore SoC platforms chipid module + +maintainers: + - Tero Kristo + - Nishanth Menon + +description: | + Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is + represented by CTRLMMR_xxx_JTAGID register which contains information about + SoC id and revision. + + On some SoCs like AM62P, the silicon revision is determined by reading + alternative registers via NVMEM cells. + +properties: + $nodename: + pattern: "^chipid@[0-9a-f]+$" + + compatible: + items: + - const: ti,am654-chipid + + reg: + maxItems: 1 + + nvmem-cells: + items: + - description: Alternate silicon revision register + + nvmem-cell-names: + items: + - const: gpsw1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid@43000014 { + compatible = "ti,am654-chipid"; + reg = <0x43000014 0x4>; + }; diff --git a/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml b/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml new file mode 100644 index 000000000..b0f425a4a --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/via,vt8500-scc-id.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA/WonderMedia SoC system configuration information + +maintainers: + - Alexey Charkov + +description: + The system configuration controller on VIA/WonderMedia SoC's contains a chip + identifier and revision used to differentiate between different hardware + versions of on-chip IP blocks having their own peculiarities which may or + may not be captured by their respective DT compatible strings + +properties: + compatible: + items: + - const: via,vt8500-scc-id + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid@d8120000 { + compatible = "via,vt8500-scc-id"; + reg = <0xd8120000 0x4>; + }; -- cgit v1.3.1