From a5f7a5bb3b7f28ba7e4fa246775b29a0e5537255 Mon Sep 17 00:00:00 2001 From: Jinke Han Date: Tue, 8 Sep 2026 15:37:42 +0800 Subject: x86/kprobes: Fix crash when probing CS CALL instructions When using eBPF to probe CS CALL instructions within a function, a crash can be triggered. The eBPF tool probes offset 257 of the __hrtimer_run_queues() function: <__hrtimer_run_queues+249>: nopl 0x0(%rax,%rax,1) <__hrtimer_run_queues+254>: mov %r14,%rdi <__hrtimer_run_queues+257>: cs call <__x86_indirect_thunk_r12> <__hrtimer_run_queues+263>: mov %eax,%r12d <__hrtimer_run_queues+266>: xchg %ax,%ax <__hrtimer_run_queues+268>: mov %r13,%rdi Which triggers this crash: BUG: unable to handle page fault for address: 00000000000f41c9 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 0 P4D 0 Oops: 0002 [#1] SMP NOPTI CPU: 1 PID: 0 Comm: swapper/1 Kdump: loaded Tainted: P RIP: 0010:__hrtimer_run_queues+0x106/0x230 Note that __hrtimer_run_queues+0x106 is __hrtimer_run_queues+262, which is at the 6th byte of the above CS CALL instruction. Since the CS CALL instruction occupies 6 bytes, the exception occurred in the middle of that call instruction. The root cause is that when using eBPF tools to probe in the middle of a function, a kprobe with INT3 is used as the underlying implementation. During single-step emulation of the original CALL instruction, int3_emulate_call() assumes that the probed CALL instruction is 5 bytes long. However, the actual CS-prefixed CALL instruction occupies 6 bytes, so it constructs an incorrect exception return address. When the CPU returns from the kprobe handler, the next instruction to be executed is at the address of the last byte of that CS CALL instruction. Coincidentally, starting from that address, the CPU fetches and decodes a completely different instruction, which ultimately triggers a kernel crash. Fix the issue by using the actual instruction length obtained from the instruction decoder when constructing the exception return address, rather than relying on the hardcoded CALL_INSN_SIZE macro. [ mingo: Refined the changelog ] Fixes: 6256e668b7af ("x86/kprobes: Use int3 instead of debug trap for single-step") Suggested-by: Masami Hiramatsu (Google) Signed-off-by: Jinke Han Signed-off-by: Ingo Molnar Reviewed-by: Masami Hiramatsu (Google) Acked-by: Yafang Shao Acked-by: Borislav Petkov Cc: Peter Zijlstra Link: https://patch.msgid.link/20260908073742.GA10517@didi-ThinkCentre-M920t-N000 --- Documentation/devicetree/bindings/arc/axs101.txt | 7 +++++ Documentation/devicetree/bindings/arc/axs103.txt | 8 ++++++ Documentation/devicetree/bindings/arc/eznps.txt | 7 +++++ Documentation/devicetree/bindings/arc/hsdk.txt | 7 +++++ Documentation/devicetree/bindings/arc/pct.txt | 20 +++++++++++++ .../devicetree/bindings/arc/snps,archs-pct.yaml | 33 ++++++++++++++++++++++ 6 files changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/arc/axs101.txt create mode 100644 Documentation/devicetree/bindings/arc/axs103.txt create mode 100644 Documentation/devicetree/bindings/arc/eznps.txt create mode 100644 Documentation/devicetree/bindings/arc/hsdk.txt create mode 100644 Documentation/devicetree/bindings/arc/pct.txt create mode 100644 Documentation/devicetree/bindings/arc/snps,archs-pct.yaml (limited to 'Documentation/devicetree/bindings/arc') diff --git a/Documentation/devicetree/bindings/arc/axs101.txt b/Documentation/devicetree/bindings/arc/axs101.txt new file mode 100644 index 000000000..48290d517 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/axs101.txt @@ -0,0 +1,7 @@ +Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings +--------------------------------------------------------------------------- + +SDP Main Board with an AXC001 CPU Card hoisting ARC700 core in silicon + +Required root node properties: + - compatible = "snps,axs101", "snps,arc-sdp"; diff --git a/Documentation/devicetree/bindings/arc/axs103.txt b/Documentation/devicetree/bindings/arc/axs103.txt new file mode 100644 index 000000000..6eea862e7 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/axs103.txt @@ -0,0 +1,8 @@ +Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings +--------------------------------------------------------------------------- + +SDP Main Board with an AXC003 FPGA Card which can contain various flavours of +HS38x cores. + +Required root node properties: + - compatible = "snps,axs103", "snps,arc-sdp"; diff --git a/Documentation/devicetree/bindings/arc/eznps.txt b/Documentation/devicetree/bindings/arc/eznps.txt new file mode 100644 index 000000000..1aa50c640 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/eznps.txt @@ -0,0 +1,7 @@ +EZchip NPS Network Processor Platforms Device Tree Bindings +--------------------------------------------------------------------------- + +Appliance main board with NPS400 ASIC. + +Required root node properties: + - compatible = "ezchip,arc-nps"; diff --git a/Documentation/devicetree/bindings/arc/hsdk.txt b/Documentation/devicetree/bindings/arc/hsdk.txt new file mode 100644 index 000000000..be50654bb --- /dev/null +++ b/Documentation/devicetree/bindings/arc/hsdk.txt @@ -0,0 +1,7 @@ +Synopsys DesignWare ARC HS Development Kit Device Tree Bindings +--------------------------------------------------------------------------- + +ARC HSDK Board with quad-core ARC HS38x4 in silicon. + +Required root node properties: + - compatible = "snps,hsdk"; diff --git a/Documentation/devicetree/bindings/arc/pct.txt b/Documentation/devicetree/bindings/arc/pct.txt new file mode 100644 index 000000000..4e874d9a3 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/pct.txt @@ -0,0 +1,20 @@ +* ARC Performance Counters + +The ARC700 can be configured with a pipeline performance monitor for counting +CPU and cache events like cache misses and hits. Like conventional PCT there +are 100+ hardware conditions dynamically mapped to up to 32 counters + +Note that: + * The ARC 700 PCT does not support interrupts; although HW events may be + counted, the HW events themselves cannot serve as a trigger for a sample. + +Required properties: + +- compatible : should contain + "snps,arc700-pct" + +Example: + +pmu { + compatible = "snps,arc700-pct"; +}; diff --git a/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml b/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml new file mode 100644 index 000000000..532f7584f --- /dev/null +++ b/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arc/snps,archs-pct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARC HS Performance Counters + +maintainers: + - Aryabhatta Dey + +description: + The ARC HS can be configured with a pipeline performance monitor for counting + CPU and cache events like cache misses and hits. Like conventional PCT there + are 100+ hardware conditions dynamically mapped to up to 32 counters. + It also supports overflow interrupts. + +properties: + compatible: + const: snps,archs-pct + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false -- cgit v1.3.1